1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/sched.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40 #include <net/mac80211.h>
43 #include "iwl-3945-fh.h"
44 #include "iwl-commands.h"
47 #include "iwl-eeprom.h"
49 #include "iwl-helpers.h"
51 #include "iwl-3945-led.h"
52 #include "iwl-3945-debugfs.h"
54 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
55 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
56 IWL_RATE_##r##M_IEEE, \
57 IWL_RATE_##ip##M_INDEX, \
58 IWL_RATE_##in##M_INDEX, \
59 IWL_RATE_##rp##M_INDEX, \
60 IWL_RATE_##rn##M_INDEX, \
61 IWL_RATE_##pp##M_INDEX, \
62 IWL_RATE_##np##M_INDEX, \
63 IWL_RATE_##r##M_INDEX_TABLE, \
64 IWL_RATE_##ip##M_INDEX_TABLE }
68 * rate, prev rate, next rate, prev tgg rate, next tgg rate
70 * If there isn't a valid next or previous rate then INV is used which
71 * maps to IWL_RATE_INVALID
74 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945] = {
75 IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
76 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
77 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
78 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
79 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
80 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
81 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
82 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
83 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
84 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
85 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
86 IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
89 /* 1 = enable the iwl3945_disable_events() function */
90 #define IWL_EVT_DISABLE (0)
91 #define IWL_EVT_DISABLE_SIZE (1532/32)
94 * iwl3945_disable_events - Disable selected events in uCode event log
96 * Disable an event by writing "1"s into "disable"
97 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
98 * Default values of 0 enable uCode events to be logged.
99 * Use for only special debugging. This function is just a placeholder as-is,
100 * you'll need to provide the special bits! ...
101 * ... and set IWL_EVT_DISABLE to 1. */
102 void iwl3945_disable_events(struct iwl_priv *priv)
105 u32 base; /* SRAM address of event log header */
106 u32 disable_ptr; /* SRAM address of event-disable bitmap array */
107 u32 array_size; /* # of u32 entries in array */
108 u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
109 0x00000000, /* 31 - 0 Event id numbers */
110 0x00000000, /* 63 - 32 */
111 0x00000000, /* 95 - 64 */
112 0x00000000, /* 127 - 96 */
113 0x00000000, /* 159 - 128 */
114 0x00000000, /* 191 - 160 */
115 0x00000000, /* 223 - 192 */
116 0x00000000, /* 255 - 224 */
117 0x00000000, /* 287 - 256 */
118 0x00000000, /* 319 - 288 */
119 0x00000000, /* 351 - 320 */
120 0x00000000, /* 383 - 352 */
121 0x00000000, /* 415 - 384 */
122 0x00000000, /* 447 - 416 */
123 0x00000000, /* 479 - 448 */
124 0x00000000, /* 511 - 480 */
125 0x00000000, /* 543 - 512 */
126 0x00000000, /* 575 - 544 */
127 0x00000000, /* 607 - 576 */
128 0x00000000, /* 639 - 608 */
129 0x00000000, /* 671 - 640 */
130 0x00000000, /* 703 - 672 */
131 0x00000000, /* 735 - 704 */
132 0x00000000, /* 767 - 736 */
133 0x00000000, /* 799 - 768 */
134 0x00000000, /* 831 - 800 */
135 0x00000000, /* 863 - 832 */
136 0x00000000, /* 895 - 864 */
137 0x00000000, /* 927 - 896 */
138 0x00000000, /* 959 - 928 */
139 0x00000000, /* 991 - 960 */
140 0x00000000, /* 1023 - 992 */
141 0x00000000, /* 1055 - 1024 */
142 0x00000000, /* 1087 - 1056 */
143 0x00000000, /* 1119 - 1088 */
144 0x00000000, /* 1151 - 1120 */
145 0x00000000, /* 1183 - 1152 */
146 0x00000000, /* 1215 - 1184 */
147 0x00000000, /* 1247 - 1216 */
148 0x00000000, /* 1279 - 1248 */
149 0x00000000, /* 1311 - 1280 */
150 0x00000000, /* 1343 - 1312 */
151 0x00000000, /* 1375 - 1344 */
152 0x00000000, /* 1407 - 1376 */
153 0x00000000, /* 1439 - 1408 */
154 0x00000000, /* 1471 - 1440 */
155 0x00000000, /* 1503 - 1472 */
158 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
159 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
160 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
164 disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32)));
165 array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32)));
167 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
168 IWL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n",
170 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
171 iwl_write_targ_mem(priv,
172 disable_ptr + (i * sizeof(u32)),
176 IWL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n");
177 IWL_DEBUG_INFO(priv, " by writing \"1\"s into disable bitmap\n");
178 IWL_DEBUG_INFO(priv, " in SRAM at 0x%x, size %d u32s\n",
179 disable_ptr, array_size);
184 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
188 for (idx = 0; idx < IWL_RATE_COUNT_3945; idx++)
189 if (iwl3945_rates[idx].plcp == plcp)
194 #ifdef CONFIG_IWLWIFI_DEBUG
195 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
197 static const char *iwl3945_get_tx_fail_reason(u32 status)
199 switch (status & TX_STATUS_MSK) {
200 case TX_3945_STATUS_SUCCESS:
202 TX_STATUS_ENTRY(SHORT_LIMIT);
203 TX_STATUS_ENTRY(LONG_LIMIT);
204 TX_STATUS_ENTRY(FIFO_UNDERRUN);
205 TX_STATUS_ENTRY(MGMNT_ABORT);
206 TX_STATUS_ENTRY(NEXT_FRAG);
207 TX_STATUS_ENTRY(LIFE_EXPIRE);
208 TX_STATUS_ENTRY(DEST_PS);
209 TX_STATUS_ENTRY(ABORTED);
210 TX_STATUS_ENTRY(BT_RETRY);
211 TX_STATUS_ENTRY(STA_INVALID);
212 TX_STATUS_ENTRY(FRAG_DROPPED);
213 TX_STATUS_ENTRY(TID_DISABLE);
214 TX_STATUS_ENTRY(FRAME_FLUSHED);
215 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
216 TX_STATUS_ENTRY(TX_LOCKED);
217 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
223 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
230 * get ieee prev rate from rate scale table.
231 * for A and B mode we need to overright prev
234 int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate)
236 int next_rate = iwl3945_get_prev_ieee_rate(rate);
238 switch (priv->band) {
239 case IEEE80211_BAND_5GHZ:
240 if (rate == IWL_RATE_12M_INDEX)
241 next_rate = IWL_RATE_9M_INDEX;
242 else if (rate == IWL_RATE_6M_INDEX)
243 next_rate = IWL_RATE_6M_INDEX;
245 case IEEE80211_BAND_2GHZ:
246 if (!(priv->_3945.sta_supp_rates & IWL_OFDM_RATES_MASK) &&
247 iwl_is_associated(priv)) {
248 if (rate == IWL_RATE_11M_INDEX)
249 next_rate = IWL_RATE_5M_INDEX;
262 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
264 * When FW advances 'R' index, all entries between old and new 'R' index
265 * need to be reclaimed. As result, some free space forms. If there is
266 * enough free space (> low mark), wake the stack that feeds us.
268 static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv,
269 int txq_id, int index)
271 struct iwl_tx_queue *txq = &priv->txq[txq_id];
272 struct iwl_queue *q = &txq->q;
273 struct iwl_tx_info *tx_info;
275 BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
277 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
278 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
280 tx_info = &txq->txb[txq->q.read_ptr];
281 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
282 tx_info->skb[0] = NULL;
283 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
286 if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
287 (txq_id != IWL_CMD_QUEUE_NUM) &&
288 priv->mac80211_registered)
289 iwl_wake_queue(priv, txq_id);
293 * iwl3945_rx_reply_tx - Handle Tx response
295 static void iwl3945_rx_reply_tx(struct iwl_priv *priv,
296 struct iwl_rx_mem_buffer *rxb)
298 struct iwl_rx_packet *pkt = rxb_addr(rxb);
299 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
300 int txq_id = SEQ_TO_QUEUE(sequence);
301 int index = SEQ_TO_INDEX(sequence);
302 struct iwl_tx_queue *txq = &priv->txq[txq_id];
303 struct ieee80211_tx_info *info;
304 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
305 u32 status = le32_to_cpu(tx_resp->status);
309 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
310 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
311 "is out of range [0-%d] %d %d\n", txq_id,
312 index, txq->q.n_bd, txq->q.write_ptr,
317 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
318 ieee80211_tx_info_clear_status(info);
320 /* Fill the MRR chain with some info about on-chip retransmissions */
321 rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
322 if (info->band == IEEE80211_BAND_5GHZ)
323 rate_idx -= IWL_FIRST_OFDM_RATE;
325 fail = tx_resp->failure_frame;
327 info->status.rates[0].idx = rate_idx;
328 info->status.rates[0].count = fail + 1; /* add final attempt */
330 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
331 info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
332 IEEE80211_TX_STAT_ACK : 0;
334 IWL_DEBUG_TX(priv, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
335 txq_id, iwl3945_get_tx_fail_reason(status), status,
336 tx_resp->rate, tx_resp->failure_frame);
338 IWL_DEBUG_TX_REPLY(priv, "Tx queue reclaim %d\n", index);
339 iwl3945_tx_queue_reclaim(priv, txq_id, index);
341 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
342 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
347 /*****************************************************************************
349 * Intel PRO/Wireless 3945ABG/BG Network Connection
351 * RX handler implementations
353 *****************************************************************************/
354 #ifdef CONFIG_IWLWIFI_DEBUG
356 * based on the assumption of all statistics counter are in DWORD
357 * FIXME: This function is for debugging, do not deal with
358 * the case of counters roll-over.
360 static void iwl3945_accumulative_statistics(struct iwl_priv *priv,
366 u32 *delta, *max_delta;
368 prev_stats = (__le32 *)&priv->_3945.statistics;
369 accum_stats = (u32 *)&priv->_3945.accum_statistics;
370 delta = (u32 *)&priv->_3945.delta_statistics;
371 max_delta = (u32 *)&priv->_3945.max_delta;
373 for (i = sizeof(__le32); i < sizeof(struct iwl3945_notif_statistics);
374 i += sizeof(__le32), stats++, prev_stats++, delta++,
375 max_delta++, accum_stats++) {
376 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
377 *delta = (le32_to_cpu(*stats) -
378 le32_to_cpu(*prev_stats));
379 *accum_stats += *delta;
380 if (*delta > *max_delta)
385 /* reset accumulative statistics for "no-counter" type statistics */
386 priv->_3945.accum_statistics.general.temperature =
387 priv->_3945.statistics.general.temperature;
388 priv->_3945.accum_statistics.general.ttl_timestamp =
389 priv->_3945.statistics.general.ttl_timestamp;
393 void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
394 struct iwl_rx_mem_buffer *rxb)
396 struct iwl_rx_packet *pkt = rxb_addr(rxb);
398 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
399 (int)sizeof(struct iwl3945_notif_statistics),
400 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
401 #ifdef CONFIG_IWLWIFI_DEBUG
402 iwl3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw);
405 memcpy(&priv->_3945.statistics, pkt->u.raw, sizeof(priv->_3945.statistics));
408 void iwl3945_reply_statistics(struct iwl_priv *priv,
409 struct iwl_rx_mem_buffer *rxb)
411 struct iwl_rx_packet *pkt = rxb_addr(rxb);
412 __le32 *flag = (__le32 *)&pkt->u.raw;
414 if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) {
415 #ifdef CONFIG_IWLWIFI_DEBUG
416 memset(&priv->_3945.accum_statistics, 0,
417 sizeof(struct iwl3945_notif_statistics));
418 memset(&priv->_3945.delta_statistics, 0,
419 sizeof(struct iwl3945_notif_statistics));
420 memset(&priv->_3945.max_delta, 0,
421 sizeof(struct iwl3945_notif_statistics));
423 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
425 iwl3945_hw_rx_statistics(priv, rxb);
429 /******************************************************************************
431 * Misc. internal state and helper functions
433 ******************************************************************************/
434 #ifdef CONFIG_IWLWIFI_DEBUG
437 * iwl3945_report_frame - dump frame to syslog during debug sessions
439 * You may hack this function to show different aspects of received frames,
440 * including selective frame dumps.
441 * group100 parameter selects whether to show 1 out of 100 good frames.
443 static void _iwl3945_dbg_report_frame(struct iwl_priv *priv,
444 struct iwl_rx_packet *pkt,
445 struct ieee80211_hdr *header, int group100)
448 u32 print_summary = 0;
449 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
465 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
466 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
467 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
468 u8 *data = IWL_RX_DATA(pkt);
471 fc = header->frame_control;
472 seq_ctl = le16_to_cpu(header->seq_ctrl);
475 channel = le16_to_cpu(rx_hdr->channel);
476 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
477 length = le16_to_cpu(rx_hdr->len);
479 /* end-of-frame status and timestamp */
480 status = le32_to_cpu(rx_end->status);
481 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
482 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
483 tsf = le64_to_cpu(rx_end->timestamp);
485 /* signal statistics */
486 rssi = rx_stats->rssi;
488 sig_avg = le16_to_cpu(rx_stats->sig_avg);
489 noise_diff = le16_to_cpu(rx_stats->noise_diff);
491 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
493 /* if data frame is to us and all is good,
494 * (optionally) print summary for only 1 out of every 100 */
495 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
496 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
499 print_summary = 1; /* print each frame */
500 else if (priv->framecnt_to_us < 100) {
501 priv->framecnt_to_us++;
504 priv->framecnt_to_us = 0;
509 /* print summary for all other frames */
519 else if (ieee80211_has_retry(fc))
521 else if (ieee80211_is_assoc_resp(fc))
523 else if (ieee80211_is_reassoc_resp(fc))
525 else if (ieee80211_is_probe_resp(fc)) {
527 print_dump = 1; /* dump frame contents */
528 } else if (ieee80211_is_beacon(fc)) {
530 print_dump = 1; /* dump frame contents */
531 } else if (ieee80211_is_atim(fc))
533 else if (ieee80211_is_auth(fc))
535 else if (ieee80211_is_deauth(fc))
537 else if (ieee80211_is_disassoc(fc))
542 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
546 rate = iwl3945_rates[rate].ieee / 2;
548 /* print frame summary.
549 * MAC addresses show just the last byte (for brevity),
550 * but you can hack it to show more, if you'd like to. */
552 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
553 "len=%u, rssi=%d, chnl=%d, rate=%d,\n",
554 title, le16_to_cpu(fc), header->addr1[5],
555 length, rssi, channel, rate);
557 /* src/dst addresses assume managed mode */
558 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, "
559 "src=0x%02x, rssi=%u, tim=%lu usec, "
560 "phy=0x%02x, chnl=%d\n",
561 title, le16_to_cpu(fc), header->addr1[5],
562 header->addr3[5], rssi,
563 tsf_low - priv->scan_start_tsf,
568 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
571 static void iwl3945_dbg_report_frame(struct iwl_priv *priv,
572 struct iwl_rx_packet *pkt,
573 struct ieee80211_hdr *header, int group100)
575 if (iwl_get_debug_level(priv) & IWL_DL_RX)
576 _iwl3945_dbg_report_frame(priv, pkt, header, group100);
580 static inline void iwl3945_dbg_report_frame(struct iwl_priv *priv,
581 struct iwl_rx_packet *pkt,
582 struct ieee80211_hdr *header, int group100)
587 /* This is necessary only for a number of statistics, see the caller. */
588 static int iwl3945_is_network_packet(struct iwl_priv *priv,
589 struct ieee80211_hdr *header)
591 /* Filter incoming packets to determine if they are targeted toward
592 * this network, discarding packets coming from ourselves */
593 switch (priv->iw_mode) {
594 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
595 /* packets to our IBSS update information */
596 return !compare_ether_addr(header->addr3, priv->bssid);
597 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
598 /* packets to our IBSS update information */
599 return !compare_ether_addr(header->addr2, priv->bssid);
605 static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv,
606 struct iwl_rx_mem_buffer *rxb,
607 struct ieee80211_rx_status *stats)
609 struct iwl_rx_packet *pkt = rxb_addr(rxb);
610 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
611 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
612 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
613 u16 len = le16_to_cpu(rx_hdr->len);
615 __le16 fc = hdr->frame_control;
617 /* We received data from the HW, so stop the watchdog */
618 if (unlikely(len + IWL39_RX_FRAME_SIZE >
619 PAGE_SIZE << priv->hw_params.rx_page_order)) {
620 IWL_DEBUG_DROP(priv, "Corruption detected!\n");
624 /* We only process data packets if the interface is open */
625 if (unlikely(!priv->is_open)) {
626 IWL_DEBUG_DROP_LIMIT(priv,
627 "Dropping packet while interface is not open.\n");
631 skb = dev_alloc_skb(128);
633 IWL_ERR(priv, "dev_alloc_skb failed\n");
637 if (!iwl3945_mod_params.sw_crypto)
638 iwl_set_decrypted_flag(priv,
639 (struct ieee80211_hdr *)rxb_addr(rxb),
640 le32_to_cpu(rx_end->status), stats);
642 skb_add_rx_frag(skb, 0, rxb->page,
643 (void *)rx_hdr->payload - (void *)pkt, len);
645 iwl_update_stats(priv, false, fc, len);
646 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
648 ieee80211_rx(priv->hw, skb);
649 priv->alloc_rxb_page--;
653 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
655 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
656 struct iwl_rx_mem_buffer *rxb)
658 struct ieee80211_hdr *header;
659 struct ieee80211_rx_status rx_status;
660 struct iwl_rx_packet *pkt = rxb_addr(rxb);
661 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
662 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
663 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
664 u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
665 u16 rx_stats_noise_diff __maybe_unused = le16_to_cpu(rx_stats->noise_diff);
669 rx_status.mactime = le64_to_cpu(rx_end->timestamp);
671 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
672 rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
673 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
675 rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
676 if (rx_status.band == IEEE80211_BAND_5GHZ)
677 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
679 rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
680 RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
682 /* set the preamble flag if appropriate */
683 if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
684 rx_status.flag |= RX_FLAG_SHORTPRE;
686 if ((unlikely(rx_stats->phy_count > 20))) {
687 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
688 rx_stats->phy_count);
692 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
693 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
694 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
700 /* Convert 3945's rssi indicator to dBm */
701 rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET;
703 IWL_DEBUG_STATS(priv, "Rssi %d sig_avg %d noise_diff %d\n",
704 rx_status.signal, rx_stats_sig_avg,
705 rx_stats_noise_diff);
707 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
709 network_packet = iwl3945_is_network_packet(priv, header);
711 IWL_DEBUG_STATS_LIMIT(priv, "[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
712 network_packet ? '*' : ' ',
713 le16_to_cpu(rx_hdr->channel),
714 rx_status.signal, rx_status.signal,
717 /* Set "1" to report good data frames in groups of 100 */
718 iwl3945_dbg_report_frame(priv, pkt, header, 1);
719 iwl_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len), header);
721 if (network_packet) {
722 priv->_3945.last_beacon_time =
723 le32_to_cpu(rx_end->beacon_timestamp);
724 priv->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
725 priv->_3945.last_rx_rssi = rx_status.signal;
728 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
731 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
732 struct iwl_tx_queue *txq,
733 dma_addr_t addr, u16 len, u8 reset, u8 pad)
737 struct iwl3945_tfd *tfd, *tfd_tmp;
740 tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
741 tfd = &tfd_tmp[q->write_ptr];
744 memset(tfd, 0, sizeof(*tfd));
746 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
748 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
749 IWL_ERR(priv, "Error can not send more than %d chunks\n",
754 tfd->tbs[count].addr = cpu_to_le32(addr);
755 tfd->tbs[count].len = cpu_to_le32(len);
759 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
760 TFD_CTL_PAD_SET(pad));
766 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
768 * Does NOT advance any indexes
770 void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
772 struct iwl3945_tfd *tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
773 int index = txq->q.read_ptr;
774 struct iwl3945_tfd *tfd = &tfd_tmp[index];
775 struct pci_dev *dev = priv->pci_dev;
780 counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
781 if (counter > NUM_TFD_CHUNKS) {
782 IWL_ERR(priv, "Too many chunks: %i\n", counter);
783 /* @todo issue fatal error, it is quite serious situation */
789 pci_unmap_single(dev,
790 pci_unmap_addr(&txq->meta[index], mapping),
791 pci_unmap_len(&txq->meta[index], len),
794 /* unmap chunks if any */
796 for (i = 1; i < counter; i++) {
797 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
798 le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE);
799 if (txq->txb[txq->q.read_ptr].skb[0]) {
800 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
801 if (txq->txb[txq->q.read_ptr].skb[0]) {
802 /* Can be called from interrupt context */
803 dev_kfree_skb_any(skb);
804 txq->txb[txq->q.read_ptr].skb[0] = NULL;
812 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
815 void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
816 struct iwl_device_cmd *cmd,
817 struct ieee80211_tx_info *info,
818 struct ieee80211_hdr *hdr,
819 int sta_id, int tx_id)
821 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
822 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT_3945);
828 __le16 fc = hdr->frame_control;
829 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
831 rate = iwl3945_rates[rate_index].plcp;
832 tx_flags = tx_cmd->tx_flags;
834 /* We need to figure out how to get the sta->supp_rates while
835 * in this running context */
836 rate_mask = IWL_RATES_MASK;
839 /* Set retry limit on DATA packets and Probe Responses*/
840 if (ieee80211_is_probe_resp(fc))
841 data_retry_limit = 3;
843 data_retry_limit = IWL_DEFAULT_TX_RETRY;
844 tx_cmd->data_retry_limit = data_retry_limit;
846 if (tx_id >= IWL_CMD_QUEUE_NUM)
851 if (data_retry_limit < rts_retry_limit)
852 rts_retry_limit = data_retry_limit;
853 tx_cmd->rts_retry_limit = rts_retry_limit;
855 if (ieee80211_is_mgmt(fc)) {
856 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
857 case cpu_to_le16(IEEE80211_STYPE_AUTH):
858 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
859 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
860 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
861 if (tx_flags & TX_CMD_FLG_RTS_MSK) {
862 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
863 tx_flags |= TX_CMD_FLG_CTS_MSK;
872 tx_cmd->tx_flags = tx_flags;
875 tx_cmd->supp_rates[0] =
876 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
879 tx_cmd->supp_rates[1] = (rate_mask & 0xF);
881 IWL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
882 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
883 tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
884 tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
887 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
889 unsigned long flags_spin;
890 struct iwl_station_entry *station;
892 if (sta_id == IWL_INVALID_STATION)
893 return IWL_INVALID_STATION;
895 spin_lock_irqsave(&priv->sta_lock, flags_spin);
896 station = &priv->stations[sta_id];
898 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
899 station->sta.rate_n_flags = cpu_to_le16(tx_rate);
900 station->sta.mode = STA_CONTROL_MODIFY_MSK;
902 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
904 iwl_send_add_sta(priv, &station->sta, flags);
905 IWL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n",
910 static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
912 if (src == IWL_PWR_SRC_VAUX) {
913 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
914 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
915 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
916 ~APMG_PS_CTRL_MSK_PWR_SRC);
918 iwl_poll_bit(priv, CSR_GPIO_IN,
919 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
920 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
923 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
924 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
925 ~APMG_PS_CTRL_MSK_PWR_SRC);
927 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
928 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
934 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
936 iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
937 iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
938 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
939 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0),
940 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
941 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
942 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
943 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
944 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
945 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
946 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
947 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
949 /* fake read to flush all prev I/O */
950 iwl_read_direct32(priv, FH39_RSSR_CTRL);
955 static int iwl3945_tx_reset(struct iwl_priv *priv)
959 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
962 iwl_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
964 /* all 6 fifo are active */
965 iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
967 iwl_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
968 iwl_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
969 iwl_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
970 iwl_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
972 iwl_write_direct32(priv, FH39_TSSR_CBB_BASE,
973 priv->_3945.shared_phys);
975 iwl_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
976 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
977 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
978 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
979 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
980 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
981 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
982 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
989 * iwl3945_txq_ctx_reset - Reset TX queue context
991 * Destroys all DMA structures and initialize them again
993 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
996 int txq_id, slots_num;
998 iwl3945_hw_txq_ctx_free(priv);
1000 /* allocate tx queue structure */
1001 rc = iwl_alloc_txq_mem(priv);
1006 rc = iwl3945_tx_reset(priv);
1011 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
1012 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1013 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1014 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1017 IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
1025 iwl3945_hw_txq_ctx_free(priv);
1031 * Start up 3945's basic functionality after it has been reset
1032 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1033 * NOTE: This does not load uCode nor start the embedded processor
1035 static int iwl3945_apm_init(struct iwl_priv *priv)
1037 int ret = iwl_apm_init(priv);
1039 /* Clear APMG (NIC's internal power management) interrupts */
1040 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1041 iwl_write_prph(priv, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
1043 /* Reset radio chip */
1044 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1046 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1051 static void iwl3945_nic_config(struct iwl_priv *priv)
1053 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1054 unsigned long flags;
1057 spin_lock_irqsave(&priv->lock, flags);
1059 /* Determine HW type */
1060 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1062 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
1064 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1065 IWL_DEBUG_INFO(priv, "RTP type\n");
1066 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1067 IWL_DEBUG_INFO(priv, "3945 RADIO-MB type\n");
1068 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1069 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1071 IWL_DEBUG_INFO(priv, "3945 RADIO-MM type\n");
1072 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1073 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1076 if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
1077 IWL_DEBUG_INFO(priv, "SKU OP mode is mrc\n");
1078 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1079 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1081 IWL_DEBUG_INFO(priv, "SKU OP mode is basic\n");
1083 if ((eeprom->board_revision & 0xF0) == 0xD0) {
1084 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
1085 eeprom->board_revision);
1086 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1087 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1089 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
1090 eeprom->board_revision);
1091 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1092 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1095 if (eeprom->almgor_m_version <= 1) {
1096 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1097 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1098 IWL_DEBUG_INFO(priv, "Card M type A version is 0x%X\n",
1099 eeprom->almgor_m_version);
1101 IWL_DEBUG_INFO(priv, "Card M type B version is 0x%X\n",
1102 eeprom->almgor_m_version);
1103 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1104 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1106 spin_unlock_irqrestore(&priv->lock, flags);
1108 if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1109 IWL_DEBUG_RF_KILL(priv, "SW RF KILL supported in EEPROM.\n");
1111 if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1112 IWL_DEBUG_RF_KILL(priv, "HW RF KILL supported in EEPROM.\n");
1115 int iwl3945_hw_nic_init(struct iwl_priv *priv)
1118 unsigned long flags;
1119 struct iwl_rx_queue *rxq = &priv->rxq;
1121 spin_lock_irqsave(&priv->lock, flags);
1122 priv->cfg->ops->lib->apm_ops.init(priv);
1123 spin_unlock_irqrestore(&priv->lock, flags);
1125 rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
1129 priv->cfg->ops->lib->apm_ops.config(priv);
1131 /* Allocate the RX queue, or reset if it is already allocated */
1133 rc = iwl_rx_queue_alloc(priv);
1135 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1139 iwl3945_rx_queue_reset(priv, rxq);
1141 iwl3945_rx_replenish(priv);
1143 iwl3945_rx_init(priv, rxq);
1146 /* Look at using this instead:
1147 rxq->need_update = 1;
1148 iwl_rx_queue_update_write_ptr(priv, rxq);
1151 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1153 rc = iwl3945_txq_ctx_reset(priv);
1157 set_bit(STATUS_INIT, &priv->status);
1163 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1165 * Destroy all TX DMA queues and structures
1167 void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
1173 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
1175 if (txq_id == IWL_CMD_QUEUE_NUM)
1176 iwl_cmd_queue_free(priv);
1178 iwl_tx_queue_free(priv, txq_id);
1180 /* free tx queue structure */
1181 iwl_free_txq_mem(priv);
1184 void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1189 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
1190 iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0);
1192 /* reset TFD queues */
1193 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
1194 iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
1195 iwl_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
1196 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1200 iwl3945_hw_txq_ctx_free(priv);
1204 * iwl3945_hw_reg_adjust_power_by_temp
1205 * return index delta into power gain settings table
1207 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1209 return (new_reading - old_reading) * (-11) / 100;
1213 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1215 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1217 return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1220 int iwl3945_hw_get_temperature(struct iwl_priv *priv)
1222 return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1226 * iwl3945_hw_reg_txpower_get_temperature
1227 * get the current temperature by reading from NIC
1229 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1231 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1234 temperature = iwl3945_hw_get_temperature(priv);
1236 /* driver's okay range is -260 to +25.
1237 * human readable okay range is 0 to +285 */
1238 IWL_DEBUG_INFO(priv, "Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1240 /* handle insane temp reading */
1241 if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1242 IWL_ERR(priv, "Error bad temperature value %d\n", temperature);
1244 /* if really really hot(?),
1245 * substitute the 3rd band/group's temp measured at factory */
1246 if (priv->last_temperature > 100)
1247 temperature = eeprom->groups[2].temperature;
1248 else /* else use most recent "sane" value from driver */
1249 temperature = priv->last_temperature;
1252 return temperature; /* raw, not "human readable" */
1255 /* Adjust Txpower only if temperature variance is greater than threshold.
1257 * Both are lower than older versions' 9 degrees */
1258 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1261 * is_temp_calib_needed - determines if new calibration is needed
1263 * records new temperature in tx_mgr->temperature.
1264 * replaces tx_mgr->last_temperature *only* if calib needed
1265 * (assumes caller will actually do the calibration!). */
1266 static int is_temp_calib_needed(struct iwl_priv *priv)
1270 priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1271 temp_diff = priv->temperature - priv->last_temperature;
1273 /* get absolute value */
1274 if (temp_diff < 0) {
1275 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d,\n", temp_diff);
1276 temp_diff = -temp_diff;
1277 } else if (temp_diff == 0)
1278 IWL_DEBUG_POWER(priv, "Same temp,\n");
1280 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d,\n", temp_diff);
1282 /* if we don't need calibration, *don't* update last_temperature */
1283 if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1284 IWL_DEBUG_POWER(priv, "Timed thermal calib not needed\n");
1288 IWL_DEBUG_POWER(priv, "Timed thermal calib needed\n");
1290 /* assume that caller will actually do calib ...
1291 * update the "last temperature" value */
1292 priv->last_temperature = priv->temperature;
1296 #define IWL_MAX_GAIN_ENTRIES 78
1297 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1298 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1300 /* radio and DSP power table, each step is 1/2 dB.
1301 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1302 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1304 {251, 127}, /* 2.4 GHz, highest power */
1381 {3, 95} }, /* 2.4 GHz, lowest power */
1383 {251, 127}, /* 5.x GHz, highest power */
1460 {3, 120} } /* 5.x GHz, lowest power */
1463 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1467 if (index >= IWL_MAX_GAIN_ENTRIES)
1468 return IWL_MAX_GAIN_ENTRIES - 1;
1472 /* Kick off thermal recalibration check every 60 seconds */
1473 #define REG_RECALIB_PERIOD (60)
1476 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1478 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1479 * or 6 Mbit (OFDM) rates.
1481 static void iwl3945_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1482 s32 rate_index, const s8 *clip_pwrs,
1483 struct iwl_channel_info *ch_info,
1486 struct iwl3945_scan_power_info *scan_power_info;
1490 scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1492 /* use this channel group's 6Mbit clipping/saturation pwr,
1493 * but cap at regulatory scan power restriction (set during init
1494 * based on eeprom channel data) for this channel. */
1495 power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1497 /* further limit to user's max power preference.
1498 * FIXME: Other spectrum management power limitations do not
1499 * seem to apply?? */
1500 power = min(power, priv->tx_power_user_lmt);
1501 scan_power_info->requested_power = power;
1503 /* find difference between new scan *power* and current "normal"
1504 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1505 * current "normal" temperature-compensated Tx power *index* for
1506 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1508 power_index = ch_info->power_info[rate_index].power_table_index
1509 - (power - ch_info->power_info
1510 [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1512 /* store reference index that we use when adjusting *all* scan
1513 * powers. So we can accommodate user (all channel) or spectrum
1514 * management (single channel) power changes "between" temperature
1515 * feedback compensation procedures.
1516 * don't force fit this reference index into gain table; it may be a
1517 * negative number. This will help avoid errors when we're at
1518 * the lower bounds (highest gains, for warmest temperatures)
1521 /* don't exceed table bounds for "real" setting */
1522 power_index = iwl3945_hw_reg_fix_power_index(power_index);
1524 scan_power_info->power_table_index = power_index;
1525 scan_power_info->tpc.tx_gain =
1526 power_gain_table[band_index][power_index].tx_gain;
1527 scan_power_info->tpc.dsp_atten =
1528 power_gain_table[band_index][power_index].dsp_atten;
1532 * iwl3945_send_tx_power - fill in Tx Power command with gain settings
1534 * Configures power settings for all rates for the current channel,
1535 * using values from channel info struct, and send to NIC
1537 static int iwl3945_send_tx_power(struct iwl_priv *priv)
1540 const struct iwl_channel_info *ch_info = NULL;
1541 struct iwl3945_txpowertable_cmd txpower = {
1542 .channel = priv->active_rxon.channel,
1545 txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1546 ch_info = iwl_get_channel_info(priv,
1548 le16_to_cpu(priv->active_rxon.channel));
1551 "Failed to get channel info for channel %d [%d]\n",
1552 le16_to_cpu(priv->active_rxon.channel), priv->band);
1556 if (!is_channel_valid(ch_info)) {
1557 IWL_DEBUG_POWER(priv, "Not calling TX_PWR_TABLE_CMD on "
1558 "non-Tx channel.\n");
1562 /* fill cmd with power settings for all rates for current channel */
1563 /* Fill OFDM rate */
1564 for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1565 rate_idx <= IWL39_LAST_OFDM_RATE; rate_idx++, i++) {
1567 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1568 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1570 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1571 le16_to_cpu(txpower.channel),
1573 txpower.power[i].tpc.tx_gain,
1574 txpower.power[i].tpc.dsp_atten,
1575 txpower.power[i].rate);
1577 /* Fill CCK rates */
1578 for (rate_idx = IWL_FIRST_CCK_RATE;
1579 rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1580 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1581 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1583 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1584 le16_to_cpu(txpower.channel),
1586 txpower.power[i].tpc.tx_gain,
1587 txpower.power[i].tpc.dsp_atten,
1588 txpower.power[i].rate);
1591 return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1592 sizeof(struct iwl3945_txpowertable_cmd),
1598 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1599 * @ch_info: Channel to update. Uses power_info.requested_power.
1601 * Replace requested_power and base_power_index ch_info fields for
1604 * Called if user or spectrum management changes power preferences.
1605 * Takes into account h/w and modulation limitations (clip power).
1607 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1609 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1610 * properly fill out the scan powers, and actual h/w gain settings,
1611 * and send changes to NIC
1613 static int iwl3945_hw_reg_set_new_power(struct iwl_priv *priv,
1614 struct iwl_channel_info *ch_info)
1616 struct iwl3945_channel_power_info *power_info;
1617 int power_changed = 0;
1619 const s8 *clip_pwrs;
1622 /* Get this chnlgrp's rate-to-max/clip-powers table */
1623 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
1625 /* Get this channel's rate-to-current-power settings table */
1626 power_info = ch_info->power_info;
1628 /* update OFDM Txpower settings */
1629 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1630 i++, ++power_info) {
1633 /* limit new power to be no more than h/w capability */
1634 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1635 if (power == power_info->requested_power)
1638 /* find difference between old and new requested powers,
1639 * update base (non-temp-compensated) power index */
1640 delta_idx = (power - power_info->requested_power) * 2;
1641 power_info->base_power_index -= delta_idx;
1643 /* save new requested power value */
1644 power_info->requested_power = power;
1649 /* update CCK Txpower settings, based on OFDM 12M setting ...
1650 * ... all CCK power settings for a given channel are the *same*. */
1651 if (power_changed) {
1653 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1654 requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1656 /* do all CCK rates' iwl3945_channel_power_info structures */
1657 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1658 power_info->requested_power = power;
1659 power_info->base_power_index =
1660 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1661 base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1670 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1672 * NOTE: Returned power limit may be less (but not more) than requested,
1673 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1674 * (no consideration for h/w clipping limitations).
1676 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1681 /* if we're using TGd limits, use lower of TGd or EEPROM */
1682 if (ch_info->tgd_data.max_power != 0)
1683 max_power = min(ch_info->tgd_data.max_power,
1684 ch_info->eeprom.max_power_avg);
1686 /* else just use EEPROM limits */
1689 max_power = ch_info->eeprom.max_power_avg;
1691 return min(max_power, ch_info->max_power_avg);
1695 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1697 * Compensate txpower settings of *all* channels for temperature.
1698 * This only accounts for the difference between current temperature
1699 * and the factory calibration temperatures, and bases the new settings
1700 * on the channel's base_power_index.
1702 * If RxOn is "associated", this sends the new Txpower to NIC!
1704 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1706 struct iwl_channel_info *ch_info = NULL;
1707 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1709 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1715 int temperature = priv->temperature;
1717 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1718 for (i = 0; i < priv->channel_count; i++) {
1719 ch_info = &priv->channel_info[i];
1720 a_band = is_channel_a_band(ch_info);
1722 /* Get this chnlgrp's factory calibration temperature */
1723 ref_temp = (s16)eeprom->groups[ch_info->group_index].
1726 /* get power index adjustment based on current and factory
1728 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1731 /* set tx power value for all rates, OFDM and CCK */
1732 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1735 ch_info->power_info[rate_index].base_power_index;
1737 /* temperature compensate */
1738 power_idx += delta_index;
1740 /* stay within table range */
1741 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1742 ch_info->power_info[rate_index].
1743 power_table_index = (u8) power_idx;
1744 ch_info->power_info[rate_index].tpc =
1745 power_gain_table[a_band][power_idx];
1748 /* Get this chnlgrp's rate-to-max/clip-powers table */
1749 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
1751 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1752 for (scan_tbl_index = 0;
1753 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1754 s32 actual_index = (scan_tbl_index == 0) ?
1755 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1756 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1757 actual_index, clip_pwrs,
1762 /* send Txpower command for current channel to ucode */
1763 return priv->cfg->ops->lib->send_tx_power(priv);
1766 int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1768 struct iwl_channel_info *ch_info;
1773 if (priv->tx_power_user_lmt == power) {
1774 IWL_DEBUG_POWER(priv, "Requested Tx power same as current "
1775 "limit: %ddBm.\n", power);
1779 IWL_DEBUG_POWER(priv, "Setting upper limit clamp to %ddBm.\n", power);
1780 priv->tx_power_user_lmt = power;
1782 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1784 for (i = 0; i < priv->channel_count; i++) {
1785 ch_info = &priv->channel_info[i];
1786 a_band = is_channel_a_band(ch_info);
1788 /* find minimum power of all user and regulatory constraints
1789 * (does not consider h/w clipping limitations) */
1790 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1791 max_power = min(power, max_power);
1792 if (max_power != ch_info->curr_txpow) {
1793 ch_info->curr_txpow = max_power;
1795 /* this considers the h/w clipping limitations */
1796 iwl3945_hw_reg_set_new_power(priv, ch_info);
1800 /* update txpower settings for all channels,
1801 * send to NIC if associated. */
1802 is_temp_calib_needed(priv);
1803 iwl3945_hw_reg_comp_txpower_temp(priv);
1808 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1811 struct iwl_rx_packet *pkt;
1812 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1813 struct iwl_host_cmd cmd = {
1814 .id = REPLY_RXON_ASSOC,
1815 .len = sizeof(rxon_assoc),
1816 .flags = CMD_WANT_SKB,
1817 .data = &rxon_assoc,
1819 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1820 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1822 if ((rxon1->flags == rxon2->flags) &&
1823 (rxon1->filter_flags == rxon2->filter_flags) &&
1824 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1825 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1826 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
1830 rxon_assoc.flags = priv->staging_rxon.flags;
1831 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1832 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1833 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1834 rxon_assoc.reserved = 0;
1836 rc = iwl_send_cmd_sync(priv, &cmd);
1840 pkt = (struct iwl_rx_packet *)cmd.reply_page;
1841 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
1842 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
1846 iwl_free_pages(priv, cmd.reply_page);
1852 * iwl3945_commit_rxon - commit staging_rxon to hardware
1854 * The RXON command in staging_rxon is committed to the hardware and
1855 * the active_rxon structure is updated with the new data. This
1856 * function correctly transitions out of the RXON_ASSOC_MSK state if
1857 * a HW tune is required based on the RXON structure changes.
1859 static int iwl3945_commit_rxon(struct iwl_priv *priv)
1861 /* cast away the const for active_rxon in this function */
1862 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1863 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
1866 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
1868 if (!iwl_is_alive(priv))
1871 /* always get timestamp with Rx frame */
1872 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1874 /* select antenna */
1875 staging_rxon->flags &=
1876 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1877 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
1879 rc = iwl_check_rxon_cmd(priv);
1881 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
1885 /* If we don't need to send a full RXON, we can use
1886 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1887 * and other flags for the current radio configuration. */
1888 if (!iwl_full_rxon_required(priv)) {
1889 rc = iwl_send_rxon_assoc(priv);
1891 IWL_ERR(priv, "Error setting RXON_ASSOC "
1892 "configuration (%d).\n", rc);
1896 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1901 /* If we are currently associated and the new config requires
1902 * an RXON_ASSOC and the new config wants the associated mask enabled,
1903 * we must clear the associated from the active configuration
1904 * before we apply the new config */
1905 if (iwl_is_associated(priv) && new_assoc) {
1906 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
1907 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1910 * reserved4 and 5 could have been filled by the iwlcore code.
1911 * Let's clear them before pushing to the 3945.
1913 active_rxon->reserved4 = 0;
1914 active_rxon->reserved5 = 0;
1915 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
1916 sizeof(struct iwl3945_rxon_cmd),
1917 &priv->active_rxon);
1919 /* If the mask clearing failed then we set
1920 * active_rxon back to what it was previously */
1922 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1923 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
1924 "configuration (%d).\n", rc);
1927 iwl_clear_ucode_stations(priv, false);
1928 iwl_restore_stations(priv);
1931 IWL_DEBUG_INFO(priv, "Sending RXON\n"
1932 "* with%s RXON_FILTER_ASSOC_MSK\n"
1935 (new_assoc ? "" : "out"),
1936 le16_to_cpu(staging_rxon->channel),
1937 staging_rxon->bssid_addr);
1940 * reserved4 and 5 could have been filled by the iwlcore code.
1941 * Let's clear them before pushing to the 3945.
1943 staging_rxon->reserved4 = 0;
1944 staging_rxon->reserved5 = 0;
1946 iwl_set_rxon_hwcrypto(priv, !iwl3945_mod_params.sw_crypto);
1948 /* Apply the new configuration */
1949 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
1950 sizeof(struct iwl3945_rxon_cmd),
1953 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
1957 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1960 iwl_clear_ucode_stations(priv, false);
1961 iwl_restore_stations(priv);
1964 /* If we issue a new RXON command which required a tune then we must
1965 * send a new TXPOWER command or we won't be able to Tx any frames */
1966 rc = priv->cfg->ops->lib->send_tx_power(priv);
1968 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
1972 /* Init the hardware's rate fallback order based on the band */
1973 rc = iwl3945_init_hw_rate_table(priv);
1975 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1983 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
1985 * -- reset periodic timer
1986 * -- see if temp has changed enough to warrant re-calibration ... if so:
1987 * -- correct coeffs for temp (can reset temp timer)
1988 * -- save this temp as "last",
1989 * -- send new set of gain settings to NIC
1990 * NOTE: This should continue working, even when we're not associated,
1991 * so we can keep our internal table of scan powers current. */
1992 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1994 /* This will kick in the "brute force"
1995 * iwl3945_hw_reg_comp_txpower_temp() below */
1996 if (!is_temp_calib_needed(priv))
1999 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2000 * This is based *only* on current temperature,
2001 * ignoring any previous power measurements */
2002 iwl3945_hw_reg_comp_txpower_temp(priv);
2005 queue_delayed_work(priv->workqueue,
2006 &priv->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ);
2009 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2011 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2012 _3945.thermal_periodic.work);
2014 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2017 mutex_lock(&priv->mutex);
2018 iwl3945_reg_txpower_periodic(priv);
2019 mutex_unlock(&priv->mutex);
2023 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2026 * This function is used when initializing channel-info structs.
2028 * NOTE: These channel groups do *NOT* match the bands above!
2029 * These channel groups are based on factory-tested channels;
2030 * on A-band, EEPROM's "group frequency" entries represent the top
2031 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
2033 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
2034 const struct iwl_channel_info *ch_info)
2036 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2037 struct iwl3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
2039 u16 group_index = 0; /* based on factory calib frequencies */
2042 /* Find the group index for the channel ... don't use index 1(?) */
2043 if (is_channel_a_band(ch_info)) {
2044 for (group = 1; group < 5; group++) {
2045 grp_channel = ch_grp[group].group_channel;
2046 if (ch_info->channel <= grp_channel) {
2047 group_index = group;
2051 /* group 4 has a few channels *above* its factory cal freq */
2055 group_index = 0; /* 2.4 GHz, group 0 */
2057 IWL_DEBUG_POWER(priv, "Chnl %d mapped to grp %d\n", ch_info->channel,
2063 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2065 * Interpolate to get nominal (i.e. at factory calibration temperature) index
2066 * into radio/DSP gain settings table for requested power.
2068 static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv *priv,
2070 s32 setting_index, s32 *new_index)
2072 const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2073 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2075 s32 power = 2 * requested_power;
2077 const struct iwl3945_eeprom_txpower_sample *samples;
2082 chnl_grp = &eeprom->groups[setting_index];
2083 samples = chnl_grp->samples;
2084 for (i = 0; i < 5; i++) {
2085 if (power == samples[i].power) {
2086 *new_index = samples[i].gain_index;
2091 if (power > samples[1].power) {
2094 } else if (power > samples[2].power) {
2097 } else if (power > samples[3].power) {
2105 denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2106 if (denominator == 0)
2108 gains0 = (s32) samples[index0].gain_index * (1 << 19);
2109 gains1 = (s32) samples[index1].gain_index * (1 << 19);
2110 res = gains0 + (gains1 - gains0) *
2111 ((s32) power - (s32) samples[index0].power) / denominator +
2113 *new_index = res >> 19;
2117 static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv)
2121 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2122 const struct iwl3945_eeprom_txpower_group *group;
2124 IWL_DEBUG_POWER(priv, "Initializing factory calib info from EEPROM\n");
2126 for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2127 s8 *clip_pwrs; /* table of power levels for each rate */
2128 s8 satur_pwr; /* saturation power for each chnl group */
2129 group = &eeprom->groups[i];
2131 /* sanity check on factory saturation power value */
2132 if (group->saturation_power < 40) {
2133 IWL_WARN(priv, "Error: saturation power is %d, "
2134 "less than minimum expected 40\n",
2135 group->saturation_power);
2140 * Derive requested power levels for each rate, based on
2141 * hardware capabilities (saturation power for band).
2142 * Basic value is 3dB down from saturation, with further
2143 * power reductions for highest 3 data rates. These
2144 * backoffs provide headroom for high rate modulation
2145 * power peaks, without too much distortion (clipping).
2147 /* we'll fill in this array with h/w max power levels */
2148 clip_pwrs = (s8 *) priv->_3945.clip_groups[i].clip_powers;
2150 /* divide factory saturation power by 2 to find -3dB level */
2151 satur_pwr = (s8) (group->saturation_power >> 1);
2153 /* fill in channel group's nominal powers for each rate */
2154 for (rate_index = 0;
2155 rate_index < IWL_RATE_COUNT_3945; rate_index++, clip_pwrs++) {
2156 switch (rate_index) {
2157 case IWL_RATE_36M_INDEX_TABLE:
2158 if (i == 0) /* B/G */
2159 *clip_pwrs = satur_pwr;
2161 *clip_pwrs = satur_pwr - 5;
2163 case IWL_RATE_48M_INDEX_TABLE:
2165 *clip_pwrs = satur_pwr - 7;
2167 *clip_pwrs = satur_pwr - 10;
2169 case IWL_RATE_54M_INDEX_TABLE:
2171 *clip_pwrs = satur_pwr - 9;
2173 *clip_pwrs = satur_pwr - 12;
2176 *clip_pwrs = satur_pwr;
2184 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2186 * Second pass (during init) to set up priv->channel_info
2188 * Set up Tx-power settings in our channel info database for each VALID
2189 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2190 * and current temperature.
2192 * Since this is based on current temperature (at init time), these values may
2193 * not be valid for very long, but it gives us a starting/default point,
2194 * and allows us to active (i.e. using Tx) scan.
2196 * This does *not* write values to NIC, just sets up our internal table.
2198 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
2200 struct iwl_channel_info *ch_info = NULL;
2201 struct iwl3945_channel_power_info *pwr_info;
2202 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2206 const s8 *clip_pwrs; /* array of power levels for each rate */
2209 u8 pwr_index, base_pwr_index, a_band;
2213 /* save temperature reference,
2214 * so we can determine next time to calibrate */
2215 temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2216 priv->last_temperature = temperature;
2218 iwl3945_hw_reg_init_channel_groups(priv);
2220 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2221 for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2223 a_band = is_channel_a_band(ch_info);
2224 if (!is_channel_valid(ch_info))
2227 /* find this channel's channel group (*not* "band") index */
2228 ch_info->group_index =
2229 iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2231 /* Get this chnlgrp's rate->max/clip-powers table */
2232 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
2234 /* calculate power index *adjustment* value according to
2235 * diff between current temperature and factory temperature */
2236 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2237 eeprom->groups[ch_info->group_index].
2240 IWL_DEBUG_POWER(priv, "Delta index for channel %d: %d [%d]\n",
2241 ch_info->channel, delta_index, temperature +
2244 /* set tx power value for all OFDM rates */
2245 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2247 s32 uninitialized_var(power_idx);
2250 /* use channel group's clip-power table,
2251 * but don't exceed channel's max power */
2252 s8 pwr = min(ch_info->max_power_avg,
2253 clip_pwrs[rate_index]);
2255 pwr_info = &ch_info->power_info[rate_index];
2257 /* get base (i.e. at factory-measured temperature)
2258 * power table index for this rate's power */
2259 rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2260 ch_info->group_index,
2263 IWL_ERR(priv, "Invalid power index\n");
2266 pwr_info->base_power_index = (u8) power_idx;
2268 /* temperature compensate */
2269 power_idx += delta_index;
2271 /* stay within range of gain table */
2272 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2274 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2275 pwr_info->requested_power = pwr;
2276 pwr_info->power_table_index = (u8) power_idx;
2277 pwr_info->tpc.tx_gain =
2278 power_gain_table[a_band][power_idx].tx_gain;
2279 pwr_info->tpc.dsp_atten =
2280 power_gain_table[a_band][power_idx].dsp_atten;
2283 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2284 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2285 power = pwr_info->requested_power +
2286 IWL_CCK_FROM_OFDM_POWER_DIFF;
2287 pwr_index = pwr_info->power_table_index +
2288 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2289 base_pwr_index = pwr_info->base_power_index +
2290 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2292 /* stay within table range */
2293 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2294 gain = power_gain_table[a_band][pwr_index].tx_gain;
2295 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2297 /* fill each CCK rate's iwl3945_channel_power_info structure
2298 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2299 * NOTE: CCK rates start at end of OFDM rates! */
2300 for (rate_index = 0;
2301 rate_index < IWL_CCK_RATES; rate_index++) {
2302 pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2303 pwr_info->requested_power = power;
2304 pwr_info->power_table_index = pwr_index;
2305 pwr_info->base_power_index = base_pwr_index;
2306 pwr_info->tpc.tx_gain = gain;
2307 pwr_info->tpc.dsp_atten = dsp_atten;
2310 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2311 for (scan_tbl_index = 0;
2312 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2313 s32 actual_index = (scan_tbl_index == 0) ?
2314 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2315 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2316 actual_index, clip_pwrs, ch_info, a_band);
2323 int iwl3945_hw_rxq_stop(struct iwl_priv *priv)
2327 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2328 rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS,
2329 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2331 IWL_ERR(priv, "Can't stop Rx DMA.\n");
2336 int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2338 int txq_id = txq->q.id;
2340 struct iwl3945_shared *shared_data = priv->_3945.shared_virt;
2342 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2344 iwl_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2345 iwl_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2347 iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id),
2348 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2349 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2350 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2351 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2352 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2354 /* fake read to flush all prev. writes */
2355 iwl_read32(priv, FH39_TSSR_CBB_BASE);
2363 static u16 iwl3945_get_hcmd_size(u8 cmd_id, u16 len)
2367 return sizeof(struct iwl3945_rxon_cmd);
2368 case POWER_TABLE_CMD:
2369 return sizeof(struct iwl3945_powertable_cmd);
2376 static u16 iwl3945_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
2378 struct iwl3945_addsta_cmd *addsta = (struct iwl3945_addsta_cmd *)data;
2379 addsta->mode = cmd->mode;
2380 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2381 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2382 addsta->station_flags = cmd->station_flags;
2383 addsta->station_flags_msk = cmd->station_flags_msk;
2384 addsta->tid_disable_tx = cpu_to_le16(0);
2385 addsta->rate_n_flags = cmd->rate_n_flags;
2386 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2387 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2388 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2390 return (u16)sizeof(struct iwl3945_addsta_cmd);
2395 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2397 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2399 int rc, i, index, prev_index;
2400 struct iwl3945_rate_scaling_cmd rate_cmd = {
2401 .reserved = {0, 0, 0},
2403 struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2405 for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2406 index = iwl3945_rates[i].table_rs_index;
2408 table[index].rate_n_flags =
2409 iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2410 table[index].try_cnt = priv->retry_rate;
2411 prev_index = iwl3945_get_prev_ieee_rate(i);
2412 table[index].next_rate_index =
2413 iwl3945_rates[prev_index].table_rs_index;
2416 switch (priv->band) {
2417 case IEEE80211_BAND_5GHZ:
2418 IWL_DEBUG_RATE(priv, "Select A mode rate scale\n");
2419 /* If one of the following CCK rates is used,
2420 * have it fall back to the 6M OFDM rate */
2421 for (i = IWL_RATE_1M_INDEX_TABLE;
2422 i <= IWL_RATE_11M_INDEX_TABLE; i++)
2423 table[i].next_rate_index =
2424 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2426 /* Don't fall back to CCK rates */
2427 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2428 IWL_RATE_9M_INDEX_TABLE;
2430 /* Don't drop out of OFDM rates */
2431 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2432 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2435 case IEEE80211_BAND_2GHZ:
2436 IWL_DEBUG_RATE(priv, "Select B/G mode rate scale\n");
2437 /* If an OFDM rate is used, have it fall back to the
2440 if (!(priv->_3945.sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2441 iwl_is_associated(priv)) {
2443 index = IWL_FIRST_CCK_RATE;
2444 for (i = IWL_RATE_6M_INDEX_TABLE;
2445 i <= IWL_RATE_54M_INDEX_TABLE; i++)
2446 table[i].next_rate_index =
2447 iwl3945_rates[index].table_rs_index;
2449 index = IWL_RATE_11M_INDEX_TABLE;
2450 /* CCK shouldn't fall back to OFDM... */
2451 table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2460 /* Update the rate scaling for control frame Tx */
2461 rate_cmd.table_id = 0;
2462 rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2467 /* Update the rate scaling for data frame Tx */
2468 rate_cmd.table_id = 1;
2469 return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2473 /* Called when initializing driver */
2474 int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
2476 memset((void *)&priv->hw_params, 0,
2477 sizeof(struct iwl_hw_params));
2479 priv->_3945.shared_virt =
2480 dma_alloc_coherent(&priv->pci_dev->dev,
2481 sizeof(struct iwl3945_shared),
2482 &priv->_3945.shared_phys, GFP_KERNEL);
2483 if (!priv->_3945.shared_virt) {
2484 IWL_ERR(priv, "failed to allocate pci memory\n");
2485 mutex_unlock(&priv->mutex);
2489 /* Assign number of Usable TX queues */
2490 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
2492 priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd);
2493 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_3K);
2494 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2495 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2496 priv->hw_params.max_stations = IWL3945_STATION_COUNT;
2497 priv->hw_params.bcast_sta_id = IWL3945_BROADCAST_ID;
2499 priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2500 priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL;
2505 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv *priv,
2506 struct iwl3945_frame *frame, u8 rate)
2508 struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2509 unsigned int frame_size;
2511 tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2512 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2514 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
2515 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2517 frame_size = iwl3945_fill_beacon_frame(priv,
2518 tx_beacon_cmd->frame,
2519 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2521 BUG_ON(frame_size > MAX_MPDU_SIZE);
2522 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2524 tx_beacon_cmd->tx.rate = rate;
2525 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2526 TX_CMD_FLG_TSF_MSK);
2528 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2529 tx_beacon_cmd->tx.supp_rates[0] =
2530 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2532 tx_beacon_cmd->tx.supp_rates[1] =
2533 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2535 return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2538 void iwl3945_hw_rx_handler_setup(struct iwl_priv *priv)
2540 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2541 priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2544 void iwl3945_hw_setup_deferred_work(struct iwl_priv *priv)
2546 INIT_DELAYED_WORK(&priv->_3945.thermal_periodic,
2547 iwl3945_bg_reg_txpower_periodic);
2550 void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv)
2552 cancel_delayed_work(&priv->_3945.thermal_periodic);
2555 /* check contents of special bootstrap uCode SRAM */
2556 static int iwl3945_verify_bsm(struct iwl_priv *priv)
2558 __le32 *image = priv->ucode_boot.v_addr;
2559 u32 len = priv->ucode_boot.len;
2563 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
2565 /* verify BSM SRAM contents */
2566 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
2567 for (reg = BSM_SRAM_LOWER_BOUND;
2568 reg < BSM_SRAM_LOWER_BOUND + len;
2569 reg += sizeof(u32), image++) {
2570 val = iwl_read_prph(priv, reg);
2571 if (val != le32_to_cpu(*image)) {
2572 IWL_ERR(priv, "BSM uCode verification failed at "
2573 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2574 BSM_SRAM_LOWER_BOUND,
2575 reg - BSM_SRAM_LOWER_BOUND, len,
2576 val, le32_to_cpu(*image));
2581 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
2587 /******************************************************************************
2589 * EEPROM related functions
2591 ******************************************************************************/
2594 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2595 * embedded controller) as EEPROM reader; each read is a series of pulses
2596 * to/from the EEPROM chip, not a single event, so even reads could conflict
2597 * if they weren't arbitrated by some ownership mechanism. Here, the driver
2598 * simply claims ownership, which should be safe when this function is called
2599 * (i.e. before loading uCode!).
2601 static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
2603 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2608 static void iwl3945_eeprom_release_semaphore(struct iwl_priv *priv)
2614 * iwl3945_load_bsm - Load bootstrap instructions
2618 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2619 * in special SRAM that does not power down during RFKILL. When powering back
2620 * up after power-saving sleeps (or during initial uCode load), the BSM loads
2621 * the bootstrap program into the on-board processor, and starts it.
2623 * The bootstrap program loads (via DMA) instructions and data for a new
2624 * program from host DRAM locations indicated by the host driver in the
2625 * BSM_DRAM_* registers. Once the new program is loaded, it starts
2628 * When initializing the NIC, the host driver points the BSM to the
2629 * "initialize" uCode image. This uCode sets up some internal data, then
2630 * notifies host via "initialize alive" that it is complete.
2632 * The host then replaces the BSM_DRAM_* pointer values to point to the
2633 * normal runtime uCode instructions and a backup uCode data cache buffer
2634 * (filled initially with starting data values for the on-board processor),
2635 * then triggers the "initialize" uCode to load and launch the runtime uCode,
2636 * which begins normal operation.
2638 * When doing a power-save shutdown, runtime uCode saves data SRAM into
2639 * the backup data cache in DRAM before SRAM is powered down.
2641 * When powering back up, the BSM loads the bootstrap program. This reloads
2642 * the runtime uCode instructions and the backup data cache into SRAM,
2643 * and re-launches the runtime uCode from where it left off.
2645 static int iwl3945_load_bsm(struct iwl_priv *priv)
2647 __le32 *image = priv->ucode_boot.v_addr;
2648 u32 len = priv->ucode_boot.len;
2658 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
2660 /* make sure bootstrap program is no larger than BSM's SRAM size */
2661 if (len > IWL39_MAX_BSM_SIZE)
2664 /* Tell bootstrap uCode where to find the "Initialize" uCode
2665 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2666 * NOTE: iwl3945_initialize_alive_start() will replace these values,
2667 * after the "initialize" uCode has run, to point to
2668 * runtime/protocol instructions and backup data cache. */
2669 pinst = priv->ucode_init.p_addr;
2670 pdata = priv->ucode_init_data.p_addr;
2671 inst_len = priv->ucode_init.len;
2672 data_len = priv->ucode_init_data.len;
2674 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2675 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2676 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2677 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2679 /* Fill BSM memory with bootstrap instructions */
2680 for (reg_offset = BSM_SRAM_LOWER_BOUND;
2681 reg_offset < BSM_SRAM_LOWER_BOUND + len;
2682 reg_offset += sizeof(u32), image++)
2683 _iwl_write_prph(priv, reg_offset,
2684 le32_to_cpu(*image));
2686 rc = iwl3945_verify_bsm(priv);
2690 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2691 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
2692 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
2693 IWL39_RTC_INST_LOWER_BOUND);
2694 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2696 /* Load bootstrap code into instruction SRAM now,
2697 * to prepare to load "initialize" uCode */
2698 iwl_write_prph(priv, BSM_WR_CTRL_REG,
2699 BSM_WR_CTRL_REG_BIT_START);
2701 /* Wait for load of bootstrap uCode to finish */
2702 for (i = 0; i < 100; i++) {
2703 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
2704 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2709 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
2711 IWL_ERR(priv, "BSM write did not complete!\n");
2715 /* Enable future boot loads whenever power management unit triggers it
2716 * (e.g. when powering back up after power-save shutdown) */
2717 iwl_write_prph(priv, BSM_WR_CTRL_REG,
2718 BSM_WR_CTRL_REG_BIT_START_EN);
2723 #define IWL3945_UCODE_GET(item) \
2724 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2727 return le32_to_cpu(ucode->u.v1.item); \
2730 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2732 return UCODE_HEADER_SIZE(1);
2734 static u32 iwl3945_ucode_get_build(const struct iwl_ucode_header *ucode,
2739 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode,
2742 return (u8 *) ucode->u.v1.data;
2745 IWL3945_UCODE_GET(inst_size);
2746 IWL3945_UCODE_GET(data_size);
2747 IWL3945_UCODE_GET(init_size);
2748 IWL3945_UCODE_GET(init_data_size);
2749 IWL3945_UCODE_GET(boot_size);
2751 static struct iwl_hcmd_ops iwl3945_hcmd = {
2752 .rxon_assoc = iwl3945_send_rxon_assoc,
2753 .commit_rxon = iwl3945_commit_rxon,
2754 .send_bt_config = iwl_send_bt_config,
2757 static struct iwl_ucode_ops iwl3945_ucode = {
2758 .get_header_size = iwl3945_ucode_get_header_size,
2759 .get_build = iwl3945_ucode_get_build,
2760 .get_inst_size = iwl3945_ucode_get_inst_size,
2761 .get_data_size = iwl3945_ucode_get_data_size,
2762 .get_init_size = iwl3945_ucode_get_init_size,
2763 .get_init_data_size = iwl3945_ucode_get_init_data_size,
2764 .get_boot_size = iwl3945_ucode_get_boot_size,
2765 .get_data = iwl3945_ucode_get_data,
2768 static struct iwl_lib_ops iwl3945_lib = {
2769 .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd,
2770 .txq_free_tfd = iwl3945_hw_txq_free_tfd,
2771 .txq_init = iwl3945_hw_tx_queue_init,
2772 .load_ucode = iwl3945_load_bsm,
2773 .dump_nic_event_log = iwl3945_dump_nic_event_log,
2774 .dump_nic_error_log = iwl3945_dump_nic_error_log,
2776 .init = iwl3945_apm_init,
2777 .stop = iwl_apm_stop,
2778 .config = iwl3945_nic_config,
2779 .set_pwr_src = iwl3945_set_pwr_src,
2782 .regulatory_bands = {
2783 EEPROM_REGULATORY_BAND_1_CHANNELS,
2784 EEPROM_REGULATORY_BAND_2_CHANNELS,
2785 EEPROM_REGULATORY_BAND_3_CHANNELS,
2786 EEPROM_REGULATORY_BAND_4_CHANNELS,
2787 EEPROM_REGULATORY_BAND_5_CHANNELS,
2788 EEPROM_REGULATORY_BAND_NO_HT40,
2789 EEPROM_REGULATORY_BAND_NO_HT40,
2791 .verify_signature = iwlcore_eeprom_verify_signature,
2792 .acquire_semaphore = iwl3945_eeprom_acquire_semaphore,
2793 .release_semaphore = iwl3945_eeprom_release_semaphore,
2794 .query_addr = iwlcore_eeprom_query_addr,
2796 .send_tx_power = iwl3945_send_tx_power,
2797 .is_valid_rtc_data_addr = iwl3945_hw_valid_rtc_data_addr,
2798 .post_associate = iwl3945_post_associate,
2799 .isr = iwl_isr_legacy,
2800 .config_ap = iwl3945_config_ap,
2801 .add_bcast_station = iwl3945_add_bcast_station,
2804 .rx_stats_read = iwl3945_ucode_rx_stats_read,
2805 .tx_stats_read = iwl3945_ucode_tx_stats_read,
2806 .general_stats_read = iwl3945_ucode_general_stats_read,
2810 static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
2811 .get_hcmd_size = iwl3945_get_hcmd_size,
2812 .build_addsta_hcmd = iwl3945_build_addsta_hcmd,
2813 .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2814 .request_scan = iwl3945_request_scan,
2817 static const struct iwl_ops iwl3945_ops = {
2818 .ucode = &iwl3945_ucode,
2819 .lib = &iwl3945_lib,
2820 .hcmd = &iwl3945_hcmd,
2821 .utils = &iwl3945_hcmd_utils,
2822 .led = &iwl3945_led_ops,
2825 static struct iwl_cfg iwl3945_bg_cfg = {
2827 .fw_name_pre = IWL3945_FW_PRE,
2828 .ucode_api_max = IWL3945_UCODE_API_MAX,
2829 .ucode_api_min = IWL3945_UCODE_API_MIN,
2831 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2832 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2833 .ops = &iwl3945_ops,
2834 .num_of_queues = IWL39_NUM_QUEUES,
2835 .mod_params = &iwl3945_mod_params,
2836 .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2839 .use_isr_legacy = true,
2840 .ht_greenfield_support = false,
2841 .led_compensation = 64,
2842 .broken_powersave = true,
2843 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2844 .monitor_recover_period = IWL_MONITORING_PERIOD,
2845 .max_event_log_size = 512,
2848 static struct iwl_cfg iwl3945_abg_cfg = {
2850 .fw_name_pre = IWL3945_FW_PRE,
2851 .ucode_api_max = IWL3945_UCODE_API_MAX,
2852 .ucode_api_min = IWL3945_UCODE_API_MIN,
2853 .sku = IWL_SKU_A|IWL_SKU_G,
2854 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2855 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2856 .ops = &iwl3945_ops,
2857 .num_of_queues = IWL39_NUM_QUEUES,
2858 .mod_params = &iwl3945_mod_params,
2859 .use_isr_legacy = true,
2860 .ht_greenfield_support = false,
2861 .led_compensation = 64,
2862 .broken_powersave = true,
2863 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2864 .monitor_recover_period = IWL_MONITORING_PERIOD,
2865 .max_event_log_size = 512,
2868 DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = {
2869 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2870 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2871 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2872 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2873 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2874 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2878 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);
git://ftp.safe.ca / safe / jmp / linux-2.6 / blob