SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/wireless.h>
  39 #include <linux/workqueue.h>
  40 #include <linux/skbuff.h>
  41 #include <linux/dma-mapping.h>
  42 #include <net/dst.h>
  43 #include <asm/unaligned.h>
  44
  45 #include "b43legacy.h"
  46 #include "main.h"
  47 #include "debugfs.h"
  48 #include "phy.h"
  49 #include "dma.h"
  50 #include "pio.h"
  51 #include "sysfs.h"
  52 #include "xmit.h"
  53 #include "radio.h"
  54
  55
  56 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  57 MODULE_AUTHOR("Martin Langer");
  58 MODULE_AUTHOR("Stefano Brivio");
  59 MODULE_AUTHOR("Michael Buesch");
  60 MODULE_LICENSE("GPL");
  61
  62 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
  63
  64 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  65 static int modparam_pio;
  66 module_param_named(pio, modparam_pio, int, 0444);
  67 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  68 #elif defined(CONFIG_B43LEGACY_DMA)
  69 # define modparam_pio   0
  70 #elif defined(CONFIG_B43LEGACY_PIO)
  71 # define modparam_pio   1
  72 #endif
  73
  74 static int modparam_bad_frames_preempt;
  75 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  76 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  77                  " Preemption");
  78
  79 static char modparam_fwpostfix[16];
  80 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  81 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  82
  83 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  84 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  85         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  86         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  87         SSB_DEVTABLE_END
  88 };
  89 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  90
  91
  92 /* Channel and ratetables are shared for all devices.
  93  * They can't be const, because ieee80211 puts some precalculated
  94  * data in there. This data is the same for all devices, so we don't
  95  * get concurrency issues */
  96 #define RATETAB_ENT(_rateid, _flags) \
  97         {                                                               \
  98                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
  99                 .hw_value       = (_rateid),                            \
 100                 .flags          = (_flags),                             \
 101         }
 102 /*
 103  * NOTE: When changing this, sync with xmit.c's
 104  *       b43legacy_plcp_get_bitrate_idx_* functions!
 105  */
 106 static struct ieee80211_rate __b43legacy_ratetable[] = {
 107         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
 108         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
 109         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
 110         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
 111         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 112         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 119 };
 120 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 121 #define b43legacy_b_ratetable_size      4
 122 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 123 #define b43legacy_g_ratetable_size      12
 124
 125 #define CHANTAB_ENT(_chanid, _freq) \
 126         {                                                       \
 127                 .center_freq    = (_freq),                      \
 128                 .hw_value       = (_chanid),                    \
 129         }
 130 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 131         CHANTAB_ENT(1, 2412),
 132         CHANTAB_ENT(2, 2417),
 133         CHANTAB_ENT(3, 2422),
 134         CHANTAB_ENT(4, 2427),
 135         CHANTAB_ENT(5, 2432),
 136         CHANTAB_ENT(6, 2437),
 137         CHANTAB_ENT(7, 2442),
 138         CHANTAB_ENT(8, 2447),
 139         CHANTAB_ENT(9, 2452),
 140         CHANTAB_ENT(10, 2457),
 141         CHANTAB_ENT(11, 2462),
 142         CHANTAB_ENT(12, 2467),
 143         CHANTAB_ENT(13, 2472),
 144         CHANTAB_ENT(14, 2484),
 145 };
 146
 147 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 148         .channels = b43legacy_bg_chantable,
 149         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 150         .bitrates = b43legacy_b_ratetable,
 151         .n_bitrates = b43legacy_b_ratetable_size,
 152 };
 153
 154 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 155         .channels = b43legacy_bg_chantable,
 156         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 157         .bitrates = b43legacy_g_ratetable,
 158         .n_bitrates = b43legacy_g_ratetable_size,
 159 };
 160
 161 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 162 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 163 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 164 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 165
 166
 167 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 168 {
 169         if (!wl || !wl->current_dev)
 170                 return 1;
 171         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 172                 return 1;
 173         /* We are up and running.
 174          * Ratelimit the messages to avoid DoS over the net. */
 175         return net_ratelimit();
 176 }
 177
 178 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 179 {
 180         va_list args;
 181
 182         if (!b43legacy_ratelimit(wl))
 183                 return;
 184         va_start(args, fmt);
 185         printk(KERN_INFO "b43legacy-%s: ",
 186                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 187         vprintk(fmt, args);
 188         va_end(args);
 189 }
 190
 191 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 192 {
 193         va_list args;
 194
 195         if (!b43legacy_ratelimit(wl))
 196                 return;
 197         va_start(args, fmt);
 198         printk(KERN_ERR "b43legacy-%s ERROR: ",
 199                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 200         vprintk(fmt, args);
 201         va_end(args);
 202 }
 203
 204 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 205 {
 206         va_list args;
 207
 208         if (!b43legacy_ratelimit(wl))
 209                 return;
 210         va_start(args, fmt);
 211         printk(KERN_WARNING "b43legacy-%s warning: ",
 212                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 213         vprintk(fmt, args);
 214         va_end(args);
 215 }
 216
 217 #if B43legacy_DEBUG
 218 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 219 {
 220         va_list args;
 221
 222         va_start(args, fmt);
 223         printk(KERN_DEBUG "b43legacy-%s debug: ",
 224                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 225         vprintk(fmt, args);
 226         va_end(args);
 227 }
 228 #endif /* DEBUG */
 229
 230 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 231                                 u32 val)
 232 {
 233         u32 status;
 234
 235         B43legacy_WARN_ON(offset % 4 != 0);
 236
 237         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 238         if (status & B43legacy_MACCTL_BE)
 239                 val = swab32(val);
 240
 241         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 242         mmiowb();
 243         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 244 }
 245
 246 static inline
 247 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 248                                 u16 routing, u16 offset)
 249 {
 250         u32 control;
 251
 252         /* "offset" is the WORD offset. */
 253
 254         control = routing;
 255         control <<= 16;
 256         control |= offset;
 257         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 258 }
 259
 260 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 261                        u16 routing, u16 offset)
 262 {
 263         u32 ret;
 264
 265         if (routing == B43legacy_SHM_SHARED) {
 266                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 267                 if (offset & 0x0003) {
 268                         /* Unaligned access */
 269                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 270                         ret = b43legacy_read16(dev,
 271                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 272                         ret <<= 16;
 273                         b43legacy_shm_control_word(dev, routing,
 274                                                      (offset >> 2) + 1);
 275                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 276
 277                         return ret;
 278                 }
 279                 offset >>= 2;
 280         }
 281         b43legacy_shm_control_word(dev, routing, offset);
 282         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 283
 284         return ret;
 285 }
 286
 287 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 288                            u16 routing, u16 offset)
 289 {
 290         u16 ret;
 291
 292         if (routing == B43legacy_SHM_SHARED) {
 293                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 294                 if (offset & 0x0003) {
 295                         /* Unaligned access */
 296                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 297                         ret = b43legacy_read16(dev,
 298                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 299
 300                         return ret;
 301                 }
 302                 offset >>= 2;
 303         }
 304         b43legacy_shm_control_word(dev, routing, offset);
 305         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 306
 307         return ret;
 308 }
 309
 310 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 311                            u16 routing, u16 offset,
 312                            u32 value)
 313 {
 314         if (routing == B43legacy_SHM_SHARED) {
 315                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 316                 if (offset & 0x0003) {
 317                         /* Unaligned access */
 318                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 319                         mmiowb();
 320                         b43legacy_write16(dev,
 321                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 322                                           (value >> 16) & 0xffff);
 323                         mmiowb();
 324                         b43legacy_shm_control_word(dev, routing,
 325                                                    (offset >> 2) + 1);
 326                         mmiowb();
 327                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 328                                           value & 0xffff);
 329                         return;
 330                 }
 331                 offset >>= 2;
 332         }
 333         b43legacy_shm_control_word(dev, routing, offset);
 334         mmiowb();
 335         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 336 }
 337
 338 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 339                            u16 value)
 340 {
 341         if (routing == B43legacy_SHM_SHARED) {
 342                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 343                 if (offset & 0x0003) {
 344                         /* Unaligned access */
 345                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 346                         mmiowb();
 347                         b43legacy_write16(dev,
 348                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 349                                           value);
 350                         return;
 351                 }
 352                 offset >>= 2;
 353         }
 354         b43legacy_shm_control_word(dev, routing, offset);
 355         mmiowb();
 356         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 357 }
 358
 359 /* Read HostFlags */
 360 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 361 {
 362         u32 ret;
 363
 364         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 365                                    B43legacy_SHM_SH_HOSTFHI);
 366         ret <<= 16;
 367         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 368                                     B43legacy_SHM_SH_HOSTFLO);
 369
 370         return ret;
 371 }
 372
 373 /* Write HostFlags */
 374 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 375 {
 376         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 377                               B43legacy_SHM_SH_HOSTFLO,
 378                               (value & 0x0000FFFF));
 379         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 380                               B43legacy_SHM_SH_HOSTFHI,
 381                               ((value & 0xFFFF0000) >> 16));
 382 }
 383
 384 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 385 {
 386         /* We need to be careful. As we read the TSF from multiple
 387          * registers, we should take care of register overflows.
 388          * In theory, the whole tsf read process should be atomic.
 389          * We try to be atomic here, by restaring the read process,
 390          * if any of the high registers changed (overflew).
 391          */
 392         if (dev->dev->id.revision >= 3) {
 393                 u32 low;
 394                 u32 high;
 395                 u32 high2;
 396
 397                 do {
 398                         high = b43legacy_read32(dev,
 399                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 400                         low = b43legacy_read32(dev,
 401                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 402                         high2 = b43legacy_read32(dev,
 403                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 404                 } while (unlikely(high != high2));
 405
 406                 *tsf = high;
 407                 *tsf <<= 32;
 408                 *tsf |= low;
 409         } else {
 410                 u64 tmp;
 411                 u16 v0;
 412                 u16 v1;
 413                 u16 v2;
 414                 u16 v3;
 415                 u16 test1;
 416                 u16 test2;
 417                 u16 test3;
 418
 419                 do {
 420                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 421                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 422                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 423                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 424
 425                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 426                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 427                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 428                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 429
 430                 *tsf = v3;
 431                 *tsf <<= 48;
 432                 tmp = v2;
 433                 tmp <<= 32;
 434                 *tsf |= tmp;
 435                 tmp = v1;
 436                 tmp <<= 16;
 437                 *tsf |= tmp;
 438                 *tsf |= v0;
 439         }
 440 }
 441
 442 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 443 {
 444         u32 status;
 445
 446         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 447         status |= B43legacy_MACCTL_TBTTHOLD;
 448         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 449         mmiowb();
 450 }
 451
 452 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 453 {
 454         u32 status;
 455
 456         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 457         status &= ~B43legacy_MACCTL_TBTTHOLD;
 458         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 459 }
 460
 461 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 462 {
 463         /* Be careful with the in-progress timer.
 464          * First zero out the low register, so we have a full
 465          * register-overflow duration to complete the operation.
 466          */
 467         if (dev->dev->id.revision >= 3) {
 468                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 469                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 470
 471                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 472                 mmiowb();
 473                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 474                                     hi);
 475                 mmiowb();
 476                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 477                                     lo);
 478         } else {
 479                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 480                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 481                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 482                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 483
 484                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 485                 mmiowb();
 486                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 487                 mmiowb();
 488                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 489                 mmiowb();
 490                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 491                 mmiowb();
 492                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 493         }
 494 }
 495
 496 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 497 {
 498         b43legacy_time_lock(dev);
 499         b43legacy_tsf_write_locked(dev, tsf);
 500         b43legacy_time_unlock(dev);
 501 }
 502
 503 static
 504 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 505                              u16 offset, const u8 *mac)
 506 {
 507         static const u8 zero_addr[ETH_ALEN] = { 0 };
 508         u16 data;
 509
 510         if (!mac)
 511                 mac = zero_addr;
 512
 513         offset |= 0x0020;
 514         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 515
 516         data = mac[0];
 517         data |= mac[1] << 8;
 518         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 519         data = mac[2];
 520         data |= mac[3] << 8;
 521         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 522         data = mac[4];
 523         data |= mac[5] << 8;
 524         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 525 }
 526
 527 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 528 {
 529         static const u8 zero_addr[ETH_ALEN] = { 0 };
 530         const u8 *mac = dev->wl->mac_addr;
 531         const u8 *bssid = dev->wl->bssid;
 532         u8 mac_bssid[ETH_ALEN * 2];
 533         int i;
 534         u32 tmp;
 535
 536         if (!bssid)
 537                 bssid = zero_addr;
 538         if (!mac)
 539                 mac = zero_addr;
 540
 541         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 542
 543         memcpy(mac_bssid, mac, ETH_ALEN);
 544         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 545
 546         /* Write our MAC address and BSSID to template ram */
 547         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 548                 tmp =  (u32)(mac_bssid[i + 0]);
 549                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 550                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 551                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 552                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 553                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 554                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 555         }
 556 }
 557
 558 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 559 {
 560         b43legacy_write_mac_bssid_templates(dev);
 561         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 562                                 dev->wl->mac_addr);
 563 }
 564
 565 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 566                                     u16 slot_time)
 567 {
 568         /* slot_time is in usec. */
 569         if (dev->phy.type != B43legacy_PHYTYPE_G)
 570                 return;
 571         b43legacy_write16(dev, 0x684, 510 + slot_time);
 572         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 573                               slot_time);
 574 }
 575
 576 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 577 {
 578         b43legacy_set_slot_time(dev, 9);
 579         dev->short_slot = 1;
 580 }
 581
 582 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 583 {
 584         b43legacy_set_slot_time(dev, 20);
 585         dev->short_slot = 0;
 586 }
 587
 588 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
 589  * Returns the _previously_ enabled IRQ mask.
 590  */
 591 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
 592                                              u32 mask)
 593 {
 594         u32 old_mask;
 595
 596         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 597         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
 598                           mask);
 599
 600         return old_mask;
 601 }
 602
 603 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
 604  * Returns the _previously_ enabled IRQ mask.
 605  */
 606 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
 607                                               u32 mask)
 608 {
 609         u32 old_mask;
 610
 611         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 612         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
 613
 614         return old_mask;
 615 }
 616
 617 /* Synchronize IRQ top- and bottom-half.
 618  * IRQs must be masked before calling this.
 619  * This must not be called with the irq_lock held.
 620  */
 621 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 622 {
 623         synchronize_irq(dev->dev->irq);
 624         tasklet_kill(&dev->isr_tasklet);
 625 }
 626
 627 /* DummyTransmission function, as documented on
 628  * http://bcm-specs.sipsolutions.net/DummyTransmission
 629  */
 630 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 631 {
 632         struct b43legacy_phy *phy = &dev->phy;
 633         unsigned int i;
 634         unsigned int max_loop;
 635         u16 value;
 636         u32 buffer[5] = {
 637                 0x00000000,
 638                 0x00D40000,
 639                 0x00000000,
 640                 0x01000000,
 641                 0x00000000,
 642         };
 643
 644         switch (phy->type) {
 645         case B43legacy_PHYTYPE_B:
 646         case B43legacy_PHYTYPE_G:
 647                 max_loop = 0xFA;
 648                 buffer[0] = 0x000B846E;
 649                 break;
 650         default:
 651                 B43legacy_BUG_ON(1);
 652                 return;
 653         }
 654
 655         for (i = 0; i < 5; i++)
 656                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 657
 658         /* dummy read follows */
 659         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 660
 661         b43legacy_write16(dev, 0x0568, 0x0000);
 662         b43legacy_write16(dev, 0x07C0, 0x0000);
 663         b43legacy_write16(dev, 0x050C, 0x0000);
 664         b43legacy_write16(dev, 0x0508, 0x0000);
 665         b43legacy_write16(dev, 0x050A, 0x0000);
 666         b43legacy_write16(dev, 0x054C, 0x0000);
 667         b43legacy_write16(dev, 0x056A, 0x0014);
 668         b43legacy_write16(dev, 0x0568, 0x0826);
 669         b43legacy_write16(dev, 0x0500, 0x0000);
 670         b43legacy_write16(dev, 0x0502, 0x0030);
 671
 672         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 673                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 674         for (i = 0x00; i < max_loop; i++) {
 675                 value = b43legacy_read16(dev, 0x050E);
 676                 if (value & 0x0080)
 677                         break;
 678                 udelay(10);
 679         }
 680         for (i = 0x00; i < 0x0A; i++) {
 681                 value = b43legacy_read16(dev, 0x050E);
 682                 if (value & 0x0400)
 683                         break;
 684                 udelay(10);
 685         }
 686         for (i = 0x00; i < 0x0A; i++) {
 687                 value = b43legacy_read16(dev, 0x0690);
 688                 if (!(value & 0x0100))
 689                         break;
 690                 udelay(10);
 691         }
 692         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 693                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 694 }
 695
 696 /* Turn the Analog ON/OFF */
 697 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 698 {
 699         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 700 }
 701
 702 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 703 {
 704         u32 tmslow;
 705         u32 macctl;
 706
 707         flags |= B43legacy_TMSLOW_PHYCLKEN;
 708         flags |= B43legacy_TMSLOW_PHYRESET;
 709         ssb_device_enable(dev->dev, flags);
 710         msleep(2); /* Wait for the PLL to turn on. */
 711
 712         /* Now take the PHY out of Reset again */
 713         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 714         tmslow |= SSB_TMSLOW_FGC;
 715         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 716         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 717         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 718         msleep(1);
 719         tmslow &= ~SSB_TMSLOW_FGC;
 720         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 721         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 722         msleep(1);
 723
 724         /* Turn Analog ON */
 725         b43legacy_switch_analog(dev, 1);
 726
 727         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 728         macctl &= ~B43legacy_MACCTL_GMODE;
 729         if (flags & B43legacy_TMSLOW_GMODE) {
 730                 macctl |= B43legacy_MACCTL_GMODE;
 731                 dev->phy.gmode = 1;
 732         } else
 733                 dev->phy.gmode = 0;
 734         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 735         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 736 }
 737
 738 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 739 {
 740         u32 v0;
 741         u32 v1;
 742         u16 tmp;
 743         struct b43legacy_txstatus stat;
 744
 745         while (1) {
 746                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 747                 if (!(v0 & 0x00000001))
 748                         break;
 749                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 750
 751                 stat.cookie = (v0 >> 16);
 752                 stat.seq = (v1 & 0x0000FFFF);
 753                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 754                 tmp = (v0 & 0x0000FFFF);
 755                 stat.frame_count = ((tmp & 0xF000) >> 12);
 756                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 757                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 758                 stat.pm_indicated = !!(tmp & 0x0080);
 759                 stat.intermediate = !!(tmp & 0x0040);
 760                 stat.for_ampdu = !!(tmp & 0x0020);
 761                 stat.acked = !!(tmp & 0x0002);
 762
 763                 b43legacy_handle_txstatus(dev, &stat);
 764         }
 765 }
 766
 767 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 768 {
 769         u32 dummy;
 770
 771         if (dev->dev->id.revision < 5)
 772                 return;
 773         /* Read all entries from the microcode TXstatus FIFO
 774          * and throw them away.
 775          */
 776         while (1) {
 777                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 778                 if (!(dummy & 0x00000001))
 779                         break;
 780                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 781         }
 782 }
 783
 784 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 785 {
 786         u32 val = 0;
 787
 788         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 789         val <<= 16;
 790         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 791
 792         return val;
 793 }
 794
 795 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 796 {
 797         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 798                               (jssi & 0x0000FFFF));
 799         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 800                               (jssi & 0xFFFF0000) >> 16);
 801 }
 802
 803 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 804 {
 805         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 806         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 807                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 808                           | B43legacy_MACCMD_BGNOISE);
 809         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 810                             dev->phy.channel);
 811 }
 812
 813 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 814 {
 815         /* Top half of Link Quality calculation. */
 816
 817         if (dev->noisecalc.calculation_running)
 818                 return;
 819         dev->noisecalc.channel_at_start = dev->phy.channel;
 820         dev->noisecalc.calculation_running = 1;
 821         dev->noisecalc.nr_samples = 0;
 822
 823         b43legacy_generate_noise_sample(dev);
 824 }
 825
 826 static void handle_irq_noise(struct b43legacy_wldev *dev)
 827 {
 828         struct b43legacy_phy *phy = &dev->phy;
 829         u16 tmp;
 830         u8 noise[4];
 831         u8 i;
 832         u8 j;
 833         s32 average;
 834
 835         /* Bottom half of Link Quality calculation. */
 836
 837         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 838         if (dev->noisecalc.channel_at_start != phy->channel)
 839                 goto drop_calculation;
 840         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 841         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 842             noise[2] == 0x7F || noise[3] == 0x7F)
 843                 goto generate_new;
 844
 845         /* Get the noise samples. */
 846         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 847         i = dev->noisecalc.nr_samples;
 848         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 849         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 850         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 851         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 852         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 853         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 854         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 855         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 856         dev->noisecalc.nr_samples++;
 857         if (dev->noisecalc.nr_samples == 8) {
 858                 /* Calculate the Link Quality by the noise samples. */
 859                 average = 0;
 860                 for (i = 0; i < 8; i++) {
 861                         for (j = 0; j < 4; j++)
 862                                 average += dev->noisecalc.samples[i][j];
 863                 }
 864                 average /= (8 * 4);
 865                 average *= 125;
 866                 average += 64;
 867                 average /= 128;
 868                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 869                                              0x40C);
 870                 tmp = (tmp / 128) & 0x1F;
 871                 if (tmp >= 8)
 872                         average += 2;
 873                 else
 874                         average -= 25;
 875                 if (tmp == 8)
 876                         average -= 72;
 877                 else
 878                         average -= 48;
 879
 880                 dev->stats.link_noise = average;
 881 drop_calculation:
 882                 dev->noisecalc.calculation_running = 0;
 883                 return;
 884         }
 885 generate_new:
 886         b43legacy_generate_noise_sample(dev);
 887 }
 888
 889 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 890 {
 891         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 892                 /* TODO: PS TBTT */
 893         } else {
 894                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 895                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 896         }
 897         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 898                 dev->dfq_valid = 1;
 899 }
 900
 901 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 902 {
 903         if (dev->dfq_valid) {
 904                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 905                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 906                                   | B43legacy_MACCMD_DFQ_VALID);
 907                 dev->dfq_valid = 0;
 908         }
 909 }
 910
 911 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 912 {
 913         u32 tmp;
 914
 915         /* TODO: AP mode. */
 916
 917         while (1) {
 918                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 919                 if (!(tmp & 0x00000008))
 920                         break;
 921         }
 922         /* 16bit write is odd, but correct. */
 923         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 924 }
 925
 926 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 927                                             const u8 *data, u16 size,
 928                                             u16 ram_offset,
 929                                             u16 shm_size_offset, u8 rate)
 930 {
 931         u32 i;
 932         u32 tmp;
 933         struct b43legacy_plcp_hdr4 plcp;
 934
 935         plcp.data = 0;
 936         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 937         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 938         ram_offset += sizeof(u32);
 939         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 940          * So leave the first two bytes of the next write blank.
 941          */
 942         tmp = (u32)(data[0]) << 16;
 943         tmp |= (u32)(data[1]) << 24;
 944         b43legacy_ram_write(dev, ram_offset, tmp);
 945         ram_offset += sizeof(u32);
 946         for (i = 2; i < size; i += sizeof(u32)) {
 947                 tmp = (u32)(data[i + 0]);
 948                 if (i + 1 < size)
 949                         tmp |= (u32)(data[i + 1]) << 8;
 950                 if (i + 2 < size)
 951                         tmp |= (u32)(data[i + 2]) << 16;
 952                 if (i + 3 < size)
 953                         tmp |= (u32)(data[i + 3]) << 24;
 954                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 955         }
 956         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 957                               size + sizeof(struct b43legacy_plcp_hdr6));
 958 }
 959
 960 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 961                                             u16 ram_offset,
 962                                             u16 shm_size_offset, u8 rate)
 963 {
 964
 965         unsigned int i, len, variable_len;
 966         const struct ieee80211_mgmt *bcn;
 967         const u8 *ie;
 968         bool tim_found = 0;
 969
 970         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 971         len = min((size_t)dev->wl->current_beacon->len,
 972                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 973
 974         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 975                                         shm_size_offset, rate);
 976
 977         /* Find the position of the TIM and the DTIM_period value
 978          * and write them to SHM. */
 979         ie = bcn->u.beacon.variable;
 980         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 981         for (i = 0; i < variable_len - 2; ) {
 982                 uint8_t ie_id, ie_len;
 983
 984                 ie_id = ie[i];
 985                 ie_len = ie[i + 1];
 986                 if (ie_id == 5) {
 987                         u16 tim_position;
 988                         u16 dtim_period;
 989                         /* This is the TIM Information Element */
 990
 991                         /* Check whether the ie_len is in the beacon data range. */
 992                         if (variable_len < ie_len + 2 + i)
 993                                 break;
 994                         /* A valid TIM is at least 4 bytes long. */
 995                         if (ie_len < 4)
 996                                 break;
 997                         tim_found = 1;
 998
 999                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1000                         tim_position += offsetof(struct ieee80211_mgmt,
1001                                                  u.beacon.variable);
1002                         tim_position += i;
1003
1004                         dtim_period = ie[i + 3];
1005
1006                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1007                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1008                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1009                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1010                         break;
1011                 }
1012                 i += ie_len + 2;
1013         }
1014         if (!tim_found) {
1015                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1016                               "beacon template packet. AP or IBSS operation "
1017                               "may be broken.\n");
1018         }
1019 }
1020
1021 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1022                                             u16 shm_offset, u16 size,
1023                                             struct ieee80211_rate *rate)
1024 {
1025         struct b43legacy_plcp_hdr4 plcp;
1026         u32 tmp;
1027         __le16 dur;
1028
1029         plcp.data = 0;
1030         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->bitrate);
1031         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1032                                                dev->wl->vif,
1033                                                size,
1034                                                rate);
1035         /* Write PLCP in two parts and timing for packet transfer */
1036         tmp = le32_to_cpu(plcp.data);
1037         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1038                               tmp & 0xFFFF);
1039         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1040                               tmp >> 16);
1041         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1042                               le16_to_cpu(dur));
1043 }
1044
1045 /* Instead of using custom probe response template, this function
1046  * just patches custom beacon template by:
1047  * 1) Changing packet type
1048  * 2) Patching duration field
1049  * 3) Stripping TIM
1050  */
1051 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1052                                                u16 *dest_size,
1053                                                struct ieee80211_rate *rate)
1054 {
1055         const u8 *src_data;
1056         u8 *dest_data;
1057         u16 src_size, elem_size, src_pos, dest_pos;
1058         __le16 dur;
1059         struct ieee80211_hdr *hdr;
1060         size_t ie_start;
1061
1062         src_size = dev->wl->current_beacon->len;
1063         src_data = (const u8 *)dev->wl->current_beacon->data;
1064
1065         /* Get the start offset of the variable IEs in the packet. */
1066         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1067         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1068                                                u.beacon.variable));
1069
1070         if (B43legacy_WARN_ON(src_size < ie_start))
1071                 return NULL;
1072
1073         dest_data = kmalloc(src_size, GFP_ATOMIC);
1074         if (unlikely(!dest_data))
1075                 return NULL;
1076
1077         /* Copy the static data and all Information Elements, except the TIM. */
1078         memcpy(dest_data, src_data, ie_start);
1079         src_pos = ie_start;
1080         dest_pos = ie_start;
1081         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1082                 elem_size = src_data[src_pos + 1] + 2;
1083                 if (src_data[src_pos] == 5) {
1084                         /* This is the TIM. */
1085                         continue;
1086                 }
1087                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1088                 dest_pos += elem_size;
1089         }
1090         *dest_size = dest_pos;
1091         hdr = (struct ieee80211_hdr *)dest_data;
1092
1093         /* Set the frame control. */
1094         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1095                                          IEEE80211_STYPE_PROBE_RESP);
1096         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1097                                                dev->wl->vif,
1098                                                *dest_size,
1099                                                rate);
1100         hdr->duration_id = dur;
1101
1102         return dest_data;
1103 }
1104
1105 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1106                                                 u16 ram_offset,
1107                                                 u16 shm_size_offset,
1108                                                 struct ieee80211_rate *rate)
1109 {
1110         const u8 *probe_resp_data;
1111         u16 size;
1112
1113         size = dev->wl->current_beacon->len;
1114         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1115         if (unlikely(!probe_resp_data))
1116                 return;
1117
1118         /* Looks like PLCP headers plus packet timings are stored for
1119          * all possible basic rates
1120          */
1121         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1122                                         &b43legacy_b_ratetable[0]);
1123         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1124                                         &b43legacy_b_ratetable[1]);
1125         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1126                                         &b43legacy_b_ratetable[2]);
1127         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1128                                         &b43legacy_b_ratetable[3]);
1129
1130         size = min((size_t)size,
1131                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1132         b43legacy_write_template_common(dev, probe_resp_data,
1133                                         size, ram_offset,
1134                                         shm_size_offset, rate->bitrate);
1135         kfree(probe_resp_data);
1136 }
1137
1138 /* Asynchronously update the packet templates in template RAM.
1139  * Locking: Requires wl->irq_lock to be locked. */
1140 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1141 {
1142         struct sk_buff *beacon;
1143         /* This is the top half of the ansynchronous beacon update. The bottom
1144          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1145          * sending an invalid beacon. This can happen for example, if the
1146          * firmware transmits a beacon while we are updating it. */
1147
1148         /* We could modify the existing beacon and set the aid bit in the TIM
1149          * field, but that would probably require resizing and moving of data
1150          * within the beacon template. Simply request a new beacon and let
1151          * mac80211 do the hard work. */
1152         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1153         if (unlikely(!beacon))
1154                 return;
1155
1156         if (wl->current_beacon)
1157                 dev_kfree_skb_any(wl->current_beacon);
1158         wl->current_beacon = beacon;
1159         wl->beacon0_uploaded = 0;
1160         wl->beacon1_uploaded = 0;
1161 }
1162
1163 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1164                                const u8 *ssid, u8 ssid_len)
1165 {
1166         u32 tmp;
1167         u16 i;
1168         u16 len;
1169
1170         len = min((u16)ssid_len, (u16)0x100);
1171         for (i = 0; i < len; i += sizeof(u32)) {
1172                 tmp = (u32)(ssid[i + 0]);
1173                 if (i + 1 < len)
1174                         tmp |= (u32)(ssid[i + 1]) << 8;
1175                 if (i + 2 < len)
1176                         tmp |= (u32)(ssid[i + 2]) << 16;
1177                 if (i + 3 < len)
1178                         tmp |= (u32)(ssid[i + 3]) << 24;
1179                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1180                                       0x380 + i, tmp);
1181         }
1182         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1183                               0x48, len);
1184 }
1185
1186 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1187                                      u16 beacon_int)
1188 {
1189         b43legacy_time_lock(dev);
1190         if (dev->dev->id.revision >= 3)
1191                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1192         else {
1193                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1194                 b43legacy_write16(dev, 0x610, beacon_int);
1195         }
1196         b43legacy_time_unlock(dev);
1197 }
1198
1199 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1200 {
1201         struct b43legacy_wl *wl = dev->wl;
1202         u32 cmd;
1203
1204         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1205                 return;
1206
1207         /* This is the bottom half of the asynchronous beacon update. */
1208
1209         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1210         if (!(cmd & B43legacy_MACCMD_BEACON0_VALID)) {
1211                 if (!wl->beacon0_uploaded) {
1212                         b43legacy_write_beacon_template(dev, 0x68,
1213                                                         B43legacy_SHM_SH_BTL0,
1214                                                         B43legacy_CCK_RATE_1MB);
1215                         b43legacy_write_probe_resp_template(dev, 0x268,
1216                                                             B43legacy_SHM_SH_PRTLEN,
1217                                                             &__b43legacy_ratetable[3]);
1218                         wl->beacon0_uploaded = 1;
1219                 }
1220                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1221         }
1222         if (!(cmd & B43legacy_MACCMD_BEACON1_VALID)) {
1223                 if (!wl->beacon1_uploaded) {
1224                         b43legacy_write_beacon_template(dev, 0x468,
1225                                                         B43legacy_SHM_SH_BTL1,
1226                                                         B43legacy_CCK_RATE_1MB);
1227                         wl->beacon1_uploaded = 1;
1228                 }
1229                 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1230         }
1231         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1232 }
1233
1234 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1235 {
1236 }
1237
1238 /* Interrupt handler bottom-half */
1239 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1240 {
1241         u32 reason;
1242         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1243         u32 merged_dma_reason = 0;
1244         int i;
1245         unsigned long flags;
1246
1247         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1248
1249         B43legacy_WARN_ON(b43legacy_status(dev) <
1250                           B43legacy_STAT_INITIALIZED);
1251
1252         reason = dev->irq_reason;
1253         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1254                 dma_reason[i] = dev->dma_reason[i];
1255                 merged_dma_reason |= dma_reason[i];
1256         }
1257
1258         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1259                 b43legacyerr(dev->wl, "MAC transmission error\n");
1260
1261         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1262                 b43legacyerr(dev->wl, "PHY transmission error\n");
1263                 rmb();
1264                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1265                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1266                                               "restarting the controller\n");
1267                         b43legacy_controller_restart(dev, "PHY TX errors");
1268                 }
1269         }
1270
1271         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1272                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1273                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1274                         b43legacyerr(dev->wl, "Fatal DMA error: "
1275                                "0x%08X, 0x%08X, 0x%08X, "
1276                                "0x%08X, 0x%08X, 0x%08X\n",
1277                                dma_reason[0], dma_reason[1],
1278                                dma_reason[2], dma_reason[3],
1279                                dma_reason[4], dma_reason[5]);
1280                         b43legacy_controller_restart(dev, "DMA error");
1281                         mmiowb();
1282                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1283                         return;
1284                 }
1285                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1286                         b43legacyerr(dev->wl, "DMA error: "
1287                                "0x%08X, 0x%08X, 0x%08X, "
1288                                "0x%08X, 0x%08X, 0x%08X\n",
1289                                dma_reason[0], dma_reason[1],
1290                                dma_reason[2], dma_reason[3],
1291                                dma_reason[4], dma_reason[5]);
1292         }
1293
1294         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1295                 handle_irq_ucode_debug(dev);
1296         if (reason & B43legacy_IRQ_TBTT_INDI)
1297                 handle_irq_tbtt_indication(dev);
1298         if (reason & B43legacy_IRQ_ATIM_END)
1299                 handle_irq_atim_end(dev);
1300         if (reason & B43legacy_IRQ_BEACON)
1301                 handle_irq_beacon(dev);
1302         if (reason & B43legacy_IRQ_PMQ)
1303                 handle_irq_pmq(dev);
1304         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1305                 ;/*TODO*/
1306         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1307                 handle_irq_noise(dev);
1308
1309         /* Check the DMA reason registers for received data. */
1310         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1311                 if (b43legacy_using_pio(dev))
1312                         b43legacy_pio_rx(dev->pio.queue0);
1313                 else
1314                         b43legacy_dma_rx(dev->dma.rx_ring0);
1315         }
1316         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1317         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1318         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1319                 if (b43legacy_using_pio(dev))
1320                         b43legacy_pio_rx(dev->pio.queue3);
1321                 else
1322                         b43legacy_dma_rx(dev->dma.rx_ring3);
1323         }
1324         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1325         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1326
1327         if (reason & B43legacy_IRQ_TX_OK)
1328                 handle_irq_transmit_status(dev);
1329
1330         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1331         mmiowb();
1332         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1333 }
1334
1335 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1336                                u16 base, int queueidx)
1337 {
1338         u16 rxctl;
1339
1340         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1341         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1342                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1343         else
1344                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1345 }
1346
1347 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1348 {
1349         if (b43legacy_using_pio(dev) &&
1350             (dev->dev->id.revision < 3) &&
1351             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1352                 /* Apply a PIO specific workaround to the dma_reasons */
1353                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1354                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1355                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1356                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1357         }
1358
1359         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1360
1361         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1362                           dev->dma_reason[0]);
1363         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1364                           dev->dma_reason[1]);
1365         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1366                           dev->dma_reason[2]);
1367         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1368                           dev->dma_reason[3]);
1369         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1370                           dev->dma_reason[4]);
1371         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1372                           dev->dma_reason[5]);
1373 }
1374
1375 /* Interrupt handler top-half */
1376 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1377 {
1378         irqreturn_t ret = IRQ_NONE;
1379         struct b43legacy_wldev *dev = dev_id;
1380         u32 reason;
1381
1382         if (!dev)
1383                 return IRQ_NONE;
1384
1385         spin_lock(&dev->wl->irq_lock);
1386
1387         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1388                 goto out;
1389         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1390         if (reason == 0xffffffff) /* shared IRQ */
1391                 goto out;
1392         ret = IRQ_HANDLED;
1393         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1394         if (!reason)
1395                 goto out;
1396
1397         dev->dma_reason[0] = b43legacy_read32(dev,
1398                                               B43legacy_MMIO_DMA0_REASON)
1399                                               & 0x0001DC00;
1400         dev->dma_reason[1] = b43legacy_read32(dev,
1401                                               B43legacy_MMIO_DMA1_REASON)
1402                                               & 0x0000DC00;
1403         dev->dma_reason[2] = b43legacy_read32(dev,
1404                                               B43legacy_MMIO_DMA2_REASON)
1405                                               & 0x0000DC00;
1406         dev->dma_reason[3] = b43legacy_read32(dev,
1407                                               B43legacy_MMIO_DMA3_REASON)
1408                                               & 0x0001DC00;
1409         dev->dma_reason[4] = b43legacy_read32(dev,
1410                                               B43legacy_MMIO_DMA4_REASON)
1411                                               & 0x0000DC00;
1412         dev->dma_reason[5] = b43legacy_read32(dev,
1413                                               B43legacy_MMIO_DMA5_REASON)
1414                                               & 0x0000DC00;
1415
1416         b43legacy_interrupt_ack(dev, reason);
1417         /* disable all IRQs. They are enabled again in the bottom half. */
1418         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1419                                                           B43legacy_IRQ_ALL);
1420         /* save the reason code and call our bottom half. */
1421         dev->irq_reason = reason;
1422         tasklet_schedule(&dev->isr_tasklet);
1423 out:
1424         mmiowb();
1425         spin_unlock(&dev->wl->irq_lock);
1426
1427         return ret;
1428 }
1429
1430 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1431 {
1432         release_firmware(dev->fw.ucode);
1433         dev->fw.ucode = NULL;
1434         release_firmware(dev->fw.pcm);
1435         dev->fw.pcm = NULL;
1436         release_firmware(dev->fw.initvals);
1437         dev->fw.initvals = NULL;
1438         release_firmware(dev->fw.initvals_band);
1439         dev->fw.initvals_band = NULL;
1440 }
1441
1442 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1443 {
1444         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1445                      "Drivers/b43#devicefirmware "
1446                      "and download the correct firmware (version 3).\n");
1447 }
1448
1449 static int do_request_fw(struct b43legacy_wldev *dev,
1450                          const char *name,
1451                          const struct firmware **fw)
1452 {
1453         char path[sizeof(modparam_fwpostfix) + 32];
1454         struct b43legacy_fw_header *hdr;
1455         u32 size;
1456         int err;
1457
1458         if (!name)
1459                 return 0;
1460
1461         snprintf(path, ARRAY_SIZE(path),
1462                  "b43legacy%s/%s.fw",
1463                  modparam_fwpostfix, name);
1464         err = request_firmware(fw, path, dev->dev->dev);
1465         if (err) {
1466                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1467                        "or load failed.\n", path);
1468                 return err;
1469         }
1470         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1471                 goto err_format;
1472         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1473         switch (hdr->type) {
1474         case B43legacy_FW_TYPE_UCODE:
1475         case B43legacy_FW_TYPE_PCM:
1476                 size = be32_to_cpu(hdr->size);
1477                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1478                         goto err_format;
1479                 /* fallthrough */
1480         case B43legacy_FW_TYPE_IV:
1481                 if (hdr->ver != 1)
1482                         goto err_format;
1483                 break;
1484         default:
1485                 goto err_format;
1486         }
1487
1488         return err;
1489
1490 err_format:
1491         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1492         return -EPROTO;
1493 }
1494
1495 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1496 {
1497         struct b43legacy_firmware *fw = &dev->fw;
1498         const u8 rev = dev->dev->id.revision;
1499         const char *filename;
1500         u32 tmshigh;
1501         int err;
1502
1503         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1504         if (!fw->ucode) {
1505                 if (rev == 2)
1506                         filename = "ucode2";
1507                 else if (rev == 4)
1508                         filename = "ucode4";
1509                 else
1510                         filename = "ucode5";
1511                 err = do_request_fw(dev, filename, &fw->ucode);
1512                 if (err)
1513                         goto err_load;
1514         }
1515         if (!fw->pcm) {
1516                 if (rev < 5)
1517                         filename = "pcm4";
1518                 else
1519                         filename = "pcm5";
1520                 err = do_request_fw(dev, filename, &fw->pcm);
1521                 if (err)
1522                         goto err_load;
1523         }
1524         if (!fw->initvals) {
1525                 switch (dev->phy.type) {
1526                 case B43legacy_PHYTYPE_B:
1527                 case B43legacy_PHYTYPE_G:
1528                         if ((rev >= 5) && (rev <= 10))
1529                                 filename = "b0g0initvals5";
1530                         else if (rev == 2 || rev == 4)
1531                                 filename = "b0g0initvals2";
1532                         else
1533                                 goto err_no_initvals;
1534                         break;
1535                 default:
1536                         goto err_no_initvals;
1537                 }
1538                 err = do_request_fw(dev, filename, &fw->initvals);
1539                 if (err)
1540                         goto err_load;
1541         }
1542         if (!fw->initvals_band) {
1543                 switch (dev->phy.type) {
1544                 case B43legacy_PHYTYPE_B:
1545                 case B43legacy_PHYTYPE_G:
1546                         if ((rev >= 5) && (rev <= 10))
1547                                 filename = "b0g0bsinitvals5";
1548                         else if (rev >= 11)
1549                                 filename = NULL;
1550                         else if (rev == 2 || rev == 4)
1551                                 filename = NULL;
1552                         else
1553                                 goto err_no_initvals;
1554                         break;
1555                 default:
1556                         goto err_no_initvals;
1557                 }
1558                 err = do_request_fw(dev, filename, &fw->initvals_band);
1559                 if (err)
1560                         goto err_load;
1561         }
1562
1563         return 0;
1564
1565 err_load:
1566         b43legacy_print_fw_helptext(dev->wl);
1567         goto error;
1568
1569 err_no_initvals:
1570         err = -ENODEV;
1571         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1572                "core rev %u\n", dev->phy.type, rev);
1573         goto error;
1574
1575 error:
1576         b43legacy_release_firmware(dev);
1577         return err;
1578 }
1579
1580 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1581 {
1582         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1583         const __be32 *data;
1584         unsigned int i;
1585         unsigned int len;
1586         u16 fwrev;
1587         u16 fwpatch;
1588         u16 fwdate;
1589         u16 fwtime;
1590         u32 tmp, macctl;
1591         int err = 0;
1592
1593         /* Jump the microcode PSM to offset 0 */
1594         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1595         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1596         macctl |= B43legacy_MACCTL_PSM_JMP0;
1597         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1598         /* Zero out all microcode PSM registers and shared memory. */
1599         for (i = 0; i < 64; i++)
1600                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1601         for (i = 0; i < 4096; i += 2)
1602                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1603
1604         /* Upload Microcode. */
1605         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1606         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1607         b43legacy_shm_control_word(dev,
1608                                    B43legacy_SHM_UCODE |
1609                                    B43legacy_SHM_AUTOINC_W,
1610                                    0x0000);
1611         for (i = 0; i < len; i++) {
1612                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1613                                     be32_to_cpu(data[i]));
1614                 udelay(10);
1615         }
1616
1617         if (dev->fw.pcm) {
1618                 /* Upload PCM data. */
1619                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1620                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1621                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1622                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1623                 /* No need for autoinc bit in SHM_HW */
1624                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1625                 for (i = 0; i < len; i++) {
1626                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1627                                           be32_to_cpu(data[i]));
1628                         udelay(10);
1629                 }
1630         }
1631
1632         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1633                           B43legacy_IRQ_ALL);
1634
1635         /* Start the microcode PSM */
1636         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1637         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1638         macctl |= B43legacy_MACCTL_PSM_RUN;
1639         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1640
1641         /* Wait for the microcode to load and respond */
1642         i = 0;
1643         while (1) {
1644                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1645                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1646                         break;
1647                 i++;
1648                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1649                         b43legacyerr(dev->wl, "Microcode not responding\n");
1650                         b43legacy_print_fw_helptext(dev->wl);
1651                         err = -ENODEV;
1652                         goto error;
1653                 }
1654                 msleep_interruptible(50);
1655                 if (signal_pending(current)) {
1656                         err = -EINTR;
1657                         goto error;
1658                 }
1659         }
1660         /* dummy read follows */
1661         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1662
1663         /* Get and check the revisions. */
1664         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1665                                      B43legacy_SHM_SH_UCODEREV);
1666         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1667                                        B43legacy_SHM_SH_UCODEPATCH);
1668         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1669                                       B43legacy_SHM_SH_UCODEDATE);
1670         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1671                                       B43legacy_SHM_SH_UCODETIME);
1672
1673         if (fwrev > 0x128) {
1674                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1675                              " Only firmware from binary drivers version 3.x"
1676                              " is supported. You must change your firmware"
1677                              " files.\n");
1678                 b43legacy_print_fw_helptext(dev->wl);
1679                 err = -EOPNOTSUPP;
1680                 goto error;
1681         }
1682         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1683                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1684                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1685                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1686                       fwtime & 0x1F);
1687
1688         dev->fw.rev = fwrev;
1689         dev->fw.patch = fwpatch;
1690
1691         return 0;
1692
1693 error:
1694         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1695         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1696         macctl |= B43legacy_MACCTL_PSM_JMP0;
1697         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1698
1699         return err;
1700 }
1701
1702 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1703                                     const struct b43legacy_iv *ivals,
1704                                     size_t count,
1705                                     size_t array_size)
1706 {
1707         const struct b43legacy_iv *iv;
1708         u16 offset;
1709         size_t i;
1710         bool bit32;
1711
1712         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1713         iv = ivals;
1714         for (i = 0; i < count; i++) {
1715                 if (array_size < sizeof(iv->offset_size))
1716                         goto err_format;
1717                 array_size -= sizeof(iv->offset_size);
1718                 offset = be16_to_cpu(iv->offset_size);
1719                 bit32 = !!(offset & B43legacy_IV_32BIT);
1720                 offset &= B43legacy_IV_OFFSET_MASK;
1721                 if (offset >= 0x1000)
1722                         goto err_format;
1723                 if (bit32) {
1724                         u32 value;
1725
1726                         if (array_size < sizeof(iv->data.d32))
1727                                 goto err_format;
1728                         array_size -= sizeof(iv->data.d32);
1729
1730                         value = get_unaligned_be32(&iv->data.d32);
1731                         b43legacy_write32(dev, offset, value);
1732
1733                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1734                                                         sizeof(__be16) +
1735                                                         sizeof(__be32));
1736                 } else {
1737                         u16 value;
1738
1739                         if (array_size < sizeof(iv->data.d16))
1740                                 goto err_format;
1741                         array_size -= sizeof(iv->data.d16);
1742
1743                         value = be16_to_cpu(iv->data.d16);
1744                         b43legacy_write16(dev, offset, value);
1745
1746                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1747                                                         sizeof(__be16) +
1748                                                         sizeof(__be16));
1749                 }
1750         }
1751         if (array_size)
1752                 goto err_format;
1753
1754         return 0;
1755
1756 err_format:
1757         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1758         b43legacy_print_fw_helptext(dev->wl);
1759
1760         return -EPROTO;
1761 }
1762
1763 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1764 {
1765         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1766         const struct b43legacy_fw_header *hdr;
1767         struct b43legacy_firmware *fw = &dev->fw;
1768         const struct b43legacy_iv *ivals;
1769         size_t count;
1770         int err;
1771
1772         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1773         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1774         count = be32_to_cpu(hdr->size);
1775         err = b43legacy_write_initvals(dev, ivals, count,
1776                                  fw->initvals->size - hdr_len);
1777         if (err)
1778                 goto out;
1779         if (fw->initvals_band) {
1780                 hdr = (const struct b43legacy_fw_header *)
1781                       (fw->initvals_band->data);
1782                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1783                         + hdr_len);
1784                 count = be32_to_cpu(hdr->size);
1785                 err = b43legacy_write_initvals(dev, ivals, count,
1786                                          fw->initvals_band->size - hdr_len);
1787                 if (err)
1788                         goto out;
1789         }
1790 out:
1791
1792         return err;
1793 }
1794
1795 /* Initialize the GPIOs
1796  * http://bcm-specs.sipsolutions.net/GPIO
1797  */
1798 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1799 {
1800         struct ssb_bus *bus = dev->dev->bus;
1801         struct ssb_device *gpiodev, *pcidev = NULL;
1802         u32 mask;
1803         u32 set;
1804
1805         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1806                           b43legacy_read32(dev,
1807                           B43legacy_MMIO_MACCTL)
1808                           & 0xFFFF3FFF);
1809
1810         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1811                           b43legacy_read16(dev,
1812                           B43legacy_MMIO_GPIO_MASK)
1813                           | 0x000F);
1814
1815         mask = 0x0000001F;
1816         set = 0x0000000F;
1817         if (dev->dev->bus->chip_id == 0x4301) {
1818                 mask |= 0x0060;
1819                 set |= 0x0060;
1820         }
1821         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1822                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1823                                   b43legacy_read16(dev,
1824                                   B43legacy_MMIO_GPIO_MASK)
1825                                   | 0x0200);
1826                 mask |= 0x0200;
1827                 set |= 0x0200;
1828         }
1829         if (dev->dev->id.revision >= 2)
1830                 mask  |= 0x0010; /* FIXME: This is redundant. */
1831
1832 #ifdef CONFIG_SSB_DRIVER_PCICORE
1833         pcidev = bus->pcicore.dev;
1834 #endif
1835         gpiodev = bus->chipco.dev ? : pcidev;
1836         if (!gpiodev)
1837                 return 0;
1838         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1839                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1840                      & mask) | set);
1841
1842         return 0;
1843 }
1844
1845 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1846 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1847 {
1848         struct ssb_bus *bus = dev->dev->bus;
1849         struct ssb_device *gpiodev, *pcidev = NULL;
1850
1851 #ifdef CONFIG_SSB_DRIVER_PCICORE
1852         pcidev = bus->pcicore.dev;
1853 #endif
1854         gpiodev = bus->chipco.dev ? : pcidev;
1855         if (!gpiodev)
1856                 return;
1857         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1858 }
1859
1860 /* http://bcm-specs.sipsolutions.net/EnableMac */
1861 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1862 {
1863         dev->mac_suspended--;
1864         B43legacy_WARN_ON(dev->mac_suspended < 0);
1865         B43legacy_WARN_ON(irqs_disabled());
1866         if (dev->mac_suspended == 0) {
1867                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1868                                   b43legacy_read32(dev,
1869                                   B43legacy_MMIO_MACCTL)
1870                                   | B43legacy_MACCTL_ENABLED);
1871                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1872                                   B43legacy_IRQ_MAC_SUSPENDED);
1873                 /* the next two are dummy reads */
1874                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1875                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1876                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1877
1878                 /* Re-enable IRQs. */
1879                 spin_lock_irq(&dev->wl->irq_lock);
1880                 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1881                 spin_unlock_irq(&dev->wl->irq_lock);
1882         }
1883 }
1884
1885 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1886 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1887 {
1888         int i;
1889         u32 tmp;
1890
1891         might_sleep();
1892         B43legacy_WARN_ON(irqs_disabled());
1893         B43legacy_WARN_ON(dev->mac_suspended < 0);
1894
1895         if (dev->mac_suspended == 0) {
1896                 /* Mask IRQs before suspending MAC. Otherwise
1897                  * the MAC stays busy and won't suspend. */
1898                 spin_lock_irq(&dev->wl->irq_lock);
1899                 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1900                 spin_unlock_irq(&dev->wl->irq_lock);
1901                 b43legacy_synchronize_irq(dev);
1902                 dev->irq_savedstate = tmp;
1903
1904                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1905                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1906                                   b43legacy_read32(dev,
1907                                   B43legacy_MMIO_MACCTL)
1908                                   & ~B43legacy_MACCTL_ENABLED);
1909                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1910                 for (i = 40; i; i--) {
1911                         tmp = b43legacy_read32(dev,
1912                                                B43legacy_MMIO_GEN_IRQ_REASON);
1913                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1914                                 goto out;
1915                         msleep(1);
1916                 }
1917                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1918         }
1919 out:
1920         dev->mac_suspended++;
1921 }
1922
1923 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1924 {
1925         struct b43legacy_wl *wl = dev->wl;
1926         u32 ctl;
1927         u16 cfp_pretbtt;
1928
1929         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1930         /* Reset status to STA infrastructure mode. */
1931         ctl &= ~B43legacy_MACCTL_AP;
1932         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1933         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1934         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1935         ctl &= ~B43legacy_MACCTL_PROMISC;
1936         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1937         ctl |= B43legacy_MACCTL_INFRA;
1938
1939         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1940                 ctl |= B43legacy_MACCTL_AP;
1941         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
1942                 ctl &= ~B43legacy_MACCTL_INFRA;
1943
1944         if (wl->filter_flags & FIF_CONTROL)
1945                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1946         if (wl->filter_flags & FIF_FCSFAIL)
1947                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1948         if (wl->filter_flags & FIF_PLCPFAIL)
1949                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1950         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1951                 ctl |= B43legacy_MACCTL_PROMISC;
1952         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1953                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1954
1955         /* Workaround: On old hardware the HW-MAC-address-filter
1956          * doesn't work properly, so always run promisc in filter
1957          * it in software. */
1958         if (dev->dev->id.revision <= 4)
1959                 ctl |= B43legacy_MACCTL_PROMISC;
1960
1961         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1962
1963         cfp_pretbtt = 2;
1964         if ((ctl & B43legacy_MACCTL_INFRA) &&
1965             !(ctl & B43legacy_MACCTL_AP)) {
1966                 if (dev->dev->bus->chip_id == 0x4306 &&
1967                     dev->dev->bus->chip_rev == 3)
1968                         cfp_pretbtt = 100;
1969                 else
1970                         cfp_pretbtt = 50;
1971         }
1972         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1973 }
1974
1975 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1976                                         u16 rate,
1977                                         int is_ofdm)
1978 {
1979         u16 offset;
1980
1981         if (is_ofdm) {
1982                 offset = 0x480;
1983                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1984         } else {
1985                 offset = 0x4C0;
1986                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1987         }
1988         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1989                               b43legacy_shm_read16(dev,
1990                               B43legacy_SHM_SHARED, offset));
1991 }
1992
1993 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1994 {
1995         switch (dev->phy.type) {
1996         case B43legacy_PHYTYPE_G:
1997                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1998                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1999                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2000                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2001                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2002                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2003                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2004                 /* fallthrough */
2005         case B43legacy_PHYTYPE_B:
2006                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2007                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2008                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2009                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2010                 break;
2011         default:
2012                 B43legacy_BUG_ON(1);
2013         }
2014 }
2015
2016 /* Set the TX-Antenna for management frames sent by firmware. */
2017 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2018                                           int antenna)
2019 {
2020         u16 ant = 0;
2021         u16 tmp;
2022
2023         switch (antenna) {
2024         case B43legacy_ANTENNA0:
2025                 ant |= B43legacy_TX4_PHY_ANT0;
2026                 break;
2027         case B43legacy_ANTENNA1:
2028                 ant |= B43legacy_TX4_PHY_ANT1;
2029                 break;
2030         case B43legacy_ANTENNA_AUTO:
2031                 ant |= B43legacy_TX4_PHY_ANTLAST;
2032                 break;
2033         default:
2034                 B43legacy_BUG_ON(1);
2035         }
2036
2037         /* FIXME We also need to set the other flags of the PHY control
2038          * field somewhere. */
2039
2040         /* For Beacons */
2041         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2042                                    B43legacy_SHM_SH_BEACPHYCTL);
2043         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2044         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2045                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2046         /* For ACK/CTS */
2047         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2048                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2049         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2050         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2051                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2052         /* For Probe Resposes */
2053         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2054                                    B43legacy_SHM_SH_PRPHYCTL);
2055         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2056         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2057                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2058 }
2059
2060 /* This is the opposite of b43legacy_chip_init() */
2061 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2062 {
2063         b43legacy_radio_turn_off(dev, 1);
2064         b43legacy_gpio_cleanup(dev);
2065         /* firmware is released later */
2066 }
2067
2068 /* Initialize the chip
2069  * http://bcm-specs.sipsolutions.net/ChipInit
2070  */
2071 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2072 {
2073         struct b43legacy_phy *phy = &dev->phy;
2074         int err;
2075         int tmp;
2076         u32 value32, macctl;
2077         u16 value16;
2078
2079         /* Initialize the MAC control */
2080         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2081         if (dev->phy.gmode)
2082                 macctl |= B43legacy_MACCTL_GMODE;
2083         macctl |= B43legacy_MACCTL_INFRA;
2084         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2085
2086         err = b43legacy_request_firmware(dev);
2087         if (err)
2088                 goto out;
2089         err = b43legacy_upload_microcode(dev);
2090         if (err)
2091                 goto out; /* firmware is released later */
2092
2093         err = b43legacy_gpio_init(dev);
2094         if (err)
2095                 goto out; /* firmware is released later */
2096
2097         err = b43legacy_upload_initvals(dev);
2098         if (err)
2099                 goto err_gpio_clean;
2100         b43legacy_radio_turn_on(dev);
2101
2102         b43legacy_write16(dev, 0x03E6, 0x0000);
2103         err = b43legacy_phy_init(dev);
2104         if (err)
2105                 goto err_radio_off;
2106
2107         /* Select initial Interference Mitigation. */
2108         tmp = phy->interfmode;
2109         phy->interfmode = B43legacy_INTERFMODE_NONE;
2110         b43legacy_radio_set_interference_mitigation(dev, tmp);
2111
2112         b43legacy_phy_set_antenna_diversity(dev);
2113         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2114
2115         if (phy->type == B43legacy_PHYTYPE_B) {
2116                 value16 = b43legacy_read16(dev, 0x005E);
2117                 value16 |= 0x0004;
2118                 b43legacy_write16(dev, 0x005E, value16);
2119         }
2120         b43legacy_write32(dev, 0x0100, 0x01000000);
2121         if (dev->dev->id.revision < 5)
2122                 b43legacy_write32(dev, 0x010C, 0x01000000);
2123
2124         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2125         value32 &= ~B43legacy_MACCTL_INFRA;
2126         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2127         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2128         value32 |= B43legacy_MACCTL_INFRA;
2129         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2130
2131         if (b43legacy_using_pio(dev)) {
2132                 b43legacy_write32(dev, 0x0210, 0x00000100);
2133                 b43legacy_write32(dev, 0x0230, 0x00000100);
2134                 b43legacy_write32(dev, 0x0250, 0x00000100);
2135                 b43legacy_write32(dev, 0x0270, 0x00000100);
2136                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2137                                       0x0000);
2138         }
2139
2140         /* Probe Response Timeout value */
2141         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2142         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2143
2144         /* Initially set the wireless operation mode. */
2145         b43legacy_adjust_opmode(dev);
2146
2147         if (dev->dev->id.revision < 3) {
2148                 b43legacy_write16(dev, 0x060E, 0x0000);
2149                 b43legacy_write16(dev, 0x0610, 0x8000);
2150                 b43legacy_write16(dev, 0x0604, 0x0000);
2151                 b43legacy_write16(dev, 0x0606, 0x0200);
2152         } else {
2153                 b43legacy_write32(dev, 0x0188, 0x80000000);
2154                 b43legacy_write32(dev, 0x018C, 0x02000000);
2155         }
2156         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2157         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2158         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2159         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2160         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2161         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2162         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2163
2164         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2165         value32 |= 0x00100000;
2166         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2167
2168         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2169                           dev->dev->bus->chipco.fast_pwrup_delay);
2170
2171         /* PHY TX errors counter. */
2172         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2173
2174         B43legacy_WARN_ON(err != 0);
2175         b43legacydbg(dev->wl, "Chip initialized\n");
2176 out:
2177         return err;
2178
2179 err_radio_off:
2180         b43legacy_radio_turn_off(dev, 1);
2181 err_gpio_clean:
2182         b43legacy_gpio_cleanup(dev);
2183         goto out;
2184 }
2185
2186 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2187 {
2188         struct b43legacy_phy *phy = &dev->phy;
2189
2190         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2191                 return;
2192
2193         b43legacy_mac_suspend(dev);
2194         b43legacy_phy_lo_g_measure(dev);
2195         b43legacy_mac_enable(dev);
2196 }
2197
2198 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2199 {
2200         b43legacy_phy_lo_mark_all_unused(dev);
2201         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2202                 b43legacy_mac_suspend(dev);
2203                 b43legacy_calc_nrssi_slope(dev);
2204                 b43legacy_mac_enable(dev);
2205         }
2206 }
2207
2208 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2209 {
2210         /* Update device statistics. */
2211         b43legacy_calculate_link_quality(dev);
2212 }
2213
2214 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2215 {
2216         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2217
2218         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2219         wmb();
2220 }
2221
2222 static void do_periodic_work(struct b43legacy_wldev *dev)
2223 {
2224         unsigned int state;
2225
2226         state = dev->periodic_state;
2227         if (state % 8 == 0)
2228                 b43legacy_periodic_every120sec(dev);
2229         if (state % 4 == 0)
2230                 b43legacy_periodic_every60sec(dev);
2231         if (state % 2 == 0)
2232                 b43legacy_periodic_every30sec(dev);
2233         b43legacy_periodic_every15sec(dev);
2234 }
2235
2236 /* Periodic work locking policy:
2237  *      The whole periodic work handler is protected by
2238  *      wl->mutex. If another lock is needed somewhere in the
2239  *      pwork callchain, it's aquired in-place, where it's needed.
2240  */
2241 static void b43legacy_periodic_work_handler(struct work_struct *work)
2242 {
2243         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2244                                              periodic_work.work);
2245         struct b43legacy_wl *wl = dev->wl;
2246         unsigned long delay;
2247
2248         mutex_lock(&wl->mutex);
2249
2250         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2251                 goto out;
2252         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2253                 goto out_requeue;
2254
2255         do_periodic_work(dev);
2256
2257         dev->periodic_state++;
2258 out_requeue:
2259         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2260                 delay = msecs_to_jiffies(50);
2261         else
2262                 delay = round_jiffies_relative(HZ * 15);
2263         queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2264 out:
2265         mutex_unlock(&wl->mutex);
2266 }
2267
2268 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2269 {
2270         struct delayed_work *work = &dev->periodic_work;
2271
2272         dev->periodic_state = 0;
2273         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2274         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2275 }
2276
2277 /* Validate access to the chip (SHM) */
2278 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2279 {
2280         u32 value;
2281         u32 shm_backup;
2282
2283         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2284         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2285         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2286                                  0xAA5555AA)
2287                 goto error;
2288         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2289         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2290                                  0x55AAAA55)
2291                 goto error;
2292         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2293
2294         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2295         if ((value | B43legacy_MACCTL_GMODE) !=
2296             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2297                 goto error;
2298
2299         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2300         if (value)
2301                 goto error;
2302
2303         return 0;
2304 error:
2305         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2306         return -ENODEV;
2307 }
2308
2309 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2310 {
2311         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2312         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2313         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2314                                         0x0056);
2315         /* KTP is a word address, but we address SHM bytewise.
2316          * So multiply by two.
2317          */
2318         dev->ktp *= 2;
2319         if (dev->dev->id.revision >= 5)
2320                 /* Number of RCMTA address slots */
2321                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2322                                   dev->max_nr_keys - 8);
2323 }
2324
2325 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2326 {
2327         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2328         unsigned long flags;
2329
2330         /* Don't take wl->mutex here, as it could deadlock with
2331          * hwrng internal locking. It's not needed to take
2332          * wl->mutex here, anyway. */
2333
2334         spin_lock_irqsave(&wl->irq_lock, flags);
2335         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2336         spin_unlock_irqrestore(&wl->irq_lock, flags);
2337
2338         return (sizeof(u16));
2339 }
2340
2341 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2342 {
2343         if (wl->rng_initialized)
2344                 hwrng_unregister(&wl->rng);
2345 }
2346
2347 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2348 {
2349         int err;
2350
2351         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2352                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2353         wl->rng.name = wl->rng_name;
2354         wl->rng.data_read = b43legacy_rng_read;
2355         wl->rng.priv = (unsigned long)wl;
2356         wl->rng_initialized = 1;
2357         err = hwrng_register(&wl->rng);
2358         if (err) {
2359                 wl->rng_initialized = 0;
2360                 b43legacyerr(wl, "Failed to register the random "
2361                        "number generator (%d)\n", err);
2362         }
2363
2364         return err;
2365 }
2366
2367 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2368                            struct sk_buff *skb)
2369 {
2370         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2371         struct b43legacy_wldev *dev = wl->current_dev;
2372         int err = -ENODEV;
2373         unsigned long flags;
2374
2375         if (unlikely(!dev))
2376                 goto out;
2377         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2378                 goto out;
2379         /* DMA-TX is done without a global lock. */
2380         if (b43legacy_using_pio(dev)) {
2381                 spin_lock_irqsave(&wl->irq_lock, flags);
2382                 err = b43legacy_pio_tx(dev, skb);
2383                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2384         } else
2385                 err = b43legacy_dma_tx(dev, skb);
2386 out:
2387         if (unlikely(err)) {
2388                 /* Drop the packet. */
2389                 dev_kfree_skb_any(skb);
2390         }
2391         return NETDEV_TX_OK;
2392 }
2393
2394 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
2395                                 const struct ieee80211_tx_queue_params *params)
2396 {
2397         return 0;
2398 }
2399
2400 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2401                                      struct ieee80211_tx_queue_stats *stats)
2402 {
2403         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2404         struct b43legacy_wldev *dev = wl->current_dev;
2405         unsigned long flags;
2406         int err = -ENODEV;
2407
2408         if (!dev)
2409                 goto out;
2410         spin_lock_irqsave(&wl->irq_lock, flags);
2411         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2412                 if (b43legacy_using_pio(dev))
2413                         b43legacy_pio_get_tx_stats(dev, stats);
2414                 else
2415                         b43legacy_dma_get_tx_stats(dev, stats);
2416                 err = 0;
2417         }
2418         spin_unlock_irqrestore(&wl->irq_lock, flags);
2419 out:
2420         return err;
2421 }
2422
2423 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2424                                   struct ieee80211_low_level_stats *stats)
2425 {
2426         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2427         unsigned long flags;
2428
2429         spin_lock_irqsave(&wl->irq_lock, flags);
2430         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2431         spin_unlock_irqrestore(&wl->irq_lock, flags);
2432
2433         return 0;
2434 }
2435
2436 static const char *phymode_to_string(unsigned int phymode)
2437 {
2438         switch (phymode) {
2439         case B43legacy_PHYMODE_B:
2440                 return "B";
2441         case B43legacy_PHYMODE_G:
2442                 return "G";
2443         default:
2444                 B43legacy_BUG_ON(1);
2445         }
2446         return "";
2447 }
2448
2449 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2450                                   unsigned int phymode,
2451                                   struct b43legacy_wldev **dev,
2452                                   bool *gmode)
2453 {
2454         struct b43legacy_wldev *d;
2455
2456         list_for_each_entry(d, &wl->devlist, list) {
2457                 if (d->phy.possible_phymodes & phymode) {
2458                         /* Ok, this device supports the PHY-mode.
2459                          * Set the gmode bit. */
2460                         *gmode = 1;
2461                         *dev = d;
2462
2463                         return 0;
2464                 }
2465         }
2466
2467         return -ESRCH;
2468 }
2469
2470 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2471 {
2472         struct ssb_device *sdev = dev->dev;
2473         u32 tmslow;
2474
2475         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2476         tmslow &= ~B43legacy_TMSLOW_GMODE;
2477         tmslow |= B43legacy_TMSLOW_PHYRESET;
2478         tmslow |= SSB_TMSLOW_FGC;
2479         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2480         msleep(1);
2481
2482         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2483         tmslow &= ~SSB_TMSLOW_FGC;
2484         tmslow |= B43legacy_TMSLOW_PHYRESET;
2485         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2486         msleep(1);
2487 }
2488
2489 /* Expects wl->mutex locked */
2490 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2491                                       unsigned int new_mode)
2492 {
2493         struct b43legacy_wldev *up_dev;
2494         struct b43legacy_wldev *down_dev;
2495         int err;
2496         bool gmode = 0;
2497         int prev_status;
2498
2499         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2500         if (err) {
2501                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2502                        phymode_to_string(new_mode));
2503                 return err;
2504         }
2505         if ((up_dev == wl->current_dev) &&
2506             (!!wl->current_dev->phy.gmode == !!gmode))
2507                 /* This device is already running. */
2508                 return 0;
2509         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2510                phymode_to_string(new_mode));
2511         down_dev = wl->current_dev;
2512
2513         prev_status = b43legacy_status(down_dev);
2514         /* Shutdown the currently running core. */
2515         if (prev_status >= B43legacy_STAT_STARTED)
2516                 b43legacy_wireless_core_stop(down_dev);
2517         if (prev_status >= B43legacy_STAT_INITIALIZED)
2518                 b43legacy_wireless_core_exit(down_dev);
2519
2520         if (down_dev != up_dev)
2521                 /* We switch to a different core, so we put PHY into
2522                  * RESET on the old core. */
2523                 b43legacy_put_phy_into_reset(down_dev);
2524
2525         /* Now start the new core. */
2526         up_dev->phy.gmode = gmode;
2527         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2528                 err = b43legacy_wireless_core_init(up_dev);
2529                 if (err) {
2530                         b43legacyerr(wl, "Fatal: Could not initialize device"
2531                                      " for newly selected %s-PHY mode\n",
2532                                      phymode_to_string(new_mode));
2533                         goto init_failure;
2534                 }
2535         }
2536         if (prev_status >= B43legacy_STAT_STARTED) {
2537                 err = b43legacy_wireless_core_start(up_dev);
2538                 if (err) {
2539                         b43legacyerr(wl, "Fatal: Coult not start device for "
2540                                "newly selected %s-PHY mode\n",
2541                                phymode_to_string(new_mode));
2542                         b43legacy_wireless_core_exit(up_dev);
2543                         goto init_failure;
2544                 }
2545         }
2546         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2547
2548         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2549
2550         wl->current_dev = up_dev;
2551
2552         return 0;
2553 init_failure:
2554         /* Whoops, failed to init the new core. No core is operating now. */
2555         wl->current_dev = NULL;
2556         return err;
2557 }
2558
2559 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2560                                    u32 changed)
2561 {
2562         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2563         struct b43legacy_wldev *dev;
2564         struct b43legacy_phy *phy;
2565         struct ieee80211_conf *conf = &hw->conf;
2566         unsigned long flags;
2567         unsigned int new_phymode = 0xFFFF;
2568         int antenna_tx;
2569         int antenna_rx;
2570         int err = 0;
2571         u32 savedirqs;
2572
2573         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2574         antenna_rx = B43legacy_ANTENNA_DEFAULT;
2575
2576         mutex_lock(&wl->mutex);
2577         dev = wl->current_dev;
2578         phy = &dev->phy;
2579
2580         /* Switch the PHY mode (if necessary). */
2581         switch (conf->channel->band) {
2582         case IEEE80211_BAND_2GHZ:
2583                 if (phy->type == B43legacy_PHYTYPE_B)
2584                         new_phymode = B43legacy_PHYMODE_B;
2585                 else
2586                         new_phymode = B43legacy_PHYMODE_G;
2587                 break;
2588         default:
2589                 B43legacy_WARN_ON(1);
2590         }
2591         err = b43legacy_switch_phymode(wl, new_phymode);
2592         if (err)
2593                 goto out_unlock_mutex;
2594
2595         /* Disable IRQs while reconfiguring the device.
2596          * This makes it possible to drop the spinlock throughout
2597          * the reconfiguration process. */
2598         spin_lock_irqsave(&wl->irq_lock, flags);
2599         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2600                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2601                 goto out_unlock_mutex;
2602         }
2603         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2604         spin_unlock_irqrestore(&wl->irq_lock, flags);
2605         b43legacy_synchronize_irq(dev);
2606
2607         /* Switch to the requested channel.
2608          * The firmware takes care of races with the TX handler. */
2609         if (conf->channel->hw_value != phy->channel)
2610                 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2611
2612         /* Enable/Disable ShortSlot timing. */
2613         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2614              != dev->short_slot) {
2615                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2616                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2617                         b43legacy_short_slot_timing_enable(dev);
2618                 else
2619                         b43legacy_short_slot_timing_disable(dev);
2620         }
2621
2622         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2623
2624         /* Adjust the desired TX power level. */
2625         if (conf->power_level != 0) {
2626                 if (conf->power_level != phy->power_level) {
2627                         phy->power_level = conf->power_level;
2628                         b43legacy_phy_xmitpower(dev);
2629                 }
2630         }
2631
2632         /* Antennas for RX and management frame TX. */
2633         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2634
2635         /* Update templates for AP mode. */
2636         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2637                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2638
2639
2640         if (!!conf->radio_enabled != phy->radio_on) {
2641                 if (conf->radio_enabled) {
2642                         b43legacy_radio_turn_on(dev);
2643                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2644                         if (!dev->radio_hw_enable)
2645                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2646                                               " button still turns the radio"
2647                                               " physically off. Press the"
2648                                               " button to turn it on.\n");
2649                 } else {
2650                         b43legacy_radio_turn_off(dev, 0);
2651                         b43legacyinfo(dev->wl, "Radio turned off by"
2652                                       " software\n");
2653                 }
2654         }
2655
2656         spin_lock_irqsave(&wl->irq_lock, flags);
2657         b43legacy_interrupt_enable(dev, savedirqs);
2658         mmiowb();
2659         spin_unlock_irqrestore(&wl->irq_lock, flags);
2660 out_unlock_mutex:
2661         mutex_unlock(&wl->mutex);
2662
2663         return err;
2664 }
2665
2666 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2667                                           unsigned int changed,
2668                                           unsigned int *fflags,
2669                                           int mc_count,
2670                                           struct dev_addr_list *mc_list)
2671 {
2672         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2673         struct b43legacy_wldev *dev = wl->current_dev;
2674         unsigned long flags;
2675
2676         if (!dev) {
2677                 *fflags = 0;
2678                 return;
2679         }
2680
2681         spin_lock_irqsave(&wl->irq_lock, flags);
2682         *fflags &= FIF_PROMISC_IN_BSS |
2683                   FIF_ALLMULTI |
2684                   FIF_FCSFAIL |
2685                   FIF_PLCPFAIL |
2686                   FIF_CONTROL |
2687                   FIF_OTHER_BSS |
2688                   FIF_BCN_PRBRESP_PROMISC;
2689
2690         changed &= FIF_PROMISC_IN_BSS |
2691                    FIF_ALLMULTI |
2692                    FIF_FCSFAIL |
2693                    FIF_PLCPFAIL |
2694                    FIF_CONTROL |
2695                    FIF_OTHER_BSS |
2696                    FIF_BCN_PRBRESP_PROMISC;
2697
2698         wl->filter_flags = *fflags;
2699
2700         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2701                 b43legacy_adjust_opmode(dev);
2702         spin_unlock_irqrestore(&wl->irq_lock, flags);
2703 }
2704
2705 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2706                                          struct ieee80211_vif *vif,
2707                                          struct ieee80211_if_conf *conf)
2708 {
2709         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2710         struct b43legacy_wldev *dev = wl->current_dev;
2711         unsigned long flags;
2712
2713         if (!dev)
2714                 return -ENODEV;
2715         mutex_lock(&wl->mutex);
2716         spin_lock_irqsave(&wl->irq_lock, flags);
2717         B43legacy_WARN_ON(wl->vif != vif);
2718         if (conf->bssid)
2719                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2720         else
2721                 memset(wl->bssid, 0, ETH_ALEN);
2722         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2723                 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) {
2724                         B43legacy_WARN_ON(vif->type != NL80211_IFTYPE_AP);
2725                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2726                         if (conf->changed & IEEE80211_IFCC_BEACON)
2727                                 b43legacy_update_templates(wl);
2728                 } else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)) {
2729                         if (conf->changed & IEEE80211_IFCC_BEACON)
2730                                 b43legacy_update_templates(wl);
2731                 }
2732                 b43legacy_write_mac_bssid_templates(dev);
2733         }
2734         spin_unlock_irqrestore(&wl->irq_lock, flags);
2735         mutex_unlock(&wl->mutex);
2736
2737         return 0;
2738 }
2739
2740 /* Locking: wl->mutex */
2741 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2742 {
2743         struct b43legacy_wl *wl = dev->wl;
2744         unsigned long flags;
2745
2746         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2747                 return;
2748
2749         /* Disable and sync interrupts. We must do this before than
2750          * setting the status to INITIALIZED, as the interrupt handler
2751          * won't care about IRQs then. */
2752         spin_lock_irqsave(&wl->irq_lock, flags);
2753         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2754                                                           B43legacy_IRQ_ALL);
2755         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2756         spin_unlock_irqrestore(&wl->irq_lock, flags);
2757         b43legacy_synchronize_irq(dev);
2758
2759         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2760
2761         mutex_unlock(&wl->mutex);
2762         /* Must unlock as it would otherwise deadlock. No races here.
2763          * Cancel the possibly running self-rearming periodic work. */
2764         cancel_delayed_work_sync(&dev->periodic_work);
2765         mutex_lock(&wl->mutex);
2766
2767         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2768
2769         b43legacy_mac_suspend(dev);
2770         free_irq(dev->dev->irq, dev);
2771         b43legacydbg(wl, "Wireless interface stopped\n");
2772 }
2773
2774 /* Locking: wl->mutex */
2775 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2776 {
2777         int err;
2778
2779         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2780
2781         drain_txstatus_queue(dev);
2782         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2783                           IRQF_SHARED, KBUILD_MODNAME, dev);
2784         if (err) {
2785                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2786                        dev->dev->irq);
2787                 goto out;
2788         }
2789         /* We are ready to run. */
2790         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2791
2792         /* Start data flow (TX/RX) */
2793         b43legacy_mac_enable(dev);
2794         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2795
2796         /* Start maintenance work */
2797         b43legacy_periodic_tasks_setup(dev);
2798
2799         b43legacydbg(dev->wl, "Wireless interface started\n");
2800 out:
2801         return err;
2802 }
2803
2804 /* Get PHY and RADIO versioning numbers */
2805 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2806 {
2807         struct b43legacy_phy *phy = &dev->phy;
2808         u32 tmp;
2809         u8 analog_type;
2810         u8 phy_type;
2811         u8 phy_rev;
2812         u16 radio_manuf;
2813         u16 radio_ver;
2814         u16 radio_rev;
2815         int unsupported = 0;
2816
2817         /* Get PHY versioning */
2818         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2819         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2820                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2821         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2822         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2823         switch (phy_type) {
2824         case B43legacy_PHYTYPE_B:
2825                 if (phy_rev != 2 && phy_rev != 4
2826                     && phy_rev != 6 && phy_rev != 7)
2827                         unsupported = 1;
2828                 break;
2829         case B43legacy_PHYTYPE_G:
2830                 if (phy_rev > 8)
2831                         unsupported = 1;
2832                 break;
2833         default:
2834                 unsupported = 1;
2835         };
2836         if (unsupported) {
2837                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2838                        "(Analog %u, Type %u, Revision %u)\n",
2839                        analog_type, phy_type, phy_rev);
2840                 return -EOPNOTSUPP;
2841         }
2842         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2843                analog_type, phy_type, phy_rev);
2844
2845
2846         /* Get RADIO versioning */
2847         if (dev->dev->bus->chip_id == 0x4317) {
2848                 if (dev->dev->bus->chip_rev == 0)
2849                         tmp = 0x3205017F;
2850                 else if (dev->dev->bus->chip_rev == 1)
2851                         tmp = 0x4205017F;
2852                 else
2853                         tmp = 0x5205017F;
2854         } else {
2855                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2856                                   B43legacy_RADIOCTL_ID);
2857                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2858                 tmp <<= 16;
2859                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2860                                   B43legacy_RADIOCTL_ID);
2861                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2862         }
2863         radio_manuf = (tmp & 0x00000FFF);
2864         radio_ver = (tmp & 0x0FFFF000) >> 12;
2865         radio_rev = (tmp & 0xF0000000) >> 28;
2866         switch (phy_type) {
2867         case B43legacy_PHYTYPE_B:
2868                 if ((radio_ver & 0xFFF0) != 0x2050)
2869                         unsupported = 1;
2870                 break;
2871         case B43legacy_PHYTYPE_G:
2872                 if (radio_ver != 0x2050)
2873                         unsupported = 1;
2874                 break;
2875         default:
2876                 B43legacy_BUG_ON(1);
2877         }
2878         if (unsupported) {
2879                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2880                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2881                        radio_manuf, radio_ver, radio_rev);
2882                 return -EOPNOTSUPP;
2883         }
2884         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2885                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2886
2887
2888         phy->radio_manuf = radio_manuf;
2889         phy->radio_ver = radio_ver;
2890         phy->radio_rev = radio_rev;
2891
2892         phy->analog = analog_type;
2893         phy->type = phy_type;
2894         phy->rev = phy_rev;
2895
2896         return 0;
2897 }
2898
2899 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2900                                       struct b43legacy_phy *phy)
2901 {
2902         struct b43legacy_lopair *lo;
2903         int i;
2904
2905         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2906         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2907
2908         /* Assume the radio is enabled. If it's not enabled, the state will
2909          * immediately get fixed on the first periodic work run. */
2910         dev->radio_hw_enable = 1;
2911
2912         phy->savedpctlreg = 0xFFFF;
2913         phy->aci_enable = 0;
2914         phy->aci_wlan_automatic = 0;
2915         phy->aci_hw_rssi = 0;
2916
2917         lo = phy->_lo_pairs;
2918         if (lo)
2919                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2920                                      B43legacy_LO_COUNT);
2921         phy->max_lb_gain = 0;
2922         phy->trsw_rx_gain = 0;
2923
2924         /* Set default attenuation values. */
2925         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2926         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2927         phy->txctl1 = b43legacy_default_txctl1(dev);
2928         phy->txpwr_offset = 0;
2929
2930         /* NRSSI */
2931         phy->nrssislope = 0;
2932         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2933                 phy->nrssi[i] = -1000;
2934         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2935                 phy->nrssi_lt[i] = i;
2936
2937         phy->lofcal = 0xFFFF;
2938         phy->initval = 0xFFFF;
2939
2940         phy->interfmode = B43legacy_INTERFMODE_NONE;
2941         phy->channel = 0xFF;
2942 }
2943
2944 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2945 {
2946         /* Flags */
2947         dev->dfq_valid = 0;
2948
2949         /* Stats */
2950         memset(&dev->stats, 0, sizeof(dev->stats));
2951
2952         setup_struct_phy_for_init(dev, &dev->phy);
2953
2954         /* IRQ related flags */
2955         dev->irq_reason = 0;
2956         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2957         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2958
2959         dev->mac_suspended = 1;
2960
2961         /* Noise calculation context */
2962         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2963 }
2964
2965 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2966 {
2967 #ifdef CONFIG_SSB_DRIVER_PCICORE
2968         struct ssb_bus *bus = dev->dev->bus;
2969         u32 tmp;
2970
2971         if (bus->pcicore.dev &&
2972             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2973             bus->pcicore.dev->id.revision <= 5) {
2974                 /* IMCFGLO timeouts workaround. */
2975                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2976                 tmp &= ~SSB_IMCFGLO_REQTO;
2977                 tmp &= ~SSB_IMCFGLO_SERTO;
2978                 switch (bus->bustype) {
2979                 case SSB_BUSTYPE_PCI:
2980                 case SSB_BUSTYPE_PCMCIA:
2981                         tmp |= 0x32;
2982                         break;
2983                 case SSB_BUSTYPE_SSB:
2984                         tmp |= 0x53;
2985                         break;
2986                 }
2987                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2988         }
2989 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2990 }
2991
2992 /* Write the short and long frame retry limit values. */
2993 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2994                                        unsigned int short_retry,
2995                                        unsigned int long_retry)
2996 {
2997         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2998          * the chip-internal counter. */
2999         short_retry = min(short_retry, (unsigned int)0xF);
3000         long_retry = min(long_retry, (unsigned int)0xF);
3001
3002         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
3003         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
3004 }
3005
3006 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3007                                           bool idle) {
3008         u16 pu_delay = 1050;
3009
3010         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3011                 pu_delay = 500;
3012         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3013                 pu_delay = max(pu_delay, (u16)2400);
3014
3015         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3016                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3017 }
3018
3019 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3020 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3021 {
3022         u16 pretbtt;
3023
3024         /* The time value is in microseconds. */
3025         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3026                 pretbtt = 2;
3027         else
3028                 pretbtt = 250;
3029         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3030                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3031         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3032 }
3033
3034 /* Shutdown a wireless core */
3035 /* Locking: wl->mutex */
3036 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3037 {
3038         struct b43legacy_phy *phy = &dev->phy;
3039         u32 macctl;
3040
3041         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3042         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3043                 return;
3044         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3045
3046         /* Stop the microcode PSM. */
3047         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3048         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3049         macctl |= B43legacy_MACCTL_PSM_JMP0;
3050         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3051
3052         b43legacy_leds_exit(dev);
3053         b43legacy_rng_exit(dev->wl);
3054         b43legacy_pio_free(dev);
3055         b43legacy_dma_free(dev);
3056         b43legacy_chip_exit(dev);
3057         b43legacy_radio_turn_off(dev, 1);
3058         b43legacy_switch_analog(dev, 0);
3059         if (phy->dyn_tssi_tbl)
3060                 kfree(phy->tssi2dbm);
3061         kfree(phy->lo_control);
3062         phy->lo_control = NULL;
3063         if (dev->wl->current_beacon) {
3064                 dev_kfree_skb_any(dev->wl->current_beacon);
3065                 dev->wl->current_beacon = NULL;
3066         }
3067
3068         ssb_device_disable(dev->dev, 0);
3069         ssb_bus_may_powerdown(dev->dev->bus);
3070 }
3071
3072 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3073 {
3074         struct b43legacy_phy *phy = &dev->phy;
3075         int i;
3076
3077         /* Set default attenuation values. */
3078         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3079         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3080         phy->txctl1 = b43legacy_default_txctl1(dev);
3081         phy->txctl2 = 0xFFFF;
3082         phy->txpwr_offset = 0;
3083
3084         /* NRSSI */
3085         phy->nrssislope = 0;
3086         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3087                 phy->nrssi[i] = -1000;
3088         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3089                 phy->nrssi_lt[i] = i;
3090
3091         phy->lofcal = 0xFFFF;
3092         phy->initval = 0xFFFF;
3093
3094         phy->aci_enable = 0;
3095         phy->aci_wlan_automatic = 0;
3096         phy->aci_hw_rssi = 0;
3097
3098         phy->antenna_diversity = 0xFFFF;
3099         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3100         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3101
3102         /* Flags */
3103         phy->calibrated = 0;
3104
3105         if (phy->_lo_pairs)
3106                 memset(phy->_lo_pairs, 0,
3107                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3108         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3109 }
3110
3111 /* Initialize a wireless core */
3112 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3113 {
3114         struct b43legacy_wl *wl = dev->wl;
3115         struct ssb_bus *bus = dev->dev->bus;
3116         struct b43legacy_phy *phy = &dev->phy;
3117         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3118         int err;
3119         u32 hf;
3120         u32 tmp;
3121
3122         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3123
3124         err = ssb_bus_powerup(bus, 0);
3125         if (err)
3126                 goto out;
3127         if (!ssb_device_is_enabled(dev->dev)) {
3128                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3129                 b43legacy_wireless_core_reset(dev, tmp);
3130         }
3131
3132         if ((phy->type == B43legacy_PHYTYPE_B) ||
3133             (phy->type == B43legacy_PHYTYPE_G)) {
3134                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3135                                          * B43legacy_LO_COUNT,
3136                                          GFP_KERNEL);
3137                 if (!phy->_lo_pairs)
3138                         return -ENOMEM;
3139         }
3140         setup_struct_wldev_for_init(dev);
3141
3142         err = b43legacy_phy_init_tssi2dbm_table(dev);
3143         if (err)
3144                 goto err_kfree_lo_control;
3145
3146         /* Enable IRQ routing to this device. */
3147         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3148
3149         b43legacy_imcfglo_timeouts_workaround(dev);
3150         prepare_phy_data_for_init(dev);
3151         b43legacy_phy_calibrate(dev);
3152         err = b43legacy_chip_init(dev);
3153         if (err)
3154                 goto err_kfree_tssitbl;
3155         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3156                               B43legacy_SHM_SH_WLCOREREV,
3157                               dev->dev->id.revision);
3158         hf = b43legacy_hf_read(dev);
3159         if (phy->type == B43legacy_PHYTYPE_G) {
3160                 hf |= B43legacy_HF_SYMW;
3161                 if (phy->rev == 1)
3162                         hf |= B43legacy_HF_GDCW;
3163                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3164                         hf |= B43legacy_HF_OFDMPABOOST;
3165         } else if (phy->type == B43legacy_PHYTYPE_B) {
3166                 hf |= B43legacy_HF_SYMW;
3167                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3168                         hf &= ~B43legacy_HF_GDCW;
3169         }
3170         b43legacy_hf_write(dev, hf);
3171
3172         b43legacy_set_retry_limits(dev,
3173                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3174                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3175
3176         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3177                               0x0044, 3);
3178         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3179                               0x0046, 2);
3180
3181         /* Disable sending probe responses from firmware.
3182          * Setting the MaxTime to one usec will always trigger
3183          * a timeout, so we never send any probe resp.
3184          * A timeout of zero is infinite. */
3185         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3186                               B43legacy_SHM_SH_PRMAXTIME, 1);
3187
3188         b43legacy_rate_memory_init(dev);
3189
3190         /* Minimum Contention Window */
3191         if (phy->type == B43legacy_PHYTYPE_B)
3192                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3193                                       0x0003, 31);
3194         else
3195                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3196                                       0x0003, 15);
3197         /* Maximum Contention Window */
3198         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3199                               0x0004, 1023);
3200
3201         do {
3202                 if (b43legacy_using_pio(dev))
3203                         err = b43legacy_pio_init(dev);
3204                 else {
3205                         err = b43legacy_dma_init(dev);
3206                         if (!err)
3207                                 b43legacy_qos_init(dev);
3208                 }
3209         } while (err == -EAGAIN);
3210         if (err)
3211                 goto err_chip_exit;
3212
3213         b43legacy_set_synth_pu_delay(dev, 1);
3214
3215         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3216         b43legacy_upload_card_macaddress(dev);
3217         b43legacy_security_init(dev);
3218         b43legacy_rng_init(wl);
3219
3220         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3221
3222         b43legacy_leds_init(dev);
3223 out:
3224         return err;
3225
3226 err_chip_exit:
3227         b43legacy_chip_exit(dev);
3228 err_kfree_tssitbl:
3229         if (phy->dyn_tssi_tbl)
3230                 kfree(phy->tssi2dbm);
3231 err_kfree_lo_control:
3232         kfree(phy->lo_control);
3233         phy->lo_control = NULL;
3234         ssb_bus_may_powerdown(bus);
3235         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3236         return err;
3237 }
3238
3239 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3240                                       struct ieee80211_if_init_conf *conf)
3241 {
3242         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3243         struct b43legacy_wldev *dev;
3244         unsigned long flags;
3245         int err = -EOPNOTSUPP;
3246
3247         /* TODO: allow WDS/AP devices to coexist */
3248
3249         if (conf->type != NL80211_IFTYPE_AP &&
3250             conf->type != NL80211_IFTYPE_STATION &&
3251             conf->type != NL80211_IFTYPE_WDS &&
3252             conf->type != NL80211_IFTYPE_ADHOC)
3253                 return -EOPNOTSUPP;
3254
3255         mutex_lock(&wl->mutex);
3256         if (wl->operating)
3257                 goto out_mutex_unlock;
3258
3259         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3260
3261         dev = wl->current_dev;
3262         wl->operating = 1;
3263         wl->vif = conf->vif;
3264         wl->if_type = conf->type;
3265         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3266
3267         spin_lock_irqsave(&wl->irq_lock, flags);
3268         b43legacy_adjust_opmode(dev);
3269         b43legacy_set_pretbtt(dev);
3270         b43legacy_set_synth_pu_delay(dev, 0);
3271         b43legacy_upload_card_macaddress(dev);
3272         spin_unlock_irqrestore(&wl->irq_lock, flags);
3273
3274         err = 0;
3275  out_mutex_unlock:
3276         mutex_unlock(&wl->mutex);
3277
3278         return err;
3279 }
3280
3281 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3282                                           struct ieee80211_if_init_conf *conf)
3283 {
3284         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3285         struct b43legacy_wldev *dev = wl->current_dev;
3286         unsigned long flags;
3287
3288         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3289
3290         mutex_lock(&wl->mutex);
3291
3292         B43legacy_WARN_ON(!wl->operating);
3293         B43legacy_WARN_ON(wl->vif != conf->vif);
3294         wl->vif = NULL;
3295
3296         wl->operating = 0;
3297
3298         spin_lock_irqsave(&wl->irq_lock, flags);
3299         b43legacy_adjust_opmode(dev);
3300         memset(wl->mac_addr, 0, ETH_ALEN);
3301         b43legacy_upload_card_macaddress(dev);
3302         spin_unlock_irqrestore(&wl->irq_lock, flags);
3303
3304         mutex_unlock(&wl->mutex);
3305 }
3306
3307 static int b43legacy_op_start(struct ieee80211_hw *hw)
3308 {
3309         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3310         struct b43legacy_wldev *dev = wl->current_dev;
3311         int did_init = 0;
3312         int err = 0;
3313         bool do_rfkill_exit = 0;
3314
3315         /* First register RFkill.
3316          * LEDs that are registered later depend on it. */
3317         b43legacy_rfkill_init(dev);
3318
3319         /* Kill all old instance specific information to make sure
3320          * the card won't use it in the short timeframe between start
3321          * and mac80211 reconfiguring it. */
3322         memset(wl->bssid, 0, ETH_ALEN);
3323         memset(wl->mac_addr, 0, ETH_ALEN);
3324         wl->filter_flags = 0;
3325
3326         mutex_lock(&wl->mutex);
3327
3328         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3329                 err = b43legacy_wireless_core_init(dev);
3330                 if (err) {
3331                         do_rfkill_exit = 1;
3332                         goto out_mutex_unlock;
3333                 }
3334                 did_init = 1;
3335         }
3336
3337         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3338                 err = b43legacy_wireless_core_start(dev);
3339                 if (err) {
3340                         if (did_init)
3341                                 b43legacy_wireless_core_exit(dev);
3342                         do_rfkill_exit = 1;
3343                         goto out_mutex_unlock;
3344                 }
3345         }
3346
3347 out_mutex_unlock:
3348         mutex_unlock(&wl->mutex);
3349
3350         if (do_rfkill_exit)
3351                 b43legacy_rfkill_exit(dev);
3352
3353         return err;
3354 }
3355
3356 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3357 {
3358         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3359         struct b43legacy_wldev *dev = wl->current_dev;
3360
3361         b43legacy_rfkill_exit(dev);
3362
3363         mutex_lock(&wl->mutex);
3364         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3365                 b43legacy_wireless_core_stop(dev);
3366         b43legacy_wireless_core_exit(dev);
3367         mutex_unlock(&wl->mutex);
3368 }
3369
3370 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3371                                         u32 short_retry_limit,
3372                                         u32 long_retry_limit)
3373 {
3374         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3375         struct b43legacy_wldev *dev;
3376         int err = 0;
3377
3378         mutex_lock(&wl->mutex);
3379         dev = wl->current_dev;
3380         if (unlikely(!dev ||
3381                      (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3382                 err = -ENODEV;
3383                 goto out_unlock;
3384         }
3385         b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3386 out_unlock:
3387         mutex_unlock(&wl->mutex);
3388
3389         return err;
3390 }
3391
3392 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3393                                        struct ieee80211_sta *sta, bool set)
3394 {
3395         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3396         unsigned long flags;
3397
3398         spin_lock_irqsave(&wl->irq_lock, flags);
3399         b43legacy_update_templates(wl);
3400         spin_unlock_irqrestore(&wl->irq_lock, flags);
3401
3402         return 0;
3403 }
3404
3405 static const struct ieee80211_ops b43legacy_hw_ops = {
3406         .tx                     = b43legacy_op_tx,
3407         .conf_tx                = b43legacy_op_conf_tx,
3408         .add_interface          = b43legacy_op_add_interface,
3409         .remove_interface       = b43legacy_op_remove_interface,
3410         .config                 = b43legacy_op_dev_config,
3411         .config_interface       = b43legacy_op_config_interface,
3412         .configure_filter       = b43legacy_op_configure_filter,
3413         .get_stats              = b43legacy_op_get_stats,
3414         .get_tx_stats           = b43legacy_op_get_tx_stats,
3415         .start                  = b43legacy_op_start,
3416         .stop                   = b43legacy_op_stop,
3417         .set_retry_limit        = b43legacy_op_set_retry_limit,
3418         .set_tim                = b43legacy_op_beacon_set_tim,
3419 };
3420
3421 /* Hard-reset the chip. Do not call this directly.
3422  * Use b43legacy_controller_restart()
3423  */
3424 static void b43legacy_chip_reset(struct work_struct *work)
3425 {
3426         struct b43legacy_wldev *dev =
3427                 container_of(work, struct b43legacy_wldev, restart_work);
3428         struct b43legacy_wl *wl = dev->wl;
3429         int err = 0;
3430         int prev_status;
3431
3432         mutex_lock(&wl->mutex);
3433
3434         prev_status = b43legacy_status(dev);
3435         /* Bring the device down... */
3436         if (prev_status >= B43legacy_STAT_STARTED)
3437                 b43legacy_wireless_core_stop(dev);
3438         if (prev_status >= B43legacy_STAT_INITIALIZED)
3439                 b43legacy_wireless_core_exit(dev);
3440
3441         /* ...and up again. */
3442         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3443                 err = b43legacy_wireless_core_init(dev);
3444                 if (err)
3445                         goto out;
3446         }
3447         if (prev_status >= B43legacy_STAT_STARTED) {
3448                 err = b43legacy_wireless_core_start(dev);
3449                 if (err) {
3450                         b43legacy_wireless_core_exit(dev);
3451                         goto out;
3452                 }
3453         }
3454 out:
3455         if (err)
3456                 wl->current_dev = NULL; /* Failed to init the dev. */
3457         mutex_unlock(&wl->mutex);
3458         if (err)
3459                 b43legacyerr(wl, "Controller restart FAILED\n");
3460         else
3461                 b43legacyinfo(wl, "Controller restarted\n");
3462 }
3463
3464 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3465                                  int have_bphy,
3466                                  int have_gphy)
3467 {
3468         struct ieee80211_hw *hw = dev->wl->hw;
3469         struct b43legacy_phy *phy = &dev->phy;
3470
3471         phy->possible_phymodes = 0;
3472         if (have_bphy) {
3473                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3474                         &b43legacy_band_2GHz_BPHY;
3475                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3476         }
3477
3478         if (have_gphy) {
3479                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3480                         &b43legacy_band_2GHz_GPHY;
3481                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3482         }
3483
3484         return 0;
3485 }
3486
3487 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3488 {
3489         /* We release firmware that late to not be required to re-request
3490          * is all the time when we reinit the core. */
3491         b43legacy_release_firmware(dev);
3492 }
3493
3494 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3495 {
3496         struct b43legacy_wl *wl = dev->wl;
3497         struct ssb_bus *bus = dev->dev->bus;
3498         struct pci_dev *pdev = bus->host_pci;
3499         int err;
3500         int have_bphy = 0;
3501         int have_gphy = 0;
3502         u32 tmp;
3503
3504         /* Do NOT do any device initialization here.
3505          * Do it in wireless_core_init() instead.
3506          * This function is for gathering basic information about the HW, only.
3507          * Also some structs may be set up here. But most likely you want to
3508          * have that in core_init(), too.
3509          */
3510
3511         err = ssb_bus_powerup(bus, 0);
3512         if (err) {
3513                 b43legacyerr(wl, "Bus powerup failed\n");
3514                 goto out;
3515         }
3516         /* Get the PHY type. */
3517         if (dev->dev->id.revision >= 5) {
3518                 u32 tmshigh;
3519
3520                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3521                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3522                 if (!have_gphy)
3523                         have_bphy = 1;
3524         } else if (dev->dev->id.revision == 4)
3525                 have_gphy = 1;
3526         else
3527                 have_bphy = 1;
3528
3529         dev->phy.gmode = (have_gphy || have_bphy);
3530         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3531         b43legacy_wireless_core_reset(dev, tmp);
3532
3533         err = b43legacy_phy_versioning(dev);
3534         if (err)
3535                 goto err_powerdown;
3536         /* Check if this device supports multiband. */
3537         if (!pdev ||
3538             (pdev->device != 0x4312 &&
3539              pdev->device != 0x4319 &&
3540              pdev->device != 0x4324)) {
3541                 /* No multiband support. */
3542                 have_bphy = 0;
3543                 have_gphy = 0;
3544                 switch (dev->phy.type) {
3545                 case B43legacy_PHYTYPE_B:
3546                         have_bphy = 1;
3547                         break;
3548                 case B43legacy_PHYTYPE_G:
3549                         have_gphy = 1;
3550                         break;
3551                 default:
3552                         B43legacy_BUG_ON(1);
3553                 }
3554         }
3555         dev->phy.gmode = (have_gphy || have_bphy);
3556         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3557         b43legacy_wireless_core_reset(dev, tmp);
3558
3559         err = b43legacy_validate_chipaccess(dev);
3560         if (err)
3561                 goto err_powerdown;
3562         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3563         if (err)
3564                 goto err_powerdown;
3565
3566         /* Now set some default "current_dev" */
3567         if (!wl->current_dev)
3568                 wl->current_dev = dev;
3569         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3570
3571         b43legacy_radio_turn_off(dev, 1);
3572         b43legacy_switch_analog(dev, 0);
3573         ssb_device_disable(dev->dev, 0);
3574         ssb_bus_may_powerdown(bus);
3575
3576 out:
3577         return err;
3578
3579 err_powerdown:
3580         ssb_bus_may_powerdown(bus);
3581         return err;
3582 }
3583
3584 static void b43legacy_one_core_detach(struct ssb_device *dev)
3585 {
3586         struct b43legacy_wldev *wldev;
3587         struct b43legacy_wl *wl;
3588
3589         /* Do not cancel ieee80211-workqueue based work here.
3590          * See comment in b43legacy_remove(). */
3591
3592         wldev = ssb_get_drvdata(dev);
3593         wl = wldev->wl;
3594         b43legacy_debugfs_remove_device(wldev);
3595         b43legacy_wireless_core_detach(wldev);
3596         list_del(&wldev->list);
3597         wl->nr_devs--;
3598         ssb_set_drvdata(dev, NULL);
3599         kfree(wldev);
3600 }
3601
3602 static int b43legacy_one_core_attach(struct ssb_device *dev,
3603                                      struct b43legacy_wl *wl)
3604 {
3605         struct b43legacy_wldev *wldev;
3606         struct pci_dev *pdev;
3607         int err = -ENOMEM;
3608
3609         if (!list_empty(&wl->devlist)) {
3610                 /* We are not the first core on this chip. */
3611                 pdev = dev->bus->host_pci;
3612                 /* Only special chips support more than one wireless
3613                  * core, although some of the other chips have more than
3614                  * one wireless core as well. Check for this and
3615                  * bail out early.
3616                  */
3617                 if (!pdev ||
3618                     ((pdev->device != 0x4321) &&
3619                      (pdev->device != 0x4313) &&
3620                      (pdev->device != 0x431A))) {
3621                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3622                         return -ENODEV;
3623                 }
3624         }
3625
3626         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3627         if (!wldev)
3628                 goto out;
3629
3630         wldev->dev = dev;
3631         wldev->wl = wl;
3632         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3633         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3634         tasklet_init(&wldev->isr_tasklet,
3635                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3636                      (unsigned long)wldev);
3637         if (modparam_pio)
3638                 wldev->__using_pio = 1;
3639         INIT_LIST_HEAD(&wldev->list);
3640
3641         err = b43legacy_wireless_core_attach(wldev);
3642         if (err)
3643                 goto err_kfree_wldev;
3644
3645         list_add(&wldev->list, &wl->devlist);
3646         wl->nr_devs++;
3647         ssb_set_drvdata(dev, wldev);
3648         b43legacy_debugfs_add_device(wldev);
3649 out:
3650         return err;
3651
3652 err_kfree_wldev:
3653         kfree(wldev);
3654         return err;
3655 }
3656
3657 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3658 {
3659         /* boardflags workarounds */
3660         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3661             bus->boardinfo.type == 0x4E &&
3662             bus->boardinfo.rev > 0x40)
3663                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3664 }
3665
3666 static void b43legacy_wireless_exit(struct ssb_device *dev,
3667                                   struct b43legacy_wl *wl)
3668 {
3669         struct ieee80211_hw *hw = wl->hw;
3670
3671         ssb_set_devtypedata(dev, NULL);
3672         ieee80211_free_hw(hw);
3673 }
3674
3675 static int b43legacy_wireless_init(struct ssb_device *dev)
3676 {
3677         struct ssb_sprom *sprom = &dev->bus->sprom;
3678         struct ieee80211_hw *hw;
3679         struct b43legacy_wl *wl;
3680         int err = -ENOMEM;
3681
3682         b43legacy_sprom_fixup(dev->bus);
3683
3684         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3685         if (!hw) {
3686                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3687                 goto out;
3688         }
3689
3690         /* fill hw info */
3691         hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
3692                     IEEE80211_HW_SIGNAL_DBM |
3693                     IEEE80211_HW_NOISE_DBM;
3694         hw->wiphy->interface_modes =
3695                 BIT(NL80211_IFTYPE_AP) |
3696                 BIT(NL80211_IFTYPE_STATION) |
3697                 BIT(NL80211_IFTYPE_WDS) |
3698                 BIT(NL80211_IFTYPE_ADHOC);
3699         hw->queues = 1; /* FIXME: hardware has more queues */
3700         hw->max_altrates = 1;
3701         SET_IEEE80211_DEV(hw, dev->dev);
3702         if (is_valid_ether_addr(sprom->et1mac))
3703                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3704         else
3705                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3706
3707         /* Get and initialize struct b43legacy_wl */
3708         wl = hw_to_b43legacy_wl(hw);
3709         memset(wl, 0, sizeof(*wl));
3710         wl->hw = hw;
3711         spin_lock_init(&wl->irq_lock);
3712         spin_lock_init(&wl->leds_lock);
3713         mutex_init(&wl->mutex);
3714         INIT_LIST_HEAD(&wl->devlist);
3715
3716         ssb_set_devtypedata(dev, wl);
3717         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3718         err = 0;
3719 out:
3720         return err;
3721 }
3722
3723 static int b43legacy_probe(struct ssb_device *dev,
3724                          const struct ssb_device_id *id)
3725 {
3726         struct b43legacy_wl *wl;
3727         int err;
3728         int first = 0;
3729
3730         wl = ssb_get_devtypedata(dev);
3731         if (!wl) {
3732                 /* Probing the first core - setup common struct b43legacy_wl */
3733                 first = 1;
3734                 err = b43legacy_wireless_init(dev);
3735                 if (err)
3736                         goto out;
3737                 wl = ssb_get_devtypedata(dev);
3738                 B43legacy_WARN_ON(!wl);
3739         }
3740         err = b43legacy_one_core_attach(dev, wl);
3741         if (err)
3742                 goto err_wireless_exit;
3743
3744         if (first) {
3745                 err = ieee80211_register_hw(wl->hw);
3746                 if (err)
3747                         goto err_one_core_detach;
3748         }
3749
3750 out:
3751         return err;
3752
3753 err_one_core_detach:
3754         b43legacy_one_core_detach(dev);
3755 err_wireless_exit:
3756         if (first)
3757                 b43legacy_wireless_exit(dev, wl);
3758         return err;
3759 }
3760
3761 static void b43legacy_remove(struct ssb_device *dev)
3762 {
3763         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3764         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3765
3766         /* We must cancel any work here before unregistering from ieee80211,
3767          * as the ieee80211 unreg will destroy the workqueue. */
3768         cancel_work_sync(&wldev->restart_work);
3769
3770         B43legacy_WARN_ON(!wl);
3771         if (wl->current_dev == wldev)
3772                 ieee80211_unregister_hw(wl->hw);
3773
3774         b43legacy_one_core_detach(dev);
3775
3776         if (list_empty(&wl->devlist))
3777                 /* Last core on the chip unregistered.
3778                  * We can destroy common struct b43legacy_wl.
3779                  */
3780                 b43legacy_wireless_exit(dev, wl);
3781 }
3782
3783 /* Perform a hardware reset. This can be called from any context. */
3784 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3785                                   const char *reason)
3786 {
3787         /* Must avoid requeueing, if we are in shutdown. */
3788         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3789                 return;
3790         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3791         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3792 }
3793
3794 #ifdef CONFIG_PM
3795
3796 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3797 {
3798         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3799         struct b43legacy_wl *wl = wldev->wl;
3800
3801         b43legacydbg(wl, "Suspending...\n");
3802
3803         mutex_lock(&wl->mutex);
3804         wldev->suspend_init_status = b43legacy_status(wldev);
3805         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3806                 b43legacy_wireless_core_stop(wldev);
3807         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3808                 b43legacy_wireless_core_exit(wldev);
3809         mutex_unlock(&wl->mutex);
3810
3811         b43legacydbg(wl, "Device suspended.\n");
3812
3813         return 0;
3814 }
3815
3816 static int b43legacy_resume(struct ssb_device *dev)
3817 {
3818         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3819         struct b43legacy_wl *wl = wldev->wl;
3820         int err = 0;
3821
3822         b43legacydbg(wl, "Resuming...\n");
3823
3824         mutex_lock(&wl->mutex);
3825         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3826                 err = b43legacy_wireless_core_init(wldev);
3827                 if (err) {
3828                         b43legacyerr(wl, "Resume failed at core init\n");
3829                         goto out;
3830                 }
3831         }
3832         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3833                 err = b43legacy_wireless_core_start(wldev);
3834                 if (err) {
3835                         b43legacy_wireless_core_exit(wldev);
3836                         b43legacyerr(wl, "Resume failed at core start\n");
3837                         goto out;
3838                 }
3839         }
3840
3841         b43legacydbg(wl, "Device resumed.\n");
3842 out:
3843         mutex_unlock(&wl->mutex);
3844         return err;
3845 }
3846
3847 #else   /* CONFIG_PM */
3848 # define b43legacy_suspend      NULL
3849 # define b43legacy_resume               NULL
3850 #endif  /* CONFIG_PM */
3851
3852 static struct ssb_driver b43legacy_ssb_driver = {
3853         .name           = KBUILD_MODNAME,
3854         .id_table       = b43legacy_ssb_tbl,
3855         .probe          = b43legacy_probe,
3856         .remove         = b43legacy_remove,
3857         .suspend        = b43legacy_suspend,
3858         .resume         = b43legacy_resume,
3859 };
3860
3861 static void b43legacy_print_driverinfo(void)
3862 {
3863         const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3864                    *feat_pio = "", *feat_dma = "";
3865
3866 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3867         feat_pci = "P";
3868 #endif
3869 #ifdef CONFIG_B43LEGACY_LEDS
3870         feat_leds = "L";
3871 #endif
3872 #ifdef CONFIG_B43LEGACY_RFKILL
3873         feat_rfkill = "R";
3874 #endif
3875 #ifdef CONFIG_B43LEGACY_PIO
3876         feat_pio = "I";
3877 #endif
3878 #ifdef CONFIG_B43LEGACY_DMA
3879         feat_dma = "D";
3880 #endif
3881         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3882                "[ Features: %s%s%s%s%s, Firmware-ID: "
3883                B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3884                feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3885 }
3886
3887 static int __init b43legacy_init(void)
3888 {
3889         int err;
3890
3891         b43legacy_debugfs_init();
3892
3893         err = ssb_driver_register(&b43legacy_ssb_driver);
3894         if (err)
3895                 goto err_dfs_exit;
3896
3897         b43legacy_print_driverinfo();
3898
3899         return err;
3900
3901 err_dfs_exit:
3902         b43legacy_debugfs_exit();
3903         return err;
3904 }
3905
3906 static void __exit b43legacy_exit(void)
3907 {
3908         ssb_driver_unregister(&b43legacy_ssb_driver);
3909         b43legacy_debugfs_exit();
3910 }
3911
3912 module_init(b43legacy_init)
3913 module_exit(b43legacy_exit)