SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18 #include "ar9003_mac.h"
  19
  20 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  21
  22 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  23                                              struct ieee80211_hdr *hdr)
  24 {
  25         struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  26         int i;
  27
  28         spin_lock_bh(&sc->wiphy_lock);
  29         for (i = 0; i < sc->num_sec_wiphy; i++) {
  30                 struct ath_wiphy *aphy = sc->sec_wiphy[i];
  31                 if (aphy == NULL)
  32                         continue;
  33                 if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  34                     == 0) {
  35                         hw = aphy->hw;
  36                         break;
  37                 }
  38         }
  39         spin_unlock_bh(&sc->wiphy_lock);
  40         return hw;
  41 }
  42
  43 /*
  44  * Setup and link descriptors.
  45  *
  46  * 11N: we can no longer afford to self link the last descriptor.
  47  * MAC acknowledges BA status as long as it copies frames to host
  48  * buffer (or rx fifo). This can incorrectly acknowledge packets
  49  * to a sender if last desc is self-linked.
  50  */
  51 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         struct ath_common *common = ath9k_hw_common(ah);
  55         struct ath_desc *ds;
  56         struct sk_buff *skb;
  57
  58         ATH_RXBUF_RESET(bf);
  59
  60         ds = bf->bf_desc;
  61         ds->ds_link = 0; /* link to null */
  62         ds->ds_data = bf->bf_buf_addr;
  63
  64         /* virtual addr of the beginning of the buffer. */
  65         skb = bf->bf_mpdu;
  66         BUG_ON(skb == NULL);
  67         ds->ds_vdata = skb->data;
  68
  69         /*
  70          * setup rx descriptors. The rx_bufsize here tells the hardware
  71          * how much data it can DMA to us and that we are prepared
  72          * to process
  73          */
  74         ath9k_hw_setuprxdesc(ah, ds,
  75                              common->rx_bufsize,
  76                              0);
  77
  78         if (sc->rx.rxlink == NULL)
  79                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  80         else
  81                 *sc->rx.rxlink = bf->bf_daddr;
  82
  83         sc->rx.rxlink = &ds->ds_link;
  84         ath9k_hw_rxena(ah);
  85 }
  86
  87 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  88 {
  89         /* XXX block beacon interrupts */
  90         ath9k_hw_setantenna(sc->sc_ah, antenna);
  91         sc->rx.defant = antenna;
  92         sc->rx.rxotherant = 0;
  93 }
  94
  95 static void ath_opmode_init(struct ath_softc *sc)
  96 {
  97         struct ath_hw *ah = sc->sc_ah;
  98         struct ath_common *common = ath9k_hw_common(ah);
  99
 100         u32 rfilt, mfilt[2];
 101
 102         /* configure rx filter */
 103         rfilt = ath_calcrxfilter(sc);
 104         ath9k_hw_setrxfilter(ah, rfilt);
 105
 106         /* configure bssid mask */
 107         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
 108                 ath_hw_setbssidmask(common);
 109
 110         /* configure operational mode */
 111         ath9k_hw_setopmode(ah);
 112
 113         /* Handle any link-level address change. */
 114         ath9k_hw_setmac(ah, common->macaddr);
 115
 116         /* calculate and install multicast filter */
 117         mfilt[0] = mfilt[1] = ~0;
 118         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 119 }
 120
 121 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 122                                  enum ath9k_rx_qtype qtype)
 123 {
 124         struct ath_hw *ah = sc->sc_ah;
 125         struct ath_rx_edma *rx_edma;
 126         struct sk_buff *skb;
 127         struct ath_buf *bf;
 128
 129         rx_edma = &sc->rx.rx_edma[qtype];
 130         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 131                 return false;
 132
 133         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 134         list_del_init(&bf->list);
 135
 136         skb = bf->bf_mpdu;
 137
 138         ATH_RXBUF_RESET(bf);
 139         memset(skb->data, 0, ah->caps.rx_status_len);
 140         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 141                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 142
 143         SKB_CB_ATHBUF(skb) = bf;
 144         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 145         skb_queue_tail(&rx_edma->rx_fifo, skb);
 146
 147         return true;
 148 }
 149
 150 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 151                                   enum ath9k_rx_qtype qtype, int size)
 152 {
 153         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 154         u32 nbuf = 0;
 155
 156         if (list_empty(&sc->rx.rxbuf)) {
 157                 ath_print(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 158                 return;
 159         }
 160
 161         while (!list_empty(&sc->rx.rxbuf)) {
 162                 nbuf++;
 163
 164                 if (!ath_rx_edma_buf_link(sc, qtype))
 165                         break;
 166
 167                 if (nbuf >= size)
 168                         break;
 169         }
 170 }
 171
 172 static void ath_rx_remove_buffer(struct ath_softc *sc,
 173                                  enum ath9k_rx_qtype qtype)
 174 {
 175         struct ath_buf *bf;
 176         struct ath_rx_edma *rx_edma;
 177         struct sk_buff *skb;
 178
 179         rx_edma = &sc->rx.rx_edma[qtype];
 180
 181         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 182                 bf = SKB_CB_ATHBUF(skb);
 183                 BUG_ON(!bf);
 184                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 185         }
 186 }
 187
 188 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 189 {
 190         struct ath_buf *bf;
 191
 192         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 193         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 194
 195         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 196                 if (bf->bf_mpdu)
 197                         dev_kfree_skb_any(bf->bf_mpdu);
 198         }
 199
 200         INIT_LIST_HEAD(&sc->rx.rxbuf);
 201
 202         kfree(sc->rx.rx_bufptr);
 203         sc->rx.rx_bufptr = NULL;
 204 }
 205
 206 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 207 {
 208         skb_queue_head_init(&rx_edma->rx_fifo);
 209         skb_queue_head_init(&rx_edma->rx_buffers);
 210         rx_edma->rx_fifo_hwsize = size;
 211 }
 212
 213 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 214 {
 215         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 216         struct ath_hw *ah = sc->sc_ah;
 217         struct sk_buff *skb;
 218         struct ath_buf *bf;
 219         int error = 0, i;
 220         u32 size;
 221
 222
 223         common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN +
 224                                      ah->caps.rx_status_len,
 225                                      min(common->cachelsz, (u16)64));
 226
 227         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 228                                     ah->caps.rx_status_len);
 229
 230         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 231                                ah->caps.rx_lp_qdepth);
 232         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 233                                ah->caps.rx_hp_qdepth);
 234
 235         size = sizeof(struct ath_buf) * nbufs;
 236         bf = kzalloc(size, GFP_KERNEL);
 237         if (!bf)
 238                 return -ENOMEM;
 239
 240         INIT_LIST_HEAD(&sc->rx.rxbuf);
 241         sc->rx.rx_bufptr = bf;
 242
 243         for (i = 0; i < nbufs; i++, bf++) {
 244                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 245                 if (!skb) {
 246                         error = -ENOMEM;
 247                         goto rx_init_fail;
 248                 }
 249
 250                 memset(skb->data, 0, common->rx_bufsize);
 251                 bf->bf_mpdu = skb;
 252
 253                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 254                                                  common->rx_bufsize,
 255                                                  DMA_BIDIRECTIONAL);
 256                 if (unlikely(dma_mapping_error(sc->dev,
 257                                                 bf->bf_buf_addr))) {
 258                                 dev_kfree_skb_any(skb);
 259                                 bf->bf_mpdu = NULL;
 260                                 ath_print(common, ATH_DBG_FATAL,
 261                                         "dma_mapping_error() on RX init\n");
 262                                 error = -ENOMEM;
 263                                 goto rx_init_fail;
 264                 }
 265
 266                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 267         }
 268
 269         return 0;
 270
 271 rx_init_fail:
 272         ath_rx_edma_cleanup(sc);
 273         return error;
 274 }
 275
 276 static void ath_edma_start_recv(struct ath_softc *sc)
 277 {
 278         spin_lock_bh(&sc->rx.rxbuflock);
 279
 280         ath9k_hw_rxena(sc->sc_ah);
 281
 282         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 283                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 284
 285         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 286                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 287
 288         spin_unlock_bh(&sc->rx.rxbuflock);
 289
 290         ath_opmode_init(sc);
 291
 292         ath9k_hw_startpcureceive(sc->sc_ah);
 293 }
 294
 295 static void ath_edma_stop_recv(struct ath_softc *sc)
 296 {
 297         spin_lock_bh(&sc->rx.rxbuflock);
 298         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 299         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 300         spin_unlock_bh(&sc->rx.rxbuflock);
 301 }
 302
 303 int ath_rx_init(struct ath_softc *sc, int nbufs)
 304 {
 305         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 306         struct sk_buff *skb;
 307         struct ath_buf *bf;
 308         int error = 0;
 309
 310         spin_lock_init(&sc->rx.rxflushlock);
 311         sc->sc_flags &= ~SC_OP_RXFLUSH;
 312         spin_lock_init(&sc->rx.rxbuflock);
 313
 314         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 315                 return ath_rx_edma_init(sc, nbufs);
 316         } else {
 317                 common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
 318                                 min(common->cachelsz, (u16)64));
 319
 320                 ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 321                                 common->cachelsz, common->rx_bufsize);
 322
 323                 /* Initialize rx descriptors */
 324
 325                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 326                                 "rx", nbufs, 1, 0);
 327                 if (error != 0) {
 328                         ath_print(common, ATH_DBG_FATAL,
 329                                   "failed to allocate rx descriptors: %d\n",
 330                                   error);
 331                         goto err;
 332                 }
 333
 334                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 335                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 336                                               GFP_KERNEL);
 337                         if (skb == NULL) {
 338                                 error = -ENOMEM;
 339                                 goto err;
 340                         }
 341
 342                         bf->bf_mpdu = skb;
 343                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 344                                         common->rx_bufsize,
 345                                         DMA_FROM_DEVICE);
 346                         if (unlikely(dma_mapping_error(sc->dev,
 347                                                         bf->bf_buf_addr))) {
 348                                 dev_kfree_skb_any(skb);
 349                                 bf->bf_mpdu = NULL;
 350                                 ath_print(common, ATH_DBG_FATAL,
 351                                           "dma_mapping_error() on RX init\n");
 352                                 error = -ENOMEM;
 353                                 goto err;
 354                         }
 355                         bf->bf_dmacontext = bf->bf_buf_addr;
 356                 }
 357                 sc->rx.rxlink = NULL;
 358         }
 359
 360 err:
 361         if (error)
 362                 ath_rx_cleanup(sc);
 363
 364         return error;
 365 }
 366
 367 void ath_rx_cleanup(struct ath_softc *sc)
 368 {
 369         struct ath_hw *ah = sc->sc_ah;
 370         struct ath_common *common = ath9k_hw_common(ah);
 371         struct sk_buff *skb;
 372         struct ath_buf *bf;
 373
 374         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 375                 ath_rx_edma_cleanup(sc);
 376                 return;
 377         } else {
 378                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 379                         skb = bf->bf_mpdu;
 380                         if (skb) {
 381                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 382                                                 common->rx_bufsize,
 383                                                 DMA_FROM_DEVICE);
 384                                 dev_kfree_skb(skb);
 385                         }
 386                 }
 387
 388                 if (sc->rx.rxdma.dd_desc_len != 0)
 389                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 390         }
 391 }
 392
 393 /*
 394  * Calculate the receive filter according to the
 395  * operating mode and state:
 396  *
 397  * o always accept unicast, broadcast, and multicast traffic
 398  * o maintain current state of phy error reception (the hal
 399  *   may enable phy error frames for noise immunity work)
 400  * o probe request frames are accepted only when operating in
 401  *   hostap, adhoc, or monitor modes
 402  * o enable promiscuous mode according to the interface state
 403  * o accept beacons:
 404  *   - when operating in adhoc mode so the 802.11 layer creates
 405  *     node table entries for peers,
 406  *   - when operating in station mode for collecting rssi data when
 407  *     the station is otherwise quiet, or
 408  *   - when operating as a repeater so we see repeater-sta beacons
 409  *   - when scanning
 410  */
 411
 412 u32 ath_calcrxfilter(struct ath_softc *sc)
 413 {
 414 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
 415
 416         u32 rfilt;
 417
 418         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
 419                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 420                 | ATH9K_RX_FILTER_MCAST;
 421
 422         /* If not a STA, enable processing of Probe Requests */
 423         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
 424                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 425
 426         /*
 427          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 428          * mode interface or when in monitor mode. AP mode does not need this
 429          * since it receives all in-BSS frames anyway.
 430          */
 431         if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
 432              (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
 433             (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
 434                 rfilt |= ATH9K_RX_FILTER_PROM;
 435
 436         if (sc->rx.rxfilter & FIF_CONTROL)
 437                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 438
 439         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 440             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 441                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 442         else
 443                 rfilt |= ATH9K_RX_FILTER_BEACON;
 444
 445         if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
 446             AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
 447             (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
 448             (sc->rx.rxfilter & FIF_PSPOLL))
 449                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 450
 451         if (conf_is_ht(&sc->hw->conf))
 452                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 453
 454         if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 455                 /* TODO: only needed if more than one BSSID is in use in
 456                  * station/adhoc mode */
 457                 /* The following may also be needed for other older chips */
 458                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 459                         rfilt |= ATH9K_RX_FILTER_PROM;
 460                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 461         }
 462
 463         return rfilt;
 464
 465 #undef RX_FILTER_PRESERVE
 466 }
 467
 468 int ath_startrecv(struct ath_softc *sc)
 469 {
 470         struct ath_hw *ah = sc->sc_ah;
 471         struct ath_buf *bf, *tbf;
 472
 473         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 474                 ath_edma_start_recv(sc);
 475                 return 0;
 476         }
 477
 478         spin_lock_bh(&sc->rx.rxbuflock);
 479         if (list_empty(&sc->rx.rxbuf))
 480                 goto start_recv;
 481
 482         sc->rx.rxlink = NULL;
 483         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 484                 ath_rx_buf_link(sc, bf);
 485         }
 486
 487         /* We could have deleted elements so the list may be empty now */
 488         if (list_empty(&sc->rx.rxbuf))
 489                 goto start_recv;
 490
 491         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 492         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 493         ath9k_hw_rxena(ah);
 494
 495 start_recv:
 496         spin_unlock_bh(&sc->rx.rxbuflock);
 497         ath_opmode_init(sc);
 498         ath9k_hw_startpcureceive(ah);
 499
 500         return 0;
 501 }
 502
 503 bool ath_stoprecv(struct ath_softc *sc)
 504 {
 505         struct ath_hw *ah = sc->sc_ah;
 506         bool stopped;
 507
 508         ath9k_hw_stoppcurecv(ah);
 509         ath9k_hw_setrxfilter(ah, 0);
 510         stopped = ath9k_hw_stopdmarecv(ah);
 511
 512         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 513                 ath_edma_stop_recv(sc);
 514         else
 515                 sc->rx.rxlink = NULL;
 516
 517         return stopped;
 518 }
 519
 520 void ath_flushrecv(struct ath_softc *sc)
 521 {
 522         spin_lock_bh(&sc->rx.rxflushlock);
 523         sc->sc_flags |= SC_OP_RXFLUSH;
 524         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 525                 ath_rx_tasklet(sc, 1, true);
 526         ath_rx_tasklet(sc, 1, false);
 527         sc->sc_flags &= ~SC_OP_RXFLUSH;
 528         spin_unlock_bh(&sc->rx.rxflushlock);
 529 }
 530
 531 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 532 {
 533         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 534         struct ieee80211_mgmt *mgmt;
 535         u8 *pos, *end, id, elen;
 536         struct ieee80211_tim_ie *tim;
 537
 538         mgmt = (struct ieee80211_mgmt *)skb->data;
 539         pos = mgmt->u.beacon.variable;
 540         end = skb->data + skb->len;
 541
 542         while (pos + 2 < end) {
 543                 id = *pos++;
 544                 elen = *pos++;
 545                 if (pos + elen > end)
 546                         break;
 547
 548                 if (id == WLAN_EID_TIM) {
 549                         if (elen < sizeof(*tim))
 550                                 break;
 551                         tim = (struct ieee80211_tim_ie *) pos;
 552                         if (tim->dtim_count != 0)
 553                                 break;
 554                         return tim->bitmap_ctrl & 0x01;
 555                 }
 556
 557                 pos += elen;
 558         }
 559
 560         return false;
 561 }
 562
 563 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 564 {
 565         struct ieee80211_mgmt *mgmt;
 566         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 567
 568         if (skb->len < 24 + 8 + 2 + 2)
 569                 return;
 570
 571         mgmt = (struct ieee80211_mgmt *)skb->data;
 572         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
 573                 return; /* not from our current AP */
 574
 575         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 576
 577         if (sc->ps_flags & PS_BEACON_SYNC) {
 578                 sc->ps_flags &= ~PS_BEACON_SYNC;
 579                 ath_print(common, ATH_DBG_PS,
 580                           "Reconfigure Beacon timers based on "
 581                           "timestamp from the AP\n");
 582                 ath_beacon_config(sc, NULL);
 583         }
 584
 585         if (ath_beacon_dtim_pending_cab(skb)) {
 586                 /*
 587                  * Remain awake waiting for buffered broadcast/multicast
 588                  * frames. If the last broadcast/multicast frame is not
 589                  * received properly, the next beacon frame will work as
 590                  * a backup trigger for returning into NETWORK SLEEP state,
 591                  * so we are waiting for it as well.
 592                  */
 593                 ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
 594                           "buffered broadcast/multicast frame(s)\n");
 595                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 596                 return;
 597         }
 598
 599         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 600                 /*
 601                  * This can happen if a broadcast frame is dropped or the AP
 602                  * fails to send a frame indicating that all CAB frames have
 603                  * been delivered.
 604                  */
 605                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 606                 ath_print(common, ATH_DBG_PS,
 607                           "PS wait for CAB frames timed out\n");
 608         }
 609 }
 610
 611 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
 612 {
 613         struct ieee80211_hdr *hdr;
 614         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 615
 616         hdr = (struct ieee80211_hdr *)skb->data;
 617
 618         /* Process Beacon and CAB receive in PS state */
 619         if ((sc->ps_flags & PS_WAIT_FOR_BEACON) &&
 620             ieee80211_is_beacon(hdr->frame_control))
 621                 ath_rx_ps_beacon(sc, skb);
 622         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 623                  (ieee80211_is_data(hdr->frame_control) ||
 624                   ieee80211_is_action(hdr->frame_control)) &&
 625                  is_multicast_ether_addr(hdr->addr1) &&
 626                  !ieee80211_has_moredata(hdr->frame_control)) {
 627                 /*
 628                  * No more broadcast/multicast frames to be received at this
 629                  * point.
 630                  */
 631                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 632                 ath_print(common, ATH_DBG_PS,
 633                           "All PS CAB frames received, back to sleep\n");
 634         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 635                    !is_multicast_ether_addr(hdr->addr1) &&
 636                    !ieee80211_has_morefrags(hdr->frame_control)) {
 637                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 638                 ath_print(common, ATH_DBG_PS,
 639                           "Going back to sleep after having received "
 640                           "PS-Poll data (0x%lx)\n",
 641                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 642                                         PS_WAIT_FOR_CAB |
 643                                         PS_WAIT_FOR_PSPOLL_DATA |
 644                                         PS_WAIT_FOR_TX_ACK));
 645         }
 646 }
 647
 648 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
 649                                     struct ath_softc *sc, struct sk_buff *skb,
 650                                     struct ieee80211_rx_status *rxs)
 651 {
 652         struct ieee80211_hdr *hdr;
 653
 654         hdr = (struct ieee80211_hdr *)skb->data;
 655
 656         /* Send the frame to mac80211 */
 657         if (is_multicast_ether_addr(hdr->addr1)) {
 658                 int i;
 659                 /*
 660                  * Deliver broadcast/multicast frames to all suitable
 661                  * virtual wiphys.
 662                  */
 663                 /* TODO: filter based on channel configuration */
 664                 for (i = 0; i < sc->num_sec_wiphy; i++) {
 665                         struct ath_wiphy *aphy = sc->sec_wiphy[i];
 666                         struct sk_buff *nskb;
 667                         if (aphy == NULL)
 668                                 continue;
 669                         nskb = skb_copy(skb, GFP_ATOMIC);
 670                         if (!nskb)
 671                                 continue;
 672                         ieee80211_rx(aphy->hw, nskb);
 673                 }
 674                 ieee80211_rx(sc->hw, skb);
 675         } else
 676                 /* Deliver unicast frames based on receiver address */
 677                 ieee80211_rx(hw, skb);
 678 }
 679
 680 static bool ath_edma_get_buffers(struct ath_softc *sc,
 681                                  enum ath9k_rx_qtype qtype)
 682 {
 683         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 684         struct ath_hw *ah = sc->sc_ah;
 685         struct ath_common *common = ath9k_hw_common(ah);
 686         struct sk_buff *skb;
 687         struct ath_buf *bf;
 688         int ret;
 689
 690         skb = skb_peek(&rx_edma->rx_fifo);
 691         if (!skb)
 692                 return false;
 693
 694         bf = SKB_CB_ATHBUF(skb);
 695         BUG_ON(!bf);
 696
 697         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 698                                 common->rx_bufsize, DMA_FROM_DEVICE);
 699
 700         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 701         if (ret == -EINPROGRESS)
 702                 return false;
 703
 704         __skb_unlink(skb, &rx_edma->rx_fifo);
 705         if (ret == -EINVAL) {
 706                 /* corrupt descriptor, skip this one and the following one */
 707                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 708                 ath_rx_edma_buf_link(sc, qtype);
 709                 skb = skb_peek(&rx_edma->rx_fifo);
 710                 if (!skb)
 711                         return true;
 712
 713                 bf = SKB_CB_ATHBUF(skb);
 714                 BUG_ON(!bf);
 715
 716                 __skb_unlink(skb, &rx_edma->rx_fifo);
 717                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 718                 ath_rx_edma_buf_link(sc, qtype);
 719                 return true;
 720         }
 721         skb_queue_tail(&rx_edma->rx_buffers, skb);
 722
 723         return true;
 724 }
 725
 726 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 727                                                 struct ath_rx_status *rs,
 728                                                 enum ath9k_rx_qtype qtype)
 729 {
 730         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 731         struct sk_buff *skb;
 732         struct ath_buf *bf;
 733
 734         while (ath_edma_get_buffers(sc, qtype));
 735         skb = __skb_dequeue(&rx_edma->rx_buffers);
 736         if (!skb)
 737                 return NULL;
 738
 739         bf = SKB_CB_ATHBUF(skb);
 740         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 741         return bf;
 742 }
 743
 744 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 745                                            struct ath_rx_status *rs)
 746 {
 747         struct ath_hw *ah = sc->sc_ah;
 748         struct ath_common *common = ath9k_hw_common(ah);
 749         struct ath_desc *ds;
 750         struct ath_buf *bf;
 751         int ret;
 752
 753         if (list_empty(&sc->rx.rxbuf)) {
 754                 sc->rx.rxlink = NULL;
 755                 return NULL;
 756         }
 757
 758         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 759         ds = bf->bf_desc;
 760
 761         /*
 762          * Must provide the virtual address of the current
 763          * descriptor, the physical address, and the virtual
 764          * address of the next descriptor in the h/w chain.
 765          * This allows the HAL to look ahead to see if the
 766          * hardware is done with a descriptor by checking the
 767          * done bit in the following descriptor and the address
 768          * of the current descriptor the DMA engine is working
 769          * on.  All this is necessary because of our use of
 770          * a self-linked list to avoid rx overruns.
 771          */
 772         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
 773         if (ret == -EINPROGRESS) {
 774                 struct ath_rx_status trs;
 775                 struct ath_buf *tbf;
 776                 struct ath_desc *tds;
 777
 778                 memset(&trs, 0, sizeof(trs));
 779                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 780                         sc->rx.rxlink = NULL;
 781                         return NULL;
 782                 }
 783
 784                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 785
 786                 /*
 787                  * On some hardware the descriptor status words could
 788                  * get corrupted, including the done bit. Because of
 789                  * this, check if the next descriptor's done bit is
 790                  * set or not.
 791                  *
 792                  * If the next descriptor's done bit is set, the current
 793                  * descriptor has been corrupted. Force s/w to discard
 794                  * this descriptor and continue...
 795                  */
 796
 797                 tds = tbf->bf_desc;
 798                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
 799                 if (ret == -EINPROGRESS)
 800                         return NULL;
 801         }
 802
 803         if (!bf->bf_mpdu)
 804                 return bf;
 805
 806         /*
 807          * Synchronize the DMA transfer with CPU before
 808          * 1. accessing the frame
 809          * 2. requeueing the same buffer to h/w
 810          */
 811         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 812                         common->rx_bufsize,
 813                         DMA_FROM_DEVICE);
 814
 815         return bf;
 816 }
 817
 818
 819 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
 820 {
 821         struct ath_buf *bf;
 822         struct sk_buff *skb = NULL, *requeue_skb;
 823         struct ieee80211_rx_status *rxs;
 824         struct ath_hw *ah = sc->sc_ah;
 825         struct ath_common *common = ath9k_hw_common(ah);
 826         /*
 827          * The hw can techncically differ from common->hw when using ath9k
 828          * virtual wiphy so to account for that we iterate over the active
 829          * wiphys and find the appropriate wiphy and therefore hw.
 830          */
 831         struct ieee80211_hw *hw = NULL;
 832         struct ieee80211_hdr *hdr;
 833         int retval;
 834         bool decrypt_error = false;
 835         struct ath_rx_status rs;
 836         enum ath9k_rx_qtype qtype;
 837         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
 838         int dma_type;
 839
 840         if (edma)
 841                 dma_type = DMA_FROM_DEVICE;
 842         else
 843                 dma_type = DMA_BIDIRECTIONAL;
 844
 845         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
 846         spin_lock_bh(&sc->rx.rxbuflock);
 847
 848         do {
 849                 /* If handling rx interrupt and flush is in progress => exit */
 850                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
 851                         break;
 852
 853                 memset(&rs, 0, sizeof(rs));
 854                 if (edma)
 855                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
 856                 else
 857                         bf = ath_get_next_rx_buf(sc, &rs);
 858
 859                 if (!bf)
 860                         break;
 861
 862                 skb = bf->bf_mpdu;
 863                 if (!skb)
 864                         continue;
 865
 866                 hdr = (struct ieee80211_hdr *) skb->data;
 867                 rxs =  IEEE80211_SKB_RXCB(skb);
 868
 869                 hw = ath_get_virt_hw(sc, hdr);
 870
 871                 ath_debug_stat_rx(sc, &rs);
 872
 873                 /*
 874                  * If we're asked to flush receive queue, directly
 875                  * chain it back at the queue without processing it.
 876                  */
 877                 if (flush)
 878                         goto requeue;
 879
 880                 retval = ath9k_cmn_rx_skb_preprocess(common, hw, skb, &rs,
 881                                                      rxs, &decrypt_error);
 882                 if (retval)
 883                         goto requeue;
 884
 885                 /* Ensure we always have an skb to requeue once we are done
 886                  * processing the current buffer's skb */
 887                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
 888
 889                 /* If there is no memory we ignore the current RX'd frame,
 890                  * tell hardware it can give us a new frame using the old
 891                  * skb and put it at the tail of the sc->rx.rxbuf list for
 892                  * processing. */
 893                 if (!requeue_skb)
 894                         goto requeue;
 895
 896                 /* Unmap the frame */
 897                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 898                                  common->rx_bufsize,
 899                                  dma_type);
 900
 901                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
 902                 if (ah->caps.rx_status_len)
 903                         skb_pull(skb, ah->caps.rx_status_len);
 904
 905                 ath9k_cmn_rx_skb_postprocess(common, skb, &rs,
 906                                              rxs, decrypt_error);
 907
 908                 /* We will now give hardware our shiny new allocated skb */
 909                 bf->bf_mpdu = requeue_skb;
 910                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
 911                                                  common->rx_bufsize,
 912                                                  dma_type);
 913                 if (unlikely(dma_mapping_error(sc->dev,
 914                           bf->bf_buf_addr))) {
 915                         dev_kfree_skb_any(requeue_skb);
 916                         bf->bf_mpdu = NULL;
 917                         ath_print(common, ATH_DBG_FATAL,
 918                                   "dma_mapping_error() on RX\n");
 919                         ath_rx_send_to_mac80211(hw, sc, skb, rxs);
 920                         break;
 921                 }
 922                 bf->bf_dmacontext = bf->bf_buf_addr;
 923
 924                 /*
 925                  * change the default rx antenna if rx diversity chooses the
 926                  * other antenna 3 times in a row.
 927                  */
 928                 if (sc->rx.defant != rs.rs_antenna) {
 929                         if (++sc->rx.rxotherant >= 3)
 930                                 ath_setdefantenna(sc, rs.rs_antenna);
 931                 } else {
 932                         sc->rx.rxotherant = 0;
 933                 }
 934
 935                 if (unlikely(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 936                                              PS_WAIT_FOR_CAB |
 937                                              PS_WAIT_FOR_PSPOLL_DATA)))
 938                         ath_rx_ps(sc, skb);
 939
 940                 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
 941
 942 requeue:
 943                 if (edma) {
 944                         list_add_tail(&bf->list, &sc->rx.rxbuf);
 945                         ath_rx_edma_buf_link(sc, qtype);
 946                 } else {
 947                         list_move_tail(&bf->list, &sc->rx.rxbuf);
 948                         ath_rx_buf_link(sc, bf);
 949                 }
 950         } while (1);
 951
 952         spin_unlock_bh(&sc->rx.rxbuflock);
 953
 954         return 0;
 955 }