SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_enabled &&
 147             !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 /*
 158  * Set/change channels.  If the channel is really being changed, it's done
 159  * by reseting the chip.  To accomplish this we must first cleanup any pending
 160  * DMA, then restart stuff.
 161 */
 162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 163                     struct ath9k_channel *hchan)
 164 {
 165         struct ath_hw *ah = sc->sc_ah;
 166         struct ath_common *common = ath9k_hw_common(ah);
 167         struct ieee80211_conf *conf = &common->hw->conf;
 168         bool fastcc = true, stopped;
 169         struct ieee80211_channel *channel = hw->conf.channel;
 170         int r;
 171
 172         if (sc->sc_flags & SC_OP_INVALID)
 173                 return -EIO;
 174
 175         ath9k_ps_wakeup(sc);
 176
 177         /*
 178          * This is only performed if the channel settings have
 179          * actually changed.
 180          *
 181          * To switch channels clear any pending DMA operations;
 182          * wait long enough for the RX fifo to drain, reset the
 183          * hardware at the new frequency, and then re-enable
 184          * the relevant bits of the h/w.
 185          */
 186         ath9k_hw_set_interrupts(ah, 0);
 187         ath_drain_all_txq(sc, false);
 188         stopped = ath_stoprecv(sc);
 189
 190         /* XXX: do not flush receive queue here. We don't want
 191          * to flush data frames already in queue because of
 192          * changing channel. */
 193
 194         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 195                 fastcc = false;
 196
 197         ath_print(common, ATH_DBG_CONFIG,
 198                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 199                   sc->sc_ah->curchan->channel,
 200                   channel->center_freq, conf_is_ht40(conf));
 201
 202         spin_lock_bh(&sc->sc_resetlock);
 203
 204         r = ath9k_hw_reset(ah, hchan, fastcc);
 205         if (r) {
 206                 ath_print(common, ATH_DBG_FATAL,
 207                           "Unable to reset channel (%u Mhz) "
 208                           "reset status %d\n",
 209                           channel->center_freq, r);
 210                 spin_unlock_bh(&sc->sc_resetlock);
 211                 goto ps_restore;
 212         }
 213         spin_unlock_bh(&sc->sc_resetlock);
 214
 215         sc->sc_flags &= ~SC_OP_FULL_RESET;
 216
 217         if (ath_startrecv(sc) != 0) {
 218                 ath_print(common, ATH_DBG_FATAL,
 219                           "Unable to restart recv logic\n");
 220                 r = -EIO;
 221                 goto ps_restore;
 222         }
 223
 224         ath_cache_conf_rate(sc, &hw->conf);
 225         ath_update_txpow(sc);
 226         ath9k_hw_set_interrupts(ah, sc->imask);
 227
 228  ps_restore:
 229         ath9k_ps_restore(sc);
 230         return r;
 231 }
 232
 233 /*
 234  *  This routine performs the periodic noise floor calibration function
 235  *  that is used to adjust and optimize the chip performance.  This
 236  *  takes environmental changes (location, temperature) into account.
 237  *  When the task is complete, it reschedules itself depending on the
 238  *  appropriate interval that was calculated.
 239  */
 240 void ath_ani_calibrate(unsigned long data)
 241 {
 242         struct ath_softc *sc = (struct ath_softc *)data;
 243         struct ath_hw *ah = sc->sc_ah;
 244         struct ath_common *common = ath9k_hw_common(ah);
 245         bool longcal = false;
 246         bool shortcal = false;
 247         bool aniflag = false;
 248         unsigned int timestamp = jiffies_to_msecs(jiffies);
 249         u32 cal_interval, short_cal_interval;
 250
 251         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 252                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 253
 254         /* Only calibrate if awake */
 255         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 256                 goto set_timer;
 257
 258         ath9k_ps_wakeup(sc);
 259
 260         /* Long calibration runs independently of short calibration. */
 261         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 262                 longcal = true;
 263                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 264                 common->ani.longcal_timer = timestamp;
 265         }
 266
 267         /* Short calibration applies only while caldone is false */
 268         if (!common->ani.caldone) {
 269                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 270                         shortcal = true;
 271                         ath_print(common, ATH_DBG_ANI,
 272                                   "shortcal @%lu\n", jiffies);
 273                         common->ani.shortcal_timer = timestamp;
 274                         common->ani.resetcal_timer = timestamp;
 275                 }
 276         } else {
 277                 if ((timestamp - common->ani.resetcal_timer) >=
 278                     ATH_RESTART_CALINTERVAL) {
 279                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 280                         if (common->ani.caldone)
 281                                 common->ani.resetcal_timer = timestamp;
 282                 }
 283         }
 284
 285         /* Verify whether we must check ANI */
 286         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 287                 aniflag = true;
 288                 common->ani.checkani_timer = timestamp;
 289         }
 290
 291         /* Skip all processing if there's nothing to do. */
 292         if (longcal || shortcal || aniflag) {
 293                 /* Call ANI routine if necessary */
 294                 if (aniflag)
 295                         ath9k_hw_ani_monitor(ah, ah->curchan);
 296
 297                 /* Perform calibration if necessary */
 298                 if (longcal || shortcal) {
 299                         common->ani.caldone =
 300                                 ath9k_hw_calibrate(ah,
 301                                                    ah->curchan,
 302                                                    common->rx_chainmask,
 303                                                    longcal);
 304
 305                         if (longcal)
 306                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 307                                                                      ah->curchan);
 308
 309                         ath_print(common, ATH_DBG_ANI,
 310                                   " calibrate chan %u/%x nf: %d\n",
 311                                   ah->curchan->channel,
 312                                   ah->curchan->channelFlags,
 313                                   common->ani.noise_floor);
 314                 }
 315         }
 316
 317         ath9k_ps_restore(sc);
 318
 319 set_timer:
 320         /*
 321         * Set timer interval based on previous results.
 322         * The interval must be the shortest necessary to satisfy ANI,
 323         * short calibration and long calibration.
 324         */
 325         cal_interval = ATH_LONG_CALINTERVAL;
 326         if (sc->sc_ah->config.enable_ani)
 327                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 328         if (!common->ani.caldone)
 329                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 330
 331         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 332 }
 333
 334 static void ath_start_ani(struct ath_common *common)
 335 {
 336         unsigned long timestamp = jiffies_to_msecs(jiffies);
 337
 338         common->ani.longcal_timer = timestamp;
 339         common->ani.shortcal_timer = timestamp;
 340         common->ani.checkani_timer = timestamp;
 341
 342         mod_timer(&common->ani.timer,
 343                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 344 }
 345
 346 /*
 347  * Update tx/rx chainmask. For legacy association,
 348  * hard code chainmask to 1x1, for 11n association, use
 349  * the chainmask configuration, for bt coexistence, use
 350  * the chainmask configuration even in legacy mode.
 351  */
 352 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 353 {
 354         struct ath_hw *ah = sc->sc_ah;
 355         struct ath_common *common = ath9k_hw_common(ah);
 356
 357         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 358             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 359                 common->tx_chainmask = ah->caps.tx_chainmask;
 360                 common->rx_chainmask = ah->caps.rx_chainmask;
 361         } else {
 362                 common->tx_chainmask = 1;
 363                 common->rx_chainmask = 1;
 364         }
 365
 366         ath_print(common, ATH_DBG_CONFIG,
 367                   "tx chmask: %d, rx chmask: %d\n",
 368                   common->tx_chainmask,
 369                   common->rx_chainmask);
 370 }
 371
 372 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 373 {
 374         struct ath_node *an;
 375
 376         an = (struct ath_node *)sta->drv_priv;
 377
 378         if (sc->sc_flags & SC_OP_TXAGGR) {
 379                 ath_tx_node_init(sc, an);
 380                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 381                                      sta->ht_cap.ampdu_factor);
 382                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 383                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 384         }
 385 }
 386
 387 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 388 {
 389         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 390
 391         if (sc->sc_flags & SC_OP_TXAGGR)
 392                 ath_tx_node_cleanup(sc, an);
 393 }
 394
 395 void ath9k_tasklet(unsigned long data)
 396 {
 397         struct ath_softc *sc = (struct ath_softc *)data;
 398         struct ath_hw *ah = sc->sc_ah;
 399         struct ath_common *common = ath9k_hw_common(ah);
 400
 401         u32 status = sc->intrstatus;
 402
 403         ath9k_ps_wakeup(sc);
 404
 405         if (status & ATH9K_INT_FATAL) {
 406                 ath_reset(sc, false);
 407                 ath9k_ps_restore(sc);
 408                 return;
 409         }
 410
 411         if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
 412                 spin_lock_bh(&sc->rx.rxflushlock);
 413                 ath_rx_tasklet(sc, 0);
 414                 spin_unlock_bh(&sc->rx.rxflushlock);
 415         }
 416
 417         if (status & ATH9K_INT_TX)
 418                 ath_tx_tasklet(sc);
 419
 420         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 421                 /*
 422                  * TSF sync does not look correct; remain awake to sync with
 423                  * the next Beacon.
 424                  */
 425                 ath_print(common, ATH_DBG_PS,
 426                           "TSFOOR - Sync with next Beacon\n");
 427                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 428         }
 429
 430         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 431                 if (status & ATH9K_INT_GENTIMER)
 432                         ath_gen_timer_isr(sc->sc_ah);
 433
 434         /* re-enable hardware interrupt */
 435         ath9k_hw_set_interrupts(ah, sc->imask);
 436         ath9k_ps_restore(sc);
 437 }
 438
 439 irqreturn_t ath_isr(int irq, void *dev)
 440 {
 441 #define SCHED_INTR (                            \
 442                 ATH9K_INT_FATAL |               \
 443                 ATH9K_INT_RXORN |               \
 444                 ATH9K_INT_RXEOL |               \
 445                 ATH9K_INT_RX |                  \
 446                 ATH9K_INT_TX |                  \
 447                 ATH9K_INT_BMISS |               \
 448                 ATH9K_INT_CST |                 \
 449                 ATH9K_INT_TSFOOR |              \
 450                 ATH9K_INT_GENTIMER)
 451
 452         struct ath_softc *sc = dev;
 453         struct ath_hw *ah = sc->sc_ah;
 454         enum ath9k_int status;
 455         bool sched = false;
 456
 457         /*
 458          * The hardware is not ready/present, don't
 459          * touch anything. Note this can happen early
 460          * on if the IRQ is shared.
 461          */
 462         if (sc->sc_flags & SC_OP_INVALID)
 463                 return IRQ_NONE;
 464
 465
 466         /* shared irq, not for us */
 467
 468         if (!ath9k_hw_intrpend(ah))
 469                 return IRQ_NONE;
 470
 471         /*
 472          * Figure out the reason(s) for the interrupt.  Note
 473          * that the hal returns a pseudo-ISR that may include
 474          * bits we haven't explicitly enabled so we mask the
 475          * value to insure we only process bits we requested.
 476          */
 477         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 478         status &= sc->imask;    /* discard unasked-for bits */
 479
 480         /*
 481          * If there are no status bits set, then this interrupt was not
 482          * for me (should have been caught above).
 483          */
 484         if (!status)
 485                 return IRQ_NONE;
 486
 487         /* Cache the status */
 488         sc->intrstatus = status;
 489
 490         if (status & SCHED_INTR)
 491                 sched = true;
 492
 493         /*
 494          * If a FATAL or RXORN interrupt is received, we have to reset the
 495          * chip immediately.
 496          */
 497         if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
 498                 goto chip_reset;
 499
 500         if (status & ATH9K_INT_SWBA)
 501                 tasklet_schedule(&sc->bcon_tasklet);
 502
 503         if (status & ATH9K_INT_TXURN)
 504                 ath9k_hw_updatetxtriglevel(ah, true);
 505
 506         if (status & ATH9K_INT_MIB) {
 507                 /*
 508                  * Disable interrupts until we service the MIB
 509                  * interrupt; otherwise it will continue to
 510                  * fire.
 511                  */
 512                 ath9k_hw_set_interrupts(ah, 0);
 513                 /*
 514                  * Let the hal handle the event. We assume
 515                  * it will clear whatever condition caused
 516                  * the interrupt.
 517                  */
 518                 ath9k_hw_procmibevent(ah);
 519                 ath9k_hw_set_interrupts(ah, sc->imask);
 520         }
 521
 522         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 523                 if (status & ATH9K_INT_TIM_TIMER) {
 524                         /* Clear RxAbort bit so that we can
 525                          * receive frames */
 526                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 527                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 528                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 529                 }
 530
 531 chip_reset:
 532
 533         ath_debug_stat_interrupt(sc, status);
 534
 535         if (sched) {
 536                 /* turn off every interrupt except SWBA */
 537                 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
 538                 tasklet_schedule(&sc->intr_tq);
 539         }
 540
 541         return IRQ_HANDLED;
 542
 543 #undef SCHED_INTR
 544 }
 545
 546 static u32 ath_get_extchanmode(struct ath_softc *sc,
 547                                struct ieee80211_channel *chan,
 548                                enum nl80211_channel_type channel_type)
 549 {
 550         u32 chanmode = 0;
 551
 552         switch (chan->band) {
 553         case IEEE80211_BAND_2GHZ:
 554                 switch(channel_type) {
 555                 case NL80211_CHAN_NO_HT:
 556                 case NL80211_CHAN_HT20:
 557                         chanmode = CHANNEL_G_HT20;
 558                         break;
 559                 case NL80211_CHAN_HT40PLUS:
 560                         chanmode = CHANNEL_G_HT40PLUS;
 561                         break;
 562                 case NL80211_CHAN_HT40MINUS:
 563                         chanmode = CHANNEL_G_HT40MINUS;
 564                         break;
 565                 }
 566                 break;
 567         case IEEE80211_BAND_5GHZ:
 568                 switch(channel_type) {
 569                 case NL80211_CHAN_NO_HT:
 570                 case NL80211_CHAN_HT20:
 571                         chanmode = CHANNEL_A_HT20;
 572                         break;
 573                 case NL80211_CHAN_HT40PLUS:
 574                         chanmode = CHANNEL_A_HT40PLUS;
 575                         break;
 576                 case NL80211_CHAN_HT40MINUS:
 577                         chanmode = CHANNEL_A_HT40MINUS;
 578                         break;
 579                 }
 580                 break;
 581         default:
 582                 break;
 583         }
 584
 585         return chanmode;
 586 }
 587
 588 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 589                            struct ath9k_keyval *hk, const u8 *addr,
 590                            bool authenticator)
 591 {
 592         struct ath_hw *ah = common->ah;
 593         const u8 *key_rxmic;
 594         const u8 *key_txmic;
 595
 596         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 597         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 598
 599         if (addr == NULL) {
 600                 /*
 601                  * Group key installation - only two key cache entries are used
 602                  * regardless of splitmic capability since group key is only
 603                  * used either for TX or RX.
 604                  */
 605                 if (authenticator) {
 606                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 607                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 608                 } else {
 609                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 610                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 611                 }
 612                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 613         }
 614         if (!common->splitmic) {
 615                 /* TX and RX keys share the same key cache entry. */
 616                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 617                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 618                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 619         }
 620
 621         /* Separate key cache entries for TX and RX */
 622
 623         /* TX key goes at first index, RX key at +32. */
 624         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 625         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 626                 /* TX MIC entry failed. No need to proceed further */
 627                 ath_print(common, ATH_DBG_FATAL,
 628                           "Setting TX MIC Key Failed\n");
 629                 return 0;
 630         }
 631
 632         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 633         /* XXX delete tx key on failure? */
 634         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 635 }
 636
 637 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 638 {
 639         int i;
 640
 641         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 642                 if (test_bit(i, common->keymap) ||
 643                     test_bit(i + 64, common->keymap))
 644                         continue; /* At least one part of TKIP key allocated */
 645                 if (common->splitmic &&
 646                     (test_bit(i + 32, common->keymap) ||
 647                      test_bit(i + 64 + 32, common->keymap)))
 648                         continue; /* At least one part of TKIP key allocated */
 649
 650                 /* Found a free slot for a TKIP key */
 651                 return i;
 652         }
 653         return -1;
 654 }
 655
 656 static int ath_reserve_key_cache_slot(struct ath_common *common)
 657 {
 658         int i;
 659
 660         /* First, try to find slots that would not be available for TKIP. */
 661         if (common->splitmic) {
 662                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 663                         if (!test_bit(i, common->keymap) &&
 664                             (test_bit(i + 32, common->keymap) ||
 665                              test_bit(i + 64, common->keymap) ||
 666                              test_bit(i + 64 + 32, common->keymap)))
 667                                 return i;
 668                         if (!test_bit(i + 32, common->keymap) &&
 669                             (test_bit(i, common->keymap) ||
 670                              test_bit(i + 64, common->keymap) ||
 671                              test_bit(i + 64 + 32, common->keymap)))
 672                                 return i + 32;
 673                         if (!test_bit(i + 64, common->keymap) &&
 674                             (test_bit(i , common->keymap) ||
 675                              test_bit(i + 32, common->keymap) ||
 676                              test_bit(i + 64 + 32, common->keymap)))
 677                                 return i + 64;
 678                         if (!test_bit(i + 64 + 32, common->keymap) &&
 679                             (test_bit(i, common->keymap) ||
 680                              test_bit(i + 32, common->keymap) ||
 681                              test_bit(i + 64, common->keymap)))
 682                                 return i + 64 + 32;
 683                 }
 684         } else {
 685                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 686                         if (!test_bit(i, common->keymap) &&
 687                             test_bit(i + 64, common->keymap))
 688                                 return i;
 689                         if (test_bit(i, common->keymap) &&
 690                             !test_bit(i + 64, common->keymap))
 691                                 return i + 64;
 692                 }
 693         }
 694
 695         /* No partially used TKIP slots, pick any available slot */
 696         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 697                 /* Do not allow slots that could be needed for TKIP group keys
 698                  * to be used. This limitation could be removed if we know that
 699                  * TKIP will not be used. */
 700                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 701                         continue;
 702                 if (common->splitmic) {
 703                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 704                                 continue;
 705                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 706                                 continue;
 707                 }
 708
 709                 if (!test_bit(i, common->keymap))
 710                         return i; /* Found a free slot for a key */
 711         }
 712
 713         /* No free slot found */
 714         return -1;
 715 }
 716
 717 static int ath_key_config(struct ath_common *common,
 718                           struct ieee80211_vif *vif,
 719                           struct ieee80211_sta *sta,
 720                           struct ieee80211_key_conf *key)
 721 {
 722         struct ath_hw *ah = common->ah;
 723         struct ath9k_keyval hk;
 724         const u8 *mac = NULL;
 725         int ret = 0;
 726         int idx;
 727
 728         memset(&hk, 0, sizeof(hk));
 729
 730         switch (key->alg) {
 731         case ALG_WEP:
 732                 hk.kv_type = ATH9K_CIPHER_WEP;
 733                 break;
 734         case ALG_TKIP:
 735                 hk.kv_type = ATH9K_CIPHER_TKIP;
 736                 break;
 737         case ALG_CCMP:
 738                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 739                 break;
 740         default:
 741                 return -EOPNOTSUPP;
 742         }
 743
 744         hk.kv_len = key->keylen;
 745         memcpy(hk.kv_val, key->key, key->keylen);
 746
 747         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 748                 /* For now, use the default keys for broadcast keys. This may
 749                  * need to change with virtual interfaces. */
 750                 idx = key->keyidx;
 751         } else if (key->keyidx) {
 752                 if (WARN_ON(!sta))
 753                         return -EOPNOTSUPP;
 754                 mac = sta->addr;
 755
 756                 if (vif->type != NL80211_IFTYPE_AP) {
 757                         /* Only keyidx 0 should be used with unicast key, but
 758                          * allow this for client mode for now. */
 759                         idx = key->keyidx;
 760                 } else
 761                         return -EIO;
 762         } else {
 763                 if (WARN_ON(!sta))
 764                         return -EOPNOTSUPP;
 765                 mac = sta->addr;
 766
 767                 if (key->alg == ALG_TKIP)
 768                         idx = ath_reserve_key_cache_slot_tkip(common);
 769                 else
 770                         idx = ath_reserve_key_cache_slot(common);
 771                 if (idx < 0)
 772                         return -ENOSPC; /* no free key cache entries */
 773         }
 774
 775         if (key->alg == ALG_TKIP)
 776                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 777                                       vif->type == NL80211_IFTYPE_AP);
 778         else
 779                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 780
 781         if (!ret)
 782                 return -EIO;
 783
 784         set_bit(idx, common->keymap);
 785         if (key->alg == ALG_TKIP) {
 786                 set_bit(idx + 64, common->keymap);
 787                 if (common->splitmic) {
 788                         set_bit(idx + 32, common->keymap);
 789                         set_bit(idx + 64 + 32, common->keymap);
 790                 }
 791         }
 792
 793         return idx;
 794 }
 795
 796 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 797 {
 798         struct ath_hw *ah = common->ah;
 799
 800         ath9k_hw_keyreset(ah, key->hw_key_idx);
 801         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 802                 return;
 803
 804         clear_bit(key->hw_key_idx, common->keymap);
 805         if (key->alg != ALG_TKIP)
 806                 return;
 807
 808         clear_bit(key->hw_key_idx + 64, common->keymap);
 809         if (common->splitmic) {
 810                 clear_bit(key->hw_key_idx + 32, common->keymap);
 811                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 812         }
 813 }
 814
 815 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 816                                  struct ieee80211_vif *vif,
 817                                  struct ieee80211_bss_conf *bss_conf)
 818 {
 819         struct ath_hw *ah = sc->sc_ah;
 820         struct ath_common *common = ath9k_hw_common(ah);
 821
 822         if (bss_conf->assoc) {
 823                 ath_print(common, ATH_DBG_CONFIG,
 824                           "Bss Info ASSOC %d, bssid: %pM\n",
 825                            bss_conf->aid, common->curbssid);
 826
 827                 /* New association, store aid */
 828                 common->curaid = bss_conf->aid;
 829                 ath9k_hw_write_associd(ah);
 830
 831                 /*
 832                  * Request a re-configuration of Beacon related timers
 833                  * on the receipt of the first Beacon frame (i.e.,
 834                  * after time sync with the AP).
 835                  */
 836                 sc->ps_flags |= PS_BEACON_SYNC;
 837
 838                 /* Configure the beacon */
 839                 ath_beacon_config(sc, vif);
 840
 841                 /* Reset rssi stats */
 842                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 843
 844                 ath_start_ani(common);
 845         } else {
 846                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 847                 common->curaid = 0;
 848                 /* Stop ANI */
 849                 del_timer_sync(&common->ani.timer);
 850         }
 851 }
 852
 853 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 854 {
 855         struct ath_hw *ah = sc->sc_ah;
 856         struct ath_common *common = ath9k_hw_common(ah);
 857         struct ieee80211_channel *channel = hw->conf.channel;
 858         int r;
 859
 860         ath9k_ps_wakeup(sc);
 861         ath9k_hw_configpcipowersave(ah, 0, 0);
 862
 863         if (!ah->curchan)
 864                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 865
 866         spin_lock_bh(&sc->sc_resetlock);
 867         r = ath9k_hw_reset(ah, ah->curchan, false);
 868         if (r) {
 869                 ath_print(common, ATH_DBG_FATAL,
 870                           "Unable to reset channel %u (%uMhz) ",
 871                           "reset status %d\n",
 872                           channel->center_freq, r);
 873         }
 874         spin_unlock_bh(&sc->sc_resetlock);
 875
 876         ath_update_txpow(sc);
 877         if (ath_startrecv(sc) != 0) {
 878                 ath_print(common, ATH_DBG_FATAL,
 879                           "Unable to restart recv logic\n");
 880                 return;
 881         }
 882
 883         if (sc->sc_flags & SC_OP_BEACONS)
 884                 ath_beacon_config(sc, NULL);    /* restart beacons */
 885
 886         /* Re-Enable  interrupts */
 887         ath9k_hw_set_interrupts(ah, sc->imask);
 888
 889         /* Enable LED */
 890         ath9k_hw_cfg_output(ah, ah->led_pin,
 891                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 892         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 893
 894         ieee80211_wake_queues(hw);
 895         ath9k_ps_restore(sc);
 896 }
 897
 898 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 899 {
 900         struct ath_hw *ah = sc->sc_ah;
 901         struct ieee80211_channel *channel = hw->conf.channel;
 902         int r;
 903
 904         ath9k_ps_wakeup(sc);
 905         ieee80211_stop_queues(hw);
 906
 907         /* Disable LED */
 908         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 909         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 910
 911         /* Disable interrupts */
 912         ath9k_hw_set_interrupts(ah, 0);
 913
 914         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 915         ath_stoprecv(sc);               /* turn off frame recv */
 916         ath_flushrecv(sc);              /* flush recv queue */
 917
 918         if (!ah->curchan)
 919                 ah->curchan = ath_get_curchannel(sc, hw);
 920
 921         spin_lock_bh(&sc->sc_resetlock);
 922         r = ath9k_hw_reset(ah, ah->curchan, false);
 923         if (r) {
 924                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 925                           "Unable to reset channel %u (%uMhz) "
 926                           "reset status %d\n",
 927                           channel->center_freq, r);
 928         }
 929         spin_unlock_bh(&sc->sc_resetlock);
 930
 931         ath9k_hw_phy_disable(ah);
 932         ath9k_hw_configpcipowersave(ah, 1, 1);
 933         ath9k_ps_restore(sc);
 934         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 935 }
 936
 937 int ath_reset(struct ath_softc *sc, bool retry_tx)
 938 {
 939         struct ath_hw *ah = sc->sc_ah;
 940         struct ath_common *common = ath9k_hw_common(ah);
 941         struct ieee80211_hw *hw = sc->hw;
 942         int r;
 943
 944         /* Stop ANI */
 945         del_timer_sync(&common->ani.timer);
 946
 947         ieee80211_stop_queues(hw);
 948
 949         ath9k_hw_set_interrupts(ah, 0);
 950         ath_drain_all_txq(sc, retry_tx);
 951         ath_stoprecv(sc);
 952         ath_flushrecv(sc);
 953
 954         spin_lock_bh(&sc->sc_resetlock);
 955         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 956         if (r)
 957                 ath_print(common, ATH_DBG_FATAL,
 958                           "Unable to reset hardware; reset status %d\n", r);
 959         spin_unlock_bh(&sc->sc_resetlock);
 960
 961         if (ath_startrecv(sc) != 0)
 962                 ath_print(common, ATH_DBG_FATAL,
 963                           "Unable to start recv logic\n");
 964
 965         /*
 966          * We may be doing a reset in response to a request
 967          * that changes the channel so update any state that
 968          * might change as a result.
 969          */
 970         ath_cache_conf_rate(sc, &hw->conf);
 971
 972         ath_update_txpow(sc);
 973
 974         if (sc->sc_flags & SC_OP_BEACONS)
 975                 ath_beacon_config(sc, NULL);    /* restart beacons */
 976
 977         ath9k_hw_set_interrupts(ah, sc->imask);
 978
 979         if (retry_tx) {
 980                 int i;
 981                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 982                         if (ATH_TXQ_SETUP(sc, i)) {
 983                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 984                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 985                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 986                         }
 987                 }
 988         }
 989
 990         ieee80211_wake_queues(hw);
 991
 992         /* Start ANI */
 993         ath_start_ani(common);
 994
 995         return r;
 996 }
 997
 998 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 999 {
1000         int qnum;
1001
1002         switch (queue) {
1003         case 0:
1004                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1005                 break;
1006         case 1:
1007                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1008                 break;
1009         case 2:
1010                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1011                 break;
1012         case 3:
1013                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1014                 break;
1015         default:
1016                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1017                 break;
1018         }
1019
1020         return qnum;
1021 }
1022
1023 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1024 {
1025         int qnum;
1026
1027         switch (queue) {
1028         case ATH9K_WME_AC_VO:
1029                 qnum = 0;
1030                 break;
1031         case ATH9K_WME_AC_VI:
1032                 qnum = 1;
1033                 break;
1034         case ATH9K_WME_AC_BE:
1035                 qnum = 2;
1036                 break;
1037         case ATH9K_WME_AC_BK:
1038                 qnum = 3;
1039                 break;
1040         default:
1041                 qnum = -1;
1042                 break;
1043         }
1044
1045         return qnum;
1046 }
1047
1048 /* XXX: Remove me once we don't depend on ath9k_channel for all
1049  * this redundant data */
1050 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1051                            struct ath9k_channel *ichan)
1052 {
1053         struct ieee80211_channel *chan = hw->conf.channel;
1054         struct ieee80211_conf *conf = &hw->conf;
1055
1056         ichan->channel = chan->center_freq;
1057         ichan->chan = chan;
1058
1059         if (chan->band == IEEE80211_BAND_2GHZ) {
1060                 ichan->chanmode = CHANNEL_G;
1061                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1062         } else {
1063                 ichan->chanmode = CHANNEL_A;
1064                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1065         }
1066
1067         if (conf_is_ht(conf))
1068                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1069                                             conf->channel_type);
1070 }
1071
1072 /**********************/
1073 /* mac80211 callbacks */
1074 /**********************/
1075
1076 static int ath9k_start(struct ieee80211_hw *hw)
1077 {
1078         struct ath_wiphy *aphy = hw->priv;
1079         struct ath_softc *sc = aphy->sc;
1080         struct ath_hw *ah = sc->sc_ah;
1081         struct ath_common *common = ath9k_hw_common(ah);
1082         struct ieee80211_channel *curchan = hw->conf.channel;
1083         struct ath9k_channel *init_channel;
1084         int r;
1085
1086         ath_print(common, ATH_DBG_CONFIG,
1087                   "Starting driver with initial channel: %d MHz\n",
1088                   curchan->center_freq);
1089
1090         mutex_lock(&sc->mutex);
1091
1092         if (ath9k_wiphy_started(sc)) {
1093                 if (sc->chan_idx == curchan->hw_value) {
1094                         /*
1095                          * Already on the operational channel, the new wiphy
1096                          * can be marked active.
1097                          */
1098                         aphy->state = ATH_WIPHY_ACTIVE;
1099                         ieee80211_wake_queues(hw);
1100                 } else {
1101                         /*
1102                          * Another wiphy is on another channel, start the new
1103                          * wiphy in paused state.
1104                          */
1105                         aphy->state = ATH_WIPHY_PAUSED;
1106                         ieee80211_stop_queues(hw);
1107                 }
1108                 mutex_unlock(&sc->mutex);
1109                 return 0;
1110         }
1111         aphy->state = ATH_WIPHY_ACTIVE;
1112
1113         /* setup initial channel */
1114
1115         sc->chan_idx = curchan->hw_value;
1116
1117         init_channel = ath_get_curchannel(sc, hw);
1118
1119         /* Reset SERDES registers */
1120         ath9k_hw_configpcipowersave(ah, 0, 0);
1121
1122         /*
1123          * The basic interface to setting the hardware in a good
1124          * state is ``reset''.  On return the hardware is known to
1125          * be powered up and with interrupts disabled.  This must
1126          * be followed by initialization of the appropriate bits
1127          * and then setup of the interrupt mask.
1128          */
1129         spin_lock_bh(&sc->sc_resetlock);
1130         r = ath9k_hw_reset(ah, init_channel, false);
1131         if (r) {
1132                 ath_print(common, ATH_DBG_FATAL,
1133                           "Unable to reset hardware; reset status %d "
1134                           "(freq %u MHz)\n", r,
1135                           curchan->center_freq);
1136                 spin_unlock_bh(&sc->sc_resetlock);
1137                 goto mutex_unlock;
1138         }
1139         spin_unlock_bh(&sc->sc_resetlock);
1140
1141         /*
1142          * This is needed only to setup initial state
1143          * but it's best done after a reset.
1144          */
1145         ath_update_txpow(sc);
1146
1147         /*
1148          * Setup the hardware after reset:
1149          * The receive engine is set going.
1150          * Frame transmit is handled entirely
1151          * in the frame output path; there's nothing to do
1152          * here except setup the interrupt mask.
1153          */
1154         if (ath_startrecv(sc) != 0) {
1155                 ath_print(common, ATH_DBG_FATAL,
1156                           "Unable to start recv logic\n");
1157                 r = -EIO;
1158                 goto mutex_unlock;
1159         }
1160
1161         /* Setup our intr mask. */
1162         sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
1163                 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1164                 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1165
1166         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1167                 sc->imask |= ATH9K_INT_GTT;
1168
1169         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1170                 sc->imask |= ATH9K_INT_CST;
1171
1172         ath_cache_conf_rate(sc, &hw->conf);
1173
1174         sc->sc_flags &= ~SC_OP_INVALID;
1175
1176         /* Disable BMISS interrupt when we're not associated */
1177         sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1178         ath9k_hw_set_interrupts(ah, sc->imask);
1179
1180         ieee80211_wake_queues(hw);
1181
1182         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1183
1184         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1185             !ah->btcoex_hw.enabled) {
1186                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1187                                            AR_STOMP_LOW_WLAN_WGHT);
1188                 ath9k_hw_btcoex_enable(ah);
1189
1190                 if (common->bus_ops->bt_coex_prep)
1191                         common->bus_ops->bt_coex_prep(common);
1192                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1193                         ath9k_btcoex_timer_resume(sc);
1194         }
1195
1196 mutex_unlock:
1197         mutex_unlock(&sc->mutex);
1198
1199         return r;
1200 }
1201
1202 static int ath9k_tx(struct ieee80211_hw *hw,
1203                     struct sk_buff *skb)
1204 {
1205         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1206         struct ath_wiphy *aphy = hw->priv;
1207         struct ath_softc *sc = aphy->sc;
1208         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1209         struct ath_tx_control txctl;
1210         int padpos, padsize;
1211         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1212
1213         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1214                 ath_print(common, ATH_DBG_XMIT,
1215                           "ath9k: %s: TX in unexpected wiphy state "
1216                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1217                 goto exit;
1218         }
1219
1220         if (sc->ps_enabled) {
1221                 /*
1222                  * mac80211 does not set PM field for normal data frames, so we
1223                  * need to update that based on the current PS mode.
1224                  */
1225                 if (ieee80211_is_data(hdr->frame_control) &&
1226                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1227                     !ieee80211_has_pm(hdr->frame_control)) {
1228                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1229                                   "while in PS mode\n");
1230                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1231                 }
1232         }
1233
1234         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1235                 /*
1236                  * We are using PS-Poll and mac80211 can request TX while in
1237                  * power save mode. Need to wake up hardware for the TX to be
1238                  * completed and if needed, also for RX of buffered frames.
1239                  */
1240                 ath9k_ps_wakeup(sc);
1241                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1242                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1243                         ath_print(common, ATH_DBG_PS,
1244                                   "Sending PS-Poll to pick a buffered frame\n");
1245                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1246                 } else {
1247                         ath_print(common, ATH_DBG_PS,
1248                                   "Wake up to complete TX\n");
1249                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1250                 }
1251                 /*
1252                  * The actual restore operation will happen only after
1253                  * the sc_flags bit is cleared. We are just dropping
1254                  * the ps_usecount here.
1255                  */
1256                 ath9k_ps_restore(sc);
1257         }
1258
1259         memset(&txctl, 0, sizeof(struct ath_tx_control));
1260
1261         /*
1262          * As a temporary workaround, assign seq# here; this will likely need
1263          * to be cleaned up to work better with Beacon transmission and virtual
1264          * BSSes.
1265          */
1266         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1267                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1268                         sc->tx.seq_no += 0x10;
1269                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1270                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1271         }
1272
1273         /* Add the padding after the header if this is not already done */
1274         padpos = ath9k_cmn_padpos(hdr->frame_control);
1275         padsize = padpos & 3;
1276         if (padsize && skb->len>padpos) {
1277                 if (skb_headroom(skb) < padsize)
1278                         return -1;
1279                 skb_push(skb, padsize);
1280                 memmove(skb->data, skb->data + padsize, padpos);
1281         }
1282
1283         /* Check if a tx queue is available */
1284
1285         txctl.txq = ath_test_get_txq(sc, skb);
1286         if (!txctl.txq)
1287                 goto exit;
1288
1289         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1290
1291         if (ath_tx_start(hw, skb, &txctl) != 0) {
1292                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1293                 goto exit;
1294         }
1295
1296         return 0;
1297 exit:
1298         dev_kfree_skb_any(skb);
1299         return 0;
1300 }
1301
1302 static void ath9k_stop(struct ieee80211_hw *hw)
1303 {
1304         struct ath_wiphy *aphy = hw->priv;
1305         struct ath_softc *sc = aphy->sc;
1306         struct ath_hw *ah = sc->sc_ah;
1307         struct ath_common *common = ath9k_hw_common(ah);
1308
1309         mutex_lock(&sc->mutex);
1310
1311         aphy->state = ATH_WIPHY_INACTIVE;
1312
1313         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1314         cancel_delayed_work_sync(&sc->tx_complete_work);
1315
1316         if (!sc->num_sec_wiphy) {
1317                 cancel_delayed_work_sync(&sc->wiphy_work);
1318                 cancel_work_sync(&sc->chan_work);
1319         }
1320
1321         if (sc->sc_flags & SC_OP_INVALID) {
1322                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1323                 mutex_unlock(&sc->mutex);
1324                 return;
1325         }
1326
1327         if (ath9k_wiphy_started(sc)) {
1328                 mutex_unlock(&sc->mutex);
1329                 return; /* another wiphy still in use */
1330         }
1331
1332         /* Ensure HW is awake when we try to shut it down. */
1333         ath9k_ps_wakeup(sc);
1334
1335         if (ah->btcoex_hw.enabled) {
1336                 ath9k_hw_btcoex_disable(ah);
1337                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1338                         ath9k_btcoex_timer_pause(sc);
1339         }
1340
1341         /* make sure h/w will not generate any interrupt
1342          * before setting the invalid flag. */
1343         ath9k_hw_set_interrupts(ah, 0);
1344
1345         if (!(sc->sc_flags & SC_OP_INVALID)) {
1346                 ath_drain_all_txq(sc, false);
1347                 ath_stoprecv(sc);
1348                 ath9k_hw_phy_disable(ah);
1349         } else
1350                 sc->rx.rxlink = NULL;
1351
1352         /* disable HAL and put h/w to sleep */
1353         ath9k_hw_disable(ah);
1354         ath9k_hw_configpcipowersave(ah, 1, 1);
1355         ath9k_ps_restore(sc);
1356
1357         /* Finally, put the chip in FULL SLEEP mode */
1358         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1359
1360         sc->sc_flags |= SC_OP_INVALID;
1361
1362         mutex_unlock(&sc->mutex);
1363
1364         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1365 }
1366
1367 static int ath9k_add_interface(struct ieee80211_hw *hw,
1368                                struct ieee80211_vif *vif)
1369 {
1370         struct ath_wiphy *aphy = hw->priv;
1371         struct ath_softc *sc = aphy->sc;
1372         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1373         struct ath_vif *avp = (void *)vif->drv_priv;
1374         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1375         int ret = 0;
1376
1377         mutex_lock(&sc->mutex);
1378
1379         if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1380             sc->nvifs > 0) {
1381                 ret = -ENOBUFS;
1382                 goto out;
1383         }
1384
1385         switch (vif->type) {
1386         case NL80211_IFTYPE_STATION:
1387                 ic_opmode = NL80211_IFTYPE_STATION;
1388                 break;
1389         case NL80211_IFTYPE_ADHOC:
1390         case NL80211_IFTYPE_AP:
1391         case NL80211_IFTYPE_MESH_POINT:
1392                 if (sc->nbcnvifs >= ATH_BCBUF) {
1393                         ret = -ENOBUFS;
1394                         goto out;
1395                 }
1396                 ic_opmode = vif->type;
1397                 break;
1398         default:
1399                 ath_print(common, ATH_DBG_FATAL,
1400                         "Interface type %d not yet supported\n", vif->type);
1401                 ret = -EOPNOTSUPP;
1402                 goto out;
1403         }
1404
1405         ath_print(common, ATH_DBG_CONFIG,
1406                   "Attach a VIF of type: %d\n", ic_opmode);
1407
1408         /* Set the VIF opmode */
1409         avp->av_opmode = ic_opmode;
1410         avp->av_bslot = -1;
1411
1412         sc->nvifs++;
1413
1414         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1415                 ath9k_set_bssid_mask(hw);
1416
1417         if (sc->nvifs > 1)
1418                 goto out; /* skip global settings for secondary vif */
1419
1420         if (ic_opmode == NL80211_IFTYPE_AP) {
1421                 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1422                 sc->sc_flags |= SC_OP_TSF_RESET;
1423         }
1424
1425         /* Set the device opmode */
1426         sc->sc_ah->opmode = ic_opmode;
1427
1428         /*
1429          * Enable MIB interrupts when there are hardware phy counters.
1430          * Note we only do this (at the moment) for station mode.
1431          */
1432         if ((vif->type == NL80211_IFTYPE_STATION) ||
1433             (vif->type == NL80211_IFTYPE_ADHOC) ||
1434             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1435                 sc->imask |= ATH9K_INT_MIB;
1436                 sc->imask |= ATH9K_INT_TSFOOR;
1437         }
1438
1439         ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
1440
1441         if (vif->type == NL80211_IFTYPE_AP    ||
1442             vif->type == NL80211_IFTYPE_ADHOC ||
1443             vif->type == NL80211_IFTYPE_MONITOR)
1444                 ath_start_ani(common);
1445
1446 out:
1447         mutex_unlock(&sc->mutex);
1448         return ret;
1449 }
1450
1451 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1452                                    struct ieee80211_vif *vif)
1453 {
1454         struct ath_wiphy *aphy = hw->priv;
1455         struct ath_softc *sc = aphy->sc;
1456         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1457         struct ath_vif *avp = (void *)vif->drv_priv;
1458         int i;
1459
1460         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1461
1462         mutex_lock(&sc->mutex);
1463
1464         /* Stop ANI */
1465         del_timer_sync(&common->ani.timer);
1466
1467         /* Reclaim beacon resources */
1468         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1469             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1470             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1471                 ath9k_ps_wakeup(sc);
1472                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1473                 ath9k_ps_restore(sc);
1474         }
1475
1476         ath_beacon_return(sc, avp);
1477         sc->sc_flags &= ~SC_OP_BEACONS;
1478
1479         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1480                 if (sc->beacon.bslot[i] == vif) {
1481                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1482                                "slot\n", __func__);
1483                         sc->beacon.bslot[i] = NULL;
1484                         sc->beacon.bslot_aphy[i] = NULL;
1485                 }
1486         }
1487
1488         sc->nvifs--;
1489
1490         mutex_unlock(&sc->mutex);
1491 }
1492
1493 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1494 {
1495         struct ath_wiphy *aphy = hw->priv;
1496         struct ath_softc *sc = aphy->sc;
1497         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1498         struct ieee80211_conf *conf = &hw->conf;
1499         struct ath_hw *ah = sc->sc_ah;
1500         bool disable_radio;
1501
1502         mutex_lock(&sc->mutex);
1503
1504         /*
1505          * Leave this as the first check because we need to turn on the
1506          * radio if it was disabled before prior to processing the rest
1507          * of the changes. Likewise we must only disable the radio towards
1508          * the end.
1509          */
1510         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1511                 bool enable_radio;
1512                 bool all_wiphys_idle;
1513                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1514
1515                 spin_lock_bh(&sc->wiphy_lock);
1516                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1517                 ath9k_set_wiphy_idle(aphy, idle);
1518
1519                 if (!idle && all_wiphys_idle)
1520                         enable_radio = true;
1521
1522                 /*
1523                  * After we unlock here its possible another wiphy
1524                  * can be re-renabled so to account for that we will
1525                  * only disable the radio toward the end of this routine
1526                  * if by then all wiphys are still idle.
1527                  */
1528                 spin_unlock_bh(&sc->wiphy_lock);
1529
1530                 if (enable_radio) {
1531                         ath_radio_enable(sc, hw);
1532                         ath_print(common, ATH_DBG_CONFIG,
1533                                   "not-idle: enabling radio\n");
1534                 }
1535         }
1536
1537         /*
1538          * We just prepare to enable PS. We have to wait until our AP has
1539          * ACK'd our null data frame to disable RX otherwise we'll ignore
1540          * those ACKs and end up retransmitting the same null data frames.
1541          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1542          */
1543         if (changed & IEEE80211_CONF_CHANGE_PS) {
1544                 if (conf->flags & IEEE80211_CONF_PS) {
1545                         sc->ps_flags |= PS_ENABLED;
1546                         if (!(ah->caps.hw_caps &
1547                               ATH9K_HW_CAP_AUTOSLEEP)) {
1548                                 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
1549                                         sc->imask |= ATH9K_INT_TIM_TIMER;
1550                                         ath9k_hw_set_interrupts(sc->sc_ah,
1551                                                         sc->imask);
1552                                 }
1553                         }
1554                         /*
1555                          * At this point we know hardware has received an ACK
1556                          * of a previously sent null data frame.
1557                          */
1558                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1559                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1560                                 sc->ps_enabled = true;
1561                                 ath9k_hw_setrxabort(sc->sc_ah, 1);
1562                         }
1563                 } else {
1564                         sc->ps_enabled = false;
1565                         sc->ps_flags &= ~(PS_ENABLED |
1566                                           PS_NULLFUNC_COMPLETED);
1567                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1568                         if (!(ah->caps.hw_caps &
1569                               ATH9K_HW_CAP_AUTOSLEEP)) {
1570                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1571                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1572                                                   PS_WAIT_FOR_CAB |
1573                                                   PS_WAIT_FOR_PSPOLL_DATA |
1574                                                   PS_WAIT_FOR_TX_ACK);
1575                                 if (sc->imask & ATH9K_INT_TIM_TIMER) {
1576                                         sc->imask &= ~ATH9K_INT_TIM_TIMER;
1577                                         ath9k_hw_set_interrupts(sc->sc_ah,
1578                                                         sc->imask);
1579                                 }
1580                         }
1581                 }
1582         }
1583
1584         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1585                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1586                         ath_print(common, ATH_DBG_CONFIG,
1587                                   "HW opmode set to Monitor mode\n");
1588                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1589                 }
1590         }
1591
1592         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1593                 struct ieee80211_channel *curchan = hw->conf.channel;
1594                 int pos = curchan->hw_value;
1595
1596                 aphy->chan_idx = pos;
1597                 aphy->chan_is_ht = conf_is_ht(conf);
1598
1599                 if (aphy->state == ATH_WIPHY_SCAN ||
1600                     aphy->state == ATH_WIPHY_ACTIVE)
1601                         ath9k_wiphy_pause_all_forced(sc, aphy);
1602                 else {
1603                         /*
1604                          * Do not change operational channel based on a paused
1605                          * wiphy changes.
1606                          */
1607                         goto skip_chan_change;
1608                 }
1609
1610                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1611                           curchan->center_freq);
1612
1613                 /* XXX: remove me eventualy */
1614                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1615
1616                 ath_update_chainmask(sc, conf_is_ht(conf));
1617
1618                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1619                         ath_print(common, ATH_DBG_FATAL,
1620                                   "Unable to set channel\n");
1621                         mutex_unlock(&sc->mutex);
1622                         return -EINVAL;
1623                 }
1624         }
1625
1626 skip_chan_change:
1627         if (changed & IEEE80211_CONF_CHANGE_POWER)
1628                 sc->config.txpowlimit = 2 * conf->power_level;
1629
1630         spin_lock_bh(&sc->wiphy_lock);
1631         disable_radio = ath9k_all_wiphys_idle(sc);
1632         spin_unlock_bh(&sc->wiphy_lock);
1633
1634         if (disable_radio) {
1635                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1636                 ath_radio_disable(sc, hw);
1637         }
1638
1639         mutex_unlock(&sc->mutex);
1640
1641         return 0;
1642 }
1643
1644 #define SUPPORTED_FILTERS                       \
1645         (FIF_PROMISC_IN_BSS |                   \
1646         FIF_ALLMULTI |                          \
1647         FIF_CONTROL |                           \
1648         FIF_PSPOLL |                            \
1649         FIF_OTHER_BSS |                         \
1650         FIF_BCN_PRBRESP_PROMISC |               \
1651         FIF_FCSFAIL)
1652
1653 /* FIXME: sc->sc_full_reset ? */
1654 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1655                                    unsigned int changed_flags,
1656                                    unsigned int *total_flags,
1657                                    u64 multicast)
1658 {
1659         struct ath_wiphy *aphy = hw->priv;
1660         struct ath_softc *sc = aphy->sc;
1661         u32 rfilt;
1662
1663         changed_flags &= SUPPORTED_FILTERS;
1664         *total_flags &= SUPPORTED_FILTERS;
1665
1666         sc->rx.rxfilter = *total_flags;
1667         ath9k_ps_wakeup(sc);
1668         rfilt = ath_calcrxfilter(sc);
1669         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1670         ath9k_ps_restore(sc);
1671
1672         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1673                   "Set HW RX filter: 0x%x\n", rfilt);
1674 }
1675
1676 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1677                              struct ieee80211_vif *vif,
1678                              enum sta_notify_cmd cmd,
1679                              struct ieee80211_sta *sta)
1680 {
1681         struct ath_wiphy *aphy = hw->priv;
1682         struct ath_softc *sc = aphy->sc;
1683
1684         switch (cmd) {
1685         case STA_NOTIFY_ADD:
1686                 ath_node_attach(sc, sta);
1687                 break;
1688         case STA_NOTIFY_REMOVE:
1689                 ath_node_detach(sc, sta);
1690                 break;
1691         default:
1692                 break;
1693         }
1694 }
1695
1696 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1697                          const struct ieee80211_tx_queue_params *params)
1698 {
1699         struct ath_wiphy *aphy = hw->priv;
1700         struct ath_softc *sc = aphy->sc;
1701         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1702         struct ath9k_tx_queue_info qi;
1703         int ret = 0, qnum;
1704
1705         if (queue >= WME_NUM_AC)
1706                 return 0;
1707
1708         mutex_lock(&sc->mutex);
1709
1710         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1711
1712         qi.tqi_aifs = params->aifs;
1713         qi.tqi_cwmin = params->cw_min;
1714         qi.tqi_cwmax = params->cw_max;
1715         qi.tqi_burstTime = params->txop;
1716         qnum = ath_get_hal_qnum(queue, sc);
1717
1718         ath_print(common, ATH_DBG_CONFIG,
1719                   "Configure tx [queue/halq] [%d/%d],  "
1720                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1721                   queue, qnum, params->aifs, params->cw_min,
1722                   params->cw_max, params->txop);
1723
1724         ret = ath_txq_update(sc, qnum, &qi);
1725         if (ret)
1726                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1727
1728         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1729                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1730                         ath_beaconq_config(sc);
1731
1732         mutex_unlock(&sc->mutex);
1733
1734         return ret;
1735 }
1736
1737 static int ath9k_set_key(struct ieee80211_hw *hw,
1738                          enum set_key_cmd cmd,
1739                          struct ieee80211_vif *vif,
1740                          struct ieee80211_sta *sta,
1741                          struct ieee80211_key_conf *key)
1742 {
1743         struct ath_wiphy *aphy = hw->priv;
1744         struct ath_softc *sc = aphy->sc;
1745         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1746         int ret = 0;
1747
1748         if (modparam_nohwcrypt)
1749                 return -ENOSPC;
1750
1751         mutex_lock(&sc->mutex);
1752         ath9k_ps_wakeup(sc);
1753         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1754
1755         switch (cmd) {
1756         case SET_KEY:
1757                 ret = ath_key_config(common, vif, sta, key);
1758                 if (ret >= 0) {
1759                         key->hw_key_idx = ret;
1760                         /* push IV and Michael MIC generation to stack */
1761                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1762                         if (key->alg == ALG_TKIP)
1763                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1764                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1765                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1766                         ret = 0;
1767                 }
1768                 break;
1769         case DISABLE_KEY:
1770                 ath_key_delete(common, key);
1771                 break;
1772         default:
1773                 ret = -EINVAL;
1774         }
1775
1776         ath9k_ps_restore(sc);
1777         mutex_unlock(&sc->mutex);
1778
1779         return ret;
1780 }
1781
1782 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1783                                    struct ieee80211_vif *vif,
1784                                    struct ieee80211_bss_conf *bss_conf,
1785                                    u32 changed)
1786 {
1787         struct ath_wiphy *aphy = hw->priv;
1788         struct ath_softc *sc = aphy->sc;
1789         struct ath_hw *ah = sc->sc_ah;
1790         struct ath_common *common = ath9k_hw_common(ah);
1791         struct ath_vif *avp = (void *)vif->drv_priv;
1792         int slottime;
1793         int error;
1794
1795         mutex_lock(&sc->mutex);
1796
1797         if (changed & BSS_CHANGED_BSSID) {
1798                 /* Set BSSID */
1799                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1800                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1801                 common->curaid = 0;
1802                 ath9k_hw_write_associd(ah);
1803
1804                 /* Set aggregation protection mode parameters */
1805                 sc->config.ath_aggr_prot = 0;
1806
1807                 /* Only legacy IBSS for now */
1808                 if (vif->type == NL80211_IFTYPE_ADHOC)
1809                         ath_update_chainmask(sc, 0);
1810
1811                 ath_print(common, ATH_DBG_CONFIG,
1812                           "BSSID: %pM aid: 0x%x\n",
1813                           common->curbssid, common->curaid);
1814
1815                 /* need to reconfigure the beacon */
1816                 sc->sc_flags &= ~SC_OP_BEACONS ;
1817         }
1818
1819         /* Enable transmission of beacons (AP, IBSS, MESH) */
1820         if ((changed & BSS_CHANGED_BEACON) ||
1821             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1822                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1823                 error = ath_beacon_alloc(aphy, vif);
1824                 if (!error)
1825                         ath_beacon_config(sc, vif);
1826         }
1827
1828         if (changed & BSS_CHANGED_ERP_SLOT) {
1829                 if (bss_conf->use_short_slot)
1830                         slottime = 9;
1831                 else
1832                         slottime = 20;
1833                 if (vif->type == NL80211_IFTYPE_AP) {
1834                         /*
1835                          * Defer update, so that connected stations can adjust
1836                          * their settings at the same time.
1837                          * See beacon.c for more details
1838                          */
1839                         sc->beacon.slottime = slottime;
1840                         sc->beacon.updateslot = UPDATE;
1841                 } else {
1842                         ah->slottime = slottime;
1843                         ath9k_hw_init_global_settings(ah);
1844                 }
1845         }
1846
1847         /* Disable transmission of beacons */
1848         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1849                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1850
1851         if (changed & BSS_CHANGED_BEACON_INT) {
1852                 sc->beacon_interval = bss_conf->beacon_int;
1853                 /*
1854                  * In case of AP mode, the HW TSF has to be reset
1855                  * when the beacon interval changes.
1856                  */
1857                 if (vif->type == NL80211_IFTYPE_AP) {
1858                         sc->sc_flags |= SC_OP_TSF_RESET;
1859                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1860                         error = ath_beacon_alloc(aphy, vif);
1861                         if (!error)
1862                                 ath_beacon_config(sc, vif);
1863                 } else {
1864                         ath_beacon_config(sc, vif);
1865                 }
1866         }
1867
1868         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1869                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1870                           bss_conf->use_short_preamble);
1871                 if (bss_conf->use_short_preamble)
1872                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1873                 else
1874                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1875         }
1876
1877         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1878                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1879                           bss_conf->use_cts_prot);
1880                 if (bss_conf->use_cts_prot &&
1881                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1882                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1883                 else
1884                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1885         }
1886
1887         if (changed & BSS_CHANGED_ASSOC) {
1888                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1889                         bss_conf->assoc);
1890                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1891         }
1892
1893         mutex_unlock(&sc->mutex);
1894 }
1895
1896 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1897 {
1898         u64 tsf;
1899         struct ath_wiphy *aphy = hw->priv;
1900         struct ath_softc *sc = aphy->sc;
1901
1902         mutex_lock(&sc->mutex);
1903         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1904         mutex_unlock(&sc->mutex);
1905
1906         return tsf;
1907 }
1908
1909 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1910 {
1911         struct ath_wiphy *aphy = hw->priv;
1912         struct ath_softc *sc = aphy->sc;
1913
1914         mutex_lock(&sc->mutex);
1915         ath9k_hw_settsf64(sc->sc_ah, tsf);
1916         mutex_unlock(&sc->mutex);
1917 }
1918
1919 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1920 {
1921         struct ath_wiphy *aphy = hw->priv;
1922         struct ath_softc *sc = aphy->sc;
1923
1924         mutex_lock(&sc->mutex);
1925
1926         ath9k_ps_wakeup(sc);
1927         ath9k_hw_reset_tsf(sc->sc_ah);
1928         ath9k_ps_restore(sc);
1929
1930         mutex_unlock(&sc->mutex);
1931 }
1932
1933 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1934                               struct ieee80211_vif *vif,
1935                               enum ieee80211_ampdu_mlme_action action,
1936                               struct ieee80211_sta *sta,
1937                               u16 tid, u16 *ssn)
1938 {
1939         struct ath_wiphy *aphy = hw->priv;
1940         struct ath_softc *sc = aphy->sc;
1941         int ret = 0;
1942
1943         switch (action) {
1944         case IEEE80211_AMPDU_RX_START:
1945                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1946                         ret = -ENOTSUPP;
1947                 break;
1948         case IEEE80211_AMPDU_RX_STOP:
1949                 break;
1950         case IEEE80211_AMPDU_TX_START:
1951                 ath9k_ps_wakeup(sc);
1952                 ath_tx_aggr_start(sc, sta, tid, ssn);
1953                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1954                 ath9k_ps_restore(sc);
1955                 break;
1956         case IEEE80211_AMPDU_TX_STOP:
1957                 ath9k_ps_wakeup(sc);
1958                 ath_tx_aggr_stop(sc, sta, tid);
1959                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1960                 ath9k_ps_restore(sc);
1961                 break;
1962         case IEEE80211_AMPDU_TX_OPERATIONAL:
1963                 ath9k_ps_wakeup(sc);
1964                 ath_tx_aggr_resume(sc, sta, tid);
1965                 ath9k_ps_restore(sc);
1966                 break;
1967         default:
1968                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1969                           "Unknown AMPDU action\n");
1970         }
1971
1972         return ret;
1973 }
1974
1975 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1976 {
1977         struct ath_wiphy *aphy = hw->priv;
1978         struct ath_softc *sc = aphy->sc;
1979         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1980
1981         mutex_lock(&sc->mutex);
1982         if (ath9k_wiphy_scanning(sc)) {
1983                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1984                        "same time\n");
1985                 /*
1986                  * Do not allow the concurrent scanning state for now. This
1987                  * could be improved with scanning control moved into ath9k.
1988                  */
1989                 mutex_unlock(&sc->mutex);
1990                 return;
1991         }
1992
1993         aphy->state = ATH_WIPHY_SCAN;
1994         ath9k_wiphy_pause_all_forced(sc, aphy);
1995         sc->sc_flags |= SC_OP_SCANNING;
1996         del_timer_sync(&common->ani.timer);
1997         cancel_delayed_work_sync(&sc->tx_complete_work);
1998         mutex_unlock(&sc->mutex);
1999 }
2000
2001 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2002 {
2003         struct ath_wiphy *aphy = hw->priv;
2004         struct ath_softc *sc = aphy->sc;
2005         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2006
2007         mutex_lock(&sc->mutex);
2008         aphy->state = ATH_WIPHY_ACTIVE;
2009         sc->sc_flags &= ~SC_OP_SCANNING;
2010         sc->sc_flags |= SC_OP_FULL_RESET;
2011         ath_start_ani(common);
2012         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2013         ath_beacon_config(sc, NULL);
2014         mutex_unlock(&sc->mutex);
2015 }
2016
2017 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2018 {
2019         struct ath_wiphy *aphy = hw->priv;
2020         struct ath_softc *sc = aphy->sc;
2021         struct ath_hw *ah = sc->sc_ah;
2022
2023         mutex_lock(&sc->mutex);
2024         ah->coverage_class = coverage_class;
2025         ath9k_hw_init_global_settings(ah);
2026         mutex_unlock(&sc->mutex);
2027 }
2028
2029 struct ieee80211_ops ath9k_ops = {
2030         .tx                 = ath9k_tx,
2031         .start              = ath9k_start,
2032         .stop               = ath9k_stop,
2033         .add_interface      = ath9k_add_interface,
2034         .remove_interface   = ath9k_remove_interface,
2035         .config             = ath9k_config,
2036         .configure_filter   = ath9k_configure_filter,
2037         .sta_notify         = ath9k_sta_notify,
2038         .conf_tx            = ath9k_conf_tx,
2039         .bss_info_changed   = ath9k_bss_info_changed,
2040         .set_key            = ath9k_set_key,
2041         .get_tsf            = ath9k_get_tsf,
2042         .set_tsf            = ath9k_set_tsf,
2043         .reset_tsf          = ath9k_reset_tsf,
2044         .ampdu_action       = ath9k_ampdu_action,
2045         .sw_scan_start      = ath9k_sw_scan_start,
2046         .sw_scan_complete   = ath9k_sw_scan_complete,
2047         .rfkill_poll        = ath9k_rfkill_poll_state,
2048         .set_coverage_class = ath9k_set_coverage_class,
2049 };