1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
3 * Copyright 1996-1999 Thomas Bogendoerfer
5 * Derived from the lance driver written 1993,1994,1995 by Donald Becker.
7 * Copyright 1993 United States Government as represented by the
8 * Director, National Security Agency.
10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference.
13 * This driver is for PCnet32 and PCnetPCI based ethercards
15 /**************************************************************************
17 * Fixed a few bugs, related to running the controller in 32bit mode.
19 * Carsten Langgaard, carstenl@mips.com
20 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
22 *************************************************************************/
24 #define DRV_NAME "pcnet32"
25 #define DRV_VERSION "1.31b"
26 #define DRV_RELDATE "06.Oct.2005"
27 #define PFX DRV_NAME ": "
29 static const char *version =
30 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";
32 #include <linux/module.h>
33 #include <linux/kernel.h>
34 #include <linux/string.h>
35 #include <linux/errno.h>
36 #include <linux/ioport.h>
37 #include <linux/slab.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/delay.h>
41 #include <linux/init.h>
42 #include <linux/ethtool.h>
43 #include <linux/mii.h>
44 #include <linux/crc32.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/spinlock.h>
49 #include <linux/moduleparam.h>
50 #include <linux/bitops.h>
54 #include <asm/uaccess.h>
58 * PCI device identifiers for "new style" Linux PCI Device Drivers
60 static struct pci_device_id pcnet32_pci_tbl[] = {
61 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
62 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
64 * Adapters that were sold with IBM's RS/6000 or pSeries hardware have
65 * the incorrect vendor id.
67 { PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID,
68 PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, 0 },
72 MODULE_DEVICE_TABLE (pci, pcnet32_pci_tbl);
74 static int cards_found;
79 static unsigned int pcnet32_portlist[] __initdata =
80 { 0x300, 0x320, 0x340, 0x360, 0 };
84 static int pcnet32_debug = 0;
85 static int tx_start = 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
86 static int pcnet32vlb; /* check for VLB cards ? */
88 static struct net_device *pcnet32_dev;
90 static int max_interrupt_work = 2;
91 static int rx_copybreak = 200;
93 #define PCNET32_PORT_AUI 0x00
94 #define PCNET32_PORT_10BT 0x01
95 #define PCNET32_PORT_GPSI 0x02
96 #define PCNET32_PORT_MII 0x03
98 #define PCNET32_PORT_PORTSEL 0x03
99 #define PCNET32_PORT_ASEL 0x04
100 #define PCNET32_PORT_100 0x40
101 #define PCNET32_PORT_FD 0x80
103 #define PCNET32_DMA_MASK 0xffffffff
105 #define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ))
106 #define PCNET32_BLINK_TIMEOUT (jiffies + (HZ/4))
109 * table to translate option values from tulip
110 * to internal options
112 static unsigned char options_mapping[] = {
113 PCNET32_PORT_ASEL, /* 0 Auto-select */
114 PCNET32_PORT_AUI, /* 1 BNC/AUI */
115 PCNET32_PORT_AUI, /* 2 AUI/BNC */
116 PCNET32_PORT_ASEL, /* 3 not supported */
117 PCNET32_PORT_10BT | PCNET32_PORT_FD, /* 4 10baseT-FD */
118 PCNET32_PORT_ASEL, /* 5 not supported */
119 PCNET32_PORT_ASEL, /* 6 not supported */
120 PCNET32_PORT_ASEL, /* 7 not supported */
121 PCNET32_PORT_ASEL, /* 8 not supported */
122 PCNET32_PORT_MII, /* 9 MII 10baseT */
123 PCNET32_PORT_MII | PCNET32_PORT_FD, /* 10 MII 10baseT-FD */
124 PCNET32_PORT_MII, /* 11 MII (autosel) */
125 PCNET32_PORT_10BT, /* 12 10BaseT */
126 PCNET32_PORT_MII | PCNET32_PORT_100, /* 13 MII 100BaseTx */
127 PCNET32_PORT_MII | PCNET32_PORT_100 | PCNET32_PORT_FD, /* 14 MII 100BaseTx-FD */
128 PCNET32_PORT_ASEL /* 15 not supported */
131 static const char pcnet32_gstrings_test[][ETH_GSTRING_LEN] = {
132 "Loopback test (offline)"
134 #define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN)
136 #define PCNET32_NUM_REGS 168
138 #define MAX_UNITS 8 /* More are supported, limit only on options */
139 static int options[MAX_UNITS];
140 static int full_duplex[MAX_UNITS];
141 static int homepna[MAX_UNITS];
144 * Theory of Operation
146 * This driver uses the same software structure as the normal lance
147 * driver. So look for a verbose description in lance.c. The differences
148 * to the normal lance driver is the use of the 32bit mode of PCnet32
149 * and PCnetPCI chips. Because these chips are 32bit chips, there is no
150 * 16MB limitation and we don't need bounce buffers.
155 * v0.01: Initial version
156 * only tested on Alpha Noname Board
157 * v0.02: changed IRQ handling for new interrupt scheme (dev_id)
158 * tested on a ASUS SP3G
159 * v0.10: fixed an odd problem with the 79C974 in a Compaq Deskpro XL
160 * looks like the 974 doesn't like stopping and restarting in a
161 * short period of time; now we do a reinit of the lance; the
162 * bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
163 * and hangs the machine (thanks to Klaus Liedl for debugging)
164 * v0.12: by suggestion from Donald Becker: Renamed driver to pcnet32,
165 * made it standalone (no need for lance.c)
166 * v0.13: added additional PCI detecting for special PCI devices (Compaq)
167 * v0.14: stripped down additional PCI probe (thanks to David C Niemi
168 * and sveneric@xs4all.nl for testing this on their Compaq boxes)
169 * v0.15: added 79C965 (VLB) probe
170 * added interrupt sharing for PCI chips
171 * v0.16: fixed set_multicast_list on Alpha machines
172 * v0.17: removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
173 * v0.19: changed setting of autoselect bit
174 * v0.20: removed additional Compaq PCI probe; there is now a working one
175 * in arch/i386/bios32.c
176 * v0.21: added endian conversion for ppc, from work by cort@cs.nmt.edu
177 * v0.22: added printing of status to ring dump
178 * v0.23: changed enet_statistics to net_devive_stats
179 * v0.90: added multicast filter
180 * added module support
181 * changed irq probe to new style
182 * added PCnetFast chip id
183 * added fix for receive stalls with Intel saturn chipsets
184 * added in-place rx skbs like in the tulip driver
186 * v0.91: added PCnetFast+ chip id
188 * v1.00: added some stuff from Donald Becker's 2.0.34 version
189 * added support for byte counters in net_dev_stats
190 * v1.01: do ring dumps, only when debugging the driver
191 * increased the transmit timeout
192 * v1.02: fixed memory leak in pcnet32_init_ring()
193 * v1.10: workaround for stopped transmitter
194 * added port selection for modules
195 * detect special T1/E1 WAN card and setup port selection
196 * v1.11: fixed wrong checking of Tx errors
197 * v1.20: added check of return value kmalloc (cpeterso@cs.washington.edu)
198 * added save original kmalloc addr for freeing (mcr@solidum.com)
199 * added support for PCnetHome chip (joe@MIT.EDU)
200 * rewritten PCI card detection
201 * added dwio mode to get driver working on some PPC machines
202 * v1.21: added mii selection and mii ioctl
203 * v1.22: changed pci scanning code to make PPC people happy
204 * fixed switching to 32bit mode in pcnet32_open() (thanks
205 * to Michael Richard <mcr@solidum.com> for noticing this one)
206 * added sub vendor/device id matching (thanks again to
207 * Michael Richard <mcr@solidum.com>)
208 * added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
209 * v1.23 fixed small bug, when manual selecting MII speed/duplex
210 * v1.24 Applied Thomas' patch to use TxStartPoint and thus decrease TxFIFO
211 * underflows. Added tx_start_pt module parameter. Increased
212 * TX_RING_SIZE from 16 to 32. Added #ifdef'd code to use DXSUFLO
213 * for FAST[+] chipsets. <kaf@fc.hp.com>
214 * v1.24ac Added SMP spinlocking - Alan Cox <alan@redhat.com>
215 * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com>
216 * v1.26 Converted to pci_alloc_consistent, Jamey Hicks / George France
217 * <jamey@crl.dec.com>
218 * - Fixed a few bugs, related to running the controller in 32bit mode.
219 * 23 Oct, 2000. Carsten Langgaard, carstenl@mips.com
220 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
221 * v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
222 * v1.27 improved CSR/PROM address detection, lots of cleanups,
223 * new pcnet32vlb module option, HP-PARISC support,
224 * added module parameter descriptions,
225 * initial ethtool support - Helge Deller <deller@gmx.de>
226 * v1.27a Sun Feb 10 2002 Go Taniguchi <go@turbolinux.co.jp>
227 * use alloc_etherdev and register_netdev
228 * fix pci probe not increment cards_found
229 * FD auto negotiate error workaround for xSeries250
230 * clean up and using new mii module
231 * v1.27b Sep 30 2002 Kent Yoder <yoder1@us.ibm.com>
232 * Added timer for cable connection state changes.
233 * v1.28 20 Feb 2004 Don Fry <brazilnut@us.ibm.com>
234 * Jon Mason <jonmason@us.ibm.com>, Chinmay Albal <albal@in.ibm.com>
235 * Now uses ethtool_ops, netif_msg_* and generic_mii_ioctl.
236 * Fixes bogus 'Bus master arbitration failure', pci_[un]map_single
237 * length errors, and transmit hangs. Cleans up after errors in open.
238 * Jim Lewis <jklewis@us.ibm.com> added ethernet loopback test.
239 * Thomas Munck Steenholdt <tmus@tmus.dk> non-mii ioctl corrections.
240 * v1.29 6 Apr 2004 Jim Lewis <jklewis@us.ibm.com> added physical
241 * identification code (blink led's) and register dump.
242 * Don Fry added timer for 971/972 so skbufs don't remain on tx ring
244 * v1.30 18 May 2004 Don Fry removed timer and Last Transmit Interrupt
245 * (ltint) as they added complexity and didn't give good throughput.
246 * v1.30a 22 May 2004 Don Fry limit frames received during interrupt.
247 * v1.30b 24 May 2004 Don Fry fix bogus tx carrier errors with 79c973,
248 * assisted by Bruce Penrod <bmpenrod@endruntechnologies.com>.
249 * v1.30c 25 May 2004 Don Fry added netif_wake_queue after pcnet32_restart.
250 * v1.30d 01 Jun 2004 Don Fry discard oversize rx packets.
251 * v1.30e 11 Jun 2004 Don Fry recover after fifo error and rx hang.
252 * v1.30f 16 Jun 2004 Don Fry cleanup IRQ to allow 0 and 1 for PCI,
253 * expanding on suggestions from Ralf Baechle <ralf@linux-mips.org>,
254 * and Brian Murphy <brian@murphy.dk>.
255 * v1.30g 22 Jun 2004 Patrick Simmons <psimmons@flash.net> added option
256 * homepna for selecting HomePNA mode for PCNet/Home 79C978.
257 * v1.30h 24 Jun 2004 Don Fry correctly select auto, speed, duplex in bcr32.
258 * v1.30i 28 Jun 2004 Don Fry change to use module_param.
259 * v1.30j 29 Apr 2005 Don Fry fix skb/map leak with loopback test.
260 * v1.31 02 Sep 2005 Hubert WS Lin <wslin@tw.ibm.c0m> added set_ringparam().
261 * v1.31a 12 Sep 2005 Hubert WS Lin <wslin@tw.ibm.c0m> set min ring size to 4
262 * to allow loopback test to work unchanged.
263 * v1.31b 06 Oct 2005 Don Fry changed alloc_ring to show name of device
264 * if allocation fails
269 * Set the number of Tx and Rx buffers, using Log_2(# buffers).
270 * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
271 * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
273 #ifndef PCNET32_LOG_TX_BUFFERS
274 #define PCNET32_LOG_TX_BUFFERS 4
275 #define PCNET32_LOG_RX_BUFFERS 5
276 #define PCNET32_LOG_MAX_TX_BUFFERS 9 /* 2^9 == 512 */
277 #define PCNET32_LOG_MAX_RX_BUFFERS 9
280 #define TX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS))
281 #define TX_MAX_RING_SIZE (1 << (PCNET32_LOG_MAX_TX_BUFFERS))
283 #define RX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS))
284 #define RX_MAX_RING_SIZE (1 << (PCNET32_LOG_MAX_RX_BUFFERS))
286 #define PKT_BUF_SZ 1544
288 /* Offsets from base I/O address. */
289 #define PCNET32_WIO_RDP 0x10
290 #define PCNET32_WIO_RAP 0x12
291 #define PCNET32_WIO_RESET 0x14
292 #define PCNET32_WIO_BDP 0x16
294 #define PCNET32_DWIO_RDP 0x10
295 #define PCNET32_DWIO_RAP 0x14
296 #define PCNET32_DWIO_RESET 0x18
297 #define PCNET32_DWIO_BDP 0x1C
299 #define PCNET32_TOTAL_SIZE 0x20
301 /* The PCNET32 Rx and Tx ring descriptors. */
302 struct pcnet32_rx_head {
310 struct pcnet32_tx_head {
318 /* The PCNET32 32-Bit initialization block, described in databook. */
319 struct pcnet32_init_block {
325 /* Receive and transmit ring base, along with extra bits. */
330 /* PCnet32 access functions */
331 struct pcnet32_access {
332 u16 (*read_csr)(unsigned long, int);
333 void (*write_csr)(unsigned long, int, u16);
334 u16 (*read_bcr)(unsigned long, int);
335 void (*write_bcr)(unsigned long, int, u16);
336 u16 (*read_rap)(unsigned long);
337 void (*write_rap)(unsigned long, u16);
338 void (*reset)(unsigned long);
342 * The first field of pcnet32_private is read by the ethernet device
343 * so the structure should be allocated using pci_alloc_consistent().
345 struct pcnet32_private {
346 struct pcnet32_init_block init_block;
347 /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
348 struct pcnet32_rx_head *rx_ring;
349 struct pcnet32_tx_head *tx_ring;
350 dma_addr_t dma_addr; /* DMA address of beginning of this
352 pci_alloc_consistent */
353 struct pci_dev *pci_dev; /* Pointer to the associated pci device
356 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
357 struct sk_buff **tx_skbuff;
358 struct sk_buff **rx_skbuff;
359 dma_addr_t *tx_dma_addr;
360 dma_addr_t *rx_dma_addr;
361 struct pcnet32_access a;
362 spinlock_t lock; /* Guard lock */
363 unsigned int cur_rx, cur_tx; /* The next free ring entry */
364 unsigned int rx_ring_size; /* current rx ring size */
365 unsigned int tx_ring_size; /* current tx ring size */
366 unsigned int rx_mod_mask; /* rx ring modular mask */
367 unsigned int tx_mod_mask; /* tx ring modular mask */
368 unsigned short rx_len_bits;
369 unsigned short tx_len_bits;
370 dma_addr_t rx_ring_dma_addr;
371 dma_addr_t tx_ring_dma_addr;
372 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
373 struct net_device_stats stats;
376 unsigned int shared_irq:1, /* shared irq possible */
377 dxsuflo:1, /* disable transmit stop on uflo */
378 mii:1; /* mii port available */
379 struct net_device *next;
380 struct mii_if_info mii_if;
381 struct timer_list watchdog_timer;
382 struct timer_list blink_timer;
383 u32 msg_enable; /* debug message level */
386 static void pcnet32_probe_vlbus(void);
387 static int pcnet32_probe_pci(struct pci_dev *, const struct pci_device_id *);
388 static int pcnet32_probe1(unsigned long, int, struct pci_dev *);
389 static int pcnet32_open(struct net_device *);
390 static int pcnet32_init_ring(struct net_device *);
391 static int pcnet32_start_xmit(struct sk_buff *, struct net_device *);
392 static int pcnet32_rx(struct net_device *);
393 static void pcnet32_tx_timeout (struct net_device *dev);
394 static irqreturn_t pcnet32_interrupt(int, void *, struct pt_regs *);
395 static int pcnet32_close(struct net_device *);
396 static struct net_device_stats *pcnet32_get_stats(struct net_device *);
397 static void pcnet32_load_multicast(struct net_device *dev);
398 static void pcnet32_set_multicast_list(struct net_device *);
399 static int pcnet32_ioctl(struct net_device *, struct ifreq *, int);
400 static void pcnet32_watchdog(struct net_device *);
401 static int mdio_read(struct net_device *dev, int phy_id, int reg_num);
402 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val);
403 static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits);
404 static void pcnet32_ethtool_test(struct net_device *dev,
405 struct ethtool_test *eth_test, u64 *data);
406 static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1);
407 static int pcnet32_phys_id(struct net_device *dev, u32 data);
408 static void pcnet32_led_blink_callback(struct net_device *dev);
409 static int pcnet32_get_regs_len(struct net_device *dev);
410 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
412 static void pcnet32_purge_tx_ring(struct net_device *dev);
413 static int pcnet32_alloc_ring(struct net_device *dev, char *name);
414 static void pcnet32_free_ring(struct net_device *dev);
418 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
419 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
423 static u16 pcnet32_wio_read_csr (unsigned long addr, int index)
425 outw (index, addr+PCNET32_WIO_RAP);
426 return inw (addr+PCNET32_WIO_RDP);
429 static void pcnet32_wio_write_csr (unsigned long addr, int index, u16 val)
431 outw (index, addr+PCNET32_WIO_RAP);
432 outw (val, addr+PCNET32_WIO_RDP);
435 static u16 pcnet32_wio_read_bcr (unsigned long addr, int index)
437 outw (index, addr+PCNET32_WIO_RAP);
438 return inw (addr+PCNET32_WIO_BDP);
441 static void pcnet32_wio_write_bcr (unsigned long addr, int index, u16 val)
443 outw (index, addr+PCNET32_WIO_RAP);
444 outw (val, addr+PCNET32_WIO_BDP);
447 static u16 pcnet32_wio_read_rap (unsigned long addr)
449 return inw (addr+PCNET32_WIO_RAP);
452 static void pcnet32_wio_write_rap (unsigned long addr, u16 val)
454 outw (val, addr+PCNET32_WIO_RAP);
457 static void pcnet32_wio_reset (unsigned long addr)
459 inw (addr+PCNET32_WIO_RESET);
462 static int pcnet32_wio_check (unsigned long addr)
464 outw (88, addr+PCNET32_WIO_RAP);
465 return (inw (addr+PCNET32_WIO_RAP) == 88);
468 static struct pcnet32_access pcnet32_wio = {
469 .read_csr = pcnet32_wio_read_csr,
470 .write_csr = pcnet32_wio_write_csr,
471 .read_bcr = pcnet32_wio_read_bcr,
472 .write_bcr = pcnet32_wio_write_bcr,
473 .read_rap = pcnet32_wio_read_rap,
474 .write_rap = pcnet32_wio_write_rap,
475 .reset = pcnet32_wio_reset
478 static u16 pcnet32_dwio_read_csr (unsigned long addr, int index)
480 outl (index, addr+PCNET32_DWIO_RAP);
481 return (inl (addr+PCNET32_DWIO_RDP) & 0xffff);
484 static void pcnet32_dwio_write_csr (unsigned long addr, int index, u16 val)
486 outl (index, addr+PCNET32_DWIO_RAP);
487 outl (val, addr+PCNET32_DWIO_RDP);
490 static u16 pcnet32_dwio_read_bcr (unsigned long addr, int index)
492 outl (index, addr+PCNET32_DWIO_RAP);
493 return (inl (addr+PCNET32_DWIO_BDP) & 0xffff);
496 static void pcnet32_dwio_write_bcr (unsigned long addr, int index, u16 val)
498 outl (index, addr+PCNET32_DWIO_RAP);
499 outl (val, addr+PCNET32_DWIO_BDP);
502 static u16 pcnet32_dwio_read_rap (unsigned long addr)
504 return (inl (addr+PCNET32_DWIO_RAP) & 0xffff);
507 static void pcnet32_dwio_write_rap (unsigned long addr, u16 val)
509 outl (val, addr+PCNET32_DWIO_RAP);
512 static void pcnet32_dwio_reset (unsigned long addr)
514 inl (addr+PCNET32_DWIO_RESET);
517 static int pcnet32_dwio_check (unsigned long addr)
519 outl (88, addr+PCNET32_DWIO_RAP);
520 return ((inl (addr+PCNET32_DWIO_RAP) & 0xffff) == 88);
523 static struct pcnet32_access pcnet32_dwio = {
524 .read_csr = pcnet32_dwio_read_csr,
525 .write_csr = pcnet32_dwio_write_csr,
526 .read_bcr = pcnet32_dwio_read_bcr,
527 .write_bcr = pcnet32_dwio_write_bcr,
528 .read_rap = pcnet32_dwio_read_rap,
529 .write_rap = pcnet32_dwio_write_rap,
530 .reset = pcnet32_dwio_reset
533 #ifdef CONFIG_NET_POLL_CONTROLLER
534 static void pcnet32_poll_controller(struct net_device *dev)
536 disable_irq(dev->irq);
537 pcnet32_interrupt(0, dev, NULL);
538 enable_irq(dev->irq);
543 static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
545 struct pcnet32_private *lp = dev->priv;
550 spin_lock_irqsave(&lp->lock, flags);
551 mii_ethtool_gset(&lp->mii_if, cmd);
552 spin_unlock_irqrestore(&lp->lock, flags);
558 static int pcnet32_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
560 struct pcnet32_private *lp = dev->priv;
565 spin_lock_irqsave(&lp->lock, flags);
566 r = mii_ethtool_sset(&lp->mii_if, cmd);
567 spin_unlock_irqrestore(&lp->lock, flags);
572 static void pcnet32_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
574 struct pcnet32_private *lp = dev->priv;
576 strcpy (info->driver, DRV_NAME);
577 strcpy (info->version, DRV_VERSION);
579 strcpy (info->bus_info, pci_name(lp->pci_dev));
581 sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr);
584 static u32 pcnet32_get_link(struct net_device *dev)
586 struct pcnet32_private *lp = dev->priv;
590 spin_lock_irqsave(&lp->lock, flags);
592 r = mii_link_ok(&lp->mii_if);
594 ulong ioaddr = dev->base_addr; /* card base I/O address */
595 r = (lp->a.read_bcr(ioaddr, 4) != 0xc0);
597 spin_unlock_irqrestore(&lp->lock, flags);
602 static u32 pcnet32_get_msglevel(struct net_device *dev)
604 struct pcnet32_private *lp = dev->priv;
605 return lp->msg_enable;
608 static void pcnet32_set_msglevel(struct net_device *dev, u32 value)
610 struct pcnet32_private *lp = dev->priv;
611 lp->msg_enable = value;
614 static int pcnet32_nway_reset(struct net_device *dev)
616 struct pcnet32_private *lp = dev->priv;
621 spin_lock_irqsave(&lp->lock, flags);
622 r = mii_nway_restart(&lp->mii_if);
623 spin_unlock_irqrestore(&lp->lock, flags);
628 static void pcnet32_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
630 struct pcnet32_private *lp = dev->priv;
632 ering->tx_max_pending = TX_MAX_RING_SIZE - 1;
633 ering->tx_pending = lp->tx_ring_size - 1;
634 ering->rx_max_pending = RX_MAX_RING_SIZE - 1;
635 ering->rx_pending = lp->rx_ring_size - 1;
638 static int pcnet32_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
640 struct pcnet32_private *lp = dev->priv;
644 if (ering->rx_mini_pending || ering->rx_jumbo_pending)
647 if (netif_running(dev))
650 spin_lock_irqsave(&lp->lock, flags);
651 pcnet32_free_ring(dev);
652 lp->tx_ring_size = min(ering->tx_pending, (unsigned int) TX_MAX_RING_SIZE);
653 lp->rx_ring_size = min(ering->rx_pending, (unsigned int) RX_MAX_RING_SIZE);
655 /* set the minimum ring size to 4, to allow the loopback test to work
658 for (i = 2; i <= PCNET32_LOG_MAX_TX_BUFFERS; i++) {
659 if (lp->tx_ring_size <= (1 << i))
662 lp->tx_ring_size = (1 << i);
663 lp->tx_mod_mask = lp->tx_ring_size - 1;
664 lp->tx_len_bits = (i << 12);
666 for (i = 2; i <= PCNET32_LOG_MAX_RX_BUFFERS; i++) {
667 if (lp->rx_ring_size <= (1 << i))
670 lp->rx_ring_size = (1 << i);
671 lp->rx_mod_mask = lp->rx_ring_size - 1;
672 lp->rx_len_bits = (i << 4);
674 if (pcnet32_alloc_ring(dev, dev->name)) {
675 pcnet32_free_ring(dev);
676 spin_unlock_irqrestore(&lp->lock, flags);
680 spin_unlock_irqrestore(&lp->lock, flags);
682 if (pcnet32_debug & NETIF_MSG_DRV)
683 printk(KERN_INFO PFX "%s: Ring Param Settings: RX: %d, TX: %d\n",
684 dev->name, lp->rx_ring_size, lp->tx_ring_size);
686 if (netif_running(dev))
692 static void pcnet32_get_strings(struct net_device *dev, u32 stringset, u8 *data)
694 memcpy(data, pcnet32_gstrings_test, sizeof(pcnet32_gstrings_test));
697 static int pcnet32_self_test_count(struct net_device *dev)
699 return PCNET32_TEST_LEN;
702 static void pcnet32_ethtool_test(struct net_device *dev,
703 struct ethtool_test *test, u64 *data)
705 struct pcnet32_private *lp = dev->priv;
708 if (test->flags == ETH_TEST_FL_OFFLINE) {
709 rc = pcnet32_loopback_test(dev, data);
711 if (netif_msg_hw(lp))
712 printk(KERN_DEBUG "%s: Loopback test failed.\n", dev->name);
713 test->flags |= ETH_TEST_FL_FAILED;
714 } else if (netif_msg_hw(lp))
715 printk(KERN_DEBUG "%s: Loopback test passed.\n", dev->name);
716 } else if (netif_msg_hw(lp))
717 printk(KERN_DEBUG "%s: No tests to run (specify 'Offline' on ethtool).", dev->name);
718 } /* end pcnet32_ethtool_test */
720 static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1)
722 struct pcnet32_private *lp = dev->priv;
723 struct pcnet32_access *a = &lp->a; /* access to registers */
724 ulong ioaddr = dev->base_addr; /* card base I/O address */
725 struct sk_buff *skb; /* sk buff */
726 int x, i; /* counters */
727 int numbuffs = 4; /* number of TX/RX buffers and descs */
728 u16 status = 0x8300; /* TX ring status */
729 u16 teststatus; /* test of ring status */
730 int rc; /* return code */
731 int size; /* size of packets */
732 unsigned char *packet; /* source packet data */
733 static int data_len = 60; /* length of source packets */
737 *data1 = 1; /* status of test, default to fail */
738 rc = 1; /* default to fail */
740 if (netif_running(dev))
743 spin_lock_irqsave(&lp->lock, flags);
745 /* Reset the PCNET32 */
746 lp->a.reset (ioaddr);
748 /* switch pcnet32 to 32bit mode */
749 lp->a.write_bcr (ioaddr, 20, 2);
751 lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
752 lp->init_block.filter[0] = 0;
753 lp->init_block.filter[1] = 0;
755 /* purge & init rings but don't actually restart */
756 pcnet32_restart(dev, 0x0000);
758 lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
760 /* Initialize Transmit buffers. */
761 size = data_len + 15;
762 for (x=0; x<numbuffs; x++) {
763 if (!(skb = dev_alloc_skb(size))) {
764 if (netif_msg_hw(lp))
765 printk(KERN_DEBUG "%s: Cannot allocate skb at line: %d!\n",
766 dev->name, __LINE__);
770 skb_put(skb, size); /* create space for data */
771 lp->tx_skbuff[x] = skb;
772 lp->tx_ring[x].length = le16_to_cpu(-skb->len);
773 lp->tx_ring[x].misc = 0;
775 /* put DA and SA into the skb */
777 *packet++ = dev->dev_addr[i];
779 *packet++ = dev->dev_addr[i];
785 /* fill packet with data */
786 for (i=0; i<data_len; i++)
789 lp->tx_dma_addr[x] = pci_map_single(lp->pci_dev, skb->data,
790 skb->len, PCI_DMA_TODEVICE);
791 lp->tx_ring[x].base = (u32)le32_to_cpu(lp->tx_dma_addr[x]);
792 wmb(); /* Make sure owner changes after all others are visible */
793 lp->tx_ring[x].status = le16_to_cpu(status);
797 x = a->read_bcr(ioaddr, 32); /* set internal loopback in BSR32 */
799 a->write_bcr(ioaddr, 32, x);
801 lp->a.write_csr (ioaddr, 15, 0x0044); /* set int loopback in CSR15 */
803 teststatus = le16_to_cpu(0x8000);
804 lp->a.write_csr(ioaddr, 0, 0x0002); /* Set STRT bit */
806 /* Check status of descriptors */
807 for (x=0; x<numbuffs; x++) {
810 while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) {
811 spin_unlock_irqrestore(&lp->lock, flags);
813 spin_lock_irqsave(&lp->lock, flags);
818 if (netif_msg_hw(lp))
819 printk("%s: Desc %d failed to reset!\n",dev->name,x);
824 lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
826 if (netif_msg_hw(lp) && netif_msg_pktdata(lp)) {
827 printk(KERN_DEBUG "%s: RX loopback packets:\n", dev->name);
829 for (x=0; x<numbuffs; x++) {
830 printk(KERN_DEBUG "%s: Packet %d:\n", dev->name, x);
831 skb = lp->rx_skbuff[x];
832 for (i=0; i<size; i++) {
833 printk("%02x ", *(skb->data+i));
841 while (x<numbuffs && !rc) {
842 skb = lp->rx_skbuff[x];
843 packet = lp->tx_skbuff[x]->data;
844 for (i=0; i<size; i++) {
845 if (*(skb->data+i) != packet[i]) {
846 if (netif_msg_hw(lp))
847 printk(KERN_DEBUG "%s: Error in compare! %2x - %02x %02x\n",
848 dev->name, i, *(skb->data+i), packet[i]);
860 pcnet32_purge_tx_ring(dev);
861 x = a->read_csr(ioaddr, 15) & 0xFFFF;
862 a->write_csr(ioaddr, 15, (x & ~0x0044)); /* reset bits 6 and 2 */
864 x = a->read_bcr(ioaddr, 32); /* reset internal loopback */
866 a->write_bcr(ioaddr, 32, x);
868 spin_unlock_irqrestore(&lp->lock, flags);
870 if (netif_running(dev)) {
873 lp->a.write_bcr (ioaddr, 20, 4); /* return to 16bit mode */
877 } /* end pcnet32_loopback_test */
879 static void pcnet32_led_blink_callback(struct net_device *dev)
881 struct pcnet32_private *lp = dev->priv;
882 struct pcnet32_access *a = &lp->a;
883 ulong ioaddr = dev->base_addr;
887 spin_lock_irqsave(&lp->lock, flags);
888 for (i=4; i<8; i++) {
889 a->write_bcr(ioaddr, i, a->read_bcr(ioaddr, i) ^ 0x4000);
891 spin_unlock_irqrestore(&lp->lock, flags);
893 mod_timer(&lp->blink_timer, PCNET32_BLINK_TIMEOUT);
896 static int pcnet32_phys_id(struct net_device *dev, u32 data)
898 struct pcnet32_private *lp = dev->priv;
899 struct pcnet32_access *a = &lp->a;
900 ulong ioaddr = dev->base_addr;
904 if (!lp->blink_timer.function) {
905 init_timer(&lp->blink_timer);
906 lp->blink_timer.function = (void *) pcnet32_led_blink_callback;
907 lp->blink_timer.data = (unsigned long) dev;
910 /* Save the current value of the bcrs */
911 spin_lock_irqsave(&lp->lock, flags);
912 for (i=4; i<8; i++) {
913 regs[i-4] = a->read_bcr(ioaddr, i);
915 spin_unlock_irqrestore(&lp->lock, flags);
917 mod_timer(&lp->blink_timer, jiffies);
918 set_current_state(TASK_INTERRUPTIBLE);
920 if ((!data) || (data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)))
921 data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
923 msleep_interruptible(data * 1000);
924 del_timer_sync(&lp->blink_timer);
926 /* Restore the original value of the bcrs */
927 spin_lock_irqsave(&lp->lock, flags);
928 for (i=4; i<8; i++) {
929 a->write_bcr(ioaddr, i, regs[i-4]);
931 spin_unlock_irqrestore(&lp->lock, flags);
936 static int pcnet32_get_regs_len(struct net_device *dev)
938 return(PCNET32_NUM_REGS * sizeof(u16));
941 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
946 struct pcnet32_private *lp = dev->priv;
947 struct pcnet32_access *a = &lp->a;
948 ulong ioaddr = dev->base_addr;
952 spin_lock_irqsave(&lp->lock, flags);
954 csr0 = a->read_csr(ioaddr, 0);
955 if (!(csr0 & 0x0004)) { /* If not stopped */
956 /* set SUSPEND (SPND) - CSR5 bit 0 */
957 a->write_csr(ioaddr, 5, 0x0001);
959 /* poll waiting for bit to be set */
961 while (!(a->read_csr(ioaddr, 5) & 0x0001)) {
962 spin_unlock_irqrestore(&lp->lock, flags);
964 spin_lock_irqsave(&lp->lock, flags);
967 if (netif_msg_hw(lp))
968 printk(KERN_DEBUG "%s: Error getting into suspend!\n",
975 /* read address PROM */
976 for (i=0; i<16; i += 2)
977 *buff++ = inw(ioaddr + i);
979 /* read control and status registers */
980 for (i=0; i<90; i++) {
981 *buff++ = a->read_csr(ioaddr, i);
984 *buff++ = a->read_csr(ioaddr, 112);
985 *buff++ = a->read_csr(ioaddr, 114);
987 /* read bus configuration registers */
988 for (i=0; i<36; i++) {
989 *buff++ = a->read_bcr(ioaddr, i);
992 /* read mii phy registers */
994 for (i=0; i<32; i++) {
995 lp->a.write_bcr(ioaddr, 33, ((lp->mii_if.phy_id) << 5) | i);
996 *buff++ = lp->a.read_bcr(ioaddr, 34);
1000 if (!(csr0 & 0x0004)) { /* If not stopped */
1001 /* clear SUSPEND (SPND) - CSR5 bit 0 */
1002 a->write_csr(ioaddr, 5, 0x0000);
1005 i = buff - (u16 *)ptr;
1006 for (; i < PCNET32_NUM_REGS; i++)
1009 spin_unlock_irqrestore(&lp->lock, flags);
1012 static struct ethtool_ops pcnet32_ethtool_ops = {
1013 .get_settings = pcnet32_get_settings,
1014 .set_settings = pcnet32_set_settings,
1015 .get_drvinfo = pcnet32_get_drvinfo,
1016 .get_msglevel = pcnet32_get_msglevel,
1017 .set_msglevel = pcnet32_set_msglevel,
1018 .nway_reset = pcnet32_nway_reset,
1019 .get_link = pcnet32_get_link,
1020 .get_ringparam = pcnet32_get_ringparam,
1021 .set_ringparam = pcnet32_set_ringparam,
1022 .get_tx_csum = ethtool_op_get_tx_csum,
1023 .get_sg = ethtool_op_get_sg,
1024 .get_tso = ethtool_op_get_tso,
1025 .get_strings = pcnet32_get_strings,
1026 .self_test_count = pcnet32_self_test_count,
1027 .self_test = pcnet32_ethtool_test,
1028 .phys_id = pcnet32_phys_id,
1029 .get_regs_len = pcnet32_get_regs_len,
1030 .get_regs = pcnet32_get_regs,
1031 .get_perm_addr = ethtool_op_get_perm_addr,
1034 /* only probes for non-PCI devices, the rest are handled by
1035 * pci_register_driver via pcnet32_probe_pci */
1037 static void __devinit
1038 pcnet32_probe_vlbus(void)
1040 unsigned int *port, ioaddr;
1042 /* search for PCnet32 VLB cards at known addresses */
1043 for (port = pcnet32_portlist; (ioaddr = *port); port++) {
1044 if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) {
1045 /* check if there is really a pcnet chip on that ioaddr */
1046 if ((inb(ioaddr + 14) == 0x57) && (inb(ioaddr + 15) == 0x57)) {
1047 pcnet32_probe1(ioaddr, 0, NULL);
1049 release_region(ioaddr, PCNET32_TOTAL_SIZE);
1056 static int __devinit
1057 pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)
1059 unsigned long ioaddr;
1062 err = pci_enable_device(pdev);
1064 if (pcnet32_debug & NETIF_MSG_PROBE)
1065 printk(KERN_ERR PFX "failed to enable device -- err=%d\n", err);
1068 pci_set_master(pdev);
1070 ioaddr = pci_resource_start (pdev, 0);
1072 if (pcnet32_debug & NETIF_MSG_PROBE)
1073 printk (KERN_ERR PFX "card has no PCI IO resources, aborting\n");
1077 if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {
1078 if (pcnet32_debug & NETIF_MSG_PROBE)
1079 printk(KERN_ERR PFX "architecture does not support 32bit PCI busmaster DMA\n");
1082 if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci") == NULL) {
1083 if (pcnet32_debug & NETIF_MSG_PROBE)
1084 printk(KERN_ERR PFX "io address range already allocated\n");
1088 err = pcnet32_probe1(ioaddr, 1, pdev);
1090 pci_disable_device(pdev);
1097 * Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
1098 * pdev will be NULL when called from pcnet32_probe_vlbus.
1100 static int __devinit
1101 pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1103 struct pcnet32_private *lp;
1104 dma_addr_t lp_dma_addr;
1106 int fdx, mii, fset, dxsuflo;
1109 struct net_device *dev;
1110 struct pcnet32_access *a = NULL;
1114 /* reset the chip */
1115 pcnet32_wio_reset(ioaddr);
1117 /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
1118 if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) {
1121 pcnet32_dwio_reset(ioaddr);
1122 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {
1125 goto err_release_region;
1128 chip_version = a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr,89) << 16);
1129 if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))
1130 printk(KERN_INFO " PCnet chip version is %#x.\n", chip_version);
1131 if ((chip_version & 0xfff) != 0x003) {
1132 if (pcnet32_debug & NETIF_MSG_PROBE)
1133 printk(KERN_INFO PFX "Unsupported chip version.\n");
1134 goto err_release_region;
1137 /* initialize variables */
1138 fdx = mii = fset = dxsuflo = 0;
1139 chip_version = (chip_version >> 12) & 0xffff;
1141 switch (chip_version) {
1143 chipname = "PCnet/PCI 79C970"; /* PCI */
1147 chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
1149 chipname = "PCnet/32 79C965"; /* 486/VL bus */
1152 chipname = "PCnet/PCI II 79C970A"; /* PCI */
1156 chipname = "PCnet/FAST 79C971"; /* PCI */
1157 fdx = 1; mii = 1; fset = 1;
1160 chipname = "PCnet/FAST+ 79C972"; /* PCI */
1161 fdx = 1; mii = 1; fset = 1;
1164 chipname = "PCnet/FAST III 79C973"; /* PCI */
1168 chipname = "PCnet/Home 79C978"; /* PCI */
1171 * This is based on specs published at www.amd.com. This section
1172 * assumes that a card with a 79C978 wants to go into standard
1173 * ethernet mode. The 79C978 can also go into 1Mb HomePNA mode,
1174 * and the module option homepna=1 can select this instead.
1176 media = a->read_bcr(ioaddr, 49);
1177 media &= ~3; /* default to 10Mb ethernet */
1178 if (cards_found < MAX_UNITS && homepna[cards_found])
1179 media |= 1; /* switch to home wiring mode */
1180 if (pcnet32_debug & NETIF_MSG_PROBE)
1181 printk(KERN_DEBUG PFX "media set to %sMbit mode.\n",
1182 (media & 1) ? "1" : "10");
1183 a->write_bcr(ioaddr, 49, media);
1186 chipname = "PCnet/FAST III 79C975"; /* PCI */
1190 chipname = "PCnet/PRO 79C976";
1194 if (pcnet32_debug & NETIF_MSG_PROBE)
1195 printk(KERN_INFO PFX "PCnet version %#x, no PCnet32 chip.\n",
1197 goto err_release_region;
1201 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
1202 * starting until the packet is loaded. Strike one for reliability, lose
1203 * one for latency - although on PCI this isnt a big loss. Older chips
1204 * have FIFO's smaller than a packet, so you can't do this.
1205 * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
1209 a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));
1210 a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
1214 dev = alloc_etherdev(0);
1216 if (pcnet32_debug & NETIF_MSG_PROBE)
1217 printk(KERN_ERR PFX "Memory allocation failed.\n");
1219 goto err_release_region;
1221 SET_NETDEV_DEV(dev, &pdev->dev);
1223 if (pcnet32_debug & NETIF_MSG_PROBE)
1224 printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
1226 /* In most chips, after a chip reset, the ethernet address is read from the
1227 * station address PROM at the base address and programmed into the
1228 * "Physical Address Registers" CSR12-14.
1229 * As a precautionary measure, we read the PROM values and complain if
1230 * they disagree with the CSRs. Either way, we use the CSR values, and
1231 * double check that they are valid.
1233 for (i = 0; i < 3; i++) {
1235 val = a->read_csr(ioaddr, i+12) & 0x0ffff;
1236 /* There may be endianness issues here. */
1237 dev->dev_addr[2*i] = val & 0x0ff;
1238 dev->dev_addr[2*i+1] = (val >> 8) & 0x0ff;
1241 /* read PROM address and compare with CSR address */
1242 for (i = 0; i < 6; i++)
1243 promaddr[i] = inb(ioaddr + i);
1245 if (memcmp(promaddr, dev->dev_addr, 6)
1246 || !is_valid_ether_addr(dev->dev_addr)) {
1248 if (is_valid_ether_addr(promaddr)) {
1250 if (!is_valid_ether_addr(dev->dev_addr)
1251 && is_valid_ether_addr(promaddr)) {
1253 if (pcnet32_debug & NETIF_MSG_PROBE) {
1254 printk(" warning: CSR address invalid,\n");
1255 printk(KERN_INFO " using instead PROM address of");
1257 memcpy(dev->dev_addr, promaddr, 6);
1260 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1262 /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
1263 if (!is_valid_ether_addr(dev->perm_addr))
1264 memset(dev->dev_addr, 0, sizeof(dev->dev_addr));
1266 if (pcnet32_debug & NETIF_MSG_PROBE) {
1267 for (i = 0; i < 6; i++)
1268 printk(" %2.2x", dev->dev_addr[i]);
1270 /* Version 0x2623 and 0x2624 */
1271 if (((chip_version + 1) & 0xfffe) == 0x2624) {
1272 i = a->read_csr(ioaddr, 80) & 0x0C00; /* Check tx_start_pt */
1273 printk("\n" KERN_INFO " tx_start_pt(0x%04x):",i);
1275 case 0: printk(" 20 bytes,"); break;
1276 case 1: printk(" 64 bytes,"); break;
1277 case 2: printk(" 128 bytes,"); break;
1278 case 3: printk("~220 bytes,"); break;
1280 i = a->read_bcr(ioaddr, 18); /* Check Burst/Bus control */
1281 printk(" BCR18(%x):",i&0xffff);
1282 if (i & (1<<5)) printk("BurstWrEn ");
1283 if (i & (1<<6)) printk("BurstRdEn ");
1284 if (i & (1<<7)) printk("DWordIO ");
1285 if (i & (1<<11)) printk("NoUFlow ");
1286 i = a->read_bcr(ioaddr, 25);
1287 printk("\n" KERN_INFO " SRAMSIZE=0x%04x,",i<<8);
1288 i = a->read_bcr(ioaddr, 26);
1289 printk(" SRAM_BND=0x%04x,",i<<8);
1290 i = a->read_bcr(ioaddr, 27);
1291 if (i & (1<<14)) printk("LowLatRx");
1295 dev->base_addr = ioaddr;
1296 /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
1297 if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
1298 if (pcnet32_debug & NETIF_MSG_PROBE)
1299 printk(KERN_ERR PFX "Consistent memory allocation failed.\n");
1301 goto err_free_netdev;
1304 memset(lp, 0, sizeof(*lp));
1305 lp->dma_addr = lp_dma_addr;
1308 spin_lock_init(&lp->lock);
1310 SET_MODULE_OWNER(dev);
1311 SET_NETDEV_DEV(dev, &pdev->dev);
1313 lp->name = chipname;
1314 lp->shared_irq = shared;
1315 lp->tx_ring_size = TX_RING_SIZE; /* default tx ring size */
1316 lp->rx_ring_size = RX_RING_SIZE; /* default rx ring size */
1317 lp->tx_mod_mask = lp->tx_ring_size - 1;
1318 lp->rx_mod_mask = lp->rx_ring_size - 1;
1319 lp->tx_len_bits = (PCNET32_LOG_TX_BUFFERS << 12);
1320 lp->rx_len_bits = (PCNET32_LOG_RX_BUFFERS << 4);
1321 lp->mii_if.full_duplex = fdx;
1322 lp->mii_if.phy_id_mask = 0x1f;
1323 lp->mii_if.reg_num_mask = 0x1f;
1324 lp->dxsuflo = dxsuflo;
1326 lp->msg_enable = pcnet32_debug;
1327 if ((cards_found >= MAX_UNITS) || (options[cards_found] > sizeof(options_mapping)))
1328 lp->options = PCNET32_PORT_ASEL;
1330 lp->options = options_mapping[options[cards_found]];
1331 lp->mii_if.dev = dev;
1332 lp->mii_if.mdio_read = mdio_read;
1333 lp->mii_if.mdio_write = mdio_write;
1335 if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
1336 ((cards_found>=MAX_UNITS) || full_duplex[cards_found]))
1337 lp->options |= PCNET32_PORT_FD;
1340 if (pcnet32_debug & NETIF_MSG_PROBE)
1341 printk(KERN_ERR PFX "No access methods\n");
1343 goto err_free_consistent;
1347 /* prior to register_netdev, dev->name is not yet correct */
1348 if (pcnet32_alloc_ring(dev, pci_name(lp->pci_dev))) {
1352 /* detect special T1/E1 WAN card by checking for MAC address */
1353 if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0
1354 && dev->dev_addr[2] == 0x75)
1355 lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1357 lp->init_block.mode = le16_to_cpu(0x0003); /* Disable Rx and Tx. */
1358 lp->init_block.tlen_rlen = le16_to_cpu(lp->tx_len_bits | lp->rx_len_bits);
1359 for (i = 0; i < 6; i++)
1360 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1361 lp->init_block.filter[0] = 0x00000000;
1362 lp->init_block.filter[1] = 0x00000000;
1363 lp->init_block.rx_ring = (u32)le32_to_cpu(lp->rx_ring_dma_addr);
1364 lp->init_block.tx_ring = (u32)le32_to_cpu(lp->tx_ring_dma_addr);
1366 /* switch pcnet32 to 32bit mode */
1367 a->write_bcr(ioaddr, 20, 2);
1369 a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private,
1370 init_block)) & 0xffff);
1371 a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private,
1372 init_block)) >> 16);
1374 if (pdev) { /* use the IRQ provided by PCI */
1375 dev->irq = pdev->irq;
1376 if (pcnet32_debug & NETIF_MSG_PROBE)
1377 printk(" assigned IRQ %d.\n", dev->irq);
1379 unsigned long irq_mask = probe_irq_on();
1382 * To auto-IRQ we enable the initialization-done and DMA error
1383 * interrupts. For ISA boards we get a DMA error, but VLB and PCI
1386 /* Trigger an initialization just for the interrupt. */
1387 a->write_csr (ioaddr, 0, 0x41);
1390 dev->irq = probe_irq_off (irq_mask);
1392 if (pcnet32_debug & NETIF_MSG_PROBE)
1393 printk(", failed to detect IRQ line.\n");
1397 if (pcnet32_debug & NETIF_MSG_PROBE)
1398 printk(", probed IRQ %d.\n", dev->irq);
1401 /* Set the mii phy_id so that we can query the link state */
1403 lp->mii_if.phy_id = ((lp->a.read_bcr (ioaddr, 33)) >> 5) & 0x1f;
1405 init_timer (&lp->watchdog_timer);
1406 lp->watchdog_timer.data = (unsigned long) dev;
1407 lp->watchdog_timer.function = (void *) &pcnet32_watchdog;
1409 /* The PCNET32-specific entries in the device structure. */
1410 dev->open = &pcnet32_open;
1411 dev->hard_start_xmit = &pcnet32_start_xmit;
1412 dev->stop = &pcnet32_close;
1413 dev->get_stats = &pcnet32_get_stats;
1414 dev->set_multicast_list = &pcnet32_set_multicast_list;
1415 dev->do_ioctl = &pcnet32_ioctl;
1416 dev->ethtool_ops = &pcnet32_ethtool_ops;
1417 dev->tx_timeout = pcnet32_tx_timeout;
1418 dev->watchdog_timeo = (5*HZ);
1420 #ifdef CONFIG_NET_POLL_CONTROLLER
1421 dev->poll_controller = pcnet32_poll_controller;
1424 /* Fill in the generic fields of the device structure. */
1425 if (register_netdev(dev))
1429 pci_set_drvdata(pdev, dev);
1431 lp->next = pcnet32_dev;
1435 if (pcnet32_debug & NETIF_MSG_PROBE)
1436 printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name);
1439 /* enable LED writes */
1440 a->write_bcr(ioaddr, 2, a->read_bcr(ioaddr, 2) | 0x1000);
1445 pcnet32_free_ring(dev);
1446 err_free_consistent:
1447 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
1451 release_region(ioaddr, PCNET32_TOTAL_SIZE);
1456 /* if any allocation fails, caller must also call pcnet32_free_ring */
1457 static int pcnet32_alloc_ring(struct net_device *dev, char *name)
1459 struct pcnet32_private *lp = dev->priv;
1461 lp->tx_ring = pci_alloc_consistent(lp->pci_dev,
1462 sizeof(struct pcnet32_tx_head) * lp->tx_ring_size,
1463 &lp->tx_ring_dma_addr);
1464 if (lp->tx_ring == NULL) {
1465 if (pcnet32_debug & NETIF_MSG_DRV)
1466 printk("\n" KERN_ERR PFX "%s: Consistent memory allocation failed.\n",
1471 lp->rx_ring = pci_alloc_consistent(lp->pci_dev,
1472 sizeof(struct pcnet32_rx_head) * lp->rx_ring_size,
1473 &lp->rx_ring_dma_addr);
1474 if (lp->rx_ring == NULL) {
1475 if (pcnet32_debug & NETIF_MSG_DRV)
1476 printk("\n" KERN_ERR PFX "%s: Consistent memory allocation failed.\n",
1481 lp->tx_dma_addr = kmalloc(sizeof(dma_addr_t) * lp->tx_ring_size,
1483 if (!lp->tx_dma_addr) {
1484 if (pcnet32_debug & NETIF_MSG_DRV)
1485 printk("\n" KERN_ERR PFX "%s: Memory allocation failed.\n", name);
1488 memset(lp->tx_dma_addr, 0, sizeof(dma_addr_t) * lp->tx_ring_size);
1490 lp->rx_dma_addr = kmalloc(sizeof(dma_addr_t) * lp->rx_ring_size,
1492 if (!lp->rx_dma_addr) {
1493 if (pcnet32_debug & NETIF_MSG_DRV)
1494 printk("\n" KERN_ERR PFX "%s: Memory allocation failed.\n", name);
1497 memset(lp->rx_dma_addr, 0, sizeof(dma_addr_t) * lp->rx_ring_size);
1499 lp->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * lp->tx_ring_size,
1501 if (!lp->tx_skbuff) {
1502 if (pcnet32_debug & NETIF_MSG_DRV)
1503 printk("\n" KERN_ERR PFX "%s: Memory allocation failed.\n", name);
1506 memset(lp->tx_skbuff, 0, sizeof(struct sk_buff *) * lp->tx_ring_size);
1508 lp->rx_skbuff = kmalloc(sizeof(struct sk_buff *) * lp->rx_ring_size,
1510 if (!lp->rx_skbuff) {
1511 if (pcnet32_debug & NETIF_MSG_DRV)
1512 printk("\n" KERN_ERR PFX "%s: Memory allocation failed.\n", name);
1515 memset(lp->rx_skbuff, 0, sizeof(struct sk_buff *) * lp->rx_ring_size);
1521 static void pcnet32_free_ring(struct net_device *dev)
1523 struct pcnet32_private *lp = dev->priv;
1525 kfree(lp->tx_skbuff);
1526 lp->tx_skbuff = NULL;
1528 kfree(lp->rx_skbuff);
1529 lp->rx_skbuff = NULL;
1531 kfree(lp->tx_dma_addr);
1532 lp->tx_dma_addr = NULL;
1534 kfree(lp->rx_dma_addr);
1535 lp->rx_dma_addr = NULL;
1538 pci_free_consistent(lp->pci_dev, sizeof(struct pcnet32_tx_head) * lp->tx_ring_size,
1539 lp->tx_ring, lp->tx_ring_dma_addr);
1544 pci_free_consistent(lp->pci_dev, sizeof(struct pcnet32_rx_head) * lp->rx_ring_size,
1545 lp->rx_ring, lp->rx_ring_dma_addr);
1552 pcnet32_open(struct net_device *dev)
1554 struct pcnet32_private *lp = dev->priv;
1555 unsigned long ioaddr = dev->base_addr;
1559 unsigned long flags;
1561 if (request_irq(dev->irq, &pcnet32_interrupt,
1562 lp->shared_irq ? SA_SHIRQ : 0, dev->name, (void *)dev)) {
1566 spin_lock_irqsave(&lp->lock, flags);
1567 /* Check for a valid station address */
1568 if (!is_valid_ether_addr(dev->dev_addr)) {
1573 /* Reset the PCNET32 */
1574 lp->a.reset (ioaddr);
1576 /* switch pcnet32 to 32bit mode */
1577 lp->a.write_bcr (ioaddr, 20, 2);
1579 if (netif_msg_ifup(lp))
1580 printk(KERN_DEBUG "%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
1581 dev->name, dev->irq,
1582 (u32) (lp->tx_ring_dma_addr),
1583 (u32) (lp->rx_ring_dma_addr),
1584 (u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block)));
1586 /* set/reset autoselect bit */
1587 val = lp->a.read_bcr (ioaddr, 2) & ~2;
1588 if (lp->options & PCNET32_PORT_ASEL)
1590 lp->a.write_bcr (ioaddr, 2, val);
1592 /* handle full duplex setting */
1593 if (lp->mii_if.full_duplex) {
1594 val = lp->a.read_bcr (ioaddr, 9) & ~3;
1595 if (lp->options & PCNET32_PORT_FD) {
1597 if (lp->options == (PCNET32_PORT_FD | PCNET32_PORT_AUI))
1599 } else if (lp->options & PCNET32_PORT_ASEL) {
1600 /* workaround of xSeries250, turn on for 79C975 only */
1601 i = ((lp->a.read_csr(ioaddr, 88) |
1602 (lp->a.read_csr(ioaddr,89) << 16)) >> 12) & 0xffff;
1606 lp->a.write_bcr (ioaddr, 9, val);
1609 /* set/reset GPSI bit in test register */
1610 val = lp->a.read_csr (ioaddr, 124) & ~0x10;
1611 if ((lp->options & PCNET32_PORT_PORTSEL) == PCNET32_PORT_GPSI)
1613 lp->a.write_csr (ioaddr, 124, val);
1615 /* Allied Telesyn AT 2700/2701 FX looses the link, so skip that */
1616 if (lp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_AT &&
1617 (lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2700FX ||
1618 lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2701FX)) {
1619 printk(KERN_DEBUG "%s: Skipping PHY selection.\n", dev->name);
1622 * 24 Jun 2004 according AMD, in order to change the PHY,
1623 * DANAS (or DISPM for 79C976) must be set; then select the speed,
1624 * duplex, and/or enable auto negotiation, and clear DANAS
1626 if (lp->mii && !(lp->options & PCNET32_PORT_ASEL)) {
1627 lp->a.write_bcr(ioaddr, 32,
1628 lp->a.read_bcr(ioaddr, 32) | 0x0080);
1629 /* disable Auto Negotiation, set 10Mpbs, HD */
1630 val = lp->a.read_bcr(ioaddr, 32) & ~0xb8;
1631 if (lp->options & PCNET32_PORT_FD)
1633 if (lp->options & PCNET32_PORT_100)
1635 lp->a.write_bcr (ioaddr, 32, val);
1637 if (lp->options & PCNET32_PORT_ASEL) {
1638 lp->a.write_bcr(ioaddr, 32,
1639 lp->a.read_bcr(ioaddr, 32) | 0x0080);
1640 /* enable auto negotiate, setup, disable fd */
1641 val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
1643 lp->a.write_bcr(ioaddr, 32, val);
1649 if (lp->dxsuflo) { /* Disable transmit stop on underflow */
1650 val = lp->a.read_csr (ioaddr, 3);
1652 lp->a.write_csr (ioaddr, 3, val);
1656 lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
1657 pcnet32_load_multicast(dev);
1659 if (pcnet32_init_ring(dev)) {
1664 /* Re-initialize the PCNET32, and start it when done. */
1665 lp->a.write_csr (ioaddr, 1, (lp->dma_addr +
1666 offsetof(struct pcnet32_private, init_block)) & 0xffff);
1667 lp->a.write_csr (ioaddr, 2, (lp->dma_addr +
1668 offsetof(struct pcnet32_private, init_block)) >> 16);
1670 lp->a.write_csr (ioaddr, 4, 0x0915);
1671 lp->a.write_csr (ioaddr, 0, 0x0001);
1673 netif_start_queue(dev);
1675 /* If we have mii, print the link status and start the watchdog */
1677 mii_check_media (&lp->mii_if, netif_msg_link(lp), 1);
1678 mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
1683 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
1686 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
1687 * reports that doing so triggers a bug in the '974.
1689 lp->a.write_csr (ioaddr, 0, 0x0042);
1691 if (netif_msg_ifup(lp))
1692 printk(KERN_DEBUG "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
1693 dev->name, i, (u32) (lp->dma_addr +
1694 offsetof(struct pcnet32_private, init_block)),
1695 lp->a.read_csr(ioaddr, 0));
1697 spin_unlock_irqrestore(&lp->lock, flags);
1699 return 0; /* Always succeed */
1702 /* free any allocated skbuffs */
1703 for (i = 0; i < lp->rx_ring_size; i++) {
1704 lp->rx_ring[i].status = 0;
1705 if (lp->rx_skbuff[i]) {
1706 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
1707 PCI_DMA_FROMDEVICE);
1708 dev_kfree_skb(lp->rx_skbuff[i]);
1710 lp->rx_skbuff[i] = NULL;
1711 lp->rx_dma_addr[i] = 0;
1714 pcnet32_free_ring(dev);
1717 * Switch back to 16bit mode to avoid problems with dumb
1718 * DOS packet driver after a warm reboot
1720 lp->a.write_bcr (ioaddr, 20, 4);
1723 spin_unlock_irqrestore(&lp->lock, flags);
1724 free_irq(dev->irq, dev);
1729 * The LANCE has been halted for one reason or another (busmaster memory
1730 * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
1731 * etc.). Modern LANCE variants always reload their ring-buffer
1732 * configuration when restarted, so we must reinitialize our ring
1733 * context before restarting. As part of this reinitialization,
1734 * find all packets still on the Tx ring and pretend that they had been
1735 * sent (in effect, drop the packets on the floor) - the higher-level
1736 * protocols will time out and retransmit. It'd be better to shuffle
1737 * these skbs to a temp list and then actually re-Tx them after
1738 * restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
1742 pcnet32_purge_tx_ring(struct net_device *dev)
1744 struct pcnet32_private *lp = dev->priv;
1747 for (i = 0; i < lp->tx_ring_size; i++) {
1748 lp->tx_ring[i].status = 0; /* CPU owns buffer */
1749 wmb(); /* Make sure adapter sees owner change */
1750 if (lp->tx_skbuff[i]) {
1751 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
1752 lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
1753 dev_kfree_skb_any(lp->tx_skbuff[i]);
1755 lp->tx_skbuff[i] = NULL;
1756 lp->tx_dma_addr[i] = 0;
1761 /* Initialize the PCNET32 Rx and Tx rings. */
1763 pcnet32_init_ring(struct net_device *dev)
1765 struct pcnet32_private *lp = dev->priv;
1769 lp->cur_rx = lp->cur_tx = 0;
1770 lp->dirty_rx = lp->dirty_tx = 0;
1772 for (i = 0; i < lp->rx_ring_size; i++) {
1773 struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
1774 if (rx_skbuff == NULL) {
1775 if (!(rx_skbuff = lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) {
1776 /* there is not much, we can do at this point */
1777 if (pcnet32_debug & NETIF_MSG_DRV)
1778 printk(KERN_ERR "%s: pcnet32_init_ring dev_alloc_skb failed.\n",
1782 skb_reserve (rx_skbuff, 2);
1786 if (lp->rx_dma_addr[i] == 0)
1787 lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->data,
1788 PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
1789 lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]);
1790 lp->rx_ring[i].buf_length = le16_to_cpu(2-PKT_BUF_SZ);
1791 wmb(); /* Make sure owner changes after all others are visible */
1792 lp->rx_ring[i].status = le16_to_cpu(0x8000);
1794 /* The Tx buffer address is filled in as needed, but we do need to clear
1795 * the upper ownership bit. */
1796 for (i = 0; i < lp->tx_ring_size; i++) {
1797 lp->tx_ring[i].status = 0; /* CPU owns buffer */
1798 wmb(); /* Make sure adapter sees owner change */
1799 lp->tx_ring[i].base = 0;
1800 lp->tx_dma_addr[i] = 0;
1803 lp->init_block.tlen_rlen = le16_to_cpu(lp->tx_len_bits | lp->rx_len_bits);
1804 for (i = 0; i < 6; i++)
1805 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1806 lp->init_block.rx_ring = (u32)le32_to_cpu(lp->rx_ring_dma_addr);
1807 lp->init_block.tx_ring = (u32)le32_to_cpu(lp->tx_ring_dma_addr);
1808 wmb(); /* Make sure all changes are visible */
1812 /* the pcnet32 has been issued a stop or reset. Wait for the stop bit
1813 * then flush the pending transmit operations, re-initialize the ring,
1814 * and tell the chip to initialize.
1817 pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
1819 struct pcnet32_private *lp = dev->priv;
1820 unsigned long ioaddr = dev->base_addr;
1824 for (i=0; i<100; i++)
1825 if (lp->a.read_csr(ioaddr, 0) & 0x0004)
1828 if (i >= 100 && netif_msg_drv(lp))
1829 printk(KERN_ERR "%s: pcnet32_restart timed out waiting for stop.\n",
1832 pcnet32_purge_tx_ring(dev);
1833 if (pcnet32_init_ring(dev))
1837 lp->a.write_csr (ioaddr, 0, 1);
1840 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
1843 lp->a.write_csr (ioaddr, 0, csr0_bits);
1848 pcnet32_tx_timeout (struct net_device *dev)
1850 struct pcnet32_private *lp = dev->priv;
1851 unsigned long ioaddr = dev->base_addr, flags;
1853 spin_lock_irqsave(&lp->lock, flags);
1854 /* Transmitter timeout, serious problems. */
1855 if (pcnet32_debug & NETIF_MSG_DRV)
1856 printk(KERN_ERR "%s: transmit timed out, status %4.4x, resetting.\n",
1857 dev->name, lp->a.read_csr(ioaddr, 0));
1858 lp->a.write_csr (ioaddr, 0, 0x0004);
1859 lp->stats.tx_errors++;
1860 if (netif_msg_tx_err(lp)) {
1862 printk(KERN_DEBUG " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
1863 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
1865 for (i = 0 ; i < lp->rx_ring_size; i++)
1866 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1867 le32_to_cpu(lp->rx_ring[i].base),
1868 (-le16_to_cpu(lp->rx_ring[i].buf_length)) & 0xffff,
1869 le32_to_cpu(lp->rx_ring[i].msg_length),
1870 le16_to_cpu(lp->rx_ring[i].status));
1871 for (i = 0 ; i < lp->tx_ring_size; i++)
1872 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1873 le32_to_cpu(lp->tx_ring[i].base),
1874 (-le16_to_cpu(lp->tx_ring[i].length)) & 0xffff,
1875 le32_to_cpu(lp->tx_ring[i].misc),
1876 le16_to_cpu(lp->tx_ring[i].status));
1879 pcnet32_restart(dev, 0x0042);
1881 dev->trans_start = jiffies;
1882 netif_wake_queue(dev);
1884 spin_unlock_irqrestore(&lp->lock, flags);
1889 pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
1891 struct pcnet32_private *lp = dev->priv;
1892 unsigned long ioaddr = dev->base_addr;
1895 unsigned long flags;
1897 spin_lock_irqsave(&lp->lock, flags);
1899 if (netif_msg_tx_queued(lp)) {
1900 printk(KERN_DEBUG "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
1901 dev->name, lp->a.read_csr(ioaddr, 0));
1904 /* Default status -- will not enable Successful-TxDone
1905 * interrupt when that option is available to us.
1909 /* Fill in a Tx ring entry */
1911 /* Mask to ring buffer boundary. */
1912 entry = lp->cur_tx & lp->tx_mod_mask;
1914 /* Caution: the write order is important here, set the status
1915 * with the "ownership" bits last. */
1917 lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
1919 lp->tx_ring[entry].misc = 0x00000000;
1921 lp->tx_skbuff[entry] = skb;
1922 lp->tx_dma_addr[entry] = pci_map_single(lp->pci_dev, skb->data, skb->len,
1924 lp->tx_ring[entry].base = (u32)le32_to_cpu(lp->tx_dma_addr[entry]);
1925 wmb(); /* Make sure owner changes after all others are visible */
1926 lp->tx_ring[entry].status = le16_to_cpu(status);
1929 lp->stats.tx_bytes += skb->len;
1931 /* Trigger an immediate send poll. */
1932 lp->a.write_csr (ioaddr, 0, 0x0048);
1934 dev->trans_start = jiffies;
1936 if (lp->tx_ring[(entry+1) & lp->tx_mod_mask].base != 0) {
1938 netif_stop_queue(dev);
1940 spin_unlock_irqrestore(&lp->lock, flags);
1944 /* The PCNET32 interrupt handler. */
1946 pcnet32_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1948 struct net_device *dev = dev_id;
1949 struct pcnet32_private *lp;
1950 unsigned long ioaddr;
1952 int boguscnt = max_interrupt_work;
1956 if (pcnet32_debug & NETIF_MSG_INTR)
1957 printk (KERN_DEBUG "%s(): irq %d for unknown device\n",
1962 ioaddr = dev->base_addr;
1965 spin_lock(&lp->lock);
1967 rap = lp->a.read_rap(ioaddr);
1968 while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8f00 && --boguscnt >= 0) {
1969 if (csr0 == 0xffff) {
1970 break; /* PCMCIA remove happened */
1972 /* Acknowledge all of the current interrupt sources ASAP. */
1973 lp->a.write_csr (ioaddr, 0, csr0 & ~0x004f);
1977 if (netif_msg_intr(lp))
1978 printk(KERN_DEBUG "%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1979 dev->name, csr0, lp->a.read_csr (ioaddr, 0));
1981 if (csr0 & 0x0400) /* Rx interrupt */
1984 if (csr0 & 0x0200) { /* Tx-done interrupt */
1985 unsigned int dirty_tx = lp->dirty_tx;
1988 while (dirty_tx != lp->cur_tx) {
1989 int entry = dirty_tx & lp->tx_mod_mask;
1990 int status = (short)le16_to_cpu(lp->tx_ring[entry].status);
1993 break; /* It still hasn't been Txed */
1995 lp->tx_ring[entry].base = 0;
1997 if (status & 0x4000) {
1998 /* There was an major error, log it. */
1999 int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
2000 lp->stats.tx_errors++;
2001 if (netif_msg_tx_err(lp))
2002 printk(KERN_ERR "%s: Tx error status=%04x err_status=%08x\n",
2003 dev->name, status, err_status);
2004 if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
2005 if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
2006 if (err_status & 0x10000000) lp->stats.tx_window_errors++;
2008 if (err_status & 0x40000000) {
2009 lp->stats.tx_fifo_errors++;
2010 /* Ackk! On FIFO errors the Tx unit is turned off! */
2011 /* Remove this verbosity later! */
2012 if (netif_msg_tx_err(lp))
2013 printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
2018 if (err_status & 0x40000000) {
2019 lp->stats.tx_fifo_errors++;
2020 if (! lp->dxsuflo) { /* If controller doesn't recover ... */
2021 /* Ackk! On FIFO errors the Tx unit is turned off! */
2022 /* Remove this verbosity later! */
2023 if (netif_msg_tx_err(lp))
2024 printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
2031 if (status & 0x1800)
2032 lp->stats.collisions++;
2033 lp->stats.tx_packets++;
2036 /* We must free the original skb */
2037 if (lp->tx_skbuff[entry]) {
2038 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[entry],
2039 lp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);
2040 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
2041 lp->tx_skbuff[entry] = NULL;
2042 lp->tx_dma_addr[entry] = 0;
2047 delta = (lp->cur_tx - dirty_tx) & (lp->tx_mod_mask + lp->tx_ring_size);
2048 if (delta > lp->tx_ring_size) {
2049 if (netif_msg_drv(lp))
2050 printk(KERN_ERR "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
2051 dev->name, dirty_tx, lp->cur_tx, lp->tx_full);
2052 dirty_tx += lp->tx_ring_size;
2053 delta -= lp->tx_ring_size;
2057 netif_queue_stopped(dev) &&
2058 delta < lp->tx_ring_size - 2) {
2059 /* The ring is no longer full, clear tbusy. */
2061 netif_wake_queue (dev);
2063 lp->dirty_tx = dirty_tx;
2066 /* Log misc errors. */
2067 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
2068 if (csr0 & 0x1000) {
2070 * this happens when our receive ring is full. This shouldn't
2071 * be a problem as we will see normal rx interrupts for the frames
2072 * in the receive ring. But there are some PCI chipsets (I can
2073 * reproduce this on SP3G with Intel saturn chipset) which have
2074 * sometimes problems and will fill up the receive ring with
2075 * error descriptors. In this situation we don't get a rx
2076 * interrupt, but a missed frame interrupt sooner or later.
2077 * So we try to clean up our receive ring here.
2080 lp->stats.rx_errors++; /* Missed a Rx frame. */
2082 if (csr0 & 0x0800) {
2083 if (netif_msg_drv(lp))
2084 printk(KERN_ERR "%s: Bus master arbitration failure, status %4.4x.\n",
2086 /* unlike for the lance, there is no restart needed */
2090 /* reset the chip to clear the error condition, then restart */
2091 lp->a.reset(ioaddr);
2092 lp->a.write_csr(ioaddr, 4, 0x0915);
2093 pcnet32_restart(dev, 0x0002);
2094 netif_wake_queue(dev);
2098 /* Set interrupt enable. */
2099 lp->a.write_csr (ioaddr, 0, 0x0040);
2100 lp->a.write_rap (ioaddr,rap);
2102 if (netif_msg_intr(lp))
2103 printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
2104 dev->name, lp->a.read_csr (ioaddr, 0));
2106 spin_unlock(&lp->lock);
2112 pcnet32_rx(struct net_device *dev)
2114 struct pcnet32_private *lp = dev->priv;
2115 int entry = lp->cur_rx & lp->rx_mod_mask;
2116 int boguscnt = lp->rx_ring_size / 2;
2118 /* If we own the next entry, it's a new packet. Send it up. */
2119 while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
2120 int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
2122 if (status != 0x03) { /* There was an error. */
2124 * There is a tricky error noted by John Murphy,
2125 * <murf@perftech.com> to Russ Nelson: Even with full-sized
2126 * buffers it's possible for a jabber packet to use two
2127 * buffers, with only the last correctly noting the error.
2129 if (status & 0x01) /* Only count a general error at the */
2130 lp->stats.rx_errors++; /* end of a packet.*/
2131 if (status & 0x20) lp->stats.rx_frame_errors++;
2132 if (status & 0x10) lp->stats.rx_over_errors++;
2133 if (status & 0x08) lp->stats.rx_crc_errors++;
2134 if (status & 0x04) lp->stats.rx_fifo_errors++;
2135 lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
2137 /* Malloc up new buffer, compatible with net-2e. */
2138 short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4;
2139 struct sk_buff *skb;
2141 /* Discard oversize frames. */
2142 if (unlikely(pkt_len > PKT_BUF_SZ - 2)) {
2143 if (netif_msg_drv(lp))
2144 printk(KERN_ERR "%s: Impossible packet size %d!\n",
2145 dev->name, pkt_len);
2146 lp->stats.rx_errors++;
2147 } else if (pkt_len < 60) {
2148 if (netif_msg_rx_err(lp))
2149 printk(KERN_ERR "%s: Runt packet!\n", dev->name);
2150 lp->stats.rx_errors++;
2152 int rx_in_place = 0;
2154 if (pkt_len > rx_copybreak) {
2155 struct sk_buff *newskb;
2157 if ((newskb = dev_alloc_skb(PKT_BUF_SZ))) {
2158 skb_reserve (newskb, 2);
2159 skb = lp->rx_skbuff[entry];
2160 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[entry],
2161 PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
2162 skb_put (skb, pkt_len);
2163 lp->rx_skbuff[entry] = newskb;
2165 lp->rx_dma_addr[entry] =
2166 pci_map_single(lp->pci_dev, newskb->data,
2167 PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
2168 lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]);
2173 skb = dev_alloc_skb(pkt_len+2);
2178 if (netif_msg_drv(lp))
2179 printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n",
2181 for (i = 0; i < lp->rx_ring_size; i++)
2182 if ((short)le16_to_cpu(lp->rx_ring[(entry+i)
2183 & lp->rx_mod_mask].status) < 0)
2186 if (i > lp->rx_ring_size -2) {
2187 lp->stats.rx_dropped++;
2188 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
2189 wmb(); /* Make sure adapter sees owner change */
2196 skb_reserve(skb,2); /* 16 byte align */
2197 skb_put(skb,pkt_len); /* Make room */
2198 pci_dma_sync_single_for_cpu(lp->pci_dev,
2199 lp->rx_dma_addr[entry],
2201 PCI_DMA_FROMDEVICE);
2202 eth_copy_and_sum(skb,
2203 (unsigned char *)(lp->rx_skbuff[entry]->data),
2205 pci_dma_sync_single_for_device(lp->pci_dev,
2206 lp->rx_dma_addr[entry],
2208 PCI_DMA_FROMDEVICE);
2210 lp->stats.rx_bytes += skb->len;
2211 skb->protocol=eth_type_trans(skb,dev);
2213 dev->last_rx = jiffies;
2214 lp->stats.rx_packets++;
2218 * The docs say that the buffer length isn't touched, but Andrew Boyd
2219 * of QNX reports that some revs of the 79C965 clear it.
2221 lp->rx_ring[entry].buf_length = le16_to_cpu(2-PKT_BUF_SZ);
2222 wmb(); /* Make sure owner changes after all others are visible */
2223 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
2224 entry = (++lp->cur_rx) & lp->rx_mod_mask;
2225 if (--boguscnt <= 0) break; /* don't stay in loop forever */
2232 pcnet32_close(struct net_device *dev)
2234 unsigned long ioaddr = dev->base_addr;
2235 struct pcnet32_private *lp = dev->priv;
2237 unsigned long flags;
2239 del_timer_sync(&lp->watchdog_timer);
2241 netif_stop_queue(dev);
2243 spin_lock_irqsave(&lp->lock, flags);
2245 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
2247 if (netif_msg_ifdown(lp))
2248 printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
2249 dev->name, lp->a.read_csr (ioaddr, 0));
2251 /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
2252 lp->a.write_csr (ioaddr, 0, 0x0004);
2255 * Switch back to 16bit mode to avoid problems with dumb
2256 * DOS packet driver after a warm reboot
2258 lp->a.write_bcr (ioaddr, 20, 4);
2260 spin_unlock_irqrestore(&lp->lock, flags);
2262 free_irq(dev->irq, dev);
2264 spin_lock_irqsave(&lp->lock, flags);
2266 /* free all allocated skbuffs */
2267 for (i = 0; i < lp->rx_ring_size; i++) {
2268 lp->rx_ring[i].status = 0;
2269 wmb(); /* Make sure adapter sees owner change */
2270 if (lp->rx_skbuff[i]) {
2271 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
2272 PCI_DMA_FROMDEVICE);
2273 dev_kfree_skb(lp->rx_skbuff[i]);
2275 lp->rx_skbuff[i] = NULL;
2276 lp->rx_dma_addr[i] = 0;
2279 for (i = 0; i < lp->tx_ring_size; i++) {
2280 lp->tx_ring[i].status = 0; /* CPU owns buffer */
2281 wmb(); /* Make sure adapter sees owner change */
2282 if (lp->tx_skbuff[i]) {
2283 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
2284 lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
2285 dev_kfree_skb(lp->tx_skbuff[i]);
2287 lp->tx_skbuff[i] = NULL;
2288 lp->tx_dma_addr[i] = 0;
2291 spin_unlock_irqrestore(&lp->lock, flags);
2296 static struct net_device_stats *
2297 pcnet32_get_stats(struct net_device *dev)
2299 struct pcnet32_private *lp = dev->priv;
2300 unsigned long ioaddr = dev->base_addr;
2302 unsigned long flags;
2304 spin_lock_irqsave(&lp->lock, flags);
2305 saved_addr = lp->a.read_rap(ioaddr);
2306 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
2307 lp->a.write_rap(ioaddr, saved_addr);
2308 spin_unlock_irqrestore(&lp->lock, flags);
2313 /* taken from the sunlance driver, which it took from the depca driver */
2314 static void pcnet32_load_multicast (struct net_device *dev)
2316 struct pcnet32_private *lp = dev->priv;
2317 volatile struct pcnet32_init_block *ib = &lp->init_block;
2318 volatile u16 *mcast_table = (u16 *)&ib->filter;
2319 struct dev_mc_list *dmi=dev->mc_list;
2324 /* set all multicast bits */
2325 if (dev->flags & IFF_ALLMULTI) {
2326 ib->filter[0] = 0xffffffff;
2327 ib->filter[1] = 0xffffffff;
2330 /* clear the multicast filter */
2335 for (i = 0; i < dev->mc_count; i++) {
2336 addrs = dmi->dmi_addr;
2339 /* multicast address? */
2343 crc = ether_crc_le(6, addrs);
2345 mcast_table [crc >> 4] = le16_to_cpu(
2346 le16_to_cpu(mcast_table [crc >> 4]) | (1 << (crc & 0xf)));
2353 * Set or clear the multicast filter for this adaptor.
2355 static void pcnet32_set_multicast_list(struct net_device *dev)
2357 unsigned long ioaddr = dev->base_addr, flags;
2358 struct pcnet32_private *lp = dev->priv;
2360 spin_lock_irqsave(&lp->lock, flags);
2361 if (dev->flags&IFF_PROMISC) {
2362 /* Log any net taps. */
2363 if (netif_msg_hw(lp))
2364 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
2365 lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PCNET32_PORT_PORTSEL) << 7);
2367 lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
2368 pcnet32_load_multicast (dev);
2371 lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
2372 pcnet32_restart(dev, 0x0042); /* Resume normal operation */
2373 netif_wake_queue(dev);
2375 spin_unlock_irqrestore(&lp->lock, flags);
2378 /* This routine assumes that the lp->lock is held */
2379 static int mdio_read(struct net_device *dev, int phy_id, int reg_num)
2381 struct pcnet32_private *lp = dev->priv;
2382 unsigned long ioaddr = dev->base_addr;
2388 lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2389 val_out = lp->a.read_bcr(ioaddr, 34);
2394 /* This routine assumes that the lp->lock is held */
2395 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val)
2397 struct pcnet32_private *lp = dev->priv;
2398 unsigned long ioaddr = dev->base_addr;
2403 lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2404 lp->a.write_bcr(ioaddr, 34, val);
2407 static int pcnet32_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2409 struct pcnet32_private *lp = dev->priv;
2411 unsigned long flags;
2413 /* SIOC[GS]MIIxxx ioctls */
2415 spin_lock_irqsave(&lp->lock, flags);
2416 rc = generic_mii_ioctl(&lp->mii_if, if_mii(rq), cmd, NULL);
2417 spin_unlock_irqrestore(&lp->lock, flags);
2425 static void pcnet32_watchdog(struct net_device *dev)
2427 struct pcnet32_private *lp = dev->priv;
2428 unsigned long flags;
2430 /* Print the link status if it has changed */
2432 spin_lock_irqsave(&lp->lock, flags);
2433 mii_check_media (&lp->mii_if, netif_msg_link(lp), 0);
2434 spin_unlock_irqrestore(&lp->lock, flags);
2437 mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
2440 static void __devexit pcnet32_remove_one(struct pci_dev *pdev)
2442 struct net_device *dev = pci_get_drvdata(pdev);
2445 struct pcnet32_private *lp = dev->priv;
2447 unregister_netdev(dev);
2448 pcnet32_free_ring(dev);
2449 release_region(dev->base_addr, PCNET32_TOTAL_SIZE);
2450 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2452 pci_disable_device(pdev);
2453 pci_set_drvdata(pdev, NULL);
2457 static struct pci_driver pcnet32_driver = {
2459 .probe = pcnet32_probe_pci,
2460 .remove = __devexit_p(pcnet32_remove_one),
2461 .id_table = pcnet32_pci_tbl,
2464 /* An additional parameter that may be passed in... */
2465 static int debug = -1;
2466 static int tx_start_pt = -1;
2467 static int pcnet32_have_pci;
2469 module_param(debug, int, 0);
2470 MODULE_PARM_DESC(debug, DRV_NAME " debug level");
2471 module_param(max_interrupt_work, int, 0);
2472 MODULE_PARM_DESC(max_interrupt_work, DRV_NAME " maximum events handled per interrupt");
2473 module_param(rx_copybreak, int, 0);
2474 MODULE_PARM_DESC(rx_copybreak, DRV_NAME " copy breakpoint for copy-only-tiny-frames");
2475 module_param(tx_start_pt, int, 0);
2476 MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)");
2477 module_param(pcnet32vlb, int, 0);
2478 MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)");
2479 module_param_array(options, int, NULL, 0);
2480 MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)");
2481 module_param_array(full_duplex, int, NULL, 0);
2482 MODULE_PARM_DESC(full_duplex, DRV_NAME " full duplex setting(s) (1)");
2483 /* Module Parameter for HomePNA cards added by Patrick Simmons, 2004 */
2484 module_param_array(homepna, int, NULL, 0);
2485 MODULE_PARM_DESC(homepna, DRV_NAME " mode for 79C978 cards (1 for HomePNA, 0 for Ethernet, default Ethernet");
2487 MODULE_AUTHOR("Thomas Bogendoerfer");
2488 MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
2489 MODULE_LICENSE("GPL");
2491 #define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
2493 static int __init pcnet32_init_module(void)
2495 printk(KERN_INFO "%s", version);
2497 pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT);
2499 if ((tx_start_pt >= 0) && (tx_start_pt <= 3))
2500 tx_start = tx_start_pt;
2502 /* find the PCI devices */
2503 if (!pci_module_init(&pcnet32_driver))
2504 pcnet32_have_pci = 1;
2506 /* should we find any remaining VLbus devices ? */
2508 pcnet32_probe_vlbus();
2510 if (cards_found && (pcnet32_debug & NETIF_MSG_PROBE))
2511 printk(KERN_INFO PFX "%d cards_found.\n", cards_found);
2513 return (pcnet32_have_pci + cards_found) ? 0 : -ENODEV;
2516 static void __exit pcnet32_cleanup_module(void)
2518 struct net_device *next_dev;
2520 while (pcnet32_dev) {
2521 struct pcnet32_private *lp = pcnet32_dev->priv;
2522 next_dev = lp->next;
2523 unregister_netdev(pcnet32_dev);
2524 pcnet32_free_ring(pcnet32_dev);
2525 release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
2526 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2527 free_netdev(pcnet32_dev);
2528 pcnet32_dev = next_dev;
2531 if (pcnet32_have_pci)
2532 pci_unregister_driver(&pcnet32_driver);
2535 module_init(pcnet32_init_module);
2536 module_exit(pcnet32_cleanup_module);