1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
159 /* ----------------------------------------------------------------------------
161 ---------------------------------------------------------------------------- */
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
172 TBD: Dean brought this up, and I assumed the hardware would
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
206 #define MACE_FIFOFC 7
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
219 #define MACE_LADRF 20
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
299 #define MACE_IMR_DEFAULT \
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
313 #define TX_TIMEOUT ((400*HZ)/1000)
315 /* ----------------------------------------------------------------------------
317 ---------------------------------------------------------------------------- */
319 typedef struct _mace_statistics {
334 /* RFS1--Receive Status (RCVSTS) */
340 /* RFS2--Runt Packet Count (RNTPC) */
343 /* RFS3--Receive Collision Count (RCVCC) */
364 typedef struct _mace_private {
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
385 static char rcsid[] =
386 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387 static char *version =
388 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
391 static const char *if_names[]={
392 "Auto", "10baseT", "BNC",
395 /* ----------------------------------------------------------------------------
397 These are the parameters that can be set during loading with
399 ---------------------------------------------------------------------------- */
401 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402 MODULE_LICENSE("GPL");
404 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
406 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407 INT_MODULE_PARM(if_port, 0);
410 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
413 #define DEBUG(n, args...)
416 /* ----------------------------------------------------------------------------
418 ---------------------------------------------------------------------------- */
420 static void nmclan_config(dev_link_t *link);
421 static void nmclan_release(dev_link_t *link);
423 static void nmclan_reset(struct net_device *dev);
424 static int mace_config(struct net_device *dev, struct ifmap *map);
425 static int mace_open(struct net_device *dev);
426 static int mace_close(struct net_device *dev);
427 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428 static void mace_tx_timeout(struct net_device *dev);
429 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
430 static struct net_device_stats *mace_get_stats(struct net_device *dev);
431 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432 static void restore_multicast_list(struct net_device *dev);
433 static void set_multicast_list(struct net_device *dev);
434 static struct ethtool_ops netdev_ethtool_ops;
437 static void nmclan_detach(struct pcmcia_device *p_dev);
439 /* ----------------------------------------------------------------------------
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
444 ---------------------------------------------------------------------------- */
446 static int nmclan_attach(struct pcmcia_device *p_dev)
450 struct net_device *dev;
452 DEBUG(0, "nmclan_attach()\n");
453 DEBUG(1, "%s\n", rcsid);
455 /* Create new ethernet device */
456 dev = alloc_etherdev(sizeof(mace_private));
459 lp = netdev_priv(dev);
463 spin_lock_init(&lp->bank_lock);
464 link->io.NumPorts1 = 32;
465 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
466 link->io.IOAddrLines = 5;
467 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
468 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
469 link->irq.Handler = &mace_interrupt;
470 link->irq.Instance = dev;
471 link->conf.Attributes = CONF_ENABLE_IRQ;
473 link->conf.IntType = INT_MEMORY_AND_IO;
474 link->conf.ConfigIndex = 1;
475 link->conf.Present = PRESENT_OPTION;
477 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
479 SET_MODULE_OWNER(dev);
480 dev->hard_start_xmit = &mace_start_xmit;
481 dev->set_config = &mace_config;
482 dev->get_stats = &mace_get_stats;
483 dev->set_multicast_list = &set_multicast_list;
484 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
485 dev->open = &mace_open;
486 dev->stop = &mace_close;
487 #ifdef HAVE_TX_TIMEOUT
488 dev->tx_timeout = mace_tx_timeout;
489 dev->watchdog_timeo = TX_TIMEOUT;
492 link->handle = p_dev;
493 p_dev->instance = link;
495 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
499 } /* nmclan_attach */
501 /* ----------------------------------------------------------------------------
503 This deletes a driver "instance". The device is de-registered
504 with Card Services. If it has been released, all local data
505 structures are freed. Otherwise, the structures will be freed
506 when the device is released.
507 ---------------------------------------------------------------------------- */
509 static void nmclan_detach(struct pcmcia_device *p_dev)
511 dev_link_t *link = dev_to_instance(p_dev);
512 struct net_device *dev = link->priv;
514 DEBUG(0, "nmclan_detach(0x%p)\n", link);
517 unregister_netdev(dev);
519 if (link->state & DEV_CONFIG)
520 nmclan_release(link);
523 } /* nmclan_detach */
525 /* ----------------------------------------------------------------------------
527 Reads a MACE register. This is bank independent; however, the
528 caller must ensure that this call is not interruptable. We are
529 assuming that during normal operation, the MACE is always in
531 ---------------------------------------------------------------------------- */
532 static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
538 case 0: /* register 0-15 */
539 data = inb(ioaddr + AM2150_MACE_BASE + reg);
541 case 1: /* register 16-31 */
542 spin_lock_irqsave(&lp->bank_lock, flags);
544 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
546 spin_unlock_irqrestore(&lp->bank_lock, flags);
549 return (data & 0xFF);
552 /* ----------------------------------------------------------------------------
554 Writes to a MACE register. This is bank independent; however,
555 the caller must ensure that this call is not interruptable. We
556 are assuming that during normal operation, the MACE is always in
558 ---------------------------------------------------------------------------- */
559 static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
564 case 0: /* register 0-15 */
565 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
567 case 1: /* register 16-31 */
568 spin_lock_irqsave(&lp->bank_lock, flags);
570 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
572 spin_unlock_irqrestore(&lp->bank_lock, flags);
577 /* ----------------------------------------------------------------------------
579 Resets the MACE chip.
580 ---------------------------------------------------------------------------- */
581 static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
586 /* MACE Software reset */
587 mace_write(lp, ioaddr, MACE_BIUCC, 1);
588 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
589 /* Wait for reset bit to be cleared automatically after <= 200ns */;
592 printk(KERN_ERR "mace: reset failed, card removed ?\n");
597 mace_write(lp, ioaddr, MACE_BIUCC, 0);
599 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
600 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
602 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
603 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
606 * Bit 2-1 PORTSEL[1-0] Port Select.
609 * 10 DAI Port (reserved in Am2150)
611 * For this card, only the first two are valid.
612 * So, PLSCC should be set to
615 * Or just set ASEL in PHYCC below!
619 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
622 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
625 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
626 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
627 and the MACE device will automatically select the operating media
632 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
633 /* Poll ADDRCHG bit */
635 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
639 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
643 /* Set PADR register */
644 for (i = 0; i < ETHER_ADDR_LEN; i++)
645 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
647 /* MAC Configuration Control Register should be written last */
648 /* Let set_multicast_list set this. */
649 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
650 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
654 /* ----------------------------------------------------------------------------
656 This routine is scheduled to run after a CARD_INSERTION event
657 is received, to configure the PCMCIA socket, and to make the
658 ethernet device available to the system.
659 ---------------------------------------------------------------------------- */
661 #define CS_CHECK(fn, ret) \
662 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
664 static void nmclan_config(dev_link_t *link)
666 client_handle_t handle = link->handle;
667 struct net_device *dev = link->priv;
668 mace_private *lp = netdev_priv(dev);
672 int i, last_ret, last_fn;
675 DEBUG(0, "nmclan_config(0x%p)\n", link);
677 tuple.Attributes = 0;
678 tuple.TupleData = buf;
679 tuple.TupleDataMax = 64;
680 tuple.TupleOffset = 0;
681 tuple.DesiredTuple = CISTPL_CONFIG;
682 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
683 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
684 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
685 link->conf.ConfigBase = parse.config.base;
688 link->state |= DEV_CONFIG;
690 CS_CHECK(RequestIO, pcmcia_request_io(handle, &link->io));
691 CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq));
692 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf));
693 dev->irq = link->irq.AssignedIRQ;
694 dev->base_addr = link->io.BasePort1;
696 ioaddr = dev->base_addr;
698 /* Read the ethernet address from the CIS. */
699 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
700 tuple.TupleData = buf;
701 tuple.TupleDataMax = 64;
702 tuple.TupleOffset = 0;
703 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
704 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
705 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
707 /* Verify configuration by reading the MACE ID. */
711 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
712 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
713 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
714 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
717 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
718 " be 0x40 0x?9\n", sig[0], sig[1]);
719 link->state &= ~DEV_CONFIG_PENDING;
724 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
727 /* The if_port symbol can be set when the module is loaded */
729 dev->if_port = if_port;
731 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
733 link->dev = &lp->node;
734 link->state &= ~DEV_CONFIG_PENDING;
735 SET_NETDEV_DEV(dev, &handle_to_dev(handle));
737 i = register_netdev(dev);
739 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
744 strcpy(lp->node.dev_name, dev->name);
746 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
747 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
748 for (i = 0; i < 6; i++)
749 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
753 cs_error(link->handle, last_fn, last_ret);
755 nmclan_release(link);
758 } /* nmclan_config */
760 /* ----------------------------------------------------------------------------
762 After a card is removed, nmclan_release() will unregister the
763 net device, and release the PCMCIA configuration. If the device
764 is still open, this will be postponed until it is closed.
765 ---------------------------------------------------------------------------- */
766 static void nmclan_release(dev_link_t *link)
768 DEBUG(0, "nmclan_release(0x%p)\n", link);
769 pcmcia_disable_device(link->handle);
772 static int nmclan_suspend(struct pcmcia_device *p_dev)
774 dev_link_t *link = dev_to_instance(p_dev);
775 struct net_device *dev = link->priv;
777 if ((link->state & DEV_CONFIG) && (link->open))
778 netif_device_detach(dev);
783 static int nmclan_resume(struct pcmcia_device *p_dev)
785 dev_link_t *link = dev_to_instance(p_dev);
786 struct net_device *dev = link->priv;
788 if ((link->state & DEV_CONFIG) && (link->open)) {
790 netif_device_attach(dev);
797 /* ----------------------------------------------------------------------------
799 Reset and restore all of the Xilinx and MACE registers.
800 ---------------------------------------------------------------------------- */
801 static void nmclan_reset(struct net_device *dev)
803 mace_private *lp = netdev_priv(dev);
806 dev_link_t *link = &lp->link;
810 /* Save original COR value */
812 reg.Action = CS_READ;
813 reg.Offset = CISREG_COR;
815 pcmcia_access_configuration_register(link->handle, ®);
816 OrigCorValue = reg.Value;
819 reg.Action = CS_WRITE;
820 reg.Offset = CISREG_COR;
821 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
823 reg.Value = COR_SOFT_RESET;
824 pcmcia_access_configuration_register(link->handle, ®);
825 /* Need to wait for 20 ms for PCMCIA to finish reset. */
827 /* Restore original COR configuration index */
828 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
829 pcmcia_access_configuration_register(link->handle, ®);
830 /* Xilinx is now completely reset along with the MACE chip. */
831 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
833 #endif /* #if RESET_XILINX */
835 /* Xilinx is now completely reset along with the MACE chip. */
836 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
838 /* Reinitialize the MACE chip for operation. */
839 mace_init(lp, dev->base_addr, dev->dev_addr);
840 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
842 /* Restore the multicast list and enable TX and RX. */
843 restore_multicast_list(dev);
846 /* ----------------------------------------------------------------------------
848 [Someone tell me what this is supposed to do? Is if_port a defined
849 standard? If so, there should be defines to indicate 1=10Base-T,
850 2=10Base-2, etc. including limited automatic detection.]
851 ---------------------------------------------------------------------------- */
852 static int mace_config(struct net_device *dev, struct ifmap *map)
854 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
855 if (map->port <= 2) {
856 dev->if_port = map->port;
857 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
858 if_names[dev->if_port]);
865 /* ----------------------------------------------------------------------------
868 ---------------------------------------------------------------------------- */
869 static int mace_open(struct net_device *dev)
871 kio_addr_t ioaddr = dev->base_addr;
872 mace_private *lp = netdev_priv(dev);
873 dev_link_t *link = &lp->link;
882 netif_start_queue(dev);
885 return 0; /* Always succeed */
888 /* ----------------------------------------------------------------------------
890 Closes device driver.
891 ---------------------------------------------------------------------------- */
892 static int mace_close(struct net_device *dev)
894 kio_addr_t ioaddr = dev->base_addr;
895 mace_private *lp = netdev_priv(dev);
896 dev_link_t *link = &lp->link;
898 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
900 /* Mask off all interrupts from the MACE chip. */
901 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
904 netif_stop_queue(dev);
909 static void netdev_get_drvinfo(struct net_device *dev,
910 struct ethtool_drvinfo *info)
912 strcpy(info->driver, DRV_NAME);
913 strcpy(info->version, DRV_VERSION);
914 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
918 static u32 netdev_get_msglevel(struct net_device *dev)
923 static void netdev_set_msglevel(struct net_device *dev, u32 level)
927 #endif /* PCMCIA_DEBUG */
929 static struct ethtool_ops netdev_ethtool_ops = {
930 .get_drvinfo = netdev_get_drvinfo,
932 .get_msglevel = netdev_get_msglevel,
933 .set_msglevel = netdev_set_msglevel,
934 #endif /* PCMCIA_DEBUG */
937 /* ----------------------------------------------------------------------------
939 This routine begins the packet transmit function. When completed,
940 it will generate a transmit interrupt.
942 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
943 returns 0, the "packet is now solely the responsibility of the
944 driver." If _start_xmit returns non-zero, the "transmission
945 failed, put skb back into a list."
946 ---------------------------------------------------------------------------- */
948 static void mace_tx_timeout(struct net_device *dev)
950 mace_private *lp = netdev_priv(dev);
951 dev_link_t *link = &lp->link;
953 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
955 printk("resetting card\n");
956 pcmcia_reset_card(link->handle, NULL);
957 #else /* #if RESET_ON_TIMEOUT */
958 printk("NOT resetting card\n");
959 #endif /* #if RESET_ON_TIMEOUT */
960 dev->trans_start = jiffies;
961 netif_wake_queue(dev);
964 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
966 mace_private *lp = netdev_priv(dev);
967 kio_addr_t ioaddr = dev->base_addr;
969 netif_stop_queue(dev);
971 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
972 dev->name, (long)skb->len);
974 #if (!TX_INTERRUPTABLE)
975 /* Disable MACE TX interrupts. */
976 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
977 ioaddr + AM2150_MACE_BASE + MACE_IMR);
978 lp->tx_irq_disabled=1;
979 #endif /* #if (!TX_INTERRUPTABLE) */
982 /* This block must not be interrupted by another transmit request!
983 mace_tx_timeout will take care of timer-based retransmissions from
984 the upper layers. The interrupt handler is guaranteed never to
985 service a transmit interrupt while we are in here.
988 lp->linux_stats.tx_bytes += skb->len;
989 lp->tx_free_frames--;
991 /* WARNING: Write the _exact_ number of bytes written in the header! */
992 /* Put out the word header [must be an outw()] . . . */
993 outw(skb->len, ioaddr + AM2150_XMT);
994 /* . . . and the packet [may be any combination of outw() and outb()] */
995 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
997 /* Odd byte transfer */
998 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
1001 dev->trans_start = jiffies;
1004 if (lp->tx_free_frames > 0)
1005 netif_start_queue(dev);
1006 #endif /* #if MULTI_TX */
1009 #if (!TX_INTERRUPTABLE)
1010 /* Re-enable MACE TX interrupts. */
1011 lp->tx_irq_disabled=0;
1012 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1013 #endif /* #if (!TX_INTERRUPTABLE) */
1018 } /* mace_start_xmit */
1020 /* ----------------------------------------------------------------------------
1022 The interrupt handler.
1023 ---------------------------------------------------------------------------- */
1024 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1026 struct net_device *dev = (struct net_device *) dev_id;
1027 mace_private *lp = netdev_priv(dev);
1028 kio_addr_t ioaddr = dev->base_addr;
1030 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1033 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1038 if (lp->tx_irq_disabled) {
1040 (lp->tx_irq_disabled?
1041 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1042 "[isr=%02X, imr=%02X]\n":
1043 KERN_NOTICE "%s: Re-entering the interrupt handler "
1044 "[isr=%02X, imr=%02X]\n"),
1046 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1047 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1049 /* WARNING: MACE_IR has been read! */
1053 if (!netif_device_present(dev)) {
1054 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1059 /* WARNING: MACE_IR is a READ/CLEAR port! */
1060 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1062 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1064 if (status & MACE_IR_RCVINT) {
1065 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1068 if (status & MACE_IR_XMTINT) {
1069 unsigned char fifofc;
1070 unsigned char xmtrc;
1071 unsigned char xmtfs;
1073 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1074 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1075 lp->linux_stats.tx_errors++;
1076 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1079 /* Transmit Retry Count (XMTRC, reg 4) */
1080 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1081 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1082 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1085 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1086 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1088 lp->mace_stats.xmtsv++;
1090 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1091 if (xmtfs & MACE_XMTFS_UFLO) {
1092 /* Underflow. Indicates that the Transmit FIFO emptied before
1093 the end of frame was reached. */
1094 lp->mace_stats.uflo++;
1096 if (xmtfs & MACE_XMTFS_LCOL) {
1097 /* Late Collision */
1098 lp->mace_stats.lcol++;
1100 if (xmtfs & MACE_XMTFS_MORE) {
1101 /* MORE than one retry was needed */
1102 lp->mace_stats.more++;
1104 if (xmtfs & MACE_XMTFS_ONE) {
1105 /* Exactly ONE retry occurred */
1106 lp->mace_stats.one++;
1108 if (xmtfs & MACE_XMTFS_DEFER) {
1109 /* Transmission was defered */
1110 lp->mace_stats.defer++;
1112 if (xmtfs & MACE_XMTFS_LCAR) {
1113 /* Loss of carrier */
1114 lp->mace_stats.lcar++;
1116 if (xmtfs & MACE_XMTFS_RTRY) {
1117 /* Retry error: transmit aborted after 16 attempts */
1118 lp->mace_stats.rtry++;
1120 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1122 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1124 lp->linux_stats.tx_packets++;
1125 lp->tx_free_frames++;
1126 netif_wake_queue(dev);
1127 } /* if (status & MACE_IR_XMTINT) */
1129 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1130 if (status & MACE_IR_JAB) {
1131 /* Jabber Error. Excessive transmit duration (20-150ms). */
1132 lp->mace_stats.jab++;
1134 if (status & MACE_IR_BABL) {
1135 /* Babble Error. >1518 bytes transmitted. */
1136 lp->mace_stats.babl++;
1138 if (status & MACE_IR_CERR) {
1139 /* Collision Error. CERR indicates the absence of the
1140 Signal Quality Error Test message after a packet
1142 lp->mace_stats.cerr++;
1144 if (status & MACE_IR_RCVCCO) {
1145 /* Receive Collision Count Overflow; */
1146 lp->mace_stats.rcvcco++;
1148 if (status & MACE_IR_RNTPCO) {
1149 /* Runt Packet Count Overflow */
1150 lp->mace_stats.rntpco++;
1152 if (status & MACE_IR_MPCO) {
1153 /* Missed Packet Count Overflow */
1154 lp->mace_stats.mpco++;
1156 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1158 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1161 } /* mace_interrupt */
1163 /* ----------------------------------------------------------------------------
1166 ---------------------------------------------------------------------------- */
1167 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1169 mace_private *lp = netdev_priv(dev);
1170 kio_addr_t ioaddr = dev->base_addr;
1171 unsigned char rx_framecnt;
1172 unsigned short rx_status;
1175 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1176 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1179 rx_status = inw(ioaddr + AM2150_RCV);
1181 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1182 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1184 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1185 lp->linux_stats.rx_errors++;
1186 if (rx_status & MACE_RCVFS_OFLO) {
1187 lp->mace_stats.oflo++;
1189 if (rx_status & MACE_RCVFS_CLSN) {
1190 lp->mace_stats.clsn++;
1192 if (rx_status & MACE_RCVFS_FRAM) {
1193 lp->mace_stats.fram++;
1195 if (rx_status & MACE_RCVFS_FCS) {
1196 lp->mace_stats.fcs++;
1199 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1200 /* Auto Strip is off, always subtract 4 */
1201 struct sk_buff *skb;
1203 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1204 /* runt packet count */
1205 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1206 /* rcv collision count */
1208 DEBUG(3, " receiving packet size 0x%X rx_status"
1209 " 0x%X.\n", pkt_len, rx_status);
1211 skb = dev_alloc_skb(pkt_len+2);
1216 skb_reserve(skb, 2);
1217 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1219 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1220 skb->protocol = eth_type_trans(skb, dev);
1222 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1224 dev->last_rx = jiffies;
1225 lp->linux_stats.rx_packets++;
1226 lp->linux_stats.rx_bytes += skb->len;
1227 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1230 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1231 " %d.\n", dev->name, pkt_len);
1232 lp->linux_stats.rx_dropped++;
1235 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1241 /* ----------------------------------------------------------------------------
1243 ---------------------------------------------------------------------------- */
1244 static void pr_linux_stats(struct net_device_stats *pstats)
1246 DEBUG(2, "pr_linux_stats\n");
1247 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1248 (long)pstats->rx_packets, (long)pstats->tx_packets);
1249 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1250 (long)pstats->rx_errors, (long)pstats->tx_errors);
1251 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1252 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1253 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1254 (long)pstats->multicast, (long)pstats->collisions);
1256 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1257 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1258 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1259 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1260 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1261 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1263 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1264 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1265 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1266 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1267 DEBUG(2, " tx_window_errors=%ld\n",
1268 (long)pstats->tx_window_errors);
1269 } /* pr_linux_stats */
1271 /* ----------------------------------------------------------------------------
1273 ---------------------------------------------------------------------------- */
1274 static void pr_mace_stats(mace_statistics *pstats)
1276 DEBUG(2, "pr_mace_stats\n");
1278 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1279 pstats->xmtsv, pstats->uflo);
1280 DEBUG(2, " lcol=%-7d more=%d\n",
1281 pstats->lcol, pstats->more);
1282 DEBUG(2, " one=%-7d defer=%d\n",
1283 pstats->one, pstats->defer);
1284 DEBUG(2, " lcar=%-7d rtry=%d\n",
1285 pstats->lcar, pstats->rtry);
1288 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1289 pstats->exdef, pstats->xmtrc);
1291 /* RFS1--Receive Status (RCVSTS) */
1292 DEBUG(2, " oflo=%-7d clsn=%d\n",
1293 pstats->oflo, pstats->clsn);
1294 DEBUG(2, " fram=%-7d fcs=%d\n",
1295 pstats->fram, pstats->fcs);
1297 /* RFS2--Runt Packet Count (RNTPC) */
1298 /* RFS3--Receive Collision Count (RCVCC) */
1299 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1300 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1303 DEBUG(2, " jab=%-7d babl=%d\n",
1304 pstats->jab, pstats->babl);
1305 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1306 pstats->cerr, pstats->rcvcco);
1307 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1308 pstats->rntpco, pstats->mpco);
1311 DEBUG(2, " mpc=%d\n", pstats->mpc);
1314 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1317 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1319 } /* pr_mace_stats */
1321 /* ----------------------------------------------------------------------------
1323 Update statistics. We change to register window 1, so this
1324 should be run single-threaded if the device is active. This is
1325 expected to be a rare operation, and it's simpler for the rest
1326 of the driver to assume that window 0 is always valid rather
1327 than use a special window-state variable.
1329 oflo & uflo should _never_ occur since it would mean the Xilinx
1330 was not able to transfer data between the MACE FIFO and the
1331 card's SRAM fast enough. If this happens, something is
1332 seriously wrong with the hardware.
1333 ---------------------------------------------------------------------------- */
1334 static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1336 mace_private *lp = netdev_priv(dev);
1338 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1339 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1340 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1341 /* At this point, mace_stats is fully updated for this call.
1342 We may now update the linux_stats. */
1344 /* The MACE has no equivalent for linux_stats field which are commented
1347 /* lp->linux_stats.multicast; */
1348 lp->linux_stats.collisions =
1349 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1350 /* Collision: The MACE may retry sending a packet 15 times
1351 before giving up. The retry count is in XMTRC.
1352 Does each retry constitute a collision?
1353 If so, why doesn't the RCVCC record these collisions? */
1355 /* detailed rx_errors: */
1356 lp->linux_stats.rx_length_errors =
1357 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1358 /* lp->linux_stats.rx_over_errors */
1359 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1360 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1361 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1362 lp->linux_stats.rx_missed_errors =
1363 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1365 /* detailed tx_errors */
1366 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1367 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1368 /* LCAR usually results from bad cabling. */
1369 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1370 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1371 /* lp->linux_stats.tx_window_errors; */
1374 } /* update_stats */
1376 /* ----------------------------------------------------------------------------
1378 Gathers ethernet statistics from the MACE chip.
1379 ---------------------------------------------------------------------------- */
1380 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1382 mace_private *lp = netdev_priv(dev);
1384 update_stats(dev->base_addr, dev);
1386 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1387 pr_linux_stats(&lp->linux_stats);
1388 pr_mace_stats(&lp->mace_stats);
1390 return &lp->linux_stats;
1391 } /* net_device_stats */
1393 /* ----------------------------------------------------------------------------
1395 Modified from Am79C90 data sheet.
1396 ---------------------------------------------------------------------------- */
1398 #ifdef BROKEN_MULTICAST
1400 static void updateCRC(int *CRC, int bit)
1407 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1408 CRC generator polynomial. */
1412 /* shift CRC and control bit (CRC[32]) */
1413 for (j = 32; j > 0; j--)
1417 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1419 for (j = 0; j < 32; j++)
1423 /* ----------------------------------------------------------------------------
1425 Build logical address filter.
1426 Modified from Am79C90 data sheet.
1429 ladrf: logical address filter (contents initialized to 0)
1430 adr: ethernet address
1431 ---------------------------------------------------------------------------- */
1432 static void BuildLAF(int *ladrf, int *adr)
1434 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1436 int i, byte; /* temporary array indices */
1437 int hashcode; /* the output object */
1441 for (byte = 0; byte < 6; byte++)
1442 for (i = 0; i < 8; i++)
1443 updateCRC(CRC, (adr[byte] >> i) & 1);
1446 for (i = 0; i < 6; i++)
1447 hashcode = (hashcode << 1) + CRC[i];
1449 byte = hashcode >> 3;
1450 ladrf[byte] |= (1 << (hashcode & 7));
1454 printk(KERN_DEBUG " adr =");
1455 for (i = 0; i < 6; i++)
1456 printk(" %02X", adr[i]);
1457 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1459 for (i = 0; i < 8; i++)
1460 printk(" %02X", ladrf[i]);
1466 /* ----------------------------------------------------------------------------
1467 restore_multicast_list
1468 Restores the multicast filter for MACE chip to the last
1469 set_multicast_list() call.
1474 ---------------------------------------------------------------------------- */
1475 static void restore_multicast_list(struct net_device *dev)
1477 mace_private *lp = netdev_priv(dev);
1478 int num_addrs = lp->multicast_num_addrs;
1479 int *ladrf = lp->multicast_ladrf;
1480 kio_addr_t ioaddr = dev->base_addr;
1483 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1484 dev->name, num_addrs);
1486 if (num_addrs > 0) {
1488 DEBUG(1, "Attempt to restore multicast list detected.\n");
1490 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1491 /* Poll ADDRCHG bit */
1492 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1494 /* Set LADRF register */
1495 for (i = 0; i < MACE_LADRF_LEN; i++)
1496 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1498 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1499 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1501 } else if (num_addrs < 0) {
1503 /* Promiscuous mode: receive all packets */
1504 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1505 mace_write(lp, ioaddr, MACE_MACCC,
1506 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1512 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1513 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1516 } /* restore_multicast_list */
1518 /* ----------------------------------------------------------------------------
1520 Set or clear the multicast filter for this adaptor.
1523 num_addrs == -1 Promiscuous mode, receive all packets
1524 num_addrs == 0 Normal mode, clear multicast list
1525 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1526 best-effort filtering.
1530 ---------------------------------------------------------------------------- */
1532 static void set_multicast_list(struct net_device *dev)
1534 mace_private *lp = netdev_priv(dev);
1535 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1537 struct dev_mc_list *dmi = dev->mc_list;
1542 if (dev->mc_count != old) {
1543 old = dev->mc_count;
1544 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1550 /* Set multicast_num_addrs. */
1551 lp->multicast_num_addrs = dev->mc_count;
1553 /* Set multicast_ladrf. */
1554 if (num_addrs > 0) {
1555 /* Calculate multicast logical address filter */
1556 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1557 for (i = 0; i < dev->mc_count; i++) {
1558 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1560 BuildLAF(lp->multicast_ladrf, adr);
1564 restore_multicast_list(dev);
1566 } /* set_multicast_list */
1568 #endif /* BROKEN_MULTICAST */
1570 static void restore_multicast_list(struct net_device *dev)
1572 kio_addr_t ioaddr = dev->base_addr;
1573 mace_private *lp = netdev_priv(dev);
1575 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1576 lp->multicast_num_addrs);
1578 if (dev->flags & IFF_PROMISC) {
1579 /* Promiscuous mode: receive all packets */
1580 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1581 mace_write(lp, ioaddr, MACE_MACCC,
1582 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1586 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1587 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1589 } /* restore_multicast_list */
1591 static void set_multicast_list(struct net_device *dev)
1593 mace_private *lp = netdev_priv(dev);
1598 if (dev->mc_count != old) {
1599 old = dev->mc_count;
1600 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1606 lp->multicast_num_addrs = dev->mc_count;
1607 restore_multicast_list(dev);
1609 } /* set_multicast_list */
1611 static struct pcmcia_device_id nmclan_ids[] = {
1612 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1613 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1616 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1618 static struct pcmcia_driver nmclan_cs_driver = {
1619 .owner = THIS_MODULE,
1621 .name = "nmclan_cs",
1623 .probe = nmclan_attach,
1624 .remove = nmclan_detach,
1625 .id_table = nmclan_ids,
1626 .suspend = nmclan_suspend,
1627 .resume = nmclan_resume,
1630 static int __init init_nmclan_cs(void)
1632 return pcmcia_register_driver(&nmclan_cs_driver);
1635 static void __exit exit_nmclan_cs(void)
1637 pcmcia_unregister_driver(&nmclan_cs_driver);
1640 module_init(init_nmclan_cs);
1641 module_exit(exit_nmclan_cs);