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   1 /*
   2  *  Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
   3  *
   4  *  Copyright 2004 IDT Inc. (rischelp@idt.com)
   5  *  Copyright 2006 Felix Fietkau <nbd@openwrt.org>
   6  *  Copyright 2008 Florian Fainelli <florian@openwrt.org>
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  *
  13  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  14  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  15  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  16  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  17  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  19  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  21  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23  *
  24  *  You should have received a copy of the  GNU General Public License along
  25  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  26  *  675 Mass Ave, Cambridge, MA 02139, USA.
  27  *
  28  *  Writing to a DMA status register:
  29  *
  30  *  When writing to the status register, you should mask the bit you have
  31  *  been testing the status register with. Both Tx and Rx DMA registers
  32  *  should stick to this procedure.
  33  */
  34
  35 #include <linux/module.h>
  36 #include <linux/kernel.h>
  37 #include <linux/moduleparam.h>
  38 #include <linux/sched.h>
  39 #include <linux/ctype.h>
  40 #include <linux/types.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/init.h>
  43 #include <linux/ioport.h>
  44 #include <linux/in.h>
  45 #include <linux/slab.h>
  46 #include <linux/string.h>
  47 #include <linux/delay.h>
  48 #include <linux/netdevice.h>
  49 #include <linux/etherdevice.h>
  50 #include <linux/skbuff.h>
  51 #include <linux/errno.h>
  52 #include <linux/platform_device.h>
  53 #include <linux/mii.h>
  54 #include <linux/ethtool.h>
  55 #include <linux/crc32.h>
  56
  57 #include <asm/bootinfo.h>
  58 #include <asm/system.h>
  59 #include <asm/bitops.h>
  60 #include <asm/pgtable.h>
  61 #include <asm/segment.h>
  62 #include <asm/io.h>
  63 #include <asm/dma.h>
  64
  65 #include <asm/mach-rc32434/rb.h>
  66 #include <asm/mach-rc32434/rc32434.h>
  67 #include <asm/mach-rc32434/eth.h>
  68 #include <asm/mach-rc32434/dma_v.h>
  69
  70 #define DRV_NAME        "korina"
  71 #define DRV_VERSION     "0.10"
  72 #define DRV_RELDATE     "04Mar2008"
  73
  74 #define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
  75                                    ((dev)->dev_addr[1]))
  76 #define STATION_ADDRESS_LOW(dev)  (((dev)->dev_addr[2] << 24) | \
  77                                    ((dev)->dev_addr[3] << 16) | \
  78                                    ((dev)->dev_addr[4] << 8)  | \
  79                                    ((dev)->dev_addr[5]))
  80
  81 #define MII_CLOCK 1250000       /* no more than 2.5MHz */
  82
  83 /* the following must be powers of two */
  84 #define KORINA_NUM_RDS  64  /* number of receive descriptors */
  85 #define KORINA_NUM_TDS  64  /* number of transmit descriptors */
  86
  87 /* KORINA_RBSIZE is the hardware's default maximum receive
  88  * frame size in bytes. Having this hardcoded means that there
  89  * is no support for MTU sizes greater than 1500. */
  90 #define KORINA_RBSIZE   1536 /* size of one resource buffer = Ether MTU */
  91 #define KORINA_RDS_MASK (KORINA_NUM_RDS - 1)
  92 #define KORINA_TDS_MASK (KORINA_NUM_TDS - 1)
  93 #define RD_RING_SIZE    (KORINA_NUM_RDS * sizeof(struct dma_desc))
  94 #define TD_RING_SIZE    (KORINA_NUM_TDS * sizeof(struct dma_desc))
  95
  96 #define TX_TIMEOUT      (6000 * HZ / 1000)
  97
  98 enum chain_status { desc_filled, desc_empty };
  99 #define IS_DMA_FINISHED(X)   (((X) & (DMA_DESC_FINI)) != 0)
 100 #define IS_DMA_DONE(X)   (((X) & (DMA_DESC_DONE)) != 0)
 101 #define RCVPKT_LENGTH(X)     (((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
 102
 103 /* Information that need to be kept for each board. */
 104 struct korina_private {
 105         struct eth_regs *eth_regs;
 106         struct dma_reg *rx_dma_regs;
 107         struct dma_reg *tx_dma_regs;
 108         struct dma_desc *td_ring; /* transmit descriptor ring */
 109         struct dma_desc *rd_ring; /* receive descriptor ring  */
 110
 111         struct sk_buff *tx_skb[KORINA_NUM_TDS];
 112         struct sk_buff *rx_skb[KORINA_NUM_RDS];
 113
 114         int rx_next_done;
 115         int rx_chain_head;
 116         int rx_chain_tail;
 117         enum chain_status rx_chain_status;
 118
 119         int tx_next_done;
 120         int tx_chain_head;
 121         int tx_chain_tail;
 122         enum chain_status tx_chain_status;
 123         int tx_count;
 124         int tx_full;
 125
 126         int rx_irq;
 127         int tx_irq;
 128         int ovr_irq;
 129         int und_irq;
 130
 131         spinlock_t lock;        /* NIC xmit lock */
 132
 133         int dma_halt_cnt;
 134         int dma_run_cnt;
 135         struct napi_struct napi;
 136         struct timer_list media_check_timer;
 137         struct mii_if_info mii_if;
 138         struct net_device *dev;
 139         int phy_addr;
 140 };
 141
 142 extern unsigned int idt_cpu_freq;
 143
 144 static inline void korina_start_dma(struct dma_reg *ch, u32 dma_addr)
 145 {
 146         writel(0, &ch->dmandptr);
 147         writel(dma_addr, &ch->dmadptr);
 148 }
 149
 150 static inline void korina_abort_dma(struct net_device *dev,
 151                                         struct dma_reg *ch)
 152 {
 153        if (readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
 154                writel(0x10, &ch->dmac);
 155
 156                while (!(readl(&ch->dmas) & DMA_STAT_HALT))
 157                        dev->trans_start = jiffies;
 158
 159                writel(0, &ch->dmas);
 160        }
 161
 162        writel(0, &ch->dmadptr);
 163        writel(0, &ch->dmandptr);
 164 }
 165
 166 static inline void korina_chain_dma(struct dma_reg *ch, u32 dma_addr)
 167 {
 168         writel(dma_addr, &ch->dmandptr);
 169 }
 170
 171 static void korina_abort_tx(struct net_device *dev)
 172 {
 173         struct korina_private *lp = netdev_priv(dev);
 174
 175         korina_abort_dma(dev, lp->tx_dma_regs);
 176 }
 177
 178 static void korina_abort_rx(struct net_device *dev)
 179 {
 180         struct korina_private *lp = netdev_priv(dev);
 181
 182         korina_abort_dma(dev, lp->rx_dma_regs);
 183 }
 184
 185 static void korina_start_rx(struct korina_private *lp,
 186                                         struct dma_desc *rd)
 187 {
 188         korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd));
 189 }
 190
 191 static void korina_chain_rx(struct korina_private *lp,
 192                                         struct dma_desc *rd)
 193 {
 194         korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd));
 195 }
 196
 197 /* transmit packet */
 198 static int korina_send_packet(struct sk_buff *skb, struct net_device *dev)
 199 {
 200         struct korina_private *lp = netdev_priv(dev);
 201         unsigned long flags;
 202         u32 length;
 203         u32 chain_prev, chain_next;
 204         struct dma_desc *td;
 205
 206         spin_lock_irqsave(&lp->lock, flags);
 207
 208         td = &lp->td_ring[lp->tx_chain_tail];
 209
 210         /* stop queue when full, drop pkts if queue already full */
 211         if (lp->tx_count >= (KORINA_NUM_TDS - 2)) {
 212                 lp->tx_full = 1;
 213
 214                 if (lp->tx_count == (KORINA_NUM_TDS - 2))
 215                         netif_stop_queue(dev);
 216                 else {
 217                         dev->stats.tx_dropped++;
 218                         dev_kfree_skb_any(skb);
 219                         spin_unlock_irqrestore(&lp->lock, flags);
 220
 221                         return NETDEV_TX_BUSY;
 222                 }
 223         }
 224
 225         lp->tx_count++;
 226
 227         lp->tx_skb[lp->tx_chain_tail] = skb;
 228
 229         length = skb->len;
 230         dma_cache_wback((u32)skb->data, skb->len);
 231
 232         /* Setup the transmit descriptor. */
 233         dma_cache_inv((u32) td, sizeof(*td));
 234         td->ca = CPHYSADDR(skb->data);
 235         chain_prev = (lp->tx_chain_tail - 1) & KORINA_TDS_MASK;
 236         chain_next = (lp->tx_chain_tail + 1) & KORINA_TDS_MASK;
 237
 238         if (readl(&(lp->tx_dma_regs->dmandptr)) == 0) {
 239                 if (lp->tx_chain_status == desc_empty) {
 240                         /* Update tail */
 241                         td->control = DMA_COUNT(length) |
 242                                         DMA_DESC_COF | DMA_DESC_IOF;
 243                         /* Move tail */
 244                         lp->tx_chain_tail = chain_next;
 245                         /* Write to NDPTR */
 246                         writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 247                                         &lp->tx_dma_regs->dmandptr);
 248                         /* Move head to tail */
 249                         lp->tx_chain_head = lp->tx_chain_tail;
 250                 } else {
 251                         /* Update tail */
 252                         td->control = DMA_COUNT(length) |
 253                                         DMA_DESC_COF | DMA_DESC_IOF;
 254                         /* Link to prev */
 255                         lp->td_ring[chain_prev].control &=
 256                                         ~DMA_DESC_COF;
 257                         /* Link to prev */
 258                         lp->td_ring[chain_prev].link =  CPHYSADDR(td);
 259                         /* Move tail */
 260                         lp->tx_chain_tail = chain_next;
 261                         /* Write to NDPTR */
 262                         writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 263                                         &(lp->tx_dma_regs->dmandptr));
 264                         /* Move head to tail */
 265                         lp->tx_chain_head = lp->tx_chain_tail;
 266                         lp->tx_chain_status = desc_empty;
 267                 }
 268         } else {
 269                 if (lp->tx_chain_status == desc_empty) {
 270                         /* Update tail */
 271                         td->control = DMA_COUNT(length) |
 272                                         DMA_DESC_COF | DMA_DESC_IOF;
 273                         /* Move tail */
 274                         lp->tx_chain_tail = chain_next;
 275                         lp->tx_chain_status = desc_filled;
 276                 } else {
 277                         /* Update tail */
 278                         td->control = DMA_COUNT(length) |
 279                                         DMA_DESC_COF | DMA_DESC_IOF;
 280                         lp->td_ring[chain_prev].control &=
 281                                         ~DMA_DESC_COF;
 282                         lp->td_ring[chain_prev].link =  CPHYSADDR(td);
 283                         lp->tx_chain_tail = chain_next;
 284                 }
 285         }
 286         dma_cache_wback((u32) td, sizeof(*td));
 287
 288         dev->trans_start = jiffies;
 289         spin_unlock_irqrestore(&lp->lock, flags);
 290
 291         return NETDEV_TX_OK;
 292 }
 293
 294 static int mdio_read(struct net_device *dev, int mii_id, int reg)
 295 {
 296         struct korina_private *lp = netdev_priv(dev);
 297         int ret;
 298
 299         mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
 300
 301         writel(0, &lp->eth_regs->miimcfg);
 302         writel(0, &lp->eth_regs->miimcmd);
 303         writel(mii_id | reg, &lp->eth_regs->miimaddr);
 304         writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
 305
 306         ret = (int)(readl(&lp->eth_regs->miimrdd));
 307         return ret;
 308 }
 309
 310 static void mdio_write(struct net_device *dev, int mii_id, int reg, int val)
 311 {
 312         struct korina_private *lp = netdev_priv(dev);
 313
 314         mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
 315
 316         writel(0, &lp->eth_regs->miimcfg);
 317         writel(1, &lp->eth_regs->miimcmd);
 318         writel(mii_id | reg, &lp->eth_regs->miimaddr);
 319         writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
 320         writel(val, &lp->eth_regs->miimwtd);
 321 }
 322
 323 /* Ethernet Rx DMA interrupt */
 324 static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id)
 325 {
 326         struct net_device *dev = dev_id;
 327         struct korina_private *lp = netdev_priv(dev);
 328         u32 dmas, dmasm;
 329         irqreturn_t retval;
 330
 331         dmas = readl(&lp->rx_dma_regs->dmas);
 332         if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) {
 333                 dmasm = readl(&lp->rx_dma_regs->dmasm);
 334                 writel(dmasm | (DMA_STAT_DONE |
 335                                 DMA_STAT_HALT | DMA_STAT_ERR),
 336                                 &lp->rx_dma_regs->dmasm);
 337
 338                 napi_schedule(&lp->napi);
 339
 340                 if (dmas & DMA_STAT_ERR)
 341                         printk(KERN_ERR "%s: DMA error\n", dev->name);
 342
 343                 retval = IRQ_HANDLED;
 344         } else
 345                 retval = IRQ_NONE;
 346
 347         return retval;
 348 }
 349
 350 static int korina_rx(struct net_device *dev, int limit)
 351 {
 352         struct korina_private *lp = netdev_priv(dev);
 353         struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done];
 354         struct sk_buff *skb, *skb_new;
 355         u8 *pkt_buf;
 356         u32 devcs, pkt_len, dmas;
 357         int count;
 358
 359         dma_cache_inv((u32)rd, sizeof(*rd));
 360
 361         for (count = 0; count < limit; count++) {
 362                 skb = lp->rx_skb[lp->rx_next_done];
 363                 skb_new = NULL;
 364
 365                 devcs = rd->devcs;
 366
 367                 if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0)
 368                         break;
 369
 370                 /* Update statistics counters */
 371                 if (devcs & ETH_RX_CRC)
 372                         dev->stats.rx_crc_errors++;
 373                 if (devcs & ETH_RX_LOR)
 374                         dev->stats.rx_length_errors++;
 375                 if (devcs & ETH_RX_LE)
 376                         dev->stats.rx_length_errors++;
 377                 if (devcs & ETH_RX_OVR)
 378                         dev->stats.rx_over_errors++;
 379                 if (devcs & ETH_RX_CV)
 380                         dev->stats.rx_frame_errors++;
 381                 if (devcs & ETH_RX_CES)
 382                         dev->stats.rx_length_errors++;
 383                 if (devcs & ETH_RX_MP)
 384                         dev->stats.multicast++;
 385
 386                 if ((devcs & ETH_RX_LD) != ETH_RX_LD) {
 387                         /* check that this is a whole packet
 388                          * WARNING: DMA_FD bit incorrectly set
 389                          * in Rc32434 (errata ref #077) */
 390                         dev->stats.rx_errors++;
 391                         dev->stats.rx_dropped++;
 392                 } else if ((devcs & ETH_RX_ROK)) {
 393                         pkt_len = RCVPKT_LENGTH(devcs);
 394
 395                         /* must be the (first and) last
 396                          * descriptor then */
 397                         pkt_buf = (u8 *)lp->rx_skb[lp->rx_next_done]->data;
 398
 399                         /* invalidate the cache */
 400                         dma_cache_inv((unsigned long)pkt_buf, pkt_len - 4);
 401
 402                         /* Malloc up new buffer. */
 403                         skb_new = netdev_alloc_skb_ip_align(dev, KORINA_RBSIZE);
 404
 405                         if (!skb_new)
 406                                 break;
 407                         /* Do not count the CRC */
 408                         skb_put(skb, pkt_len - 4);
 409                         skb->protocol = eth_type_trans(skb, dev);
 410
 411                         /* Pass the packet to upper layers */
 412                         netif_receive_skb(skb);
 413                         dev->stats.rx_packets++;
 414                         dev->stats.rx_bytes += pkt_len;
 415
 416                         /* Update the mcast stats */
 417                         if (devcs & ETH_RX_MP)
 418                                 dev->stats.multicast++;
 419
 420                         lp->rx_skb[lp->rx_next_done] = skb_new;
 421                 }
 422
 423                 rd->devcs = 0;
 424
 425                 /* Restore descriptor's curr_addr */
 426                 if (skb_new)
 427                         rd->ca = CPHYSADDR(skb_new->data);
 428                 else
 429                         rd->ca = CPHYSADDR(skb->data);
 430
 431                 rd->control = DMA_COUNT(KORINA_RBSIZE) |
 432                         DMA_DESC_COD | DMA_DESC_IOD;
 433                 lp->rd_ring[(lp->rx_next_done - 1) &
 434                         KORINA_RDS_MASK].control &=
 435                         ~DMA_DESC_COD;
 436
 437                 lp->rx_next_done = (lp->rx_next_done + 1) & KORINA_RDS_MASK;
 438                 dma_cache_wback((u32)rd, sizeof(*rd));
 439                 rd = &lp->rd_ring[lp->rx_next_done];
 440                 writel(~DMA_STAT_DONE, &lp->rx_dma_regs->dmas);
 441         }
 442
 443         dmas = readl(&lp->rx_dma_regs->dmas);
 444
 445         if (dmas & DMA_STAT_HALT) {
 446                 writel(~(DMA_STAT_HALT | DMA_STAT_ERR),
 447                                 &lp->rx_dma_regs->dmas);
 448
 449                 lp->dma_halt_cnt++;
 450                 rd->devcs = 0;
 451                 skb = lp->rx_skb[lp->rx_next_done];
 452                 rd->ca = CPHYSADDR(skb->data);
 453                 dma_cache_wback((u32)rd, sizeof(*rd));
 454                 korina_chain_rx(lp, rd);
 455         }
 456
 457         return count;
 458 }
 459
 460 static int korina_poll(struct napi_struct *napi, int budget)
 461 {
 462         struct korina_private *lp =
 463                 container_of(napi, struct korina_private, napi);
 464         struct net_device *dev = lp->dev;
 465         int work_done;
 466
 467         work_done = korina_rx(dev, budget);
 468         if (work_done < budget) {
 469                 napi_complete(napi);
 470
 471                 writel(readl(&lp->rx_dma_regs->dmasm) &
 472                         ~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
 473                         &lp->rx_dma_regs->dmasm);
 474         }
 475         return work_done;
 476 }
 477
 478 /*
 479  * Set or clear the multicast filter for this adaptor.
 480  */
 481 static void korina_multicast_list(struct net_device *dev)
 482 {
 483         struct korina_private *lp = netdev_priv(dev);
 484         unsigned long flags;
 485         struct dev_mc_list *dmi = dev->mc_list;
 486         u32 recognise = ETH_ARC_AB;     /* always accept broadcasts */
 487         int i;
 488
 489         /* Set promiscuous mode */
 490         if (dev->flags & IFF_PROMISC)
 491                 recognise |= ETH_ARC_PRO;
 492
 493         else if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 4))
 494                 /* All multicast and broadcast */
 495                 recognise |= ETH_ARC_AM;
 496
 497         /* Build the hash table */
 498         if (dev->mc_count > 4) {
 499                 u16 hash_table[4];
 500                 u32 crc;
 501
 502                 for (i = 0; i < 4; i++)
 503                         hash_table[i] = 0;
 504
 505                 for (i = 0; i < dev->mc_count; i++) {
 506                         char *addrs = dmi->dmi_addr;
 507
 508                         dmi = dmi->next;
 509
 510                         if (!(*addrs & 1))
 511                                 continue;
 512
 513                         crc = ether_crc_le(6, addrs);
 514                         crc >>= 26;
 515                         hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
 516                 }
 517                 /* Accept filtered multicast */
 518                 recognise |= ETH_ARC_AFM;
 519
 520                 /* Fill the MAC hash tables with their values */
 521                 writel((u32)(hash_table[1] << 16 | hash_table[0]),
 522                                         &lp->eth_regs->ethhash0);
 523                 writel((u32)(hash_table[3] << 16 | hash_table[2]),
 524                                         &lp->eth_regs->ethhash1);
 525         }
 526
 527         spin_lock_irqsave(&lp->lock, flags);
 528         writel(recognise, &lp->eth_regs->etharc);
 529         spin_unlock_irqrestore(&lp->lock, flags);
 530 }
 531
 532 static void korina_tx(struct net_device *dev)
 533 {
 534         struct korina_private *lp = netdev_priv(dev);
 535         struct dma_desc *td = &lp->td_ring[lp->tx_next_done];
 536         u32 devcs;
 537         u32 dmas;
 538
 539         spin_lock(&lp->lock);
 540
 541         /* Process all desc that are done */
 542         while (IS_DMA_FINISHED(td->control)) {
 543                 if (lp->tx_full == 1) {
 544                         netif_wake_queue(dev);
 545                         lp->tx_full = 0;
 546                 }
 547
 548                 devcs = lp->td_ring[lp->tx_next_done].devcs;
 549                 if ((devcs & (ETH_TX_FD | ETH_TX_LD)) !=
 550                                 (ETH_TX_FD | ETH_TX_LD)) {
 551                         dev->stats.tx_errors++;
 552                         dev->stats.tx_dropped++;
 553
 554                         /* Should never happen */
 555                         printk(KERN_ERR "%s: split tx ignored\n",
 556                                                         dev->name);
 557                 } else if (devcs & ETH_TX_TOK) {
 558                         dev->stats.tx_packets++;
 559                         dev->stats.tx_bytes +=
 560                                         lp->tx_skb[lp->tx_next_done]->len;
 561                 } else {
 562                         dev->stats.tx_errors++;
 563                         dev->stats.tx_dropped++;
 564
 565                         /* Underflow */
 566                         if (devcs & ETH_TX_UND)
 567                                 dev->stats.tx_fifo_errors++;
 568
 569                         /* Oversized frame */
 570                         if (devcs & ETH_TX_OF)
 571                                 dev->stats.tx_aborted_errors++;
 572
 573                         /* Excessive deferrals */
 574                         if (devcs & ETH_TX_ED)
 575                                 dev->stats.tx_carrier_errors++;
 576
 577                         /* Collisions: medium busy */
 578                         if (devcs & ETH_TX_EC)
 579                                 dev->stats.collisions++;
 580
 581                         /* Late collision */
 582                         if (devcs & ETH_TX_LC)
 583                                 dev->stats.tx_window_errors++;
 584                 }
 585
 586                 /* We must always free the original skb */
 587                 if (lp->tx_skb[lp->tx_next_done]) {
 588                         dev_kfree_skb_any(lp->tx_skb[lp->tx_next_done]);
 589                         lp->tx_skb[lp->tx_next_done] = NULL;
 590                 }
 591
 592                 lp->td_ring[lp->tx_next_done].control = DMA_DESC_IOF;
 593                 lp->td_ring[lp->tx_next_done].devcs = ETH_TX_FD | ETH_TX_LD;
 594                 lp->td_ring[lp->tx_next_done].link = 0;
 595                 lp->td_ring[lp->tx_next_done].ca = 0;
 596                 lp->tx_count--;
 597
 598                 /* Go on to next transmission */
 599                 lp->tx_next_done = (lp->tx_next_done + 1) & KORINA_TDS_MASK;
 600                 td = &lp->td_ring[lp->tx_next_done];
 601
 602         }
 603
 604         /* Clear the DMA status register */
 605         dmas = readl(&lp->tx_dma_regs->dmas);
 606         writel(~dmas, &lp->tx_dma_regs->dmas);
 607
 608         writel(readl(&lp->tx_dma_regs->dmasm) &
 609                         ~(DMA_STAT_FINI | DMA_STAT_ERR),
 610                         &lp->tx_dma_regs->dmasm);
 611
 612         spin_unlock(&lp->lock);
 613 }
 614
 615 static irqreturn_t
 616 korina_tx_dma_interrupt(int irq, void *dev_id)
 617 {
 618         struct net_device *dev = dev_id;
 619         struct korina_private *lp = netdev_priv(dev);
 620         u32 dmas, dmasm;
 621         irqreturn_t retval;
 622
 623         dmas = readl(&lp->tx_dma_regs->dmas);
 624
 625         if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) {
 626                 dmasm = readl(&lp->tx_dma_regs->dmasm);
 627                 writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
 628                                 &lp->tx_dma_regs->dmasm);
 629
 630                 korina_tx(dev);
 631
 632                 if (lp->tx_chain_status == desc_filled &&
 633                         (readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
 634                         writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
 635                                 &(lp->tx_dma_regs->dmandptr));
 636                         lp->tx_chain_status = desc_empty;
 637                         lp->tx_chain_head = lp->tx_chain_tail;
 638                         dev->trans_start = jiffies;
 639                 }
 640                 if (dmas & DMA_STAT_ERR)
 641                         printk(KERN_ERR "%s: DMA error\n", dev->name);
 642
 643                 retval = IRQ_HANDLED;
 644         } else
 645                 retval = IRQ_NONE;
 646
 647         return retval;
 648 }
 649
 650
 651 static void korina_check_media(struct net_device *dev, unsigned int init_media)
 652 {
 653         struct korina_private *lp = netdev_priv(dev);
 654
 655         mii_check_media(&lp->mii_if, 0, init_media);
 656
 657         if (lp->mii_if.full_duplex)
 658                 writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
 659                                                 &lp->eth_regs->ethmac2);
 660         else
 661                 writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
 662                                                 &lp->eth_regs->ethmac2);
 663 }
 664
 665 static void korina_poll_media(unsigned long data)
 666 {
 667         struct net_device *dev = (struct net_device *) data;
 668         struct korina_private *lp = netdev_priv(dev);
 669
 670         korina_check_media(dev, 0);
 671         mod_timer(&lp->media_check_timer, jiffies + HZ);
 672 }
 673
 674 static void korina_set_carrier(struct mii_if_info *mii)
 675 {
 676         if (mii->force_media) {
 677                 /* autoneg is off: Link is always assumed to be up */
 678                 if (!netif_carrier_ok(mii->dev))
 679                         netif_carrier_on(mii->dev);
 680         } else  /* Let MMI library update carrier status */
 681                 korina_check_media(mii->dev, 0);
 682 }
 683
 684 static int korina_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 685 {
 686         struct korina_private *lp = netdev_priv(dev);
 687         struct mii_ioctl_data *data = if_mii(rq);
 688         int rc;
 689
 690         if (!netif_running(dev))
 691                 return -EINVAL;
 692         spin_lock_irq(&lp->lock);
 693         rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL);
 694         spin_unlock_irq(&lp->lock);
 695         korina_set_carrier(&lp->mii_if);
 696
 697         return rc;
 698 }
 699
 700 /* ethtool helpers */
 701 static void netdev_get_drvinfo(struct net_device *dev,
 702                         struct ethtool_drvinfo *info)
 703 {
 704         struct korina_private *lp = netdev_priv(dev);
 705
 706         strcpy(info->driver, DRV_NAME);
 707         strcpy(info->version, DRV_VERSION);
 708         strcpy(info->bus_info, lp->dev->name);
 709 }
 710
 711 static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 712 {
 713         struct korina_private *lp = netdev_priv(dev);
 714         int rc;
 715
 716         spin_lock_irq(&lp->lock);
 717         rc = mii_ethtool_gset(&lp->mii_if, cmd);
 718         spin_unlock_irq(&lp->lock);
 719
 720         return rc;
 721 }
 722
 723 static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 724 {
 725         struct korina_private *lp = netdev_priv(dev);
 726         int rc;
 727
 728         spin_lock_irq(&lp->lock);
 729         rc = mii_ethtool_sset(&lp->mii_if, cmd);
 730         spin_unlock_irq(&lp->lock);
 731         korina_set_carrier(&lp->mii_if);
 732
 733         return rc;
 734 }
 735
 736 static u32 netdev_get_link(struct net_device *dev)
 737 {
 738         struct korina_private *lp = netdev_priv(dev);
 739
 740         return mii_link_ok(&lp->mii_if);
 741 }
 742
 743 static const struct ethtool_ops netdev_ethtool_ops = {
 744         .get_drvinfo            = netdev_get_drvinfo,
 745         .get_settings           = netdev_get_settings,
 746         .set_settings           = netdev_set_settings,
 747         .get_link               = netdev_get_link,
 748 };
 749
 750 static int korina_alloc_ring(struct net_device *dev)
 751 {
 752         struct korina_private *lp = netdev_priv(dev);
 753         struct sk_buff *skb;
 754         int i;
 755
 756         /* Initialize the transmit descriptors */
 757         for (i = 0; i < KORINA_NUM_TDS; i++) {
 758                 lp->td_ring[i].control = DMA_DESC_IOF;
 759                 lp->td_ring[i].devcs = ETH_TX_FD | ETH_TX_LD;
 760                 lp->td_ring[i].ca = 0;
 761                 lp->td_ring[i].link = 0;
 762         }
 763         lp->tx_next_done = lp->tx_chain_head = lp->tx_chain_tail =
 764                         lp->tx_full = lp->tx_count = 0;
 765         lp->tx_chain_status = desc_empty;
 766
 767         /* Initialize the receive descriptors */
 768         for (i = 0; i < KORINA_NUM_RDS; i++) {
 769                 skb = dev_alloc_skb(KORINA_RBSIZE + 2);
 770                 if (!skb)
 771                         return -ENOMEM;
 772                 skb_reserve(skb, 2);
 773                 lp->rx_skb[i] = skb;
 774                 lp->rd_ring[i].control = DMA_DESC_IOD |
 775                                 DMA_COUNT(KORINA_RBSIZE);
 776                 lp->rd_ring[i].devcs = 0;
 777                 lp->rd_ring[i].ca = CPHYSADDR(skb->data);
 778                 lp->rd_ring[i].link = CPHYSADDR(&lp->rd_ring[i+1]);
 779         }
 780
 781         /* loop back receive descriptors, so the last
 782          * descriptor points to the first one */
 783         lp->rd_ring[i - 1].link = CPHYSADDR(&lp->rd_ring[0]);
 784         lp->rd_ring[i - 1].control |= DMA_DESC_COD;
 785
 786         lp->rx_next_done  = 0;
 787         lp->rx_chain_head = 0;
 788         lp->rx_chain_tail = 0;
 789         lp->rx_chain_status = desc_empty;
 790
 791         return 0;
 792 }
 793
 794 static void korina_free_ring(struct net_device *dev)
 795 {
 796         struct korina_private *lp = netdev_priv(dev);
 797         int i;
 798
 799         for (i = 0; i < KORINA_NUM_RDS; i++) {
 800                 lp->rd_ring[i].control = 0;
 801                 if (lp->rx_skb[i])
 802                         dev_kfree_skb_any(lp->rx_skb[i]);
 803                 lp->rx_skb[i] = NULL;
 804         }
 805
 806         for (i = 0; i < KORINA_NUM_TDS; i++) {
 807                 lp->td_ring[i].control = 0;
 808                 if (lp->tx_skb[i])
 809                         dev_kfree_skb_any(lp->tx_skb[i]);
 810                 lp->tx_skb[i] = NULL;
 811         }
 812 }
 813
 814 /*
 815  * Initialize the RC32434 ethernet controller.
 816  */
 817 static int korina_init(struct net_device *dev)
 818 {
 819         struct korina_private *lp = netdev_priv(dev);
 820
 821         /* Disable DMA */
 822         korina_abort_tx(dev);
 823         korina_abort_rx(dev);
 824
 825         /* reset ethernet logic */
 826         writel(0, &lp->eth_regs->ethintfc);
 827         while ((readl(&lp->eth_regs->ethintfc) & ETH_INT_FC_RIP))
 828                 dev->trans_start = jiffies;
 829
 830         /* Enable Ethernet Interface */
 831         writel(ETH_INT_FC_EN, &lp->eth_regs->ethintfc);
 832
 833         /* Allocate rings */
 834         if (korina_alloc_ring(dev)) {
 835                 printk(KERN_ERR "%s: descriptor allocation failed\n", dev->name);
 836                 korina_free_ring(dev);
 837                 return -ENOMEM;
 838         }
 839
 840         writel(0, &lp->rx_dma_regs->dmas);
 841         /* Start Rx DMA */
 842         korina_start_rx(lp, &lp->rd_ring[0]);
 843
 844         writel(readl(&lp->tx_dma_regs->dmasm) &
 845                         ~(DMA_STAT_FINI | DMA_STAT_ERR),
 846                         &lp->tx_dma_regs->dmasm);
 847         writel(readl(&lp->rx_dma_regs->dmasm) &
 848                         ~(DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR),
 849                         &lp->rx_dma_regs->dmasm);
 850
 851         /* Accept only packets destined for this Ethernet device address */
 852         writel(ETH_ARC_AB, &lp->eth_regs->etharc);
 853
 854         /* Set all Ether station address registers to their initial values */
 855         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0);
 856         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0);
 857
 858         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1);
 859         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1);
 860
 861         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2);
 862         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2);
 863
 864         writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3);
 865         writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3);
 866
 867
 868         /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
 869         writel(ETH_MAC2_PE | ETH_MAC2_CEN | ETH_MAC2_FD,
 870                         &lp->eth_regs->ethmac2);
 871
 872         /* Back to back inter-packet-gap */
 873         writel(0x15, &lp->eth_regs->ethipgt);
 874         /* Non - Back to back inter-packet-gap */
 875         writel(0x12, &lp->eth_regs->ethipgr);
 876
 877         /* Management Clock Prescaler Divisor
 878          * Clock independent setting */
 879         writel(((idt_cpu_freq) / MII_CLOCK + 1) & ~1,
 880                        &lp->eth_regs->ethmcp);
 881
 882         /* don't transmit until fifo contains 48b */
 883         writel(48, &lp->eth_regs->ethfifott);
 884
 885         writel(ETH_MAC1_RE, &lp->eth_regs->ethmac1);
 886
 887         napi_enable(&lp->napi);
 888         netif_start_queue(dev);
 889
 890         return 0;
 891 }
 892
 893 /*
 894  * Restart the RC32434 ethernet controller.
 895  * FIXME: check the return status where we call it
 896  */
 897 static int korina_restart(struct net_device *dev)
 898 {
 899         struct korina_private *lp = netdev_priv(dev);
 900         int ret;
 901
 902         /*
 903          * Disable interrupts
 904          */
 905         disable_irq(lp->rx_irq);
 906         disable_irq(lp->tx_irq);
 907         disable_irq(lp->ovr_irq);
 908         disable_irq(lp->und_irq);
 909
 910         writel(readl(&lp->tx_dma_regs->dmasm) |
 911                                 DMA_STAT_FINI | DMA_STAT_ERR,
 912                                 &lp->tx_dma_regs->dmasm);
 913         writel(readl(&lp->rx_dma_regs->dmasm) |
 914                                 DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR,
 915                                 &lp->rx_dma_regs->dmasm);
 916
 917         korina_free_ring(dev);
 918
 919         napi_disable(&lp->napi);
 920
 921         ret = korina_init(dev);
 922         if (ret < 0) {
 923                 printk(KERN_ERR "%s: cannot restart device\n", dev->name);
 924                 return ret;
 925         }
 926         korina_multicast_list(dev);
 927
 928         enable_irq(lp->und_irq);
 929         enable_irq(lp->ovr_irq);
 930         enable_irq(lp->tx_irq);
 931         enable_irq(lp->rx_irq);
 932
 933         return ret;
 934 }
 935
 936 static void korina_clear_and_restart(struct net_device *dev, u32 value)
 937 {
 938         struct korina_private *lp = netdev_priv(dev);
 939
 940         netif_stop_queue(dev);
 941         writel(value, &lp->eth_regs->ethintfc);
 942         korina_restart(dev);
 943 }
 944
 945 /* Ethernet Tx Underflow interrupt */
 946 static irqreturn_t korina_und_interrupt(int irq, void *dev_id)
 947 {
 948         struct net_device *dev = dev_id;
 949         struct korina_private *lp = netdev_priv(dev);
 950         unsigned int und;
 951
 952         spin_lock(&lp->lock);
 953
 954         und = readl(&lp->eth_regs->ethintfc);
 955
 956         if (und & ETH_INT_FC_UND)
 957                 korina_clear_and_restart(dev, und & ~ETH_INT_FC_UND);
 958
 959         spin_unlock(&lp->lock);
 960
 961         return IRQ_HANDLED;
 962 }
 963
 964 static void korina_tx_timeout(struct net_device *dev)
 965 {
 966         struct korina_private *lp = netdev_priv(dev);
 967         unsigned long flags;
 968
 969         spin_lock_irqsave(&lp->lock, flags);
 970         korina_restart(dev);
 971         spin_unlock_irqrestore(&lp->lock, flags);
 972 }
 973
 974 /* Ethernet Rx Overflow interrupt */
 975 static irqreturn_t
 976 korina_ovr_interrupt(int irq, void *dev_id)
 977 {
 978         struct net_device *dev = dev_id;
 979         struct korina_private *lp = netdev_priv(dev);
 980         unsigned int ovr;
 981
 982         spin_lock(&lp->lock);
 983         ovr = readl(&lp->eth_regs->ethintfc);
 984
 985         if (ovr & ETH_INT_FC_OVR)
 986                 korina_clear_and_restart(dev, ovr & ~ETH_INT_FC_OVR);
 987
 988         spin_unlock(&lp->lock);
 989
 990         return IRQ_HANDLED;
 991 }
 992
 993 #ifdef CONFIG_NET_POLL_CONTROLLER
 994 static void korina_poll_controller(struct net_device *dev)
 995 {
 996         disable_irq(dev->irq);
 997         korina_tx_dma_interrupt(dev->irq, dev);
 998         enable_irq(dev->irq);
 999 }
1000 #endif
1001
1002 static int korina_open(struct net_device *dev)
1003 {
1004         struct korina_private *lp = netdev_priv(dev);
1005         int ret;
1006
1007         /* Initialize */
1008         ret = korina_init(dev);
1009         if (ret < 0) {
1010                 printk(KERN_ERR "%s: cannot open device\n", dev->name);
1011                 goto out;
1012         }
1013
1014         /* Install the interrupt handler
1015          * that handles the Done Finished
1016          * Ovr and Und Events */
1017         ret = request_irq(lp->rx_irq, korina_rx_dma_interrupt,
1018                         IRQF_DISABLED, "Korina ethernet Rx", dev);
1019         if (ret < 0) {
1020                 printk(KERN_ERR "%s: unable to get Rx DMA IRQ %d\n",
1021                     dev->name, lp->rx_irq);
1022                 goto err_release;
1023         }
1024         ret = request_irq(lp->tx_irq, korina_tx_dma_interrupt,
1025                         IRQF_DISABLED, "Korina ethernet Tx", dev);
1026         if (ret < 0) {
1027                 printk(KERN_ERR "%s: unable to get Tx DMA IRQ %d\n",
1028                     dev->name, lp->tx_irq);
1029                 goto err_free_rx_irq;
1030         }
1031
1032         /* Install handler for overrun error. */
1033         ret = request_irq(lp->ovr_irq, korina_ovr_interrupt,
1034                         IRQF_DISABLED, "Ethernet Overflow", dev);
1035         if (ret < 0) {
1036                 printk(KERN_ERR "%s: unable to get OVR IRQ %d\n",
1037                     dev->name, lp->ovr_irq);
1038                 goto err_free_tx_irq;
1039         }
1040
1041         /* Install handler for underflow error. */
1042         ret = request_irq(lp->und_irq, korina_und_interrupt,
1043                         IRQF_DISABLED, "Ethernet Underflow", dev);
1044         if (ret < 0) {
1045                 printk(KERN_ERR "%s: unable to get UND IRQ %d\n",
1046                     dev->name, lp->und_irq);
1047                 goto err_free_ovr_irq;
1048         }
1049         mod_timer(&lp->media_check_timer, jiffies + 1);
1050 out:
1051         return ret;
1052
1053 err_free_ovr_irq:
1054         free_irq(lp->ovr_irq, dev);
1055 err_free_tx_irq:
1056         free_irq(lp->tx_irq, dev);
1057 err_free_rx_irq:
1058         free_irq(lp->rx_irq, dev);
1059 err_release:
1060         korina_free_ring(dev);
1061         goto out;
1062 }
1063
1064 static int korina_close(struct net_device *dev)
1065 {
1066         struct korina_private *lp = netdev_priv(dev);
1067         u32 tmp;
1068
1069         del_timer(&lp->media_check_timer);
1070
1071         /* Disable interrupts */
1072         disable_irq(lp->rx_irq);
1073         disable_irq(lp->tx_irq);
1074         disable_irq(lp->ovr_irq);
1075         disable_irq(lp->und_irq);
1076
1077         korina_abort_tx(dev);
1078         tmp = readl(&lp->tx_dma_regs->dmasm);
1079         tmp = tmp | DMA_STAT_FINI | DMA_STAT_ERR;
1080         writel(tmp, &lp->tx_dma_regs->dmasm);
1081
1082         korina_abort_rx(dev);
1083         tmp = readl(&lp->rx_dma_regs->dmasm);
1084         tmp = tmp | DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR;
1085         writel(tmp, &lp->rx_dma_regs->dmasm);
1086
1087         korina_free_ring(dev);
1088
1089         napi_disable(&lp->napi);
1090
1091         free_irq(lp->rx_irq, dev);
1092         free_irq(lp->tx_irq, dev);
1093         free_irq(lp->ovr_irq, dev);
1094         free_irq(lp->und_irq, dev);
1095
1096         return 0;
1097 }
1098
1099 static const struct net_device_ops korina_netdev_ops = {
1100         .ndo_open               = korina_open,
1101         .ndo_stop               = korina_close,
1102         .ndo_start_xmit         = korina_send_packet,
1103         .ndo_set_multicast_list = korina_multicast_list,
1104         .ndo_tx_timeout         = korina_tx_timeout,
1105         .ndo_do_ioctl           = korina_ioctl,
1106         .ndo_change_mtu         = eth_change_mtu,
1107         .ndo_validate_addr      = eth_validate_addr,
1108         .ndo_set_mac_address    = eth_mac_addr,
1109 #ifdef CONFIG_NET_POLL_CONTROLLER
1110         .ndo_poll_controller    = korina_poll_controller,
1111 #endif
1112 };
1113
1114 static int korina_probe(struct platform_device *pdev)
1115 {
1116         struct korina_device *bif = platform_get_drvdata(pdev);
1117         struct korina_private *lp;
1118         struct net_device *dev;
1119         struct resource *r;
1120         int rc;
1121
1122         dev = alloc_etherdev(sizeof(struct korina_private));
1123         if (!dev) {
1124                 printk(KERN_ERR DRV_NAME ": alloc_etherdev failed\n");
1125                 return -ENOMEM;
1126         }
1127         SET_NETDEV_DEV(dev, &pdev->dev);
1128         lp = netdev_priv(dev);
1129
1130         bif->dev = dev;
1131         memcpy(dev->dev_addr, bif->mac, 6);
1132
1133         lp->rx_irq = platform_get_irq_byname(pdev, "korina_rx");
1134         lp->tx_irq = platform_get_irq_byname(pdev, "korina_tx");
1135         lp->ovr_irq = platform_get_irq_byname(pdev, "korina_ovr");
1136         lp->und_irq = platform_get_irq_byname(pdev, "korina_und");
1137
1138         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_regs");
1139         dev->base_addr = r->start;
1140         lp->eth_regs = ioremap_nocache(r->start, r->end - r->start);
1141         if (!lp->eth_regs) {
1142                 printk(KERN_ERR DRV_NAME ": cannot remap registers\n");
1143                 rc = -ENXIO;
1144                 goto probe_err_out;
1145         }
1146
1147         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_rx");
1148         lp->rx_dma_regs = ioremap_nocache(r->start, r->end - r->start);
1149         if (!lp->rx_dma_regs) {
1150                 printk(KERN_ERR DRV_NAME ": cannot remap Rx DMA registers\n");
1151                 rc = -ENXIO;
1152                 goto probe_err_dma_rx;
1153         }
1154
1155         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_tx");
1156         lp->tx_dma_regs = ioremap_nocache(r->start, r->end - r->start);
1157         if (!lp->tx_dma_regs) {
1158                 printk(KERN_ERR DRV_NAME ": cannot remap Tx DMA registers\n");
1159                 rc = -ENXIO;
1160                 goto probe_err_dma_tx;
1161         }
1162
1163         lp->td_ring = kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL);
1164         if (!lp->td_ring) {
1165                 printk(KERN_ERR DRV_NAME ": cannot allocate descriptors\n");
1166                 rc = -ENXIO;
1167                 goto probe_err_td_ring;
1168         }
1169
1170         dma_cache_inv((unsigned long)(lp->td_ring),
1171                         TD_RING_SIZE + RD_RING_SIZE);
1172
1173         /* now convert TD_RING pointer to KSEG1 */
1174         lp->td_ring = (struct dma_desc *)KSEG1ADDR(lp->td_ring);
1175         lp->rd_ring = &lp->td_ring[KORINA_NUM_TDS];
1176
1177         spin_lock_init(&lp->lock);
1178         /* just use the rx dma irq */
1179         dev->irq = lp->rx_irq;
1180         lp->dev = dev;
1181
1182         dev->netdev_ops = &korina_netdev_ops;
1183         dev->ethtool_ops = &netdev_ethtool_ops;
1184         dev->watchdog_timeo = TX_TIMEOUT;
1185         netif_napi_add(dev, &lp->napi, korina_poll, 64);
1186
1187         lp->phy_addr = (((lp->rx_irq == 0x2c? 1:0) << 8) | 0x05);
1188         lp->mii_if.dev = dev;
1189         lp->mii_if.mdio_read = mdio_read;
1190         lp->mii_if.mdio_write = mdio_write;
1191         lp->mii_if.phy_id = lp->phy_addr;
1192         lp->mii_if.phy_id_mask = 0x1f;
1193         lp->mii_if.reg_num_mask = 0x1f;
1194
1195         rc = register_netdev(dev);
1196         if (rc < 0) {
1197                 printk(KERN_ERR DRV_NAME
1198                         ": cannot register net device: %d\n", rc);
1199                 goto probe_err_register;
1200         }
1201         setup_timer(&lp->media_check_timer, korina_poll_media, (unsigned long) dev);
1202
1203         printk(KERN_INFO "%s: " DRV_NAME "-" DRV_VERSION " " DRV_RELDATE "\n",
1204                         dev->name);
1205 out:
1206         return rc;
1207
1208 probe_err_register:
1209         kfree(lp->td_ring);
1210 probe_err_td_ring:
1211         iounmap(lp->tx_dma_regs);
1212 probe_err_dma_tx:
1213         iounmap(lp->rx_dma_regs);
1214 probe_err_dma_rx:
1215         iounmap(lp->eth_regs);
1216 probe_err_out:
1217         free_netdev(dev);
1218         goto out;
1219 }
1220
1221 static int korina_remove(struct platform_device *pdev)
1222 {
1223         struct korina_device *bif = platform_get_drvdata(pdev);
1224         struct korina_private *lp = netdev_priv(bif->dev);
1225
1226         iounmap(lp->eth_regs);
1227         iounmap(lp->rx_dma_regs);
1228         iounmap(lp->tx_dma_regs);
1229
1230         platform_set_drvdata(pdev, NULL);
1231         unregister_netdev(bif->dev);
1232         free_netdev(bif->dev);
1233
1234         return 0;
1235 }
1236
1237 static struct platform_driver korina_driver = {
1238         .driver.name = "korina",
1239         .probe = korina_probe,
1240         .remove = korina_remove,
1241 };
1242
1243 static int __init korina_init_module(void)
1244 {
1245         return platform_driver_register(&korina_driver);
1246 }
1247
1248 static void korina_cleanup_module(void)
1249 {
1250         return platform_driver_unregister(&korina_driver);
1251 }
1252
1253 module_init(korina_init_module);
1254 module_exit(korina_cleanup_module);
1255
1256 MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
1257 MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
1258 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
1259 MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
1260 MODULE_LICENSE("GPL");