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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k4"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #ifdef CONFIG_DCA
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 152                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 153                 tx_buffer_info->dma = 0;
 154         }
 155         if (tx_buffer_info->skb) {
 156                 dev_kfree_skb_any(tx_buffer_info->skb);
 157                 tx_buffer_info->skb = NULL;
 158         }
 159         /* tx_buffer_info must be completely set up in the transmit path */
 160 }
 161
 162 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 163                                        struct ixgbe_ring *tx_ring,
 164                                        unsigned int eop)
 165 {
 166         struct ixgbe_hw *hw = &adapter->hw;
 167         u32 head, tail;
 168
 169         /* Detect a transmit hang in hardware, this serializes the
 170          * check with the clearing of time_stamp and movement of eop */
 171         head = IXGBE_READ_REG(hw, tx_ring->head);
 172         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 173         adapter->detect_tx_hung = false;
 174         if ((head != tail) &&
 175             tx_ring->tx_buffer_info[eop].time_stamp &&
 176             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 177             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 178                 /* detected Tx unit hang */
 179                 union ixgbe_adv_tx_desc *tx_desc;
 180                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 181                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 182                         "  Tx Queue             <%d>\n"
 183                         "  TDH, TDT             <%x>, <%x>\n"
 184                         "  next_to_use          <%x>\n"
 185                         "  next_to_clean        <%x>\n"
 186                         "tx_buffer_info[next_to_clean]\n"
 187                         "  time_stamp           <%lx>\n"
 188                         "  jiffies              <%lx>\n",
 189                         tx_ring->queue_index,
 190                         head, tail,
 191                         tx_ring->next_to_use, eop,
 192                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 193                 return true;
 194         }
 195
 196         return false;
 197 }
 198
 199 #define IXGBE_MAX_TXD_PWR       14
 200 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 201
 202 /* Tx Descriptors needed, worst case */
 203 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 204                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 205 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 206         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 207
 208 #define GET_TX_HEAD_FROM_RING(ring) (\
 209         *(volatile u32 *) \
 210         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 211 static void ixgbe_tx_timeout(struct net_device *netdev);
 212
 213 /**
 214  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 215  * @adapter: board private structure
 216  * @tx_ring: tx ring to clean
 217  **/
 218 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 219                                struct ixgbe_ring *tx_ring)
 220 {
 221         union ixgbe_adv_tx_desc *tx_desc;
 222         struct ixgbe_tx_buffer *tx_buffer_info;
 223         struct net_device *netdev = adapter->netdev;
 224         struct sk_buff *skb;
 225         unsigned int i;
 226         u32 head, oldhead;
 227         unsigned int count = 0;
 228         unsigned int total_bytes = 0, total_packets = 0;
 229
 230         rmb();
 231         head = GET_TX_HEAD_FROM_RING(tx_ring);
 232         head = le32_to_cpu(head);
 233         i = tx_ring->next_to_clean;
 234         while (1) {
 235                 while (i != head) {
 236                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 237                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 238                         skb = tx_buffer_info->skb;
 239
 240                         if (skb) {
 241                                 unsigned int segs, bytecount;
 242
 243                                 /* gso_segs is currently only valid for tcp */
 244                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 245                                 /* multiply data chunks by size of headers */
 246                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 247                                             skb->len;
 248                                 total_packets += segs;
 249                                 total_bytes += bytecount;
 250                         }
 251
 252                         ixgbe_unmap_and_free_tx_resource(adapter,
 253                                                          tx_buffer_info);
 254
 255                         i++;
 256                         if (i == tx_ring->count)
 257                                 i = 0;
 258
 259                         count++;
 260                         if (count == tx_ring->count)
 261                                 goto done_cleaning;
 262                 }
 263                 oldhead = head;
 264                 rmb();
 265                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 266                 head = le32_to_cpu(head);
 267                 if (head == oldhead)
 268                         goto done_cleaning;
 269         } /* while (1) */
 270
 271 done_cleaning:
 272         tx_ring->next_to_clean = i;
 273
 274 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 275         if (unlikely(count && netif_carrier_ok(netdev) &&
 276                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 277                 /* Make sure that anybody stopping the queue after this
 278                  * sees the new next_to_clean.
 279                  */
 280                 smp_mb();
 281                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 282                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 283                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 284                         ++adapter->restart_queue;
 285                 }
 286         }
 287
 288         if (adapter->detect_tx_hung) {
 289                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 290                         /* schedule immediate reset if we believe we hung */
 291                         DPRINTK(PROBE, INFO,
 292                                 "tx hang %d detected, resetting adapter\n",
 293                                 adapter->tx_timeout_count + 1);
 294                         ixgbe_tx_timeout(adapter->netdev);
 295                 }
 296         }
 297
 298         /* re-arm the interrupt */
 299         if ((total_packets >= tx_ring->work_limit) ||
 300             (count == tx_ring->count))
 301                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 302
 303         tx_ring->total_bytes += total_bytes;
 304         tx_ring->total_packets += total_packets;
 305         tx_ring->stats.bytes += total_bytes;
 306         tx_ring->stats.packets += total_packets;
 307         adapter->net_stats.tx_bytes += total_bytes;
 308         adapter->net_stats.tx_packets += total_packets;
 309         return (total_packets ? true : false);
 310 }
 311
 312 #ifdef CONFIG_DCA
 313 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 314                                 struct ixgbe_ring *rx_ring)
 315 {
 316         u32 rxctrl;
 317         int cpu = get_cpu();
 318         int q = rx_ring - adapter->rx_ring;
 319
 320         if (rx_ring->cpu != cpu) {
 321                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 322                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 323                 rxctrl |= dca_get_tag(cpu);
 324                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 325                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 326                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 327                 rx_ring->cpu = cpu;
 328         }
 329         put_cpu();
 330 }
 331
 332 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 333                                 struct ixgbe_ring *tx_ring)
 334 {
 335         u32 txctrl;
 336         int cpu = get_cpu();
 337         int q = tx_ring - adapter->tx_ring;
 338
 339         if (tx_ring->cpu != cpu) {
 340                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 341                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 342                 txctrl |= dca_get_tag(cpu);
 343                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 344                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 345                 tx_ring->cpu = cpu;
 346         }
 347         put_cpu();
 348 }
 349
 350 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 351 {
 352         int i;
 353
 354         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 355                 return;
 356
 357         for (i = 0; i < adapter->num_tx_queues; i++) {
 358                 adapter->tx_ring[i].cpu = -1;
 359                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 360         }
 361         for (i = 0; i < adapter->num_rx_queues; i++) {
 362                 adapter->rx_ring[i].cpu = -1;
 363                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 364         }
 365 }
 366
 367 static int __ixgbe_notify_dca(struct device *dev, void *data)
 368 {
 369         struct net_device *netdev = dev_get_drvdata(dev);
 370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 371         unsigned long event = *(unsigned long *)data;
 372
 373         switch (event) {
 374         case DCA_PROVIDER_ADD:
 375                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 376                 /* Always use CB2 mode, difference is masked
 377                  * in the CB driver. */
 378                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 379                 if (dca_add_requester(dev) == 0) {
 380                         ixgbe_setup_dca(adapter);
 381                         break;
 382                 }
 383                 /* Fall Through since DCA is disabled. */
 384         case DCA_PROVIDER_REMOVE:
 385                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 386                         dca_remove_requester(dev);
 387                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 388                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 389                 }
 390                 break;
 391         }
 392
 393         return 0;
 394 }
 395
 396 #endif /* CONFIG_DCA */
 397 /**
 398  * ixgbe_receive_skb - Send a completed packet up the stack
 399  * @adapter: board private structure
 400  * @skb: packet to send up
 401  * @status: hardware indication of status of receive
 402  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 403  * @rx_desc: rx descriptor
 404  **/
 405 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 406                               struct sk_buff *skb, u8 status,
 407                               struct ixgbe_ring *ring,
 408                               union ixgbe_adv_rx_desc *rx_desc)
 409 {
 410         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 411         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 412
 413         if (adapter->netdev->features & NETIF_F_LRO &&
 414             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 415                 if (adapter->vlgrp && is_vlan)
 416                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 417                                                      adapter->vlgrp, tag,
 418                                                      rx_desc);
 419                 else
 420                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 421                 ring->lro_used = true;
 422         } else {
 423                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 424                         if (adapter->vlgrp && is_vlan)
 425                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 426                         else
 427                                 netif_receive_skb(skb);
 428                 } else {
 429                         if (adapter->vlgrp && is_vlan)
 430                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 431                         else
 432                                 netif_rx(skb);
 433                 }
 434         }
 435 }
 436
 437 /**
 438  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 439  * @adapter: address of board private structure
 440  * @status_err: hardware indication of status of receive
 441  * @skb: skb currently being received and modified
 442  **/
 443 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 444                                      u32 status_err, struct sk_buff *skb)
 445 {
 446         skb->ip_summed = CHECKSUM_NONE;
 447
 448         /* Rx csum disabled */
 449         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 450                 return;
 451
 452         /* if IP and error */
 453         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 454             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 455                 adapter->hw_csum_rx_error++;
 456                 return;
 457         }
 458
 459         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 460                 return;
 461
 462         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 463                 adapter->hw_csum_rx_error++;
 464                 return;
 465         }
 466
 467         /* It must be a TCP or UDP packet with a valid checksum */
 468         skb->ip_summed = CHECKSUM_UNNECESSARY;
 469         adapter->hw_csum_rx_good++;
 470 }
 471
 472 /**
 473  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 474  * @adapter: address of board private structure
 475  **/
 476 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 477                                    struct ixgbe_ring *rx_ring,
 478                                    int cleaned_count)
 479 {
 480         struct net_device *netdev = adapter->netdev;
 481         struct pci_dev *pdev = adapter->pdev;
 482         union ixgbe_adv_rx_desc *rx_desc;
 483         struct ixgbe_rx_buffer *bi;
 484         unsigned int i;
 485         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
 486
 487         i = rx_ring->next_to_use;
 488         bi = &rx_ring->rx_buffer_info[i];
 489
 490         while (cleaned_count--) {
 491                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 492
 493                 if (!bi->page &&
 494                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 495                         bi->page = alloc_page(GFP_ATOMIC);
 496                         if (!bi->page) {
 497                                 adapter->alloc_rx_page_failed++;
 498                                 goto no_buffers;
 499                         }
 500                         bi->page_dma = pci_map_page(pdev, bi->page, 0,
 501                                                     PAGE_SIZE,
 502                                                     PCI_DMA_FROMDEVICE);
 503                 }
 504
 505                 if (!bi->skb) {
 506                         struct sk_buff *skb = netdev_alloc_skb(netdev, bufsz);
 507
 508                         if (!skb) {
 509                                 adapter->alloc_rx_buff_failed++;
 510                                 goto no_buffers;
 511                         }
 512
 513                         /*
 514                          * Make buffer alignment 2 beyond a 16 byte boundary
 515                          * this will result in a 16 byte aligned IP header after
 516                          * the 14 byte MAC header is removed
 517                          */
 518                         skb_reserve(skb, NET_IP_ALIGN);
 519
 520                         bi->skb = skb;
 521                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 522                                                  PCI_DMA_FROMDEVICE);
 523                 }
 524                 /* Refresh the desc even if buffer_addrs didn't change because
 525                  * each write-back erases this info. */
 526                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 527                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 528                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 529                 } else {
 530                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 531                 }
 532
 533                 i++;
 534                 if (i == rx_ring->count)
 535                         i = 0;
 536                 bi = &rx_ring->rx_buffer_info[i];
 537         }
 538
 539 no_buffers:
 540         if (rx_ring->next_to_use != i) {
 541                 rx_ring->next_to_use = i;
 542                 if (i-- == 0)
 543                         i = (rx_ring->count - 1);
 544
 545                 /*
 546                  * Force memory writes to complete before letting h/w
 547                  * know there are new descriptors to fetch.  (Only
 548                  * applicable for weak-ordered memory model archs,
 549                  * such as IA-64).
 550                  */
 551                 wmb();
 552                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 553         }
 554 }
 555
 556 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 557 {
 558         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 559 }
 560
 561 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 562 {
 563         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 564 }
 565
 566 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 567                                struct ixgbe_ring *rx_ring,
 568                                int *work_done, int work_to_do)
 569 {
 570         struct net_device *netdev = adapter->netdev;
 571         struct pci_dev *pdev = adapter->pdev;
 572         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 573         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 574         struct sk_buff *skb;
 575         unsigned int i;
 576         u32 len, staterr;
 577         u16 hdr_info;
 578         bool cleaned = false;
 579         int cleaned_count = 0;
 580         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 581
 582         i = rx_ring->next_to_clean;
 583         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 584         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 585         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 586
 587         while (staterr & IXGBE_RXD_STAT_DD) {
 588                 u32 upper_len = 0;
 589                 if (*work_done >= work_to_do)
 590                         break;
 591                 (*work_done)++;
 592
 593                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 594                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 595                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 596                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 597                         if (hdr_info & IXGBE_RXDADV_SPH)
 598                                 adapter->rx_hdr_split++;
 599                         if (len > IXGBE_RX_HDR_SIZE)
 600                                 len = IXGBE_RX_HDR_SIZE;
 601                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 602                 } else {
 603                         len = le16_to_cpu(rx_desc->wb.upper.length);
 604                 }
 605
 606                 cleaned = true;
 607                 skb = rx_buffer_info->skb;
 608                 prefetch(skb->data - NET_IP_ALIGN);
 609                 rx_buffer_info->skb = NULL;
 610
 611                 if (len && !skb_shinfo(skb)->nr_frags) {
 612                         pci_unmap_single(pdev, rx_buffer_info->dma,
 613                                          rx_ring->rx_buf_len + NET_IP_ALIGN,
 614                                          PCI_DMA_FROMDEVICE);
 615                         skb_put(skb, len);
 616                 }
 617
 618                 if (upper_len) {
 619                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 620                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 621                         rx_buffer_info->page_dma = 0;
 622                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 623                                            rx_buffer_info->page, 0, upper_len);
 624                         rx_buffer_info->page = NULL;
 625
 626                         skb->len += upper_len;
 627                         skb->data_len += upper_len;
 628                         skb->truesize += upper_len;
 629                 }
 630
 631                 i++;
 632                 if (i == rx_ring->count)
 633                         i = 0;
 634                 next_buffer = &rx_ring->rx_buffer_info[i];
 635
 636                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 637                 prefetch(next_rxd);
 638
 639                 cleaned_count++;
 640                 if (staterr & IXGBE_RXD_STAT_EOP) {
 641                         rx_ring->stats.packets++;
 642                         rx_ring->stats.bytes += skb->len;
 643                 } else {
 644                         rx_buffer_info->skb = next_buffer->skb;
 645                         rx_buffer_info->dma = next_buffer->dma;
 646                         next_buffer->skb = skb;
 647                         adapter->non_eop_descs++;
 648                         goto next_desc;
 649                 }
 650
 651                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 652                         dev_kfree_skb_irq(skb);
 653                         goto next_desc;
 654                 }
 655
 656                 ixgbe_rx_checksum(adapter, staterr, skb);
 657
 658                 /* probably a little skewed due to removing CRC */
 659                 total_rx_bytes += skb->len;
 660                 total_rx_packets++;
 661
 662                 skb->protocol = eth_type_trans(skb, netdev);
 663                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 664                 netdev->last_rx = jiffies;
 665
 666 next_desc:
 667                 rx_desc->wb.upper.status_error = 0;
 668
 669                 /* return some buffers to hardware, one at a time is too slow */
 670                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 671                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 672                         cleaned_count = 0;
 673                 }
 674
 675                 /* use prefetched values */
 676                 rx_desc = next_rxd;
 677                 rx_buffer_info = next_buffer;
 678
 679                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 680         }
 681
 682         if (rx_ring->lro_used) {
 683                 lro_flush_all(&rx_ring->lro_mgr);
 684                 rx_ring->lro_used = false;
 685         }
 686
 687         rx_ring->next_to_clean = i;
 688         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 689
 690         if (cleaned_count)
 691                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 692
 693         rx_ring->total_packets += total_rx_packets;
 694         rx_ring->total_bytes += total_rx_bytes;
 695         adapter->net_stats.rx_bytes += total_rx_bytes;
 696         adapter->net_stats.rx_packets += total_rx_packets;
 697
 698         return cleaned;
 699 }
 700
 701 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 702 /**
 703  * ixgbe_configure_msix - Configure MSI-X hardware
 704  * @adapter: board private structure
 705  *
 706  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 707  * interrupts.
 708  **/
 709 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 710 {
 711         struct ixgbe_q_vector *q_vector;
 712         int i, j, q_vectors, v_idx, r_idx;
 713         u32 mask;
 714
 715         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 716
 717         /* Populate the IVAR table and set the ITR values to the
 718          * corresponding register.
 719          */
 720         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 721                 q_vector = &adapter->q_vector[v_idx];
 722                 /* XXX for_each_bit(...) */
 723                 r_idx = find_first_bit(q_vector->rxr_idx,
 724                                       adapter->num_rx_queues);
 725
 726                 for (i = 0; i < q_vector->rxr_count; i++) {
 727                         j = adapter->rx_ring[r_idx].reg_idx;
 728                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 729                         r_idx = find_next_bit(q_vector->rxr_idx,
 730                                               adapter->num_rx_queues,
 731                                               r_idx + 1);
 732                 }
 733                 r_idx = find_first_bit(q_vector->txr_idx,
 734                                        adapter->num_tx_queues);
 735
 736                 for (i = 0; i < q_vector->txr_count; i++) {
 737                         j = adapter->tx_ring[r_idx].reg_idx;
 738                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 739                         r_idx = find_next_bit(q_vector->txr_idx,
 740                                               adapter->num_tx_queues,
 741                                               r_idx + 1);
 742                 }
 743
 744                 /* if this is a tx only vector use half the irq (tx) rate */
 745                 if (q_vector->txr_count && !q_vector->rxr_count)
 746                         q_vector->eitr = adapter->tx_eitr;
 747                 else
 748                         /* rx only or mixed */
 749                         q_vector->eitr = adapter->rx_eitr;
 750
 751                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 752                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 753         }
 754
 755         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 756         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 757
 758         /* set up to autoclear timer, lsc, and the vectors */
 759         mask = IXGBE_EIMS_ENABLE_MASK;
 760         mask &= ~IXGBE_EIMS_OTHER;
 761         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 762 }
 763
 764 enum latency_range {
 765         lowest_latency = 0,
 766         low_latency = 1,
 767         bulk_latency = 2,
 768         latency_invalid = 255
 769 };
 770
 771 /**
 772  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 773  * @adapter: pointer to adapter
 774  * @eitr: eitr setting (ints per sec) to give last timeslice
 775  * @itr_setting: current throttle rate in ints/second
 776  * @packets: the number of packets during this measurement interval
 777  * @bytes: the number of bytes during this measurement interval
 778  *
 779  *      Stores a new ITR value based on packets and byte
 780  *      counts during the last interrupt.  The advantage of per interrupt
 781  *      computation is faster updates and more accurate ITR for the current
 782  *      traffic pattern.  Constants in this function were computed
 783  *      based on theoretical maximum wire speed and thresholds were set based
 784  *      on testing data as well as attempting to minimize response time
 785  *      while increasing bulk throughput.
 786  *      this functionality is controlled by the InterruptThrottleRate module
 787  *      parameter (see ixgbe_param.c)
 788  **/
 789 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 790                            u32 eitr, u8 itr_setting,
 791                            int packets, int bytes)
 792 {
 793         unsigned int retval = itr_setting;
 794         u32 timepassed_us;
 795         u64 bytes_perint;
 796
 797         if (packets == 0)
 798                 goto update_itr_done;
 799
 800
 801         /* simple throttlerate management
 802          *    0-20MB/s lowest (100000 ints/s)
 803          *   20-100MB/s low   (20000 ints/s)
 804          *  100-1249MB/s bulk (8000 ints/s)
 805          */
 806         /* what was last interrupt timeslice? */
 807         timepassed_us = 1000000/eitr;
 808         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 809
 810         switch (itr_setting) {
 811         case lowest_latency:
 812                 if (bytes_perint > adapter->eitr_low)
 813                         retval = low_latency;
 814                 break;
 815         case low_latency:
 816                 if (bytes_perint > adapter->eitr_high)
 817                         retval = bulk_latency;
 818                 else if (bytes_perint <= adapter->eitr_low)
 819                         retval = lowest_latency;
 820                 break;
 821         case bulk_latency:
 822                 if (bytes_perint <= adapter->eitr_high)
 823                         retval = low_latency;
 824                 break;
 825         }
 826
 827 update_itr_done:
 828         return retval;
 829 }
 830
 831 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 832 {
 833         struct ixgbe_adapter *adapter = q_vector->adapter;
 834         struct ixgbe_hw *hw = &adapter->hw;
 835         u32 new_itr;
 836         u8 current_itr, ret_itr;
 837         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 838                               sizeof(struct ixgbe_q_vector);
 839         struct ixgbe_ring *rx_ring, *tx_ring;
 840
 841         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 842         for (i = 0; i < q_vector->txr_count; i++) {
 843                 tx_ring = &(adapter->tx_ring[r_idx]);
 844                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 845                                            q_vector->tx_eitr,
 846                                            tx_ring->total_packets,
 847                                            tx_ring->total_bytes);
 848                 /* if the result for this queue would decrease interrupt
 849                  * rate for this vector then use that result */
 850                 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
 851                                     q_vector->tx_eitr - 1 : ret_itr);
 852                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 853                                       r_idx + 1);
 854         }
 855
 856         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 857         for (i = 0; i < q_vector->rxr_count; i++) {
 858                 rx_ring = &(adapter->rx_ring[r_idx]);
 859                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 860                                            q_vector->rx_eitr,
 861                                            rx_ring->total_packets,
 862                                            rx_ring->total_bytes);
 863                 /* if the result for this queue would decrease interrupt
 864                  * rate for this vector then use that result */
 865                 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
 866                                     q_vector->rx_eitr - 1 : ret_itr);
 867                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 868                                       r_idx + 1);
 869         }
 870
 871         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
 872
 873         switch (current_itr) {
 874         /* counts and packets in update_itr are dependent on these numbers */
 875         case lowest_latency:
 876                 new_itr = 100000;
 877                 break;
 878         case low_latency:
 879                 new_itr = 20000; /* aka hwitr = ~200 */
 880                 break;
 881         case bulk_latency:
 882         default:
 883                 new_itr = 8000;
 884                 break;
 885         }
 886
 887         if (new_itr != q_vector->eitr) {
 888                 u32 itr_reg;
 889                 /* do an exponential smoothing */
 890                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 891                 q_vector->eitr = new_itr;
 892                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 893                 /* must write high and low 16 bits to reset counter */
 894                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 895                         itr_reg);
 896                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 897         }
 898
 899         return;
 900 }
 901
 902 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 903 {
 904         struct net_device *netdev = data;
 905         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 906         struct ixgbe_hw *hw = &adapter->hw;
 907         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 908
 909         if (eicr & IXGBE_EICR_LSC) {
 910                 adapter->lsc_int++;
 911                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
 912                         mod_timer(&adapter->watchdog_timer, jiffies);
 913         }
 914
 915         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 916                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 917
 918         return IRQ_HANDLED;
 919 }
 920
 921 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 922 {
 923         struct ixgbe_q_vector *q_vector = data;
 924         struct ixgbe_adapter  *adapter = q_vector->adapter;
 925         struct ixgbe_ring     *tx_ring;
 926         int i, r_idx;
 927
 928         if (!q_vector->txr_count)
 929                 return IRQ_HANDLED;
 930
 931         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 932         for (i = 0; i < q_vector->txr_count; i++) {
 933                 tx_ring = &(adapter->tx_ring[r_idx]);
 934 #ifdef CONFIG_DCA
 935                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 936                         ixgbe_update_tx_dca(adapter, tx_ring);
 937 #endif
 938                 tx_ring->total_bytes = 0;
 939                 tx_ring->total_packets = 0;
 940                 ixgbe_clean_tx_irq(adapter, tx_ring);
 941                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 942                                       r_idx + 1);
 943         }
 944
 945         return IRQ_HANDLED;
 946 }
 947
 948 /**
 949  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 950  * @irq: unused
 951  * @data: pointer to our q_vector struct for this interrupt vector
 952  **/
 953 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 954 {
 955         struct ixgbe_q_vector *q_vector = data;
 956         struct ixgbe_adapter  *adapter = q_vector->adapter;
 957         struct ixgbe_ring  *rx_ring;
 958         int r_idx;
 959
 960         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 961         if (!q_vector->rxr_count)
 962                 return IRQ_HANDLED;
 963
 964         rx_ring = &(adapter->rx_ring[r_idx]);
 965         /* disable interrupts on this vector only */
 966         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
 967         rx_ring->total_bytes = 0;
 968         rx_ring->total_packets = 0;
 969         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 970
 971         return IRQ_HANDLED;
 972 }
 973
 974 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 975 {
 976         ixgbe_msix_clean_rx(irq, data);
 977         ixgbe_msix_clean_tx(irq, data);
 978
 979         return IRQ_HANDLED;
 980 }
 981
 982 /**
 983  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
 984  * @napi: napi struct with our devices info in it
 985  * @budget: amount of work driver is allowed to do this pass, in packets
 986  *
 987  **/
 988 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
 989 {
 990         struct ixgbe_q_vector *q_vector =
 991                                container_of(napi, struct ixgbe_q_vector, napi);
 992         struct ixgbe_adapter *adapter = q_vector->adapter;
 993         struct ixgbe_ring *rx_ring;
 994         int work_done = 0;
 995         long r_idx;
 996
 997         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 998         rx_ring = &(adapter->rx_ring[r_idx]);
 999 #ifdef CONFIG_DCA
1000         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1001                 ixgbe_update_rx_dca(adapter, rx_ring);
1002 #endif
1003
1004         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1005
1006         /* If all Rx work done, exit the polling mode */
1007         if (work_done < budget) {
1008                 netif_rx_complete(adapter->netdev, napi);
1009                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
1010                         ixgbe_set_itr_msix(q_vector);
1011                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1012                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1013         }
1014
1015         return work_done;
1016 }
1017
1018 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1019                                      int r_idx)
1020 {
1021         a->q_vector[v_idx].adapter = a;
1022         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1023         a->q_vector[v_idx].rxr_count++;
1024         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1025 }
1026
1027 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1028                                      int r_idx)
1029 {
1030         a->q_vector[v_idx].adapter = a;
1031         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1032         a->q_vector[v_idx].txr_count++;
1033         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1034 }
1035
1036 /**
1037  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1038  * @adapter: board private structure to initialize
1039  * @vectors: allotted vector count for descriptor rings
1040  *
1041  * This function maps descriptor rings to the queue-specific vectors
1042  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1043  * one vector per ring/queue, but on a constrained vector budget, we
1044  * group the rings as "efficiently" as possible.  You would add new
1045  * mapping configurations in here.
1046  **/
1047 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1048                                       int vectors)
1049 {
1050         int v_start = 0;
1051         int rxr_idx = 0, txr_idx = 0;
1052         int rxr_remaining = adapter->num_rx_queues;
1053         int txr_remaining = adapter->num_tx_queues;
1054         int i, j;
1055         int rqpv, tqpv;
1056         int err = 0;
1057
1058         /* No mapping required if MSI-X is disabled. */
1059         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1060                 goto out;
1061
1062         /*
1063          * The ideal configuration...
1064          * We have enough vectors to map one per queue.
1065          */
1066         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1067                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1068                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1069
1070                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1071                         map_vector_to_txq(adapter, v_start, txr_idx);
1072
1073                 goto out;
1074         }
1075
1076         /*
1077          * If we don't have enough vectors for a 1-to-1
1078          * mapping, we'll have to group them so there are
1079          * multiple queues per vector.
1080          */
1081         /* Re-adjusting *qpv takes care of the remainder. */
1082         for (i = v_start; i < vectors; i++) {
1083                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1084                 for (j = 0; j < rqpv; j++) {
1085                         map_vector_to_rxq(adapter, i, rxr_idx);
1086                         rxr_idx++;
1087                         rxr_remaining--;
1088                 }
1089         }
1090         for (i = v_start; i < vectors; i++) {
1091                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1092                 for (j = 0; j < tqpv; j++) {
1093                         map_vector_to_txq(adapter, i, txr_idx);
1094                         txr_idx++;
1095                         txr_remaining--;
1096                 }
1097         }
1098
1099 out:
1100         return err;
1101 }
1102
1103 /**
1104  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1105  * @adapter: board private structure
1106  *
1107  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1108  * interrupts from the kernel.
1109  **/
1110 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1111 {
1112         struct net_device *netdev = adapter->netdev;
1113         irqreturn_t (*handler)(int, void *);
1114         int i, vector, q_vectors, err;
1115
1116         /* Decrement for Other and TCP Timer vectors */
1117         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1118
1119         /* Map the Tx/Rx rings to the vectors we were allotted. */
1120         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1121         if (err)
1122                 goto out;
1123
1124 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1125                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1126                          &ixgbe_msix_clean_many)
1127         for (vector = 0; vector < q_vectors; vector++) {
1128                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1129                 sprintf(adapter->name[vector], "%s:v%d-%s",
1130                         netdev->name, vector,
1131                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1132                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1133                 err = request_irq(adapter->msix_entries[vector].vector,
1134                                   handler, 0, adapter->name[vector],
1135                                   &(adapter->q_vector[vector]));
1136                 if (err) {
1137                         DPRINTK(PROBE, ERR,
1138                                 "request_irq failed for MSIX interrupt "
1139                                 "Error: %d\n", err);
1140                         goto free_queue_irqs;
1141                 }
1142         }
1143
1144         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1145         err = request_irq(adapter->msix_entries[vector].vector,
1146                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1147         if (err) {
1148                 DPRINTK(PROBE, ERR,
1149                         "request_irq for msix_lsc failed: %d\n", err);
1150                 goto free_queue_irqs;
1151         }
1152
1153         return 0;
1154
1155 free_queue_irqs:
1156         for (i = vector - 1; i >= 0; i--)
1157                 free_irq(adapter->msix_entries[--vector].vector,
1158                          &(adapter->q_vector[i]));
1159         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1160         pci_disable_msix(adapter->pdev);
1161         kfree(adapter->msix_entries);
1162         adapter->msix_entries = NULL;
1163 out:
1164         return err;
1165 }
1166
1167 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1168 {
1169         struct ixgbe_hw *hw = &adapter->hw;
1170         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1171         u8 current_itr;
1172         u32 new_itr = q_vector->eitr;
1173         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1174         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1175
1176         q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1177                                              q_vector->tx_eitr,
1178                                              tx_ring->total_packets,
1179                                              tx_ring->total_bytes);
1180         q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1181                                              q_vector->rx_eitr,
1182                                              rx_ring->total_packets,
1183                                              rx_ring->total_bytes);
1184
1185         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1186
1187         switch (current_itr) {
1188         /* counts and packets in update_itr are dependent on these numbers */
1189         case lowest_latency:
1190                 new_itr = 100000;
1191                 break;
1192         case low_latency:
1193                 new_itr = 20000; /* aka hwitr = ~200 */
1194                 break;
1195         case bulk_latency:
1196                 new_itr = 8000;
1197                 break;
1198         default:
1199                 break;
1200         }
1201
1202         if (new_itr != q_vector->eitr) {
1203                 u32 itr_reg;
1204                 /* do an exponential smoothing */
1205                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1206                 q_vector->eitr = new_itr;
1207                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1208                 /* must write high and low 16 bits to reset counter */
1209                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1210         }
1211
1212         return;
1213 }
1214
1215 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1216
1217 /**
1218  * ixgbe_intr - legacy mode Interrupt Handler
1219  * @irq: interrupt number
1220  * @data: pointer to a network interface device structure
1221  * @pt_regs: CPU registers structure
1222  **/
1223 static irqreturn_t ixgbe_intr(int irq, void *data)
1224 {
1225         struct net_device *netdev = data;
1226         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1227         struct ixgbe_hw *hw = &adapter->hw;
1228         u32 eicr;
1229
1230
1231         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1232          * therefore no explict interrupt disable is necessary */
1233         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1234         if (!eicr)
1235                 return IRQ_NONE;        /* Not our interrupt */
1236
1237         if (eicr & IXGBE_EICR_LSC) {
1238                 adapter->lsc_int++;
1239                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1240                         mod_timer(&adapter->watchdog_timer, jiffies);
1241         }
1242
1243
1244         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1245                 adapter->tx_ring[0].total_packets = 0;
1246                 adapter->tx_ring[0].total_bytes = 0;
1247                 adapter->rx_ring[0].total_packets = 0;
1248                 adapter->rx_ring[0].total_bytes = 0;
1249                 /* would disable interrupts here but EIAM disabled it */
1250                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1251         }
1252
1253         return IRQ_HANDLED;
1254 }
1255
1256 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1257 {
1258         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1259
1260         for (i = 0; i < q_vectors; i++) {
1261                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1262                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1263                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1264                 q_vector->rxr_count = 0;
1265                 q_vector->txr_count = 0;
1266         }
1267 }
1268
1269 /**
1270  * ixgbe_request_irq - initialize interrupts
1271  * @adapter: board private structure
1272  *
1273  * Attempts to configure interrupts using the best available
1274  * capabilities of the hardware and kernel.
1275  **/
1276 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1277 {
1278         struct net_device *netdev = adapter->netdev;
1279         int err;
1280
1281         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1282                 err = ixgbe_request_msix_irqs(adapter);
1283         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1284                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1285                                   netdev->name, netdev);
1286         } else {
1287                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1288                                   netdev->name, netdev);
1289         }
1290
1291         if (err)
1292                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1293
1294         return err;
1295 }
1296
1297 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1298 {
1299         struct net_device *netdev = adapter->netdev;
1300
1301         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1302                 int i, q_vectors;
1303
1304                 q_vectors = adapter->num_msix_vectors;
1305
1306                 i = q_vectors - 1;
1307                 free_irq(adapter->msix_entries[i].vector, netdev);
1308
1309                 i--;
1310                 for (; i >= 0; i--) {
1311                         free_irq(adapter->msix_entries[i].vector,
1312                                  &(adapter->q_vector[i]));
1313                 }
1314
1315                 ixgbe_reset_q_vectors(adapter);
1316         } else {
1317                 free_irq(adapter->pdev->irq, netdev);
1318         }
1319 }
1320
1321 /**
1322  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1323  * @adapter: board private structure
1324  **/
1325 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1326 {
1327         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1328         IXGBE_WRITE_FLUSH(&adapter->hw);
1329         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1330                 int i;
1331                 for (i = 0; i < adapter->num_msix_vectors; i++)
1332                         synchronize_irq(adapter->msix_entries[i].vector);
1333         } else {
1334                 synchronize_irq(adapter->pdev->irq);
1335         }
1336 }
1337
1338 /**
1339  * ixgbe_irq_enable - Enable default interrupt generation settings
1340  * @adapter: board private structure
1341  **/
1342 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1343 {
1344         u32 mask;
1345         mask = IXGBE_EIMS_ENABLE_MASK;
1346         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1347         IXGBE_WRITE_FLUSH(&adapter->hw);
1348 }
1349
1350 /**
1351  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1352  *
1353  **/
1354 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1355 {
1356         struct ixgbe_hw *hw = &adapter->hw;
1357
1358         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1359                         EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1360
1361         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1362         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1363
1364         map_vector_to_rxq(adapter, 0, 0);
1365         map_vector_to_txq(adapter, 0, 0);
1366
1367         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1368 }
1369
1370 /**
1371  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1372  * @adapter: board private structure
1373  *
1374  * Configure the Tx unit of the MAC after a reset.
1375  **/
1376 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1377 {
1378         u64 tdba, tdwba;
1379         struct ixgbe_hw *hw = &adapter->hw;
1380         u32 i, j, tdlen, txctrl;
1381
1382         /* Setup the HW Tx Head and Tail descriptor pointers */
1383         for (i = 0; i < adapter->num_tx_queues; i++) {
1384                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1385                 j = ring->reg_idx;
1386                 tdba = ring->dma;
1387                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1388                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1389                                 (tdba & DMA_32BIT_MASK));
1390                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1391                 tdwba = ring->dma +
1392                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1393                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1394                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1395                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1396                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1397                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1398                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1399                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1400                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1401                 /* Disable Tx Head Writeback RO bit, since this hoses
1402                  * bookkeeping if things aren't delivered in order.
1403                  */
1404                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1405                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1406                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1407         }
1408 }
1409
1410 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1411                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1412
1413 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT                 2
1414 /**
1415  * ixgbe_get_skb_hdr - helper function for LRO header processing
1416  * @skb: pointer to sk_buff to be added to LRO packet
1417  * @iphdr: pointer to tcp header structure
1418  * @tcph: pointer to tcp header structure
1419  * @hdr_flags: pointer to header flags
1420  * @priv: private data
1421  **/
1422 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1423                              u64 *hdr_flags, void *priv)
1424 {
1425         union ixgbe_adv_rx_desc *rx_desc = priv;
1426
1427         /* Verify that this is a valid IPv4 TCP packet */
1428         if (!(ixgbe_get_pkt_info(rx_desc) &
1429             (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP)))
1430                 return -1;
1431
1432         /* Set network headers */
1433         skb_reset_network_header(skb);
1434         skb_set_transport_header(skb, ip_hdrlen(skb));
1435         *iphdr = ip_hdr(skb);
1436         *tcph = tcp_hdr(skb);
1437         *hdr_flags = LRO_IPV4 | LRO_TCP;
1438         return 0;
1439 }
1440
1441 /**
1442  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1443  * @adapter: board private structure
1444  *
1445  * Configure the Rx unit of the MAC after a reset.
1446  **/
1447 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1448 {
1449         u64 rdba;
1450         struct ixgbe_hw *hw = &adapter->hw;
1451         struct net_device *netdev = adapter->netdev;
1452         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1453         int i, j;
1454         u32 rdlen, rxctrl, rxcsum;
1455         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1456                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1457                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1458         u32 fctrl, hlreg0;
1459         u32 pages;
1460         u32 reta = 0, mrqc, srrctl;
1461         int rx_buf_len;
1462
1463         /* Decide whether to use packet split mode or not */
1464         if (netdev->mtu > ETH_DATA_LEN)
1465                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1466         else
1467                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1468
1469         /* Set the RX buffer length according to the mode */
1470         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1471                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1472         } else {
1473                 if (netdev->mtu <= ETH_DATA_LEN)
1474                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1475                 else
1476                         rx_buf_len = ALIGN(max_frame, 1024);
1477         }
1478
1479         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1480         fctrl |= IXGBE_FCTRL_BAM;
1481         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1482         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1483
1484         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1485         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1486                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1487         else
1488                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1489         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1490
1491         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1492
1493         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1494         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1495         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1496
1497         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1498                 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1499                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1500                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1501                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1502                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1503         } else {
1504                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1505
1506                 if (rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1507                         srrctl |=
1508                              IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1509                 else
1510                         srrctl |= rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1511         }
1512         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1513
1514         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1515         /* disable receives while setting up the descriptors */
1516         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1517         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1518
1519         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1520          * the Base and Length of the Rx Descriptor Ring */
1521         for (i = 0; i < adapter->num_rx_queues; i++) {
1522                 rdba = adapter->rx_ring[i].dma;
1523                 j = adapter->rx_ring[i].reg_idx;
1524                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1525                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1526                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1527                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1528                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1529                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1530                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1531                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1532         }
1533
1534         /* Intitial LRO Settings */
1535         adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1536         adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1537         adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1538         adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1539         if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1540                 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1541         adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1542         adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1543         adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1544
1545         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1546                 /* Fill out redirection table */
1547                 for (i = 0, j = 0; i < 128; i++, j++) {
1548                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1549                                 j = 0;
1550                         /* reta = 4-byte sliding window of
1551                          * 0x00..(indices-1)(indices-1)00..etc. */
1552                         reta = (reta << 8) | (j * 0x11);
1553                         if ((i & 3) == 3)
1554                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1555                 }
1556
1557                 /* Fill out hash function seeds */
1558                 for (i = 0; i < 10; i++)
1559                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1560
1561                 mrqc = IXGBE_MRQC_RSSEN
1562                     /* Perform hash on these packet types */
1563                        | IXGBE_MRQC_RSS_FIELD_IPV4
1564                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1565                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1566                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1567                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1568                        | IXGBE_MRQC_RSS_FIELD_IPV6
1569                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1570                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1571                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1572                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1573         }
1574
1575         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1576
1577         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1578             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1579                 /* Disable indicating checksum in descriptor, enables
1580                  * RSS hash */
1581                 rxcsum |= IXGBE_RXCSUM_PCSD;
1582         }
1583         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1584                 /* Enable IPv4 payload checksum for UDP fragments
1585                  * if PCSD is not set */
1586                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1587         }
1588
1589         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1590 }
1591
1592 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1593                                    struct vlan_group *grp)
1594 {
1595         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1596         u32 ctrl;
1597
1598         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1599                 ixgbe_irq_disable(adapter);
1600         adapter->vlgrp = grp;
1601
1602         if (grp) {
1603                 /* enable VLAN tag insert/strip */
1604                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1605                 ctrl |= IXGBE_VLNCTRL_VME;
1606                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1607                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1608         }
1609
1610         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1611                 ixgbe_irq_enable(adapter);
1612 }
1613
1614 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1615 {
1616         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1617
1618         /* add VID to filter table */
1619         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1620 }
1621
1622 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1623 {
1624         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1625
1626         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1627                 ixgbe_irq_disable(adapter);
1628
1629         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1630
1631         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1632                 ixgbe_irq_enable(adapter);
1633
1634         /* remove VID from filter table */
1635         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1636 }
1637
1638 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1639 {
1640         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1641
1642         if (adapter->vlgrp) {
1643                 u16 vid;
1644                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1645                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1646                                 continue;
1647                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1648                 }
1649         }
1650 }
1651
1652 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1653 {
1654         struct dev_mc_list *mc_ptr;
1655         u8 *addr = *mc_addr_ptr;
1656         *vmdq = 0;
1657
1658         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1659         if (mc_ptr->next)
1660                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1661         else
1662                 *mc_addr_ptr = NULL;
1663
1664         return addr;
1665 }
1666
1667 /**
1668  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1669  * @netdev: network interface device structure
1670  *
1671  * The set_rx_method entry point is called whenever the unicast/multicast
1672  * address list or the network interface flags are updated.  This routine is
1673  * responsible for configuring the hardware for proper unicast, multicast and
1674  * promiscuous mode.
1675  **/
1676 static void ixgbe_set_rx_mode(struct net_device *netdev)
1677 {
1678         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1679         struct ixgbe_hw *hw = &adapter->hw;
1680         u32 fctrl, vlnctrl;
1681         u8 *addr_list = NULL;
1682         int addr_count = 0;
1683
1684         /* Check for Promiscuous and All Multicast modes */
1685
1686         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1687         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1688
1689         if (netdev->flags & IFF_PROMISC) {
1690                 hw->addr_ctrl.user_set_promisc = 1;
1691                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1692                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1693         } else {
1694                 if (netdev->flags & IFF_ALLMULTI) {
1695                         fctrl |= IXGBE_FCTRL_MPE;
1696                         fctrl &= ~IXGBE_FCTRL_UPE;
1697                 } else {
1698                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1699                 }
1700                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1701                 hw->addr_ctrl.user_set_promisc = 0;
1702         }
1703
1704         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1705         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1706
1707         /* reprogram secondary unicast list */
1708         addr_count = netdev->uc_count;
1709         if (addr_count)
1710                 addr_list = netdev->uc_list->dmi_addr;
1711         ixgbe_update_uc_addr_list(hw, addr_list, addr_count,
1712                                   ixgbe_addr_list_itr);
1713
1714         /* reprogram multicast list */
1715         addr_count = netdev->mc_count;
1716         if (addr_count)
1717                 addr_list = netdev->mc_list->dmi_addr;
1718         ixgbe_update_mc_addr_list(hw, addr_list, addr_count,
1719                                   ixgbe_addr_list_itr);
1720 }
1721
1722 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1723 {
1724         int q_idx;
1725         struct ixgbe_q_vector *q_vector;
1726         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1727
1728         /* legacy and MSI only use one vector */
1729         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1730                 q_vectors = 1;
1731
1732         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1733                 q_vector = &adapter->q_vector[q_idx];
1734                 if (!q_vector->rxr_count)
1735                         continue;
1736                 napi_enable(&q_vector->napi);
1737         }
1738 }
1739
1740 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1741 {
1742         int q_idx;
1743         struct ixgbe_q_vector *q_vector;
1744         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1745
1746         /* legacy and MSI only use one vector */
1747         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1748                 q_vectors = 1;
1749
1750         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1751                 q_vector = &adapter->q_vector[q_idx];
1752                 if (!q_vector->rxr_count)
1753                         continue;
1754                 napi_disable(&q_vector->napi);
1755         }
1756 }
1757
1758 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1759 {
1760         struct net_device *netdev = adapter->netdev;
1761         int i;
1762
1763         ixgbe_set_rx_mode(netdev);
1764
1765         ixgbe_restore_vlan(adapter);
1766
1767         ixgbe_configure_tx(adapter);
1768         ixgbe_configure_rx(adapter);
1769         for (i = 0; i < adapter->num_rx_queues; i++)
1770                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1771                                            (adapter->rx_ring[i].count - 1));
1772 }
1773
1774 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1775 {
1776         struct net_device *netdev = adapter->netdev;
1777         struct ixgbe_hw *hw = &adapter->hw;
1778         int i, j = 0;
1779         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1780         u32 txdctl, rxdctl, mhadd;
1781         u32 gpie;
1782
1783         ixgbe_get_hw_control(adapter);
1784
1785         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1786             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1787                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1788                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1789                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1790                 } else {
1791                         /* MSI only */
1792                         gpie = 0;
1793                 }
1794                 /* XXX: to interrupt immediately for EICS writes, enable this */
1795                 /* gpie |= IXGBE_GPIE_EIMEN; */
1796                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1797         }
1798
1799         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1800                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1801                  * specifically only auto mask tx and rx interrupts */
1802                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1803         }
1804
1805         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1806         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1807                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1808                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1809
1810                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1811         }
1812
1813         for (i = 0; i < adapter->num_tx_queues; i++) {
1814                 j = adapter->tx_ring[i].reg_idx;
1815                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1816                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1817                 txdctl |= (8 << 16);
1818                 txdctl |= IXGBE_TXDCTL_ENABLE;
1819                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1820         }
1821
1822         for (i = 0; i < adapter->num_rx_queues; i++) {
1823                 j = adapter->rx_ring[i].reg_idx;
1824                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1825                 /* enable PTHRESH=32 descriptors (half the internal cache)
1826                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1827                  * this also removes a pesky rx_no_buffer_count increment */
1828                 rxdctl |= 0x0020;
1829                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1830                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1831         }
1832         /* enable all receives */
1833         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1834         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1835         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1836
1837         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1838                 ixgbe_configure_msix(adapter);
1839         else
1840                 ixgbe_configure_msi_and_legacy(adapter);
1841
1842         clear_bit(__IXGBE_DOWN, &adapter->state);
1843         ixgbe_napi_enable_all(adapter);
1844
1845         /* clear any pending interrupts, may auto mask */
1846         IXGBE_READ_REG(hw, IXGBE_EICR);
1847
1848         ixgbe_irq_enable(adapter);
1849
1850         /* bring the link up in the watchdog, this could race with our first
1851          * link up interrupt but shouldn't be a problem */
1852         mod_timer(&adapter->watchdog_timer, jiffies);
1853         return 0;
1854 }
1855
1856 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1857 {
1858         WARN_ON(in_interrupt());
1859         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1860                 msleep(1);
1861         ixgbe_down(adapter);
1862         ixgbe_up(adapter);
1863         clear_bit(__IXGBE_RESETTING, &adapter->state);
1864 }
1865
1866 int ixgbe_up(struct ixgbe_adapter *adapter)
1867 {
1868         /* hardware has been reset, we need to reload some things */
1869         ixgbe_configure(adapter);
1870
1871         return ixgbe_up_complete(adapter);
1872 }
1873
1874 void ixgbe_reset(struct ixgbe_adapter *adapter)
1875 {
1876         if (ixgbe_init_hw(&adapter->hw))
1877                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1878
1879         /* reprogram the RAR[0] in case user changed it. */
1880         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1881
1882 }
1883
1884 #ifdef CONFIG_PM
1885 static int ixgbe_resume(struct pci_dev *pdev)
1886 {
1887         struct net_device *netdev = pci_get_drvdata(pdev);
1888         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1889         u32 err;
1890
1891         pci_set_power_state(pdev, PCI_D0);
1892         pci_restore_state(pdev);
1893         err = pci_enable_device(pdev);
1894         if (err) {
1895                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1896                                 "suspend\n");
1897                 return err;
1898         }
1899         pci_set_master(pdev);
1900
1901         pci_enable_wake(pdev, PCI_D3hot, 0);
1902         pci_enable_wake(pdev, PCI_D3cold, 0);
1903
1904         if (netif_running(netdev)) {
1905                 err = ixgbe_request_irq(adapter);
1906                 if (err)
1907                         return err;
1908         }
1909
1910         ixgbe_reset(adapter);
1911
1912         if (netif_running(netdev))
1913                 ixgbe_up(adapter);
1914
1915         netif_device_attach(netdev);
1916
1917         return 0;
1918 }
1919 #endif
1920
1921 /**
1922  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1923  * @adapter: board private structure
1924  * @rx_ring: ring to free buffers from
1925  **/
1926 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1927                                 struct ixgbe_ring *rx_ring)
1928 {
1929         struct pci_dev *pdev = adapter->pdev;
1930         unsigned long size;
1931         unsigned int i;
1932
1933         /* Free all the Rx ring sk_buffs */
1934
1935         for (i = 0; i < rx_ring->count; i++) {
1936                 struct ixgbe_rx_buffer *rx_buffer_info;
1937
1938                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1939                 if (rx_buffer_info->dma) {
1940                         pci_unmap_single(pdev, rx_buffer_info->dma,
1941                                          rx_ring->rx_buf_len,
1942                                          PCI_DMA_FROMDEVICE);
1943                         rx_buffer_info->dma = 0;
1944                 }
1945                 if (rx_buffer_info->skb) {
1946                         dev_kfree_skb(rx_buffer_info->skb);
1947                         rx_buffer_info->skb = NULL;
1948                 }
1949                 if (!rx_buffer_info->page)
1950                         continue;
1951                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1952                                PCI_DMA_FROMDEVICE);
1953                 rx_buffer_info->page_dma = 0;
1954
1955                 put_page(rx_buffer_info->page);
1956                 rx_buffer_info->page = NULL;
1957         }
1958
1959         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1960         memset(rx_ring->rx_buffer_info, 0, size);
1961
1962         /* Zero out the descriptor ring */
1963         memset(rx_ring->desc, 0, rx_ring->size);
1964
1965         rx_ring->next_to_clean = 0;
1966         rx_ring->next_to_use = 0;
1967
1968         writel(0, adapter->hw.hw_addr + rx_ring->head);
1969         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1970 }
1971
1972 /**
1973  * ixgbe_clean_tx_ring - Free Tx Buffers
1974  * @adapter: board private structure
1975  * @tx_ring: ring to be cleaned
1976  **/
1977 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1978                                 struct ixgbe_ring *tx_ring)
1979 {
1980         struct ixgbe_tx_buffer *tx_buffer_info;
1981         unsigned long size;
1982         unsigned int i;
1983
1984         /* Free all the Tx ring sk_buffs */
1985
1986         for (i = 0; i < tx_ring->count; i++) {
1987                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1988                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1989         }
1990
1991         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1992         memset(tx_ring->tx_buffer_info, 0, size);
1993
1994         /* Zero out the descriptor ring */
1995         memset(tx_ring->desc, 0, tx_ring->size);
1996
1997         tx_ring->next_to_use = 0;
1998         tx_ring->next_to_clean = 0;
1999
2000         writel(0, adapter->hw.hw_addr + tx_ring->head);
2001         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2002 }
2003
2004 /**
2005  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2006  * @adapter: board private structure
2007  **/
2008 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2009 {
2010         int i;
2011
2012         for (i = 0; i < adapter->num_rx_queues; i++)
2013                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2014 }
2015
2016 /**
2017  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2018  * @adapter: board private structure
2019  **/
2020 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2021 {
2022         int i;
2023
2024         for (i = 0; i < adapter->num_tx_queues; i++)
2025                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2026 }
2027
2028 void ixgbe_down(struct ixgbe_adapter *adapter)
2029 {
2030         struct net_device *netdev = adapter->netdev;
2031         u32 rxctrl;
2032
2033         /* signal that we are down to the interrupt handler */
2034         set_bit(__IXGBE_DOWN, &adapter->state);
2035
2036         /* disable receives */
2037         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2038         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2039                         rxctrl & ~IXGBE_RXCTRL_RXEN);
2040
2041         netif_tx_disable(netdev);
2042
2043         /* disable transmits in the hardware */
2044
2045         /* flush both disables */
2046         IXGBE_WRITE_FLUSH(&adapter->hw);
2047         msleep(10);
2048
2049         ixgbe_irq_disable(adapter);
2050
2051         ixgbe_napi_disable_all(adapter);
2052         del_timer_sync(&adapter->watchdog_timer);
2053
2054         netif_carrier_off(netdev);
2055         netif_tx_stop_all_queues(netdev);
2056
2057         if (!pci_channel_offline(adapter->pdev))
2058                 ixgbe_reset(adapter);
2059         ixgbe_clean_all_tx_rings(adapter);
2060         ixgbe_clean_all_rx_rings(adapter);
2061
2062 }
2063
2064 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2065 {
2066         struct net_device *netdev = pci_get_drvdata(pdev);
2067         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2068 #ifdef CONFIG_PM
2069         int retval = 0;
2070 #endif
2071
2072         netif_device_detach(netdev);
2073
2074         if (netif_running(netdev)) {
2075                 ixgbe_down(adapter);
2076                 ixgbe_free_irq(adapter);
2077         }
2078
2079 #ifdef CONFIG_PM
2080         retval = pci_save_state(pdev);
2081         if (retval)
2082                 return retval;
2083 #endif
2084
2085         pci_enable_wake(pdev, PCI_D3hot, 0);
2086         pci_enable_wake(pdev, PCI_D3cold, 0);
2087
2088         ixgbe_release_hw_control(adapter);
2089
2090         pci_disable_device(pdev);
2091
2092         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2093
2094         return 0;
2095 }
2096
2097 static void ixgbe_shutdown(struct pci_dev *pdev)
2098 {
2099         ixgbe_suspend(pdev, PMSG_SUSPEND);
2100 }
2101
2102 /**
2103  * ixgbe_poll - NAPI Rx polling callback
2104  * @napi: structure for representing this polling device
2105  * @budget: how many packets driver is allowed to clean
2106  *
2107  * This function is used for legacy and MSI, NAPI mode
2108  **/
2109 static int ixgbe_poll(struct napi_struct *napi, int budget)
2110 {
2111         struct ixgbe_q_vector *q_vector = container_of(napi,
2112                                           struct ixgbe_q_vector, napi);
2113         struct ixgbe_adapter *adapter = q_vector->adapter;
2114         int tx_cleaned = 0, work_done = 0;
2115
2116 #ifdef CONFIG_DCA
2117         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2118                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2119                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2120         }
2121 #endif
2122
2123         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2124         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2125
2126         if (tx_cleaned)
2127                 work_done = budget;
2128
2129         /* If budget not fully consumed, exit the polling mode */
2130         if (work_done < budget) {
2131                 netif_rx_complete(adapter->netdev, napi);
2132                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2133                         ixgbe_set_itr(adapter);
2134                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2135                         ixgbe_irq_enable(adapter);
2136         }
2137
2138         return work_done;
2139 }
2140
2141 /**
2142  * ixgbe_tx_timeout - Respond to a Tx Hang
2143  * @netdev: network interface device structure
2144  **/
2145 static void ixgbe_tx_timeout(struct net_device *netdev)
2146 {
2147         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2148
2149         /* Do the reset outside of interrupt context */
2150         schedule_work(&adapter->reset_task);
2151 }
2152
2153 static void ixgbe_reset_task(struct work_struct *work)
2154 {
2155         struct ixgbe_adapter *adapter;
2156         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2157
2158         adapter->tx_timeout_count++;
2159
2160         ixgbe_reinit_locked(adapter);
2161 }
2162
2163 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2164                                        int vectors)
2165 {
2166         int err, vector_threshold;
2167
2168         /* We'll want at least 3 (vector_threshold):
2169          * 1) TxQ[0] Cleanup
2170          * 2) RxQ[0] Cleanup
2171          * 3) Other (Link Status Change, etc.)
2172          * 4) TCP Timer (optional)
2173          */
2174         vector_threshold = MIN_MSIX_COUNT;
2175
2176         /* The more we get, the more we will assign to Tx/Rx Cleanup
2177          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2178          * Right now, we simply care about how many we'll get; we'll
2179          * set them up later while requesting irq's.
2180          */
2181         while (vectors >= vector_threshold) {
2182                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2183                                       vectors);
2184                 if (!err) /* Success in acquiring all requested vectors. */
2185                         break;
2186                 else if (err < 0)
2187                         vectors = 0; /* Nasty failure, quit now */
2188                 else /* err == number of vectors we should try again with */
2189                         vectors = err;
2190         }
2191
2192         if (vectors < vector_threshold) {
2193                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2194                  * This just means we'll go with either a single MSI
2195                  * vector or fall back to legacy interrupts.
2196                  */
2197                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2198                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2199                 kfree(adapter->msix_entries);
2200                 adapter->msix_entries = NULL;
2201                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2202                 adapter->num_tx_queues = 1;
2203                 adapter->num_rx_queues = 1;
2204         } else {
2205                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2206                 adapter->num_msix_vectors = vectors;
2207         }
2208 }
2209
2210 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2211 {
2212         int nrq, ntq;
2213         int feature_mask = 0, rss_i, rss_m;
2214
2215         /* Number of supported queues */
2216         switch (adapter->hw.mac.type) {
2217         case ixgbe_mac_82598EB:
2218                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2219                 rss_m = 0;
2220                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2221
2222                 switch (adapter->flags & feature_mask) {
2223                 case (IXGBE_FLAG_RSS_ENABLED):
2224                         rss_m = 0xF;
2225                         nrq = rss_i;
2226                         ntq = rss_i;
2227                         break;
2228                 case 0:
2229                 default:
2230                         rss_i = 0;
2231                         rss_m = 0;
2232                         nrq = 1;
2233                         ntq = 1;
2234                         break;
2235                 }
2236
2237                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2238                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2239                 break;
2240         default:
2241                 nrq = 1;
2242                 ntq = 1;
2243                 break;
2244         }
2245
2246         adapter->num_rx_queues = nrq;
2247         adapter->num_tx_queues = ntq;
2248 }
2249
2250 /**
2251  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2252  * @adapter: board private structure to initialize
2253  *
2254  * Once we know the feature-set enabled for the device, we'll cache
2255  * the register offset the descriptor ring is assigned to.
2256  **/
2257 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2258 {
2259         /* TODO: Remove all uses of the indices in the cases where multiple
2260          *       features are OR'd together, if the feature set makes sense.
2261          */
2262         int feature_mask = 0, rss_i;
2263         int i, txr_idx, rxr_idx;
2264
2265         /* Number of supported queues */
2266         switch (adapter->hw.mac.type) {
2267         case ixgbe_mac_82598EB:
2268                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2269                 txr_idx = 0;
2270                 rxr_idx = 0;
2271                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2272                 switch (adapter->flags & feature_mask) {
2273                 case (IXGBE_FLAG_RSS_ENABLED):
2274                         for (i = 0; i < adapter->num_rx_queues; i++)
2275                                 adapter->rx_ring[i].reg_idx = i;
2276                         for (i = 0; i < adapter->num_tx_queues; i++)
2277                                 adapter->tx_ring[i].reg_idx = i;
2278                         break;
2279                 case 0:
2280                 default:
2281                         break;
2282                 }
2283                 break;
2284         default:
2285                 break;
2286         }
2287 }
2288
2289 /**
2290  * ixgbe_alloc_queues - Allocate memory for all rings
2291  * @adapter: board private structure to initialize
2292  *
2293  * We allocate one ring per queue at run-time since we don't know the
2294  * number of queues at compile-time.  The polling_netdev array is
2295  * intended for Multiqueue, but should work fine with a single queue.
2296  **/
2297 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2298 {
2299         int i;
2300
2301         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2302                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2303         if (!adapter->tx_ring)
2304                 goto err_tx_ring_allocation;
2305
2306         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2307                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2308         if (!adapter->rx_ring)
2309                 goto err_rx_ring_allocation;
2310
2311         for (i = 0; i < adapter->num_tx_queues; i++) {
2312                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2313                 adapter->tx_ring[i].queue_index = i;
2314         }
2315         for (i = 0; i < adapter->num_rx_queues; i++) {
2316                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2317                 adapter->rx_ring[i].queue_index = i;
2318         }
2319
2320         ixgbe_cache_ring_register(adapter);
2321
2322         return 0;
2323
2324 err_rx_ring_allocation:
2325         kfree(adapter->tx_ring);
2326 err_tx_ring_allocation:
2327         return -ENOMEM;
2328 }
2329
2330 /**
2331  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2332  * @adapter: board private structure to initialize
2333  *
2334  * Attempt to configure the interrupts using the best available
2335  * capabilities of the hardware and the kernel.
2336  **/
2337 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2338                                                     *adapter)
2339 {
2340         int err = 0;
2341         int vector, v_budget;
2342
2343         /*
2344          * It's easy to be greedy for MSI-X vectors, but it really
2345          * doesn't do us much good if we have a lot more vectors
2346          * than CPU's.  So let's be conservative and only ask for
2347          * (roughly) twice the number of vectors as there are CPU's.
2348          */
2349         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2350                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2351
2352         /*
2353          * At the same time, hardware can only support a maximum of
2354          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2355          * we can easily reach upwards of 64 Rx descriptor queues and
2356          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2357          * the cpu count also exceeds our vector limit.
2358          */
2359         v_budget = min(v_budget, MAX_MSIX_COUNT);
2360
2361         /* A failure in MSI-X entry allocation isn't fatal, but it does
2362          * mean we disable MSI-X capabilities of the adapter. */
2363         adapter->msix_entries = kcalloc(v_budget,
2364                                         sizeof(struct msix_entry), GFP_KERNEL);
2365         if (!adapter->msix_entries) {
2366                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2367                 ixgbe_set_num_queues(adapter);
2368                 kfree(adapter->tx_ring);
2369                 kfree(adapter->rx_ring);
2370                 err = ixgbe_alloc_queues(adapter);
2371                 if (err) {
2372                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2373                                             "for queues\n");
2374                         goto out;
2375                 }
2376
2377                 goto try_msi;
2378         }
2379
2380         for (vector = 0; vector < v_budget; vector++)
2381                 adapter->msix_entries[vector].entry = vector;
2382
2383         ixgbe_acquire_msix_vectors(adapter, v_budget);
2384
2385         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2386                 goto out;
2387
2388 try_msi:
2389         err = pci_enable_msi(adapter->pdev);
2390         if (!err) {
2391                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2392         } else {
2393                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2394                                    "falling back to legacy.  Error: %d\n", err);
2395                 /* reset err */
2396                 err = 0;
2397         }
2398
2399 out:
2400         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2401         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2402
2403         return err;
2404 }
2405
2406 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2407 {
2408         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2409                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2410                 pci_disable_msix(adapter->pdev);
2411                 kfree(adapter->msix_entries);
2412                 adapter->msix_entries = NULL;
2413         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2414                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2415                 pci_disable_msi(adapter->pdev);
2416         }
2417         return;
2418 }
2419
2420 /**
2421  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2422  * @adapter: board private structure to initialize
2423  *
2424  * We determine which interrupt scheme to use based on...
2425  * - Kernel support (MSI, MSI-X)
2426  *   - which can be user-defined (via MODULE_PARAM)
2427  * - Hardware queue count (num_*_queues)
2428  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2429  **/
2430 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2431 {
2432         int err;
2433
2434         /* Number of supported queues */
2435         ixgbe_set_num_queues(adapter);
2436
2437         err = ixgbe_alloc_queues(adapter);
2438         if (err) {
2439                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2440                 goto err_alloc_queues;
2441         }
2442
2443         err = ixgbe_set_interrupt_capability(adapter);
2444         if (err) {
2445                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2446                 goto err_set_interrupt;
2447         }
2448
2449         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2450                            "Tx Queue count = %u\n",
2451                 (adapter->num_rx_queues > 1) ? "Enabled" :
2452                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2453
2454         set_bit(__IXGBE_DOWN, &adapter->state);
2455
2456         return 0;
2457
2458 err_set_interrupt:
2459         kfree(adapter->tx_ring);
2460         kfree(adapter->rx_ring);
2461 err_alloc_queues:
2462         return err;
2463 }
2464
2465 /**
2466  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2467  * @adapter: board private structure to initialize
2468  *
2469  * ixgbe_sw_init initializes the Adapter private data structure.
2470  * Fields are initialized based on PCI device information and
2471  * OS network device settings (MTU size).
2472  **/
2473 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2474 {
2475         struct ixgbe_hw *hw = &adapter->hw;
2476         struct pci_dev *pdev = adapter->pdev;
2477         unsigned int rss;
2478
2479         /* Set capability flags */
2480         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2481         adapter->ring_feature[RING_F_RSS].indices = rss;
2482         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2483
2484         /* Enable Dynamic interrupt throttling by default */
2485         adapter->rx_eitr = 1;
2486         adapter->tx_eitr = 1;
2487
2488         /* default flow control settings */
2489         hw->fc.original_type = ixgbe_fc_none;
2490         hw->fc.type = ixgbe_fc_none;
2491         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2492         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2493         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2494         hw->fc.send_xon = true;
2495
2496         /* select 10G link by default */
2497         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2498         if (hw->mac.ops.reset(hw)) {
2499                 dev_err(&pdev->dev, "HW Init failed\n");
2500                 return -EIO;
2501         }
2502         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2503                                          false)) {
2504                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2505                 return -EIO;
2506         }
2507
2508         /* initialize eeprom parameters */
2509         if (ixgbe_init_eeprom(hw)) {
2510                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2511                 return -EIO;
2512         }
2513
2514         /* enable rx csum by default */
2515         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2516
2517         set_bit(__IXGBE_DOWN, &adapter->state);
2518
2519         return 0;
2520 }
2521
2522 /**
2523  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2524  * @adapter: board private structure
2525  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2526  *
2527  * Return 0 on success, negative on failure
2528  **/
2529 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2530                              struct ixgbe_ring *tx_ring)
2531 {
2532         struct pci_dev *pdev = adapter->pdev;
2533         int size;
2534
2535         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2536         tx_ring->tx_buffer_info = vmalloc(size);
2537         if (!tx_ring->tx_buffer_info)
2538                 goto err;
2539         memset(tx_ring->tx_buffer_info, 0, size);
2540
2541         /* round up to nearest 4K */
2542         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2543                         sizeof(u32);
2544         tx_ring->size = ALIGN(tx_ring->size, 4096);
2545
2546         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2547                                              &tx_ring->dma);
2548         if (!tx_ring->desc)
2549                 goto err;
2550
2551         tx_ring->next_to_use = 0;
2552         tx_ring->next_to_clean = 0;
2553         tx_ring->work_limit = tx_ring->count;
2554         return 0;
2555
2556 err:
2557         vfree(tx_ring->tx_buffer_info);
2558         tx_ring->tx_buffer_info = NULL;
2559         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2560                             "descriptor ring\n");
2561         return -ENOMEM;
2562 }
2563
2564 /**
2565  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2566  * @adapter: board private structure
2567  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2568  *
2569  * Returns 0 on success, negative on failure
2570  **/
2571 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2572                              struct ixgbe_ring *rx_ring)
2573 {
2574         struct pci_dev *pdev = adapter->pdev;
2575         int size;
2576
2577         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2578         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2579         if (!rx_ring->lro_mgr.lro_arr)
2580                 return -ENOMEM;
2581         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2582
2583         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2584         rx_ring->rx_buffer_info = vmalloc(size);
2585         if (!rx_ring->rx_buffer_info) {
2586                 DPRINTK(PROBE, ERR,
2587                         "vmalloc allocation failed for the rx desc ring\n");
2588                 goto alloc_failed;
2589         }
2590         memset(rx_ring->rx_buffer_info, 0, size);
2591
2592         /* Round up to nearest 4K */
2593         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2594         rx_ring->size = ALIGN(rx_ring->size, 4096);
2595
2596         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2597
2598         if (!rx_ring->desc) {
2599                 DPRINTK(PROBE, ERR,
2600                         "Memory allocation failed for the rx desc ring\n");
2601                 vfree(rx_ring->rx_buffer_info);
2602                 goto alloc_failed;
2603         }
2604
2605         rx_ring->next_to_clean = 0;
2606         rx_ring->next_to_use = 0;
2607
2608         return 0;
2609
2610 alloc_failed:
2611         vfree(rx_ring->lro_mgr.lro_arr);
2612         rx_ring->lro_mgr.lro_arr = NULL;
2613         return -ENOMEM;
2614 }
2615
2616 /**
2617  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2618  * @adapter: board private structure
2619  * @tx_ring: Tx descriptor ring for a specific queue
2620  *
2621  * Free all transmit software resources
2622  **/
2623 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2624                                     struct ixgbe_ring *tx_ring)
2625 {
2626         struct pci_dev *pdev = adapter->pdev;
2627
2628         ixgbe_clean_tx_ring(adapter, tx_ring);
2629
2630         vfree(tx_ring->tx_buffer_info);
2631         tx_ring->tx_buffer_info = NULL;
2632
2633         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2634
2635         tx_ring->desc = NULL;
2636 }
2637
2638 /**
2639  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2640  * @adapter: board private structure
2641  *
2642  * Free all transmit software resources
2643  **/
2644 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2645 {
2646         int i;
2647
2648         for (i = 0; i < adapter->num_tx_queues; i++)
2649                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2650 }
2651
2652 /**
2653  * ixgbe_free_rx_resources - Free Rx Resources
2654  * @adapter: board private structure
2655  * @rx_ring: ring to clean the resources from
2656  *
2657  * Free all receive software resources
2658  **/
2659 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2660                                     struct ixgbe_ring *rx_ring)
2661 {
2662         struct pci_dev *pdev = adapter->pdev;
2663
2664         vfree(rx_ring->lro_mgr.lro_arr);
2665         rx_ring->lro_mgr.lro_arr = NULL;
2666
2667         ixgbe_clean_rx_ring(adapter, rx_ring);
2668
2669         vfree(rx_ring->rx_buffer_info);
2670         rx_ring->rx_buffer_info = NULL;
2671
2672         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2673
2674         rx_ring->desc = NULL;
2675 }
2676
2677 /**
2678  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2679  * @adapter: board private structure
2680  *
2681  * Free all receive software resources
2682  **/
2683 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2684 {
2685         int i;
2686
2687         for (i = 0; i < adapter->num_rx_queues; i++)
2688                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2689 }
2690
2691 /**
2692  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2693  * @adapter: board private structure
2694  *
2695  * If this function returns with an error, then it's possible one or
2696  * more of the rings is populated (while the rest are not).  It is the
2697  * callers duty to clean those orphaned rings.
2698  *
2699  * Return 0 on success, negative on failure
2700  **/
2701 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2702 {
2703         int i, err = 0;
2704
2705         for (i = 0; i < adapter->num_tx_queues; i++) {
2706                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2707                 if (err) {
2708                         DPRINTK(PROBE, ERR,
2709                                 "Allocation for Tx Queue %u failed\n", i);
2710                         break;
2711                 }
2712         }
2713
2714         return err;
2715 }
2716
2717 /**
2718  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2719  * @adapter: board private structure
2720  *
2721  * If this function returns with an error, then it's possible one or
2722  * more of the rings is populated (while the rest are not).  It is the
2723  * callers duty to clean those orphaned rings.
2724  *
2725  * Return 0 on success, negative on failure
2726  **/
2727
2728 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2729 {
2730         int i, err = 0;
2731
2732         for (i = 0; i < adapter->num_rx_queues; i++) {
2733                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2734                 if (err) {
2735                         DPRINTK(PROBE, ERR,
2736                                 "Allocation for Rx Queue %u failed\n", i);
2737                         break;
2738                 }
2739         }
2740
2741         return err;
2742 }
2743
2744 /**
2745  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2746  * @netdev: network interface device structure
2747  * @new_mtu: new value for maximum frame size
2748  *
2749  * Returns 0 on success, negative on failure
2750  **/
2751 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2752 {
2753         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2754         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2755
2756         if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
2757             (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2758                 return -EINVAL;
2759
2760         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2761                 netdev->mtu, new_mtu);
2762         /* must set new MTU before calling down or up */
2763         netdev->mtu = new_mtu;
2764
2765         if (netif_running(netdev))
2766                 ixgbe_reinit_locked(adapter);
2767
2768         return 0;
2769 }
2770
2771 /**
2772  * ixgbe_open - Called when a network interface is made active
2773  * @netdev: network interface device structure
2774  *
2775  * Returns 0 on success, negative value on failure
2776  *
2777  * The open entry point is called when a network interface is made
2778  * active by the system (IFF_UP).  At this point all resources needed
2779  * for transmit and receive operations are allocated, the interrupt
2780  * handler is registered with the OS, the watchdog timer is started,
2781  * and the stack is notified that the interface is ready.
2782  **/
2783 static int ixgbe_open(struct net_device *netdev)
2784 {
2785         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2786         int err;
2787
2788         /* disallow open during test */
2789         if (test_bit(__IXGBE_TESTING, &adapter->state))
2790                 return -EBUSY;
2791
2792         /* allocate transmit descriptors */
2793         err = ixgbe_setup_all_tx_resources(adapter);
2794         if (err)
2795                 goto err_setup_tx;
2796
2797         /* allocate receive descriptors */
2798         err = ixgbe_setup_all_rx_resources(adapter);
2799         if (err)
2800                 goto err_setup_rx;
2801
2802         ixgbe_configure(adapter);
2803
2804         err = ixgbe_request_irq(adapter);
2805         if (err)
2806                 goto err_req_irq;
2807
2808         err = ixgbe_up_complete(adapter);
2809         if (err)
2810                 goto err_up;
2811
2812         netif_tx_start_all_queues(netdev);
2813
2814         return 0;
2815
2816 err_up:
2817         ixgbe_release_hw_control(adapter);
2818         ixgbe_free_irq(adapter);
2819 err_req_irq:
2820         ixgbe_free_all_rx_resources(adapter);
2821 err_setup_rx:
2822         ixgbe_free_all_tx_resources(adapter);
2823 err_setup_tx:
2824         ixgbe_reset(adapter);
2825
2826         return err;
2827 }
2828
2829 /**
2830  * ixgbe_close - Disables a network interface
2831  * @netdev: network interface device structure
2832  *
2833  * Returns 0, this is not allowed to fail
2834  *
2835  * The close entry point is called when an interface is de-activated
2836  * by the OS.  The hardware is still under the drivers control, but
2837  * needs to be disabled.  A global MAC reset is issued to stop the
2838  * hardware, and all transmit and receive resources are freed.
2839  **/
2840 static int ixgbe_close(struct net_device *netdev)
2841 {
2842         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2843
2844         ixgbe_down(adapter);
2845         ixgbe_free_irq(adapter);
2846
2847         ixgbe_free_all_tx_resources(adapter);
2848         ixgbe_free_all_rx_resources(adapter);
2849
2850         ixgbe_release_hw_control(adapter);
2851
2852         return 0;
2853 }
2854
2855 /**
2856  * ixgbe_update_stats - Update the board statistics counters.
2857  * @adapter: board private structure
2858  **/
2859 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2860 {
2861         struct ixgbe_hw *hw = &adapter->hw;
2862         u64 total_mpc = 0;
2863         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2864
2865         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2866         for (i = 0; i < 8; i++) {
2867                 /* for packet buffers not used, the register should read 0 */
2868                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2869                 missed_rx += mpc;
2870                 adapter->stats.mpc[i] += mpc;
2871                 total_mpc += adapter->stats.mpc[i];
2872                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2873         }
2874         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2875         /* work around hardware counting issue */
2876         adapter->stats.gprc -= missed_rx;
2877
2878         /* 82598 hardware only has a 32 bit counter in the high register */
2879         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2880         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2881         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2882         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2883         adapter->stats.bprc += bprc;
2884         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2885         adapter->stats.mprc -= bprc;
2886         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2887         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2888         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2889         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2890         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2891         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2892         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2893         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2894         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2895         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2896         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2897         adapter->stats.lxontxc += lxon;
2898         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2899         adapter->stats.lxofftxc += lxoff;
2900         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2901         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2902         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2903         /*
2904          * 82598 errata - tx of flow control packets is included in tx counters
2905          */
2906         xon_off_tot = lxon + lxoff;
2907         adapter->stats.gptc -= xon_off_tot;
2908         adapter->stats.mptc -= xon_off_tot;
2909         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2910         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2911         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2912         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2913         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2914         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2915         adapter->stats.ptc64 -= xon_off_tot;
2916         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2917         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2918         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2919         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2920         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2921         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2922
2923         /* Fill out the OS statistics structure */
2924         adapter->net_stats.multicast = adapter->stats.mprc;
2925
2926         /* Rx Errors */
2927         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2928                                                 adapter->stats.rlec;
2929         adapter->net_stats.rx_dropped = 0;
2930         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2931         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2932         adapter->net_stats.rx_missed_errors = total_mpc;
2933 }
2934
2935 /**
2936  * ixgbe_watchdog - Timer Call-back
2937  * @data: pointer to adapter cast into an unsigned long
2938  **/
2939 static void ixgbe_watchdog(unsigned long data)
2940 {
2941         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2942         struct net_device *netdev = adapter->netdev;
2943         bool link_up;
2944         u32 link_speed = 0;
2945
2946         adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2947
2948         if (link_up) {
2949                 if (!netif_carrier_ok(netdev)) {
2950                         u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2951                         u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2952 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2953 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2954                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2955                                 "Flow Control: %s\n",
2956                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2957                                  "10 Gbps" :
2958                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2959                                   "1 Gbps" : "unknown speed")),
2960                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2961                                  (FLOW_RX ? "RX" :
2962                                  (FLOW_TX ? "TX" : "None"))));
2963
2964                         netif_carrier_on(netdev);
2965                         netif_tx_wake_all_queues(netdev);
2966                 } else {
2967                         /* Force detection of hung controller */
2968                         adapter->detect_tx_hung = true;
2969                 }
2970         } else {
2971                 if (netif_carrier_ok(netdev)) {
2972                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
2973                         netif_carrier_off(netdev);
2974                         netif_tx_stop_all_queues(netdev);
2975                 }
2976         }
2977
2978         ixgbe_update_stats(adapter);
2979
2980         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2981                 /* Cause software interrupt to ensure rx rings are cleaned */
2982                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2983                         u32 eics =
2984                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
2985                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
2986                 } else {
2987                         /* for legacy and MSI interrupts don't set any bits that
2988                          * are enabled for EIAM, because this operation would
2989                          * set *both* EIMS and EICS for any bit in EIAM */
2990                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
2991                                      (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
2992                 }
2993                 /* Reset the timer */
2994                 mod_timer(&adapter->watchdog_timer,
2995                           round_jiffies(jiffies + 2 * HZ));
2996         }
2997 }
2998
2999 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3000                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3001                          u32 tx_flags, u8 *hdr_len)
3002 {
3003         struct ixgbe_adv_tx_context_desc *context_desc;
3004         unsigned int i;
3005         int err;
3006         struct ixgbe_tx_buffer *tx_buffer_info;
3007         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3008         u32 mss_l4len_idx = 0, l4len;
3009
3010         if (skb_is_gso(skb)) {
3011                 if (skb_header_cloned(skb)) {
3012                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3013                         if (err)
3014                                 return err;
3015                 }
3016                 l4len = tcp_hdrlen(skb);
3017                 *hdr_len += l4len;
3018
3019                 if (skb->protocol == htons(ETH_P_IP)) {
3020                         struct iphdr *iph = ip_hdr(skb);
3021                         iph->tot_len = 0;
3022                         iph->check = 0;
3023                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3024                                                                  iph->daddr, 0,
3025                                                                  IPPROTO_TCP,
3026                                                                  0);
3027                         adapter->hw_tso_ctxt++;
3028                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3029                         ipv6_hdr(skb)->payload_len = 0;
3030                         tcp_hdr(skb)->check =
3031                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3032                                              &ipv6_hdr(skb)->daddr,
3033                                              0, IPPROTO_TCP, 0);
3034                         adapter->hw_tso6_ctxt++;
3035                 }
3036
3037                 i = tx_ring->next_to_use;
3038
3039                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3040                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3041
3042                 /* VLAN MACLEN IPLEN */
3043                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3044                         vlan_macip_lens |=
3045                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3046                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3047                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3048                 *hdr_len += skb_network_offset(skb);
3049                 vlan_macip_lens |=
3050                     (skb_transport_header(skb) - skb_network_header(skb));
3051                 *hdr_len +=
3052                     (skb_transport_header(skb) - skb_network_header(skb));
3053                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3054                 context_desc->seqnum_seed = 0;
3055
3056                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3057                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3058                                     IXGBE_ADVTXD_DTYP_CTXT);
3059
3060                 if (skb->protocol == htons(ETH_P_IP))
3061                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3062                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3063                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3064
3065                 /* MSS L4LEN IDX */
3066                 mss_l4len_idx |=
3067                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3068                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3069                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3070
3071                 tx_buffer_info->time_stamp = jiffies;
3072                 tx_buffer_info->next_to_watch = i;
3073
3074                 i++;
3075                 if (i == tx_ring->count)
3076                         i = 0;
3077                 tx_ring->next_to_use = i;
3078
3079                 return true;
3080         }
3081         return false;
3082 }
3083
3084 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3085                                    struct ixgbe_ring *tx_ring,
3086                                    struct sk_buff *skb, u32 tx_flags)
3087 {
3088         struct ixgbe_adv_tx_context_desc *context_desc;
3089         unsigned int i;
3090         struct ixgbe_tx_buffer *tx_buffer_info;
3091         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3092
3093         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3094             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3095                 i = tx_ring->next_to_use;
3096                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3097                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3098
3099                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3100                         vlan_macip_lens |=
3101                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3102                 vlan_macip_lens |= (skb_network_offset(skb) <<
3103                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3104                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3105                         vlan_macip_lens |= (skb_transport_header(skb) -
3106                                             skb_network_header(skb));
3107
3108                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3109                 context_desc->seqnum_seed = 0;
3110
3111                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3112                                     IXGBE_ADVTXD_DTYP_CTXT);
3113
3114                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3115                         switch (skb->protocol) {
3116                         case __constant_htons(ETH_P_IP):
3117                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3118                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3119                                         type_tucmd_mlhl |=
3120                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3121                                 break;
3122
3123                         case __constant_htons(ETH_P_IPV6):
3124                                 /* XXX what about other V6 headers?? */
3125                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3126                                         type_tucmd_mlhl |=
3127                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3128                                 break;
3129
3130                         default:
3131                                 if (unlikely(net_ratelimit())) {
3132                                         DPRINTK(PROBE, WARNING,
3133                                          "partial checksum but proto=%x!\n",
3134                                          skb->protocol);
3135                                 }
3136                                 break;
3137                         }
3138                 }
3139
3140                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3141                 context_desc->mss_l4len_idx = 0;
3142
3143                 tx_buffer_info->time_stamp = jiffies;
3144                 tx_buffer_info->next_to_watch = i;
3145                 adapter->hw_csum_tx_good++;
3146                 i++;
3147                 if (i == tx_ring->count)
3148                         i = 0;
3149                 tx_ring->next_to_use = i;
3150
3151                 return true;
3152         }
3153         return false;
3154 }
3155
3156 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3157                         struct ixgbe_ring *tx_ring,
3158                         struct sk_buff *skb, unsigned int first)
3159 {
3160         struct ixgbe_tx_buffer *tx_buffer_info;
3161         unsigned int len = skb->len;
3162         unsigned int offset = 0, size, count = 0, i;
3163         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3164         unsigned int f;
3165
3166         len -= skb->data_len;
3167
3168         i = tx_ring->next_to_use;
3169
3170         while (len) {
3171                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3172                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3173
3174                 tx_buffer_info->length = size;
3175                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3176                                                   skb->data + offset,
3177                                                   size, PCI_DMA_TODEVICE);
3178                 tx_buffer_info->time_stamp = jiffies;
3179                 tx_buffer_info->next_to_watch = i;
3180
3181                 len -= size;
3182                 offset += size;
3183                 count++;
3184                 i++;
3185                 if (i == tx_ring->count)
3186                         i = 0;
3187         }
3188
3189         for (f = 0; f < nr_frags; f++) {
3190                 struct skb_frag_struct *frag;
3191
3192                 frag = &skb_shinfo(skb)->frags[f];
3193                 len = frag->size;
3194                 offset = frag->page_offset;
3195
3196                 while (len) {
3197                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3198                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3199
3200                         tx_buffer_info->length = size;
3201                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3202                                                         frag->page,
3203                                                         offset,
3204                                                         size, PCI_DMA_TODEVICE);
3205                         tx_buffer_info->time_stamp = jiffies;
3206                         tx_buffer_info->next_to_watch = i;
3207
3208                         len -= size;
3209                         offset += size;
3210                         count++;
3211                         i++;
3212                         if (i == tx_ring->count)
3213                                 i = 0;
3214                 }
3215         }
3216         if (i == 0)
3217                 i = tx_ring->count - 1;
3218         else
3219                 i = i - 1;
3220         tx_ring->tx_buffer_info[i].skb = skb;
3221         tx_ring->tx_buffer_info[first].next_to_watch = i;
3222
3223         return count;
3224 }
3225
3226 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3227                                struct ixgbe_ring *tx_ring,
3228                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3229 {
3230         union ixgbe_adv_tx_desc *tx_desc = NULL;
3231         struct ixgbe_tx_buffer *tx_buffer_info;
3232         u32 olinfo_status = 0, cmd_type_len = 0;
3233         unsigned int i;
3234         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3235
3236         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3237
3238         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3239
3240         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3241                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3242
3243         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3244                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3245
3246                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3247                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3248
3249                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3250                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3251                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3252
3253         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3254                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3255                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3256
3257         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3258
3259         i = tx_ring->next_to_use;
3260         while (count--) {
3261                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3262                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3263                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3264                 tx_desc->read.cmd_type_len =
3265                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3266                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3267
3268                 i++;
3269                 if (i == tx_ring->count)
3270                         i = 0;
3271         }
3272
3273         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3274
3275         /*
3276          * Force memory writes to complete before letting h/w
3277          * know there are new descriptors to fetch.  (Only
3278          * applicable for weak-ordered memory model archs,
3279          * such as IA-64).
3280          */
3281         wmb();
3282
3283         tx_ring->next_to_use = i;
3284         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3285 }
3286
3287 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3288                                  struct ixgbe_ring *tx_ring, int size)
3289 {
3290         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3291
3292         netif_stop_subqueue(netdev, tx_ring->queue_index);
3293         /* Herbert's original patch had:
3294          *  smp_mb__after_netif_stop_queue();
3295          * but since that doesn't exist yet, just open code it. */
3296         smp_mb();
3297
3298         /* We need to check again in a case another CPU has just
3299          * made room available. */
3300         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3301                 return -EBUSY;
3302
3303         /* A reprieve! - use start_queue because it doesn't call schedule */
3304         netif_wake_subqueue(netdev, tx_ring->queue_index);
3305         ++adapter->restart_queue;
3306         return 0;
3307 }
3308
3309 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3310                                struct ixgbe_ring *tx_ring, int size)
3311 {
3312         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3313                 return 0;
3314         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3315 }
3316
3317
3318 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3319 {
3320         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3321         struct ixgbe_ring *tx_ring;
3322         unsigned int len = skb->len;
3323         unsigned int first;
3324         unsigned int tx_flags = 0;
3325         u8 hdr_len = 0;
3326         int r_idx = 0, tso;
3327         unsigned int mss = 0;
3328         int count = 0;
3329         unsigned int f;
3330         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3331         len -= skb->data_len;
3332         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3333         tx_ring = &adapter->tx_ring[r_idx];
3334
3335
3336         if (skb->len <= 0) {
3337                 dev_kfree_skb(skb);
3338                 return NETDEV_TX_OK;
3339         }
3340         mss = skb_shinfo(skb)->gso_size;
3341
3342         if (mss)
3343                 count++;
3344         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3345                 count++;
3346
3347         count += TXD_USE_COUNT(len);
3348         for (f = 0; f < nr_frags; f++)
3349                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3350
3351         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3352                 adapter->tx_busy++;
3353                 return NETDEV_TX_BUSY;
3354         }
3355         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3356                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3357                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3358         }
3359
3360         if (skb->protocol == htons(ETH_P_IP))
3361                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3362         first = tx_ring->next_to_use;
3363         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3364         if (tso < 0) {
3365                 dev_kfree_skb_any(skb);
3366                 return NETDEV_TX_OK;
3367         }
3368
3369         if (tso)
3370                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3371         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3372                  (skb->ip_summed == CHECKSUM_PARTIAL))
3373                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3374
3375         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3376                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3377                            skb->len, hdr_len);
3378
3379         netdev->trans_start = jiffies;
3380
3381         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3382
3383         return NETDEV_TX_OK;
3384 }
3385
3386 /**
3387  * ixgbe_get_stats - Get System Network Statistics
3388  * @netdev: network interface device structure
3389  *
3390  * Returns the address of the device statistics structure.
3391  * The statistics are actually updated from the timer callback.
3392  **/
3393 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3394 {
3395         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3396
3397         /* only return the current stats */
3398         return &adapter->net_stats;
3399 }
3400
3401 /**
3402  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3403  * @netdev: network interface device structure
3404  * @p: pointer to an address structure
3405  *
3406  * Returns 0 on success, negative on failure
3407  **/
3408 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3409 {
3410         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3411         struct sockaddr *addr = p;
3412
3413         if (!is_valid_ether_addr(addr->sa_data))
3414                 return -EADDRNOTAVAIL;
3415
3416         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3417         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3418
3419         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3420
3421         return 0;
3422 }
3423
3424 #ifdef CONFIG_NET_POLL_CONTROLLER
3425 /*
3426  * Polling 'interrupt' - used by things like netconsole to send skbs
3427  * without having to re-enable interrupts. It's not called while
3428  * the interrupt routine is executing.
3429  */
3430 static void ixgbe_netpoll(struct net_device *netdev)
3431 {
3432         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3433
3434         disable_irq(adapter->pdev->irq);
3435         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3436         ixgbe_intr(adapter->pdev->irq, netdev);
3437         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3438         enable_irq(adapter->pdev->irq);
3439 }
3440 #endif
3441
3442 /**
3443  * ixgbe_napi_add_all - prep napi structs for use
3444  * @adapter: private struct
3445  * helper function to napi_add each possible q_vector->napi
3446  */
3447 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3448 {
3449         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3450         int (*poll)(struct napi_struct *, int);
3451
3452         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3453                 poll = &ixgbe_clean_rxonly;
3454         } else {
3455                 poll = &ixgbe_poll;
3456                 /* only one q_vector for legacy modes */
3457                 q_vectors = 1;
3458         }
3459
3460         for (i = 0; i < q_vectors; i++) {
3461                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3462                 netif_napi_add(adapter->netdev, &q_vector->napi,
3463                                (*poll), 64);
3464         }
3465 }
3466
3467 /**
3468  * ixgbe_probe - Device Initialization Routine
3469  * @pdev: PCI device information struct
3470  * @ent: entry in ixgbe_pci_tbl
3471  *
3472  * Returns 0 on success, negative on failure
3473  *
3474  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3475  * The OS initialization, configuring of the adapter private structure,
3476  * and a hardware reset occur.
3477  **/
3478 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3479                                  const struct pci_device_id *ent)
3480 {
3481         struct net_device *netdev;
3482         struct ixgbe_adapter *adapter = NULL;
3483         struct ixgbe_hw *hw;
3484         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3485         unsigned long mmio_start, mmio_len;
3486         static int cards_found;
3487         int i, err, pci_using_dac;
3488         u16 link_status, link_speed, link_width;
3489         u32 part_num;
3490
3491         err = pci_enable_device(pdev);
3492         if (err)
3493                 return err;
3494
3495         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3496             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3497                 pci_using_dac = 1;
3498         } else {
3499                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3500                 if (err) {
3501                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3502                         if (err) {
3503                                 dev_err(&pdev->dev, "No usable DMA "
3504                                         "configuration, aborting\n");
3505                                 goto err_dma;
3506                         }
3507                 }
3508                 pci_using_dac = 0;
3509         }
3510
3511         err = pci_request_regions(pdev, ixgbe_driver_name);
3512         if (err) {
3513                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3514                 goto err_pci_reg;
3515         }
3516
3517         pci_set_master(pdev);
3518         pci_save_state(pdev);
3519
3520         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3521         if (!netdev) {
3522                 err = -ENOMEM;
3523                 goto err_alloc_etherdev;
3524         }
3525
3526         SET_NETDEV_DEV(netdev, &pdev->dev);
3527
3528         pci_set_drvdata(pdev, netdev);
3529         adapter = netdev_priv(netdev);
3530
3531         adapter->netdev = netdev;
3532         adapter->pdev = pdev;
3533         hw = &adapter->hw;
3534         hw->back = adapter;
3535         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3536
3537         mmio_start = pci_resource_start(pdev, 0);
3538         mmio_len = pci_resource_len(pdev, 0);
3539
3540         hw->hw_addr = ioremap(mmio_start, mmio_len);
3541         if (!hw->hw_addr) {
3542                 err = -EIO;
3543                 goto err_ioremap;
3544         }
3545
3546         for (i = 1; i <= 5; i++) {
3547                 if (pci_resource_len(pdev, i) == 0)
3548                         continue;
3549         }
3550
3551         netdev->open = &ixgbe_open;
3552         netdev->stop = &ixgbe_close;
3553         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3554         netdev->get_stats = &ixgbe_get_stats;
3555         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3556         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3557         netdev->set_mac_address = &ixgbe_set_mac;
3558         netdev->change_mtu = &ixgbe_change_mtu;
3559         ixgbe_set_ethtool_ops(netdev);
3560         netdev->tx_timeout = &ixgbe_tx_timeout;
3561         netdev->watchdog_timeo = 5 * HZ;
3562         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3563         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3564         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3565 #ifdef CONFIG_NET_POLL_CONTROLLER
3566         netdev->poll_controller = ixgbe_netpoll;
3567 #endif
3568         strcpy(netdev->name, pci_name(pdev));
3569
3570         netdev->mem_start = mmio_start;
3571         netdev->mem_end = mmio_start + mmio_len;
3572
3573         adapter->bd_number = cards_found;
3574
3575         /* PCI config space info */
3576         hw->vendor_id = pdev->vendor;
3577         hw->device_id = pdev->device;
3578         hw->revision_id = pdev->revision;
3579         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3580         hw->subsystem_device_id = pdev->subsystem_device;
3581
3582         /* Setup hw api */
3583         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3584         hw->mac.type  = ii->mac;
3585
3586         err = ii->get_invariants(hw);
3587         if (err)
3588                 goto err_hw_init;
3589
3590         /* setup the private structure */
3591         err = ixgbe_sw_init(adapter);
3592         if (err)
3593                 goto err_sw_init;
3594
3595         netdev->features = NETIF_F_SG |
3596                            NETIF_F_IP_CSUM |
3597                            NETIF_F_HW_VLAN_TX |
3598                            NETIF_F_HW_VLAN_RX |
3599                            NETIF_F_HW_VLAN_FILTER;
3600
3601         netdev->features |= NETIF_F_LRO;
3602         netdev->features |= NETIF_F_TSO;
3603         netdev->features |= NETIF_F_TSO6;
3604
3605         netdev->vlan_features |= NETIF_F_TSO;
3606         netdev->vlan_features |= NETIF_F_TSO6;
3607         netdev->vlan_features |= NETIF_F_IP_CSUM;
3608         netdev->vlan_features |= NETIF_F_SG;
3609
3610         if (pci_using_dac)
3611                 netdev->features |= NETIF_F_HIGHDMA;
3612
3613         /* make sure the EEPROM is good */
3614         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3615                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3616                 err = -EIO;
3617                 goto err_eeprom;
3618         }
3619
3620         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3621         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3622
3623         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3624                 err = -EIO;
3625                 goto err_eeprom;
3626         }
3627
3628         init_timer(&adapter->watchdog_timer);
3629         adapter->watchdog_timer.function = &ixgbe_watchdog;
3630         adapter->watchdog_timer.data = (unsigned long)adapter;
3631
3632         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3633
3634         err = ixgbe_init_interrupt_scheme(adapter);
3635         if (err)
3636                 goto err_sw_init;
3637
3638         /* print bus type/speed/width info */
3639         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3640         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3641         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3642         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3643                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3644                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3645                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3646                  "Unknown"),
3647                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3648                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3649                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3650                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3651                  "Unknown"),
3652                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3653                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3654         ixgbe_read_part_num(hw, &part_num);
3655         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3656                  hw->mac.type, hw->phy.type,
3657                  (part_num >> 8), (part_num & 0xff));
3658
3659         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3660                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3661                          "this card is not sufficient for optimal "
3662                          "performance.\n");
3663                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3664                          "PCI-Express slot is required.\n");
3665         }
3666
3667         /* reset the hardware with the new settings */
3668         ixgbe_start_hw(hw);
3669
3670         netif_carrier_off(netdev);
3671         netif_tx_stop_all_queues(netdev);
3672
3673         ixgbe_napi_add_all(adapter);
3674
3675         strcpy(netdev->name, "eth%d");
3676         err = register_netdev(netdev);
3677         if (err)
3678                 goto err_register;
3679
3680 #ifdef CONFIG_DCA
3681         if (dca_add_requester(&pdev->dev) == 0) {
3682                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3683                 /* always use CB2 mode, difference is masked
3684                  * in the CB driver */
3685                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3686                 ixgbe_setup_dca(adapter);
3687         }
3688 #endif
3689
3690         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3691         cards_found++;
3692         return 0;
3693
3694 err_register:
3695         ixgbe_release_hw_control(adapter);
3696 err_hw_init:
3697 err_sw_init:
3698         ixgbe_reset_interrupt_capability(adapter);
3699 err_eeprom:
3700         iounmap(hw->hw_addr);
3701 err_ioremap:
3702         free_netdev(netdev);
3703 err_alloc_etherdev:
3704         pci_release_regions(pdev);
3705 err_pci_reg:
3706 err_dma:
3707         pci_disable_device(pdev);
3708         return err;
3709 }
3710
3711 /**
3712  * ixgbe_remove - Device Removal Routine
3713  * @pdev: PCI device information struct
3714  *
3715  * ixgbe_remove is called by the PCI subsystem to alert the driver
3716  * that it should release a PCI device.  The could be caused by a
3717  * Hot-Plug event, or because the driver is going to be removed from
3718  * memory.
3719  **/
3720 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3721 {
3722         struct net_device *netdev = pci_get_drvdata(pdev);
3723         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3724
3725         set_bit(__IXGBE_DOWN, &adapter->state);
3726         del_timer_sync(&adapter->watchdog_timer);
3727
3728         flush_scheduled_work();
3729
3730 #ifdef CONFIG_DCA
3731         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3732                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3733                 dca_remove_requester(&pdev->dev);
3734                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3735         }
3736
3737 #endif
3738         unregister_netdev(netdev);
3739
3740         ixgbe_reset_interrupt_capability(adapter);
3741
3742         ixgbe_release_hw_control(adapter);
3743
3744         iounmap(adapter->hw.hw_addr);
3745         pci_release_regions(pdev);
3746
3747         DPRINTK(PROBE, INFO, "complete\n");
3748         kfree(adapter->tx_ring);
3749         kfree(adapter->rx_ring);
3750
3751         free_netdev(netdev);
3752
3753         pci_disable_device(pdev);
3754 }
3755
3756 /**
3757  * ixgbe_io_error_detected - called when PCI error is detected
3758  * @pdev: Pointer to PCI device
3759  * @state: The current pci connection state
3760  *
3761  * This function is called after a PCI bus error affecting
3762  * this device has been detected.
3763  */
3764 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3765                                                 pci_channel_state_t state)
3766 {
3767         struct net_device *netdev = pci_get_drvdata(pdev);
3768         struct ixgbe_adapter *adapter = netdev->priv;
3769
3770         netif_device_detach(netdev);
3771
3772         if (netif_running(netdev))
3773                 ixgbe_down(adapter);
3774         pci_disable_device(pdev);
3775
3776         /* Request a slot slot reset. */
3777         return PCI_ERS_RESULT_NEED_RESET;
3778 }
3779
3780 /**
3781  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3782  * @pdev: Pointer to PCI device
3783  *
3784  * Restart the card from scratch, as if from a cold-boot.
3785  */
3786 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3787 {
3788         struct net_device *netdev = pci_get_drvdata(pdev);
3789         struct ixgbe_adapter *adapter = netdev->priv;
3790
3791         if (pci_enable_device(pdev)) {
3792                 DPRINTK(PROBE, ERR,
3793                         "Cannot re-enable PCI device after reset.\n");
3794                 return PCI_ERS_RESULT_DISCONNECT;
3795         }
3796         pci_set_master(pdev);
3797         pci_restore_state(pdev);
3798
3799         pci_enable_wake(pdev, PCI_D3hot, 0);
3800         pci_enable_wake(pdev, PCI_D3cold, 0);
3801
3802         ixgbe_reset(adapter);
3803
3804         return PCI_ERS_RESULT_RECOVERED;
3805 }
3806
3807 /**
3808  * ixgbe_io_resume - called when traffic can start flowing again.
3809  * @pdev: Pointer to PCI device
3810  *
3811  * This callback is called when the error recovery driver tells us that
3812  * its OK to resume normal operation.
3813  */
3814 static void ixgbe_io_resume(struct pci_dev *pdev)
3815 {
3816         struct net_device *netdev = pci_get_drvdata(pdev);
3817         struct ixgbe_adapter *adapter = netdev->priv;
3818
3819         if (netif_running(netdev)) {
3820                 if (ixgbe_up(adapter)) {
3821                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3822                         return;
3823                 }
3824         }
3825
3826         netif_device_attach(netdev);
3827
3828 }
3829
3830 static struct pci_error_handlers ixgbe_err_handler = {
3831         .error_detected = ixgbe_io_error_detected,
3832         .slot_reset = ixgbe_io_slot_reset,
3833         .resume = ixgbe_io_resume,
3834 };
3835
3836 static struct pci_driver ixgbe_driver = {
3837         .name     = ixgbe_driver_name,
3838         .id_table = ixgbe_pci_tbl,
3839         .probe    = ixgbe_probe,
3840         .remove   = __devexit_p(ixgbe_remove),
3841 #ifdef CONFIG_PM
3842         .suspend  = ixgbe_suspend,
3843         .resume   = ixgbe_resume,
3844 #endif
3845         .shutdown = ixgbe_shutdown,
3846         .err_handler = &ixgbe_err_handler
3847 };
3848
3849 /**
3850  * ixgbe_init_module - Driver Registration Routine
3851  *
3852  * ixgbe_init_module is the first routine called when the driver is
3853  * loaded. All it does is register with the PCI subsystem.
3854  **/
3855 static int __init ixgbe_init_module(void)
3856 {
3857         int ret;
3858         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3859                ixgbe_driver_string, ixgbe_driver_version);
3860
3861         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3862
3863 #ifdef CONFIG_DCA
3864         dca_register_notify(&dca_notifier);
3865
3866 #endif
3867         ret = pci_register_driver(&ixgbe_driver);
3868         return ret;
3869 }
3870 module_init(ixgbe_init_module);
3871
3872 /**
3873  * ixgbe_exit_module - Driver Exit Cleanup Routine
3874  *
3875  * ixgbe_exit_module is called just before the driver is removed
3876  * from memory.
3877  **/
3878 static void __exit ixgbe_exit_module(void)
3879 {
3880 #ifdef CONFIG_DCA
3881         dca_unregister_notify(&dca_notifier);
3882 #endif
3883         pci_unregister_driver(&ixgbe_driver);
3884 }
3885
3886 #ifdef CONFIG_DCA
3887 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3888                             void *p)
3889 {
3890         int ret_val;
3891
3892         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3893                                          __ixgbe_notify_dca);
3894
3895         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3896 }
3897 #endif /* CONFIG_DCA */
3898
3899 module_exit(ixgbe_exit_module);
3900
3901 /* ixgbe_main.c */