SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/atlx/atl1.c

   1 /*
   2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4  * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
   5  *
   6  * Derived from Intel e1000 driver
   7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the Free
  11  * Software Foundation; either version 2 of the License, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program; if not, write to the Free Software Foundation, Inc., 59
  21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  *
  23  * The full GNU General Public License is included in this distribution in the
  24  * file called COPYING.
  25  *
  26  * Contact Information:
  27  * Xiong Huang <xiong_huang@attansic.com>
  28  * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29  * Xinzhu  302, TAIWAN, REPUBLIC OF CHINA
  30  *
  31  * Chris Snook <csnook@redhat.com>
  32  * Jay Cliburn <jcliburn@gmail.com>
  33  *
  34  * This version is adapted from the Attansic reference driver for
  35  * inclusion in the Linux kernel.  It is currently under heavy development.
  36  * A very incomplete list of things that need to be dealt with:
  37  *
  38  * TODO:
  39  * Add more ethtool functions.
  40  * Fix abstruse irq enable/disable condition described here:
  41  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  42  *
  43  * NEEDS TESTING:
  44  * VLAN
  45  * multicast
  46  * promiscuous mode
  47  * interrupt coalescing
  48  * SMP torture testing
  49  */
  50
  51 #include <asm/atomic.h>
  52 #include <asm/byteorder.h>
  53
  54 #include <linux/compiler.h>
  55 #include <linux/crc32.h>
  56 #include <linux/delay.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/etherdevice.h>
  59 #include <linux/hardirq.h>
  60 #include <linux/if_ether.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/in.h>
  63 #include <linux/interrupt.h>
  64 #include <linux/ip.h>
  65 #include <linux/irqflags.h>
  66 #include <linux/irqreturn.h>
  67 #include <linux/jiffies.h>
  68 #include <linux/mii.h>
  69 #include <linux/module.h>
  70 #include <linux/moduleparam.h>
  71 #include <linux/net.h>
  72 #include <linux/netdevice.h>
  73 #include <linux/pci.h>
  74 #include <linux/pci_ids.h>
  75 #include <linux/pm.h>
  76 #include <linux/skbuff.h>
  77 #include <linux/slab.h>
  78 #include <linux/spinlock.h>
  79 #include <linux/string.h>
  80 #include <linux/tcp.h>
  81 #include <linux/timer.h>
  82 #include <linux/types.h>
  83 #include <linux/workqueue.h>
  84
  85 #include <net/checksum.h>
  86
  87 #include "atl1.h"
  88
  89 /* Temporary hack for merging atl1 and atl2 */
  90 #include "atlx.c"
  91
  92 /*
  93  * This is the only thing that needs to be changed to adjust the
  94  * maximum number of ports that the driver can manage.
  95  */
  96 #define ATL1_MAX_NIC 4
  97
  98 #define OPTION_UNSET    -1
  99 #define OPTION_DISABLED 0
 100 #define OPTION_ENABLED  1
 101
 102 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
 103
 104 /*
 105  * Interrupt Moderate Timer in units of 2 us
 106  *
 107  * Valid Range: 10-65535
 108  *
 109  * Default Value: 100 (200us)
 110  */
 111 static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
 112 static int num_int_mod_timer;
 113 module_param_array_named(int_mod_timer, int_mod_timer, int,
 114         &num_int_mod_timer, 0);
 115 MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
 116
 117 #define DEFAULT_INT_MOD_CNT     100     /* 200us */
 118 #define MAX_INT_MOD_CNT         65000
 119 #define MIN_INT_MOD_CNT         50
 120
 121 struct atl1_option {
 122         enum { enable_option, range_option, list_option } type;
 123         char *name;
 124         char *err;
 125         int def;
 126         union {
 127                 struct {        /* range_option info */
 128                         int min;
 129                         int max;
 130                 } r;
 131                 struct {        /* list_option info */
 132                         int nr;
 133                         struct atl1_opt_list {
 134                                 int i;
 135                                 char *str;
 136                         } *p;
 137                 } l;
 138         } arg;
 139 };
 140
 141 static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
 142         struct pci_dev *pdev)
 143 {
 144         if (*value == OPTION_UNSET) {
 145                 *value = opt->def;
 146                 return 0;
 147         }
 148
 149         switch (opt->type) {
 150         case enable_option:
 151                 switch (*value) {
 152                 case OPTION_ENABLED:
 153                         dev_info(&pdev->dev, "%s enabled\n", opt->name);
 154                         return 0;
 155                 case OPTION_DISABLED:
 156                         dev_info(&pdev->dev, "%s disabled\n", opt->name);
 157                         return 0;
 158                 }
 159                 break;
 160         case range_option:
 161                 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
 162                         dev_info(&pdev->dev, "%s set to %i\n", opt->name,
 163                                 *value);
 164                         return 0;
 165                 }
 166                 break;
 167         case list_option:{
 168                         int i;
 169                         struct atl1_opt_list *ent;
 170
 171                         for (i = 0; i < opt->arg.l.nr; i++) {
 172                                 ent = &opt->arg.l.p[i];
 173                                 if (*value == ent->i) {
 174                                         if (ent->str[0] != '\0')
 175                                                 dev_info(&pdev->dev, "%s\n",
 176                                                         ent->str);
 177                                         return 0;
 178                                 }
 179                         }
 180                 }
 181                 break;
 182
 183         default:
 184                 break;
 185         }
 186
 187         dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
 188                 opt->name, *value, opt->err);
 189         *value = opt->def;
 190         return -1;
 191 }
 192
 193 /*
 194  * atl1_check_options - Range Checking for Command Line Parameters
 195  * @adapter: board private structure
 196  *
 197  * This routine checks all command line parameters for valid user
 198  * input.  If an invalid value is given, or if no user specified
 199  * value exists, a default value is used.  The final value is stored
 200  * in a variable in the adapter structure.
 201  */
 202 void __devinit atl1_check_options(struct atl1_adapter *adapter)
 203 {
 204         struct pci_dev *pdev = adapter->pdev;
 205         int bd = adapter->bd_number;
 206         if (bd >= ATL1_MAX_NIC) {
 207                 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
 208                 dev_notice(&pdev->dev, "using defaults for all values\n");
 209         }
 210         {                       /* Interrupt Moderate Timer */
 211                 struct atl1_option opt = {
 212                         .type = range_option,
 213                         .name = "Interrupt Moderator Timer",
 214                         .err = "using default of "
 215                                 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
 216                         .def = DEFAULT_INT_MOD_CNT,
 217                         .arg = {.r = {.min = MIN_INT_MOD_CNT,
 218                                         .max = MAX_INT_MOD_CNT} }
 219                 };
 220                 int val;
 221                 if (num_int_mod_timer > bd) {
 222                         val = int_mod_timer[bd];
 223                         atl1_validate_option(&val, &opt, pdev);
 224                         adapter->imt = (u16) val;
 225                 } else
 226                         adapter->imt = (u16) (opt.def);
 227         }
 228 }
 229
 230 /*
 231  * atl1_pci_tbl - PCI Device ID Table
 232  */
 233 static const struct pci_device_id atl1_pci_tbl[] = {
 234         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
 235         /* required last entry */
 236         {0,}
 237 };
 238 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 239
 240 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 241         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 242
 243 static int debug = -1;
 244 module_param(debug, int, 0);
 245 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 246
 247 /*
 248  * Reset the transmit and receive units; mask and clear all interrupts.
 249  * hw - Struct containing variables accessed by shared code
 250  * return : 0  or  idle status (if error)
 251  */
 252 static s32 atl1_reset_hw(struct atl1_hw *hw)
 253 {
 254         struct pci_dev *pdev = hw->back->pdev;
 255         struct atl1_adapter *adapter = hw->back;
 256         u32 icr;
 257         int i;
 258
 259         /*
 260          * Clear Interrupt mask to stop board from generating
 261          * interrupts & Clear any pending interrupt events
 262          */
 263         /*
 264          * iowrite32(0, hw->hw_addr + REG_IMR);
 265          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 266          */
 267
 268         /*
 269          * Issue Soft Reset to the MAC.  This will reset the chip's
 270          * transmit, receive, DMA.  It will not effect
 271          * the current PCI configuration.  The global reset bit is self-
 272          * clearing, and should clear within a microsecond.
 273          */
 274         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 275         ioread32(hw->hw_addr + REG_MASTER_CTRL);
 276
 277         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 278         ioread16(hw->hw_addr + REG_PHY_ENABLE);
 279
 280         /* delay about 1ms */
 281         msleep(1);
 282
 283         /* Wait at least 10ms for All module to be Idle */
 284         for (i = 0; i < 10; i++) {
 285                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 286                 if (!icr)
 287                         break;
 288                 /* delay 1 ms */
 289                 msleep(1);
 290                 /* FIXME: still the right way to do this? */
 291                 cpu_relax();
 292         }
 293
 294         if (icr) {
 295                 if (netif_msg_hw(adapter))
 296                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 297                 return icr;
 298         }
 299
 300         return 0;
 301 }
 302
 303 /* function about EEPROM
 304  *
 305  * check_eeprom_exist
 306  * return 0 if eeprom exist
 307  */
 308 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 309 {
 310         u32 value;
 311         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 312         if (value & SPI_FLASH_CTRL_EN_VPD) {
 313                 value &= ~SPI_FLASH_CTRL_EN_VPD;
 314                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 315         }
 316
 317         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 318         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 319 }
 320
 321 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 322 {
 323         int i;
 324         u32 control;
 325
 326         if (offset & 3)
 327                 /* address do not align */
 328                 return false;
 329
 330         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 331         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 332         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 333         ioread32(hw->hw_addr + REG_VPD_CAP);
 334
 335         for (i = 0; i < 10; i++) {
 336                 msleep(2);
 337                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
 338                 if (control & VPD_CAP_VPD_FLAG)
 339                         break;
 340         }
 341         if (control & VPD_CAP_VPD_FLAG) {
 342                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 343                 return true;
 344         }
 345         /* timeout */
 346         return false;
 347 }
 348
 349 /*
 350  * Reads the value from a PHY register
 351  * hw - Struct containing variables accessed by shared code
 352  * reg_addr - address of the PHY register to read
 353  */
 354 s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 355 {
 356         u32 val;
 357         int i;
 358
 359         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 360                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 361                 MDIO_CLK_SEL_SHIFT;
 362         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 363         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 364
 365         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 366                 udelay(2);
 367                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 368                 if (!(val & (MDIO_START | MDIO_BUSY)))
 369                         break;
 370         }
 371         if (!(val & (MDIO_START | MDIO_BUSY))) {
 372                 *phy_data = (u16) val;
 373                 return 0;
 374         }
 375         return ATLX_ERR_PHY;
 376 }
 377
 378 #define CUSTOM_SPI_CS_SETUP     2
 379 #define CUSTOM_SPI_CLK_HI       2
 380 #define CUSTOM_SPI_CLK_LO       2
 381 #define CUSTOM_SPI_CS_HOLD      2
 382 #define CUSTOM_SPI_CS_HI        3
 383
 384 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 385 {
 386         int i;
 387         u32 value;
 388
 389         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 390         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 391
 392         value = SPI_FLASH_CTRL_WAIT_READY |
 393             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 394             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 395                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
 396             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 397                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
 398             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 399                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 400             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 401                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
 402             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 403             SPI_FLASH_CTRL_INS_SHIFT;
 404
 405         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 406
 407         value |= SPI_FLASH_CTRL_START;
 408         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 409         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 410
 411         for (i = 0; i < 10; i++) {
 412                 msleep(1);
 413                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 414                 if (!(value & SPI_FLASH_CTRL_START))
 415                         break;
 416         }
 417
 418         if (value & SPI_FLASH_CTRL_START)
 419                 return false;
 420
 421         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 422
 423         return true;
 424 }
 425
 426 /*
 427  * get_permanent_address
 428  * return 0 if get valid mac address,
 429  */
 430 static int atl1_get_permanent_address(struct atl1_hw *hw)
 431 {
 432         u32 addr[2];
 433         u32 i, control;
 434         u16 reg;
 435         u8 eth_addr[ETH_ALEN];
 436         bool key_valid;
 437
 438         if (is_valid_ether_addr(hw->perm_mac_addr))
 439                 return 0;
 440
 441         /* init */
 442         addr[0] = addr[1] = 0;
 443
 444         if (!atl1_check_eeprom_exist(hw)) {
 445                 reg = 0;
 446                 key_valid = false;
 447                 /* Read out all EEPROM content */
 448                 i = 0;
 449                 while (1) {
 450                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 451                                 if (key_valid) {
 452                                         if (reg == REG_MAC_STA_ADDR)
 453                                                 addr[0] = control;
 454                                         else if (reg == (REG_MAC_STA_ADDR + 4))
 455                                                 addr[1] = control;
 456                                         key_valid = false;
 457                                 } else if ((control & 0xff) == 0x5A) {
 458                                         key_valid = true;
 459                                         reg = (u16) (control >> 16);
 460                                 } else
 461                                         break;
 462                         } else
 463                                 /* read error */
 464                                 break;
 465                         i += 4;
 466                 }
 467
 468                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
 469                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 470                 if (is_valid_ether_addr(eth_addr)) {
 471                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 472                         return 0;
 473                 }
 474                 return 1;
 475         }
 476
 477         /* see if SPI FLAGS exist ? */
 478         addr[0] = addr[1] = 0;
 479         reg = 0;
 480         key_valid = false;
 481         i = 0;
 482         while (1) {
 483                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 484                         if (key_valid) {
 485                                 if (reg == REG_MAC_STA_ADDR)
 486                                         addr[0] = control;
 487                                 else if (reg == (REG_MAC_STA_ADDR + 4))
 488                                         addr[1] = control;
 489                                 key_valid = false;
 490                         } else if ((control & 0xff) == 0x5A) {
 491                                 key_valid = true;
 492                                 reg = (u16) (control >> 16);
 493                         } else
 494                                 /* data end */
 495                                 break;
 496                 } else
 497                         /* read error */
 498                         break;
 499                 i += 4;
 500         }
 501
 502         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 503         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 504         if (is_valid_ether_addr(eth_addr)) {
 505                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 506                 return 0;
 507         }
 508
 509         /*
 510          * On some motherboards, the MAC address is written by the
 511          * BIOS directly to the MAC register during POST, and is
 512          * not stored in eeprom.  If all else thus far has failed
 513          * to fetch the permanent MAC address, try reading it directly.
 514          */
 515         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 516         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 517         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 518         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 519         if (is_valid_ether_addr(eth_addr)) {
 520                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 521                 return 0;
 522         }
 523
 524         return 1;
 525 }
 526
 527 /*
 528  * Reads the adapter's MAC address from the EEPROM
 529  * hw - Struct containing variables accessed by shared code
 530  */
 531 s32 atl1_read_mac_addr(struct atl1_hw *hw)
 532 {
 533         u16 i;
 534
 535         if (atl1_get_permanent_address(hw))
 536                 random_ether_addr(hw->perm_mac_addr);
 537
 538         for (i = 0; i < ETH_ALEN; i++)
 539                 hw->mac_addr[i] = hw->perm_mac_addr[i];
 540         return 0;
 541 }
 542
 543 /*
 544  * Hashes an address to determine its location in the multicast table
 545  * hw - Struct containing variables accessed by shared code
 546  * mc_addr - the multicast address to hash
 547  *
 548  * atl1_hash_mc_addr
 549  *  purpose
 550  *      set hash value for a multicast address
 551  *      hash calcu processing :
 552  *          1. calcu 32bit CRC for multicast address
 553  *          2. reverse crc with MSB to LSB
 554  */
 555 u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 556 {
 557         u32 crc32, value = 0;
 558         int i;
 559
 560         crc32 = ether_crc_le(6, mc_addr);
 561         for (i = 0; i < 32; i++)
 562                 value |= (((crc32 >> i) & 1) << (31 - i));
 563
 564         return value;
 565 }
 566
 567 /*
 568  * Sets the bit in the multicast table corresponding to the hash value.
 569  * hw - Struct containing variables accessed by shared code
 570  * hash_value - Multicast address hash value
 571  */
 572 void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 573 {
 574         u32 hash_bit, hash_reg;
 575         u32 mta;
 576
 577         /*
 578          * The HASH Table  is a register array of 2 32-bit registers.
 579          * It is treated like an array of 64 bits.  We want to set
 580          * bit BitArray[hash_value]. So we figure out what register
 581          * the bit is in, read it, OR in the new bit, then write
 582          * back the new value.  The register is determined by the
 583          * upper 7 bits of the hash value and the bit within that
 584          * register are determined by the lower 5 bits of the value.
 585          */
 586         hash_reg = (hash_value >> 31) & 0x1;
 587         hash_bit = (hash_value >> 26) & 0x1F;
 588         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 589         mta |= (1 << hash_bit);
 590         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 591 }
 592
 593 /*
 594  * Writes a value to a PHY register
 595  * hw - Struct containing variables accessed by shared code
 596  * reg_addr - address of the PHY register to write
 597  * data - data to write to the PHY
 598  */
 599 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 600 {
 601         int i;
 602         u32 val;
 603
 604         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 605             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 606             MDIO_SUP_PREAMBLE |
 607             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 608         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 609         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 610
 611         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 612                 udelay(2);
 613                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 614                 if (!(val & (MDIO_START | MDIO_BUSY)))
 615                         break;
 616         }
 617
 618         if (!(val & (MDIO_START | MDIO_BUSY)))
 619                 return 0;
 620
 621         return ATLX_ERR_PHY;
 622 }
 623
 624 /*
 625  * Make L001's PHY out of Power Saving State (bug)
 626  * hw - Struct containing variables accessed by shared code
 627  * when power on, L001's PHY always on Power saving State
 628  * (Gigabit Link forbidden)
 629  */
 630 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 631 {
 632         s32 ret;
 633         ret = atl1_write_phy_reg(hw, 29, 0x0029);
 634         if (ret)
 635                 return ret;
 636         return atl1_write_phy_reg(hw, 30, 0);
 637 }
 638
 639 /*
 640  * Resets the PHY and make all config validate
 641  * hw - Struct containing variables accessed by shared code
 642  *
 643  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 644  */
 645 static s32 atl1_phy_reset(struct atl1_hw *hw)
 646 {
 647         struct pci_dev *pdev = hw->back->pdev;
 648         struct atl1_adapter *adapter = hw->back;
 649         s32 ret_val;
 650         u16 phy_data;
 651
 652         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 653             hw->media_type == MEDIA_TYPE_1000M_FULL)
 654                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 655         else {
 656                 switch (hw->media_type) {
 657                 case MEDIA_TYPE_100M_FULL:
 658                         phy_data =
 659                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 660                             MII_CR_RESET;
 661                         break;
 662                 case MEDIA_TYPE_100M_HALF:
 663                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 664                         break;
 665                 case MEDIA_TYPE_10M_FULL:
 666                         phy_data =
 667                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 668                         break;
 669                 default:
 670                         /* MEDIA_TYPE_10M_HALF: */
 671                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 672                         break;
 673                 }
 674         }
 675
 676         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 677         if (ret_val) {
 678                 u32 val;
 679                 int i;
 680                 /* pcie serdes link may be down! */
 681                 if (netif_msg_hw(adapter))
 682                         dev_dbg(&pdev->dev, "pcie phy link down\n");
 683
 684                 for (i = 0; i < 25; i++) {
 685                         msleep(1);
 686                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 687                         if (!(val & (MDIO_START | MDIO_BUSY)))
 688                                 break;
 689                 }
 690
 691                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 692                         if (netif_msg_hw(adapter))
 693                                 dev_warn(&pdev->dev,
 694                                         "pcie link down at least 25ms\n");
 695                         return ret_val;
 696                 }
 697         }
 698         return 0;
 699 }
 700
 701 /*
 702  * Configures PHY autoneg and flow control advertisement settings
 703  * hw - Struct containing variables accessed by shared code
 704  */
 705 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 706 {
 707         s32 ret_val;
 708         s16 mii_autoneg_adv_reg;
 709         s16 mii_1000t_ctrl_reg;
 710
 711         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 712         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 713
 714         /* Read the MII 1000Base-T Control Register (Address 9). */
 715         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 716
 717         /*
 718          * First we clear all the 10/100 mb speed bits in the Auto-Neg
 719          * Advertisement Register (Address 4) and the 1000 mb speed bits in
 720          * the  1000Base-T Control Register (Address 9).
 721          */
 722         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 723         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 724
 725         /*
 726          * Need to parse media_type  and set up
 727          * the appropriate PHY registers.
 728          */
 729         switch (hw->media_type) {
 730         case MEDIA_TYPE_AUTO_SENSOR:
 731                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 732                                         MII_AR_10T_FD_CAPS |
 733                                         MII_AR_100TX_HD_CAPS |
 734                                         MII_AR_100TX_FD_CAPS);
 735                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 736                 break;
 737
 738         case MEDIA_TYPE_1000M_FULL:
 739                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 740                 break;
 741
 742         case MEDIA_TYPE_100M_FULL:
 743                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 744                 break;
 745
 746         case MEDIA_TYPE_100M_HALF:
 747                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 748                 break;
 749
 750         case MEDIA_TYPE_10M_FULL:
 751                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 752                 break;
 753
 754         default:
 755                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 756                 break;
 757         }
 758
 759         /* flow control fixed to enable all */
 760         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 761
 762         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 763         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 764
 765         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 766         if (ret_val)
 767                 return ret_val;
 768
 769         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 770         if (ret_val)
 771                 return ret_val;
 772
 773         return 0;
 774 }
 775
 776 /*
 777  * Configures link settings.
 778  * hw - Struct containing variables accessed by shared code
 779  * Assumes the hardware has previously been reset and the
 780  * transmitter and receiver are not enabled.
 781  */
 782 static s32 atl1_setup_link(struct atl1_hw *hw)
 783 {
 784         struct pci_dev *pdev = hw->back->pdev;
 785         struct atl1_adapter *adapter = hw->back;
 786         s32 ret_val;
 787
 788         /*
 789          * Options:
 790          *  PHY will advertise value(s) parsed from
 791          *  autoneg_advertised and fc
 792          *  no matter what autoneg is , We will not wait link result.
 793          */
 794         ret_val = atl1_phy_setup_autoneg_adv(hw);
 795         if (ret_val) {
 796                 if (netif_msg_link(adapter))
 797                         dev_dbg(&pdev->dev,
 798                                 "error setting up autonegotiation\n");
 799                 return ret_val;
 800         }
 801         /* SW.Reset , En-Auto-Neg if needed */
 802         ret_val = atl1_phy_reset(hw);
 803         if (ret_val) {
 804                 if (netif_msg_link(adapter))
 805                         dev_dbg(&pdev->dev, "error resetting phy\n");
 806                 return ret_val;
 807         }
 808         hw->phy_configured = true;
 809         return ret_val;
 810 }
 811
 812 static void atl1_init_flash_opcode(struct atl1_hw *hw)
 813 {
 814         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 815                 /* Atmel */
 816                 hw->flash_vendor = 0;
 817
 818         /* Init OP table */
 819         iowrite8(flash_table[hw->flash_vendor].cmd_program,
 820                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 821         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 822                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 823         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 824                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 825         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 826                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 827         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 828                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 829         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 830                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 831         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 832                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 833         iowrite8(flash_table[hw->flash_vendor].cmd_read,
 834                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
 835 }
 836
 837 /*
 838  * Performs basic configuration of the adapter.
 839  * hw - Struct containing variables accessed by shared code
 840  * Assumes that the controller has previously been reset and is in a
 841  * post-reset uninitialized state. Initializes multicast table,
 842  * and  Calls routines to setup link
 843  * Leaves the transmit and receive units disabled and uninitialized.
 844  */
 845 static s32 atl1_init_hw(struct atl1_hw *hw)
 846 {
 847         u32 ret_val = 0;
 848
 849         /* Zero out the Multicast HASH table */
 850         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 851         /* clear the old settings from the multicast hash table */
 852         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 853
 854         atl1_init_flash_opcode(hw);
 855
 856         if (!hw->phy_configured) {
 857                 /* enable GPHY LinkChange Interrrupt */
 858                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 859                 if (ret_val)
 860                         return ret_val;
 861                 /* make PHY out of power-saving state */
 862                 ret_val = atl1_phy_leave_power_saving(hw);
 863                 if (ret_val)
 864                         return ret_val;
 865                 /* Call a subroutine to configure the link */
 866                 ret_val = atl1_setup_link(hw);
 867         }
 868         return ret_val;
 869 }
 870
 871 /*
 872  * Detects the current speed and duplex settings of the hardware.
 873  * hw - Struct containing variables accessed by shared code
 874  * speed - Speed of the connection
 875  * duplex - Duplex setting of the connection
 876  */
 877 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 878 {
 879         struct pci_dev *pdev = hw->back->pdev;
 880         struct atl1_adapter *adapter = hw->back;
 881         s32 ret_val;
 882         u16 phy_data;
 883
 884         /* ; --- Read   PHY Specific Status Register (17) */
 885         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 886         if (ret_val)
 887                 return ret_val;
 888
 889         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 890                 return ATLX_ERR_PHY_RES;
 891
 892         switch (phy_data & MII_ATLX_PSSR_SPEED) {
 893         case MII_ATLX_PSSR_1000MBS:
 894                 *speed = SPEED_1000;
 895                 break;
 896         case MII_ATLX_PSSR_100MBS:
 897                 *speed = SPEED_100;
 898                 break;
 899         case MII_ATLX_PSSR_10MBS:
 900                 *speed = SPEED_10;
 901                 break;
 902         default:
 903                 if (netif_msg_hw(adapter))
 904                         dev_dbg(&pdev->dev, "error getting speed\n");
 905                 return ATLX_ERR_PHY_SPEED;
 906                 break;
 907         }
 908         if (phy_data & MII_ATLX_PSSR_DPLX)
 909                 *duplex = FULL_DUPLEX;
 910         else
 911                 *duplex = HALF_DUPLEX;
 912
 913         return 0;
 914 }
 915
 916 void atl1_set_mac_addr(struct atl1_hw *hw)
 917 {
 918         u32 value;
 919         /*
 920          * 00-0B-6A-F6-00-DC
 921          * 0:  6AF600DC   1: 000B
 922          * low dword
 923          */
 924         value = (((u32) hw->mac_addr[2]) << 24) |
 925             (((u32) hw->mac_addr[3]) << 16) |
 926             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 927         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 928         /* high dword */
 929         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 930         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 931 }
 932
 933 /*
 934  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 935  * @adapter: board private structure to initialize
 936  *
 937  * atl1_sw_init initializes the Adapter private data structure.
 938  * Fields are initialized based on PCI device information and
 939  * OS network device settings (MTU size).
 940  */
 941 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 942 {
 943         struct atl1_hw *hw = &adapter->hw;
 944         struct net_device *netdev = adapter->netdev;
 945
 946         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 947         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 948
 949         adapter->wol = 0;
 950         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 951         adapter->ict = 50000;           /* 100ms */
 952         adapter->link_speed = SPEED_0;  /* hardware init */
 953         adapter->link_duplex = FULL_DUPLEX;
 954
 955         hw->phy_configured = false;
 956         hw->preamble_len = 7;
 957         hw->ipgt = 0x60;
 958         hw->min_ifg = 0x50;
 959         hw->ipgr1 = 0x40;
 960         hw->ipgr2 = 0x60;
 961         hw->max_retry = 0xf;
 962         hw->lcol = 0x37;
 963         hw->jam_ipg = 7;
 964         hw->rfd_burst = 8;
 965         hw->rrd_burst = 8;
 966         hw->rfd_fetch_gap = 1;
 967         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 968         hw->rx_jumbo_lkah = 1;
 969         hw->rrd_ret_timer = 16;
 970         hw->tpd_burst = 4;
 971         hw->tpd_fetch_th = 16;
 972         hw->txf_burst = 0x100;
 973         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 974         hw->tpd_fetch_gap = 1;
 975         hw->rcb_value = atl1_rcb_64;
 976         hw->dma_ord = atl1_dma_ord_enh;
 977         hw->dmar_block = atl1_dma_req_256;
 978         hw->dmaw_block = atl1_dma_req_256;
 979         hw->cmb_rrd = 4;
 980         hw->cmb_tpd = 4;
 981         hw->cmb_rx_timer = 1;   /* about 2us */
 982         hw->cmb_tx_timer = 1;   /* about 2us */
 983         hw->smb_timer = 100000; /* about 200ms */
 984
 985         spin_lock_init(&adapter->lock);
 986         spin_lock_init(&adapter->mb_lock);
 987
 988         return 0;
 989 }
 990
 991 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 992 {
 993         struct atl1_adapter *adapter = netdev_priv(netdev);
 994         u16 result;
 995
 996         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
 997
 998         return result;
 999 }
1000
1001 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
1002         int val)
1003 {
1004         struct atl1_adapter *adapter = netdev_priv(netdev);
1005
1006         atl1_write_phy_reg(&adapter->hw, reg_num, val);
1007 }
1008
1009 /*
1010  * atl1_mii_ioctl -
1011  * @netdev:
1012  * @ifreq:
1013  * @cmd:
1014  */
1015 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1016 {
1017         struct atl1_adapter *adapter = netdev_priv(netdev);
1018         unsigned long flags;
1019         int retval;
1020
1021         if (!netif_running(netdev))
1022                 return -EINVAL;
1023
1024         spin_lock_irqsave(&adapter->lock, flags);
1025         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1026         spin_unlock_irqrestore(&adapter->lock, flags);
1027
1028         return retval;
1029 }
1030
1031 /*
1032  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1033  * @adapter: board private structure
1034  *
1035  * Return 0 on success, negative on failure
1036  */
1037 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
1038 {
1039         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1040         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1041         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1042         struct atl1_ring_header *ring_header = &adapter->ring_header;
1043         struct pci_dev *pdev = adapter->pdev;
1044         int size;
1045         u8 offset = 0;
1046
1047         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
1048         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1049         if (unlikely(!tpd_ring->buffer_info)) {
1050                 if (netif_msg_drv(adapter))
1051                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
1052                                 size);
1053                 goto err_nomem;
1054         }
1055         rfd_ring->buffer_info =
1056                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
1057
1058         /*
1059          * real ring DMA buffer
1060          * each ring/block may need up to 8 bytes for alignment, hence the
1061          * additional 40 bytes tacked onto the end.
1062          */
1063         ring_header->size = size =
1064                 sizeof(struct tx_packet_desc) * tpd_ring->count
1065                 + sizeof(struct rx_free_desc) * rfd_ring->count
1066                 + sizeof(struct rx_return_desc) * rrd_ring->count
1067                 + sizeof(struct coals_msg_block)
1068                 + sizeof(struct stats_msg_block)
1069                 + 40;
1070
1071         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1072                 &ring_header->dma);
1073         if (unlikely(!ring_header->desc)) {
1074                 if (netif_msg_drv(adapter))
1075                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
1076                 goto err_nomem;
1077         }
1078
1079         memset(ring_header->desc, 0, ring_header->size);
1080
1081         /* init TPD ring */
1082         tpd_ring->dma = ring_header->dma;
1083         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
1084         tpd_ring->dma += offset;
1085         tpd_ring->desc = (u8 *) ring_header->desc + offset;
1086         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
1087
1088         /* init RFD ring */
1089         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
1090         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
1091         rfd_ring->dma += offset;
1092         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
1093         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
1094
1095
1096         /* init RRD ring */
1097         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
1098         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
1099         rrd_ring->dma += offset;
1100         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
1101         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
1102
1103
1104         /* init CMB */
1105         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
1106         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
1107         adapter->cmb.dma += offset;
1108         adapter->cmb.cmb = (struct coals_msg_block *)
1109                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
1110
1111         /* init SMB */
1112         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
1113         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
1114         adapter->smb.dma += offset;
1115         adapter->smb.smb = (struct stats_msg_block *)
1116                 ((u8 *) adapter->cmb.cmb +
1117                 (sizeof(struct coals_msg_block) + offset));
1118
1119         return 0;
1120
1121 err_nomem:
1122         kfree(tpd_ring->buffer_info);
1123         return -ENOMEM;
1124 }
1125
1126 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1127 {
1128         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1129         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1130         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1131
1132         atomic_set(&tpd_ring->next_to_use, 0);
1133         atomic_set(&tpd_ring->next_to_clean, 0);
1134
1135         rfd_ring->next_to_clean = 0;
1136         atomic_set(&rfd_ring->next_to_use, 0);
1137
1138         rrd_ring->next_to_use = 0;
1139         atomic_set(&rrd_ring->next_to_clean, 0);
1140 }
1141
1142 /*
1143  * atl1_clean_rx_ring - Free RFD Buffers
1144  * @adapter: board private structure
1145  */
1146 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1147 {
1148         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1149         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1150         struct atl1_buffer *buffer_info;
1151         struct pci_dev *pdev = adapter->pdev;
1152         unsigned long size;
1153         unsigned int i;
1154
1155         /* Free all the Rx ring sk_buffs */
1156         for (i = 0; i < rfd_ring->count; i++) {
1157                 buffer_info = &rfd_ring->buffer_info[i];
1158                 if (buffer_info->dma) {
1159                         pci_unmap_page(pdev, buffer_info->dma,
1160                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1161                         buffer_info->dma = 0;
1162                 }
1163                 if (buffer_info->skb) {
1164                         dev_kfree_skb(buffer_info->skb);
1165                         buffer_info->skb = NULL;
1166                 }
1167         }
1168
1169         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1170         memset(rfd_ring->buffer_info, 0, size);
1171
1172         /* Zero out the descriptor ring */
1173         memset(rfd_ring->desc, 0, rfd_ring->size);
1174
1175         rfd_ring->next_to_clean = 0;
1176         atomic_set(&rfd_ring->next_to_use, 0);
1177
1178         rrd_ring->next_to_use = 0;
1179         atomic_set(&rrd_ring->next_to_clean, 0);
1180 }
1181
1182 /*
1183  * atl1_clean_tx_ring - Free Tx Buffers
1184  * @adapter: board private structure
1185  */
1186 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1187 {
1188         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1189         struct atl1_buffer *buffer_info;
1190         struct pci_dev *pdev = adapter->pdev;
1191         unsigned long size;
1192         unsigned int i;
1193
1194         /* Free all the Tx ring sk_buffs */
1195         for (i = 0; i < tpd_ring->count; i++) {
1196                 buffer_info = &tpd_ring->buffer_info[i];
1197                 if (buffer_info->dma) {
1198                         pci_unmap_page(pdev, buffer_info->dma,
1199                                 buffer_info->length, PCI_DMA_TODEVICE);
1200                         buffer_info->dma = 0;
1201                 }
1202         }
1203
1204         for (i = 0; i < tpd_ring->count; i++) {
1205                 buffer_info = &tpd_ring->buffer_info[i];
1206                 if (buffer_info->skb) {
1207                         dev_kfree_skb_any(buffer_info->skb);
1208                         buffer_info->skb = NULL;
1209                 }
1210         }
1211
1212         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1213         memset(tpd_ring->buffer_info, 0, size);
1214
1215         /* Zero out the descriptor ring */
1216         memset(tpd_ring->desc, 0, tpd_ring->size);
1217
1218         atomic_set(&tpd_ring->next_to_use, 0);
1219         atomic_set(&tpd_ring->next_to_clean, 0);
1220 }
1221
1222 /*
1223  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1224  * @adapter: board private structure
1225  *
1226  * Free all transmit software resources
1227  */
1228 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1229 {
1230         struct pci_dev *pdev = adapter->pdev;
1231         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1232         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1233         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1234         struct atl1_ring_header *ring_header = &adapter->ring_header;
1235
1236         atl1_clean_tx_ring(adapter);
1237         atl1_clean_rx_ring(adapter);
1238
1239         kfree(tpd_ring->buffer_info);
1240         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1241                 ring_header->dma);
1242
1243         tpd_ring->buffer_info = NULL;
1244         tpd_ring->desc = NULL;
1245         tpd_ring->dma = 0;
1246
1247         rfd_ring->buffer_info = NULL;
1248         rfd_ring->desc = NULL;
1249         rfd_ring->dma = 0;
1250
1251         rrd_ring->desc = NULL;
1252         rrd_ring->dma = 0;
1253 }
1254
1255 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1256 {
1257         u32 value;
1258         struct atl1_hw *hw = &adapter->hw;
1259         struct net_device *netdev = adapter->netdev;
1260         /* Config MAC CTRL Register */
1261         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1262         /* duplex */
1263         if (FULL_DUPLEX == adapter->link_duplex)
1264                 value |= MAC_CTRL_DUPLX;
1265         /* speed */
1266         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1267                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1268                   MAC_CTRL_SPEED_SHIFT);
1269         /* flow control */
1270         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1271         /* PAD & CRC */
1272         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1273         /* preamble length */
1274         value |= (((u32) adapter->hw.preamble_len
1275                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1276         /* vlan */
1277         if (adapter->vlgrp)
1278                 value |= MAC_CTRL_RMV_VLAN;
1279         /* rx checksum
1280            if (adapter->rx_csum)
1281            value |= MAC_CTRL_RX_CHKSUM_EN;
1282          */
1283         /* filter mode */
1284         value |= MAC_CTRL_BC_EN;
1285         if (netdev->flags & IFF_PROMISC)
1286                 value |= MAC_CTRL_PROMIS_EN;
1287         else if (netdev->flags & IFF_ALLMULTI)
1288                 value |= MAC_CTRL_MC_ALL_EN;
1289         /* value |= MAC_CTRL_LOOPBACK; */
1290         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1291 }
1292
1293 static u32 atl1_check_link(struct atl1_adapter *adapter)
1294 {
1295         struct atl1_hw *hw = &adapter->hw;
1296         struct net_device *netdev = adapter->netdev;
1297         u32 ret_val;
1298         u16 speed, duplex, phy_data;
1299         int reconfig = 0;
1300
1301         /* MII_BMSR must read twice */
1302         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1303         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1304         if (!(phy_data & BMSR_LSTATUS)) {
1305                 /* link down */
1306                 if (netif_carrier_ok(netdev)) {
1307                         /* old link state: Up */
1308                         if (netif_msg_link(adapter))
1309                                 dev_info(&adapter->pdev->dev, "link is down\n");
1310                         adapter->link_speed = SPEED_0;
1311                         netif_carrier_off(netdev);
1312                         netif_stop_queue(netdev);
1313                 }
1314                 return 0;
1315         }
1316
1317         /* Link Up */
1318         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1319         if (ret_val)
1320                 return ret_val;
1321
1322         switch (hw->media_type) {
1323         case MEDIA_TYPE_1000M_FULL:
1324                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1325                         reconfig = 1;
1326                 break;
1327         case MEDIA_TYPE_100M_FULL:
1328                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1329                         reconfig = 1;
1330                 break;
1331         case MEDIA_TYPE_100M_HALF:
1332                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1333                         reconfig = 1;
1334                 break;
1335         case MEDIA_TYPE_10M_FULL:
1336                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1337                         reconfig = 1;
1338                 break;
1339         case MEDIA_TYPE_10M_HALF:
1340                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1341                         reconfig = 1;
1342                 break;
1343         }
1344
1345         /* link result is our setting */
1346         if (!reconfig) {
1347                 if (adapter->link_speed != speed
1348                     || adapter->link_duplex != duplex) {
1349                         adapter->link_speed = speed;
1350                         adapter->link_duplex = duplex;
1351                         atl1_setup_mac_ctrl(adapter);
1352                         if (netif_msg_link(adapter))
1353                                 dev_info(&adapter->pdev->dev,
1354                                         "%s link is up %d Mbps %s\n",
1355                                         netdev->name, adapter->link_speed,
1356                                         adapter->link_duplex == FULL_DUPLEX ?
1357                                         "full duplex" : "half duplex");
1358                 }
1359                 if (!netif_carrier_ok(netdev)) {
1360                         /* Link down -> Up */
1361                         netif_carrier_on(netdev);
1362                         netif_wake_queue(netdev);
1363                 }
1364                 return 0;
1365         }
1366
1367         /* change original link status */
1368         if (netif_carrier_ok(netdev)) {
1369                 adapter->link_speed = SPEED_0;
1370                 netif_carrier_off(netdev);
1371                 netif_stop_queue(netdev);
1372         }
1373
1374         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1375             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1376                 switch (hw->media_type) {
1377                 case MEDIA_TYPE_100M_FULL:
1378                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1379                                    MII_CR_RESET;
1380                         break;
1381                 case MEDIA_TYPE_100M_HALF:
1382                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1383                         break;
1384                 case MEDIA_TYPE_10M_FULL:
1385                         phy_data =
1386                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1387                         break;
1388                 default:
1389                         /* MEDIA_TYPE_10M_HALF: */
1390                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1391                         break;
1392                 }
1393                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1394                 return 0;
1395         }
1396
1397         /* auto-neg, insert timer to re-config phy */
1398         if (!adapter->phy_timer_pending) {
1399                 adapter->phy_timer_pending = true;
1400                 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
1401         }
1402
1403         return 0;
1404 }
1405
1406 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1407 {
1408         u32 hi, lo, value;
1409
1410         /* RFD Flow Control */
1411         value = adapter->rfd_ring.count;
1412         hi = value / 16;
1413         if (hi < 2)
1414                 hi = 2;
1415         lo = value * 7 / 8;
1416
1417         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1418                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1419         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1420
1421         /* RRD Flow Control */
1422         value = adapter->rrd_ring.count;
1423         lo = value / 16;
1424         hi = value * 7 / 8;
1425         if (lo < 2)
1426                 lo = 2;
1427         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1428                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1429         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1430 }
1431
1432 static void set_flow_ctrl_new(struct atl1_hw *hw)
1433 {
1434         u32 hi, lo, value;
1435
1436         /* RXF Flow Control */
1437         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1438         lo = value / 16;
1439         if (lo < 192)
1440                 lo = 192;
1441         hi = value * 7 / 8;
1442         if (hi < lo)
1443                 hi = lo + 16;
1444         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1445                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1446         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1447
1448         /* RRD Flow Control */
1449         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1450         lo = value / 8;
1451         hi = value * 7 / 8;
1452         if (lo < 2)
1453                 lo = 2;
1454         if (hi < lo)
1455                 hi = lo + 3;
1456         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1457                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1458         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1459 }
1460
1461 /*
1462  * atl1_configure - Configure Transmit&Receive Unit after Reset
1463  * @adapter: board private structure
1464  *
1465  * Configure the Tx /Rx unit of the MAC after a reset.
1466  */
1467 static u32 atl1_configure(struct atl1_adapter *adapter)
1468 {
1469         struct atl1_hw *hw = &adapter->hw;
1470         u32 value;
1471
1472         /* clear interrupt status */
1473         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1474
1475         /* set MAC Address */
1476         value = (((u32) hw->mac_addr[2]) << 24) |
1477                 (((u32) hw->mac_addr[3]) << 16) |
1478                 (((u32) hw->mac_addr[4]) << 8) |
1479                 (((u32) hw->mac_addr[5]));
1480         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1481         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1482         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1483
1484         /* tx / rx ring */
1485
1486         /* HI base address */
1487         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1488                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1489         /* LO base address */
1490         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1491                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1492         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1493                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1494         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1495                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1496         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1497                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1498         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1499                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1500
1501         /* element count */
1502         value = adapter->rrd_ring.count;
1503         value <<= 16;
1504         value += adapter->rfd_ring.count;
1505         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1506         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1507                 REG_DESC_TPD_RING_SIZE);
1508
1509         /* Load Ptr */
1510         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1511
1512         /* config Mailbox */
1513         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1514                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1515                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1516                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1517                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1518                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1519         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1520
1521         /* config IPG/IFG */
1522         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1523                  << MAC_IPG_IFG_IPGT_SHIFT) |
1524                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1525                 << MAC_IPG_IFG_MIFG_SHIFT) |
1526                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1527                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1528                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1529                 << MAC_IPG_IFG_IPGR2_SHIFT);
1530         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1531
1532         /* config  Half-Duplex Control */
1533         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1534                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1535                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1536                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1537                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1538                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1539                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1540         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1541
1542         /* set Interrupt Moderator Timer */
1543         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1544         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1545
1546         /* set Interrupt Clear Timer */
1547         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1548
1549         /* set max frame size hw will accept */
1550         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1551
1552         /* jumbo size & rrd retirement timer */
1553         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1554                  << RXQ_JMBOSZ_TH_SHIFT) |
1555                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1556                 << RXQ_JMBO_LKAH_SHIFT) |
1557                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1558                 << RXQ_RRD_TIMER_SHIFT);
1559         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1560
1561         /* Flow Control */
1562         switch (hw->dev_rev) {
1563         case 0x8001:
1564         case 0x9001:
1565         case 0x9002:
1566         case 0x9003:
1567                 set_flow_ctrl_old(adapter);
1568                 break;
1569         default:
1570                 set_flow_ctrl_new(hw);
1571                 break;
1572         }
1573
1574         /* config TXQ */
1575         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1576                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1577                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1578                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1579                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1580                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1581                 TXQ_CTRL_EN;
1582         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1583
1584         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1585         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1586                 << TX_JUMBO_TASK_TH_SHIFT) |
1587                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1588                 << TX_TPD_MIN_IPG_SHIFT);
1589         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1590
1591         /* config RXQ */
1592         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1593                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1594                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1595                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1596                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1597                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1598                 RXQ_CTRL_EN;
1599         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1600
1601         /* config DMA Engine */
1602         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1603                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1604                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1605                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1606                 DMA_CTRL_DMAW_EN;
1607         value |= (u32) hw->dma_ord;
1608         if (atl1_rcb_128 == hw->rcb_value)
1609                 value |= DMA_CTRL_RCB_VALUE;
1610         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1611
1612         /* config CMB / SMB */
1613         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1614                 hw->cmb_tpd : adapter->tpd_ring.count;
1615         value <<= 16;
1616         value |= hw->cmb_rrd;
1617         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1618         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1619         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1620         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1621
1622         /* --- enable CMB / SMB */
1623         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1624         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1625
1626         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1627         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1628                 value = 1;      /* config failed */
1629         else
1630                 value = 0;
1631
1632         /* clear all interrupt status */
1633         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1634         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1635         return value;
1636 }
1637
1638 /*
1639  * atl1_pcie_patch - Patch for PCIE module
1640  */
1641 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1642 {
1643         u32 value;
1644
1645         /* much vendor magic here */
1646         value = 0x6500;
1647         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1648         /* pcie flow control mode change */
1649         value = ioread32(adapter->hw.hw_addr + 0x1008);
1650         value |= 0x8000;
1651         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1652 }
1653
1654 /*
1655  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1656  * on PCI Command register is disable.
1657  * The function enable this bit.
1658  * Brackett, 2006/03/15
1659  */
1660 static void atl1_via_workaround(struct atl1_adapter *adapter)
1661 {
1662         unsigned long value;
1663
1664         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1665         if (value & PCI_COMMAND_INTX_DISABLE)
1666                 value &= ~PCI_COMMAND_INTX_DISABLE;
1667         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1668 }
1669
1670 static void atl1_inc_smb(struct atl1_adapter *adapter)
1671 {
1672         struct stats_msg_block *smb = adapter->smb.smb;
1673
1674         /* Fill out the OS statistics structure */
1675         adapter->soft_stats.rx_packets += smb->rx_ok;
1676         adapter->soft_stats.tx_packets += smb->tx_ok;
1677         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1678         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1679         adapter->soft_stats.multicast += smb->rx_mcast;
1680         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1681                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1682
1683         /* Rx Errors */
1684         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1685                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1686                 smb->rx_rrd_ov + smb->rx_align_err);
1687         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1688         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1689         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1690         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1691         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1692                 smb->rx_rxf_ov);
1693
1694         adapter->soft_stats.rx_pause += smb->rx_pause;
1695         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1696         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1697
1698         /* Tx Errors */
1699         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1700                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1701         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1702         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1703         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1704
1705         adapter->soft_stats.excecol += smb->tx_abort_col;
1706         adapter->soft_stats.deffer += smb->tx_defer;
1707         adapter->soft_stats.scc += smb->tx_1_col;
1708         adapter->soft_stats.mcc += smb->tx_2_col;
1709         adapter->soft_stats.latecol += smb->tx_late_col;
1710         adapter->soft_stats.tx_underun += smb->tx_underrun;
1711         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1712         adapter->soft_stats.tx_pause += smb->tx_pause;
1713
1714         adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1715         adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1716         adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1717         adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1718         adapter->net_stats.multicast = adapter->soft_stats.multicast;
1719         adapter->net_stats.collisions = adapter->soft_stats.collisions;
1720         adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1721         adapter->net_stats.rx_over_errors =
1722                 adapter->soft_stats.rx_missed_errors;
1723         adapter->net_stats.rx_length_errors =
1724                 adapter->soft_stats.rx_length_errors;
1725         adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1726         adapter->net_stats.rx_frame_errors =
1727                 adapter->soft_stats.rx_frame_errors;
1728         adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1729         adapter->net_stats.rx_missed_errors =
1730                 adapter->soft_stats.rx_missed_errors;
1731         adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1732         adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1733         adapter->net_stats.tx_aborted_errors =
1734                 adapter->soft_stats.tx_aborted_errors;
1735         adapter->net_stats.tx_window_errors =
1736                 adapter->soft_stats.tx_window_errors;
1737         adapter->net_stats.tx_carrier_errors =
1738                 adapter->soft_stats.tx_carrier_errors;
1739 }
1740
1741 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1742 {
1743         unsigned long flags;
1744         u32 tpd_next_to_use;
1745         u32 rfd_next_to_use;
1746         u32 rrd_next_to_clean;
1747         u32 value;
1748
1749         spin_lock_irqsave(&adapter->mb_lock, flags);
1750
1751         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1752         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1753         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1754
1755         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1756                 MB_RFD_PROD_INDX_SHIFT) |
1757                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1758                 MB_RRD_CONS_INDX_SHIFT) |
1759                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1760                 MB_TPD_PROD_INDX_SHIFT);
1761         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1762
1763         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1764 }
1765
1766 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1767         struct rx_return_desc *rrd, u16 offset)
1768 {
1769         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1770
1771         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1772                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1773                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1774                         rfd_ring->next_to_clean = 0;
1775                 }
1776         }
1777 }
1778
1779 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1780         struct rx_return_desc *rrd)
1781 {
1782         u16 num_buf;
1783
1784         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1785                 adapter->rx_buffer_len;
1786         if (rrd->num_buf == num_buf)
1787                 /* clean alloc flag for bad rrd */
1788                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1789 }
1790
1791 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1792         struct rx_return_desc *rrd, struct sk_buff *skb)
1793 {
1794         struct pci_dev *pdev = adapter->pdev;
1795
1796         skb->ip_summed = CHECKSUM_NONE;
1797
1798         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1799                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1800                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1801                         adapter->hw_csum_err++;
1802                         if (netif_msg_rx_err(adapter))
1803                                 dev_printk(KERN_DEBUG, &pdev->dev,
1804                                         "rx checksum error\n");
1805                         return;
1806                 }
1807         }
1808
1809         /* not IPv4 */
1810         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1811                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1812                 return;
1813
1814         /* IPv4 packet */
1815         if (likely(!(rrd->err_flg &
1816                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1817                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1818                 adapter->hw_csum_good++;
1819                 return;
1820         }
1821
1822         /* IPv4, but hardware thinks its checksum is wrong */
1823         if (netif_msg_rx_err(adapter))
1824                 dev_printk(KERN_DEBUG, &pdev->dev,
1825                         "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1826                         rrd->pkt_flg, rrd->err_flg);
1827         skb->ip_summed = CHECKSUM_COMPLETE;
1828         skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1829         adapter->hw_csum_err++;
1830         return;
1831 }
1832
1833 /*
1834  * atl1_alloc_rx_buffers - Replace used receive buffers
1835  * @adapter: address of board private structure
1836  */
1837 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1838 {
1839         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1840         struct pci_dev *pdev = adapter->pdev;
1841         struct page *page;
1842         unsigned long offset;
1843         struct atl1_buffer *buffer_info, *next_info;
1844         struct sk_buff *skb;
1845         u16 num_alloc = 0;
1846         u16 rfd_next_to_use, next_next;
1847         struct rx_free_desc *rfd_desc;
1848
1849         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1850         if (++next_next == rfd_ring->count)
1851                 next_next = 0;
1852         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1853         next_info = &rfd_ring->buffer_info[next_next];
1854
1855         while (!buffer_info->alloced && !next_info->alloced) {
1856                 if (buffer_info->skb) {
1857                         buffer_info->alloced = 1;
1858                         goto next;
1859                 }
1860
1861                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1862
1863                 skb = netdev_alloc_skb(adapter->netdev,
1864                                        adapter->rx_buffer_len + NET_IP_ALIGN);
1865                 if (unlikely(!skb)) {
1866                         /* Better luck next round */
1867                         adapter->net_stats.rx_dropped++;
1868                         break;
1869                 }
1870
1871                 /*
1872                  * Make buffer alignment 2 beyond a 16 byte boundary
1873                  * this will result in a 16 byte aligned IP header after
1874                  * the 14 byte MAC header is removed
1875                  */
1876                 skb_reserve(skb, NET_IP_ALIGN);
1877
1878                 buffer_info->alloced = 1;
1879                 buffer_info->skb = skb;
1880                 buffer_info->length = (u16) adapter->rx_buffer_len;
1881                 page = virt_to_page(skb->data);
1882                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1883                 buffer_info->dma = pci_map_page(pdev, page, offset,
1884                                                 adapter->rx_buffer_len,
1885                                                 PCI_DMA_FROMDEVICE);
1886                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1887                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1888                 rfd_desc->coalese = 0;
1889
1890 next:
1891                 rfd_next_to_use = next_next;
1892                 if (unlikely(++next_next == rfd_ring->count))
1893                         next_next = 0;
1894
1895                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1896                 next_info = &rfd_ring->buffer_info[next_next];
1897                 num_alloc++;
1898         }
1899
1900         if (num_alloc) {
1901                 /*
1902                  * Force memory writes to complete before letting h/w
1903                  * know there are new descriptors to fetch.  (Only
1904                  * applicable for weak-ordered memory model archs,
1905                  * such as IA-64).
1906                  */
1907                 wmb();
1908                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1909         }
1910         return num_alloc;
1911 }
1912
1913 static void atl1_intr_rx(struct atl1_adapter *adapter)
1914 {
1915         int i, count;
1916         u16 length;
1917         u16 rrd_next_to_clean;
1918         u32 value;
1919         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1920         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1921         struct atl1_buffer *buffer_info;
1922         struct rx_return_desc *rrd;
1923         struct sk_buff *skb;
1924
1925         count = 0;
1926
1927         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1928
1929         while (1) {
1930                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1931                 i = 1;
1932                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1933 chk_rrd:
1934                         /* check rrd status */
1935                         if (likely(rrd->num_buf == 1))
1936                                 goto rrd_ok;
1937                         else if (netif_msg_rx_err(adapter)) {
1938                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1939                                         "unexpected RRD buffer count\n");
1940                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1941                                         "rx_buf_len = %d\n",
1942                                         adapter->rx_buffer_len);
1943                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1944                                         "RRD num_buf = %d\n",
1945                                         rrd->num_buf);
1946                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1947                                         "RRD pkt_len = %d\n",
1948                                         rrd->xsz.xsum_sz.pkt_size);
1949                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1950                                         "RRD pkt_flg = 0x%08X\n",
1951                                         rrd->pkt_flg);
1952                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1953                                         "RRD err_flg = 0x%08X\n",
1954                                         rrd->err_flg);
1955                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1956                                         "RRD vlan_tag = 0x%08X\n",
1957                                         rrd->vlan_tag);
1958                         }
1959
1960                         /* rrd seems to be bad */
1961                         if (unlikely(i-- > 0)) {
1962                                 /* rrd may not be DMAed completely */
1963                                 udelay(1);
1964                                 goto chk_rrd;
1965                         }
1966                         /* bad rrd */
1967                         if (netif_msg_rx_err(adapter))
1968                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1969                                         "bad RRD\n");
1970                         /* see if update RFD index */
1971                         if (rrd->num_buf > 1)
1972                                 atl1_update_rfd_index(adapter, rrd);
1973
1974                         /* update rrd */
1975                         rrd->xsz.valid = 0;
1976                         if (++rrd_next_to_clean == rrd_ring->count)
1977                                 rrd_next_to_clean = 0;
1978                         count++;
1979                         continue;
1980                 } else {        /* current rrd still not be updated */
1981
1982                         break;
1983                 }
1984 rrd_ok:
1985                 /* clean alloc flag for bad rrd */
1986                 atl1_clean_alloc_flag(adapter, rrd, 0);
1987
1988                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1989                 if (++rfd_ring->next_to_clean == rfd_ring->count)
1990                         rfd_ring->next_to_clean = 0;
1991
1992                 /* update rrd next to clean */
1993                 if (++rrd_next_to_clean == rrd_ring->count)
1994                         rrd_next_to_clean = 0;
1995                 count++;
1996
1997                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1998                         if (!(rrd->err_flg &
1999                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
2000                                 | ERR_FLAG_LEN))) {
2001                                 /* packet error, don't need upstream */
2002                                 buffer_info->alloced = 0;
2003                                 rrd->xsz.valid = 0;
2004                                 continue;
2005                         }
2006                 }
2007
2008                 /* Good Receive */
2009                 pci_unmap_page(adapter->pdev, buffer_info->dma,
2010                                buffer_info->length, PCI_DMA_FROMDEVICE);
2011                 buffer_info->dma = 0;
2012                 skb = buffer_info->skb;
2013                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
2014
2015                 skb_put(skb, length - ETH_FCS_LEN);
2016
2017                 /* Receive Checksum Offload */
2018                 atl1_rx_checksum(adapter, rrd, skb);
2019                 skb->protocol = eth_type_trans(skb, adapter->netdev);
2020
2021                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
2022                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
2023                                         ((rrd->vlan_tag & 7) << 13) |
2024                                         ((rrd->vlan_tag & 8) << 9);
2025                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
2026                 } else
2027                         netif_rx(skb);
2028
2029                 /* let protocol layer free skb */
2030                 buffer_info->skb = NULL;
2031                 buffer_info->alloced = 0;
2032                 rrd->xsz.valid = 0;
2033
2034                 adapter->netdev->last_rx = jiffies;
2035         }
2036
2037         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
2038
2039         atl1_alloc_rx_buffers(adapter);
2040
2041         /* update mailbox ? */
2042         if (count) {
2043                 u32 tpd_next_to_use;
2044                 u32 rfd_next_to_use;
2045
2046                 spin_lock(&adapter->mb_lock);
2047
2048                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
2049                 rfd_next_to_use =
2050                     atomic_read(&adapter->rfd_ring.next_to_use);
2051                 rrd_next_to_clean =
2052                     atomic_read(&adapter->rrd_ring.next_to_clean);
2053                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
2054                         MB_RFD_PROD_INDX_SHIFT) |
2055                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
2056                         MB_RRD_CONS_INDX_SHIFT) |
2057                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
2058                         MB_TPD_PROD_INDX_SHIFT);
2059                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
2060                 spin_unlock(&adapter->mb_lock);
2061         }
2062 }
2063
2064 static void atl1_intr_tx(struct atl1_adapter *adapter)
2065 {
2066         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2067         struct atl1_buffer *buffer_info;
2068         u16 sw_tpd_next_to_clean;
2069         u16 cmb_tpd_next_to_clean;
2070
2071         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2072         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
2073
2074         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
2075                 struct tx_packet_desc *tpd;
2076
2077                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
2078                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
2079                 if (buffer_info->dma) {
2080                         pci_unmap_page(adapter->pdev, buffer_info->dma,
2081                                        buffer_info->length, PCI_DMA_TODEVICE);
2082                         buffer_info->dma = 0;
2083                 }
2084
2085                 if (buffer_info->skb) {
2086                         dev_kfree_skb_irq(buffer_info->skb);
2087                         buffer_info->skb = NULL;
2088                 }
2089
2090                 if (++sw_tpd_next_to_clean == tpd_ring->count)
2091                         sw_tpd_next_to_clean = 0;
2092         }
2093         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
2094
2095         if (netif_queue_stopped(adapter->netdev)
2096             && netif_carrier_ok(adapter->netdev))
2097                 netif_wake_queue(adapter->netdev);
2098 }
2099
2100 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
2101 {
2102         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2103         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
2104         return ((next_to_clean > next_to_use) ?
2105                 next_to_clean - next_to_use - 1 :
2106                 tpd_ring->count + next_to_clean - next_to_use - 1);
2107 }
2108
2109 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
2110         struct tx_packet_desc *ptpd)
2111 {
2112         /* spinlock held */
2113         u8 hdr_len, ip_off;
2114         u32 real_len;
2115         int err;
2116
2117         if (skb_shinfo(skb)->gso_size) {
2118                 if (skb_header_cloned(skb)) {
2119                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2120                         if (unlikely(err))
2121                                 return -1;
2122                 }
2123
2124                 if (skb->protocol == htons(ETH_P_IP)) {
2125                         struct iphdr *iph = ip_hdr(skb);
2126
2127                         real_len = (((unsigned char *)iph - skb->data) +
2128                                 ntohs(iph->tot_len));
2129                         if (real_len < skb->len)
2130                                 pskb_trim(skb, real_len);
2131                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2132                         if (skb->len == hdr_len) {
2133                                 iph->check = 0;
2134                                 tcp_hdr(skb)->check =
2135                                         ~csum_tcpudp_magic(iph->saddr,
2136                                         iph->daddr, tcp_hdrlen(skb),
2137                                         IPPROTO_TCP, 0);
2138                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2139                                         TPD_IPHL_SHIFT;
2140                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2141                                         TPD_TCPHDRLEN_MASK) <<
2142                                         TPD_TCPHDRLEN_SHIFT;
2143                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2144                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2145                                 return 1;
2146                         }
2147
2148                         iph->check = 0;
2149                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2150                                         iph->daddr, 0, IPPROTO_TCP, 0);
2151                         ip_off = (unsigned char *)iph -
2152                                 (unsigned char *) skb_network_header(skb);
2153                         if (ip_off == 8) /* 802.3-SNAP frame */
2154                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2155                         else if (ip_off != 0)
2156                                 return -2;
2157
2158                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2159                                 TPD_IPHL_SHIFT;
2160                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2161                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2162                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2163                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2164                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2165                         return 3;
2166                 }
2167         }
2168         return false;
2169 }
2170
2171 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2172         struct tx_packet_desc *ptpd)
2173 {
2174         u8 css, cso;
2175
2176         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2177                 css = (u8) (skb->csum_start - skb_headroom(skb));
2178                 cso = css + (u8) skb->csum_offset;
2179                 if (unlikely(css & 0x1)) {
2180                         /* L1 hardware requires an even number here */
2181                         if (netif_msg_tx_err(adapter))
2182                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2183                                         "payload offset not an even number\n");
2184                         return -1;
2185                 }
2186                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2187                         TPD_PLOADOFFSET_SHIFT;
2188                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2189                         TPD_CCSUMOFFSET_SHIFT;
2190                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2191                 return true;
2192         }
2193         return 0;
2194 }
2195
2196 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2197         struct tx_packet_desc *ptpd)
2198 {
2199         /* spinlock held */
2200         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2201         struct atl1_buffer *buffer_info;
2202         u16 buf_len = skb->len;
2203         struct page *page;
2204         unsigned long offset;
2205         unsigned int nr_frags;
2206         unsigned int f;
2207         int retval;
2208         u16 next_to_use;
2209         u16 data_len;
2210         u8 hdr_len;
2211
2212         buf_len -= skb->data_len;
2213         nr_frags = skb_shinfo(skb)->nr_frags;
2214         next_to_use = atomic_read(&tpd_ring->next_to_use);
2215         buffer_info = &tpd_ring->buffer_info[next_to_use];
2216         if (unlikely(buffer_info->skb))
2217                 BUG();
2218         /* put skb in last TPD */
2219         buffer_info->skb = NULL;
2220
2221         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2222         if (retval) {
2223                 /* TSO */
2224                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2225                 buffer_info->length = hdr_len;
2226                 page = virt_to_page(skb->data);
2227                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2228                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2229                                                 offset, hdr_len,
2230                                                 PCI_DMA_TODEVICE);
2231
2232                 if (++next_to_use == tpd_ring->count)
2233                         next_to_use = 0;
2234
2235                 if (buf_len > hdr_len) {
2236                         int i, nseg;
2237
2238                         data_len = buf_len - hdr_len;
2239                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2240                                 ATL1_MAX_TX_BUF_LEN;
2241                         for (i = 0; i < nseg; i++) {
2242                                 buffer_info =
2243                                     &tpd_ring->buffer_info[next_to_use];
2244                                 buffer_info->skb = NULL;
2245                                 buffer_info->length =
2246                                     (ATL1_MAX_TX_BUF_LEN >=
2247                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2248                                 data_len -= buffer_info->length;
2249                                 page = virt_to_page(skb->data +
2250                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2251                                 offset = (unsigned long)(skb->data +
2252                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2253                                         ~PAGE_MASK;
2254                                 buffer_info->dma = pci_map_page(adapter->pdev,
2255                                         page, offset, buffer_info->length,
2256                                         PCI_DMA_TODEVICE);
2257                                 if (++next_to_use == tpd_ring->count)
2258                                         next_to_use = 0;
2259                         }
2260                 }
2261         } else {
2262                 /* not TSO */
2263                 buffer_info->length = buf_len;
2264                 page = virt_to_page(skb->data);
2265                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2266                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2267                         offset, buf_len, PCI_DMA_TODEVICE);
2268                 if (++next_to_use == tpd_ring->count)
2269                         next_to_use = 0;
2270         }
2271
2272         for (f = 0; f < nr_frags; f++) {
2273                 struct skb_frag_struct *frag;
2274                 u16 i, nseg;
2275
2276                 frag = &skb_shinfo(skb)->frags[f];
2277                 buf_len = frag->size;
2278
2279                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2280                         ATL1_MAX_TX_BUF_LEN;
2281                 for (i = 0; i < nseg; i++) {
2282                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2283                         if (unlikely(buffer_info->skb))
2284                                 BUG();
2285                         buffer_info->skb = NULL;
2286                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2287                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2288                         buf_len -= buffer_info->length;
2289                         buffer_info->dma = pci_map_page(adapter->pdev,
2290                                 frag->page,
2291                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2292                                 buffer_info->length, PCI_DMA_TODEVICE);
2293
2294                         if (++next_to_use == tpd_ring->count)
2295                                 next_to_use = 0;
2296                 }
2297         }
2298
2299         /* last tpd's buffer-info */
2300         buffer_info->skb = skb;
2301 }
2302
2303 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2304        struct tx_packet_desc *ptpd)
2305 {
2306         /* spinlock held */
2307         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2308         struct atl1_buffer *buffer_info;
2309         struct tx_packet_desc *tpd;
2310         u16 j;
2311         u32 val;
2312         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2313
2314         for (j = 0; j < count; j++) {
2315                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2316                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2317                 if (tpd != ptpd)
2318                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2319                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2320                 tpd->word2 = (cpu_to_le16(buffer_info->length) &
2321                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2322
2323                 /*
2324                  * if this is the first packet in a TSO chain, set
2325                  * TPD_HDRFLAG, otherwise, clear it.
2326                  */
2327                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2328                         TPD_SEGMENT_EN_MASK;
2329                 if (val) {
2330                         if (!j)
2331                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2332                         else
2333                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2334                 }
2335
2336                 if (j == (count - 1))
2337                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2338
2339                 if (++next_to_use == tpd_ring->count)
2340                         next_to_use = 0;
2341         }
2342         /*
2343          * Force memory writes to complete before letting h/w
2344          * know there are new descriptors to fetch.  (Only
2345          * applicable for weak-ordered memory model archs,
2346          * such as IA-64).
2347          */
2348         wmb();
2349
2350         atomic_set(&tpd_ring->next_to_use, next_to_use);
2351 }
2352
2353 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2354 {
2355         struct atl1_adapter *adapter = netdev_priv(netdev);
2356         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2357         int len = skb->len;
2358         int tso;
2359         int count = 1;
2360         int ret_val;
2361         struct tx_packet_desc *ptpd;
2362         u16 frag_size;
2363         u16 vlan_tag;
2364         unsigned long flags;
2365         unsigned int nr_frags = 0;
2366         unsigned int mss = 0;
2367         unsigned int f;
2368         unsigned int proto_hdr_len;
2369
2370         len -= skb->data_len;
2371
2372         if (unlikely(skb->len <= 0)) {
2373                 dev_kfree_skb_any(skb);
2374                 return NETDEV_TX_OK;
2375         }
2376
2377         nr_frags = skb_shinfo(skb)->nr_frags;
2378         for (f = 0; f < nr_frags; f++) {
2379                 frag_size = skb_shinfo(skb)->frags[f].size;
2380                 if (frag_size)
2381                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2382                                 ATL1_MAX_TX_BUF_LEN;
2383         }
2384
2385         mss = skb_shinfo(skb)->gso_size;
2386         if (mss) {
2387                 if (skb->protocol == ntohs(ETH_P_IP)) {
2388                         proto_hdr_len = (skb_transport_offset(skb) +
2389                                          tcp_hdrlen(skb));
2390                         if (unlikely(proto_hdr_len > len)) {
2391                                 dev_kfree_skb_any(skb);
2392                                 return NETDEV_TX_OK;
2393                         }
2394                         /* need additional TPD ? */
2395                         if (proto_hdr_len != len)
2396                                 count += (len - proto_hdr_len +
2397                                         ATL1_MAX_TX_BUF_LEN - 1) /
2398                                         ATL1_MAX_TX_BUF_LEN;
2399                 }
2400         }
2401
2402         if (!spin_trylock_irqsave(&adapter->lock, flags)) {
2403                 /* Can't get lock - tell upper layer to requeue */
2404                 if (netif_msg_tx_queued(adapter))
2405                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2406                                 "tx locked\n");
2407                 return NETDEV_TX_LOCKED;
2408         }
2409
2410         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2411                 /* not enough descriptors */
2412                 netif_stop_queue(netdev);
2413                 spin_unlock_irqrestore(&adapter->lock, flags);
2414                 if (netif_msg_tx_queued(adapter))
2415                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2416                                 "tx busy\n");
2417                 return NETDEV_TX_BUSY;
2418         }
2419
2420         ptpd = ATL1_TPD_DESC(tpd_ring,
2421                 (u16) atomic_read(&tpd_ring->next_to_use));
2422         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2423
2424         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2425                 vlan_tag = vlan_tx_tag_get(skb);
2426                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2427                         ((vlan_tag >> 9) & 0x8);
2428                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2429                 ptpd->word3 |= (vlan_tag & TPD_VL_TAGGED_MASK) <<
2430                         TPD_VL_TAGGED_SHIFT;
2431         }
2432
2433         tso = atl1_tso(adapter, skb, ptpd);
2434         if (tso < 0) {
2435                 spin_unlock_irqrestore(&adapter->lock, flags);
2436                 dev_kfree_skb_any(skb);
2437                 return NETDEV_TX_OK;
2438         }
2439
2440         if (!tso) {
2441                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2442                 if (ret_val < 0) {
2443                         spin_unlock_irqrestore(&adapter->lock, flags);
2444                         dev_kfree_skb_any(skb);
2445                         return NETDEV_TX_OK;
2446                 }
2447         }
2448
2449         atl1_tx_map(adapter, skb, ptpd);
2450         atl1_tx_queue(adapter, count, ptpd);
2451         atl1_update_mailbox(adapter);
2452         spin_unlock_irqrestore(&adapter->lock, flags);
2453         netdev->trans_start = jiffies;
2454         return NETDEV_TX_OK;
2455 }
2456
2457 /*
2458  * atl1_intr - Interrupt Handler
2459  * @irq: interrupt number
2460  * @data: pointer to a network interface device structure
2461  * @pt_regs: CPU registers structure
2462  */
2463 static irqreturn_t atl1_intr(int irq, void *data)
2464 {
2465         struct atl1_adapter *adapter = netdev_priv(data);
2466         u32 status;
2467         int max_ints = 10;
2468
2469         status = adapter->cmb.cmb->int_stats;
2470         if (!status)
2471                 return IRQ_NONE;
2472
2473         do {
2474                 /* clear CMB interrupt status at once */
2475                 adapter->cmb.cmb->int_stats = 0;
2476
2477                 if (status & ISR_GPHY)  /* clear phy status */
2478                         atlx_clear_phy_int(adapter);
2479
2480                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2481                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2482
2483                 /* check if SMB intr */
2484                 if (status & ISR_SMB)
2485                         atl1_inc_smb(adapter);
2486
2487                 /* check if PCIE PHY Link down */
2488                 if (status & ISR_PHY_LINKDOWN) {
2489                         if (netif_msg_intr(adapter))
2490                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2491                                         "pcie phy link down %x\n", status);
2492                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2493                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2494                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2495                                 return IRQ_HANDLED;
2496                         }
2497                 }
2498
2499                 /* check if DMA read/write error ? */
2500                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2501                         if (netif_msg_intr(adapter))
2502                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2503                                         "pcie DMA r/w error (status = 0x%x)\n",
2504                                         status);
2505                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2506                         schedule_work(&adapter->pcie_dma_to_rst_task);
2507                         return IRQ_HANDLED;
2508                 }
2509
2510                 /* link event */
2511                 if (status & ISR_GPHY) {
2512                         adapter->soft_stats.tx_carrier_errors++;
2513                         atl1_check_for_link(adapter);
2514                 }
2515
2516                 /* transmit event */
2517                 if (status & ISR_CMB_TX)
2518                         atl1_intr_tx(adapter);
2519
2520                 /* rx exception */
2521                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2522                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2523                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2524                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2525                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2526                                 ISR_HOST_RRD_OV))
2527                                 if (netif_msg_intr(adapter))
2528                                         dev_printk(KERN_DEBUG,
2529                                                 &adapter->pdev->dev,
2530                                                 "rx exception, ISR = 0x%x\n",
2531                                                 status);
2532                         atl1_intr_rx(adapter);
2533                 }
2534
2535                 if (--max_ints < 0)
2536                         break;
2537
2538         } while ((status = adapter->cmb.cmb->int_stats));
2539
2540         /* re-enable Interrupt */
2541         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2542         return IRQ_HANDLED;
2543 }
2544
2545 /*
2546  * atl1_watchdog - Timer Call-back
2547  * @data: pointer to netdev cast into an unsigned long
2548  */
2549 static void atl1_watchdog(unsigned long data)
2550 {
2551         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2552
2553         /* Reset the timer */
2554         mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2555 }
2556
2557 /*
2558  * atl1_phy_config - Timer Call-back
2559  * @data: pointer to netdev cast into an unsigned long
2560  */
2561 static void atl1_phy_config(unsigned long data)
2562 {
2563         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2564         struct atl1_hw *hw = &adapter->hw;
2565         unsigned long flags;
2566
2567         spin_lock_irqsave(&adapter->lock, flags);
2568         adapter->phy_timer_pending = false;
2569         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2570         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2571         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2572         spin_unlock_irqrestore(&adapter->lock, flags);
2573 }
2574
2575 /*
2576  * Orphaned vendor comment left intact here:
2577  * <vendor comment>
2578  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2579  * will assert. We do soft reset <0x1400=1> according
2580  * with the SPEC. BUT, it seemes that PCIE or DMA
2581  * state-machine will not be reset. DMAR_TO_INT will
2582  * assert again and again.
2583  * </vendor comment>
2584  */
2585
2586 static int atl1_reset(struct atl1_adapter *adapter)
2587 {
2588         int ret;
2589         ret = atl1_reset_hw(&adapter->hw);
2590         if (ret)
2591                 return ret;
2592         return atl1_init_hw(&adapter->hw);
2593 }
2594
2595 static s32 atl1_up(struct atl1_adapter *adapter)
2596 {
2597         struct net_device *netdev = adapter->netdev;
2598         int err;
2599         int irq_flags = IRQF_SAMPLE_RANDOM;
2600
2601         /* hardware has been reset, we need to reload some things */
2602         atlx_set_multi(netdev);
2603         atl1_init_ring_ptrs(adapter);
2604         atlx_restore_vlan(adapter);
2605         err = atl1_alloc_rx_buffers(adapter);
2606         if (unlikely(!err))
2607                 /* no RX BUFFER allocated */
2608                 return -ENOMEM;
2609
2610         if (unlikely(atl1_configure(adapter))) {
2611                 err = -EIO;
2612                 goto err_up;
2613         }
2614
2615         err = pci_enable_msi(adapter->pdev);
2616         if (err) {
2617                 if (netif_msg_ifup(adapter))
2618                         dev_info(&adapter->pdev->dev,
2619                                 "Unable to enable MSI: %d\n", err);
2620                 irq_flags |= IRQF_SHARED;
2621         }
2622
2623         err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
2624                         netdev->name, netdev);
2625         if (unlikely(err))
2626                 goto err_up;
2627
2628         mod_timer(&adapter->watchdog_timer, jiffies);
2629         atlx_irq_enable(adapter);
2630         atl1_check_link(adapter);
2631         return 0;
2632
2633 err_up:
2634         pci_disable_msi(adapter->pdev);
2635         /* free rx_buffers */
2636         atl1_clean_rx_ring(adapter);
2637         return err;
2638 }
2639
2640 static void atl1_down(struct atl1_adapter *adapter)
2641 {
2642         struct net_device *netdev = adapter->netdev;
2643
2644         del_timer_sync(&adapter->watchdog_timer);
2645         del_timer_sync(&adapter->phy_config_timer);
2646         adapter->phy_timer_pending = false;
2647
2648         atlx_irq_disable(adapter);
2649         free_irq(adapter->pdev->irq, netdev);
2650         pci_disable_msi(adapter->pdev);
2651         atl1_reset_hw(&adapter->hw);
2652         adapter->cmb.cmb->int_stats = 0;
2653
2654         adapter->link_speed = SPEED_0;
2655         adapter->link_duplex = -1;
2656         netif_carrier_off(netdev);
2657         netif_stop_queue(netdev);
2658
2659         atl1_clean_tx_ring(adapter);
2660         atl1_clean_rx_ring(adapter);
2661 }
2662
2663 static void atl1_tx_timeout_task(struct work_struct *work)
2664 {
2665         struct atl1_adapter *adapter =
2666                 container_of(work, struct atl1_adapter, tx_timeout_task);
2667         struct net_device *netdev = adapter->netdev;
2668
2669         netif_device_detach(netdev);
2670         atl1_down(adapter);
2671         atl1_up(adapter);
2672         netif_device_attach(netdev);
2673 }
2674
2675 /*
2676  * atl1_change_mtu - Change the Maximum Transfer Unit
2677  * @netdev: network interface device structure
2678  * @new_mtu: new value for maximum frame size
2679  *
2680  * Returns 0 on success, negative on failure
2681  */
2682 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2683 {
2684         struct atl1_adapter *adapter = netdev_priv(netdev);
2685         int old_mtu = netdev->mtu;
2686         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2687
2688         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2689             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2690                 if (netif_msg_link(adapter))
2691                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2692                 return -EINVAL;
2693         }
2694
2695         adapter->hw.max_frame_size = max_frame;
2696         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2697         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2698         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2699
2700         netdev->mtu = new_mtu;
2701         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2702                 atl1_down(adapter);
2703                 atl1_up(adapter);
2704         }
2705
2706         return 0;
2707 }
2708
2709 /*
2710  * atl1_open - Called when a network interface is made active
2711  * @netdev: network interface device structure
2712  *
2713  * Returns 0 on success, negative value on failure
2714  *
2715  * The open entry point is called when a network interface is made
2716  * active by the system (IFF_UP).  At this point all resources needed
2717  * for transmit and receive operations are allocated, the interrupt
2718  * handler is registered with the OS, the watchdog timer is started,
2719  * and the stack is notified that the interface is ready.
2720  */
2721 static int atl1_open(struct net_device *netdev)
2722 {
2723         struct atl1_adapter *adapter = netdev_priv(netdev);
2724         int err;
2725
2726         /* allocate transmit descriptors */
2727         err = atl1_setup_ring_resources(adapter);
2728         if (err)
2729                 return err;
2730
2731         err = atl1_up(adapter);
2732         if (err)
2733                 goto err_up;
2734
2735         return 0;
2736
2737 err_up:
2738         atl1_reset(adapter);
2739         return err;
2740 }
2741
2742 /*
2743  * atl1_close - Disables a network interface
2744  * @netdev: network interface device structure
2745  *
2746  * Returns 0, this is not allowed to fail
2747  *
2748  * The close entry point is called when an interface is de-activated
2749  * by the OS.  The hardware is still under the drivers control, but
2750  * needs to be disabled.  A global MAC reset is issued to stop the
2751  * hardware, and all transmit and receive resources are freed.
2752  */
2753 static int atl1_close(struct net_device *netdev)
2754 {
2755         struct atl1_adapter *adapter = netdev_priv(netdev);
2756         atl1_down(adapter);
2757         atl1_free_ring_resources(adapter);
2758         return 0;
2759 }
2760
2761 #ifdef CONFIG_PM
2762 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2763 {
2764         struct net_device *netdev = pci_get_drvdata(pdev);
2765         struct atl1_adapter *adapter = netdev_priv(netdev);
2766         struct atl1_hw *hw = &adapter->hw;
2767         u32 ctrl = 0;
2768         u32 wufc = adapter->wol;
2769         u32 val;
2770         int retval;
2771         u16 speed;
2772         u16 duplex;
2773
2774         netif_device_detach(netdev);
2775         if (netif_running(netdev))
2776                 atl1_down(adapter);
2777
2778         retval = pci_save_state(pdev);
2779         if (retval)
2780                 return retval;
2781
2782         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2783         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2784         val = ctrl & BMSR_LSTATUS;
2785         if (val)
2786                 wufc &= ~ATLX_WUFC_LNKC;
2787
2788         if (val && wufc) {
2789                 val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
2790                 if (val) {
2791                         if (netif_msg_ifdown(adapter))
2792                                 dev_printk(KERN_DEBUG, &pdev->dev,
2793                                         "error getting speed/duplex\n");
2794                         goto disable_wol;
2795                 }
2796
2797                 ctrl = 0;
2798
2799                 /* enable magic packet WOL */
2800                 if (wufc & ATLX_WUFC_MAG)
2801                         ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
2802                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2803                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2804
2805                 /* configure the mac */
2806                 ctrl = MAC_CTRL_RX_EN;
2807                 ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
2808                         MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
2809                 if (duplex == FULL_DUPLEX)
2810                         ctrl |= MAC_CTRL_DUPLX;
2811                 ctrl |= (((u32)adapter->hw.preamble_len &
2812                         MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
2813                 if (adapter->vlgrp)
2814                         ctrl |= MAC_CTRL_RMV_VLAN;
2815                 if (wufc & ATLX_WUFC_MAG)
2816                         ctrl |= MAC_CTRL_BC_EN;
2817                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2818                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2819
2820                 /* poke the PHY */
2821                 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2822                 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2823                 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2824                 ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2825
2826                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2827                 goto exit;
2828         }
2829
2830         if (!val && wufc) {
2831                 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2832                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2833                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2834                 iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
2835                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2836                 hw->phy_configured = false;
2837                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2838                 goto exit;
2839         }
2840
2841 disable_wol:
2842         iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2843         ioread32(hw->hw_addr + REG_WOL_CTRL);
2844         ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2845         ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2846         iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2847         ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2848         hw->phy_configured = false;
2849         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2850 exit:
2851         if (netif_running(netdev))
2852                 pci_disable_msi(adapter->pdev);
2853         pci_disable_device(pdev);
2854         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2855
2856         return 0;
2857 }
2858
2859 static int atl1_resume(struct pci_dev *pdev)
2860 {
2861         struct net_device *netdev = pci_get_drvdata(pdev);
2862         struct atl1_adapter *adapter = netdev_priv(netdev);
2863         u32 err;
2864
2865         pci_set_power_state(pdev, PCI_D0);
2866         pci_restore_state(pdev);
2867
2868         err = pci_enable_device(pdev);
2869         if (err) {
2870                 if (netif_msg_ifup(adapter))
2871                         dev_printk(KERN_DEBUG, &pdev->dev,
2872                                 "error enabling pci device\n");
2873                 return err;
2874         }
2875
2876         pci_set_master(pdev);
2877         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2878         pci_enable_wake(pdev, PCI_D3hot, 0);
2879         pci_enable_wake(pdev, PCI_D3cold, 0);
2880
2881         atl1_reset_hw(&adapter->hw);
2882         adapter->cmb.cmb->int_stats = 0;
2883
2884         if (netif_running(netdev))
2885                 atl1_up(adapter);
2886         netif_device_attach(netdev);
2887
2888         return 0;
2889 }
2890 #else
2891 #define atl1_suspend NULL
2892 #define atl1_resume NULL
2893 #endif
2894
2895 static void atl1_shutdown(struct pci_dev *pdev)
2896 {
2897 #ifdef CONFIG_PM
2898         atl1_suspend(pdev, PMSG_SUSPEND);
2899 #endif
2900 }
2901
2902 #ifdef CONFIG_NET_POLL_CONTROLLER
2903 static void atl1_poll_controller(struct net_device *netdev)
2904 {
2905         disable_irq(netdev->irq);
2906         atl1_intr(netdev->irq, netdev);
2907         enable_irq(netdev->irq);
2908 }
2909 #endif
2910
2911 /*
2912  * atl1_probe - Device Initialization Routine
2913  * @pdev: PCI device information struct
2914  * @ent: entry in atl1_pci_tbl
2915  *
2916  * Returns 0 on success, negative on failure
2917  *
2918  * atl1_probe initializes an adapter identified by a pci_dev structure.
2919  * The OS initialization, configuring of the adapter private structure,
2920  * and a hardware reset occur.
2921  */
2922 static int __devinit atl1_probe(struct pci_dev *pdev,
2923         const struct pci_device_id *ent)
2924 {
2925         struct net_device *netdev;
2926         struct atl1_adapter *adapter;
2927         static int cards_found = 0;
2928         int err;
2929
2930         err = pci_enable_device(pdev);
2931         if (err)
2932                 return err;
2933
2934         /*
2935          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2936          * shared register for the high 32 bits, so only a single, aligned,
2937          * 4 GB physical address range can be used at a time.
2938          *
2939          * Supporting 64-bit DMA on this hardware is more trouble than it's
2940          * worth.  It is far easier to limit to 32-bit DMA than update
2941          * various kernel subsystems to support the mechanics required by a
2942          * fixed-high-32-bit system.
2943          */
2944         err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2945         if (err) {
2946                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2947                 goto err_dma;
2948         }
2949         /*
2950          * Mark all PCI regions associated with PCI device
2951          * pdev as being reserved by owner atl1_driver_name
2952          */
2953         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2954         if (err)
2955                 goto err_request_regions;
2956
2957         /*
2958          * Enables bus-mastering on the device and calls
2959          * pcibios_set_master to do the needed arch specific settings
2960          */
2961         pci_set_master(pdev);
2962
2963         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2964         if (!netdev) {
2965                 err = -ENOMEM;
2966                 goto err_alloc_etherdev;
2967         }
2968         SET_NETDEV_DEV(netdev, &pdev->dev);
2969
2970         pci_set_drvdata(pdev, netdev);
2971         adapter = netdev_priv(netdev);
2972         adapter->netdev = netdev;
2973         adapter->pdev = pdev;
2974         adapter->hw.back = adapter;
2975         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2976
2977         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2978         if (!adapter->hw.hw_addr) {
2979                 err = -EIO;
2980                 goto err_pci_iomap;
2981         }
2982         /* get device revision number */
2983         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2984                 (REG_MASTER_CTRL + 2));
2985         if (netif_msg_probe(adapter))
2986                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2987
2988         /* set default ring resource counts */
2989         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2990         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2991
2992         adapter->mii.dev = netdev;
2993         adapter->mii.mdio_read = mdio_read;
2994         adapter->mii.mdio_write = mdio_write;
2995         adapter->mii.phy_id_mask = 0x1f;
2996         adapter->mii.reg_num_mask = 0x1f;
2997
2998         netdev->open = &atl1_open;
2999         netdev->stop = &atl1_close;
3000         netdev->hard_start_xmit = &atl1_xmit_frame;
3001         netdev->get_stats = &atlx_get_stats;
3002         netdev->set_multicast_list = &atlx_set_multi;
3003         netdev->set_mac_address = &atl1_set_mac;
3004         netdev->change_mtu = &atl1_change_mtu;
3005         netdev->do_ioctl = &atlx_ioctl;
3006         netdev->tx_timeout = &atlx_tx_timeout;
3007         netdev->watchdog_timeo = 5 * HZ;
3008 #ifdef CONFIG_NET_POLL_CONTROLLER
3009         netdev->poll_controller = atl1_poll_controller;
3010 #endif
3011         netdev->vlan_rx_register = atlx_vlan_rx_register;
3012
3013         netdev->ethtool_ops = &atl1_ethtool_ops;
3014         adapter->bd_number = cards_found;
3015
3016         /* setup the private structure */
3017         err = atl1_sw_init(adapter);
3018         if (err)
3019                 goto err_common;
3020
3021         netdev->features = NETIF_F_HW_CSUM;
3022         netdev->features |= NETIF_F_SG;
3023         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
3024         netdev->features |= NETIF_F_TSO;
3025         netdev->features |= NETIF_F_LLTX;
3026
3027         /*
3028          * patch for some L1 of old version,
3029          * the final version of L1 may not need these
3030          * patches
3031          */
3032         /* atl1_pcie_patch(adapter); */
3033
3034         /* really reset GPHY core */
3035         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3036
3037         /*
3038          * reset the controller to
3039          * put the device in a known good starting state
3040          */
3041         if (atl1_reset_hw(&adapter->hw)) {
3042                 err = -EIO;
3043                 goto err_common;
3044         }
3045
3046         /* copy the MAC address out of the EEPROM */
3047         atl1_read_mac_addr(&adapter->hw);
3048         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
3049
3050         if (!is_valid_ether_addr(netdev->dev_addr)) {
3051                 err = -EIO;
3052                 goto err_common;
3053         }
3054
3055         atl1_check_options(adapter);
3056
3057         /* pre-init the MAC, and setup link */
3058         err = atl1_init_hw(&adapter->hw);
3059         if (err) {
3060                 err = -EIO;
3061                 goto err_common;
3062         }
3063
3064         atl1_pcie_patch(adapter);
3065         /* assume we have no link for now */
3066         netif_carrier_off(netdev);
3067         netif_stop_queue(netdev);
3068
3069         init_timer(&adapter->watchdog_timer);
3070         adapter->watchdog_timer.function = &atl1_watchdog;
3071         adapter->watchdog_timer.data = (unsigned long)adapter;
3072
3073         init_timer(&adapter->phy_config_timer);
3074         adapter->phy_config_timer.function = &atl1_phy_config;
3075         adapter->phy_config_timer.data = (unsigned long)adapter;
3076         adapter->phy_timer_pending = false;
3077
3078         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
3079
3080         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
3081
3082         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
3083
3084         err = register_netdev(netdev);
3085         if (err)
3086                 goto err_common;
3087
3088         cards_found++;
3089         atl1_via_workaround(adapter);
3090         return 0;
3091
3092 err_common:
3093         pci_iounmap(pdev, adapter->hw.hw_addr);
3094 err_pci_iomap:
3095         free_netdev(netdev);
3096 err_alloc_etherdev:
3097         pci_release_regions(pdev);
3098 err_dma:
3099 err_request_regions:
3100         pci_disable_device(pdev);
3101         return err;
3102 }
3103
3104 /*
3105  * atl1_remove - Device Removal Routine
3106  * @pdev: PCI device information struct
3107  *
3108  * atl1_remove is called by the PCI subsystem to alert the driver
3109  * that it should release a PCI device.  The could be caused by a
3110  * Hot-Plug event, or because the driver is going to be removed from
3111  * memory.
3112  */
3113 static void __devexit atl1_remove(struct pci_dev *pdev)
3114 {
3115         struct net_device *netdev = pci_get_drvdata(pdev);
3116         struct atl1_adapter *adapter;
3117         /* Device not available. Return. */
3118         if (!netdev)
3119                 return;
3120
3121         adapter = netdev_priv(netdev);
3122
3123         /*
3124          * Some atl1 boards lack persistent storage for their MAC, and get it
3125          * from the BIOS during POST.  If we've been messing with the MAC
3126          * address, we need to save the permanent one.
3127          */
3128         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
3129                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
3130                         ETH_ALEN);
3131                 atl1_set_mac_addr(&adapter->hw);
3132         }
3133
3134         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3135         unregister_netdev(netdev);
3136         pci_iounmap(pdev, adapter->hw.hw_addr);
3137         pci_release_regions(pdev);
3138         free_netdev(netdev);
3139         pci_disable_device(pdev);
3140 }
3141
3142 static struct pci_driver atl1_driver = {
3143         .name = ATLX_DRIVER_NAME,
3144         .id_table = atl1_pci_tbl,
3145         .probe = atl1_probe,
3146         .remove = __devexit_p(atl1_remove),
3147         .suspend = atl1_suspend,
3148         .resume = atl1_resume,
3149         .shutdown = atl1_shutdown
3150 };
3151
3152 /*
3153  * atl1_exit_module - Driver Exit Cleanup Routine
3154  *
3155  * atl1_exit_module is called just before the driver is removed
3156  * from memory.
3157  */
3158 static void __exit atl1_exit_module(void)
3159 {
3160         pci_unregister_driver(&atl1_driver);
3161 }
3162
3163 /*
3164  * atl1_init_module - Driver Registration Routine
3165  *
3166  * atl1_init_module is the first routine called when the driver is
3167  * loaded. All it does is register with the PCI subsystem.
3168  */
3169 static int __init atl1_init_module(void)
3170 {
3171         return pci_register_driver(&atl1_driver);
3172 }
3173
3174 module_init(atl1_init_module);
3175 module_exit(atl1_exit_module);
3176
3177 struct atl1_stats {
3178         char stat_string[ETH_GSTRING_LEN];
3179         int sizeof_stat;
3180         int stat_offset;
3181 };
3182
3183 #define ATL1_STAT(m) \
3184         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3185
3186 static struct atl1_stats atl1_gstrings_stats[] = {
3187         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3188         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3189         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3190         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3191         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3192         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3193         {"rx_dropped", ATL1_STAT(net_stats.rx_dropped)},
3194         {"tx_dropped", ATL1_STAT(net_stats.tx_dropped)},
3195         {"multicast", ATL1_STAT(soft_stats.multicast)},
3196         {"collisions", ATL1_STAT(soft_stats.collisions)},
3197         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3198         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3199         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3200         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3201         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3202         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3203         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3204         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3205         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3206         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3207         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3208         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3209         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3210         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3211         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3212         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3213         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3214         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3215         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3216         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3217         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3218 };
3219
3220 static void atl1_get_ethtool_stats(struct net_device *netdev,
3221         struct ethtool_stats *stats, u64 *data)
3222 {
3223         struct atl1_adapter *adapter = netdev_priv(netdev);
3224         int i;
3225         char *p;
3226
3227         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3228                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3229                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3230                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3231         }
3232
3233 }
3234
3235 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3236 {
3237         switch (sset) {
3238         case ETH_SS_STATS:
3239                 return ARRAY_SIZE(atl1_gstrings_stats);
3240         default:
3241                 return -EOPNOTSUPP;
3242         }
3243 }
3244
3245 static int atl1_get_settings(struct net_device *netdev,
3246         struct ethtool_cmd *ecmd)
3247 {
3248         struct atl1_adapter *adapter = netdev_priv(netdev);
3249         struct atl1_hw *hw = &adapter->hw;
3250
3251         ecmd->supported = (SUPPORTED_10baseT_Half |
3252                            SUPPORTED_10baseT_Full |
3253                            SUPPORTED_100baseT_Half |
3254                            SUPPORTED_100baseT_Full |
3255                            SUPPORTED_1000baseT_Full |
3256                            SUPPORTED_Autoneg | SUPPORTED_TP);
3257         ecmd->advertising = ADVERTISED_TP;
3258         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3259             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3260                 ecmd->advertising |= ADVERTISED_Autoneg;
3261                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3262                         ecmd->advertising |= ADVERTISED_Autoneg;
3263                         ecmd->advertising |=
3264                             (ADVERTISED_10baseT_Half |
3265                              ADVERTISED_10baseT_Full |
3266                              ADVERTISED_100baseT_Half |
3267                              ADVERTISED_100baseT_Full |
3268                              ADVERTISED_1000baseT_Full);
3269                 } else
3270                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3271         }
3272         ecmd->port = PORT_TP;
3273         ecmd->phy_address = 0;
3274         ecmd->transceiver = XCVR_INTERNAL;
3275
3276         if (netif_carrier_ok(adapter->netdev)) {
3277                 u16 link_speed, link_duplex;
3278                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3279                 ecmd->speed = link_speed;
3280                 if (link_duplex == FULL_DUPLEX)
3281                         ecmd->duplex = DUPLEX_FULL;
3282                 else
3283                         ecmd->duplex = DUPLEX_HALF;
3284         } else {
3285                 ecmd->speed = -1;
3286                 ecmd->duplex = -1;
3287         }
3288         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3289             hw->media_type == MEDIA_TYPE_1000M_FULL)
3290                 ecmd->autoneg = AUTONEG_ENABLE;
3291         else
3292                 ecmd->autoneg = AUTONEG_DISABLE;
3293
3294         return 0;
3295 }
3296
3297 static int atl1_set_settings(struct net_device *netdev,
3298         struct ethtool_cmd *ecmd)
3299 {
3300         struct atl1_adapter *adapter = netdev_priv(netdev);
3301         struct atl1_hw *hw = &adapter->hw;
3302         u16 phy_data;
3303         int ret_val = 0;
3304         u16 old_media_type = hw->media_type;
3305
3306         if (netif_running(adapter->netdev)) {
3307                 if (netif_msg_link(adapter))
3308                         dev_dbg(&adapter->pdev->dev,
3309                                 "ethtool shutting down adapter\n");
3310                 atl1_down(adapter);
3311         }
3312
3313         if (ecmd->autoneg == AUTONEG_ENABLE)
3314                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3315         else {
3316                 if (ecmd->speed == SPEED_1000) {
3317                         if (ecmd->duplex != DUPLEX_FULL) {
3318                                 if (netif_msg_link(adapter))
3319                                         dev_warn(&adapter->pdev->dev,
3320                                                 "1000M half is invalid\n");
3321                                 ret_val = -EINVAL;
3322                                 goto exit_sset;
3323                         }
3324                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3325                 } else if (ecmd->speed == SPEED_100) {
3326                         if (ecmd->duplex == DUPLEX_FULL)
3327                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3328                         else
3329                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3330                 } else {
3331                         if (ecmd->duplex == DUPLEX_FULL)
3332                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3333                         else
3334                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3335                 }
3336         }
3337         switch (hw->media_type) {
3338         case MEDIA_TYPE_AUTO_SENSOR:
3339                 ecmd->advertising =
3340                     ADVERTISED_10baseT_Half |
3341                     ADVERTISED_10baseT_Full |
3342                     ADVERTISED_100baseT_Half |
3343                     ADVERTISED_100baseT_Full |
3344                     ADVERTISED_1000baseT_Full |
3345                     ADVERTISED_Autoneg | ADVERTISED_TP;
3346                 break;
3347         case MEDIA_TYPE_1000M_FULL:
3348                 ecmd->advertising =
3349                     ADVERTISED_1000baseT_Full |
3350                     ADVERTISED_Autoneg | ADVERTISED_TP;
3351                 break;
3352         default:
3353                 ecmd->advertising = 0;
3354                 break;
3355         }
3356         if (atl1_phy_setup_autoneg_adv(hw)) {
3357                 ret_val = -EINVAL;
3358                 if (netif_msg_link(adapter))
3359                         dev_warn(&adapter->pdev->dev,
3360                                 "invalid ethtool speed/duplex setting\n");
3361                 goto exit_sset;
3362         }
3363         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3364             hw->media_type == MEDIA_TYPE_1000M_FULL)
3365                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3366         else {
3367                 switch (hw->media_type) {
3368                 case MEDIA_TYPE_100M_FULL:
3369                         phy_data =
3370                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3371                             MII_CR_RESET;
3372                         break;
3373                 case MEDIA_TYPE_100M_HALF:
3374                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3375                         break;
3376                 case MEDIA_TYPE_10M_FULL:
3377                         phy_data =
3378                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3379                         break;
3380                 default:
3381                         /* MEDIA_TYPE_10M_HALF: */
3382                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3383                         break;
3384                 }
3385         }
3386         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3387 exit_sset:
3388         if (ret_val)
3389                 hw->media_type = old_media_type;
3390
3391         if (netif_running(adapter->netdev)) {
3392                 if (netif_msg_link(adapter))
3393                         dev_dbg(&adapter->pdev->dev,
3394                                 "ethtool starting adapter\n");
3395                 atl1_up(adapter);
3396         } else if (!ret_val) {
3397                 if (netif_msg_link(adapter))
3398                         dev_dbg(&adapter->pdev->dev,
3399                                 "ethtool resetting adapter\n");
3400                 atl1_reset(adapter);
3401         }
3402         return ret_val;
3403 }
3404
3405 static void atl1_get_drvinfo(struct net_device *netdev,
3406         struct ethtool_drvinfo *drvinfo)
3407 {
3408         struct atl1_adapter *adapter = netdev_priv(netdev);
3409
3410         strncpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3411         strncpy(drvinfo->version, ATLX_DRIVER_VERSION,
3412                 sizeof(drvinfo->version));
3413         strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3414         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
3415                 sizeof(drvinfo->bus_info));
3416         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3417 }
3418
3419 static void atl1_get_wol(struct net_device *netdev,
3420         struct ethtool_wolinfo *wol)
3421 {
3422         struct atl1_adapter *adapter = netdev_priv(netdev);
3423
3424         wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
3425         wol->wolopts = 0;
3426         if (adapter->wol & ATLX_WUFC_EX)
3427                 wol->wolopts |= WAKE_UCAST;
3428         if (adapter->wol & ATLX_WUFC_MC)
3429                 wol->wolopts |= WAKE_MCAST;
3430         if (adapter->wol & ATLX_WUFC_BC)
3431                 wol->wolopts |= WAKE_BCAST;
3432         if (adapter->wol & ATLX_WUFC_MAG)
3433                 wol->wolopts |= WAKE_MAGIC;
3434         return;
3435 }
3436
3437 static int atl1_set_wol(struct net_device *netdev,
3438         struct ethtool_wolinfo *wol)
3439 {
3440         struct atl1_adapter *adapter = netdev_priv(netdev);
3441
3442         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
3443                 return -EOPNOTSUPP;
3444         adapter->wol = 0;
3445         if (wol->wolopts & WAKE_UCAST)
3446                 adapter->wol |= ATLX_WUFC_EX;
3447         if (wol->wolopts & WAKE_MCAST)
3448                 adapter->wol |= ATLX_WUFC_MC;
3449         if (wol->wolopts & WAKE_BCAST)
3450                 adapter->wol |= ATLX_WUFC_BC;
3451         if (wol->wolopts & WAKE_MAGIC)
3452                 adapter->wol |= ATLX_WUFC_MAG;
3453         return 0;
3454 }
3455
3456 static u32 atl1_get_msglevel(struct net_device *netdev)
3457 {
3458         struct atl1_adapter *adapter = netdev_priv(netdev);
3459         return adapter->msg_enable;
3460 }
3461
3462 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3463 {
3464         struct atl1_adapter *adapter = netdev_priv(netdev);
3465         adapter->msg_enable = value;
3466 }
3467
3468 static int atl1_get_regs_len(struct net_device *netdev)
3469 {
3470         return ATL1_REG_COUNT * sizeof(u32);
3471 }
3472
3473 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3474         void *p)
3475 {
3476         struct atl1_adapter *adapter = netdev_priv(netdev);
3477         struct atl1_hw *hw = &adapter->hw;
3478         unsigned int i;
3479         u32 *regbuf = p;
3480
3481         for (i = 0; i < ATL1_REG_COUNT; i++) {
3482                 /*
3483                  * This switch statement avoids reserved regions
3484                  * of register space.
3485                  */
3486                 switch (i) {
3487                 case 6 ... 9:
3488                 case 14:
3489                 case 29 ... 31:
3490                 case 34 ... 63:
3491                 case 75 ... 127:
3492                 case 136 ... 1023:
3493                 case 1027 ... 1087:
3494                 case 1091 ... 1151:
3495                 case 1194 ... 1195:
3496                 case 1200 ... 1201:
3497                 case 1206 ... 1213:
3498                 case 1216 ... 1279:
3499                 case 1290 ... 1311:
3500                 case 1323 ... 1343:
3501                 case 1358 ... 1359:
3502                 case 1368 ... 1375:
3503                 case 1378 ... 1383:
3504                 case 1388 ... 1391:
3505                 case 1393 ... 1395:
3506                 case 1402 ... 1403:
3507                 case 1410 ... 1471:
3508                 case 1522 ... 1535:
3509                         /* reserved region; don't read it */
3510                         regbuf[i] = 0;
3511                         break;
3512                 default:
3513                         /* unreserved region */
3514                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3515                 }
3516         }
3517 }
3518
3519 static void atl1_get_ringparam(struct net_device *netdev,
3520         struct ethtool_ringparam *ring)
3521 {
3522         struct atl1_adapter *adapter = netdev_priv(netdev);
3523         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3524         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3525
3526         ring->rx_max_pending = ATL1_MAX_RFD;
3527         ring->tx_max_pending = ATL1_MAX_TPD;
3528         ring->rx_mini_max_pending = 0;
3529         ring->rx_jumbo_max_pending = 0;
3530         ring->rx_pending = rxdr->count;
3531         ring->tx_pending = txdr->count;
3532         ring->rx_mini_pending = 0;
3533         ring->rx_jumbo_pending = 0;
3534 }
3535
3536 static int atl1_set_ringparam(struct net_device *netdev,
3537         struct ethtool_ringparam *ring)
3538 {
3539         struct atl1_adapter *adapter = netdev_priv(netdev);
3540         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3541         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3542         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3543
3544         struct atl1_tpd_ring tpd_old, tpd_new;
3545         struct atl1_rfd_ring rfd_old, rfd_new;
3546         struct atl1_rrd_ring rrd_old, rrd_new;
3547         struct atl1_ring_header rhdr_old, rhdr_new;
3548         int err;
3549
3550         tpd_old = adapter->tpd_ring;
3551         rfd_old = adapter->rfd_ring;
3552         rrd_old = adapter->rrd_ring;
3553         rhdr_old = adapter->ring_header;
3554
3555         if (netif_running(adapter->netdev))
3556                 atl1_down(adapter);
3557
3558         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3559         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3560                         rfdr->count;
3561         rfdr->count = (rfdr->count + 3) & ~3;
3562         rrdr->count = rfdr->count;
3563
3564         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3565         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3566                         tpdr->count;
3567         tpdr->count = (tpdr->count + 3) & ~3;
3568
3569         if (netif_running(adapter->netdev)) {
3570                 /* try to get new resources before deleting old */
3571                 err = atl1_setup_ring_resources(adapter);
3572                 if (err)
3573                         goto err_setup_ring;
3574
3575                 /*
3576                  * save the new, restore the old in order to free it,
3577                  * then restore the new back again
3578                  */
3579
3580                 rfd_new = adapter->rfd_ring;
3581                 rrd_new = adapter->rrd_ring;
3582                 tpd_new = adapter->tpd_ring;
3583                 rhdr_new = adapter->ring_header;
3584                 adapter->rfd_ring = rfd_old;
3585                 adapter->rrd_ring = rrd_old;
3586                 adapter->tpd_ring = tpd_old;
3587                 adapter->ring_header = rhdr_old;
3588                 atl1_free_ring_resources(adapter);
3589                 adapter->rfd_ring = rfd_new;
3590                 adapter->rrd_ring = rrd_new;
3591                 adapter->tpd_ring = tpd_new;
3592                 adapter->ring_header = rhdr_new;
3593
3594                 err = atl1_up(adapter);
3595                 if (err)
3596                         return err;
3597         }
3598         return 0;
3599
3600 err_setup_ring:
3601         adapter->rfd_ring = rfd_old;
3602         adapter->rrd_ring = rrd_old;
3603         adapter->tpd_ring = tpd_old;
3604         adapter->ring_header = rhdr_old;
3605         atl1_up(adapter);
3606         return err;
3607 }
3608
3609 static void atl1_get_pauseparam(struct net_device *netdev,
3610         struct ethtool_pauseparam *epause)
3611 {
3612         struct atl1_adapter *adapter = netdev_priv(netdev);
3613         struct atl1_hw *hw = &adapter->hw;
3614
3615         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3616             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3617                 epause->autoneg = AUTONEG_ENABLE;
3618         } else {
3619                 epause->autoneg = AUTONEG_DISABLE;
3620         }
3621         epause->rx_pause = 1;
3622         epause->tx_pause = 1;
3623 }
3624
3625 static int atl1_set_pauseparam(struct net_device *netdev,
3626         struct ethtool_pauseparam *epause)
3627 {
3628         struct atl1_adapter *adapter = netdev_priv(netdev);
3629         struct atl1_hw *hw = &adapter->hw;
3630
3631         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3632             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3633                 epause->autoneg = AUTONEG_ENABLE;
3634         } else {
3635                 epause->autoneg = AUTONEG_DISABLE;
3636         }
3637
3638         epause->rx_pause = 1;
3639         epause->tx_pause = 1;
3640
3641         return 0;
3642 }
3643
3644 /* FIXME: is this right? -- CHS */
3645 static u32 atl1_get_rx_csum(struct net_device *netdev)
3646 {
3647         return 1;
3648 }
3649
3650 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3651         u8 *data)
3652 {
3653         u8 *p = data;
3654         int i;
3655
3656         switch (stringset) {
3657         case ETH_SS_STATS:
3658                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3659                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3660                                 ETH_GSTRING_LEN);
3661                         p += ETH_GSTRING_LEN;
3662                 }
3663                 break;
3664         }
3665 }
3666
3667 static int atl1_nway_reset(struct net_device *netdev)
3668 {
3669         struct atl1_adapter *adapter = netdev_priv(netdev);
3670         struct atl1_hw *hw = &adapter->hw;
3671
3672         if (netif_running(netdev)) {
3673                 u16 phy_data;
3674                 atl1_down(adapter);
3675
3676                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3677                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3678                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3679                 } else {
3680                         switch (hw->media_type) {
3681                         case MEDIA_TYPE_100M_FULL:
3682                                 phy_data = MII_CR_FULL_DUPLEX |
3683                                         MII_CR_SPEED_100 | MII_CR_RESET;
3684                                 break;
3685                         case MEDIA_TYPE_100M_HALF:
3686                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3687                                 break;
3688                         case MEDIA_TYPE_10M_FULL:
3689                                 phy_data = MII_CR_FULL_DUPLEX |
3690                                         MII_CR_SPEED_10 | MII_CR_RESET;
3691                                 break;
3692                         default:
3693                                 /* MEDIA_TYPE_10M_HALF */
3694                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3695                         }
3696                 }
3697                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3698                 atl1_up(adapter);
3699         }
3700         return 0;
3701 }
3702
3703 const struct ethtool_ops atl1_ethtool_ops = {
3704         .get_settings           = atl1_get_settings,
3705         .set_settings           = atl1_set_settings,
3706         .get_drvinfo            = atl1_get_drvinfo,
3707         .get_wol                = atl1_get_wol,
3708         .set_wol                = atl1_set_wol,
3709         .get_msglevel           = atl1_get_msglevel,
3710         .set_msglevel           = atl1_set_msglevel,
3711         .get_regs_len           = atl1_get_regs_len,
3712         .get_regs               = atl1_get_regs,
3713         .get_ringparam          = atl1_get_ringparam,
3714         .set_ringparam          = atl1_set_ringparam,
3715         .get_pauseparam         = atl1_get_pauseparam,
3716         .set_pauseparam         = atl1_set_pauseparam,
3717         .get_rx_csum            = atl1_get_rx_csum,
3718         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3719         .get_link               = ethtool_op_get_link,
3720         .set_sg                 = ethtool_op_set_sg,
3721         .get_strings            = atl1_get_strings,
3722         .nway_reset             = atl1_nway_reset,
3723         .get_ethtool_stats      = atl1_get_ethtool_stats,
3724         .get_sset_count         = atl1_get_sset_count,
3725         .set_tso                = ethtool_op_set_tso,
3726 };