1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
214 static int rx_copybreak = 200;
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static int rx_copybreak = 1513;
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
236 static int vortex_debug = VORTEX_DEBUG;
238 static int vortex_debug = 1;
241 #include <linux/config.h>
242 #include <linux/module.h>
243 #include <linux/kernel.h>
244 #include <linux/string.h>
245 #include <linux/timer.h>
246 #include <linux/errno.h>
247 #include <linux/in.h>
248 #include <linux/ioport.h>
249 #include <linux/slab.h>
250 #include <linux/interrupt.h>
251 #include <linux/pci.h>
252 #include <linux/mii.h>
253 #include <linux/init.h>
254 #include <linux/netdevice.h>
255 #include <linux/etherdevice.h>
256 #include <linux/skbuff.h>
257 #include <linux/ethtool.h>
258 #include <linux/highmem.h>
259 #include <linux/eisa.h>
260 #include <linux/bitops.h>
261 #include <asm/irq.h> /* For NR_IRQS only. */
263 #include <asm/uaccess.h>
265 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
266 This is only in the support-all-kernels source code. */
268 #define RUN_AT(x) (jiffies + (x))
270 #include <linux/delay.h>
273 static char version[] __devinitdata =
274 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
276 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
277 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
278 DRV_VERSION " " DRV_RELDATE);
279 MODULE_LICENSE("GPL");
280 MODULE_VERSION(DRV_VERSION);
283 /* Operational parameter that usually are not changed. */
285 /* The Vortex size is twice that of the original EtherLinkIII series: the
286 runtime register window, window 1, is now always mapped in.
287 The Boomerang size is twice as large as the Vortex -- it has additional
288 bus master control registers. */
289 #define VORTEX_TOTAL_SIZE 0x20
290 #define BOOMERANG_TOTAL_SIZE 0x40
292 /* Set iff a MII transceiver on any interface requires mdio preamble.
293 This only set with the original DP83840 on older 3c905 boards, so the extra
294 code size of a per-interface flag is not worthwhile. */
295 static char mii_preamble_required;
297 #define PFX DRV_NAME ": "
304 I. Board Compatibility
306 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
307 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
308 versions of the FastEtherLink cards. The supported product IDs are
309 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
311 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
312 with the kernel source or available from
313 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
315 II. Board-specific settings
317 PCI bus devices are configured by the system at boot time, so no jumpers
318 need to be set on the board. The system BIOS should be set to assign the
319 PCI INTA signal to an otherwise unused system IRQ line.
321 The EEPROM settings for media type and forced-full-duplex are observed.
322 The EEPROM media type should be left at the default "autoselect" unless using
323 10base2 or AUI connections which cannot be reliably detected.
325 III. Driver operation
327 The 3c59x series use an interface that's very similar to the previous 3c5x9
328 series. The primary interface is two programmed-I/O FIFOs, with an
329 alternate single-contiguous-region bus-master transfer (see next).
331 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
332 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
333 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
334 programmed-I/O interface that has been removed in 'B' and subsequent board
337 One extension that is advertised in a very large font is that the adapters
338 are capable of being bus masters. On the Vortex chip this capability was
339 only for a single contiguous region making it far less useful than the full
340 bus master capability. There is a significant performance impact of taking
341 an extra interrupt or polling for the completion of each transfer, as well
342 as difficulty sharing the single transfer engine between the transmit and
343 receive threads. Using DMA transfers is a win only with large blocks or
344 with the flawed versions of the Intel Orion motherboard PCI controller.
346 The Boomerang chip's full-bus-master interface is useful, and has the
347 currently-unused advantages over other similar chips that queued transmit
348 packets may be reordered and receive buffer groups are associated with a
351 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
352 Rather than a fixed intermediate receive buffer, this scheme allocates
353 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
354 the copying breakpoint: it is chosen to trade-off the memory wasted by
355 passing the full-sized skbuff to the queue layer for all frames vs. the
356 copying cost of copying a frame to a correctly-sized skbuff.
358 IIIC. Synchronization
359 The driver runs as two independent, single-threaded flows of control. One
360 is the send-packet routine, which enforces single-threaded use by the
361 dev->tbusy flag. The other thread is the interrupt handler, which is single
362 threaded by the hardware and other software.
366 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
367 3c590, 3c595, and 3c900 boards.
368 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
369 the EISA version is called "Demon". According to Terry these names come
370 from rides at the local amusement park.
372 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
373 This driver only supports ethernet packets because of the skbuff allocation
377 /* This table drives the PCI probe routines. It's mostly boilerplate in all
378 of the drivers, and will likely be provided by some future kernel.
381 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
382 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
385 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
386 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
387 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
388 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
389 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
390 EXTRA_PREAMBLE=0x8000, EEPROM_RESET=0x10000, };
441 /* note: this array directly indexed by above enums, and MUST
442 * be kept in sync with both the enums above, and the PCI device
445 static struct vortex_chip_info {
450 } vortex_info_tbl[] __devinitdata = {
451 {"3c590 Vortex 10Mbps",
452 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
453 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
454 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
455 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
456 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
457 {"3c595 Vortex 100baseTx",
458 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
459 {"3c595 Vortex 100baseT4",
460 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
462 {"3c595 Vortex 100base-MII",
463 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
464 {"3c900 Boomerang 10baseT",
465 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
466 {"3c900 Boomerang 10Mbps Combo",
467 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
468 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
469 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
470 {"3c900 Cyclone 10Mbps Combo",
471 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
473 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
474 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
475 {"3c900B-FL Cyclone 10base-FL",
476 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
477 {"3c905 Boomerang 100baseTx",
478 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
479 {"3c905 Boomerang 100baseT4",
480 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
481 {"3c905B Cyclone 100baseTx",
482 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
484 {"3c905B Cyclone 10/100/BNC",
485 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
486 {"3c905B-FX Cyclone 100baseFx",
487 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
489 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
490 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
491 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, },
493 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
496 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
497 {"3cSOHO100-TX Hurricane",
498 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
499 {"3c555 Laptop Hurricane",
500 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
501 {"3c556 Laptop Tornado",
502 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
504 {"3c556B Laptop Hurricane",
505 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
506 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
508 {"3c575 [Megahertz] 10/100 LAN CardBus",
509 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
510 {"3c575 Boomerang CardBus",
511 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
512 {"3CCFE575BT Cyclone CardBus",
513 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
514 INVERT_LED_PWR|HAS_HWCKSM, 128, },
515 {"3CCFE575CT Tornado CardBus",
516 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
517 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
518 {"3CCFE656 Cyclone CardBus",
519 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
520 INVERT_LED_PWR|HAS_HWCKSM, 128, },
522 {"3CCFEM656B Cyclone+Winmodem CardBus",
523 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
524 INVERT_LED_PWR|HAS_HWCKSM, 128, },
525 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
526 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
527 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
528 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
529 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
531 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
532 {"3c982 Hydra Dual Port A",
533 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
535 {"3c982 Hydra Dual Port B",
536 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
538 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
539 {"3c920B-EMB-WNM Tornado",
540 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
542 {NULL,}, /* NULL terminated list. */
546 static struct pci_device_id vortex_pci_tbl[] = {
547 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
548 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
549 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
550 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
551 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
553 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
554 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
555 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
556 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
557 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
559 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
560 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
561 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
562 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
563 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
565 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
566 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
567 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
568 { 0x10B7, 0x9202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9202 },
569 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
570 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
572 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
573 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
574 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
575 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
576 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
578 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
579 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
580 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
581 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
582 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
584 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
585 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
586 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
587 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
588 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
590 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
591 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
593 {0,} /* 0 terminated list. */
595 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
598 /* Operational definitions.
599 These are not used by other compilation units and thus are not
600 exported in a ".h" file.
602 First the windows. There are eight register windows, with the command
603 and status registers available in each.
605 #define EL3WINDOW(win_num) iowrite16(SelectWindow + (win_num), ioaddr + EL3_CMD)
607 #define EL3_STATUS 0x0e
609 /* The top five bits written to EL3_CMD are a command, the lower
610 11 bits are the parameter, if applicable.
611 Note that 11 parameters bits was fine for ethernet, but the new chip
612 can handle FDDI length frames (~4500 octets) and now parameters count
613 32-bit 'Dwords' rather than octets. */
616 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
617 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
618 UpStall = 6<<11, UpUnstall = (6<<11)+1,
619 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
620 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
621 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
622 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
623 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
624 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
625 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
627 /* The SetRxFilter command accepts the following classes: */
629 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
631 /* Bits in the general status register. */
633 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
634 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
635 IntReq = 0x0040, StatsFull = 0x0080,
636 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
637 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
638 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
641 /* Register window 1 offsets, the window used in normal operation.
642 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
644 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
645 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
646 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
649 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
650 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
651 IntrStatus=0x0E, /* Valid in all windows. */
653 enum Win0_EEPROM_bits {
654 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
655 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
656 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
658 /* EEPROM locations. */
660 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
661 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
662 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
663 DriverTune=13, Checksum=15};
665 enum Window2 { /* Window 2. */
668 enum Window3 { /* Window 3: MAC/config bits. */
669 Wn3_Config=0, Wn3_MaxPktSize=4, Wn3_MAC_Ctrl=6, Wn3_Options=8,
672 #define BFEXT(value, offset, bitcount) \
673 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
675 #define BFINS(lhs, rhs, offset, bitcount) \
676 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
677 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
679 #define RAM_SIZE(v) BFEXT(v, 0, 3)
680 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
681 #define RAM_SPEED(v) BFEXT(v, 4, 2)
682 #define ROM_SIZE(v) BFEXT(v, 6, 2)
683 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
684 #define XCVR(v) BFEXT(v, 20, 4)
685 #define AUTOSELECT(v) BFEXT(v, 24, 1)
687 enum Window4 { /* Window 4: Xcvr/media bits. */
688 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
690 enum Win4_Media_bits {
691 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
692 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
693 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
694 Media_LnkBeat = 0x0800,
696 enum Window7 { /* Window 7: Bus Master control. */
697 Wn7_MasterAddr = 0, Wn7_VlanEtherType=4, Wn7_MasterLen = 6,
698 Wn7_MasterStatus = 12,
700 /* Boomerang bus master control registers. */
702 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
703 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
706 /* The Rx and Tx descriptor lists.
707 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
708 alignment contraint on tx_ring[] and rx_ring[]. */
709 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
710 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
711 struct boom_rx_desc {
712 u32 next; /* Last entry points to 0. */
714 u32 addr; /* Up to 63 addr/len pairs possible. */
715 s32 length; /* Set LAST_FRAG to indicate last pair. */
717 /* Values for the Rx status entry. */
718 enum rx_desc_status {
719 RxDComplete=0x00008000, RxDError=0x4000,
720 /* See boomerang_rx() for actual error bits */
721 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
722 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
726 #define DO_ZEROCOPY 1
728 #define DO_ZEROCOPY 0
731 struct boom_tx_desc {
732 u32 next; /* Last entry points to 0. */
733 s32 status; /* bits 0:12 length, others see below. */
738 } frag[1+MAX_SKB_FRAGS];
745 /* Values for the Tx status entry. */
746 enum tx_desc_status {
747 CRCDisable=0x2000, TxDComplete=0x8000,
748 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
749 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
752 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
753 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
755 struct vortex_extra_stats {
756 unsigned long tx_deferred;
757 unsigned long tx_multiple_collisions;
758 unsigned long rx_bad_ssd;
761 struct vortex_private {
762 /* The Rx and Tx rings should be quad-word-aligned. */
763 struct boom_rx_desc* rx_ring;
764 struct boom_tx_desc* tx_ring;
765 dma_addr_t rx_ring_dma;
766 dma_addr_t tx_ring_dma;
767 /* The addresses of transmit- and receive-in-place skbuffs. */
768 struct sk_buff* rx_skbuff[RX_RING_SIZE];
769 struct sk_buff* tx_skbuff[TX_RING_SIZE];
770 unsigned int cur_rx, cur_tx; /* The next free ring entry */
771 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
772 struct net_device_stats stats; /* Generic stats */
773 struct vortex_extra_stats xstats; /* NIC-specific extra stats */
774 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
775 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
777 /* PCI configuration space information. */
778 struct device *gendev;
779 void __iomem *ioaddr; /* IO address space */
780 void __iomem *cb_fn_base; /* CardBus function status addr space. */
782 /* Some values here only for performance evaluation and path-coverage */
783 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
786 /* The remainder are related to chip state, mostly media selection. */
787 struct timer_list timer; /* Media selection timer. */
788 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
789 int options; /* User-settable misc. driver options. */
790 unsigned int media_override:4, /* Passed-in media type. */
791 default_media:4, /* Read from the EEPROM/Wn3_Config. */
792 full_duplex:1, force_fd:1, autoselect:1,
793 bus_master:1, /* Vortex can only do a fragment bus-m. */
794 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
795 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
796 partner_flow_ctrl:1, /* Partner supports flow control */
798 enable_wol:1, /* Wake-on-LAN is enabled */
799 pm_state_valid:1, /* pci_dev->saved_config_space has sane contents */
802 must_free_region:1, /* Flag: if zero, Cardbus owns the I/O region */
803 large_frames:1; /* accept large frames */
807 u16 available_media; /* From Wn3_Options. */
808 u16 capabilities, info1, info2; /* Various, from EEPROM. */
809 u16 advertising; /* NWay media advertisement */
810 unsigned char phys[2]; /* MII device addresses. */
811 u16 deferred; /* Resend these interrupts when we
812 * bale from the ISR */
813 u16 io_size; /* Size of PCI region (for release_region) */
814 spinlock_t lock; /* Serialise access to device & its vortex_private */
815 struct mii_if_info mii; /* MII lib hooks/info */
819 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
821 #define DEVICE_PCI(dev) NULL
824 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
827 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
829 #define DEVICE_EISA(dev) NULL
832 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
834 /* The action to take with a media selection timer tick.
835 Note that we deviate from the 3Com order by checking 10base2 before AUI.
838 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
839 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
842 static struct media_table {
844 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
845 mask:8, /* The transceiver-present bit in Wn3_Config.*/
846 next:8; /* The media type to try next. */
847 int wait; /* Time before we check media status. */
849 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
850 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
851 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
852 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
853 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
854 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
855 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
856 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
857 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
858 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
859 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
863 const char str[ETH_GSTRING_LEN];
864 } ethtool_stats_keys[] = {
866 { "tx_multiple_collisions" },
870 /* number of ETHTOOL_GSTATS u64's */
871 #define VORTEX_NUM_STATS 3
873 static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,
874 int chip_idx, int card_idx);
875 static void vortex_up(struct net_device *dev);
876 static void vortex_down(struct net_device *dev, int final);
877 static int vortex_open(struct net_device *dev);
878 static void mdio_sync(void __iomem *ioaddr, int bits);
879 static int mdio_read(struct net_device *dev, int phy_id, int location);
880 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
881 static void vortex_timer(unsigned long arg);
882 static void rx_oom_timer(unsigned long arg);
883 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
884 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
885 static int vortex_rx(struct net_device *dev);
886 static int boomerang_rx(struct net_device *dev);
887 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
888 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
889 static int vortex_close(struct net_device *dev);
890 static void dump_tx_ring(struct net_device *dev);
891 static void update_stats(void __iomem *ioaddr, struct net_device *dev);
892 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
893 static void set_rx_mode(struct net_device *dev);
895 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
897 static void vortex_tx_timeout(struct net_device *dev);
898 static void acpi_set_WOL(struct net_device *dev);
899 static struct ethtool_ops vortex_ethtool_ops;
900 static void set_8021q_mode(struct net_device *dev, int enable);
903 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
904 /* Option count limit only -- unlimited interfaces are supported. */
906 static int options[MAX_UNITS] = { [0 ... MAX_UNITS-1] = -1 };
907 static int full_duplex[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
908 static int hw_checksums[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
909 static int flow_ctrl[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
910 static int enable_wol[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
911 static int use_mmio[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
912 static int global_options = -1;
913 static int global_full_duplex = -1;
914 static int global_enable_wol = -1;
915 static int global_use_mmio = -1;
917 /* #define dev_alloc_skb dev_alloc_skb_debug */
919 /* Variables to work-around the Compaq PCI BIOS32 problem. */
920 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
921 static struct net_device *compaq_net_device;
923 static int vortex_cards_found;
925 module_param(debug, int, 0);
926 module_param(global_options, int, 0);
927 module_param_array(options, int, NULL, 0);
928 module_param(global_full_duplex, int, 0);
929 module_param_array(full_duplex, int, NULL, 0);
930 module_param_array(hw_checksums, int, NULL, 0);
931 module_param_array(flow_ctrl, int, NULL, 0);
932 module_param(global_enable_wol, int, 0);
933 module_param_array(enable_wol, int, NULL, 0);
934 module_param(rx_copybreak, int, 0);
935 module_param(max_interrupt_work, int, 0);
936 module_param(compaq_ioaddr, int, 0);
937 module_param(compaq_irq, int, 0);
938 module_param(compaq_device_id, int, 0);
939 module_param(watchdog, int, 0);
940 module_param(global_use_mmio, int, 0);
941 module_param_array(use_mmio, int, NULL, 0);
942 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
943 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
944 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
945 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
946 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if full_duplex is unset");
947 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
948 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
949 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
950 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if enable_wol is unset");
951 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
952 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
953 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
954 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
955 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
956 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
957 MODULE_PARM_DESC(global_use_mmio, "3c59x: same as use_mmio, but applies to all NICs if options is unset");
958 MODULE_PARM_DESC(use_mmio, "3c59x: use memory-mapped PCI I/O resource (0-1)");
960 #ifdef CONFIG_NET_POLL_CONTROLLER
961 static void poll_vortex(struct net_device *dev)
963 struct vortex_private *vp = netdev_priv(dev);
965 local_save_flags(flags);
967 (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev,NULL);
968 local_irq_restore(flags);
974 static int vortex_suspend (struct pci_dev *pdev, pm_message_t state)
976 struct net_device *dev = pci_get_drvdata(pdev);
978 if (dev && dev->priv) {
979 if (netif_running(dev)) {
980 netif_device_detach(dev);
983 pci_save_state(pdev);
984 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
985 free_irq(dev->irq, dev);
986 pci_disable_device(pdev);
987 pci_set_power_state(pdev, pci_choose_state(pdev, state));
992 static int vortex_resume (struct pci_dev *pdev)
994 struct net_device *dev = pci_get_drvdata(pdev);
995 struct vortex_private *vp = netdev_priv(dev);
998 pci_set_power_state(pdev, PCI_D0);
999 pci_restore_state(pdev);
1000 pci_enable_device(pdev);
1001 pci_set_master(pdev);
1002 if (request_irq(dev->irq, vp->full_bus_master_rx ?
1003 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev)) {
1004 printk(KERN_WARNING "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1005 pci_disable_device(pdev);
1008 if (netif_running(dev)) {
1010 netif_device_attach(dev);
1016 #endif /* CONFIG_PM */
1019 static struct eisa_device_id vortex_eisa_ids[] = {
1020 { "TCM5920", CH_3C592 },
1021 { "TCM5970", CH_3C597 },
1025 static int vortex_eisa_probe (struct device *device);
1026 static int vortex_eisa_remove (struct device *device);
1028 static struct eisa_driver vortex_eisa_driver = {
1029 .id_table = vortex_eisa_ids,
1032 .probe = vortex_eisa_probe,
1033 .remove = vortex_eisa_remove
1037 static int vortex_eisa_probe (struct device *device)
1039 void __iomem *ioaddr;
1040 struct eisa_device *edev;
1042 edev = to_eisa_device (device);
1044 if (!request_region(edev->base_addr, VORTEX_TOTAL_SIZE, DRV_NAME))
1047 ioaddr = ioport_map(edev->base_addr, VORTEX_TOTAL_SIZE);
1049 if (vortex_probe1(device, ioaddr, ioread16(ioaddr + 0xC88) >> 12,
1050 edev->id.driver_data, vortex_cards_found)) {
1051 release_region (edev->base_addr, VORTEX_TOTAL_SIZE);
1055 vortex_cards_found++;
1060 static int vortex_eisa_remove (struct device *device)
1062 struct eisa_device *edev;
1063 struct net_device *dev;
1064 struct vortex_private *vp;
1065 void __iomem *ioaddr;
1067 edev = to_eisa_device (device);
1068 dev = eisa_get_drvdata (edev);
1071 printk("vortex_eisa_remove called for Compaq device!\n");
1075 vp = netdev_priv(dev);
1076 ioaddr = vp->ioaddr;
1078 unregister_netdev (dev);
1079 iowrite16 (TotalReset|0x14, ioaddr + EL3_CMD);
1080 release_region (dev->base_addr, VORTEX_TOTAL_SIZE);
1087 /* returns count found (>= 0), or negative on error */
1088 static int __init vortex_eisa_init (void)
1091 int orig_cards_found = vortex_cards_found;
1094 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1095 /* Because of the way EISA bus is probed, we cannot assume
1096 * any device have been found when we exit from
1097 * eisa_driver_register (the bus root driver may not be
1098 * initialized yet). So we blindly assume something was
1099 * found, and let the sysfs magic happend... */
1105 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1106 if (compaq_ioaddr) {
1107 vortex_probe1(NULL, ioport_map(compaq_ioaddr, VORTEX_TOTAL_SIZE),
1108 compaq_irq, compaq_device_id, vortex_cards_found++);
1111 return vortex_cards_found - orig_cards_found + eisa_found;
1114 /* returns count (>= 0), or negative on error */
1115 static int __devinit vortex_init_one (struct pci_dev *pdev,
1116 const struct pci_device_id *ent)
1118 int rc, unit, pci_bar;
1119 struct vortex_chip_info *vci;
1120 void __iomem *ioaddr;
1122 /* wake up and enable device */
1123 rc = pci_enable_device (pdev);
1127 unit = vortex_cards_found;
1129 if (global_use_mmio < 0 && (unit >= MAX_UNITS || use_mmio[unit] < 0)) {
1130 /* Determine the default if the user didn't override us */
1131 vci = &vortex_info_tbl[ent->driver_data];
1132 pci_bar = vci->drv_flags & (IS_CYCLONE | IS_TORNADO) ? 1 : 0;
1133 } else if (unit < MAX_UNITS && use_mmio[unit] >= 0)
1134 pci_bar = use_mmio[unit] ? 1 : 0;
1136 pci_bar = global_use_mmio ? 1 : 0;
1138 ioaddr = pci_iomap(pdev, pci_bar, 0);
1139 if (!ioaddr) /* If mapping fails, fall-back to BAR 0... */
1140 ioaddr = pci_iomap(pdev, 0, 0);
1142 rc = vortex_probe1(&pdev->dev, ioaddr, pdev->irq,
1143 ent->driver_data, unit);
1145 pci_disable_device (pdev);
1149 vortex_cards_found++;
1156 * Start up the PCI/EISA device which is described by *gendev.
1157 * Return 0 on success.
1159 * NOTE: pdev can be NULL, for the case of a Compaq device
1161 static int __devinit vortex_probe1(struct device *gendev,
1162 void __iomem *ioaddr, int irq,
1163 int chip_idx, int card_idx)
1165 struct vortex_private *vp;
1167 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1169 struct net_device *dev;
1170 static int printed_version;
1171 int retval, print_info;
1172 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1173 char *print_name = "3c59x";
1174 struct pci_dev *pdev = NULL;
1175 struct eisa_device *edev = NULL;
1177 if (!printed_version) {
1179 printed_version = 1;
1183 if ((pdev = DEVICE_PCI(gendev))) {
1184 print_name = pci_name(pdev);
1187 if ((edev = DEVICE_EISA(gendev))) {
1188 print_name = edev->dev.bus_id;
1192 dev = alloc_etherdev(sizeof(*vp));
1195 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1198 SET_MODULE_OWNER(dev);
1199 SET_NETDEV_DEV(dev, gendev);
1200 vp = netdev_priv(dev);
1202 option = global_options;
1204 /* The lower four bits are the media type. */
1205 if (dev->mem_start) {
1207 * The 'options' param is passed in as the third arg to the
1208 * LILO 'ether=' argument for non-modular use
1210 option = dev->mem_start;
1212 else if (card_idx < MAX_UNITS) {
1213 if (options[card_idx] >= 0)
1214 option = options[card_idx];
1218 if (option & 0x8000)
1220 if (option & 0x4000)
1222 if (option & 0x0400)
1226 print_info = (vortex_debug > 1);
1228 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1230 printk(KERN_INFO "%s: 3Com %s %s at %p. Vers " DRV_VERSION "\n",
1232 pdev ? "PCI" : "EISA",
1236 dev->base_addr = (unsigned long)ioaddr;
1239 vp->ioaddr = ioaddr;
1240 vp->large_frames = mtu > 1500;
1241 vp->drv_flags = vci->drv_flags;
1242 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1243 vp->io_size = vci->io_size;
1244 vp->card_idx = card_idx;
1246 /* module list only for Compaq device */
1247 if (gendev == NULL) {
1248 compaq_net_device = dev;
1251 /* PCI-only startup logic */
1253 /* EISA resources already marked, so only PCI needs to do this here */
1254 /* Ignore return value, because Cardbus drivers already allocate for us */
1255 if (request_region(dev->base_addr, vci->io_size, print_name) != NULL)
1256 vp->must_free_region = 1;
1258 /* enable bus-mastering if necessary */
1259 if (vci->flags & PCI_USES_MASTER)
1260 pci_set_master (pdev);
1262 if (vci->drv_flags & IS_VORTEX) {
1264 u8 new_latency = 248;
1266 /* Check the PCI latency value. On the 3c590 series the latency timer
1267 must be set to the maximum value to avoid data corruption that occurs
1268 when the timer expires during a transfer. This bug exists the Vortex
1270 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1271 if (pci_latency < new_latency) {
1272 printk(KERN_INFO "%s: Overriding PCI latency"
1273 " timer (CFLT) setting of %d, new value is %d.\n",
1274 print_name, pci_latency, new_latency);
1275 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1280 spin_lock_init(&vp->lock);
1281 vp->gendev = gendev;
1283 vp->mii.mdio_read = mdio_read;
1284 vp->mii.mdio_write = mdio_write;
1285 vp->mii.phy_id_mask = 0x1f;
1286 vp->mii.reg_num_mask = 0x1f;
1288 /* Makes sure rings are at least 16 byte aligned. */
1289 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1290 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1293 if (vp->rx_ring == 0)
1296 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1297 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1299 /* if we are a PCI driver, we store info in pdev->driver_data
1300 * instead of a module list */
1302 pci_set_drvdata(pdev, dev);
1304 eisa_set_drvdata (edev, dev);
1306 vp->media_override = 7;
1308 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1309 if (vp->media_override != 7)
1311 vp->full_duplex = (option & 0x200) ? 1 : 0;
1312 vp->bus_master = (option & 16) ? 1 : 0;
1315 if (global_full_duplex > 0)
1316 vp->full_duplex = 1;
1317 if (global_enable_wol > 0)
1320 if (card_idx < MAX_UNITS) {
1321 if (full_duplex[card_idx] > 0)
1322 vp->full_duplex = 1;
1323 if (flow_ctrl[card_idx] > 0)
1325 if (enable_wol[card_idx] > 0)
1329 vp->force_fd = vp->full_duplex;
1330 vp->options = option;
1331 /* Read the station address from the EEPROM. */
1336 if (vci->drv_flags & EEPROM_8BIT)
1338 else if (vci->drv_flags & EEPROM_OFFSET)
1339 base = EEPROM_Read + 0x30;
1343 for (i = 0; i < 0x40; i++) {
1345 iowrite16(base + i, ioaddr + Wn0EepromCmd);
1346 /* Pause for at least 162 us. for the read to take place. */
1347 for (timer = 10; timer >= 0; timer--) {
1349 if ((ioread16(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1352 eeprom[i] = ioread16(ioaddr + Wn0EepromData);
1355 for (i = 0; i < 0x18; i++)
1356 checksum ^= eeprom[i];
1357 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1358 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1360 checksum ^= eeprom[i++];
1361 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1363 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1364 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1365 for (i = 0; i < 3; i++)
1366 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1367 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1369 for (i = 0; i < 6; i++)
1370 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1372 /* Unfortunately an all zero eeprom passes the checksum and this
1373 gets found in the wild in failure cases. Crypto is hard 8) */
1374 if (!is_valid_ether_addr(dev->dev_addr)) {
1376 printk(KERN_ERR "*** EEPROM MAC address is invalid.\n");
1377 goto free_ring; /* With every pack */
1380 for (i = 0; i < 6; i++)
1381 iowrite8(dev->dev_addr[i], ioaddr + i);
1385 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1388 printk(", IRQ %d\n", dev->irq);
1389 /* Tell them about an invalid IRQ. */
1390 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1391 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1396 step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1398 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1399 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1400 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1404 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1407 vp->cb_fn_base = pci_iomap(pdev, 2, 0);
1408 if (!vp->cb_fn_base) {
1414 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1415 print_name, pci_resource_start(pdev, 2),
1420 n = ioread16(ioaddr + Wn2_ResetOptions) & ~0x4010;
1421 if (vp->drv_flags & INVERT_LED_PWR)
1423 if (vp->drv_flags & INVERT_MII_PWR)
1425 iowrite16(n, ioaddr + Wn2_ResetOptions);
1426 if (vp->drv_flags & WNO_XCVR_PWR) {
1428 iowrite16(0x0800, ioaddr);
1432 /* Extract our information from the EEPROM data. */
1433 vp->info1 = eeprom[13];
1434 vp->info2 = eeprom[15];
1435 vp->capabilities = eeprom[16];
1437 if (vp->info1 & 0x8000) {
1438 vp->full_duplex = 1;
1440 printk(KERN_INFO "Full duplex capable\n");
1444 static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1445 unsigned int config;
1447 vp->available_media = ioread16(ioaddr + Wn3_Options);
1448 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1449 vp->available_media = 0x40;
1450 config = ioread32(ioaddr + Wn3_Config);
1452 printk(KERN_DEBUG " Internal config register is %4.4x, "
1453 "transceivers %#x.\n", config, ioread16(ioaddr + Wn3_Options));
1454 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1455 8 << RAM_SIZE(config),
1456 RAM_WIDTH(config) ? "word" : "byte",
1457 ram_split[RAM_SPLIT(config)],
1458 AUTOSELECT(config) ? "autoselect/" : "",
1459 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1460 media_tbl[XCVR(config)].name);
1462 vp->default_media = XCVR(config);
1463 if (vp->default_media == XCVR_NWAY)
1465 vp->autoselect = AUTOSELECT(config);
1468 if (vp->media_override != 7) {
1469 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1470 print_name, vp->media_override,
1471 media_tbl[vp->media_override].name);
1472 dev->if_port = vp->media_override;
1474 dev->if_port = vp->default_media;
1476 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1477 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1478 int phy, phy_idx = 0;
1480 mii_preamble_required++;
1481 if (vp->drv_flags & EXTRA_PREAMBLE)
1482 mii_preamble_required++;
1483 mdio_sync(ioaddr, 32);
1484 mdio_read(dev, 24, MII_BMSR);
1485 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1486 int mii_status, phyx;
1489 * For the 3c905CX we look at index 24 first, because it bogusly
1490 * reports an external PHY at all indices
1498 mii_status = mdio_read(dev, phyx, MII_BMSR);
1499 if (mii_status && mii_status != 0xffff) {
1500 vp->phys[phy_idx++] = phyx;
1502 printk(KERN_INFO " MII transceiver found at address %d,"
1503 " status %4x.\n", phyx, mii_status);
1505 if ((mii_status & 0x0040) == 0)
1506 mii_preamble_required++;
1509 mii_preamble_required--;
1511 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1514 vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE);
1515 if (vp->full_duplex) {
1516 /* Only advertise the FD media types. */
1517 vp->advertising &= ~0x02A0;
1518 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1521 vp->mii.phy_id = vp->phys[0];
1524 if (vp->capabilities & CapBusMaster) {
1525 vp->full_bus_master_tx = 1;
1527 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1528 (vp->info2 & 1) ? "early" : "whole-frame" );
1530 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1531 vp->bus_master = 0; /* AKPM: vortex only */
1534 /* The 3c59x-specific entries in the device structure. */
1535 dev->open = vortex_open;
1536 if (vp->full_bus_master_tx) {
1537 dev->hard_start_xmit = boomerang_start_xmit;
1538 /* Actually, it still should work with iommu. */
1539 dev->features |= NETIF_F_SG;
1540 if (card_idx < MAX_UNITS &&
1541 ((hw_checksums[card_idx] == -1 && (vp->drv_flags & HAS_HWCKSM)) ||
1542 hw_checksums[card_idx] == 1)) {
1543 dev->features |= NETIF_F_IP_CSUM;
1546 dev->hard_start_xmit = vortex_start_xmit;
1550 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1552 (dev->features & NETIF_F_SG) ? "en":"dis",
1553 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1556 dev->stop = vortex_close;
1557 dev->get_stats = vortex_get_stats;
1559 dev->do_ioctl = vortex_ioctl;
1561 dev->ethtool_ops = &vortex_ethtool_ops;
1562 dev->set_multicast_list = set_rx_mode;
1563 dev->tx_timeout = vortex_tx_timeout;
1564 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1565 #ifdef CONFIG_NET_POLL_CONTROLLER
1566 dev->poll_controller = poll_vortex;
1569 vp->pm_state_valid = 1;
1570 pci_save_state(VORTEX_PCI(vp));
1573 retval = register_netdev(dev);
1578 pci_free_consistent(pdev,
1579 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1580 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1584 if (vp->must_free_region)
1585 release_region(dev->base_addr, vci->io_size);
1587 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1593 issue_and_wait(struct net_device *dev, int cmd)
1595 struct vortex_private *vp = netdev_priv(dev);
1596 void __iomem *ioaddr = vp->ioaddr;
1599 iowrite16(cmd, ioaddr + EL3_CMD);
1600 for (i = 0; i < 2000; i++) {
1601 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
1605 /* OK, that didn't work. Do it the slow way. One second */
1606 for (i = 0; i < 100000; i++) {
1607 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) {
1608 if (vortex_debug > 1)
1609 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1610 dev->name, cmd, i * 10);
1615 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1616 dev->name, cmd, ioread16(ioaddr + EL3_STATUS));
1620 vortex_up(struct net_device *dev)
1622 struct vortex_private *vp = netdev_priv(dev);
1623 void __iomem *ioaddr = vp->ioaddr;
1624 unsigned int config;
1627 if (VORTEX_PCI(vp)) {
1628 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
1629 if (vp->pm_state_valid)
1630 pci_restore_state(VORTEX_PCI(vp));
1631 pci_enable_device(VORTEX_PCI(vp));
1634 /* Before initializing select the active media port. */
1636 config = ioread32(ioaddr + Wn3_Config);
1638 if (vp->media_override != 7) {
1639 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1640 dev->name, vp->media_override,
1641 media_tbl[vp->media_override].name);
1642 dev->if_port = vp->media_override;
1643 } else if (vp->autoselect) {
1645 if (vortex_debug > 1)
1646 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1647 dev->name, dev->if_port);
1648 dev->if_port = XCVR_NWAY;
1650 /* Find first available media type, starting with 100baseTx. */
1651 dev->if_port = XCVR_100baseTx;
1652 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1653 dev->if_port = media_tbl[dev->if_port].next;
1654 if (vortex_debug > 1)
1655 printk(KERN_INFO "%s: first available media type: %s\n",
1656 dev->name, media_tbl[dev->if_port].name);
1659 dev->if_port = vp->default_media;
1660 if (vortex_debug > 1)
1661 printk(KERN_INFO "%s: using default media %s\n",
1662 dev->name, media_tbl[dev->if_port].name);
1665 init_timer(&vp->timer);
1666 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1667 vp->timer.data = (unsigned long)dev;
1668 vp->timer.function = vortex_timer; /* timer handler */
1669 add_timer(&vp->timer);
1671 init_timer(&vp->rx_oom_timer);
1672 vp->rx_oom_timer.data = (unsigned long)dev;
1673 vp->rx_oom_timer.function = rx_oom_timer;
1675 if (vortex_debug > 1)
1676 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1677 dev->name, media_tbl[dev->if_port].name);
1679 vp->full_duplex = vp->force_fd;
1680 config = BFINS(config, dev->if_port, 20, 4);
1681 if (vortex_debug > 6)
1682 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1683 iowrite32(config, ioaddr + Wn3_Config);
1685 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1686 int mii_reg1, mii_reg5;
1688 /* Read BMSR (reg1) only to clear old status. */
1689 mii_reg1 = mdio_read(dev, vp->phys[0], MII_BMSR);
1690 mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA);
1691 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1692 netif_carrier_off(dev); /* No MII device or no link partner report */
1694 mii_reg5 &= vp->advertising;
1695 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1696 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1697 vp->full_duplex = 1;
1698 netif_carrier_on(dev);
1700 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1701 if (vortex_debug > 1)
1702 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1703 " info1 %04x, setting %s-duplex.\n",
1704 dev->name, vp->phys[0],
1706 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1710 /* Set the full-duplex bit. */
1711 iowrite16( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1712 (vp->large_frames ? 0x40 : 0) |
1713 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1714 ioaddr + Wn3_MAC_Ctrl);
1716 if (vortex_debug > 1) {
1717 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1721 issue_and_wait(dev, TxReset);
1723 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1725 issue_and_wait(dev, RxReset|0x04);
1727 iowrite16(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1729 if (vortex_debug > 1) {
1731 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1732 dev->name, dev->irq, ioread16(ioaddr + Wn4_Media));
1735 /* Set the station address and mask in window 2 each time opened. */
1737 for (i = 0; i < 6; i++)
1738 iowrite8(dev->dev_addr[i], ioaddr + i);
1739 for (; i < 12; i+=2)
1740 iowrite16(0, ioaddr + i);
1742 if (vp->cb_fn_base) {
1743 unsigned short n = ioread16(ioaddr + Wn2_ResetOptions) & ~0x4010;
1744 if (vp->drv_flags & INVERT_LED_PWR)
1746 if (vp->drv_flags & INVERT_MII_PWR)
1748 iowrite16(n, ioaddr + Wn2_ResetOptions);
1751 if (dev->if_port == XCVR_10base2)
1752 /* Start the thinnet transceiver. We should really wait 50ms...*/
1753 iowrite16(StartCoax, ioaddr + EL3_CMD);
1754 if (dev->if_port != XCVR_NWAY) {
1756 iowrite16((ioread16(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1757 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1760 /* Switch to the stats window, and clear all stats by reading. */
1761 iowrite16(StatsDisable, ioaddr + EL3_CMD);
1763 for (i = 0; i < 10; i++)
1764 ioread8(ioaddr + i);
1765 ioread16(ioaddr + 10);
1766 ioread16(ioaddr + 12);
1767 /* New: On the Vortex we must also clear the BadSSD counter. */
1769 ioread8(ioaddr + 12);
1770 /* ..and on the Boomerang we enable the extra statistics bits. */
1771 iowrite16(0x0040, ioaddr + Wn4_NetDiag);
1773 /* Switch to register set 7 for normal use. */
1776 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1777 vp->cur_rx = vp->dirty_rx = 0;
1778 /* Initialize the RxEarly register as recommended. */
1779 iowrite16(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1780 iowrite32(0x0020, ioaddr + PktStatus);
1781 iowrite32(vp->rx_ring_dma, ioaddr + UpListPtr);
1783 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1784 vp->cur_tx = vp->dirty_tx = 0;
1785 if (vp->drv_flags & IS_BOOMERANG)
1786 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1787 /* Clear the Rx, Tx rings. */
1788 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1789 vp->rx_ring[i].status = 0;
1790 for (i = 0; i < TX_RING_SIZE; i++)
1791 vp->tx_skbuff[i] = NULL;
1792 iowrite32(0, ioaddr + DownListPtr);
1794 /* Set receiver mode: presumably accept b-case and phys addr only. */
1796 /* enable 802.1q tagged frames */
1797 set_8021q_mode(dev, 1);
1798 iowrite16(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1800 // issue_and_wait(dev, SetTxStart|0x07ff);
1801 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1802 iowrite16(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1803 /* Allow status bits to be seen. */
1804 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1805 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1806 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1807 (vp->bus_master ? DMADone : 0);
1808 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1809 (vp->full_bus_master_rx ? 0 : RxComplete) |
1810 StatsFull | HostError | TxComplete | IntReq
1811 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1812 iowrite16(vp->status_enable, ioaddr + EL3_CMD);
1813 /* Ack all pending events, and set active indicator mask. */
1814 iowrite16(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1816 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
1817 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1818 iowrite32(0x8000, vp->cb_fn_base + 4);
1819 netif_start_queue (dev);
1823 vortex_open(struct net_device *dev)
1825 struct vortex_private *vp = netdev_priv(dev);
1829 /* Use the now-standard shared IRQ implementation. */
1830 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1831 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1832 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1836 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1837 if (vortex_debug > 2)
1838 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1839 for (i = 0; i < RX_RING_SIZE; i++) {
1840 struct sk_buff *skb;
1841 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1842 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1843 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1844 skb = dev_alloc_skb(PKT_BUF_SZ);
1845 vp->rx_skbuff[i] = skb;
1847 break; /* Bad news! */
1848 skb->dev = dev; /* Mark as being used by this device. */
1849 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1850 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1852 if (i != RX_RING_SIZE) {
1854 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1855 for (j = 0; j < i; j++) {
1856 if (vp->rx_skbuff[j]) {
1857 dev_kfree_skb(vp->rx_skbuff[j]);
1858 vp->rx_skbuff[j] = NULL;
1864 /* Wrap the ring. */
1865 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1872 free_irq(dev->irq, dev);
1874 if (vortex_debug > 1)
1875 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1880 vortex_timer(unsigned long data)
1882 struct net_device *dev = (struct net_device *)data;
1883 struct vortex_private *vp = netdev_priv(dev);
1884 void __iomem *ioaddr = vp->ioaddr;
1885 int next_tick = 60*HZ;
1887 int media_status, mii_status, old_window;
1889 if (vortex_debug > 2) {
1890 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1891 dev->name, media_tbl[dev->if_port].name);
1892 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1896 goto leave_media_alone;
1897 disable_irq(dev->irq);
1898 old_window = ioread16(ioaddr + EL3_CMD) >> 13;
1900 media_status = ioread16(ioaddr + Wn4_Media);
1901 switch (dev->if_port) {
1902 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1903 if (media_status & Media_LnkBeat) {
1904 netif_carrier_on(dev);
1906 if (vortex_debug > 1)
1907 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1908 dev->name, media_tbl[dev->if_port].name, media_status);
1910 netif_carrier_off(dev);
1911 if (vortex_debug > 1) {
1912 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1913 dev->name, media_tbl[dev->if_port].name, media_status);
1917 case XCVR_MII: case XCVR_NWAY:
1919 spin_lock_bh(&vp->lock);
1920 mii_status = mdio_read(dev, vp->phys[0], MII_BMSR);
1921 if (!(mii_status & BMSR_LSTATUS)) {
1922 /* Re-read to get actual link status */
1923 mii_status = mdio_read(dev, vp->phys[0], MII_BMSR);
1926 if (vortex_debug > 2)
1927 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1928 dev->name, mii_status);
1929 if (mii_status & BMSR_LSTATUS) {
1930 int mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA);
1931 if (! vp->force_fd && mii_reg5 != 0xffff) {
1934 mii_reg5 &= vp->advertising;
1935 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1936 if (vp->full_duplex != duplex) {
1937 vp->full_duplex = duplex;
1938 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1939 "#%d link partner capability of %4.4x.\n",
1940 dev->name, vp->full_duplex ? "full" : "half",
1941 vp->phys[0], mii_reg5);
1942 /* Set the full-duplex bit. */
1944 iowrite16( (vp->full_duplex ? 0x20 : 0) |
1945 (vp->large_frames ? 0x40 : 0) |
1946 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1947 ioaddr + Wn3_MAC_Ctrl);
1948 if (vortex_debug > 1)
1949 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1950 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1953 netif_carrier_on(dev);
1955 netif_carrier_off(dev);
1957 spin_unlock_bh(&vp->lock);
1960 default: /* Other media types handled by Tx timeouts. */
1961 if (vortex_debug > 1)
1962 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1963 dev->name, media_tbl[dev->if_port].name, media_status);
1967 unsigned int config;
1970 dev->if_port = media_tbl[dev->if_port].next;
1971 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1972 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1973 dev->if_port = vp->default_media;
1974 if (vortex_debug > 1)
1975 printk(KERN_DEBUG "%s: Media selection failing, using default "
1977 dev->name, media_tbl[dev->if_port].name);
1979 if (vortex_debug > 1)
1980 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1982 dev->name, media_tbl[dev->if_port].name);
1983 next_tick = media_tbl[dev->if_port].wait;
1985 iowrite16((media_status & ~(Media_10TP|Media_SQE)) |
1986 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1989 config = ioread32(ioaddr + Wn3_Config);
1990 config = BFINS(config, dev->if_port, 20, 4);
1991 iowrite32(config, ioaddr + Wn3_Config);
1993 iowrite16(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1995 if (vortex_debug > 1)
1996 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1997 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1999 EL3WINDOW(old_window);
2000 enable_irq(dev->irq);
2003 if (vortex_debug > 2)
2004 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
2005 dev->name, media_tbl[dev->if_port].name);
2007 mod_timer(&vp->timer, RUN_AT(next_tick));
2009 iowrite16(FakeIntr, ioaddr + EL3_CMD);
2013 static void vortex_tx_timeout(struct net_device *dev)
2015 struct vortex_private *vp = netdev_priv(dev);
2016 void __iomem *ioaddr = vp->ioaddr;
2018 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
2019 dev->name, ioread8(ioaddr + TxStatus),
2020 ioread16(ioaddr + EL3_STATUS));
2022 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
2023 ioread16(ioaddr + Wn4_NetDiag),
2024 ioread16(ioaddr + Wn4_Media),
2025 ioread32(ioaddr + PktStatus),
2026 ioread16(ioaddr + Wn4_FIFODiag));
2027 /* Slight code bloat to be user friendly. */
2028 if ((ioread8(ioaddr + TxStatus) & 0x88) == 0x88)
2029 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
2030 " network cable problem?\n", dev->name);
2031 if (ioread16(ioaddr + EL3_STATUS) & IntLatch) {
2032 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
2033 " IRQ blocked by another device?\n", dev->name);
2034 /* Bad idea here.. but we might as well handle a few events. */
2037 * Block interrupts because vortex_interrupt does a bare spin_lock()
2039 unsigned long flags;
2040 local_irq_save(flags);
2041 if (vp->full_bus_master_tx)
2042 boomerang_interrupt(dev->irq, dev, NULL);
2044 vortex_interrupt(dev->irq, dev, NULL);
2045 local_irq_restore(flags);
2049 if (vortex_debug > 0)
2052 issue_and_wait(dev, TxReset);
2054 vp->stats.tx_errors++;
2055 if (vp->full_bus_master_tx) {
2056 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
2057 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0)
2058 iowrite32(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
2059 ioaddr + DownListPtr);
2060 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
2061 netif_wake_queue (dev);
2062 if (vp->drv_flags & IS_BOOMERANG)
2063 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
2064 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2066 vp->stats.tx_dropped++;
2067 netif_wake_queue(dev);
2070 /* Issue Tx Enable */
2071 iowrite16(TxEnable, ioaddr + EL3_CMD);
2072 dev->trans_start = jiffies;
2074 /* Switch to register set 7 for normal use. */
2079 * Handle uncommon interrupt sources. This is a separate routine to minimize
2083 vortex_error(struct net_device *dev, int status)
2085 struct vortex_private *vp = netdev_priv(dev);
2086 void __iomem *ioaddr = vp->ioaddr;
2087 int do_tx_reset = 0, reset_mask = 0;
2088 unsigned char tx_status = 0;
2090 if (vortex_debug > 2) {
2091 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
2094 if (status & TxComplete) { /* Really "TxError" for us. */
2095 tx_status = ioread8(ioaddr + TxStatus);
2096 /* Presumably a tx-timeout. We must merely re-enable. */
2097 if (vortex_debug > 2
2098 || (tx_status != 0x88 && vortex_debug > 0)) {
2099 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
2100 dev->name, tx_status);
2101 if (tx_status == 0x82) {
2102 printk(KERN_ERR "Probably a duplex mismatch. See "
2103 "Documentation/networking/vortex.txt\n");
2107 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2108 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2109 iowrite8(0, ioaddr + TxStatus);
2110 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2112 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
2114 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2115 } else { /* Merely re-enable the transmitter. */
2116 iowrite16(TxEnable, ioaddr + EL3_CMD);
2120 if (status & RxEarly) { /* Rx early is unused. */
2122 iowrite16(AckIntr | RxEarly, ioaddr + EL3_CMD);
2124 if (status & StatsFull) { /* Empty statistics. */
2125 static int DoneDidThat;
2126 if (vortex_debug > 4)
2127 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2128 update_stats(ioaddr, dev);
2129 /* HACK: Disable statistics as an interrupt source. */
2130 /* This occurs when we have the wrong media type! */
2131 if (DoneDidThat == 0 &&
2132 ioread16(ioaddr + EL3_STATUS) & StatsFull) {
2133 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2134 "stats as an interrupt source.\n", dev->name);
2136 iowrite16(SetIntrEnb | (ioread16(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2137 vp->intr_enable &= ~StatsFull;
2142 if (status & IntReq) { /* Restore all interrupt sources. */
2143 iowrite16(vp->status_enable, ioaddr + EL3_CMD);
2144 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
2146 if (status & HostError) {
2149 fifo_diag = ioread16(ioaddr + Wn4_FIFODiag);
2150 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2151 dev->name, fifo_diag);
2152 /* Adapter failure requires Tx/Rx reset and reinit. */
2153 if (vp->full_bus_master_tx) {
2154 int bus_status = ioread32(ioaddr + PktStatus);
2155 /* 0x80000000 PCI master abort. */
2156 /* 0x40000000 PCI target abort. */
2158 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2160 /* In this case, blow the card away */
2161 /* Must not enter D3 or we can't legally issue the reset! */
2162 vortex_down(dev, 0);
2163 issue_and_wait(dev, TotalReset | 0xff);
2164 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2165 } else if (fifo_diag & 0x0400)
2167 if (fifo_diag & 0x3000) {
2168 /* Reset Rx fifo and upload logic */
2169 issue_and_wait(dev, RxReset|0x07);
2170 /* Set the Rx filter to the current state. */
2172 /* enable 802.1q VLAN tagged frames */
2173 set_8021q_mode(dev, 1);
2174 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2175 iowrite16(AckIntr | HostError, ioaddr + EL3_CMD);
2180 issue_and_wait(dev, TxReset|reset_mask);
2181 iowrite16(TxEnable, ioaddr + EL3_CMD);
2182 if (!vp->full_bus_master_tx)
2183 netif_wake_queue(dev);
2188 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2190 struct vortex_private *vp = netdev_priv(dev);
2191 void __iomem *ioaddr = vp->ioaddr;
2193 /* Put out the doubleword header... */
2194 iowrite32(skb->len, ioaddr + TX_FIFO);
2195 if (vp->bus_master) {
2196 /* Set the bus-master controller to transfer the packet. */
2197 int len = (skb->len + 3) & ~3;
2198 iowrite32( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2199 ioaddr + Wn7_MasterAddr);
2200 iowrite16(len, ioaddr + Wn7_MasterLen);
2202 iowrite16(StartDMADown, ioaddr + EL3_CMD);
2203 /* netif_wake_queue() will be called at the DMADone interrupt. */
2205 /* ... and the packet rounded to a doubleword. */
2206 iowrite32_rep(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2207 dev_kfree_skb (skb);
2208 if (ioread16(ioaddr + TxFree) > 1536) {
2209 netif_start_queue (dev); /* AKPM: redundant? */
2211 /* Interrupt us when the FIFO has room for max-sized packet. */
2212 netif_stop_queue(dev);
2213 iowrite16(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2217 dev->trans_start = jiffies;
2219 /* Clear the Tx status stack. */
2224 while (--i > 0 && (tx_status = ioread8(ioaddr + TxStatus)) > 0) {
2225 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2226 if (vortex_debug > 2)
2227 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2228 dev->name, tx_status);
2229 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2230 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2231 if (tx_status & 0x30) {
2232 issue_and_wait(dev, TxReset);
2234 iowrite16(TxEnable, ioaddr + EL3_CMD);
2236 iowrite8(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2243 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2245 struct vortex_private *vp = netdev_priv(dev);
2246 void __iomem *ioaddr = vp->ioaddr;
2247 /* Calculate the next Tx descriptor entry. */
2248 int entry = vp->cur_tx % TX_RING_SIZE;
2249 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2250 unsigned long flags;
2252 if (vortex_debug > 6) {
2253 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2254 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2255 dev->name, vp->cur_tx);
2258 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2259 if (vortex_debug > 0)
2260 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2262 netif_stop_queue(dev);
2266 vp->tx_skbuff[entry] = skb;
2268 vp->tx_ring[entry].next = 0;
2270 if (skb->ip_summed != CHECKSUM_HW)
2271 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2273 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2275 if (!skb_shinfo(skb)->nr_frags) {
2276 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2277 skb->len, PCI_DMA_TODEVICE));
2278 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2282 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2283 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2284 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2286 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2287 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2289 vp->tx_ring[entry].frag[i+1].addr =
2290 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2291 (void*)page_address(frag->page) + frag->page_offset,
2292 frag->size, PCI_DMA_TODEVICE));
2294 if (i == skb_shinfo(skb)->nr_frags-1)
2295 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2297 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2301 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2302 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2303 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2306 spin_lock_irqsave(&vp->lock, flags);
2307 /* Wait for the stall to complete. */
2308 issue_and_wait(dev, DownStall);
2309 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2310 if (ioread32(ioaddr + DownListPtr) == 0) {
2311 iowrite32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2312 vp->queued_packet++;
2316 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2317 netif_stop_queue (dev);
2318 } else { /* Clear previous interrupt enable. */
2319 #if defined(tx_interrupt_mitigation)
2320 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2321 * were selected, this would corrupt DN_COMPLETE. No?
2323 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2326 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2327 spin_unlock_irqrestore(&vp->lock, flags);
2328 dev->trans_start = jiffies;
2332 /* The interrupt handler does all of the Rx thread work and cleans up
2333 after the Tx thread. */
2336 * This is the ISR for the vortex series chips.
2337 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2341 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2343 struct net_device *dev = dev_id;
2344 struct vortex_private *vp = netdev_priv(dev);
2345 void __iomem *ioaddr;
2347 int work_done = max_interrupt_work;
2350 ioaddr = vp->ioaddr;
2351 spin_lock(&vp->lock);
2353 status = ioread16(ioaddr + EL3_STATUS);
2355 if (vortex_debug > 6)
2356 printk("vortex_interrupt(). status=0x%4x\n", status);
2358 if ((status & IntLatch) == 0)
2359 goto handler_exit; /* No interrupt: shared IRQs cause this */
2362 if (status & IntReq) {
2363 status |= vp->deferred;
2367 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2370 if (vortex_debug > 4)
2371 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2372 dev->name, status, ioread8(ioaddr + Timer));
2375 if (vortex_debug > 5)
2376 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2378 if (status & RxComplete)
2381 if (status & TxAvailable) {
2382 if (vortex_debug > 5)
2383 printk(KERN_DEBUG " TX room bit was handled.\n");
2384 /* There's room in the FIFO for a full-sized packet. */
2385 iowrite16(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2386 netif_wake_queue (dev);
2389 if (status & DMADone) {
2390 if (ioread16(ioaddr + Wn7_MasterStatus) & 0x1000) {
2391 iowrite16(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2392 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2393 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2394 if (ioread16(ioaddr + TxFree) > 1536) {
2396 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2397 * insufficient FIFO room, the TxAvailable test will succeed and call
2398 * netif_wake_queue()
2400 netif_wake_queue(dev);
2401 } else { /* Interrupt when FIFO has room for max-sized packet. */
2402 iowrite16(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2403 netif_stop_queue(dev);
2407 /* Check for all uncommon interrupts at once. */
2408 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2409 if (status == 0xffff)
2411 vortex_error(dev, status);
2414 if (--work_done < 0) {
2415 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2416 "%4.4x.\n", dev->name, status);
2417 /* Disable all pending interrupts. */
2419 vp->deferred |= status;
2420 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable),
2422 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2423 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2424 /* The timer will reenable interrupts. */
2425 mod_timer(&vp->timer, jiffies + 1*HZ);
2428 /* Acknowledge the IRQ. */
2429 iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2430 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2432 if (vortex_debug > 4)
2433 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2436 spin_unlock(&vp->lock);
2437 return IRQ_RETVAL(handled);
2441 * This is the ISR for the boomerang series chips.
2442 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2446 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2448 struct net_device *dev = dev_id;
2449 struct vortex_private *vp = netdev_priv(dev);
2450 void __iomem *ioaddr;
2452 int work_done = max_interrupt_work;
2454 ioaddr = vp->ioaddr;
2457 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2458 * and boomerang_start_xmit
2460 spin_lock(&vp->lock);
2462 status = ioread16(ioaddr + EL3_STATUS);
2464 if (vortex_debug > 6)
2465 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2467 if ((status & IntLatch) == 0)
2468 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2470 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2471 if (vortex_debug > 1)
2472 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2476 if (status & IntReq) {
2477 status |= vp->deferred;
2481 if (vortex_debug > 4)
2482 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2483 dev->name, status, ioread8(ioaddr + Timer));
2485 if (vortex_debug > 5)
2486 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2488 if (status & UpComplete) {
2489 iowrite16(AckIntr | UpComplete, ioaddr + EL3_CMD);
2490 if (vortex_debug > 5)
2491 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2495 if (status & DownComplete) {
2496 unsigned int dirty_tx = vp->dirty_tx;
2498 iowrite16(AckIntr | DownComplete, ioaddr + EL3_CMD);
2499 while (vp->cur_tx - dirty_tx > 0) {
2500 int entry = dirty_tx % TX_RING_SIZE;
2501 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2502 if (ioread32(ioaddr + DownListPtr) ==
2503 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2504 break; /* It still hasn't been processed. */
2506 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2507 break; /* It still hasn't been processed. */
2510 if (vp->tx_skbuff[entry]) {
2511 struct sk_buff *skb = vp->tx_skbuff[entry];
2514 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2515 pci_unmap_single(VORTEX_PCI(vp),
2516 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2517 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2520 pci_unmap_single(VORTEX_PCI(vp),
2521 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2523 dev_kfree_skb_irq(skb);
2524 vp->tx_skbuff[entry] = NULL;
2526 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2528 /* vp->stats.tx_packets++; Counted below. */
2531 vp->dirty_tx = dirty_tx;
2532 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2533 if (vortex_debug > 6)
2534 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2535 netif_wake_queue (dev);
2539 /* Check for all uncommon interrupts at once. */
2540 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2541 vortex_error(dev, status);
2543 if (--work_done < 0) {
2544 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2545 "%4.4x.\n", dev->name, status);
2546 /* Disable all pending interrupts. */
2548 vp->deferred |= status;
2549 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable),
2551 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2552 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2553 /* The timer will reenable interrupts. */
2554 mod_timer(&vp->timer, jiffies + 1*HZ);
2557 /* Acknowledge the IRQ. */
2558 iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2559 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2560 iowrite32(0x8000, vp->cb_fn_base + 4);
2562 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch);
2564 if (vortex_debug > 4)
2565 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2568 spin_unlock(&vp->lock);
2572 static int vortex_rx(struct net_device *dev)
2574 struct vortex_private *vp = netdev_priv(dev);
2575 void __iomem *ioaddr = vp->ioaddr;
2579 if (vortex_debug > 5)
2580 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2581 ioread16(ioaddr+EL3_STATUS), ioread16(ioaddr+RxStatus));
2582 while ((rx_status = ioread16(ioaddr + RxStatus)) > 0) {
2583 if (rx_status & 0x4000) { /* Error, update stats. */
2584 unsigned char rx_error = ioread8(ioaddr + RxErrors);
2585 if (vortex_debug > 2)
2586 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2587 vp->stats.rx_errors++;
2588 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2589 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2590 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2591 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2592 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2594 /* The packet length: up to 4.5K!. */
2595 int pkt_len = rx_status & 0x1fff;
2596 struct sk_buff *skb;
2598 skb = dev_alloc_skb(pkt_len + 5);
2599 if (vortex_debug > 4)
2600 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2601 pkt_len, rx_status);
2604 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2605 /* 'skb_put()' points to the start of sk_buff data area. */
2606 if (vp->bus_master &&
2607 ! (ioread16(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2608 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2609 pkt_len, PCI_DMA_FROMDEVICE);
2610 iowrite32(dma, ioaddr + Wn7_MasterAddr);
2611 iowrite16((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2612 iowrite16(StartDMAUp, ioaddr + EL3_CMD);
2613 while (ioread16(ioaddr + Wn7_MasterStatus) & 0x8000)
2615 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2617 ioread32_rep(ioaddr + RX_FIFO,
2618 skb_put(skb, pkt_len),
2619 (pkt_len + 3) >> 2);
2621 iowrite16(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2622 skb->protocol = eth_type_trans(skb, dev);
2624 dev->last_rx = jiffies;
2625 vp->stats.rx_packets++;
2626 /* Wait a limited time to go to next packet. */
2627 for (i = 200; i >= 0; i--)
2628 if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
2631 } else if (vortex_debug > 0)
2632 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2633 "size %d.\n", dev->name, pkt_len);
2634 vp->stats.rx_dropped++;
2636 issue_and_wait(dev, RxDiscard);
2643 boomerang_rx(struct net_device *dev)
2645 struct vortex_private *vp = netdev_priv(dev);
2646 int entry = vp->cur_rx % RX_RING_SIZE;
2647 void __iomem *ioaddr = vp->ioaddr;
2649 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2651 if (vortex_debug > 5)
2652 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));
2654 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2655 if (--rx_work_limit < 0)
2657 if (rx_status & RxDError) { /* Error, update stats. */
2658 unsigned char rx_error = rx_status >> 16;
2659 if (vortex_debug > 2)
2660 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2661 vp->stats.rx_errors++;
2662 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2663 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2664 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2665 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2666 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2668 /* The packet length: up to 4.5K!. */
2669 int pkt_len = rx_status & 0x1fff;
2670 struct sk_buff *skb;
2671 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2673 if (vortex_debug > 4)
2674 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2675 pkt_len, rx_status);
2677 /* Check if the packet is long enough to just accept without
2678 copying to a properly sized skbuff. */
2679 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2681 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2682 pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2683 /* 'skb_put()' points to the start of sk_buff data area. */
2684 memcpy(skb_put(skb, pkt_len),
2685 vp->rx_skbuff[entry]->data,
2687 pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2690 /* Pass up the skbuff already on the Rx ring. */
2691 skb = vp->rx_skbuff[entry];
2692 vp->rx_skbuff[entry] = NULL;
2693 skb_put(skb, pkt_len);
2694 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2697 skb->protocol = eth_type_trans(skb, dev);
2698 { /* Use hardware checksum info. */
2699 int csum_bits = rx_status & 0xee000000;
2701 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2702 csum_bits == (IPChksumValid | UDPChksumValid))) {
2703 skb->ip_summed = CHECKSUM_UNNECESSARY;
2708 dev->last_rx = jiffies;
2709 vp->stats.rx_packets++;
2711 entry = (++vp->cur_rx) % RX_RING_SIZE;
2713 /* Refill the Rx ring buffers. */
2714 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2715 struct sk_buff *skb;
2716 entry = vp->dirty_rx % RX_RING_SIZE;
2717 if (vp->rx_skbuff[entry] == NULL) {
2718 skb = dev_alloc_skb(PKT_BUF_SZ);
2720 static unsigned long last_jif;
2721 if ((jiffies - last_jif) > 10 * HZ) {
2722 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2725 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2726 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2727 break; /* Bad news! */
2729 skb->dev = dev; /* Mark as being used by this device. */
2730 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2731 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2732 vp->rx_skbuff[entry] = skb;
2734 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2735 iowrite16(UpUnstall, ioaddr + EL3_CMD);
2741 * If we've hit a total OOM refilling the Rx ring we poll once a second
2742 * for some memory. Otherwise there is no way to restart the rx process.
2745 rx_oom_timer(unsigned long arg)
2747 struct net_device *dev = (struct net_device *)arg;
2748 struct vortex_private *vp = netdev_priv(dev);
2750 spin_lock_irq(&vp->lock);
2751 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2753 if (vortex_debug > 1) {
2754 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2755 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2757 spin_unlock_irq(&vp->lock);
2761 vortex_down(struct net_device *dev, int final_down)
2763 struct vortex_private *vp = netdev_priv(dev);
2764 void __iomem *ioaddr = vp->ioaddr;
2766 netif_stop_queue (dev);
2768 del_timer_sync(&vp->rx_oom_timer);
2769 del_timer_sync(&vp->timer);
2771 /* Turn off statistics ASAP. We update vp->stats below. */
2772 iowrite16(StatsDisable, ioaddr + EL3_CMD);
2774 /* Disable the receiver and transmitter. */
2775 iowrite16(RxDisable, ioaddr + EL3_CMD);
2776 iowrite16(TxDisable, ioaddr + EL3_CMD);
2778 /* Disable receiving 802.1q tagged frames */
2779 set_8021q_mode(dev, 0);
2781 if (dev->if_port == XCVR_10base2)
2782 /* Turn off thinnet power. Green! */
2783 iowrite16(StopCoax, ioaddr + EL3_CMD);
2785 iowrite16(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2787 update_stats(ioaddr, dev);
2788 if (vp->full_bus_master_rx)
2789 iowrite32(0, ioaddr + UpListPtr);
2790 if (vp->full_bus_master_tx)
2791 iowrite32(0, ioaddr + DownListPtr);
2793 if (final_down && VORTEX_PCI(vp)) {
2794 vp->pm_state_valid = 1;
2795 pci_save_state(VORTEX_PCI(vp));
2801 vortex_close(struct net_device *dev)
2803 struct vortex_private *vp = netdev_priv(dev);
2804 void __iomem *ioaddr = vp->ioaddr;
2807 if (netif_device_present(dev))
2808 vortex_down(dev, 1);
2810 if (vortex_debug > 1) {
2811 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2812 dev->name, ioread16(ioaddr + EL3_STATUS), ioread8(ioaddr + TxStatus));
2813 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2814 " tx_queued %d Rx pre-checksummed %d.\n",
2815 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2819 if (vp->rx_csumhits &&
2820 (vp->drv_flags & HAS_HWCKSM) == 0 &&
2821 (vp->card_idx >= MAX_UNITS || hw_checksums[vp->card_idx] == -1)) {
2822 printk(KERN_WARNING "%s supports hardware checksums, and we're "
2823 "not using them!\n", dev->name);
2827 free_irq(dev->irq, dev);
2829 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2830 for (i = 0; i < RX_RING_SIZE; i++)
2831 if (vp->rx_skbuff[i]) {
2832 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2833 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2834 dev_kfree_skb(vp->rx_skbuff[i]);
2835 vp->rx_skbuff[i] = NULL;
2838 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2839 for (i = 0; i < TX_RING_SIZE; i++) {
2840 if (vp->tx_skbuff[i]) {
2841 struct sk_buff *skb = vp->tx_skbuff[i];
2845 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2846 pci_unmap_single(VORTEX_PCI(vp),
2847 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2848 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2851 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2854 vp->tx_skbuff[i] = NULL;
2863 dump_tx_ring(struct net_device *dev)
2865 if (vortex_debug > 0) {
2866 struct vortex_private *vp = netdev_priv(dev);
2867 void __iomem *ioaddr = vp->ioaddr;
2869 if (vp->full_bus_master_tx) {
2871 int stalled = ioread32(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2873 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2874 vp->full_bus_master_tx,
2875 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2876 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2877 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2878 ioread32(ioaddr + DownListPtr),
2879 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2880 issue_and_wait(dev, DownStall);
2881 for (i = 0; i < TX_RING_SIZE; i++) {
2882 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2885 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2887 le32_to_cpu(vp->tx_ring[i].length),
2889 le32_to_cpu(vp->tx_ring[i].status));
2892 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2897 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2899 struct vortex_private *vp = netdev_priv(dev);
2900 void __iomem *ioaddr = vp->ioaddr;
2901 unsigned long flags;
2903 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2904 spin_lock_irqsave (&vp->lock, flags);
2905 update_stats(ioaddr, dev);
2906 spin_unlock_irqrestore (&vp->lock, flags);
2911 /* Update statistics.
2912 Unlike with the EL3 we need not worry about interrupts changing
2913 the window setting from underneath us, but we must still guard
2914 against a race condition with a StatsUpdate interrupt updating the
2915 table. This is done by checking that the ASM (!) code generated uses
2916 atomic updates with '+='.
2918 static void update_stats(void __iomem *ioaddr, struct net_device *dev)
2920 struct vortex_private *vp = netdev_priv(dev);
2921 int old_window = ioread16(ioaddr + EL3_CMD);
2923 if (old_window == 0xffff) /* Chip suspended or ejected. */
2925 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2926 /* Switch to the stats window, and read everything. */
2928 vp->stats.tx_carrier_errors += ioread8(ioaddr + 0);
2929 vp->stats.tx_heartbeat_errors += ioread8(ioaddr + 1);
2930 vp->stats.collisions += ioread8(ioaddr + 3);
2931 vp->stats.tx_window_errors += ioread8(ioaddr + 4);
2932 vp->stats.rx_fifo_errors += ioread8(ioaddr + 5);
2933 vp->stats.tx_packets += ioread8(ioaddr + 6);
2934 vp->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4;
2935 /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */
2936 /* Don't bother with register 9, an extension of registers 6&7.
2937 If we do use the 6&7 values the atomic update assumption above
2939 vp->stats.rx_bytes += ioread16(ioaddr + 10);
2940 vp->stats.tx_bytes += ioread16(ioaddr + 12);
2941 /* Extra stats for get_ethtool_stats() */
2942 vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2);
2943 vp->xstats.tx_deferred += ioread8(ioaddr + 8);
2945 vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12);
2948 u8 up = ioread8(ioaddr + 13);
2949 vp->stats.rx_bytes += (up & 0x0f) << 16;
2950 vp->stats.tx_bytes += (up & 0xf0) << 12;
2953 EL3WINDOW(old_window >> 13);
2957 static int vortex_nway_reset(struct net_device *dev)
2959 struct vortex_private *vp = netdev_priv(dev);
2960 void __iomem *ioaddr = vp->ioaddr;
2961 unsigned long flags;
2964 spin_lock_irqsave(&vp->lock, flags);
2966 rc = mii_nway_restart(&vp->mii);
2967 spin_unlock_irqrestore(&vp->lock, flags);
2971 static u32 vortex_get_link(struct net_device *dev)
2973 struct vortex_private *vp = netdev_priv(dev);
2974 void __iomem *ioaddr = vp->ioaddr;
2975 unsigned long flags;
2978 spin_lock_irqsave(&vp->lock, flags);
2980 rc = mii_link_ok(&vp->mii);
2981 spin_unlock_irqrestore(&vp->lock, flags);
2985 static int vortex_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2987 struct vortex_private *vp = netdev_priv(dev);
2988 void __iomem *ioaddr = vp->ioaddr;
2989 unsigned long flags;
2992 spin_lock_irqsave(&vp->lock, flags);
2994 rc = mii_ethtool_gset(&vp->mii, cmd);
2995 spin_unlock_irqrestore(&vp->lock, flags);
2999 static int vortex_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3001 struct vortex_private *vp = netdev_priv(dev);
3002 void __iomem *ioaddr = vp->ioaddr;
3003 unsigned long flags;
3006 spin_lock_irqsave(&vp->lock, flags);
3008 rc = mii_ethtool_sset(&vp->mii, cmd);
3009 spin_unlock_irqrestore(&vp->lock, flags);
3013 static u32 vortex_get_msglevel(struct net_device *dev)
3015 return vortex_debug;
3018 static void vortex_set_msglevel(struct net_device *dev, u32 dbg)
3023 static int vortex_get_stats_count(struct net_device *dev)
3025 return VORTEX_NUM_STATS;
3028 static void vortex_get_ethtool_stats(struct net_device *dev,
3029 struct ethtool_stats *stats, u64 *data)
3031 struct vortex_private *vp = netdev_priv(dev);
3032 void __iomem *ioaddr = vp->ioaddr;
3033 unsigned long flags;
3035 spin_lock_irqsave(&vp->lock, flags);
3036 update_stats(ioaddr, dev);
3037 spin_unlock_irqrestore(&vp->lock, flags);
3039 data[0] = vp->xstats.tx_deferred;
3040 data[1] = vp->xstats.tx_multiple_collisions;
3041 data[2] = vp->xstats.rx_bad_ssd;
3045 static void vortex_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3047 switch (stringset) {
3049 memcpy(data, ðtool_stats_keys, sizeof(ethtool_stats_keys));
3057 static void vortex_get_drvinfo(struct net_device *dev,
3058 struct ethtool_drvinfo *info)
3060 struct vortex_private *vp = netdev_priv(dev);
3062 strcpy(info->driver, DRV_NAME);
3063 strcpy(info->version, DRV_VERSION);
3064 if (VORTEX_PCI(vp)) {
3065 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
3067 if (VORTEX_EISA(vp))
3068 sprintf(info->bus_info, vp->gendev->bus_id);
3070 sprintf(info->bus_info, "EISA 0x%lx %d",
3071 dev->base_addr, dev->irq);
3075 static struct ethtool_ops vortex_ethtool_ops = {
3076 .get_drvinfo = vortex_get_drvinfo,
3077 .get_strings = vortex_get_strings,
3078 .get_msglevel = vortex_get_msglevel,
3079 .set_msglevel = vortex_set_msglevel,
3080 .get_ethtool_stats = vortex_get_ethtool_stats,
3081 .get_stats_count = vortex_get_stats_count,
3082 .get_settings = vortex_get_settings,
3083 .set_settings = vortex_set_settings,
3084 .get_link = vortex_get_link,
3085 .nway_reset = vortex_nway_reset,
3086 .get_perm_addr = ethtool_op_get_perm_addr,
3091 * Must power the device up to do MDIO operations
3093 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3096 struct vortex_private *vp = netdev_priv(dev);
3097 void __iomem *ioaddr = vp->ioaddr;
3098 unsigned long flags;
3102 state = VORTEX_PCI(vp)->current_state;
3104 /* The kernel core really should have pci_get_power_state() */
3107 pci_set_power_state(VORTEX_PCI(vp), PCI_D0);
3108 spin_lock_irqsave(&vp->lock, flags);
3110 err = generic_mii_ioctl(&vp->mii, if_mii(rq), cmd, NULL);
3111 spin_unlock_irqrestore(&vp->lock, flags);
3113 pci_set_power_state(VORTEX_PCI(vp), state);
3120 /* Pre-Cyclone chips have no documented multicast filter, so the only
3121 multicast setting is to receive all multicast frames. At least
3122 the chip has a very clean way to set the mode, unlike many others. */
3123 static void set_rx_mode(struct net_device *dev)
3125 struct vortex_private *vp = netdev_priv(dev);
3126 void __iomem *ioaddr = vp->ioaddr;
3129 if (dev->flags & IFF_PROMISC) {
3130 if (vortex_debug > 0)
3131 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
3132 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
3133 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
3134 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
3136 new_mode = SetRxFilter | RxStation | RxBroadcast;
3138 iowrite16(new_mode, ioaddr + EL3_CMD);
3141 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
3142 /* Setup the card so that it can receive frames with an 802.1q VLAN tag.
3143 Note that this must be done after each RxReset due to some backwards
3144 compatibility logic in the Cyclone and Tornado ASICs */
3146 /* The Ethernet Type used for 802.1q tagged frames */
3147 #define VLAN_ETHER_TYPE 0x8100
3149 static void set_8021q_mode(struct net_device *dev, int enable)
3151 struct vortex_private *vp = netdev_priv(dev);
3152 void __iomem *ioaddr = vp->ioaddr;
3153 int old_window = ioread16(ioaddr + EL3_CMD);
3156 if ((vp->drv_flags&IS_CYCLONE) || (vp->drv_flags&IS_TORNADO)) {
3157 /* cyclone and tornado chipsets can recognize 802.1q
3158 * tagged frames and treat them correctly */
3160 int max_pkt_size = dev->mtu+14; /* MTU+Ethernet header */
3162 max_pkt_size += 4; /* 802.1Q VLAN tag */
3165 iowrite16(max_pkt_size, ioaddr+Wn3_MaxPktSize);
3167 /* set VlanEtherType to let the hardware checksumming
3168 treat tagged frames correctly */
3170 iowrite16(VLAN_ETHER_TYPE, ioaddr+Wn7_VlanEtherType);
3172 /* on older cards we have to enable large frames */
3174 vp->large_frames = dev->mtu > 1500 || enable;
3177 mac_ctrl = ioread16(ioaddr+Wn3_MAC_Ctrl);
3178 if (vp->large_frames)
3182 iowrite16(mac_ctrl, ioaddr+Wn3_MAC_Ctrl);
3185 EL3WINDOW(old_window);
3189 static void set_8021q_mode(struct net_device *dev, int enable)
3196 /* MII transceiver control section.
3197 Read and write the MII registers using software-generated serial
3198 MDIO protocol. See the MII specifications or DP83840A data sheet
3201 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
3202 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
3203 "overclocking" issues. */
3204 #define mdio_delay() ioread32(mdio_addr)
3206 #define MDIO_SHIFT_CLK 0x01
3207 #define MDIO_DIR_WRITE 0x04
3208 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
3209 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
3210 #define MDIO_DATA_READ 0x02
3211 #define MDIO_ENB_IN 0x00
3213 /* Generate the preamble required for initial synchronization and
3214 a few older transceivers. */
3215 static void mdio_sync(void __iomem *ioaddr, int bits)
3217 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3219 /* Establish sync by sending at least 32 logic ones. */
3220 while (-- bits >= 0) {
3221 iowrite16(MDIO_DATA_WRITE1, mdio_addr);
3223 iowrite16(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
3228 static int mdio_read(struct net_device *dev, int phy_id, int location)
3231 struct vortex_private *vp = netdev_priv(dev);
3232 void __iomem *ioaddr = vp->ioaddr;
3233 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
3234 unsigned int retval = 0;
3235 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3237 if (mii_preamble_required)
3238 mdio_sync(ioaddr, 32);
3240 /* Shift the read command bits out. */
3241 for (i = 14; i >= 0; i--) {
3242 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3243 iowrite16(dataval, mdio_addr);
3245 iowrite16(dataval | MDIO_SHIFT_CLK, mdio_addr);
3248 /* Read the two transition, 16 data, and wire-idle bits. */
3249 for (i = 19; i > 0; i--) {
3250 iowrite16(MDIO_ENB_IN, mdio_addr);
3252 retval = (retval << 1) | ((ioread16(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
3253 iowrite16(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3256 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
3259 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
3261 struct vortex_private *vp = netdev_priv(dev);
3262 void __iomem *ioaddr = vp->ioaddr;
3263 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
3264 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3267 if (mii_preamble_required)
3268 mdio_sync(ioaddr, 32);
3270 /* Shift the command bits out. */
3271 for (i = 31; i >= 0; i--) {
3272 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3273 iowrite16(dataval, mdio_addr);
3275 iowrite16(dataval | MDIO_SHIFT_CLK, mdio_addr);
3278 /* Leave the interface idle. */
3279 for (i = 1; i >= 0; i--) {
3280 iowrite16(MDIO_ENB_IN, mdio_addr);
3282 iowrite16(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3288 /* ACPI: Advanced Configuration and Power Interface. */
3289 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3290 static void acpi_set_WOL(struct net_device *dev)
3292 struct vortex_private *vp = netdev_priv(dev);
3293 void __iomem *ioaddr = vp->ioaddr;
3295 if (vp->enable_wol) {
3296 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3298 iowrite16(2, ioaddr + 0x0c);
3299 /* The RxFilter must accept the WOL frames. */
3300 iowrite16(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3301 iowrite16(RxEnable, ioaddr + EL3_CMD);
3303 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3305 /* Change the power state to D3; RxEnable doesn't take effect. */
3306 pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
3311 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3313 struct net_device *dev = pci_get_drvdata(pdev);
3314 struct vortex_private *vp;
3317 printk("vortex_remove_one called for Compaq device!\n");
3321 vp = netdev_priv(dev);
3324 pci_iounmap(VORTEX_PCI(vp), vp->cb_fn_base);
3326 unregister_netdev(dev);
3328 if (VORTEX_PCI(vp)) {
3329 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
3330 if (vp->pm_state_valid)
3331 pci_restore_state(VORTEX_PCI(vp));
3332 pci_disable_device(VORTEX_PCI(vp));
3334 /* Should really use issue_and_wait() here */
3335 iowrite16(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14),
3336 vp->ioaddr + EL3_CMD);
3338 pci_iounmap(VORTEX_PCI(vp), vp->ioaddr);
3340 pci_free_consistent(pdev,
3341 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3342 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3345 if (vp->must_free_region)
3346 release_region(dev->base_addr, vp->io_size);
3351 static struct pci_driver vortex_driver = {
3353 .probe = vortex_init_one,
3354 .remove = __devexit_p(vortex_remove_one),
3355 .id_table = vortex_pci_tbl,
3357 .suspend = vortex_suspend,
3358 .resume = vortex_resume,
3363 static int vortex_have_pci;
3364 static int vortex_have_eisa;
3367 static int __init vortex_init (void)
3369 int pci_rc, eisa_rc;
3371 pci_rc = pci_module_init(&vortex_driver);
3372 eisa_rc = vortex_eisa_init();
3375 vortex_have_pci = 1;
3377 vortex_have_eisa = 1;
3379 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3383 static void __exit vortex_eisa_cleanup (void)
3385 struct vortex_private *vp;
3386 void __iomem *ioaddr;
3389 /* Take care of the EISA devices */
3390 eisa_driver_unregister (&vortex_eisa_driver);
3393 if (compaq_net_device) {
3394 vp = compaq_net_device->priv;
3395 ioaddr = ioport_map(compaq_net_device->base_addr,
3398 unregister_netdev (compaq_net_device);
3399 iowrite16 (TotalReset, ioaddr + EL3_CMD);
3400 release_region(compaq_net_device->base_addr,
3403 free_netdev (compaq_net_device);
3408 static void __exit vortex_cleanup (void)
3410 if (vortex_have_pci)
3411 pci_unregister_driver (&vortex_driver);
3412 if (vortex_have_eisa)
3413 vortex_eisa_cleanup ();
3417 module_init(vortex_init);
3418 module_exit(vortex_cleanup);