2 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/delay.h>
17 #include <linux/err.h>
18 #include <linux/highmem.h>
19 #include <linux/log2.h>
20 #include <linux/mmc/host.h>
21 #include <linux/amba/bus.h>
22 #include <linux/clk.h>
23 #include <linux/scatterlist.h>
24 #include <linux/gpio.h>
26 #include <asm/cacheflush.h>
27 #include <asm/div64.h>
29 #include <asm/sizes.h>
30 #include <asm/mach/mmc.h>
34 #define DRIVER_NAME "mmci-pl18x"
36 #define DBG(host,fmt,args...) \
37 pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
39 static unsigned int fmax = 515633;
42 * This must be called with host->lock held
44 static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
49 if (desired >= host->mclk) {
51 host->cclk = host->mclk;
53 clk = host->mclk / (2 * desired) - 1;
56 host->cclk = host->mclk / (2 * (clk + 1));
58 if (host->hw_designer == 0x80)
59 clk |= MCI_FCEN; /* Bug fix in ST IP block */
60 clk |= MCI_CLK_ENABLE;
61 /* This hasn't proven to be worthwhile */
62 /* clk |= MCI_CLK_PWRSAVE; */
65 writel(clk, host->base + MMCICLOCK);
69 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
71 writel(0, host->base + MMCICOMMAND);
79 mrq->data->bytes_xfered = host->data_xfered;
82 * Need to drop the host lock here; mmc_request_done may call
83 * back into the driver...
85 spin_unlock(&host->lock);
86 mmc_request_done(host->mmc, mrq);
87 spin_lock(&host->lock);
90 static void mmci_stop_data(struct mmci_host *host)
92 writel(0, host->base + MMCIDATACTRL);
93 writel(0, host->base + MMCIMASK1);
97 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
99 unsigned int datactrl, timeout, irqmask;
100 unsigned long long clks;
104 DBG(host, "blksz %04x blks %04x flags %08x\n",
105 data->blksz, data->blocks, data->flags);
108 host->size = data->blksz;
109 host->data_xfered = 0;
111 mmci_init_sg(host, data);
113 clks = (unsigned long long)data->timeout_ns * host->cclk;
114 do_div(clks, 1000000000UL);
116 timeout = data->timeout_clks + (unsigned int)clks;
119 writel(timeout, base + MMCIDATATIMER);
120 writel(host->size, base + MMCIDATALENGTH);
122 blksz_bits = ffs(data->blksz) - 1;
123 BUG_ON(1 << blksz_bits != data->blksz);
125 datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
126 if (data->flags & MMC_DATA_READ) {
127 datactrl |= MCI_DPSM_DIRECTION;
128 irqmask = MCI_RXFIFOHALFFULLMASK;
131 * If we have less than a FIFOSIZE of bytes to transfer,
132 * trigger a PIO interrupt as soon as any data is available.
134 if (host->size < MCI_FIFOSIZE)
135 irqmask |= MCI_RXDATAAVLBLMASK;
138 * We don't actually need to include "FIFO empty" here
139 * since its implicit in "FIFO half empty".
141 irqmask = MCI_TXFIFOHALFEMPTYMASK;
144 writel(datactrl, base + MMCIDATACTRL);
145 writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
146 writel(irqmask, base + MMCIMASK1);
150 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
152 void __iomem *base = host->base;
154 DBG(host, "op %02x arg %08x flags %08x\n",
155 cmd->opcode, cmd->arg, cmd->flags);
157 if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
158 writel(0, base + MMCICOMMAND);
162 c |= cmd->opcode | MCI_CPSM_ENABLE;
163 if (cmd->flags & MMC_RSP_PRESENT) {
164 if (cmd->flags & MMC_RSP_136)
165 c |= MCI_CPSM_LONGRSP;
166 c |= MCI_CPSM_RESPONSE;
169 c |= MCI_CPSM_INTERRUPT;
173 writel(cmd->arg, base + MMCIARGUMENT);
174 writel(c, base + MMCICOMMAND);
178 mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
181 if (status & MCI_DATABLOCKEND) {
182 host->data_xfered += data->blksz;
184 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
185 if (status & MCI_DATACRCFAIL)
186 data->error = -EILSEQ;
187 else if (status & MCI_DATATIMEOUT)
188 data->error = -ETIMEDOUT;
189 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
191 status |= MCI_DATAEND;
194 * We hit an error condition. Ensure that any data
195 * partially written to a page is properly coherent.
197 if (host->sg_len && data->flags & MMC_DATA_READ)
198 flush_dcache_page(sg_page(host->sg_ptr));
200 if (status & MCI_DATAEND) {
201 mmci_stop_data(host);
204 mmci_request_end(host, data->mrq);
206 mmci_start_command(host, data->stop, 0);
212 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
215 void __iomem *base = host->base;
219 cmd->resp[0] = readl(base + MMCIRESPONSE0);
220 cmd->resp[1] = readl(base + MMCIRESPONSE1);
221 cmd->resp[2] = readl(base + MMCIRESPONSE2);
222 cmd->resp[3] = readl(base + MMCIRESPONSE3);
224 if (status & MCI_CMDTIMEOUT) {
225 cmd->error = -ETIMEDOUT;
226 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
227 cmd->error = -EILSEQ;
230 if (!cmd->data || cmd->error) {
232 mmci_stop_data(host);
233 mmci_request_end(host, cmd->mrq);
234 } else if (!(cmd->data->flags & MMC_DATA_READ)) {
235 mmci_start_data(host, cmd->data);
239 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
241 void __iomem *base = host->base;
244 int host_remain = host->size;
247 int count = host_remain - (readl(base + MMCIFIFOCNT) << 2);
255 readsl(base + MMCIFIFO, ptr, count >> 2);
259 host_remain -= count;
264 status = readl(base + MMCISTATUS);
265 } while (status & MCI_RXDATAAVLBL);
270 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
272 void __iomem *base = host->base;
276 unsigned int count, maxcnt;
278 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
279 count = min(remain, maxcnt);
281 writesl(base + MMCIFIFO, ptr, count >> 2);
289 status = readl(base + MMCISTATUS);
290 } while (status & MCI_TXFIFOHALFEMPTY);
296 * PIO data transfer IRQ handler.
298 static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
300 struct mmci_host *host = dev_id;
301 void __iomem *base = host->base;
304 status = readl(base + MMCISTATUS);
306 DBG(host, "irq1 %08x\n", status);
310 unsigned int remain, len;
314 * For write, we only need to test the half-empty flag
315 * here - if the FIFO is completely empty, then by
316 * definition it is more than half empty.
318 * For read, check for data available.
320 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
324 * Map the current scatter buffer.
326 buffer = mmci_kmap_atomic(host, &flags) + host->sg_off;
327 remain = host->sg_ptr->length - host->sg_off;
330 if (status & MCI_RXACTIVE)
331 len = mmci_pio_read(host, buffer, remain);
332 if (status & MCI_TXACTIVE)
333 len = mmci_pio_write(host, buffer, remain, status);
338 mmci_kunmap_atomic(host, buffer, &flags);
348 * If we were reading, and we have completed this
349 * page, ensure that the data cache is coherent.
351 if (status & MCI_RXACTIVE)
352 flush_dcache_page(sg_page(host->sg_ptr));
354 if (!mmci_next_sg(host))
357 status = readl(base + MMCISTATUS);
361 * If we're nearing the end of the read, switch to
362 * "any data available" mode.
364 if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
365 writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
368 * If we run out of data, disable the data IRQs; this
369 * prevents a race where the FIFO becomes empty before
370 * the chip itself has disabled the data path, and
371 * stops us racing with our data end IRQ.
373 if (host->size == 0) {
374 writel(0, base + MMCIMASK1);
375 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
382 * Handle completion of command and data transfers.
384 static irqreturn_t mmci_irq(int irq, void *dev_id)
386 struct mmci_host *host = dev_id;
390 spin_lock(&host->lock);
393 struct mmc_command *cmd;
394 struct mmc_data *data;
396 status = readl(host->base + MMCISTATUS);
397 status &= readl(host->base + MMCIMASK0);
398 writel(status, host->base + MMCICLEAR);
400 DBG(host, "irq0 %08x\n", status);
403 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
404 MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
405 mmci_data_irq(host, data, status);
408 if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
409 mmci_cmd_irq(host, cmd, status);
414 spin_unlock(&host->lock);
416 return IRQ_RETVAL(ret);
419 static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
421 struct mmci_host *host = mmc_priv(mmc);
424 WARN_ON(host->mrq != NULL);
426 if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
427 printk(KERN_ERR "%s: Unsupported block size (%d bytes)\n",
428 mmc_hostname(mmc), mrq->data->blksz);
429 mrq->cmd->error = -EINVAL;
430 mmc_request_done(mmc, mrq);
434 spin_lock_irqsave(&host->lock, flags);
438 if (mrq->data && mrq->data->flags & MMC_DATA_READ)
439 mmci_start_data(host, mrq->data);
441 mmci_start_command(host, mrq->cmd, 0);
443 spin_unlock_irqrestore(&host->lock, flags);
446 static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
448 struct mmci_host *host = mmc_priv(mmc);
452 if (host->plat->translate_vdd)
453 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
455 switch (ios->power_mode) {
459 /* The ST version does not have this, fall through to POWER_ON */
460 if (host->hw_designer != AMBA_VENDOR_ST) {
469 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) {
470 if (host->hw_designer != AMBA_VENDOR_ST)
474 * The ST Micro variant use the ROD bit for something
475 * else and only has OD (Open Drain).
481 spin_lock_irqsave(&host->lock, flags);
483 mmci_set_clkreg(host, ios->clock);
485 if (host->pwr != pwr) {
487 writel(pwr, host->base + MMCIPOWER);
490 spin_unlock_irqrestore(&host->lock, flags);
493 static int mmci_get_ro(struct mmc_host *mmc)
495 struct mmci_host *host = mmc_priv(mmc);
497 if (host->gpio_wp == -ENOSYS)
500 return gpio_get_value(host->gpio_wp);
503 static int mmci_get_cd(struct mmc_host *mmc)
505 struct mmci_host *host = mmc_priv(mmc);
508 if (host->gpio_cd == -ENOSYS)
509 status = host->plat->status(mmc_dev(host->mmc));
511 status = gpio_get_value(host->gpio_cd);
516 static const struct mmc_host_ops mmci_ops = {
517 .request = mmci_request,
518 .set_ios = mmci_set_ios,
519 .get_ro = mmci_get_ro,
520 .get_cd = mmci_get_cd,
523 static void mmci_check_status(unsigned long data)
525 struct mmci_host *host = (struct mmci_host *)data;
526 unsigned int status = mmci_get_cd(host->mmc);
528 if (status ^ host->oldstat)
529 mmc_detect_change(host->mmc, 0);
531 host->oldstat = status;
532 mod_timer(&host->timer, jiffies + HZ);
535 static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
537 struct mmc_platform_data *plat = dev->dev.platform_data;
538 struct mmci_host *host;
539 struct mmc_host *mmc;
542 /* must have platform data */
548 ret = amba_request_regions(dev, DRIVER_NAME);
552 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
558 host = mmc_priv(mmc);
561 host->gpio_wp = -ENOSYS;
562 host->gpio_cd = -ENOSYS;
564 host->hw_designer = amba_manf(dev);
565 host->hw_revision = amba_rev(dev);
566 DBG(host, "designer ID = 0x%02x\n", host->hw_designer);
567 DBG(host, "revision = 0x%01x\n", host->hw_revision);
569 host->clk = clk_get(&dev->dev, NULL);
570 if (IS_ERR(host->clk)) {
571 ret = PTR_ERR(host->clk);
576 ret = clk_enable(host->clk);
581 host->mclk = clk_get_rate(host->clk);
583 * According to the spec, mclk is max 100 MHz,
584 * so we try to adjust the clock down to this,
587 if (host->mclk > 100000000) {
588 ret = clk_set_rate(host->clk, 100000000);
591 host->mclk = clk_get_rate(host->clk);
592 DBG(host, "eventual mclk rate: %u Hz\n", host->mclk);
594 host->base = ioremap(dev->res.start, resource_size(&dev->res));
600 mmc->ops = &mmci_ops;
601 mmc->f_min = (host->mclk + 511) / 512;
602 mmc->f_max = min(host->mclk, fmax);
603 mmc->ocr_avail = plat->ocr_mask;
608 mmc->max_hw_segs = 16;
609 mmc->max_phys_segs = NR_SG;
612 * Since we only have a 16-bit data length register, we must
613 * ensure that we don't exceed 2^16-1 bytes in a single request.
615 mmc->max_req_size = 65535;
618 * Set the maximum segment size. Since we aren't doing DMA
619 * (yet) we are only limited by the data length register.
621 mmc->max_seg_size = mmc->max_req_size;
624 * Block size can be up to 2048 bytes, but must be a power of two.
626 mmc->max_blk_size = 2048;
629 * No limit on the number of blocks transferred.
631 mmc->max_blk_count = mmc->max_req_size;
633 spin_lock_init(&host->lock);
635 writel(0, host->base + MMCIMASK0);
636 writel(0, host->base + MMCIMASK1);
637 writel(0xfff, host->base + MMCICLEAR);
639 #ifdef CONFIG_GPIOLIB
640 if (gpio_is_valid(plat->gpio_cd)) {
641 ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)");
643 ret = gpio_direction_input(plat->gpio_cd);
645 host->gpio_cd = plat->gpio_cd;
646 else if (ret != -ENOSYS)
649 if (gpio_is_valid(plat->gpio_wp)) {
650 ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)");
652 ret = gpio_direction_input(plat->gpio_wp);
654 host->gpio_wp = plat->gpio_wp;
655 else if (ret != -ENOSYS)
660 ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host);
664 ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host);
668 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
670 amba_set_drvdata(dev, mmc);
671 host->oldstat = mmci_get_cd(host->mmc);
675 printk(KERN_INFO "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n",
676 mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
677 (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
679 init_timer(&host->timer);
680 host->timer.data = (unsigned long)host;
681 host->timer.function = mmci_check_status;
682 host->timer.expires = jiffies + HZ;
683 add_timer(&host->timer);
688 free_irq(dev->irq[0], host);
690 if (host->gpio_wp != -ENOSYS)
691 gpio_free(host->gpio_wp);
693 if (host->gpio_cd != -ENOSYS)
694 gpio_free(host->gpio_cd);
698 clk_disable(host->clk);
704 amba_release_regions(dev);
709 static int __devexit mmci_remove(struct amba_device *dev)
711 struct mmc_host *mmc = amba_get_drvdata(dev);
713 amba_set_drvdata(dev, NULL);
716 struct mmci_host *host = mmc_priv(mmc);
718 del_timer_sync(&host->timer);
720 mmc_remove_host(mmc);
722 writel(0, host->base + MMCIMASK0);
723 writel(0, host->base + MMCIMASK1);
725 writel(0, host->base + MMCICOMMAND);
726 writel(0, host->base + MMCIDATACTRL);
728 free_irq(dev->irq[0], host);
729 free_irq(dev->irq[1], host);
731 if (host->gpio_wp != -ENOSYS)
732 gpio_free(host->gpio_wp);
733 if (host->gpio_cd != -ENOSYS)
734 gpio_free(host->gpio_cd);
737 clk_disable(host->clk);
742 amba_release_regions(dev);
749 static int mmci_suspend(struct amba_device *dev, pm_message_t state)
751 struct mmc_host *mmc = amba_get_drvdata(dev);
755 struct mmci_host *host = mmc_priv(mmc);
757 ret = mmc_suspend_host(mmc, state);
759 writel(0, host->base + MMCIMASK0);
765 static int mmci_resume(struct amba_device *dev)
767 struct mmc_host *mmc = amba_get_drvdata(dev);
771 struct mmci_host *host = mmc_priv(mmc);
773 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
775 ret = mmc_resume_host(mmc);
781 #define mmci_suspend NULL
782 #define mmci_resume NULL
785 static struct amba_id mmci_ids[] = {
794 /* ST Micro variants */
806 static struct amba_driver mmci_driver = {
811 .remove = __devexit_p(mmci_remove),
812 .suspend = mmci_suspend,
813 .resume = mmci_resume,
814 .id_table = mmci_ids,
817 static int __init mmci_init(void)
819 return amba_driver_register(&mmci_driver);
822 static void __exit mmci_exit(void)
824 amba_driver_unregister(&mmci_driver);
827 module_init(mmci_init);
828 module_exit(mmci_exit);
829 module_param(fmax, uint, 0444);
831 MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
832 MODULE_LICENSE("GPL");