SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/mfd/tc6393xb.c

   1 /*
   2  * Toshiba TC6393XB SoC support
   3  *
   4  * Copyright(c) 2005-2006 Chris Humbert
   5  * Copyright(c) 2005 Dirk Opfer
   6  * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
   7  * Copyright(c) 2007 Dmitry Baryshkov
   8  *
   9  * Based on code written by Sharp/Lineo for 2.4 kernels
  10  * Based on locomo.c
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/fb.h>
  23 #include <linux/clk.h>
  24 #include <linux/mfd/core.h>
  25 #include <linux/mfd/tmio.h>
  26 #include <linux/mfd/tc6393xb.h>
  27 #include <linux/gpio.h>
  28
  29 #define SCR_REVID       0x08            /* b Revision ID        */
  30 #define SCR_ISR         0x50            /* b Interrupt Status   */
  31 #define SCR_IMR         0x52            /* b Interrupt Mask     */
  32 #define SCR_IRR         0x54            /* b Interrupt Routing  */
  33 #define SCR_GPER        0x60            /* w GP Enable          */
  34 #define SCR_GPI_SR(i)   (0x64 + (i))    /* b3 GPI Status        */
  35 #define SCR_GPI_IMR(i)  (0x68 + (i))    /* b3 GPI INT Mask      */
  36 #define SCR_GPI_EDER(i) (0x6c + (i))    /* b3 GPI Edge Detect Enable */
  37 #define SCR_GPI_LIR(i)  (0x70 + (i))    /* b3 GPI Level Invert  */
  38 #define SCR_GPO_DSR(i)  (0x78 + (i))    /* b3 GPO Data Set      */
  39 #define SCR_GPO_DOECR(i) (0x7c + (i))   /* b3 GPO Data OE Control */
  40 #define SCR_GP_IARCR(i) (0x80 + (i))    /* b3 GP Internal Active Register Control */
  41 #define SCR_GP_IARLCR(i) (0x84 + (i))   /* b3 GP INTERNAL Active Register Level Control */
  42 #define SCR_GPI_BCR(i)  (0x88 + (i))    /* b3 GPI Buffer Control */
  43 #define SCR_GPA_IARCR   0x8c            /* w GPa Internal Active Register Control */
  44 #define SCR_GPA_IARLCR  0x90            /* w GPa Internal Active Register Level Control */
  45 #define SCR_GPA_BCR     0x94            /* w GPa Buffer Control */
  46 #define SCR_CCR         0x98            /* w Clock Control      */
  47 #define SCR_PLL2CR      0x9a            /* w PLL2 Control       */
  48 #define SCR_PLL1CR      0x9c            /* l PLL1 Control       */
  49 #define SCR_DIARCR      0xa0            /* b Device Internal Active Register Control */
  50 #define SCR_DBOCR       0xa1            /* b Device Buffer Off Control */
  51 #define SCR_FER         0xe0            /* b Function Enable    */
  52 #define SCR_MCR         0xe4            /* w Mode Control       */
  53 #define SCR_CONFIG      0xfc            /* b Configuration Control */
  54 #define SCR_DEBUG       0xff            /* b Debug              */
  55
  56 #define SCR_CCR_CK32K   BIT(0)
  57 #define SCR_CCR_USBCK   BIT(1)
  58 #define SCR_CCR_UNK1    BIT(4)
  59 #define SCR_CCR_MCLK_MASK       (7 << 8)
  60 #define SCR_CCR_MCLK_OFF        (0 << 8)
  61 #define SCR_CCR_MCLK_12 (1 << 8)
  62 #define SCR_CCR_MCLK_24 (2 << 8)
  63 #define SCR_CCR_MCLK_48 (3 << 8)
  64 #define SCR_CCR_HCLK_MASK       (3 << 12)
  65 #define SCR_CCR_HCLK_24 (0 << 12)
  66 #define SCR_CCR_HCLK_48 (1 << 12)
  67
  68 #define SCR_FER_USBEN           BIT(0)  /* USB host enable */
  69 #define SCR_FER_LCDCVEN         BIT(1)  /* polysilicon TFT enable */
  70 #define SCR_FER_SLCDEN          BIT(2)  /* SLCD enable */
  71
  72 #define SCR_MCR_RDY_MASK                (3 << 0)
  73 #define SCR_MCR_RDY_OPENDRAIN   (0 << 0)
  74 #define SCR_MCR_RDY_TRISTATE    (1 << 0)
  75 #define SCR_MCR_RDY_PUSHPULL    (2 << 0)
  76 #define SCR_MCR_RDY_UNK         BIT(2)
  77 #define SCR_MCR_RDY_EN          BIT(3)
  78 #define SCR_MCR_INT_MASK                (3 << 4)
  79 #define SCR_MCR_INT_OPENDRAIN   (0 << 4)
  80 #define SCR_MCR_INT_TRISTATE    (1 << 4)
  81 #define SCR_MCR_INT_PUSHPULL    (2 << 4)
  82 #define SCR_MCR_INT_UNK         BIT(6)
  83 #define SCR_MCR_INT_EN          BIT(7)
  84 /* bits 8 - 16 are unknown */
  85
  86 #define TC_GPIO_BIT(i)          (1 << (i & 0x7))
  87
  88 /*--------------------------------------------------------------------------*/
  89
  90 struct tc6393xb {
  91         void __iomem            *scr;
  92
  93         struct gpio_chip        gpio;
  94
  95         struct clk              *clk; /* 3,6 Mhz */
  96
  97         spinlock_t              lock; /* protects RMW cycles */
  98
  99         struct {
 100                 u8              fer;
 101                 u16             ccr;
 102                 u8              gpi_bcr[3];
 103                 u8              gpo_dsr[3];
 104                 u8              gpo_doecr[3];
 105         } suspend_state;
 106
 107         struct resource         rscr;
 108         struct resource         *iomem;
 109         int                     irq;
 110         int                     irq_base;
 111 };
 112
 113 enum {
 114         TC6393XB_CELL_NAND,
 115 };
 116
 117 /*--------------------------------------------------------------------------*/
 118
 119 static int tc6393xb_nand_enable(struct platform_device *nand)
 120 {
 121         struct platform_device *dev = to_platform_device(nand->dev.parent);
 122         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
 123         unsigned long flags;
 124
 125         spin_lock_irqsave(&tc6393xb->lock, flags);
 126
 127         /* SMD buffer on */
 128         dev_dbg(&dev->dev, "SMD buffer on\n");
 129         iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
 130
 131         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 132
 133         return 0;
 134 }
 135
 136 static struct resource __devinitdata tc6393xb_nand_resources[] = {
 137         {
 138                 .start  = 0x0100,
 139                 .end    = 0x01ff,
 140                 .flags  = IORESOURCE_MEM,
 141         },
 142         {
 143                 .start  = 0x1000,
 144                 .end    = 0x1007,
 145                 .flags  = IORESOURCE_MEM,
 146         },
 147         {
 148                 .start  = IRQ_TC6393_NAND,
 149                 .end    = IRQ_TC6393_NAND,
 150                 .flags  = IORESOURCE_IRQ,
 151         },
 152 };
 153
 154 static struct mfd_cell __devinitdata tc6393xb_cells[] = {
 155         [TC6393XB_CELL_NAND] = {
 156                 .name = "tmio-nand",
 157                 .enable = tc6393xb_nand_enable,
 158                 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
 159                 .resources = tc6393xb_nand_resources,
 160         },
 161 };
 162
 163 /*--------------------------------------------------------------------------*/
 164
 165 static int tc6393xb_gpio_get(struct gpio_chip *chip,
 166                 unsigned offset)
 167 {
 168         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
 169
 170         /* XXX: does dsr also represent inputs? */
 171         return ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
 172                 & TC_GPIO_BIT(offset);
 173 }
 174
 175 static void __tc6393xb_gpio_set(struct gpio_chip *chip,
 176                 unsigned offset, int value)
 177 {
 178         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
 179         u8  dsr;
 180
 181         dsr = ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
 182         if (value)
 183                 dsr |= TC_GPIO_BIT(offset);
 184         else
 185                 dsr &= ~TC_GPIO_BIT(offset);
 186
 187         iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
 188 }
 189
 190 static void tc6393xb_gpio_set(struct gpio_chip *chip,
 191                 unsigned offset, int value)
 192 {
 193         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
 194         unsigned long flags;
 195
 196         spin_lock_irqsave(&tc6393xb->lock, flags);
 197
 198         __tc6393xb_gpio_set(chip, offset, value);
 199
 200         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 201 }
 202
 203 static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
 204                         unsigned offset)
 205 {
 206         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
 207         unsigned long flags;
 208         u8 doecr;
 209
 210         spin_lock_irqsave(&tc6393xb->lock, flags);
 211
 212         doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
 213         doecr &= ~TC_GPIO_BIT(offset);
 214         iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
 215
 216         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 217
 218         return 0;
 219 }
 220
 221 static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
 222                         unsigned offset, int value)
 223 {
 224         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
 225         unsigned long flags;
 226         u8 doecr;
 227
 228         spin_lock_irqsave(&tc6393xb->lock, flags);
 229
 230         __tc6393xb_gpio_set(chip, offset, value);
 231
 232         doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
 233         doecr |= TC_GPIO_BIT(offset);
 234         iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
 235
 236         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 237
 238         return 0;
 239 }
 240
 241 static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
 242 {
 243         tc6393xb->gpio.label = "tc6393xb";
 244         tc6393xb->gpio.base = gpio_base;
 245         tc6393xb->gpio.ngpio = 16;
 246         tc6393xb->gpio.set = tc6393xb_gpio_set;
 247         tc6393xb->gpio.get = tc6393xb_gpio_get;
 248         tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input;
 249         tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output;
 250
 251         return gpiochip_add(&tc6393xb->gpio);
 252 }
 253
 254 /*--------------------------------------------------------------------------*/
 255
 256 static void
 257 tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
 258 {
 259         struct tc6393xb *tc6393xb = get_irq_data(irq);
 260         unsigned int isr;
 261         unsigned int i, irq_base;
 262
 263         irq_base = tc6393xb->irq_base;
 264
 265         while ((isr = ioread8(tc6393xb->scr + SCR_ISR) &
 266                                 ~ioread8(tc6393xb->scr + SCR_IMR)))
 267                 for (i = 0; i < TC6393XB_NR_IRQS; i++) {
 268                         if (isr & (1 << i))
 269                                 generic_handle_irq(irq_base + i);
 270                 }
 271 }
 272
 273 static void tc6393xb_irq_ack(unsigned int irq)
 274 {
 275 }
 276
 277 static void tc6393xb_irq_mask(unsigned int irq)
 278 {
 279         struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
 280         unsigned long flags;
 281         u8 imr;
 282
 283         spin_lock_irqsave(&tc6393xb->lock, flags);
 284         imr = ioread8(tc6393xb->scr + SCR_IMR);
 285         imr |= 1 << (irq - tc6393xb->irq_base);
 286         iowrite8(imr, tc6393xb->scr + SCR_IMR);
 287         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 288 }
 289
 290 static void tc6393xb_irq_unmask(unsigned int irq)
 291 {
 292         struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
 293         unsigned long flags;
 294         u8 imr;
 295
 296         spin_lock_irqsave(&tc6393xb->lock, flags);
 297         imr = ioread8(tc6393xb->scr + SCR_IMR);
 298         imr &= ~(1 << (irq - tc6393xb->irq_base));
 299         iowrite8(imr, tc6393xb->scr + SCR_IMR);
 300         spin_unlock_irqrestore(&tc6393xb->lock, flags);
 301 }
 302
 303 static struct irq_chip tc6393xb_chip = {
 304         .name   = "tc6393xb",
 305         .ack    = tc6393xb_irq_ack,
 306         .mask   = tc6393xb_irq_mask,
 307         .unmask = tc6393xb_irq_unmask,
 308 };
 309
 310 static void tc6393xb_attach_irq(struct platform_device *dev)
 311 {
 312         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
 313         unsigned int irq, irq_base;
 314
 315         irq_base = tc6393xb->irq_base;
 316
 317         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
 318                 set_irq_chip(irq, &tc6393xb_chip);
 319                 set_irq_chip_data(irq, tc6393xb);
 320                 set_irq_handler(irq, handle_edge_irq);
 321                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 322         }
 323
 324         set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
 325         set_irq_data(tc6393xb->irq, tc6393xb);
 326         set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq);
 327 }
 328
 329 static void tc6393xb_detach_irq(struct platform_device *dev)
 330 {
 331         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
 332         unsigned int irq, irq_base;
 333
 334         set_irq_chained_handler(tc6393xb->irq, NULL);
 335         set_irq_data(tc6393xb->irq, NULL);
 336
 337         irq_base = tc6393xb->irq_base;
 338
 339         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
 340                 set_irq_flags(irq, 0);
 341                 set_irq_chip(irq, NULL);
 342                 set_irq_chip_data(irq, NULL);
 343         }
 344 }
 345
 346 /*--------------------------------------------------------------------------*/
 347
 348 static int tc6393xb_hw_init(struct platform_device *dev)
 349 {
 350         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
 351         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
 352         int i;
 353
 354         iowrite8(tc6393xb->suspend_state.fer,   tc6393xb->scr + SCR_FER);
 355         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
 356         iowrite16(tc6393xb->suspend_state.ccr,  tc6393xb->scr + SCR_CCR);
 357         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
 358                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
 359                   BIT(15),                      tc6393xb->scr + SCR_MCR);
 360         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
 361         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
 362         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
 363
 364         for (i = 0; i < 3; i++) {
 365                 iowrite8(tc6393xb->suspend_state.gpo_dsr[i],
 366                                         tc6393xb->scr + SCR_GPO_DSR(i));
 367                 iowrite8(tc6393xb->suspend_state.gpo_doecr[i],
 368                                         tc6393xb->scr + SCR_GPO_DOECR(i));
 369                 iowrite8(tc6393xb->suspend_state.gpi_bcr[i],
 370                                         tc6393xb->scr + SCR_GPI_BCR(i));
 371         }
 372
 373         return 0;
 374 }
 375
 376 static int __devinit tc6393xb_probe(struct platform_device *dev)
 377 {
 378         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
 379         struct tc6393xb *tc6393xb;
 380         struct resource *iomem;
 381         struct resource *rscr;
 382         int retval, temp;
 383         int i;
 384
 385         iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
 386         if (!iomem)
 387                 return -EINVAL;
 388
 389         tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
 390         if (!tc6393xb) {
 391                 retval = -ENOMEM;
 392                 goto err_kzalloc;
 393         }
 394
 395         spin_lock_init(&tc6393xb->lock);
 396
 397         platform_set_drvdata(dev, tc6393xb);
 398         tc6393xb->iomem = iomem;
 399         tc6393xb->irq = platform_get_irq(dev, 0);
 400         tc6393xb->irq_base = tcpd->irq_base;
 401
 402         tc6393xb->clk = clk_get(&dev->dev, "GPIO27_CLK" /* "CK3P6MI" */);
 403         if (IS_ERR(tc6393xb->clk)) {
 404                 retval = PTR_ERR(tc6393xb->clk);
 405                 goto err_clk_get;
 406         }
 407
 408         rscr = &tc6393xb->rscr;
 409         rscr->name = "tc6393xb-core";
 410         rscr->start = iomem->start;
 411         rscr->end = iomem->start + 0xff;
 412         rscr->flags = IORESOURCE_MEM;
 413
 414         retval = request_resource(iomem, rscr);
 415         if (retval)
 416                 goto err_request_scr;
 417
 418         tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
 419         if (!tc6393xb->scr) {
 420                 retval = -ENOMEM;
 421                 goto err_ioremap;
 422         }
 423
 424         retval = clk_enable(tc6393xb->clk);
 425         if (retval)
 426                 goto err_clk_enable;
 427
 428         retval = tcpd->enable(dev);
 429         if (retval)
 430                 goto err_enable;
 431
 432         tc6393xb->suspend_state.fer = 0;
 433         for (i = 0; i < 3; i++) {
 434                 tc6393xb->suspend_state.gpo_dsr[i] =
 435                         (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff;
 436                 tc6393xb->suspend_state.gpo_doecr[i] =
 437                         (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff;
 438         }
 439         /*
 440          * It may be necessary to change this back to
 441          * platform-dependant code
 442          */
 443         tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 |
 444                                         SCR_CCR_HCLK_48;
 445
 446         retval = tc6393xb_hw_init(dev);
 447         if (retval)
 448                 goto err_hw_init;
 449
 450         printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
 451                         ioread8(tc6393xb->scr + SCR_REVID),
 452                         (unsigned long) iomem->start, tc6393xb->irq);
 453
 454         tc6393xb->gpio.base = -1;
 455
 456         if (tcpd->gpio_base >= 0) {
 457                 retval = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
 458                 if (retval)
 459                         goto err_gpio_add;
 460         }
 461
 462         if (tc6393xb->irq)
 463                 tc6393xb_attach_irq(dev);
 464
 465         tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data;
 466         tc6393xb_cells[TC6393XB_CELL_NAND].platform_data =
 467                 &tc6393xb_cells[TC6393XB_CELL_NAND];
 468         tc6393xb_cells[TC6393XB_CELL_NAND].data_size =
 469                 sizeof(tc6393xb_cells[TC6393XB_CELL_NAND]);
 470
 471         retval = mfd_add_devices(&dev->dev, dev->id,
 472                         tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
 473                         iomem, tcpd->irq_base);
 474
 475         return 0;
 476
 477         if (tc6393xb->irq)
 478                 tc6393xb_detach_irq(dev);
 479
 480 err_gpio_add:
 481         if (tc6393xb->gpio.base != -1)
 482                 temp = gpiochip_remove(&tc6393xb->gpio);
 483 err_hw_init:
 484         tcpd->disable(dev);
 485 err_clk_enable:
 486         clk_disable(tc6393xb->clk);
 487 err_enable:
 488         iounmap(tc6393xb->scr);
 489 err_ioremap:
 490         release_resource(&tc6393xb->rscr);
 491 err_request_scr:
 492         clk_put(tc6393xb->clk);
 493 err_clk_get:
 494         kfree(tc6393xb);
 495 err_kzalloc:
 496         return retval;
 497 }
 498
 499 static int __devexit tc6393xb_remove(struct platform_device *dev)
 500 {
 501         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
 502         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
 503         int ret;
 504
 505         mfd_remove_devices(&dev->dev);
 506
 507         if (tc6393xb->irq)
 508                 tc6393xb_detach_irq(dev);
 509
 510         if (tc6393xb->gpio.base != -1) {
 511                 ret = gpiochip_remove(&tc6393xb->gpio);
 512                 if (ret) {
 513                         dev_err(&dev->dev, "Can't remove gpio chip: %d\n", ret);
 514                         return ret;
 515                 }
 516         }
 517
 518         ret = tcpd->disable(dev);
 519
 520         clk_disable(tc6393xb->clk);
 521
 522         iounmap(tc6393xb->scr);
 523
 524         release_resource(&tc6393xb->rscr);
 525
 526         platform_set_drvdata(dev, NULL);
 527
 528         clk_put(tc6393xb->clk);
 529
 530         kfree(tc6393xb);
 531
 532         return ret;
 533 }
 534
 535 #ifdef CONFIG_PM
 536 static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
 537 {
 538         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
 539         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
 540         int i;
 541
 542
 543         tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
 544         tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
 545
 546         for (i = 0; i < 3; i++) {
 547                 tc6393xb->suspend_state.gpo_dsr[i] =
 548                         ioread8(tc6393xb->scr + SCR_GPO_DSR(i));
 549                 tc6393xb->suspend_state.gpo_doecr[i] =
 550                         ioread8(tc6393xb->scr + SCR_GPO_DOECR(i));
 551                 tc6393xb->suspend_state.gpi_bcr[i] =
 552                         ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
 553         }
 554
 555         return tcpd->suspend(dev);
 556 }
 557
 558 static int tc6393xb_resume(struct platform_device *dev)
 559 {
 560         struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
 561         int ret = tcpd->resume(dev);
 562
 563         if (ret)
 564                 return ret;
 565
 566         return tc6393xb_hw_init(dev);
 567 }
 568 #else
 569 #define tc6393xb_suspend NULL
 570 #define tc6393xb_resume NULL
 571 #endif
 572
 573 static struct platform_driver tc6393xb_driver = {
 574         .probe = tc6393xb_probe,
 575         .remove = __devexit_p(tc6393xb_remove),
 576         .suspend = tc6393xb_suspend,
 577         .resume = tc6393xb_resume,
 578
 579         .driver = {
 580                 .name = "tc6393xb",
 581                 .owner = THIS_MODULE,
 582         },
 583 };
 584
 585 static int __init tc6393xb_init(void)
 586 {
 587         return platform_driver_register(&tc6393xb_driver);
 588 }
 589
 590 static void __exit tc6393xb_exit(void)
 591 {
 592         platform_driver_unregister(&tc6393xb_driver);
 593 }
 594
 595 subsys_initcall(tc6393xb_init);
 596 module_exit(tc6393xb_exit);
 597
 598 MODULE_LICENSE("GPL");
 599 MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
 600 MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
 601 MODULE_ALIAS("platform:tc6393xb");