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   1 /*
   2  *  saa7191.c - Philips SAA7191 video decoder driver
   3  *
   4  *  Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
   5  *  Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2 as
   9  *  published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/errno.h>
  14 #include <linux/fs.h>
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <linux/major.h>
  18 #include <linux/module.h>
  19 #include <linux/mm.h>
  20 #include <linux/slab.h>
  21
  22 #include <linux/videodev2.h>
  23 #include <linux/i2c.h>
  24 #include <media/v4l2-device.h>
  25 #include <media/v4l2-chip-ident.h>
  26 #include <media/v4l2-i2c-drv-legacy.h>
  27
  28 #include "saa7191.h"
  29
  30 #define SAA7191_MODULE_VERSION  "0.0.5"
  31
  32 MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
  33 MODULE_VERSION(SAA7191_MODULE_VERSION);
  34 MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
  35 MODULE_LICENSE("GPL");
  36
  37 static unsigned short normal_i2c[] = { 0x8a >> 1, 0x8e >> 1, I2C_CLIENT_END };
  38
  39 I2C_CLIENT_INSMOD;
  40
  41 // #define SAA7191_DEBUG
  42
  43 #ifdef SAA7191_DEBUG
  44 #define dprintk(x...) printk("SAA7191: " x);
  45 #else
  46 #define dprintk(x...)
  47 #endif
  48
  49 #define SAA7191_SYNC_COUNT      30
  50 #define SAA7191_SYNC_DELAY      100     /* milliseconds */
  51
  52 struct saa7191 {
  53         struct v4l2_subdev sd;
  54
  55         /* the register values are stored here as the actual
  56          * I2C-registers are write-only */
  57         u8 reg[25];
  58
  59         int input;
  60         v4l2_std_id norm;
  61 };
  62
  63 static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
  64 {
  65         return container_of(sd, struct saa7191, sd);
  66 }
  67
  68 static const u8 initseq[] = {
  69         0,      /* Subaddress */
  70
  71         0x50,   /* (0x50) SAA7191_REG_IDEL */
  72
  73         /* 50 Hz signal timing */
  74         0x30,   /* (0x30) SAA7191_REG_HSYB */
  75         0x00,   /* (0x00) SAA7191_REG_HSYS */
  76         0xe8,   /* (0xe8) SAA7191_REG_HCLB */
  77         0xb6,   /* (0xb6) SAA7191_REG_HCLS */
  78         0xf4,   /* (0xf4) SAA7191_REG_HPHI */
  79
  80         /* control */
  81         SAA7191_LUMA_APER_1,    /* (0x01) SAA7191_REG_LUMA - CVBS mode */
  82         0x00,   /* (0x00) SAA7191_REG_HUEC */
  83         0xf8,   /* (0xf8) SAA7191_REG_CKTQ */
  84         0xf8,   /* (0xf8) SAA7191_REG_CKTS */
  85         0x90,   /* (0x90) SAA7191_REG_PLSE */
  86         0x90,   /* (0x90) SAA7191_REG_SESE */
  87         0x00,   /* (0x00) SAA7191_REG_GAIN */
  88         SAA7191_STDC_NFEN | SAA7191_STDC_HRMV,  /* (0x0c) SAA7191_REG_STDC
  89                                                  * - not SECAM,
  90                                                  * slow time constant */
  91         SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
  92         | SAA7191_IOCK_OEDY,    /* (0x78) SAA7191_REG_IOCK
  93                                  * - chroma from CVBS, GPSW1 & 2 off */
  94         SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
  95         | SAA7191_CTL3_YDEL0,   /* (0x99) SAA7191_REG_CTL3
  96                                  * - automatic field detection */
  97         0x00,   /* (0x00) SAA7191_REG_CTL4 */
  98         0x2c,   /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
  99         0x00,   /* unused */
 100         0x00,   /* unused */
 101
 102         /* 60 Hz signal timing */
 103         0x34,   /* (0x34) SAA7191_REG_HS6B */
 104         0x0a,   /* (0x0a) SAA7191_REG_HS6S */
 105         0xf4,   /* (0xf4) SAA7191_REG_HC6B */
 106         0xce,   /* (0xce) SAA7191_REG_HC6S */
 107         0xf4,   /* (0xf4) SAA7191_REG_HP6I */
 108 };
 109
 110 /* SAA7191 register handling */
 111
 112 static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
 113 {
 114         return to_saa7191(sd)->reg[reg];
 115 }
 116
 117 static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
 118 {
 119         struct i2c_client *client = v4l2_get_subdevdata(sd);
 120         int ret;
 121
 122         ret = i2c_master_recv(client, value, 1);
 123         if (ret < 0) {
 124                 printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
 125                 return ret;
 126         }
 127
 128         return 0;
 129 }
 130
 131
 132 static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
 133 {
 134         struct i2c_client *client = v4l2_get_subdevdata(sd);
 135
 136         to_saa7191(sd)->reg[reg] = value;
 137         return i2c_smbus_write_byte_data(client, reg, value);
 138 }
 139
 140 /* the first byte of data must be the first subaddress number (register) */
 141 static int saa7191_write_block(struct v4l2_subdev *sd,
 142                                u8 length, const u8 *data)
 143 {
 144         struct i2c_client *client = v4l2_get_subdevdata(sd);
 145         struct saa7191 *decoder = to_saa7191(sd);
 146         int i;
 147         int ret;
 148
 149         for (i = 0; i < (length - 1); i++) {
 150                 decoder->reg[data[0] + i] = data[i + 1];
 151         }
 152
 153         ret = i2c_master_send(client, data, length);
 154         if (ret < 0) {
 155                 printk(KERN_ERR "SAA7191: saa7191_write_block(): "
 156                        "write failed\n");
 157                 return ret;
 158         }
 159
 160         return 0;
 161 }
 162
 163 /* Helper functions */
 164
 165 static int saa7191_s_routing(struct v4l2_subdev *sd,
 166                                 const struct v4l2_routing *route)
 167 {
 168         struct saa7191 *decoder = to_saa7191(sd);
 169         u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
 170         u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
 171         int err;
 172
 173         switch (route->input) {
 174         case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
 175                 iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
 176                           | SAA7191_IOCK_GPSW2);
 177                 /* Chrominance trap active */
 178                 luma &= ~SAA7191_LUMA_BYPS;
 179                 break;
 180         case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
 181                 iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
 182                 /* Chrominance trap bypassed */
 183                 luma |= SAA7191_LUMA_BYPS;
 184                 break;
 185         default:
 186                 return -EINVAL;
 187         }
 188
 189         err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
 190         if (err)
 191                 return -EIO;
 192         err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
 193         if (err)
 194                 return -EIO;
 195
 196         decoder->input = route->input;
 197
 198         return 0;
 199 }
 200
 201 static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
 202 {
 203         struct saa7191 *decoder = to_saa7191(sd);
 204         u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
 205         u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
 206         u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
 207         int err;
 208
 209         if (norm & V4L2_STD_PAL) {
 210                 stdc &= ~SAA7191_STDC_SECS;
 211                 ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
 212                 chcv = SAA7191_CHCV_PAL;
 213         } else if (norm & V4L2_STD_NTSC) {
 214                 stdc &= ~SAA7191_STDC_SECS;
 215                 ctl3 &= ~SAA7191_CTL3_AUFD;
 216                 ctl3 |= SAA7191_CTL3_FSEL;
 217                 chcv = SAA7191_CHCV_NTSC;
 218         } else if (norm & V4L2_STD_SECAM) {
 219                 stdc |= SAA7191_STDC_SECS;
 220                 ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
 221                 chcv = SAA7191_CHCV_PAL;
 222         } else {
 223                 return -EINVAL;
 224         }
 225
 226         err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
 227         if (err)
 228                 return -EIO;
 229         err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
 230         if (err)
 231                 return -EIO;
 232         err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
 233         if (err)
 234                 return -EIO;
 235
 236         decoder->norm = norm;
 237
 238         dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
 239                 stdc, chcv);
 240         dprintk("norm: %llx\n", norm);
 241
 242         return 0;
 243 }
 244
 245 static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
 246 {
 247         int i = 0;
 248
 249         dprintk("Checking for signal...\n");
 250
 251         for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
 252                 if (saa7191_read_status(sd, status))
 253                         return -EIO;
 254
 255                 if (((*status) & SAA7191_STATUS_HLCK) == 0) {
 256                         dprintk("Signal found\n");
 257                         return 0;
 258                 }
 259
 260                 msleep(SAA7191_SYNC_DELAY);
 261         }
 262
 263         dprintk("No signal\n");
 264
 265         return -EBUSY;
 266 }
 267
 268 static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
 269 {
 270         struct saa7191 *decoder = to_saa7191(sd);
 271         u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
 272         u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
 273         u8 status;
 274         v4l2_std_id old_norm = decoder->norm;
 275         int err = 0;
 276
 277         dprintk("SAA7191 extended signal auto-detection...\n");
 278
 279         *norm = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
 280         stdc &= ~SAA7191_STDC_SECS;
 281         ctl3 &= ~(SAA7191_CTL3_FSEL);
 282
 283         err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
 284         if (err) {
 285                 err = -EIO;
 286                 goto out;
 287         }
 288         err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
 289         if (err) {
 290                 err = -EIO;
 291                 goto out;
 292         }
 293
 294         ctl3 |= SAA7191_CTL3_AUFD;
 295         err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
 296         if (err) {
 297                 err = -EIO;
 298                 goto out;
 299         }
 300
 301         msleep(SAA7191_SYNC_DELAY);
 302
 303         err = saa7191_wait_for_signal(sd, &status);
 304         if (err)
 305                 goto out;
 306
 307         if (status & SAA7191_STATUS_FIDT) {
 308                 /* 60Hz signal -> NTSC */
 309                 dprintk("60Hz signal: NTSC\n");
 310                 *norm = V4L2_STD_NTSC;
 311                 return 0;
 312         }
 313
 314         /* 50Hz signal */
 315         dprintk("50Hz signal: Trying PAL...\n");
 316
 317         /* try PAL first */
 318         err = saa7191_s_std(sd, V4L2_STD_PAL);
 319         if (err)
 320                 goto out;
 321
 322         msleep(SAA7191_SYNC_DELAY);
 323
 324         err = saa7191_wait_for_signal(sd, &status);
 325         if (err)
 326                 goto out;
 327
 328         /* not 50Hz ? */
 329         if (status & SAA7191_STATUS_FIDT) {
 330                 dprintk("No 50Hz signal\n");
 331                 saa7191_s_std(sd, old_norm);
 332                 return -EAGAIN;
 333         }
 334
 335         if (status & SAA7191_STATUS_CODE) {
 336                 dprintk("PAL\n");
 337                 *norm = V4L2_STD_PAL;
 338                 return saa7191_s_std(sd, old_norm);
 339         }
 340
 341         dprintk("No color detected with PAL - Trying SECAM...\n");
 342
 343         /* no color detected ? -> try SECAM */
 344         err = saa7191_s_std(sd, V4L2_STD_SECAM);
 345         if (err)
 346                 goto out;
 347
 348         msleep(SAA7191_SYNC_DELAY);
 349
 350         err = saa7191_wait_for_signal(sd, &status);
 351         if (err)
 352                 goto out;
 353
 354         /* not 50Hz ? */
 355         if (status & SAA7191_STATUS_FIDT) {
 356                 dprintk("No 50Hz signal\n");
 357                 err = -EAGAIN;
 358                 goto out;
 359         }
 360
 361         if (status & SAA7191_STATUS_CODE) {
 362                 /* Color detected -> SECAM */
 363                 dprintk("SECAM\n");
 364                 *norm = V4L2_STD_SECAM;
 365                 return saa7191_s_std(sd, old_norm);
 366         }
 367
 368         dprintk("No color detected with SECAM - Going back to PAL.\n");
 369
 370 out:
 371         return saa7191_s_std(sd, old_norm);
 372 }
 373
 374 static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
 375 {
 376         u8 status;
 377
 378         dprintk("SAA7191 signal auto-detection...\n");
 379
 380         dprintk("Reading status...\n");
 381
 382         if (saa7191_read_status(sd, &status))
 383                 return -EIO;
 384
 385         dprintk("Checking for signal...\n");
 386
 387         /* no signal ? */
 388         if (status & SAA7191_STATUS_HLCK) {
 389                 dprintk("No signal\n");
 390                 return -EBUSY;
 391         }
 392
 393         dprintk("Signal found\n");
 394
 395         if (status & SAA7191_STATUS_FIDT) {
 396                 /* 60hz signal -> NTSC */
 397                 dprintk("NTSC\n");
 398                 return saa7191_s_std(sd, V4L2_STD_NTSC);
 399         } else {
 400                 /* 50hz signal -> PAL */
 401                 dprintk("PAL\n");
 402                 return saa7191_s_std(sd, V4L2_STD_PAL);
 403         }
 404 }
 405
 406 static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 407 {
 408         u8 reg;
 409         int ret = 0;
 410
 411         switch (ctrl->id) {
 412         case SAA7191_CONTROL_BANDPASS:
 413         case SAA7191_CONTROL_BANDPASS_WEIGHT:
 414         case SAA7191_CONTROL_CORING:
 415                 reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
 416                 switch (ctrl->id) {
 417                 case SAA7191_CONTROL_BANDPASS:
 418                         ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
 419                                 >> SAA7191_LUMA_BPSS_SHIFT;
 420                         break;
 421                 case SAA7191_CONTROL_BANDPASS_WEIGHT:
 422                         ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
 423                                 >> SAA7191_LUMA_APER_SHIFT;
 424                         break;
 425                 case SAA7191_CONTROL_CORING:
 426                         ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
 427                                 >> SAA7191_LUMA_CORI_SHIFT;
 428                         break;
 429                 }
 430                 break;
 431         case SAA7191_CONTROL_FORCE_COLOUR:
 432         case SAA7191_CONTROL_CHROMA_GAIN:
 433                 reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
 434                 if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
 435                         ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
 436                 else
 437                         ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
 438                                 >> SAA7191_GAIN_LFIS_SHIFT;
 439                 break;
 440         case V4L2_CID_HUE:
 441                 reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
 442                 if (reg < 0x80)
 443                         reg += 0x80;
 444                 else
 445                         reg -= 0x80;
 446                 ctrl->value = (s32)reg;
 447                 break;
 448         case SAA7191_CONTROL_VTRC:
 449                 reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
 450                 ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
 451                 break;
 452         case SAA7191_CONTROL_LUMA_DELAY:
 453                 reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
 454                 ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
 455                         >> SAA7191_CTL3_YDEL_SHIFT;
 456                 if (ctrl->value >= 4)
 457                         ctrl->value -= 8;
 458                 break;
 459         case SAA7191_CONTROL_VNR:
 460                 reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
 461                 ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
 462                         >> SAA7191_CTL4_VNOI_SHIFT;
 463                 break;
 464         default:
 465                 ret = -EINVAL;
 466         }
 467
 468         return ret;
 469 }
 470
 471 static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 472 {
 473         u8 reg;
 474         int ret = 0;
 475
 476         switch (ctrl->id) {
 477         case SAA7191_CONTROL_BANDPASS:
 478         case SAA7191_CONTROL_BANDPASS_WEIGHT:
 479         case SAA7191_CONTROL_CORING:
 480                 reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
 481                 switch (ctrl->id) {
 482                 case SAA7191_CONTROL_BANDPASS:
 483                         reg &= ~SAA7191_LUMA_BPSS_MASK;
 484                         reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
 485                                 & SAA7191_LUMA_BPSS_MASK;
 486                         break;
 487                 case SAA7191_CONTROL_BANDPASS_WEIGHT:
 488                         reg &= ~SAA7191_LUMA_APER_MASK;
 489                         reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
 490                                 & SAA7191_LUMA_APER_MASK;
 491                         break;
 492                 case SAA7191_CONTROL_CORING:
 493                         reg &= ~SAA7191_LUMA_CORI_MASK;
 494                         reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
 495                                 & SAA7191_LUMA_CORI_MASK;
 496                         break;
 497                 }
 498                 ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
 499                 break;
 500         case SAA7191_CONTROL_FORCE_COLOUR:
 501         case SAA7191_CONTROL_CHROMA_GAIN:
 502                 reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
 503                 if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
 504                         if (ctrl->value)
 505                                 reg |= SAA7191_GAIN_COLO;
 506                         else
 507                                 reg &= ~SAA7191_GAIN_COLO;
 508                 } else {
 509                         reg &= ~SAA7191_GAIN_LFIS_MASK;
 510                         reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
 511                                 & SAA7191_GAIN_LFIS_MASK;
 512                 }
 513                 ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
 514                 break;
 515         case V4L2_CID_HUE:
 516                 reg = ctrl->value & 0xff;
 517                 if (reg < 0x80)
 518                         reg += 0x80;
 519                 else
 520                         reg -= 0x80;
 521                 ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
 522                 break;
 523         case SAA7191_CONTROL_VTRC:
 524                 reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
 525                 if (ctrl->value)
 526                         reg |= SAA7191_STDC_VTRC;
 527                 else
 528                         reg &= ~SAA7191_STDC_VTRC;
 529                 ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
 530                 break;
 531         case SAA7191_CONTROL_LUMA_DELAY: {
 532                 s32 value = ctrl->value;
 533                 if (value < 0)
 534                         value += 8;
 535                 reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
 536                 reg &= ~SAA7191_CTL3_YDEL_MASK;
 537                 reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
 538                         & SAA7191_CTL3_YDEL_MASK;
 539                 ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
 540                 break;
 541         }
 542         case SAA7191_CONTROL_VNR:
 543                 reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
 544                 reg &= ~SAA7191_CTL4_VNOI_MASK;
 545                 reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
 546                         & SAA7191_CTL4_VNOI_MASK;
 547                 ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
 548                 break;
 549         default:
 550                 ret = -EINVAL;
 551         }
 552
 553         return ret;
 554 }
 555
 556 /* I2C-interface */
 557
 558 static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
 559 {
 560         u8 status_reg;
 561         int res = V4L2_IN_ST_NO_SIGNAL;
 562
 563         if (saa7191_read_status(sd, &status_reg))
 564                 return -EIO;
 565         if ((status_reg & SAA7191_STATUS_HLCK) == 0)
 566                 res = 0;
 567         if (!(status_reg & SAA7191_STATUS_CODE))
 568                 res |= V4L2_IN_ST_NO_COLOR;
 569         *status = res;
 570         return 0;
 571 }
 572
 573
 574 static int saa7191_g_chip_ident(struct v4l2_subdev *sd,
 575                 struct v4l2_dbg_chip_ident *chip)
 576 {
 577         struct i2c_client *client = v4l2_get_subdevdata(sd);
 578
 579         return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7191, 0);
 580 }
 581
 582 static int saa7191_command(struct i2c_client *client, unsigned cmd, void *arg)
 583 {
 584         return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
 585 }
 586
 587 /* ----------------------------------------------------------------------- */
 588
 589 static const struct v4l2_subdev_core_ops saa7191_core_ops = {
 590         .g_chip_ident = saa7191_g_chip_ident,
 591         .g_ctrl = saa7191_g_ctrl,
 592         .s_ctrl = saa7191_s_ctrl,
 593 };
 594
 595 static const struct v4l2_subdev_tuner_ops saa7191_tuner_ops = {
 596         .s_std = saa7191_s_std,
 597 };
 598
 599 static const struct v4l2_subdev_video_ops saa7191_video_ops = {
 600         .s_routing = saa7191_s_routing,
 601         .querystd = saa7191_querystd,
 602         .g_input_status = saa7191_g_input_status,
 603 };
 604
 605 static const struct v4l2_subdev_ops saa7191_ops = {
 606         .core = &saa7191_core_ops,
 607         .video = &saa7191_video_ops,
 608 };
 609
 610 static int saa7191_probe(struct i2c_client *client,
 611                           const struct i2c_device_id *id)
 612 {
 613         int err = 0;
 614         struct saa7191 *decoder;
 615         struct v4l2_subdev *sd;
 616
 617         v4l_info(client, "chip found @ 0x%x (%s)\n",
 618                         client->addr << 1, client->adapter->name);
 619
 620         decoder = kzalloc(sizeof(*decoder), GFP_KERNEL);
 621         if (!decoder)
 622                 return -ENOMEM;
 623
 624         sd = &decoder->sd;
 625         v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
 626
 627         err = saa7191_write_block(sd, sizeof(initseq), initseq);
 628         if (err) {
 629                 printk(KERN_ERR "SAA7191 initialization failed\n");
 630                 kfree(decoder);
 631                 return err;
 632         }
 633
 634         printk(KERN_INFO "SAA7191 initialized\n");
 635
 636         decoder->input = SAA7191_INPUT_COMPOSITE;
 637         decoder->norm = V4L2_STD_PAL;
 638
 639         err = saa7191_autodetect_norm(sd);
 640         if (err && (err != -EBUSY))
 641                 printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
 642
 643         return 0;
 644 }
 645
 646 static int saa7191_remove(struct i2c_client *client)
 647 {
 648         struct v4l2_subdev *sd = i2c_get_clientdata(client);
 649
 650         v4l2_device_unregister_subdev(sd);
 651         kfree(to_saa7191(sd));
 652         return 0;
 653 }
 654
 655 static int saa7191_legacy_probe(struct i2c_adapter *adapter)
 656 {
 657         return adapter->id == I2C_HW_SGI_VINO;
 658 }
 659
 660 static const struct i2c_device_id saa7191_id[] = {
 661         { "saa7191", 0 },
 662         { }
 663 };
 664 MODULE_DEVICE_TABLE(i2c, saa7191_id);
 665
 666 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
 667         .name = "saa7191",
 668         .driverid = I2C_DRIVERID_SAA7191,
 669         .command = saa7191_command,
 670         .probe = saa7191_probe,
 671         .remove = saa7191_remove,
 672         .legacy_probe = saa7191_legacy_probe,
 673         .id_table = saa7191_id,
 674 };