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   1 /*
   2         Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
   3
   4         Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
   5
   6         This program is free software; you can redistribute it and/or modify
   7         it under the terms of the GNU General Public License as published by
   8         the Free Software Foundation; either version 2 of the License, or
   9         (at your option) any later version.
  10
  11         This program is distributed in the hope that it will be useful,
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14         GNU General Public License for more details.
  15
  16         You should have received a copy of the GNU General Public License
  17         along with this program; if not, write to the Free Software
  18         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19 */
  20
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25
  26 #include "dvb_frontend.h"
  27 #include "mb86a16.h"
  28 #include "mb86a16_priv.h"
  29
  30 unsigned int verbose = 5;
  31 module_param(verbose, int, 0644);
  32
  33 #define ABS(x)          ((x) < 0 ? (-x) : (x))
  34
  35 struct mb86a16_state {
  36         struct i2c_adapter              *i2c_adap;
  37         const struct mb86a16_config     *config;
  38         struct dvb_frontend             frontend;
  39         u8                              signal;
  40
  41         // tuning parameters
  42         int                             frequency;
  43         int                             srate;
  44
  45         // Internal stuff
  46         int                             master_clk;
  47         int                             deci;
  48         int                             csel;
  49         int                             rsel;
  50 };
  51
  52 #define MB86A16_ERROR           0
  53 #define MB86A16_NOTICE          1
  54 #define MB86A16_INFO            2
  55 #define MB86A16_DEBUG           3
  56
  57 #define dprintk(x, y, z, format, arg...) do {                                           \
  58         if (z) {                                                                        \
  59                 if      ((x > MB86A16_ERROR) && (x > y))                                \
  60                         printk(KERN_ERR "%s: " format "\n", __func__, ##arg);           \
  61                 else if ((x > MB86A16_NOTICE) && (x > y))                               \
  62                         printk(KERN_NOTICE "%s: " format "\n", __func__, ##arg);        \
  63                 else if ((x > MB86A16_INFO) && (x > y))                                 \
  64                         printk(KERN_INFO "%s: " format "\n", __func__, ##arg);          \
  65                 else if ((x > MB86A16_DEBUG) && (x > y))                                \
  66                         printk(KERN_DEBUG "%s: " format "\n", __func__, ##arg);         \
  67         } else {                                                                        \
  68                 if (x > y)                                                              \
  69                         printk(format, ##arg);                                          \
  70         }                                                                               \
  71 } while (0)
  72
  73 #define TRACE_IN        dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
  74 #define TRACE_OUT       dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
  75
  76 static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val)
  77 {
  78         int ret;
  79         u8 buf[] = { reg, val };
  80
  81         struct i2c_msg msg = {
  82                 .addr = state->config->demod_address,
  83                 .flags = 0,
  84                 .buf = buf,
  85                 .len = 2
  86         };
  87
  88         dprintk(verbose, MB86A16_DEBUG, 1,
  89                 "writing to [0x%02x],Reg[0x%02x],Data[0x%02x]",
  90                 state->config->demod_address, buf[0], buf[1]);
  91
  92         ret = i2c_transfer(state->i2c_adap, &msg, 1);
  93
  94         return (ret != 1) ? -EREMOTEIO : 0;
  95 }
  96
  97 static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val)
  98 {
  99         int ret;
 100         u8 b0[] = { reg };
 101         u8 b1[] = { 0 };
 102
 103         struct i2c_msg msg[] = {
 104                 {
 105                         .addr = state->config->demod_address,
 106                         .flags = 0,
 107                         .buf = b0,
 108                         .len = 1
 109                 },{
 110                         .addr = state->config->demod_address,
 111                         .flags = I2C_M_RD,
 112                         .buf = b1,
 113                         .len = 1
 114                 }
 115         };
 116         ret = i2c_transfer(state->i2c_adap, msg, 2);
 117         if (ret != 2) {
 118                 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=0x%i)",
 119                         reg, ret);
 120
 121                 return -EREMOTEIO;
 122         }
 123         *val = b1[0];
 124
 125         return ret;
 126 }
 127
 128 static int CNTM_set(struct mb86a16_state *state,
 129                     unsigned char timint1,
 130                     unsigned char timint2,
 131                     unsigned char cnext)
 132 {
 133         unsigned char val;
 134
 135         val = (timint1 << 4) | (timint2 << 2) | cnext;
 136         if (mb86a16_write(state, MB86A16_CNTMR, val) < 0)
 137                 goto err;
 138
 139         return 0;
 140
 141 err:
 142         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 143         return -EREMOTEIO;
 144 }
 145
 146 static int smrt_set(struct mb86a16_state *state, int rate)
 147 {
 148         int tmp ;
 149         int m ;
 150         unsigned char STOFS0, STOFS1;
 151
 152         m = 1 << state->deci;
 153         tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk;
 154
 155         STOFS0 = tmp & 0x0ff;
 156         STOFS1 = (tmp & 0xf00) >> 8;
 157
 158         if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) |
 159                                        (state->csel << 1) |
 160                                         state->rsel) < 0)
 161                 goto err;
 162         if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0)
 163                 goto err;
 164         if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0)
 165                 goto err;
 166
 167         return 0;
 168 err:
 169         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 170         return -1;
 171 }
 172
 173 static int srst(struct mb86a16_state *state)
 174 {
 175         if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0)
 176                 goto err;
 177
 178         return 0;
 179 err:
 180         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 181         return -EREMOTEIO;
 182
 183 }
 184
 185 static int afcex_data_set(struct mb86a16_state *state,
 186                           unsigned char AFCEX_L,
 187                           unsigned char AFCEX_H)
 188 {
 189         if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0)
 190                 goto err;
 191         if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0)
 192                 goto err;
 193
 194         return 0;
 195 err:
 196         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 197
 198         return -1;
 199 }
 200
 201 static int afcofs_data_set(struct mb86a16_state *state,
 202                            unsigned char AFCEX_L,
 203                            unsigned char AFCEX_H)
 204 {
 205         if (mb86a16_write(state, 0x58, AFCEX_L) < 0)
 206                 goto err;
 207         if (mb86a16_write(state, 0x59, AFCEX_H) < 0)
 208                 goto err;
 209
 210         return 0;
 211 err:
 212         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 213         return -EREMOTEIO;
 214 }
 215
 216 static int stlp_set(struct mb86a16_state *state,
 217                     unsigned char STRAS,
 218                     unsigned char STRBS)
 219 {
 220         if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0)
 221                 goto err;
 222
 223         return 0;
 224 err:
 225         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 226         return -EREMOTEIO;
 227 }
 228
 229 static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA)
 230 {
 231         if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0)
 232                 goto err;
 233         if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0)
 234                 goto err;
 235
 236         return 0;
 237 err:
 238         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 239         return -EREMOTEIO;
 240 }
 241
 242 static int initial_set(struct mb86a16_state *state)
 243 {
 244         if (stlp_set(state, 5, 7))
 245                 goto err;
 246
 247         udelay(100);
 248         if (afcex_data_set(state, 0, 0))
 249                 goto err;
 250
 251         udelay(100);
 252         if (afcofs_data_set(state, 0, 0))
 253                 goto err;
 254
 255         udelay(100);
 256         if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0)
 257                 goto err;
 258         if (mb86a16_write(state, 0x2f, 0x21) < 0)
 259                 goto err;
 260         if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0)
 261                 goto err;
 262         if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0)
 263                 goto err;
 264         if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0)
 265                 goto err;
 266         if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0)
 267                 goto err;
 268         if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0)
 269                 goto err;
 270         if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0)
 271                 goto err;
 272         if (mb86a16_write(state, 0x54, 0xff) < 0)
 273                 goto err;
 274         if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0)
 275                 goto err;
 276
 277         return 0;
 278
 279 err:
 280         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 281         return -EREMOTEIO;
 282 }
 283
 284 static int S01T_set(struct mb86a16_state *state,
 285                     unsigned char s1t,
 286                     unsigned s0t)
 287 {
 288         if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0)
 289                 goto err;
 290
 291         return 0;
 292 err:
 293         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 294         return -EREMOTEIO;
 295 }
 296
 297
 298 static int EN_set(struct mb86a16_state *state,
 299                   int cren,
 300                   int afcen)
 301 {
 302         unsigned char val;
 303
 304         val = 0x7a | (cren << 7) | (afcen << 2);
 305         if (mb86a16_write(state, 0x49, val) < 0)
 306                 goto err;
 307
 308         return 0;
 309 err:
 310         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 311         return -EREMOTEIO;
 312 }
 313
 314 static int AFCEXEN_set(struct mb86a16_state *state,
 315                        int afcexen,
 316                        int smrt)
 317 {
 318         unsigned char AFCA ;
 319
 320         if (smrt > 18875)
 321                 AFCA = 4;
 322         else if (smrt > 9375)
 323                 AFCA = 3;
 324         else if (smrt > 2250)
 325                 AFCA = 2;
 326         else
 327                 AFCA = 1;
 328
 329         if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0)
 330                 goto err;
 331
 332         return 0;
 333
 334 err:
 335         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 336         return -EREMOTEIO;
 337 }
 338
 339 static int DAGC_data_set(struct mb86a16_state *state,
 340                          unsigned char DAGCA,
 341                          unsigned char DAGCW)
 342 {
 343         if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0)
 344                 goto err;
 345
 346         return 0;
 347
 348 err:
 349         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 350         return -EREMOTEIO;
 351 }
 352
 353 static void smrt_info_get(struct mb86a16_state *state, int rate)
 354 {
 355         if (rate >= 37501) {
 356                 state->deci = 0; state->csel = 0; state->rsel = 0;
 357         } else if (rate >= 30001) {
 358                 state->deci = 0; state->csel = 0; state->rsel = 1;
 359         } else if (rate >= 26251) {
 360                 state->deci = 0; state->csel = 1; state->rsel = 0;
 361         } else if (rate >= 22501) {
 362                 state->deci = 0; state->csel = 1; state->rsel = 1;
 363         } else if (rate >= 18751) {
 364                 state->deci = 1; state->csel = 0; state->rsel = 0;
 365         } else if (rate >= 15001) {
 366                 state->deci = 1; state->csel = 0; state->rsel = 1;
 367         } else if (rate >= 13126) {
 368                 state->deci = 1; state->csel = 1; state->rsel = 0;
 369         } else if (rate >= 11251) {
 370                 state->deci = 1; state->csel = 1; state->rsel = 1;
 371         } else if (rate >= 9376) {
 372                 state->deci = 2; state->csel = 0; state->rsel = 0;
 373         } else if (rate >= 7501) {
 374                 state->deci = 2; state->csel = 0; state->rsel = 1;
 375         } else if (rate >= 6563) {
 376                 state->deci = 2; state->csel = 1; state->rsel = 0;
 377         } else if (rate >= 5626) {
 378                 state->deci = 2; state->csel = 1; state->rsel = 1;
 379         } else if (rate >= 4688) {
 380                 state->deci = 3; state->csel = 0; state->rsel = 0;
 381         } else if (rate >= 3751) {
 382                 state->deci = 3; state->csel = 0; state->rsel = 1;
 383         } else if (rate >= 3282) {
 384                 state->deci = 3; state->csel = 1; state->rsel = 0;
 385         } else if (rate >= 2814) {
 386                 state->deci = 3; state->csel = 1; state->rsel = 1;
 387         } else if (rate >= 2344) {
 388                 state->deci = 4; state->csel = 0; state->rsel = 0;
 389         } else if (rate >= 1876) {
 390                 state->deci = 4; state->csel = 0; state->rsel = 1;
 391         } else if (rate >= 1641) {
 392                 state->deci = 4; state->csel = 1; state->rsel = 0;
 393         } else if (rate >= 1407) {
 394                 state->deci = 4; state->csel = 1; state->rsel = 1;
 395         } else if (rate >= 1172) {
 396                 state->deci = 5; state->csel = 0; state->rsel = 0;
 397         } else if (rate >=  939) {
 398                 state->deci = 5; state->csel = 0; state->rsel = 1;
 399         } else if (rate >=  821) {
 400                 state->deci = 5; state->csel = 1; state->rsel = 0;
 401         } else {
 402                 state->deci = 5; state->csel = 1; state->rsel = 1;
 403         }
 404
 405         if (state->csel == 0)
 406                 state->master_clk = 92000;
 407         else
 408                 state->master_clk = 61333;
 409
 410 }
 411
 412 static int signal_det(struct mb86a16_state *state,
 413                       int smrt,
 414                       unsigned char *SIG)
 415 {
 416
 417         int ret ;
 418         int smrtd ;
 419         int wait_sym ;
 420
 421         u32 wait_t;
 422         unsigned char S[3] ;
 423         int i ;
 424
 425         if (*SIG > 45) {
 426                 if (CNTM_set(state, 2, 1, 2) < 0) {
 427                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 428                         return -1;
 429                 }
 430                 wait_sym = 40000;
 431         } else {
 432                 if (CNTM_set(state, 3, 1, 2) < 0) {
 433                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 434                         return -1;
 435                 }
 436                 wait_sym = 80000;
 437         }
 438         for (i = 0; i < 3; i++) {
 439                 if (i == 0 )
 440                         smrtd = smrt * 98 / 100;
 441                 else if (i == 1)
 442                         smrtd = smrt;
 443                 else
 444                         smrtd = smrt * 102 / 100;
 445                 smrt_info_get(state, smrtd);
 446                 smrt_set(state, smrtd);
 447                 srst(state);
 448                 wait_t = (wait_sym + 99 * smrtd / 100) / smrtd;
 449                 if (wait_t == 0)
 450                         wait_t = 1;
 451                 msleep_interruptible(10);
 452                 if (mb86a16_read(state, 0x37, &(S[i])) != 2) {
 453                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 454                         return -EREMOTEIO;
 455                 }
 456         }
 457         if ((S[1] > S[0] * 112 / 100) &&
 458             (S[1] > S[2] * 112 / 100)) {
 459
 460                 ret = 1;
 461         } else {
 462                 ret = 0;
 463         }
 464         *SIG = S[1];
 465
 466         if (CNTM_set(state, 0, 1, 2) < 0) {
 467                 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 468                 return -1;
 469         }
 470
 471         return ret;
 472 }
 473
 474 static int rf_val_set(struct mb86a16_state *state,
 475                       int f,
 476                       int smrt,
 477                       unsigned char R)
 478 {
 479         unsigned char C, F, B;
 480         int M;
 481         unsigned char rf_val[5];
 482         int ack = -1;
 483
 484         if (smrt > 37750 )
 485                 C = 1;
 486         else if (smrt > 18875)
 487                 C = 2;
 488         else if (smrt > 5500 )
 489                 C = 3;
 490         else
 491                 C = 4;
 492
 493         if (smrt > 30500)
 494                 F = 3;
 495         else if (smrt > 9375)
 496                 F = 1;
 497         else if (smrt > 4625)
 498                 F = 0;
 499         else
 500                 F = 2;
 501
 502         if (f < 1060)
 503                 B = 0;
 504         else if (f < 1175)
 505                 B = 1;
 506         else if (f < 1305)
 507                 B = 2;
 508         else if (f < 1435)
 509                 B = 3;
 510         else if (f < 1570)
 511                 B = 4;
 512         else if (f < 1715)
 513                 B = 5;
 514         else if (f < 1845)
 515                 B = 6;
 516         else if (f < 1980)
 517                 B = 7;
 518         else if (f < 2080)
 519                 B = 8;
 520         else
 521                 B = 9;
 522
 523         M = f * (1 << R) / 2;
 524
 525         rf_val[0] = 0x01 | (C << 3) | (F << 1);
 526         rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12);
 527         rf_val[2] = (M & 0x00ff0) >> 4;
 528         rf_val[3] = ((M & 0x0000f) << 4) | B;
 529
 530         // Frequency Set
 531         if (mb86a16_write(state, 0x21, rf_val[0]) < 0)
 532                 ack = 0;
 533         if (mb86a16_write(state, 0x22, rf_val[1]) < 0)
 534                 ack = 0;
 535         if (mb86a16_write(state, 0x23, rf_val[2]) < 0)
 536                 ack = 0;
 537         if (mb86a16_write(state, 0x24, rf_val[3]) < 0)
 538                 ack = 0;
 539         if (mb86a16_write(state, 0x25, 0x01) < 0)
 540                 ack = 0;
 541         if (ack == 0) {
 542                 dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error");
 543                 return -EREMOTEIO;
 544         }
 545
 546         return 0;
 547 }
 548
 549 static int afcerr_chk(struct mb86a16_state *state)
 550 {
 551         unsigned char AFCM_L, AFCM_H ;
 552         int AFCM ;
 553         int afcm, afcerr ;
 554
 555         if (mb86a16_read(state, 0x0e, &AFCM_L) != 2)
 556                 goto err;
 557         if (mb86a16_read(state, 0x0f, &AFCM_H) != 2)
 558                 goto err;
 559
 560         AFCM = (AFCM_H << 8) + AFCM_L;
 561
 562         if (AFCM > 2048)
 563                 afcm = AFCM - 4096;
 564         else
 565                 afcm = AFCM;
 566         afcerr = afcm * state->master_clk / 8192;
 567
 568         return afcerr;
 569
 570 err:
 571         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 572         return -EREMOTEIO;
 573 }
 574
 575 static int dagcm_val_get(struct mb86a16_state *state)
 576 {
 577         int DAGCM;
 578         unsigned char DAGCM_H, DAGCM_L;
 579
 580         if (mb86a16_read(state, 0x45, &DAGCM_L) != 2)
 581                 goto err;
 582         if (mb86a16_read(state, 0x46, &DAGCM_H) != 2)
 583                 goto err;
 584
 585         DAGCM = (DAGCM_H << 8) + DAGCM_L;
 586
 587         return DAGCM;
 588
 589 err:
 590         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 591         return -EREMOTEIO;
 592 }
 593
 594 static int mb86a16_read_status(struct dvb_frontend *fe, fe_status_t *status)
 595 {
 596         struct mb86a16_state *state = fe->demodulator_priv;
 597
 598         if (state->signal & 0x02)
 599                 *status |= FE_HAS_VITERBI;
 600         if (state->signal & 0x01)
 601                 *status |= FE_HAS_SYNC;
 602         if (state->signal & 0x03)
 603                 *status |= FE_HAS_LOCK;
 604
 605         return 0;
 606 }
 607
 608 static int sync_chk(struct mb86a16_state *state,
 609                     unsigned char *VIRM)
 610 {
 611         unsigned char val;
 612         int sync;
 613
 614         if (mb86a16_read(state, 0x0d, &val) != 2)
 615                 goto err;
 616
 617         dprintk(verbose, MB86A16_INFO, 1, "Status = %02x,", val);
 618         sync = val & 0x01;
 619         *VIRM = (val & 0x1c) >> 2;
 620
 621         return sync;
 622 err:
 623         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 624         return -EREMOTEIO;
 625
 626 }
 627
 628 static int freqerr_chk(struct mb86a16_state *state,
 629                        int fTP,
 630                        int smrt,
 631                        int unit)
 632 {
 633         unsigned char CRM, AFCML, AFCMH;
 634         unsigned char temp1, temp2, temp3;
 635         int crm, afcm, AFCM;
 636         int crrerr, afcerr;             // [kHz]
 637         int frqerr;                     // [MHz]
 638         int afcen, afcexen = 0;
 639         int R, M, fOSC, fOSC_OFS;
 640
 641         if (mb86a16_read(state, 0x43, &CRM) != 2)
 642                 goto err;
 643
 644         if (CRM > 127)
 645                 crm = CRM - 256;
 646         else
 647                 crm = CRM;
 648
 649         crrerr = smrt * crm / 256;
 650         if (mb86a16_read(state, 0x49, &temp1) != 2)
 651                 goto err;
 652
 653         afcen = (temp1 & 0x04) >> 2;
 654         if (afcen == 0) {
 655                 if (mb86a16_read(state, 0x2a, &temp1) != 2)
 656                         goto err;
 657                 afcexen = (temp1 & 0x20) >> 5;
 658         }
 659
 660         if (afcen == 1) {
 661                 if (mb86a16_read(state, 0x0e, &AFCML) != 2)
 662                         goto err;
 663                 if (mb86a16_read(state, 0x0f, &AFCMH) != 2)
 664                         goto err;
 665         } else if (afcexen == 1) {
 666                 if (mb86a16_read(state, 0x2b, &AFCML) != 2)
 667                         goto err;
 668                 if (mb86a16_read(state, 0x2c, &AFCMH) != 2)
 669                         goto err;
 670         }
 671         if ((afcen == 1) || (afcexen == 1)) {
 672                 smrt_info_get(state, smrt);
 673                 AFCM = ((AFCMH & 0x01) << 8) + AFCML;
 674                 if (AFCM > 255)
 675                         afcm = AFCM - 512;
 676                 else
 677                         afcm = AFCM;
 678
 679                 afcerr = afcm * state->master_clk / 8192;
 680         } else
 681                 afcerr = 0;
 682
 683         if (mb86a16_read(state, 0x22, &temp1) != 2)
 684                 goto err;
 685         if (mb86a16_read(state, 0x23, &temp2) != 2)
 686                 goto err;
 687         if (mb86a16_read(state, 0x24, &temp3) != 2)
 688                 goto err;
 689
 690         R = (temp1 & 0xe0) >> 5;
 691         M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4);
 692         if (R == 0)
 693                 fOSC = 2 * M;
 694         else
 695                 fOSC = M;
 696
 697         fOSC_OFS = fOSC - fTP;
 698
 699         if (unit == 0) {        //[MHz]
 700                 if (crrerr + afcerr + fOSC_OFS * 1000 >= 0)
 701                         frqerr = (crrerr + afcerr + fOSC_OFS * 1000 + 500) / 1000;
 702                 else
 703                         frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000;
 704         } else {        //[kHz]
 705                 frqerr = crrerr + afcerr + fOSC_OFS * 1000;
 706         }
 707
 708         return frqerr;
 709 err:
 710         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 711         return -EREMOTEIO;
 712 }
 713
 714 static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt)
 715 {
 716         unsigned char R;
 717
 718         if (smrt > 9375)
 719                 R = 0;
 720         else
 721                 R = 1;
 722
 723         return R;
 724 }
 725
 726 static void swp_info_get(struct mb86a16_state *state,
 727                          int fOSC_start,
 728                          int smrt,
 729                          int v, int R,
 730                          int swp_ofs,
 731                          int *fOSC,
 732                          int *afcex_freq,
 733                          unsigned char *AFCEX_L,
 734                          unsigned char *AFCEX_H)
 735 {
 736         int AFCEX ;
 737         int crnt_swp_freq ;
 738
 739         crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs;
 740
 741         if (R == 0 )
 742                 *fOSC = (crnt_swp_freq + 1000) / 2000 * 2;
 743         else
 744                 *fOSC = (crnt_swp_freq + 500) / 1000;
 745
 746         if (*fOSC >= crnt_swp_freq)
 747                 *afcex_freq = *fOSC *1000 - crnt_swp_freq;
 748         else
 749                 *afcex_freq = crnt_swp_freq - *fOSC * 1000;
 750
 751         AFCEX = *afcex_freq * 8192 / state->master_clk;
 752         *AFCEX_L =  AFCEX & 0x00ff;
 753         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 754 }
 755
 756
 757 static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V,  int vmax, int vmin,
 758                                int SIGMIN, int fOSC, int afcex_freq, int swp_ofs, unsigned char *SIG1)
 759 {
 760         int swp_freq ;
 761
 762         if ((i % 2 == 1) && (v <= vmax)) {
 763                 // positive v (case 1)
 764                 if ((v - 1 == vmin)                             &&
 765                     (*(V + 30 + v) >= 0)                        &&
 766                     (*(V + 30 + v - 1) >= 0)                    &&
 767                     (*(V + 30 + v - 1) > *(V + 30 + v))         &&
 768                     (*(V + 30 + v - 1) > SIGMIN)) {
 769
 770                         swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 771                         *SIG1 = *(V + 30 + v - 1);
 772                 } else if ((v == vmax)                          &&
 773                            (*(V + 30 + v) >= 0)                 &&
 774                            (*(V + 30 + v - 1) >= 0)             &&
 775                            (*(V + 30 + v) > *(V + 30 + v - 1))  &&
 776                            (*(V + 30 + v) > SIGMIN)) {
 777                         // (case 2)
 778                         swp_freq = fOSC * 1000 + afcex_freq;
 779                         *SIG1 = *(V + 30 + v);
 780                 } else if ((*(V + 30 + v) > 0)                  &&
 781                            (*(V + 30 + v - 1) > 0)              &&
 782                            (*(V + 30 + v - 2) > 0)              &&
 783                            (*(V + 30 + v - 3) > 0)              &&
 784                            (*(V + 30 + v - 1) > *(V + 30 + v))  &&
 785                            (*(V + 30 + v - 2) > *(V + 30 + v - 3)) &&
 786                            ((*(V + 30 + v - 1) > SIGMIN)        ||
 787                            (*(V + 30 + v - 2) > SIGMIN))) {
 788                         // (case 3)
 789                         if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) {
 790                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 791                                 *SIG1 = *(V + 30 + v - 1);
 792                         } else {
 793                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2;
 794                                 *SIG1 = *(V + 30 + v - 2);
 795                         }
 796                 } else if ((v == vmax)                          &&
 797                            (*(V + 30 + v) >= 0)                 &&
 798                            (*(V + 30 + v - 1) >= 0)             &&
 799                            (*(V + 30 + v - 2) >= 0)             &&
 800                            (*(V + 30 + v) > *(V + 30 + v - 2))  &&
 801                            (*(V + 30 + v - 1) > *(V + 30 + v - 2)) &&
 802                            ((*(V + 30 + v) > SIGMIN)            ||
 803                            (*(V + 30 + v - 1) > SIGMIN))) {
 804                         // (case 4)
 805                         if (*(V + 30 + v) >= *(V + 30 + v - 1)) {
 806                                 swp_freq = fOSC * 1000 + afcex_freq;
 807                                 *SIG1 = *(V + 30 + v);
 808                         } else {
 809                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 810                                 *SIG1 = *(V + 30 + v - 1);
 811                         }
 812                 } else  {
 813                         swp_freq = -1 ;
 814                 }
 815         } else if ((i % 2 == 0) && (v >= vmin)) {
 816                 // Negative v (case 1)
 817                 if ((*(V + 30 + v) > 0)                         &&
 818                     (*(V + 30 + v + 1) > 0)                     &&
 819                     (*(V + 30 + v + 2) > 0)                     &&
 820                     (*(V + 30 + v + 1) > *(V + 30 + v))         &&
 821                     (*(V + 30 + v + 1) > *(V + 30 + v + 2))     &&
 822                     (*(V + 30 + v + 1) > SIGMIN)) {
 823
 824                         swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 825                         *SIG1 = *(V + 30 + v + 1);
 826                 } else if ((v + 1 == vmax)                      &&
 827                            (*(V + 30 + v) >= 0)                 &&
 828                            (*(V + 30 + v + 1) >= 0)             &&
 829                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 830                            (*(V + 30 + v + 1) > SIGMIN)) {
 831                         // (case 2)
 832                         swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 833                         *SIG1 = *(V + 30 + v);
 834                 } else if ((v == vmin)                          &&
 835                            (*(V + 30 + v) > 0)                  &&
 836                            (*(V + 30 + v + 1) > 0)              &&
 837                            (*(V + 30 + v + 2) > 0)              &&
 838                            (*(V + 30 + v) > *(V + 30 + v + 1))  &&
 839                            (*(V + 30 + v) > *(V + 30 + v + 2))  &&
 840                            (*(V + 30 + v) > SIGMIN)) {
 841                         // (case 3)
 842                         swp_freq = fOSC * 1000 + afcex_freq;
 843                         *SIG1 = *(V + 30 + v);
 844                 } else if ((*(V + 30 + v) >= 0)                 &&
 845                            (*(V + 30 + v + 1) >= 0)             &&
 846                            (*(V + 30 + v + 2) >= 0)             &&
 847                            (*(V +30 + v + 3) >= 0)              &&
 848                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 849                            (*(V + 30 + v + 2) > *(V + 30 + v + 3)) &&
 850                            ((*(V + 30 + v + 1) > SIGMIN)        ||
 851                             (*(V + 30 + v + 2) > SIGMIN))) {
 852                         // (case 4)
 853                         if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
 854                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 855                                 *SIG1 = *(V + 30 + v + 1);
 856                         } else {
 857                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
 858                                 *SIG1 = *(V + 30 + v + 2);
 859                         }
 860                 } else if ((*(V + 30 + v) >= 0)                 &&
 861                            (*(V + 30 + v + 1) >= 0)             &&
 862                            (*(V + 30 + v + 2) >= 0)             &&
 863                            (*(V + 30 + v + 3) >= 0)             &&
 864                            (*(V + 30 + v) > *(V + 30 + v + 2))  &&
 865                            (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
 866                            (*(V + 30 + v) > *(V + 30 + v + 3))  &&
 867                            (*(V + 30 + v + 1) > *(V + 30 + v + 3)) &&
 868                            ((*(V + 30 + v) > SIGMIN)            ||
 869                             (*(V + 30 + v + 1) > SIGMIN))) {
 870                         // (case 5)
 871                         if (*(V + 30 + v) >= *(V + 30 + v + 1)) {
 872                                 swp_freq = fOSC * 1000 + afcex_freq;
 873                                 *SIG1 = *(V + 30 + v);
 874                         } else {
 875                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 876                                 *SIG1 = *(V + 30 + v + 1);
 877                         }
 878                 } else if ((v + 2 == vmin)                      &&
 879                            (*(V + 30 + v) >= 0)                 &&
 880                            (*(V + 30 + v + 1) >= 0)             &&
 881                            (*(V + 30 + v + 2) >= 0)             &&
 882                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 883                            (*(V + 30 + v + 2) > *(V + 30 + v))  &&
 884                            ((*(V + 30 + v + 1) > SIGMIN)        ||
 885                             (*(V + 30 + v + 2) > SIGMIN))) {
 886                         // (case 6)
 887                         if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
 888                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 889                                 *SIG1 = *(V + 30 + v + 1);
 890                         } else {
 891                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
 892                                 *SIG1 = *(V + 30 + v + 2);
 893                         }
 894                 } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) {
 895                         swp_freq = fOSC * 1000;
 896                         *SIG1 = *(V + 30 + v);
 897                 } else swp_freq = -1;
 898         } else swp_freq = -1;
 899
 900         return swp_freq;
 901 }
 902
 903 static void swp_info_get2(struct mb86a16_state *state,
 904                           int smrt,
 905                           int R,
 906                           int swp_freq,
 907                           int *afcex_freq,
 908                           int *fOSC,
 909                           unsigned char *AFCEX_L,
 910                           unsigned char *AFCEX_H)
 911 {
 912         int AFCEX ;
 913
 914         if (R == 0)
 915                 *fOSC = (swp_freq + 1000) / 2000 * 2;
 916         else
 917                 *fOSC = (swp_freq + 500) / 1000;
 918
 919         if (*fOSC >= swp_freq)
 920                 *afcex_freq = *fOSC * 1000 - swp_freq;
 921         else
 922                 *afcex_freq = swp_freq - *fOSC * 1000;
 923
 924         AFCEX = *afcex_freq * 8192 / state->master_clk;
 925         *AFCEX_L =  AFCEX & 0x00ff;
 926         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 927 }
 928
 929 static void afcex_info_get(struct mb86a16_state *state,
 930                            int afcex_freq,
 931                            unsigned char *AFCEX_L,
 932                            unsigned char *AFCEX_H)
 933 {
 934         int AFCEX ;
 935
 936         AFCEX = afcex_freq * 8192 / state->master_clk;
 937         *AFCEX_L =  AFCEX & 0x00ff;
 938         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 939 }
 940
 941 static int SEQ_set(struct mb86a16_state *state, unsigned char loop)
 942 {
 943         // SLOCK0 = 0
 944         if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) {
 945                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 946                 return -EREMOTEIO;
 947         }
 948
 949         return 0;
 950 }
 951
 952 static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV)
 953 {
 954         // Viterbi Rate, IQ Settings
 955         if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) {
 956                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 957                 return -EREMOTEIO;
 958         }
 959
 960         return 0;
 961 }
 962
 963 static int FEC_srst(struct mb86a16_state *state)
 964 {
 965         if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) {
 966                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 967                 return -EREMOTEIO;
 968         }
 969
 970         return 0;
 971 }
 972
 973 static int S2T_set(struct mb86a16_state *state, unsigned char S2T)
 974 {
 975         if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) {
 976                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 977                 return -EREMOTEIO;
 978         }
 979
 980         return 0;
 981 }
 982
 983 static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T)
 984 {
 985         if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) {
 986                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 987                 return -EREMOTEIO;
 988         }
 989
 990         return 0;
 991 }
 992
 993
 994 static int mb86a16_set_fe(struct mb86a16_state *state)
 995 {
 996         u8 agcval, cnmval;
 997
 998         int i, j;
 999         int fOSC = 0;
1000         int fOSC_start = 0;
1001         int wait_t;
1002         int fcp;
1003         int swp_ofs;
1004         int V[60];
1005         u8 SIG1MIN;
1006
1007         unsigned char CREN, AFCEN, AFCEXEN;
1008         unsigned char SIG1;
1009         unsigned char TIMINT1, TIMINT2, TIMEXT;
1010         unsigned char S0T, S1T;
1011         unsigned char S2T;
1012 //      unsigned char S2T, S3T;
1013         unsigned char S4T, S5T;
1014         unsigned char AFCEX_L, AFCEX_H;
1015         unsigned char R;
1016         unsigned char VIRM;
1017         unsigned char ETH, VIA;
1018         unsigned char junk;
1019
1020         int loop;
1021         int ftemp;
1022         int v, vmax, vmin;
1023         int vmax_his, vmin_his;
1024         int swp_freq, prev_swp_freq[20];
1025         int prev_freq_num;
1026         int signal_dupl;
1027         int afcex_freq;
1028         int signal;
1029         int afcerr;
1030         int temp_freq, delta_freq;
1031         int dagcm[4];
1032         int smrt_d;
1033 //      int freq_err;
1034         int n;
1035         int ret = -1;
1036         int sync;
1037
1038         dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate);
1039
1040         fcp = 3000;
1041         swp_ofs = state->srate / 4;
1042
1043         for (i = 0; i < 60; i++)
1044                 V[i] = -1;
1045
1046         for (i = 0; i < 20; i++)
1047                 prev_swp_freq[i] = 0;
1048
1049         SIG1MIN = 25;
1050
1051         for (n = 0; ((n < 3) && (ret == -1)); n++) {
1052                 SEQ_set(state, 0);
1053                 iq_vt_set(state, 0);
1054
1055                 CREN = 0;
1056                 AFCEN = 0;
1057                 AFCEXEN = 1;
1058                 TIMINT1 = 0;
1059                 TIMINT2 = 1;
1060                 TIMEXT = 2;
1061                 S1T = 0;
1062                 S0T = 0;
1063
1064                 if (initial_set(state) < 0) {
1065                         dprintk(verbose, MB86A16_ERROR, 1, "initial set failed");
1066                         return -1;
1067                 }
1068                 if (DAGC_data_set(state, 3, 2) < 0) {
1069                         dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1070                         return -1;
1071                 }
1072                 if (EN_set(state, CREN, AFCEN) < 0) {
1073                         dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1074                         return -1; // (0, 0)
1075                 }
1076                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1077                         dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1078                         return -1; // (1, smrt) = (1, symbolrate)
1079                 }
1080                 if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) {
1081                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set error");
1082                         return -1; // (0, 1, 2)
1083                 }
1084                 if (S01T_set(state, S1T, S0T) < 0) {
1085                         dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1086                         return -1; // (0, 0)
1087                 }
1088                 smrt_info_get(state, state->srate);
1089                 if (smrt_set(state, state->srate) < 0) {
1090                         dprintk(verbose, MB86A16_ERROR, 1, "smrt info get error");
1091                         return -1;
1092                 }
1093
1094                 R = vco_dev_get(state, state->srate);
1095                 if (R == 1)
1096                         fOSC_start = state->frequency;
1097
1098                 else if (R == 0) {
1099                         if (state->frequency % 2 == 0) {
1100                                 fOSC_start = state->frequency;
1101                         } else {
1102                                 fOSC_start = state->frequency + 1;
1103                                 if (fOSC_start > 2150)
1104                                         fOSC_start = state->frequency - 1;
1105                         }
1106                 }
1107                 loop = 1;
1108                 ftemp = fOSC_start * 1000;
1109                 vmax = 0 ;
1110                 while (loop == 1) {
1111                         ftemp = ftemp + swp_ofs;
1112                         vmax++;
1113
1114                         // Upper bound
1115                         if (ftemp > 2150000) {
1116                                 loop = 0;
1117                                 vmax--;
1118                         }
1119                         else if ((ftemp == 2150000) || (ftemp - state->frequency * 1000 >= fcp + state->srate / 4))
1120                                 loop = 0;
1121                 }
1122
1123                 loop = 1;
1124                 ftemp = fOSC_start * 1000;
1125                 vmin = 0 ;
1126                 while (loop == 1) {
1127                         ftemp = ftemp - swp_ofs;
1128                         vmin--;
1129
1130                         // Lower bound
1131                         if (ftemp < 950000) {
1132                                 loop = 0;
1133                                 vmin++;
1134                         }
1135                         else if ((ftemp == 950000) || (state->frequency * 1000 - ftemp >= fcp + state->srate / 4))
1136                                 loop = 0;
1137                 }
1138
1139                 wait_t = (8000 + state->srate / 2) / state->srate;
1140                 if (wait_t == 0)
1141                         wait_t = 1;
1142
1143                 i = 0;
1144                 j = 0;
1145                 prev_freq_num = 0;
1146                 loop = 1;
1147                 signal = 0;
1148                 vmax_his = 0;
1149                 vmin_his = 0;
1150                 v = 0;
1151
1152                 while (loop == 1) {
1153                         swp_info_get(state, fOSC_start, state->srate,
1154                                      v, R, swp_ofs, &fOSC,
1155                                      &afcex_freq, &AFCEX_L, &AFCEX_H);
1156
1157                         udelay(100);
1158                         if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1159                                 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1160                                 return -1;
1161                         }
1162                         udelay(100);
1163                         if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1164                                 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1165                                 return -1;
1166                         }
1167                         if (srst(state) < 0) {
1168                                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1169                                 return -1;
1170                         }
1171                         msleep_interruptible(wait_t);
1172
1173                         if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1174                                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1175                                 return -1;
1176                         }
1177                         V[30 + v] = SIG1 ;
1178                         swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin,
1179                                                       SIG1MIN, fOSC, afcex_freq,
1180                                                       swp_ofs, &SIG1);  //changed
1181
1182                         signal_dupl = 0;
1183                         for (j = 0; j < prev_freq_num; j++) {
1184                                 if ((ABS(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) {
1185                                         signal_dupl = 1;
1186                                         dprintk(verbose, MB86A16_INFO, 1, "Probably Duplicate Signal, j = %d", j);
1187                                 }
1188                         }
1189                         if ((signal_dupl == 0) && (swp_freq > 0) && (ABS(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) {
1190                                 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate);
1191                                 prev_swp_freq[prev_freq_num] = swp_freq;
1192                                 prev_freq_num++;
1193                                 swp_info_get2(state, state->srate, R, swp_freq,
1194                                               &afcex_freq, &fOSC,
1195                                               &AFCEX_L, &AFCEX_H);
1196
1197                                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1198                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1199                                         return -1;
1200                                 }
1201                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1202                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1203                                         return -1;
1204                                 }
1205                                 signal = signal_det(state, state->srate, &SIG1);
1206                                 if (signal == 1) {
1207                                         dprintk(verbose, MB86A16_ERROR, 1, "***** Signal Found *****");
1208                                         loop = 0;
1209                                 } else {
1210                                         dprintk(verbose, MB86A16_ERROR, 1, "!!!!! No signal !!!!!, try again...");
1211                                         smrt_info_get(state, state->srate);
1212                                         if (smrt_set(state, state->srate) < 0) {
1213                                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1214                                                 return -1;
1215                                         }
1216                                 }
1217                         }
1218                         if (v > vmax)
1219                                 vmax_his = 1 ;
1220                         if (v < vmin)
1221                                 vmin_his = 1 ;
1222                         i++;
1223
1224                         if ((i % 2 == 1) && (vmax_his == 1))
1225                                 i++;
1226                         if ((i % 2 == 0) && (vmin_his == 1))
1227                                 i++;
1228
1229                         if (i % 2 == 1)
1230                                 v = (i + 1) / 2;
1231                         else
1232                                 v = -i / 2;
1233
1234                         if ((vmax_his == 1) && (vmin_his == 1))
1235                                 loop = 0 ;
1236                 }
1237
1238                 if (signal == 1) {
1239                         dprintk(verbose, MB86A16_INFO, 1, " Start Freq Error Check");
1240                         S1T = 7 ;
1241                         S0T = 1 ;
1242                         CREN = 0 ;
1243                         AFCEN = 1 ;
1244                         AFCEXEN = 0 ;
1245
1246                         if (S01T_set(state, S1T, S0T) < 0) {
1247                                 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1248                                 return -1;
1249                         }
1250                         smrt_info_get(state, state->srate);
1251                         if (smrt_set(state, state->srate) < 0) {
1252                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1253                                 return -1;
1254                         }
1255                         if (EN_set(state, CREN, AFCEN) < 0) {
1256                                 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1257                                 return -1;
1258                         }
1259                         if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1260                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1261                                 return -1;
1262                         }
1263                         afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H);
1264                         if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1265                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCOFS data set error");
1266                                 return -1;
1267                         }
1268                         if (srst(state) < 0) {
1269                                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1270                                 return -1;
1271                         }
1272                         // delay 4~200
1273                         wait_t = 200000 / state->master_clk + 200000 / state->srate;
1274                         msleep(wait_t);
1275                         afcerr = afcerr_chk(state);
1276                         if (afcerr == -1)
1277                                 return -1;
1278
1279                         swp_freq = fOSC * 1000 + afcerr ;
1280                         AFCEXEN = 1 ;
1281                         if (state->srate >= 1500)
1282                                 smrt_d = state->srate / 3;
1283                         else
1284                                 smrt_d = state->srate / 2;
1285                         smrt_info_get(state, smrt_d);
1286                         if (smrt_set(state, smrt_d) < 0) {
1287                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1288                                 return -1;
1289                         }
1290                         if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) {
1291                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1292                                 return -1;
1293                         }
1294                         R = vco_dev_get(state, smrt_d);
1295                         if (DAGC_data_set(state, 2, 0) < 0) {
1296                                 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1297                                 return -1;
1298                         }
1299                         for (i = 0; i < 3; i++) {
1300                                 temp_freq = swp_freq + (i - 1) * state->srate / 8;
1301                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1302                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1303                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1304                                         return -1;
1305                                 }
1306                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1307                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1308                                         return -1;
1309                                 }
1310                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1311                                 msleep(wait_t);
1312                                 dagcm[i] = dagcm_val_get(state);
1313                         }
1314                         if ((dagcm[0] > dagcm[1]) &&
1315                             (dagcm[0] > dagcm[2]) &&
1316                             (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) {
1317
1318                                 temp_freq = swp_freq - 2 * state->srate / 8;
1319                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1320                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1321                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1322                                         return -1;
1323                                 }
1324                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1325                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1326                                         return -1;
1327                                 }
1328                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1329                                 msleep(wait_t);
1330                                 dagcm[3] = dagcm_val_get(state);
1331                                 if (dagcm[3] > dagcm[1])
1332                                         delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300;
1333                                 else
1334                                         delta_freq = 0;
1335                         } else if ((dagcm[2] > dagcm[1]) &&
1336                                    (dagcm[2] > dagcm[0]) &&
1337                                    (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) {
1338
1339                                 temp_freq = swp_freq + 2 * state->srate / 8;
1340                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1341                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1342                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set");
1343                                         return -1;
1344                                 }
1345                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1346                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1347                                         return -1;
1348                                 }
1349                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1350                                 msleep(wait_t);
1351                                 dagcm[3] = dagcm_val_get(state);
1352                                 if (dagcm[3] > dagcm[1])
1353                                         delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300;
1354                                 else
1355                                         delta_freq = 0 ;
1356
1357                         } else {
1358                                 delta_freq = 0 ;
1359                         }
1360                         dprintk(verbose, MB86A16_INFO, 1, "SWEEP Frequency = %d", swp_freq);
1361                         swp_freq += delta_freq;
1362                         dprintk(verbose, MB86A16_INFO, 1, "Adjusting .., DELTA Freq = %d, SWEEP Freq=%d", delta_freq, swp_freq);
1363                         if (ABS(state->frequency * 1000 - swp_freq) > 3800) {
1364                                 dprintk(verbose, MB86A16_INFO, 1, "NO  --  SIGNAL !");
1365                         } else {
1366
1367                                 S1T = 0;
1368                                 S0T = 3;
1369                                 CREN = 1;
1370                                 AFCEN = 0;
1371                                 AFCEXEN = 1;
1372
1373                                 if (S01T_set(state, S1T, S0T) < 0) {
1374                                         dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1375                                         return -1;
1376                                 }
1377                                 if (DAGC_data_set(state, 0, 0) < 0) {
1378                                         dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1379                                         return -1;
1380                                 }
1381                                 R = vco_dev_get(state, state->srate);
1382                                 smrt_info_get(state, state->srate);
1383                                 if (smrt_set(state, state->srate) < 0) {
1384                                         dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1385                                         return -1;
1386                                 }
1387                                 if (EN_set(state, CREN, AFCEN) < 0) {
1388                                         dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1389                                         return -1;
1390                                 }
1391                                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1392                                         dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1393                                         return -1;
1394                                 }
1395                                 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1396                                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1397                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1398                                         return -1;
1399                                 }
1400                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1401                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1402                                         return -1;
1403                                 }
1404                                 if (srst(state) < 0) {
1405                                         dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1406                                         return -1;
1407                                 }
1408                                 wait_t = 7 + (10000 + state->srate / 2) / state->srate;
1409                                 if (wait_t == 0)
1410                                         wait_t = 1;
1411                                 msleep_interruptible(wait_t);
1412                                 if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1413                                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1414                                         return -EREMOTEIO;
1415                                 }
1416
1417                                 if (SIG1 > 110) {
1418                                         S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6;
1419                                         wait_t = 7 + (917504 + state->srate / 2) / state->srate;
1420                                 } else if (SIG1 > 105) {
1421                                         S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1422                                         wait_t = 7 + (1048576 + state->srate / 2) / state->srate;
1423                                 } else if (SIG1 > 85) {
1424                                         S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1425                                         wait_t = 7 + (1310720 + state->srate / 2) / state->srate;
1426                                 } else if (SIG1 > 65) {
1427                                         S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1428                                         wait_t = 7 + (1572864 + state->srate / 2) / state->srate;
1429                                 } else {
1430                                         S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1431                                         wait_t = 7 + (2097152 + state->srate / 2) / state->srate;
1432                                 }
1433                                 wait_t *= 2; /*         FOS     */
1434                                 S2T_set(state, S2T);
1435                                 S45T_set(state, S4T, S5T);
1436                                 Vi_set(state, ETH, VIA);
1437                                 srst(state);
1438                                 msleep_interruptible(wait_t);
1439                                 sync = sync_chk(state, &VIRM);
1440                                 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync);
1441                                 if (mb86a16_read(state, 0x0d, &state->signal) != 2) {
1442                                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1443                                         return -EREMOTEIO;
1444                                 }
1445                                 if (VIRM) {
1446                                         if (VIRM == 4) { // 5/6
1447                                                 if (SIG1 > 110)
1448                                                         wait_t = ( 786432 + state->srate / 2) / state->srate;
1449                                                 else
1450                                                         wait_t = (1572864 + state->srate / 2) / state->srate;
1451                                                 if (state->srate < 5000)
1452                                                         // FIXME ! , should be a long wait !
1453                                                         msleep_interruptible(wait_t);
1454                                                 else
1455                                                         msleep_interruptible(wait_t);
1456
1457                                                 if (sync_chk(state, &junk) == 0) {
1458                                                         iq_vt_set(state, 1);
1459                                                         FEC_srst(state);
1460                                                 }
1461                                                 if (SIG1 > 110)
1462                                                         wait_t = ( 786432 + state->srate / 2) / state->srate;
1463                                                 else
1464                                                         wait_t = (1572864 + state->srate / 2) / state->srate;
1465
1466                                                 msleep_interruptible(wait_t);
1467                                                 SEQ_set(state, 1);
1468                                         } else { // 1/2, 2/3, 3/4, 7/8
1469                                                 if (SIG1 > 110)
1470                                                         wait_t = ( 786432 + state->srate / 2) / state->srate;
1471                                                 else
1472                                                         wait_t = (1572864 + state->srate / 2) / state->srate;
1473
1474                                                 msleep_interruptible(wait_t);
1475                                                 SEQ_set(state, 1);
1476                                         }
1477                                 } else {
1478                                         dprintk(verbose, MB86A16_INFO, 1, "NO  -- SIGNAL");
1479                                         SEQ_set(state, 1);
1480                                 }
1481                         }
1482                 } else {
1483                         dprintk (verbose, MB86A16_INFO, 1, "NO  -- SIGNAL");
1484                 }
1485
1486                 sync = sync_chk(state, &junk);
1487                 if (sync) {
1488                         dprintk(verbose, MB86A16_INFO, 1, "******* SYNC *******");
1489                         freqerr_chk(state, state->frequency, state->srate, 1);
1490                 }
1491         }
1492
1493         mb86a16_read(state, 0x15, &agcval);
1494         mb86a16_read(state, 0x26, &cnmval);
1495         dprintk(verbose, MB86A16_INFO, 1, "AGC = %02x CNM = %02x", agcval, cnmval);
1496
1497         return ret;
1498 }
1499
1500 static int mb86a16_send_diseqc_msg(struct dvb_frontend *fe,
1501                                    struct dvb_diseqc_master_cmd *cmd)
1502 {
1503         struct mb86a16_state *state = fe->demodulator_priv;
1504         int i;
1505         u8 regs;
1506
1507         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1508                 goto err;
1509         if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1510                 goto err;
1511         if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1512                 goto err;
1513
1514         regs = 0x18;
1515
1516         if (cmd->msg_len > 5 || cmd->msg_len < 4)
1517                 return -EINVAL;
1518
1519         for (i = 0; i < cmd->msg_len; i++) {
1520                 if (mb86a16_write(state, regs, cmd->msg[i]) < 0)
1521                         goto err;
1522
1523                 regs++;
1524         }
1525         i += 0x90;
1526
1527         msleep_interruptible(10);
1528
1529         if (mb86a16_write(state, MB86A16_DCC1, i) < 0)
1530                 goto err;
1531         if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1532                 goto err;
1533
1534         return 0;
1535
1536 err:
1537         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1538         return -EREMOTEIO;
1539 }
1540
1541 static int mb86a16_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
1542 {
1543         struct mb86a16_state *state = fe->demodulator_priv;
1544
1545         switch (burst) {
1546         case SEC_MINI_A:
1547                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1548                                                        MB86A16_DCC1_TBEN  |
1549                                                        MB86A16_DCC1_TBO) < 0)
1550                         goto err;
1551                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1552                         goto err;
1553                 break;
1554         case SEC_MINI_B:
1555                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1556                                                        MB86A16_DCC1_TBEN) < 0)
1557                         goto err;
1558                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1559                         goto err;
1560                 break;
1561         }
1562
1563         return 0;
1564 err:
1565         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1566         return -EREMOTEIO;
1567 }
1568
1569 static int mb86a16_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
1570 {
1571         struct mb86a16_state *state = fe->demodulator_priv;
1572
1573         switch (tone) {
1574         case SEC_TONE_ON:
1575                 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0)
1576                         goto err;
1577                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1578                                                        MB86A16_DCC1_CTOE) < 0)
1579
1580                         goto err;
1581                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1582                         goto err;
1583                 break;
1584         case SEC_TONE_OFF:
1585                 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1586                         goto err;
1587                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1588                         goto err;
1589                 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1590                         goto err;
1591                 break;
1592         default:
1593                 return -EINVAL;
1594         }
1595         return 0;
1596
1597 err:
1598         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1599         return -EREMOTEIO;
1600 }
1601
1602 #define MB86A16_FE_ALGO         1
1603
1604 static int mb86a16_frontend_algo(struct dvb_frontend *fe)
1605 {
1606         return MB86A16_FE_ALGO;
1607 }
1608
1609 static int mb86a16_set_frontend(struct dvb_frontend *fe,
1610                                 struct dvb_frontend_parameters *p,
1611                                 unsigned int mode_flags,
1612                                 int *delay,
1613                                 fe_status_t *status)
1614 {
1615         int ret = 0;
1616         struct mb86a16_state *state = fe->demodulator_priv;
1617
1618         if (p != NULL) {
1619                 state->frequency = p->frequency / 1000;
1620                 state->srate = p->u.qpsk.symbol_rate / 1000;
1621                 ret = mb86a16_set_fe(state);
1622         }
1623         if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1624                 mb86a16_read_status(fe, status);
1625
1626         *delay = HZ/3000;
1627
1628         return ret;
1629 }
1630
1631 static void mb86a16_release(struct dvb_frontend *fe)
1632 {
1633         struct mb86a16_state *state = fe->demodulator_priv;
1634         kfree(state);
1635 }
1636
1637 static int mb86a16_init(struct dvb_frontend *fe)
1638 {
1639         return 0;
1640 }
1641
1642 static int mb86a16_sleep(struct dvb_frontend *fe)
1643 {
1644         return 0;
1645 }
1646
1647 static int mb86a16_read_ber(struct dvb_frontend *fe, u32 *ber)
1648 {
1649         return 0;
1650 }
1651
1652 static int mb86a16_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1653 {
1654         *strength = 0;
1655
1656         return 0;
1657 }
1658
1659 struct cnr {
1660         u8 cn_reg;
1661         u8 cn_val;
1662 };
1663
1664 static const struct cnr cnr_tab[] = {
1665         {  35,  2 },
1666         {  40,  3 },
1667         {  50,  4 },
1668         {  60,  5 },
1669         {  70,  6 },
1670         {  80,  7 },
1671         {  92,  8 },
1672         { 103,  9 },
1673         { 115, 10 },
1674         { 138, 12 },
1675         { 162, 15 },
1676         { 180, 18 },
1677         { 185, 19 },
1678         { 189, 20 },
1679         { 195, 22 },
1680         { 199, 24 },
1681         { 201, 25 },
1682         { 202, 26 },
1683         { 203, 27 },
1684         { 205, 28 },
1685         { 208, 30 }
1686 };
1687
1688 static int mb86a16_read_snr(struct dvb_frontend *fe, u16 *snr)
1689 {
1690         struct mb86a16_state *state = fe->demodulator_priv;
1691         int i = 0;
1692         int low_tide = 2, high_tide = 30, q_level;
1693         u8  cn;
1694
1695         if (mb86a16_read(state, 0x26, &cn) != 2) {
1696                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1697                 return -EREMOTEIO;
1698         }
1699
1700         for (i = 0; i < ARRAY_SIZE(cnr_tab); i++) {
1701                 if (cn < cnr_tab[i].cn_reg) {
1702                         *snr = cnr_tab[i].cn_val;
1703                         break;
1704                 }
1705         }
1706         q_level = (*snr * 100) / (high_tide - low_tide);
1707         dprintk(verbose, MB86A16_ERROR, 1, "SNR (Quality) = [%d dB], Level=%d %%", *snr, q_level);
1708
1709         return 0;
1710 }
1711
1712 static int mb86a16_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1713 {
1714         return 0;
1715 }
1716
1717 static struct dvb_frontend_ops mb86a16_ops = {
1718         .info = {
1719                 .name                   = "Fujitsu MB86A16 DVB-S",
1720                 .type                   = FE_QPSK,
1721                 .frequency_min          = 950000,
1722                 .frequency_max          = 2150000,
1723                 .frequency_stepsize     = 125,
1724                 .frequency_tolerance    = 0,
1725                 .symbol_rate_min        = 1000000,
1726                 .symbol_rate_max        = 45000000,
1727                 .symbol_rate_tolerance  = 500,
1728                 .caps                   = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
1729                                           FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
1730                                           FE_CAN_FEC_7_8 | FE_CAN_QPSK    |
1731                                           FE_CAN_FEC_AUTO
1732         },
1733         .release                        = mb86a16_release,
1734         .tune                           = mb86a16_set_frontend,
1735         .read_status                    = mb86a16_read_status,
1736         .get_frontend_algo              = mb86a16_frontend_algo,
1737         .init                           = mb86a16_init,
1738         .sleep                          = mb86a16_sleep,
1739         .read_status                    = mb86a16_read_status,
1740
1741         .read_ber                       = mb86a16_read_ber,
1742         .read_signal_strength           = mb86a16_read_signal_strength,
1743         .read_snr                       = mb86a16_read_snr,
1744         .read_ucblocks                  = mb86a16_read_ucblocks,
1745
1746         .diseqc_send_master_cmd         = mb86a16_send_diseqc_msg,
1747         .diseqc_send_burst              = mb86a16_send_diseqc_burst,
1748         .set_tone                       = mb86a16_set_tone,
1749 };
1750
1751 struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
1752                                     struct i2c_adapter *i2c_adap)
1753 {
1754         u8 dev_id = 0;
1755         struct mb86a16_state *state = NULL;
1756
1757         state = kmalloc(sizeof (struct mb86a16_state), GFP_KERNEL);
1758         if (state == NULL)
1759                 goto error;
1760
1761         state->config = config;
1762         state->i2c_adap = i2c_adap;
1763
1764         mb86a16_read(state, 0x7f, &dev_id);
1765         if (dev_id != 0xfe)
1766                 goto error;
1767
1768         memcpy(&state->frontend.ops, &mb86a16_ops, sizeof (struct dvb_frontend_ops));
1769         state->frontend.demodulator_priv = state;
1770         state->frontend.ops.set_voltage = state->config->set_voltage;
1771
1772         return &state->frontend;
1773 error:
1774         kfree(state);
1775         return NULL;
1776 }
1777 EXPORT_SYMBOL(mb86a16_attach);
1778 MODULE_LICENSE("GPL");
1779 MODULE_AUTHOR("Manu Abraham");