2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
21 #include <linux/module.h>
23 #include <linux/highmem.h>
27 #include "segment_descriptor.h"
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
33 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
34 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
42 static struct vmcs_descriptor {
48 #define VMX_SEGMENT_FIELD(seg) \
49 [VCPU_SREG_##seg] = { \
50 .selector = GUEST_##seg##_SELECTOR, \
51 .base = GUEST_##seg##_BASE, \
52 .limit = GUEST_##seg##_LIMIT, \
53 .ar_bytes = GUEST_##seg##_AR_BYTES, \
56 static struct kvm_vmx_segment_field {
61 } kvm_vmx_segment_fields[] = {
62 VMX_SEGMENT_FIELD(CS),
63 VMX_SEGMENT_FIELD(DS),
64 VMX_SEGMENT_FIELD(ES),
65 VMX_SEGMENT_FIELD(FS),
66 VMX_SEGMENT_FIELD(GS),
67 VMX_SEGMENT_FIELD(SS),
68 VMX_SEGMENT_FIELD(TR),
69 VMX_SEGMENT_FIELD(LDTR),
72 static const u32 vmx_msr_index[] = {
74 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
76 MSR_EFER, MSR_K6_STAR,
78 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
80 static inline int is_page_fault(u32 intr_info)
82 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
83 INTR_INFO_VALID_MASK)) ==
84 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
87 static inline int is_external_interrupt(u32 intr_info)
89 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
90 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
93 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
97 for (i = 0; i < vcpu->nmsrs; ++i)
98 if (vcpu->guest_msrs[i].index == msr)
99 return &vcpu->guest_msrs[i];
103 static void vmcs_clear(struct vmcs *vmcs)
105 u64 phys_addr = __pa(vmcs);
108 asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
109 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
112 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
116 static void __vcpu_clear(void *arg)
118 struct kvm_vcpu *vcpu = arg;
119 int cpu = raw_smp_processor_id();
121 if (vcpu->cpu == cpu)
122 vmcs_clear(vcpu->vmcs);
123 if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
124 per_cpu(current_vmcs, cpu) = NULL;
127 static unsigned long vmcs_readl(unsigned long field)
131 asm volatile (ASM_VMX_VMREAD_RDX_RAX
132 : "=a"(value) : "d"(field) : "cc");
136 static u16 vmcs_read16(unsigned long field)
138 return vmcs_readl(field);
141 static u32 vmcs_read32(unsigned long field)
143 return vmcs_readl(field);
146 static u64 vmcs_read64(unsigned long field)
149 return vmcs_readl(field);
151 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
155 static void vmcs_writel(unsigned long field, unsigned long value)
159 asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
160 : "=q"(error) : "a"(value), "d"(field) : "cc" );
162 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
163 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
166 static void vmcs_write16(unsigned long field, u16 value)
168 vmcs_writel(field, value);
171 static void vmcs_write32(unsigned long field, u32 value)
173 vmcs_writel(field, value);
176 static void vmcs_write64(unsigned long field, u64 value)
179 vmcs_writel(field, value);
181 vmcs_writel(field, value);
183 vmcs_writel(field+1, value >> 32);
188 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
189 * vcpu mutex is already taken.
191 static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu)
193 u64 phys_addr = __pa(vcpu->vmcs);
198 if (vcpu->cpu != cpu) {
199 smp_call_function(__vcpu_clear, vcpu, 0, 1);
203 if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
206 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
207 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
208 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
211 printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
212 vcpu->vmcs, phys_addr);
215 if (vcpu->cpu != cpu) {
216 struct descriptor_table dt;
217 unsigned long sysenter_esp;
221 * Linux uses per-cpu TSS and GDT, so set these when switching
224 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
226 vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */
228 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
229 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
234 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
239 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
241 return vmcs_readl(GUEST_RFLAGS);
244 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
246 vmcs_writel(GUEST_RFLAGS, rflags);
249 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
252 u32 interruptibility;
254 rip = vmcs_readl(GUEST_RIP);
255 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
256 vmcs_writel(GUEST_RIP, rip);
259 * We emulated an instruction, so temporary interrupt blocking
260 * should be removed, if set.
262 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
263 if (interruptibility & 3)
264 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
265 interruptibility & ~3);
266 vcpu->interrupt_window_open = 1;
269 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
271 printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
272 vmcs_readl(GUEST_RIP));
273 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
274 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
276 INTR_TYPE_EXCEPTION |
277 INTR_INFO_DELIEVER_CODE_MASK |
278 INTR_INFO_VALID_MASK);
282 * reads and returns guest's timestamp counter "register"
283 * guest_tsc = host_tsc + tsc_offset -- 21.3
285 static u64 guest_read_tsc(void)
287 u64 host_tsc, tsc_offset;
290 tsc_offset = vmcs_read64(TSC_OFFSET);
291 return host_tsc + tsc_offset;
295 * writes 'guest_tsc' into guest's timestamp counter "register"
296 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
298 static void guest_write_tsc(u64 guest_tsc)
303 vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
306 static void reload_tss(void)
308 #ifndef CONFIG_X86_64
311 * VT restores TR but not its size. Useless.
313 struct descriptor_table gdt;
314 struct segment_descriptor *descs;
317 descs = (void *)gdt.base;
318 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
324 * Reads an msr value (of 'msr_index') into 'pdata'.
325 * Returns 0 on success, non-0 otherwise.
326 * Assumes vcpu_load() was already called.
328 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
331 struct vmx_msr_entry *msr;
334 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
341 data = vmcs_readl(GUEST_FS_BASE);
344 data = vmcs_readl(GUEST_GS_BASE);
347 return kvm_get_msr_common(vcpu, msr_index, pdata);
349 case MSR_IA32_TIME_STAMP_COUNTER:
350 data = guest_read_tsc();
352 case MSR_IA32_SYSENTER_CS:
353 data = vmcs_read32(GUEST_SYSENTER_CS);
355 case MSR_IA32_SYSENTER_EIP:
356 data = vmcs_read32(GUEST_SYSENTER_EIP);
358 case MSR_IA32_SYSENTER_ESP:
359 data = vmcs_read32(GUEST_SYSENTER_ESP);
362 msr = find_msr_entry(vcpu, msr_index);
367 return kvm_get_msr_common(vcpu, msr_index, pdata);
375 * Writes msr value into into the appropriate "register".
376 * Returns 0 on success, non-0 otherwise.
377 * Assumes vcpu_load() was already called.
379 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
381 struct vmx_msr_entry *msr;
385 return kvm_set_msr_common(vcpu, msr_index, data);
387 vmcs_writel(GUEST_FS_BASE, data);
390 vmcs_writel(GUEST_GS_BASE, data);
393 case MSR_IA32_SYSENTER_CS:
394 vmcs_write32(GUEST_SYSENTER_CS, data);
396 case MSR_IA32_SYSENTER_EIP:
397 vmcs_write32(GUEST_SYSENTER_EIP, data);
399 case MSR_IA32_SYSENTER_ESP:
400 vmcs_write32(GUEST_SYSENTER_ESP, data);
402 case MSR_IA32_TIME_STAMP_COUNTER: {
403 guest_write_tsc(data);
407 msr = find_msr_entry(vcpu, msr_index);
412 return kvm_set_msr_common(vcpu, msr_index, data);
421 * Sync the rsp and rip registers into the vcpu structure. This allows
422 * registers to be accessed by indexing vcpu->regs.
424 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
426 vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
427 vcpu->rip = vmcs_readl(GUEST_RIP);
431 * Syncs rsp and rip back into the vmcs. Should be called after possible
434 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
436 vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
437 vmcs_writel(GUEST_RIP, vcpu->rip);
440 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
442 unsigned long dr7 = 0x400;
443 u32 exception_bitmap;
446 exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
447 old_singlestep = vcpu->guest_debug.singlestep;
449 vcpu->guest_debug.enabled = dbg->enabled;
450 if (vcpu->guest_debug.enabled) {
453 dr7 |= 0x200; /* exact */
454 for (i = 0; i < 4; ++i) {
455 if (!dbg->breakpoints[i].enabled)
457 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
458 dr7 |= 2 << (i*2); /* global enable */
459 dr7 |= 0 << (i*4+16); /* execution breakpoint */
462 exception_bitmap |= (1u << 1); /* Trap debug exceptions */
464 vcpu->guest_debug.singlestep = dbg->singlestep;
466 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
467 vcpu->guest_debug.singlestep = 0;
470 if (old_singlestep && !vcpu->guest_debug.singlestep) {
473 flags = vmcs_readl(GUEST_RFLAGS);
474 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
475 vmcs_writel(GUEST_RFLAGS, flags);
478 vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
479 vmcs_writel(GUEST_DR7, dr7);
484 static __init int cpu_has_kvm_support(void)
486 unsigned long ecx = cpuid_ecx(1);
487 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
490 static __init int vmx_disabled_by_bios(void)
494 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
495 return (msr & 5) == 1; /* locked but not enabled */
498 static __init void hardware_enable(void *garbage)
500 int cpu = raw_smp_processor_id();
501 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
504 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
506 /* enable and lock */
507 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
508 write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
509 asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
513 static void hardware_disable(void *garbage)
515 asm volatile (ASM_VMX_VMXOFF : : : "cc");
518 static __init void setup_vmcs_descriptor(void)
520 u32 vmx_msr_low, vmx_msr_high;
522 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
523 vmcs_descriptor.size = vmx_msr_high & 0x1fff;
524 vmcs_descriptor.order = get_order(vmcs_descriptor.size);
525 vmcs_descriptor.revision_id = vmx_msr_low;
528 static struct vmcs *alloc_vmcs_cpu(int cpu)
530 int node = cpu_to_node(cpu);
534 pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
537 vmcs = page_address(pages);
538 memset(vmcs, 0, vmcs_descriptor.size);
539 vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
543 static struct vmcs *alloc_vmcs(void)
545 return alloc_vmcs_cpu(raw_smp_processor_id());
548 static void free_vmcs(struct vmcs *vmcs)
550 free_pages((unsigned long)vmcs, vmcs_descriptor.order);
553 static __exit void free_kvm_area(void)
557 for_each_online_cpu(cpu)
558 free_vmcs(per_cpu(vmxarea, cpu));
561 extern struct vmcs *alloc_vmcs_cpu(int cpu);
563 static __init int alloc_kvm_area(void)
567 for_each_online_cpu(cpu) {
570 vmcs = alloc_vmcs_cpu(cpu);
576 per_cpu(vmxarea, cpu) = vmcs;
581 static __init int hardware_setup(void)
583 setup_vmcs_descriptor();
584 return alloc_kvm_area();
587 static __exit void hardware_unsetup(void)
592 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
594 if (vcpu->rmode.active)
595 vmcs_write32(EXCEPTION_BITMAP, ~0);
597 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
600 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
602 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
604 if (vmcs_readl(sf->base) == save->base) {
605 vmcs_write16(sf->selector, save->selector);
606 vmcs_writel(sf->base, save->base);
607 vmcs_write32(sf->limit, save->limit);
608 vmcs_write32(sf->ar_bytes, save->ar);
610 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
612 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
616 static void enter_pmode(struct kvm_vcpu *vcpu)
620 vcpu->rmode.active = 0;
622 vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
623 vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
624 vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
626 flags = vmcs_readl(GUEST_RFLAGS);
627 flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
628 flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
629 vmcs_writel(GUEST_RFLAGS, flags);
631 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
632 (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
634 update_exception_bitmap(vcpu);
636 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
637 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
638 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
639 fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
641 vmcs_write16(GUEST_SS_SELECTOR, 0);
642 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
644 vmcs_write16(GUEST_CS_SELECTOR,
645 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
646 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
649 static int rmode_tss_base(struct kvm* kvm)
651 gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
652 return base_gfn << PAGE_SHIFT;
655 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
657 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
659 save->selector = vmcs_read16(sf->selector);
660 save->base = vmcs_readl(sf->base);
661 save->limit = vmcs_read32(sf->limit);
662 save->ar = vmcs_read32(sf->ar_bytes);
663 vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
664 vmcs_write32(sf->limit, 0xffff);
665 vmcs_write32(sf->ar_bytes, 0xf3);
668 static void enter_rmode(struct kvm_vcpu *vcpu)
672 vcpu->rmode.active = 1;
674 vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
675 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
677 vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
678 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
680 vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
681 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
683 flags = vmcs_readl(GUEST_RFLAGS);
684 vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
686 flags |= IOPL_MASK | X86_EFLAGS_VM;
688 vmcs_writel(GUEST_RFLAGS, flags);
689 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
690 update_exception_bitmap(vcpu);
692 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
693 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
694 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
696 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
697 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
698 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
700 fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
701 fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
702 fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
703 fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
708 static void enter_lmode(struct kvm_vcpu *vcpu)
712 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
713 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
714 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
716 vmcs_write32(GUEST_TR_AR_BYTES,
717 (guest_tr_ar & ~AR_TYPE_MASK)
718 | AR_TYPE_BUSY_64_TSS);
721 vcpu->shadow_efer |= EFER_LMA;
723 find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
724 vmcs_write32(VM_ENTRY_CONTROLS,
725 vmcs_read32(VM_ENTRY_CONTROLS)
726 | VM_ENTRY_CONTROLS_IA32E_MASK);
729 static void exit_lmode(struct kvm_vcpu *vcpu)
731 vcpu->shadow_efer &= ~EFER_LMA;
733 vmcs_write32(VM_ENTRY_CONTROLS,
734 vmcs_read32(VM_ENTRY_CONTROLS)
735 & ~VM_ENTRY_CONTROLS_IA32E_MASK);
740 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
742 vcpu->cr0 &= KVM_GUEST_CR0_MASK;
743 vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
745 vcpu->cr4 &= KVM_GUEST_CR4_MASK;
746 vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
749 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
751 if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
754 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
758 if (vcpu->shadow_efer & EFER_LME) {
759 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
761 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
766 vmcs_writel(CR0_READ_SHADOW, cr0);
767 vmcs_writel(GUEST_CR0,
768 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
773 * Used when restoring the VM to avoid corrupting segment registers
775 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
777 vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
778 update_exception_bitmap(vcpu);
779 vmcs_writel(CR0_READ_SHADOW, cr0);
780 vmcs_writel(GUEST_CR0,
781 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
785 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
787 vmcs_writel(GUEST_CR3, cr3);
790 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
792 vmcs_writel(CR4_READ_SHADOW, cr4);
793 vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
794 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
800 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
802 struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
804 vcpu->shadow_efer = efer;
805 if (efer & EFER_LMA) {
806 vmcs_write32(VM_ENTRY_CONTROLS,
807 vmcs_read32(VM_ENTRY_CONTROLS) |
808 VM_ENTRY_CONTROLS_IA32E_MASK);
812 vmcs_write32(VM_ENTRY_CONTROLS,
813 vmcs_read32(VM_ENTRY_CONTROLS) &
814 ~VM_ENTRY_CONTROLS_IA32E_MASK);
816 msr->data = efer & ~EFER_LME;
822 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
824 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
826 return vmcs_readl(sf->base);
829 static void vmx_get_segment(struct kvm_vcpu *vcpu,
830 struct kvm_segment *var, int seg)
832 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
835 var->base = vmcs_readl(sf->base);
836 var->limit = vmcs_read32(sf->limit);
837 var->selector = vmcs_read16(sf->selector);
838 ar = vmcs_read32(sf->ar_bytes);
839 if (ar & AR_UNUSABLE_MASK)
842 var->s = (ar >> 4) & 1;
843 var->dpl = (ar >> 5) & 3;
844 var->present = (ar >> 7) & 1;
845 var->avl = (ar >> 12) & 1;
846 var->l = (ar >> 13) & 1;
847 var->db = (ar >> 14) & 1;
848 var->g = (ar >> 15) & 1;
849 var->unusable = (ar >> 16) & 1;
852 static void vmx_set_segment(struct kvm_vcpu *vcpu,
853 struct kvm_segment *var, int seg)
855 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
858 vmcs_writel(sf->base, var->base);
859 vmcs_write32(sf->limit, var->limit);
860 vmcs_write16(sf->selector, var->selector);
865 ar |= (var->s & 1) << 4;
866 ar |= (var->dpl & 3) << 5;
867 ar |= (var->present & 1) << 7;
868 ar |= (var->avl & 1) << 12;
869 ar |= (var->l & 1) << 13;
870 ar |= (var->db & 1) << 14;
871 ar |= (var->g & 1) << 15;
873 if (ar == 0) /* a 0 value means unusable */
874 ar = AR_UNUSABLE_MASK;
875 vmcs_write32(sf->ar_bytes, ar);
878 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
880 u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
882 *db = (ar >> 14) & 1;
886 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
888 dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
889 dt->base = vmcs_readl(GUEST_IDTR_BASE);
892 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
894 vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
895 vmcs_writel(GUEST_IDTR_BASE, dt->base);
898 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
900 dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
901 dt->base = vmcs_readl(GUEST_GDTR_BASE);
904 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
906 vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
907 vmcs_writel(GUEST_GDTR_BASE, dt->base);
910 static int init_rmode_tss(struct kvm* kvm)
912 struct page *p1, *p2, *p3;
913 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
916 p1 = _gfn_to_page(kvm, fn++);
917 p2 = _gfn_to_page(kvm, fn++);
918 p3 = _gfn_to_page(kvm, fn);
920 if (!p1 || !p2 || !p3) {
921 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
925 page = kmap_atomic(p1, KM_USER0);
926 memset(page, 0, PAGE_SIZE);
927 *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
928 kunmap_atomic(page, KM_USER0);
930 page = kmap_atomic(p2, KM_USER0);
931 memset(page, 0, PAGE_SIZE);
932 kunmap_atomic(page, KM_USER0);
934 page = kmap_atomic(p3, KM_USER0);
935 memset(page, 0, PAGE_SIZE);
936 *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
937 kunmap_atomic(page, KM_USER0);
942 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
944 u32 msr_high, msr_low;
946 rdmsr(msr, msr_low, msr_high);
950 vmcs_write32(vmcs_field, val);
953 static void seg_setup(int seg)
955 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
957 vmcs_write16(sf->selector, 0);
958 vmcs_writel(sf->base, 0);
959 vmcs_write32(sf->limit, 0xffff);
960 vmcs_write32(sf->ar_bytes, 0x93);
964 * Sets up the vmcs for emulated real mode.
966 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
968 u32 host_sysenter_cs;
971 struct descriptor_table dt;
975 extern asmlinkage void kvm_vmx_return(void);
977 if (!init_rmode_tss(vcpu->kvm)) {
982 memset(vcpu->regs, 0, sizeof(vcpu->regs));
983 vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
985 vcpu->apic_base = 0xfee00000 |
986 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
987 MSR_IA32_APICBASE_ENABLE;
992 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
993 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
995 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
996 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
997 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
998 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1000 seg_setup(VCPU_SREG_DS);
1001 seg_setup(VCPU_SREG_ES);
1002 seg_setup(VCPU_SREG_FS);
1003 seg_setup(VCPU_SREG_GS);
1004 seg_setup(VCPU_SREG_SS);
1006 vmcs_write16(GUEST_TR_SELECTOR, 0);
1007 vmcs_writel(GUEST_TR_BASE, 0);
1008 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1009 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1011 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1012 vmcs_writel(GUEST_LDTR_BASE, 0);
1013 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1014 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1016 vmcs_write32(GUEST_SYSENTER_CS, 0);
1017 vmcs_writel(GUEST_SYSENTER_ESP, 0);
1018 vmcs_writel(GUEST_SYSENTER_EIP, 0);
1020 vmcs_writel(GUEST_RFLAGS, 0x02);
1021 vmcs_writel(GUEST_RIP, 0xfff0);
1022 vmcs_writel(GUEST_RSP, 0);
1024 vmcs_writel(GUEST_CR3, 0);
1026 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1027 vmcs_writel(GUEST_DR7, 0x400);
1029 vmcs_writel(GUEST_GDTR_BASE, 0);
1030 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1032 vmcs_writel(GUEST_IDTR_BASE, 0);
1033 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1035 vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1036 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1037 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1040 vmcs_write64(IO_BITMAP_A, 0);
1041 vmcs_write64(IO_BITMAP_B, 0);
1045 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1047 /* Special registers */
1048 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1051 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1052 PIN_BASED_VM_EXEC_CONTROL,
1053 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
1054 | PIN_BASED_NMI_EXITING /* 20.6.1 */
1056 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1057 CPU_BASED_VM_EXEC_CONTROL,
1058 CPU_BASED_HLT_EXITING /* 20.6.2 */
1059 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
1060 | CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
1061 | CPU_BASED_UNCOND_IO_EXITING /* 20.6.2 */
1062 | CPU_BASED_MOV_DR_EXITING
1063 | CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
1066 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1067 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1068 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1069 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
1071 vmcs_writel(HOST_CR0, read_cr0()); /* 22.2.3 */
1072 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
1073 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1075 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
1076 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1077 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1078 vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
1079 vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
1080 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1081 #ifdef CONFIG_X86_64
1082 rdmsrl(MSR_FS_BASE, a);
1083 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1084 rdmsrl(MSR_GS_BASE, a);
1085 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1087 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1088 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1091 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
1094 vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */
1097 vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1099 rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1100 vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1101 rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1102 vmcs_writel(HOST_IA32_SYSENTER_ESP, a); /* 22.2.3 */
1103 rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1104 vmcs_writel(HOST_IA32_SYSENTER_EIP, a); /* 22.2.3 */
1106 for (i = 0; i < NR_VMX_MSR; ++i) {
1107 u32 index = vmx_msr_index[i];
1108 u32 data_low, data_high;
1110 int j = vcpu->nmsrs;
1112 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1114 data = data_low | ((u64)data_high << 32);
1115 vcpu->host_msrs[j].index = index;
1116 vcpu->host_msrs[j].reserved = 0;
1117 vcpu->host_msrs[j].data = data;
1118 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1121 printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1123 nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1124 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1125 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1126 vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1127 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1128 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1129 virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1130 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1131 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
1132 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1133 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1134 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1137 /* 22.2.1, 20.8.1 */
1138 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1139 VM_ENTRY_CONTROLS, 0);
1140 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
1142 #ifdef CONFIG_X86_64
1143 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1144 vmcs_writel(TPR_THRESHOLD, 0);
1147 vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1148 vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1150 vcpu->cr0 = 0x60000010;
1151 vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1152 vmx_set_cr4(vcpu, 0);
1153 #ifdef CONFIG_X86_64
1154 vmx_set_efer(vcpu, 0);
1163 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1168 unsigned long flags;
1169 unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1170 u16 sp = vmcs_readl(GUEST_RSP);
1171 u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1173 if (sp > ss_limit || sp - 6 > sp) {
1174 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1176 vmcs_readl(GUEST_RSP),
1177 vmcs_readl(GUEST_SS_BASE),
1178 vmcs_read32(GUEST_SS_LIMIT));
1182 if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1184 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1188 flags = vmcs_readl(GUEST_RFLAGS);
1189 cs = vmcs_readl(GUEST_CS_BASE) >> 4;
1190 ip = vmcs_readl(GUEST_RIP);
1193 if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1194 kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1195 kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1196 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1200 vmcs_writel(GUEST_RFLAGS, flags &
1201 ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1202 vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1203 vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1204 vmcs_writel(GUEST_RIP, ent[0]);
1205 vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1208 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1210 int word_index = __ffs(vcpu->irq_summary);
1211 int bit_index = __ffs(vcpu->irq_pending[word_index]);
1212 int irq = word_index * BITS_PER_LONG + bit_index;
1214 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1215 if (!vcpu->irq_pending[word_index])
1216 clear_bit(word_index, &vcpu->irq_summary);
1218 if (vcpu->rmode.active) {
1219 inject_rmode_irq(vcpu, irq);
1222 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1223 irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1227 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1228 struct kvm_run *kvm_run)
1230 u32 cpu_based_vm_exec_control;
1232 vcpu->interrupt_window_open =
1233 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1234 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1236 if (vcpu->interrupt_window_open &&
1237 vcpu->irq_summary &&
1238 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1240 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1242 kvm_do_inject_irq(vcpu);
1244 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1245 if (!vcpu->interrupt_window_open &&
1246 (vcpu->irq_summary || kvm_run->request_interrupt_window))
1248 * Interrupts blocked. Wait for unblock.
1250 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1252 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1253 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1256 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1258 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1260 set_debugreg(dbg->bp[0], 0);
1261 set_debugreg(dbg->bp[1], 1);
1262 set_debugreg(dbg->bp[2], 2);
1263 set_debugreg(dbg->bp[3], 3);
1265 if (dbg->singlestep) {
1266 unsigned long flags;
1268 flags = vmcs_readl(GUEST_RFLAGS);
1269 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1270 vmcs_writel(GUEST_RFLAGS, flags);
1274 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1275 int vec, u32 err_code)
1277 if (!vcpu->rmode.active)
1280 if (vec == GP_VECTOR && err_code == 0)
1281 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1286 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1288 u32 intr_info, error_code;
1289 unsigned long cr2, rip;
1291 enum emulation_result er;
1294 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1295 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1297 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1298 !is_page_fault(intr_info)) {
1299 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1300 "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1303 if (is_external_interrupt(vect_info)) {
1304 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1305 set_bit(irq, vcpu->irq_pending);
1306 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1309 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1314 rip = vmcs_readl(GUEST_RIP);
1315 if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1316 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1317 if (is_page_fault(intr_info)) {
1318 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1320 spin_lock(&vcpu->kvm->lock);
1321 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1323 spin_unlock(&vcpu->kvm->lock);
1327 spin_unlock(&vcpu->kvm->lock);
1331 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1332 spin_unlock(&vcpu->kvm->lock);
1337 case EMULATE_DO_MMIO:
1338 ++kvm_stat.mmio_exits;
1339 kvm_run->exit_reason = KVM_EXIT_MMIO;
1342 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1349 if (vcpu->rmode.active &&
1350 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1354 if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1355 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1358 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1359 kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1360 kvm_run->ex.error_code = error_code;
1364 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1365 struct kvm_run *kvm_run)
1367 ++kvm_stat.irq_exits;
1372 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1379 if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1382 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1384 countr_size = (cs_ar & AR_L_MASK) ? 8:
1385 (cs_ar & AR_DB_MASK) ? 4: 2;
1388 rip = vmcs_readl(GUEST_RIP);
1389 if (countr_size != 8)
1390 rip += vmcs_readl(GUEST_CS_BASE);
1392 n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1394 for (i = 0; i < n; i++) {
1395 switch (((u8*)&inst)[i]) {
1408 countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1416 *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1420 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1422 u64 exit_qualification;
1424 ++kvm_stat.io_exits;
1425 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1426 kvm_run->exit_reason = KVM_EXIT_IO;
1427 if (exit_qualification & 8)
1428 kvm_run->io.direction = KVM_EXIT_IO_IN;
1430 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1431 kvm_run->io.size = (exit_qualification & 7) + 1;
1432 kvm_run->io.string = (exit_qualification & 16) != 0;
1433 kvm_run->io.string_down
1434 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1435 kvm_run->io.rep = (exit_qualification & 32) != 0;
1436 kvm_run->io.port = exit_qualification >> 16;
1437 if (kvm_run->io.string) {
1438 if (!get_io_count(vcpu, &kvm_run->io.count))
1440 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1442 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1446 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1448 u64 exit_qualification;
1452 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1453 cr = exit_qualification & 15;
1454 reg = (exit_qualification >> 8) & 15;
1455 switch ((exit_qualification >> 4) & 3) {
1456 case 0: /* mov to cr */
1459 vcpu_load_rsp_rip(vcpu);
1460 set_cr0(vcpu, vcpu->regs[reg]);
1461 skip_emulated_instruction(vcpu);
1464 vcpu_load_rsp_rip(vcpu);
1465 set_cr3(vcpu, vcpu->regs[reg]);
1466 skip_emulated_instruction(vcpu);
1469 vcpu_load_rsp_rip(vcpu);
1470 set_cr4(vcpu, vcpu->regs[reg]);
1471 skip_emulated_instruction(vcpu);
1474 vcpu_load_rsp_rip(vcpu);
1475 set_cr8(vcpu, vcpu->regs[reg]);
1476 skip_emulated_instruction(vcpu);
1480 case 1: /*mov from cr*/
1483 vcpu_load_rsp_rip(vcpu);
1484 vcpu->regs[reg] = vcpu->cr3;
1485 vcpu_put_rsp_rip(vcpu);
1486 skip_emulated_instruction(vcpu);
1489 printk(KERN_DEBUG "handle_cr: read CR8 "
1490 "cpu erratum AA15\n");
1491 vcpu_load_rsp_rip(vcpu);
1492 vcpu->regs[reg] = vcpu->cr8;
1493 vcpu_put_rsp_rip(vcpu);
1494 skip_emulated_instruction(vcpu);
1499 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1501 skip_emulated_instruction(vcpu);
1506 kvm_run->exit_reason = 0;
1507 printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1508 (int)(exit_qualification >> 4) & 3, cr);
1512 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1514 u64 exit_qualification;
1519 * FIXME: this code assumes the host is debugging the guest.
1520 * need to deal with guest debugging itself too.
1522 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1523 dr = exit_qualification & 7;
1524 reg = (exit_qualification >> 8) & 15;
1525 vcpu_load_rsp_rip(vcpu);
1526 if (exit_qualification & 16) {
1538 vcpu->regs[reg] = val;
1542 vcpu_put_rsp_rip(vcpu);
1543 skip_emulated_instruction(vcpu);
1547 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1549 kvm_run->exit_reason = KVM_EXIT_CPUID;
1553 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1555 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1558 if (vmx_get_msr(vcpu, ecx, &data)) {
1559 vmx_inject_gp(vcpu, 0);
1563 /* FIXME: handling of bits 32:63 of rax, rdx */
1564 vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1565 vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1566 skip_emulated_instruction(vcpu);
1570 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1572 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1573 u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1574 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1576 if (vmx_set_msr(vcpu, ecx, data) != 0) {
1577 vmx_inject_gp(vcpu, 0);
1581 skip_emulated_instruction(vcpu);
1585 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1586 struct kvm_run *kvm_run)
1588 kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1589 kvm_run->cr8 = vcpu->cr8;
1590 kvm_run->apic_base = vcpu->apic_base;
1591 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1592 vcpu->irq_summary == 0);
1595 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1596 struct kvm_run *kvm_run)
1599 * If the user space waits to inject interrupts, exit as soon as
1602 if (kvm_run->request_interrupt_window &&
1603 !vcpu->irq_summary &&
1604 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF)) {
1605 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1606 ++kvm_stat.irq_window_exits;
1612 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1614 skip_emulated_instruction(vcpu);
1615 if (vcpu->irq_summary)
1618 kvm_run->exit_reason = KVM_EXIT_HLT;
1619 ++kvm_stat.halt_exits;
1624 * The exit handlers return 1 if the exit was handled fully and guest execution
1625 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1626 * to be done to userspace and return 0.
1628 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1629 struct kvm_run *kvm_run) = {
1630 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
1631 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
1632 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
1633 [EXIT_REASON_CR_ACCESS] = handle_cr,
1634 [EXIT_REASON_DR_ACCESS] = handle_dr,
1635 [EXIT_REASON_CPUID] = handle_cpuid,
1636 [EXIT_REASON_MSR_READ] = handle_rdmsr,
1637 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
1638 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
1639 [EXIT_REASON_HLT] = handle_halt,
1642 static const int kvm_vmx_max_exit_handlers =
1643 sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1646 * The guest has exited. See if we can fix it or if we need userspace
1649 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1651 u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1652 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1654 if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1655 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1656 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1657 "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1658 kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1659 if (exit_reason < kvm_vmx_max_exit_handlers
1660 && kvm_vmx_exit_handlers[exit_reason])
1661 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1663 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1664 kvm_run->hw.hardware_exit_reason = exit_reason;
1670 * Check if userspace requested an interrupt window, and that the
1671 * interrupt window is open.
1673 * No need to exit to userspace if we already have an interrupt queued.
1675 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1676 struct kvm_run *kvm_run)
1678 return (!vcpu->irq_summary &&
1679 kvm_run->request_interrupt_window &&
1680 vcpu->interrupt_window_open &&
1681 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1684 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1687 u16 fs_sel, gs_sel, ldt_sel;
1688 int fs_gs_ldt_reload_needed;
1693 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1694 * allow segment selectors with cpl > 0 or ti == 1.
1698 ldt_sel = read_ldt();
1699 fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1700 if (!fs_gs_ldt_reload_needed) {
1701 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1702 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1704 vmcs_write16(HOST_FS_SELECTOR, 0);
1705 vmcs_write16(HOST_GS_SELECTOR, 0);
1708 #ifdef CONFIG_X86_64
1709 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1710 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1712 vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1713 vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1716 do_interrupt_requests(vcpu, kvm_run);
1718 if (vcpu->guest_debug.enabled)
1719 kvm_guest_debug_pre(vcpu);
1721 fx_save(vcpu->host_fx_image);
1722 fx_restore(vcpu->guest_fx_image);
1724 save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1725 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1728 /* Store host registers */
1730 #ifdef CONFIG_X86_64
1731 "push %%rax; push %%rbx; push %%rdx;"
1732 "push %%rsi; push %%rdi; push %%rbp;"
1733 "push %%r8; push %%r9; push %%r10; push %%r11;"
1734 "push %%r12; push %%r13; push %%r14; push %%r15;"
1736 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1738 "pusha; push %%ecx \n\t"
1739 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1741 /* Check if vmlaunch of vmresume is needed */
1743 /* Load guest registers. Don't clobber flags. */
1744 #ifdef CONFIG_X86_64
1745 "mov %c[cr2](%3), %%rax \n\t"
1746 "mov %%rax, %%cr2 \n\t"
1747 "mov %c[rax](%3), %%rax \n\t"
1748 "mov %c[rbx](%3), %%rbx \n\t"
1749 "mov %c[rdx](%3), %%rdx \n\t"
1750 "mov %c[rsi](%3), %%rsi \n\t"
1751 "mov %c[rdi](%3), %%rdi \n\t"
1752 "mov %c[rbp](%3), %%rbp \n\t"
1753 "mov %c[r8](%3), %%r8 \n\t"
1754 "mov %c[r9](%3), %%r9 \n\t"
1755 "mov %c[r10](%3), %%r10 \n\t"
1756 "mov %c[r11](%3), %%r11 \n\t"
1757 "mov %c[r12](%3), %%r12 \n\t"
1758 "mov %c[r13](%3), %%r13 \n\t"
1759 "mov %c[r14](%3), %%r14 \n\t"
1760 "mov %c[r15](%3), %%r15 \n\t"
1761 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1763 "mov %c[cr2](%3), %%eax \n\t"
1764 "mov %%eax, %%cr2 \n\t"
1765 "mov %c[rax](%3), %%eax \n\t"
1766 "mov %c[rbx](%3), %%ebx \n\t"
1767 "mov %c[rdx](%3), %%edx \n\t"
1768 "mov %c[rsi](%3), %%esi \n\t"
1769 "mov %c[rdi](%3), %%edi \n\t"
1770 "mov %c[rbp](%3), %%ebp \n\t"
1771 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1773 /* Enter guest mode */
1775 ASM_VMX_VMLAUNCH "\n\t"
1776 "jmp kvm_vmx_return \n\t"
1777 "launched: " ASM_VMX_VMRESUME "\n\t"
1778 ".globl kvm_vmx_return \n\t"
1780 /* Save guest registers, load host registers, keep flags */
1781 #ifdef CONFIG_X86_64
1782 "xchg %3, 0(%%rsp) \n\t"
1783 "mov %%rax, %c[rax](%3) \n\t"
1784 "mov %%rbx, %c[rbx](%3) \n\t"
1785 "pushq 0(%%rsp); popq %c[rcx](%3) \n\t"
1786 "mov %%rdx, %c[rdx](%3) \n\t"
1787 "mov %%rsi, %c[rsi](%3) \n\t"
1788 "mov %%rdi, %c[rdi](%3) \n\t"
1789 "mov %%rbp, %c[rbp](%3) \n\t"
1790 "mov %%r8, %c[r8](%3) \n\t"
1791 "mov %%r9, %c[r9](%3) \n\t"
1792 "mov %%r10, %c[r10](%3) \n\t"
1793 "mov %%r11, %c[r11](%3) \n\t"
1794 "mov %%r12, %c[r12](%3) \n\t"
1795 "mov %%r13, %c[r13](%3) \n\t"
1796 "mov %%r14, %c[r14](%3) \n\t"
1797 "mov %%r15, %c[r15](%3) \n\t"
1798 "mov %%cr2, %%rax \n\t"
1799 "mov %%rax, %c[cr2](%3) \n\t"
1800 "mov 0(%%rsp), %3 \n\t"
1802 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1803 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1804 "pop %%rbp; pop %%rdi; pop %%rsi;"
1805 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1807 "xchg %3, 0(%%esp) \n\t"
1808 "mov %%eax, %c[rax](%3) \n\t"
1809 "mov %%ebx, %c[rbx](%3) \n\t"
1810 "pushl 0(%%esp); popl %c[rcx](%3) \n\t"
1811 "mov %%edx, %c[rdx](%3) \n\t"
1812 "mov %%esi, %c[rsi](%3) \n\t"
1813 "mov %%edi, %c[rdi](%3) \n\t"
1814 "mov %%ebp, %c[rbp](%3) \n\t"
1815 "mov %%cr2, %%eax \n\t"
1816 "mov %%eax, %c[cr2](%3) \n\t"
1817 "mov 0(%%esp), %3 \n\t"
1819 "pop %%ecx; popa \n\t"
1824 : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1826 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1827 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1828 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1829 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1830 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1831 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1832 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1833 #ifdef CONFIG_X86_64
1834 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1835 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1836 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1837 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1838 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1839 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1840 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1841 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1843 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1848 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1849 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1851 fx_save(vcpu->guest_fx_image);
1852 fx_restore(vcpu->host_fx_image);
1853 vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1855 #ifndef CONFIG_X86_64
1856 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1859 kvm_run->exit_type = 0;
1861 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1862 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1865 if (fs_gs_ldt_reload_needed) {
1869 * If we have to reload gs, we must take care to
1870 * preserve our gs base.
1872 local_irq_disable();
1874 #ifdef CONFIG_X86_64
1875 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1882 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1883 r = kvm_handle_exit(kvm_run, vcpu);
1885 /* Give scheduler a change to reschedule. */
1886 if (signal_pending(current)) {
1887 ++kvm_stat.signal_exits;
1888 post_kvm_run_save(vcpu, kvm_run);
1892 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1893 ++kvm_stat.request_irq_exits;
1894 post_kvm_run_save(vcpu, kvm_run);
1903 post_kvm_run_save(vcpu, kvm_run);
1907 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1909 vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1912 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1916 u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1918 ++kvm_stat.pf_guest;
1920 if (is_page_fault(vect_info)) {
1921 printk(KERN_DEBUG "inject_page_fault: "
1922 "double fault 0x%lx @ 0x%lx\n",
1923 addr, vmcs_readl(GUEST_RIP));
1924 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1925 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1927 INTR_TYPE_EXCEPTION |
1928 INTR_INFO_DELIEVER_CODE_MASK |
1929 INTR_INFO_VALID_MASK);
1933 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1934 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1936 INTR_TYPE_EXCEPTION |
1937 INTR_INFO_DELIEVER_CODE_MASK |
1938 INTR_INFO_VALID_MASK);
1942 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1945 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1946 free_vmcs(vcpu->vmcs);
1951 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
1953 vmx_free_vmcs(vcpu);
1956 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
1960 vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1961 if (!vcpu->guest_msrs)
1964 vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1965 if (!vcpu->host_msrs)
1966 goto out_free_guest_msrs;
1968 vmcs = alloc_vmcs();
1979 kfree(vcpu->host_msrs);
1980 vcpu->host_msrs = NULL;
1982 out_free_guest_msrs:
1983 kfree(vcpu->guest_msrs);
1984 vcpu->guest_msrs = NULL;
1989 static struct kvm_arch_ops vmx_arch_ops = {
1990 .cpu_has_kvm_support = cpu_has_kvm_support,
1991 .disabled_by_bios = vmx_disabled_by_bios,
1992 .hardware_setup = hardware_setup,
1993 .hardware_unsetup = hardware_unsetup,
1994 .hardware_enable = hardware_enable,
1995 .hardware_disable = hardware_disable,
1997 .vcpu_create = vmx_create_vcpu,
1998 .vcpu_free = vmx_free_vcpu,
2000 .vcpu_load = vmx_vcpu_load,
2001 .vcpu_put = vmx_vcpu_put,
2003 .set_guest_debug = set_guest_debug,
2004 .get_msr = vmx_get_msr,
2005 .set_msr = vmx_set_msr,
2006 .get_segment_base = vmx_get_segment_base,
2007 .get_segment = vmx_get_segment,
2008 .set_segment = vmx_set_segment,
2009 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2010 .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2011 .set_cr0 = vmx_set_cr0,
2012 .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
2013 .set_cr3 = vmx_set_cr3,
2014 .set_cr4 = vmx_set_cr4,
2015 #ifdef CONFIG_X86_64
2016 .set_efer = vmx_set_efer,
2018 .get_idt = vmx_get_idt,
2019 .set_idt = vmx_set_idt,
2020 .get_gdt = vmx_get_gdt,
2021 .set_gdt = vmx_set_gdt,
2022 .cache_regs = vcpu_load_rsp_rip,
2023 .decache_regs = vcpu_put_rsp_rip,
2024 .get_rflags = vmx_get_rflags,
2025 .set_rflags = vmx_set_rflags,
2027 .tlb_flush = vmx_flush_tlb,
2028 .inject_page_fault = vmx_inject_page_fault,
2030 .inject_gp = vmx_inject_gp,
2032 .run = vmx_vcpu_run,
2033 .skip_emulated_instruction = skip_emulated_instruction,
2034 .vcpu_setup = vmx_vcpu_setup,
2037 static int __init vmx_init(void)
2039 return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2042 static void __exit vmx_exit(void)
2047 module_init(vmx_init)
2048 module_exit(vmx_exit)