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   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <rdma/ib_mad.h>
  35 #include <rdma/ib_user_verbs.h>
  36 #include <linux/io.h>
  37 #include <linux/utsname.h>
  38
  39 #include "ipath_kernel.h"
  40 #include "ipath_verbs.h"
  41 #include "ipath_common.h"
  42
  43 static unsigned int ib_ipath_qp_table_size = 251;
  44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
  45 MODULE_PARM_DESC(qp_table_size, "QP table size");
  46
  47 unsigned int ib_ipath_lkey_table_size = 12;
  48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
  49                    S_IRUGO);
  50 MODULE_PARM_DESC(lkey_table_size,
  51                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
  52
  53 static unsigned int ib_ipath_max_pds = 0xFFFF;
  54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
  55 MODULE_PARM_DESC(max_pds,
  56                  "Maximum number of protection domains to support");
  57
  58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
  59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
  60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  61
  62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
  63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
  64 MODULE_PARM_DESC(max_cqes,
  65                  "Maximum number of completion queue entries to support");
  66
  67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
  68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
  69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  70
  71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
  72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
  73                    S_IWUSR | S_IRUGO);
  74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  75
  76 unsigned int ib_ipath_max_qps = 16384;
  77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
  78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
  79
  80 unsigned int ib_ipath_max_sges = 0x60;
  81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
  82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
  83
  84 unsigned int ib_ipath_max_mcast_grps = 16384;
  85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
  86                    S_IWUSR | S_IRUGO);
  87 MODULE_PARM_DESC(max_mcast_grps,
  88                  "Maximum number of multicast groups to support");
  89
  90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
  91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
  92                    uint, S_IWUSR | S_IRUGO);
  93 MODULE_PARM_DESC(max_mcast_qp_attached,
  94                  "Maximum number of attached QPs to support");
  95
  96 unsigned int ib_ipath_max_srqs = 1024;
  97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
  98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
  99
 100 unsigned int ib_ipath_max_srq_sges = 128;
 101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
 102                    uint, S_IWUSR | S_IRUGO);
 103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
 104
 105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
 106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
 107                    uint, S_IWUSR | S_IRUGO);
 108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
 109
 110 static unsigned int ib_ipath_disable_sma;
 111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
 112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
 113
 114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
 115         [IB_QPS_RESET] = 0,
 116         [IB_QPS_INIT] = IPATH_POST_RECV_OK,
 117         [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
 118         [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
 119             IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
 120         [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
 121             IPATH_POST_SEND_OK,
 122         [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
 123         [IB_QPS_ERR] = 0,
 124 };
 125
 126 struct ipath_ucontext {
 127         struct ib_ucontext ibucontext;
 128 };
 129
 130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
 131                                                   *ibucontext)
 132 {
 133         return container_of(ibucontext, struct ipath_ucontext, ibucontext);
 134 }
 135
 136 /*
 137  * Translate ib_wr_opcode into ib_wc_opcode.
 138  */
 139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
 140         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 141         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
 142         [IB_WR_SEND] = IB_WC_SEND,
 143         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
 144         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
 145         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
 146         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
 147 };
 148
 149 /*
 150  * System image GUID.
 151  */
 152 static __be64 sys_image_guid;
 153
 154 /**
 155  * ipath_copy_sge - copy data to SGE memory
 156  * @ss: the SGE state
 157  * @data: the data to copy
 158  * @length: the length of the data
 159  */
 160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
 161 {
 162         struct ipath_sge *sge = &ss->sge;
 163
 164         while (length) {
 165                 u32 len = sge->length;
 166
 167                 if (len > length)
 168                         len = length;
 169                 if (len > sge->sge_length)
 170                         len = sge->sge_length;
 171                 BUG_ON(len == 0);
 172                 memcpy(sge->vaddr, data, len);
 173                 sge->vaddr += len;
 174                 sge->length -= len;
 175                 sge->sge_length -= len;
 176                 if (sge->sge_length == 0) {
 177                         if (--ss->num_sge)
 178                                 *sge = *ss->sg_list++;
 179                 } else if (sge->length == 0 && sge->mr != NULL) {
 180                         if (++sge->n >= IPATH_SEGSZ) {
 181                                 if (++sge->m >= sge->mr->mapsz)
 182                                         break;
 183                                 sge->n = 0;
 184                         }
 185                         sge->vaddr =
 186                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 187                         sge->length =
 188                                 sge->mr->map[sge->m]->segs[sge->n].length;
 189                 }
 190                 data += len;
 191                 length -= len;
 192         }
 193 }
 194
 195 /**
 196  * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
 197  * @ss: the SGE state
 198  * @length: the number of bytes to skip
 199  */
 200 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
 201 {
 202         struct ipath_sge *sge = &ss->sge;
 203
 204         while (length) {
 205                 u32 len = sge->length;
 206
 207                 if (len > length)
 208                         len = length;
 209                 if (len > sge->sge_length)
 210                         len = sge->sge_length;
 211                 BUG_ON(len == 0);
 212                 sge->vaddr += len;
 213                 sge->length -= len;
 214                 sge->sge_length -= len;
 215                 if (sge->sge_length == 0) {
 216                         if (--ss->num_sge)
 217                                 *sge = *ss->sg_list++;
 218                 } else if (sge->length == 0 && sge->mr != NULL) {
 219                         if (++sge->n >= IPATH_SEGSZ) {
 220                                 if (++sge->m >= sge->mr->mapsz)
 221                                         break;
 222                                 sge->n = 0;
 223                         }
 224                         sge->vaddr =
 225                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 226                         sge->length =
 227                                 sge->mr->map[sge->m]->segs[sge->n].length;
 228                 }
 229                 length -= len;
 230         }
 231 }
 232
 233 static void ipath_flush_wqe(struct ipath_qp *qp, struct ib_send_wr *wr)
 234 {
 235         struct ib_wc wc;
 236
 237         memset(&wc, 0, sizeof(wc));
 238         wc.wr_id = wr->wr_id;
 239         wc.status = IB_WC_WR_FLUSH_ERR;
 240         wc.opcode = ib_ipath_wc_opcode[wr->opcode];
 241         wc.qp = &qp->ibqp;
 242         ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 1);
 243 }
 244
 245 /**
 246  * ipath_post_one_send - post one RC, UC, or UD send work request
 247  * @qp: the QP to post on
 248  * @wr: the work request to send
 249  */
 250 static int ipath_post_one_send(struct ipath_qp *qp, struct ib_send_wr *wr)
 251 {
 252         struct ipath_swqe *wqe;
 253         u32 next;
 254         int i;
 255         int j;
 256         int acc;
 257         int ret;
 258         unsigned long flags;
 259
 260         spin_lock_irqsave(&qp->s_lock, flags);
 261
 262         /* Check that state is OK to post send. */
 263         if (unlikely(!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK))) {
 264                 if (qp->state != IB_QPS_SQE && qp->state != IB_QPS_ERR)
 265                         goto bail_inval;
 266                 /* C10-96 says generate a flushed completion entry. */
 267                 ipath_flush_wqe(qp, wr);
 268                 ret = 0;
 269                 goto bail;
 270         }
 271
 272         /* IB spec says that num_sge == 0 is OK. */
 273         if (wr->num_sge > qp->s_max_sge)
 274                 goto bail_inval;
 275
 276         /*
 277          * Don't allow RDMA reads or atomic operations on UC or
 278          * undefined operations.
 279          * Make sure buffer is large enough to hold the result for atomics.
 280          */
 281         if (qp->ibqp.qp_type == IB_QPT_UC) {
 282                 if ((unsigned) wr->opcode >= IB_WR_RDMA_READ)
 283                         goto bail_inval;
 284         } else if (qp->ibqp.qp_type == IB_QPT_UD) {
 285                 /* Check UD opcode */
 286                 if (wr->opcode != IB_WR_SEND &&
 287                     wr->opcode != IB_WR_SEND_WITH_IMM)
 288                         goto bail_inval;
 289                 /* Check UD destination address PD */
 290                 if (qp->ibqp.pd != wr->wr.ud.ah->pd)
 291                         goto bail_inval;
 292         } else if ((unsigned) wr->opcode > IB_WR_ATOMIC_FETCH_AND_ADD)
 293                 goto bail_inval;
 294         else if (wr->opcode >= IB_WR_ATOMIC_CMP_AND_SWP &&
 295                    (wr->num_sge == 0 ||
 296                     wr->sg_list[0].length < sizeof(u64) ||
 297                     wr->sg_list[0].addr & (sizeof(u64) - 1)))
 298                 goto bail_inval;
 299         else if (wr->opcode >= IB_WR_RDMA_READ && !qp->s_max_rd_atomic)
 300                 goto bail_inval;
 301
 302         next = qp->s_head + 1;
 303         if (next >= qp->s_size)
 304                 next = 0;
 305         if (next == qp->s_last)
 306                 goto bail_inval;
 307
 308         wqe = get_swqe_ptr(qp, qp->s_head);
 309         wqe->wr = *wr;
 310         wqe->ssn = qp->s_ssn++;
 311         wqe->length = 0;
 312         if (wr->num_sge) {
 313                 acc = wr->opcode >= IB_WR_RDMA_READ ?
 314                         IB_ACCESS_LOCAL_WRITE : 0;
 315                 for (i = 0, j = 0; i < wr->num_sge; i++) {
 316                         u32 length = wr->sg_list[i].length;
 317                         int ok;
 318
 319                         if (length == 0)
 320                                 continue;
 321                         ok = ipath_lkey_ok(qp, &wqe->sg_list[j],
 322                                            &wr->sg_list[i], acc);
 323                         if (!ok)
 324                                 goto bail_inval;
 325                         wqe->length += length;
 326                         j++;
 327                 }
 328                 wqe->wr.num_sge = j;
 329         }
 330         if (qp->ibqp.qp_type == IB_QPT_UC ||
 331             qp->ibqp.qp_type == IB_QPT_RC) {
 332                 if (wqe->length > 0x80000000U)
 333                         goto bail_inval;
 334         } else if (wqe->length > to_idev(qp->ibqp.device)->dd->ipath_ibmtu)
 335                 goto bail_inval;
 336         qp->s_head = next;
 337
 338         ret = 0;
 339         goto bail;
 340
 341 bail_inval:
 342         ret = -EINVAL;
 343 bail:
 344         spin_unlock_irqrestore(&qp->s_lock, flags);
 345         return ret;
 346 }
 347
 348 /**
 349  * ipath_post_send - post a send on a QP
 350  * @ibqp: the QP to post the send on
 351  * @wr: the list of work requests to post
 352  * @bad_wr: the first bad WR is put here
 353  *
 354  * This may be called from interrupt context.
 355  */
 356 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 357                            struct ib_send_wr **bad_wr)
 358 {
 359         struct ipath_qp *qp = to_iqp(ibqp);
 360         int err = 0;
 361
 362         for (; wr; wr = wr->next) {
 363                 err = ipath_post_one_send(qp, wr);
 364                 if (err) {
 365                         *bad_wr = wr;
 366                         goto bail;
 367                 }
 368         }
 369
 370         /* Try to do the send work in the caller's context. */
 371         ipath_do_send((unsigned long) qp);
 372
 373 bail:
 374         return err;
 375 }
 376
 377 /**
 378  * ipath_post_receive - post a receive on a QP
 379  * @ibqp: the QP to post the receive on
 380  * @wr: the WR to post
 381  * @bad_wr: the first bad WR is put here
 382  *
 383  * This may be called from interrupt context.
 384  */
 385 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 386                               struct ib_recv_wr **bad_wr)
 387 {
 388         struct ipath_qp *qp = to_iqp(ibqp);
 389         struct ipath_rwq *wq = qp->r_rq.wq;
 390         unsigned long flags;
 391         int ret;
 392
 393         /* Check that state is OK to post receive. */
 394         if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
 395                 *bad_wr = wr;
 396                 ret = -EINVAL;
 397                 goto bail;
 398         }
 399
 400         for (; wr; wr = wr->next) {
 401                 struct ipath_rwqe *wqe;
 402                 u32 next;
 403                 int i;
 404
 405                 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
 406                         *bad_wr = wr;
 407                         ret = -ENOMEM;
 408                         goto bail;
 409                 }
 410
 411                 spin_lock_irqsave(&qp->r_rq.lock, flags);
 412                 next = wq->head + 1;
 413                 if (next >= qp->r_rq.size)
 414                         next = 0;
 415                 if (next == wq->tail) {
 416                         spin_unlock_irqrestore(&qp->r_rq.lock, flags);
 417                         *bad_wr = wr;
 418                         ret = -ENOMEM;
 419                         goto bail;
 420                 }
 421
 422                 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
 423                 wqe->wr_id = wr->wr_id;
 424                 wqe->num_sge = wr->num_sge;
 425                 for (i = 0; i < wr->num_sge; i++)
 426                         wqe->sg_list[i] = wr->sg_list[i];
 427                 /* Make sure queue entry is written before the head index. */
 428                 smp_wmb();
 429                 wq->head = next;
 430                 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
 431         }
 432         ret = 0;
 433
 434 bail:
 435         return ret;
 436 }
 437
 438 /**
 439  * ipath_qp_rcv - processing an incoming packet on a QP
 440  * @dev: the device the packet came on
 441  * @hdr: the packet header
 442  * @has_grh: true if the packet has a GRH
 443  * @data: the packet data
 444  * @tlen: the packet length
 445  * @qp: the QP the packet came on
 446  *
 447  * This is called from ipath_ib_rcv() to process an incoming packet
 448  * for the given QP.
 449  * Called at interrupt level.
 450  */
 451 static void ipath_qp_rcv(struct ipath_ibdev *dev,
 452                          struct ipath_ib_header *hdr, int has_grh,
 453                          void *data, u32 tlen, struct ipath_qp *qp)
 454 {
 455         /* Check for valid receive state. */
 456         if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
 457                 dev->n_pkt_drops++;
 458                 return;
 459         }
 460
 461         switch (qp->ibqp.qp_type) {
 462         case IB_QPT_SMI:
 463         case IB_QPT_GSI:
 464                 if (ib_ipath_disable_sma)
 465                         break;
 466                 /* FALLTHROUGH */
 467         case IB_QPT_UD:
 468                 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
 469                 break;
 470
 471         case IB_QPT_RC:
 472                 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
 473                 break;
 474
 475         case IB_QPT_UC:
 476                 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
 477                 break;
 478
 479         default:
 480                 break;
 481         }
 482 }
 483
 484 /**
 485  * ipath_ib_rcv - process an incoming packet
 486  * @arg: the device pointer
 487  * @rhdr: the header of the packet
 488  * @data: the packet data
 489  * @tlen: the packet length
 490  *
 491  * This is called from ipath_kreceive() to process an incoming packet at
 492  * interrupt level. Tlen is the length of the header + data + CRC in bytes.
 493  */
 494 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
 495                   u32 tlen)
 496 {
 497         struct ipath_ib_header *hdr = rhdr;
 498         struct ipath_other_headers *ohdr;
 499         struct ipath_qp *qp;
 500         u32 qp_num;
 501         int lnh;
 502         u8 opcode;
 503         u16 lid;
 504
 505         if (unlikely(dev == NULL))
 506                 goto bail;
 507
 508         if (unlikely(tlen < 24)) {      /* LRH+BTH+CRC */
 509                 dev->rcv_errors++;
 510                 goto bail;
 511         }
 512
 513         /* Check for a valid destination LID (see ch. 7.11.1). */
 514         lid = be16_to_cpu(hdr->lrh[1]);
 515         if (lid < IPATH_MULTICAST_LID_BASE) {
 516                 lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
 517                 if (unlikely(lid != dev->dd->ipath_lid)) {
 518                         dev->rcv_errors++;
 519                         goto bail;
 520                 }
 521         }
 522
 523         /* Check for GRH */
 524         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 525         if (lnh == IPATH_LRH_BTH)
 526                 ohdr = &hdr->u.oth;
 527         else if (lnh == IPATH_LRH_GRH)
 528                 ohdr = &hdr->u.l.oth;
 529         else {
 530                 dev->rcv_errors++;
 531                 goto bail;
 532         }
 533
 534         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
 535         dev->opstats[opcode].n_bytes += tlen;
 536         dev->opstats[opcode].n_packets++;
 537
 538         /* Get the destination QP number. */
 539         qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
 540         if (qp_num == IPATH_MULTICAST_QPN) {
 541                 struct ipath_mcast *mcast;
 542                 struct ipath_mcast_qp *p;
 543
 544                 if (lnh != IPATH_LRH_GRH) {
 545                         dev->n_pkt_drops++;
 546                         goto bail;
 547                 }
 548                 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
 549                 if (mcast == NULL) {
 550                         dev->n_pkt_drops++;
 551                         goto bail;
 552                 }
 553                 dev->n_multicast_rcv++;
 554                 list_for_each_entry_rcu(p, &mcast->qp_list, list)
 555                         ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
 556                 /*
 557                  * Notify ipath_multicast_detach() if it is waiting for us
 558                  * to finish.
 559                  */
 560                 if (atomic_dec_return(&mcast->refcount) <= 1)
 561                         wake_up(&mcast->wait);
 562         } else {
 563                 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
 564                 if (qp) {
 565                         dev->n_unicast_rcv++;
 566                         ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
 567                                      tlen, qp);
 568                         /*
 569                          * Notify ipath_destroy_qp() if it is waiting
 570                          * for us to finish.
 571                          */
 572                         if (atomic_dec_and_test(&qp->refcount))
 573                                 wake_up(&qp->wait);
 574                 } else
 575                         dev->n_pkt_drops++;
 576         }
 577
 578 bail:;
 579 }
 580
 581 /**
 582  * ipath_ib_timer - verbs timer
 583  * @arg: the device pointer
 584  *
 585  * This is called from ipath_do_rcv_timer() at interrupt level to check for
 586  * QPs which need retransmits and to collect performance numbers.
 587  */
 588 static void ipath_ib_timer(struct ipath_ibdev *dev)
 589 {
 590         struct ipath_qp *resend = NULL;
 591         struct list_head *last;
 592         struct ipath_qp *qp;
 593         unsigned long flags;
 594
 595         if (dev == NULL)
 596                 return;
 597
 598         spin_lock_irqsave(&dev->pending_lock, flags);
 599         /* Start filling the next pending queue. */
 600         if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
 601                 dev->pending_index = 0;
 602         /* Save any requests still in the new queue, they have timed out. */
 603         last = &dev->pending[dev->pending_index];
 604         while (!list_empty(last)) {
 605                 qp = list_entry(last->next, struct ipath_qp, timerwait);
 606                 list_del_init(&qp->timerwait);
 607                 qp->timer_next = resend;
 608                 resend = qp;
 609                 atomic_inc(&qp->refcount);
 610         }
 611         last = &dev->rnrwait;
 612         if (!list_empty(last)) {
 613                 qp = list_entry(last->next, struct ipath_qp, timerwait);
 614                 if (--qp->s_rnr_timeout == 0) {
 615                         do {
 616                                 list_del_init(&qp->timerwait);
 617                                 tasklet_hi_schedule(&qp->s_task);
 618                                 if (list_empty(last))
 619                                         break;
 620                                 qp = list_entry(last->next, struct ipath_qp,
 621                                                 timerwait);
 622                         } while (qp->s_rnr_timeout == 0);
 623                 }
 624         }
 625         /*
 626          * We should only be in the started state if pma_sample_start != 0
 627          */
 628         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
 629             --dev->pma_sample_start == 0) {
 630                 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
 631                 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
 632                                         &dev->ipath_rword,
 633                                         &dev->ipath_spkts,
 634                                         &dev->ipath_rpkts,
 635                                         &dev->ipath_xmit_wait);
 636         }
 637         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
 638                 if (dev->pma_sample_interval == 0) {
 639                         u64 ta, tb, tc, td, te;
 640
 641                         dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
 642                         ipath_snapshot_counters(dev->dd, &ta, &tb,
 643                                                 &tc, &td, &te);
 644
 645                         dev->ipath_sword = ta - dev->ipath_sword;
 646                         dev->ipath_rword = tb - dev->ipath_rword;
 647                         dev->ipath_spkts = tc - dev->ipath_spkts;
 648                         dev->ipath_rpkts = td - dev->ipath_rpkts;
 649                         dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
 650                 }
 651                 else
 652                         dev->pma_sample_interval--;
 653         }
 654         spin_unlock_irqrestore(&dev->pending_lock, flags);
 655
 656         /* XXX What if timer fires again while this is running? */
 657         for (qp = resend; qp != NULL; qp = qp->timer_next) {
 658                 struct ib_wc wc;
 659
 660                 spin_lock_irqsave(&qp->s_lock, flags);
 661                 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
 662                         dev->n_timeouts++;
 663                         ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
 664                 }
 665                 spin_unlock_irqrestore(&qp->s_lock, flags);
 666
 667                 /* Notify ipath_destroy_qp() if it is waiting. */
 668                 if (atomic_dec_and_test(&qp->refcount))
 669                         wake_up(&qp->wait);
 670         }
 671 }
 672
 673 static void update_sge(struct ipath_sge_state *ss, u32 length)
 674 {
 675         struct ipath_sge *sge = &ss->sge;
 676
 677         sge->vaddr += length;
 678         sge->length -= length;
 679         sge->sge_length -= length;
 680         if (sge->sge_length == 0) {
 681                 if (--ss->num_sge)
 682                         *sge = *ss->sg_list++;
 683         } else if (sge->length == 0 && sge->mr != NULL) {
 684                 if (++sge->n >= IPATH_SEGSZ) {
 685                         if (++sge->m >= sge->mr->mapsz)
 686                                 return;
 687                         sge->n = 0;
 688                 }
 689                 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
 690                 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
 691         }
 692 }
 693
 694 #ifdef __LITTLE_ENDIAN
 695 static inline u32 get_upper_bits(u32 data, u32 shift)
 696 {
 697         return data >> shift;
 698 }
 699
 700 static inline u32 set_upper_bits(u32 data, u32 shift)
 701 {
 702         return data << shift;
 703 }
 704
 705 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 706 {
 707         data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
 708         data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 709         return data;
 710 }
 711 #else
 712 static inline u32 get_upper_bits(u32 data, u32 shift)
 713 {
 714         return data << shift;
 715 }
 716
 717 static inline u32 set_upper_bits(u32 data, u32 shift)
 718 {
 719         return data >> shift;
 720 }
 721
 722 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 723 {
 724         data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
 725         data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 726         return data;
 727 }
 728 #endif
 729
 730 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
 731                     u32 length, unsigned flush_wc)
 732 {
 733         u32 extra = 0;
 734         u32 data = 0;
 735         u32 last;
 736
 737         while (1) {
 738                 u32 len = ss->sge.length;
 739                 u32 off;
 740
 741                 if (len > length)
 742                         len = length;
 743                 if (len > ss->sge.sge_length)
 744                         len = ss->sge.sge_length;
 745                 BUG_ON(len == 0);
 746                 /* If the source address is not aligned, try to align it. */
 747                 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
 748                 if (off) {
 749                         u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
 750                                             ~(sizeof(u32) - 1));
 751                         u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
 752                         u32 y;
 753
 754                         y = sizeof(u32) - off;
 755                         if (len > y)
 756                                 len = y;
 757                         if (len + extra >= sizeof(u32)) {
 758                                 data |= set_upper_bits(v, extra *
 759                                                        BITS_PER_BYTE);
 760                                 len = sizeof(u32) - extra;
 761                                 if (len == length) {
 762                                         last = data;
 763                                         break;
 764                                 }
 765                                 __raw_writel(data, piobuf);
 766                                 piobuf++;
 767                                 extra = 0;
 768                                 data = 0;
 769                         } else {
 770                                 /* Clear unused upper bytes */
 771                                 data |= clear_upper_bytes(v, len, extra);
 772                                 if (len == length) {
 773                                         last = data;
 774                                         break;
 775                                 }
 776                                 extra += len;
 777                         }
 778                 } else if (extra) {
 779                         /* Source address is aligned. */
 780                         u32 *addr = (u32 *) ss->sge.vaddr;
 781                         int shift = extra * BITS_PER_BYTE;
 782                         int ushift = 32 - shift;
 783                         u32 l = len;
 784
 785                         while (l >= sizeof(u32)) {
 786                                 u32 v = *addr;
 787
 788                                 data |= set_upper_bits(v, shift);
 789                                 __raw_writel(data, piobuf);
 790                                 data = get_upper_bits(v, ushift);
 791                                 piobuf++;
 792                                 addr++;
 793                                 l -= sizeof(u32);
 794                         }
 795                         /*
 796                          * We still have 'extra' number of bytes leftover.
 797                          */
 798                         if (l) {
 799                                 u32 v = *addr;
 800
 801                                 if (l + extra >= sizeof(u32)) {
 802                                         data |= set_upper_bits(v, shift);
 803                                         len -= l + extra - sizeof(u32);
 804                                         if (len == length) {
 805                                                 last = data;
 806                                                 break;
 807                                         }
 808                                         __raw_writel(data, piobuf);
 809                                         piobuf++;
 810                                         extra = 0;
 811                                         data = 0;
 812                                 } else {
 813                                         /* Clear unused upper bytes */
 814                                         data |= clear_upper_bytes(v, l,
 815                                                                   extra);
 816                                         if (len == length) {
 817                                                 last = data;
 818                                                 break;
 819                                         }
 820                                         extra += l;
 821                                 }
 822                         } else if (len == length) {
 823                                 last = data;
 824                                 break;
 825                         }
 826                 } else if (len == length) {
 827                         u32 w;
 828
 829                         /*
 830                          * Need to round up for the last dword in the
 831                          * packet.
 832                          */
 833                         w = (len + 3) >> 2;
 834                         __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
 835                         piobuf += w - 1;
 836                         last = ((u32 *) ss->sge.vaddr)[w - 1];
 837                         break;
 838                 } else {
 839                         u32 w = len >> 2;
 840
 841                         __iowrite32_copy(piobuf, ss->sge.vaddr, w);
 842                         piobuf += w;
 843
 844                         extra = len & (sizeof(u32) - 1);
 845                         if (extra) {
 846                                 u32 v = ((u32 *) ss->sge.vaddr)[w];
 847
 848                                 /* Clear unused upper bytes */
 849                                 data = clear_upper_bytes(v, extra, 0);
 850                         }
 851                 }
 852                 update_sge(ss, len);
 853                 length -= len;
 854         }
 855         /* Update address before sending packet. */
 856         update_sge(ss, length);
 857         if (flush_wc) {
 858                 /* must flush early everything before trigger word */
 859                 ipath_flush_wc();
 860                 __raw_writel(last, piobuf);
 861                 /* be sure trigger word is written */
 862                 ipath_flush_wc();
 863         } else
 864                 __raw_writel(last, piobuf);
 865 }
 866
 867 static int ipath_verbs_send_pio(struct ipath_qp *qp, u32 *hdr, u32 hdrwords,
 868                                 struct ipath_sge_state *ss, u32 len,
 869                                 u32 plen, u32 dwords)
 870 {
 871         struct ipath_devdata *dd = to_idev(qp->ibqp.device)->dd;
 872         u32 __iomem *piobuf;
 873         unsigned flush_wc;
 874         int ret;
 875
 876         piobuf = ipath_getpiobuf(dd, NULL);
 877         if (unlikely(piobuf == NULL)) {
 878                 ret = -EBUSY;
 879                 goto bail;
 880         }
 881
 882         /*
 883          * Write len to control qword, no flags.
 884          * We have to flush after the PBC for correctness on some cpus
 885          * or WC buffer can be written out of order.
 886          */
 887         writeq(plen, piobuf);
 888         piobuf += 2;
 889
 890         flush_wc = dd->ipath_flags & IPATH_PIO_FLUSH_WC;
 891         if (len == 0) {
 892                 /*
 893                  * If there is just the header portion, must flush before
 894                  * writing last word of header for correctness, and after
 895                  * the last header word (trigger word).
 896                  */
 897                 if (flush_wc) {
 898                         ipath_flush_wc();
 899                         __iowrite32_copy(piobuf, hdr, hdrwords - 1);
 900                         ipath_flush_wc();
 901                         __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
 902                         ipath_flush_wc();
 903                 } else
 904                         __iowrite32_copy(piobuf, hdr, hdrwords);
 905                 goto done;
 906         }
 907
 908         if (flush_wc)
 909                 ipath_flush_wc();
 910         __iowrite32_copy(piobuf, hdr, hdrwords);
 911         piobuf += hdrwords;
 912
 913         /* The common case is aligned and contained in one segment. */
 914         if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
 915                    !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
 916                 u32 *addr = (u32 *) ss->sge.vaddr;
 917
 918                 /* Update address before sending packet. */
 919                 update_sge(ss, len);
 920                 if (flush_wc) {
 921                         __iowrite32_copy(piobuf, addr, dwords - 1);
 922                         /* must flush early everything before trigger word */
 923                         ipath_flush_wc();
 924                         __raw_writel(addr[dwords - 1], piobuf + dwords - 1);
 925                         /* be sure trigger word is written */
 926                         ipath_flush_wc();
 927                 } else
 928                         __iowrite32_copy(piobuf, addr, dwords);
 929                 goto done;
 930         }
 931         copy_io(piobuf, ss, len, flush_wc);
 932 done:
 933         if (qp->s_wqe)
 934                 ipath_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
 935         ret = 0;
 936 bail:
 937         return ret;
 938 }
 939
 940 /**
 941  * ipath_verbs_send - send a packet
 942  * @qp: the QP to send on
 943  * @hdr: the packet header
 944  * @hdrwords: the number of words in the header
 945  * @ss: the SGE to send
 946  * @len: the length of the packet in bytes
 947  */
 948 int ipath_verbs_send(struct ipath_qp *qp, struct ipath_ib_header *hdr,
 949                      u32 hdrwords, struct ipath_sge_state *ss, u32 len)
 950 {
 951         u32 plen;
 952         int ret;
 953         u32 dwords = (len + 3) >> 2;
 954
 955         /* +1 is for the qword padding of pbc */
 956         plen = hdrwords + dwords + 1;
 957
 958         ret = ipath_verbs_send_pio(qp, (u32 *) hdr, hdrwords,
 959                                    ss, len, plen, dwords);
 960
 961         return ret;
 962 }
 963
 964 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
 965                             u64 *rwords, u64 *spkts, u64 *rpkts,
 966                             u64 *xmit_wait)
 967 {
 968         int ret;
 969
 970         if (!(dd->ipath_flags & IPATH_INITTED)) {
 971                 /* no hardware, freeze, etc. */
 972                 ret = -EINVAL;
 973                 goto bail;
 974         }
 975         *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
 976         *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
 977         *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
 978         *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
 979         *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
 980
 981         ret = 0;
 982
 983 bail:
 984         return ret;
 985 }
 986
 987 /**
 988  * ipath_get_counters - get various chip counters
 989  * @dd: the infinipath device
 990  * @cntrs: counters are placed here
 991  *
 992  * Return the counters needed by recv_pma_get_portcounters().
 993  */
 994 int ipath_get_counters(struct ipath_devdata *dd,
 995                        struct ipath_verbs_counters *cntrs)
 996 {
 997         struct ipath_cregs const *crp = dd->ipath_cregs;
 998         int ret;
 999
1000         if (!(dd->ipath_flags & IPATH_INITTED)) {
1001                 /* no hardware, freeze, etc. */
1002                 ret = -EINVAL;
1003                 goto bail;
1004         }
1005         cntrs->symbol_error_counter =
1006                 ipath_snap_cntr(dd, crp->cr_ibsymbolerrcnt);
1007         cntrs->link_error_recovery_counter =
1008                 ipath_snap_cntr(dd, crp->cr_iblinkerrrecovcnt);
1009         /*
1010          * The link downed counter counts when the other side downs the
1011          * connection.  We add in the number of times we downed the link
1012          * due to local link integrity errors to compensate.
1013          */
1014         cntrs->link_downed_counter =
1015                 ipath_snap_cntr(dd, crp->cr_iblinkdowncnt);
1016         cntrs->port_rcv_errors =
1017                 ipath_snap_cntr(dd, crp->cr_rxdroppktcnt) +
1018                 ipath_snap_cntr(dd, crp->cr_rcvovflcnt) +
1019                 ipath_snap_cntr(dd, crp->cr_portovflcnt) +
1020                 ipath_snap_cntr(dd, crp->cr_err_rlencnt) +
1021                 ipath_snap_cntr(dd, crp->cr_invalidrlencnt) +
1022                 ipath_snap_cntr(dd, crp->cr_errlinkcnt) +
1023                 ipath_snap_cntr(dd, crp->cr_erricrccnt) +
1024                 ipath_snap_cntr(dd, crp->cr_errvcrccnt) +
1025                 ipath_snap_cntr(dd, crp->cr_errlpcrccnt) +
1026                 ipath_snap_cntr(dd, crp->cr_badformatcnt) +
1027                 dd->ipath_rxfc_unsupvl_errs;
1028         cntrs->port_rcv_remphys_errors =
1029                 ipath_snap_cntr(dd, crp->cr_rcvebpcnt);
1030         cntrs->port_xmit_discards = ipath_snap_cntr(dd, crp->cr_unsupvlcnt);
1031         cntrs->port_xmit_data = ipath_snap_cntr(dd, crp->cr_wordsendcnt);
1032         cntrs->port_rcv_data = ipath_snap_cntr(dd, crp->cr_wordrcvcnt);
1033         cntrs->port_xmit_packets = ipath_snap_cntr(dd, crp->cr_pktsendcnt);
1034         cntrs->port_rcv_packets = ipath_snap_cntr(dd, crp->cr_pktrcvcnt);
1035         cntrs->local_link_integrity_errors =
1036                 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
1037                 dd->ipath_lli_errs : dd->ipath_lli_errors;
1038         cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
1039
1040         ret = 0;
1041
1042 bail:
1043         return ret;
1044 }
1045
1046 /**
1047  * ipath_ib_piobufavail - callback when a PIO buffer is available
1048  * @arg: the device pointer
1049  *
1050  * This is called from ipath_intr() at interrupt level when a PIO buffer is
1051  * available after ipath_verbs_send() returned an error that no buffers were
1052  * available.  Return 1 if we consumed all the PIO buffers and we still have
1053  * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
1054  * return zero).
1055  */
1056 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
1057 {
1058         struct ipath_qp *qp;
1059         unsigned long flags;
1060
1061         if (dev == NULL)
1062                 goto bail;
1063
1064         spin_lock_irqsave(&dev->pending_lock, flags);
1065         while (!list_empty(&dev->piowait)) {
1066                 qp = list_entry(dev->piowait.next, struct ipath_qp,
1067                                 piowait);
1068                 list_del_init(&qp->piowait);
1069                 clear_bit(IPATH_S_BUSY, &qp->s_busy);
1070                 tasklet_hi_schedule(&qp->s_task);
1071         }
1072         spin_unlock_irqrestore(&dev->pending_lock, flags);
1073
1074 bail:
1075         return 0;
1076 }
1077
1078 static int ipath_query_device(struct ib_device *ibdev,
1079                               struct ib_device_attr *props)
1080 {
1081         struct ipath_ibdev *dev = to_idev(ibdev);
1082
1083         memset(props, 0, sizeof(*props));
1084
1085         props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
1086                 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
1087                 IB_DEVICE_SYS_IMAGE_GUID;
1088         props->page_size_cap = PAGE_SIZE;
1089         props->vendor_id = dev->dd->ipath_vendorid;
1090         props->vendor_part_id = dev->dd->ipath_deviceid;
1091         props->hw_ver = dev->dd->ipath_pcirev;
1092
1093         props->sys_image_guid = dev->sys_image_guid;
1094
1095         props->max_mr_size = ~0ull;
1096         props->max_qp = ib_ipath_max_qps;
1097         props->max_qp_wr = ib_ipath_max_qp_wrs;
1098         props->max_sge = ib_ipath_max_sges;
1099         props->max_cq = ib_ipath_max_cqs;
1100         props->max_ah = ib_ipath_max_ahs;
1101         props->max_cqe = ib_ipath_max_cqes;
1102         props->max_mr = dev->lk_table.max;
1103         props->max_fmr = dev->lk_table.max;
1104         props->max_map_per_fmr = 32767;
1105         props->max_pd = ib_ipath_max_pds;
1106         props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
1107         props->max_qp_init_rd_atom = 255;
1108         /* props->max_res_rd_atom */
1109         props->max_srq = ib_ipath_max_srqs;
1110         props->max_srq_wr = ib_ipath_max_srq_wrs;
1111         props->max_srq_sge = ib_ipath_max_srq_sges;
1112         /* props->local_ca_ack_delay */
1113         props->atomic_cap = IB_ATOMIC_GLOB;
1114         props->max_pkeys = ipath_get_npkeys(dev->dd);
1115         props->max_mcast_grp = ib_ipath_max_mcast_grps;
1116         props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
1117         props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
1118                 props->max_mcast_grp;
1119
1120         return 0;
1121 }
1122
1123 const u8 ipath_cvt_physportstate[16] = {
1124         [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1125         [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1126         [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1127         [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1128         [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1129         [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1130         [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1131         [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1132         [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1133         [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1134         [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1135         [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1136         [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1137 };
1138
1139 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1140 {
1141         return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1142 }
1143
1144 static int ipath_query_port(struct ib_device *ibdev,
1145                             u8 port, struct ib_port_attr *props)
1146 {
1147         struct ipath_ibdev *dev = to_idev(ibdev);
1148         struct ipath_devdata *dd = dev->dd;
1149         enum ib_mtu mtu;
1150         u16 lid = dd->ipath_lid;
1151         u64 ibcstat;
1152
1153         memset(props, 0, sizeof(*props));
1154         props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1155         props->lmc = dev->mkeyprot_resv_lmc & 7;
1156         props->sm_lid = dev->sm_lid;
1157         props->sm_sl = dev->sm_sl;
1158         ibcstat = dd->ipath_lastibcstat;
1159         props->state = ((ibcstat >> 4) & 0x3) + 1;
1160         /* See phys_state_show() */
1161         props->phys_state = ipath_cvt_physportstate[
1162                 dd->ipath_lastibcstat & 0xf];
1163         props->port_cap_flags = dev->port_cap_flags;
1164         props->gid_tbl_len = 1;
1165         props->max_msg_sz = 0x80000000;
1166         props->pkey_tbl_len = ipath_get_npkeys(dd);
1167         props->bad_pkey_cntr = ipath_get_cr_errpkey(dd) -
1168                 dev->z_pkey_violations;
1169         props->qkey_viol_cntr = dev->qkey_violations;
1170         props->active_width = IB_WIDTH_4X;
1171         /* See rate_show() */
1172         props->active_speed = 1;        /* Regular 10Mbs speed. */
1173         props->max_vl_num = 1;          /* VLCap = VL0 */
1174         props->init_type_reply = 0;
1175
1176         /*
1177          * Note: the chip supports a maximum MTU of 4096, but the driver
1178          * hasn't implemented this feature yet, so set the maximum value
1179          * to 2048.
1180          */
1181         props->max_mtu = IB_MTU_2048;
1182         switch (dd->ipath_ibmtu) {
1183         case 4096:
1184                 mtu = IB_MTU_4096;
1185                 break;
1186         case 2048:
1187                 mtu = IB_MTU_2048;
1188                 break;
1189         case 1024:
1190                 mtu = IB_MTU_1024;
1191                 break;
1192         case 512:
1193                 mtu = IB_MTU_512;
1194                 break;
1195         case 256:
1196                 mtu = IB_MTU_256;
1197                 break;
1198         default:
1199                 mtu = IB_MTU_2048;
1200         }
1201         props->active_mtu = mtu;
1202         props->subnet_timeout = dev->subnet_timeout;
1203
1204         return 0;
1205 }
1206
1207 static int ipath_modify_device(struct ib_device *device,
1208                                int device_modify_mask,
1209                                struct ib_device_modify *device_modify)
1210 {
1211         int ret;
1212
1213         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1214                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1215                 ret = -EOPNOTSUPP;
1216                 goto bail;
1217         }
1218
1219         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1220                 memcpy(device->node_desc, device_modify->node_desc, 64);
1221
1222         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1223                 to_idev(device)->sys_image_guid =
1224                         cpu_to_be64(device_modify->sys_image_guid);
1225
1226         ret = 0;
1227
1228 bail:
1229         return ret;
1230 }
1231
1232 static int ipath_modify_port(struct ib_device *ibdev,
1233                              u8 port, int port_modify_mask,
1234                              struct ib_port_modify *props)
1235 {
1236         struct ipath_ibdev *dev = to_idev(ibdev);
1237
1238         dev->port_cap_flags |= props->set_port_cap_mask;
1239         dev->port_cap_flags &= ~props->clr_port_cap_mask;
1240         if (port_modify_mask & IB_PORT_SHUTDOWN)
1241                 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1242         if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1243                 dev->qkey_violations = 0;
1244         return 0;
1245 }
1246
1247 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1248                            int index, union ib_gid *gid)
1249 {
1250         struct ipath_ibdev *dev = to_idev(ibdev);
1251         int ret;
1252
1253         if (index >= 1) {
1254                 ret = -EINVAL;
1255                 goto bail;
1256         }
1257         gid->global.subnet_prefix = dev->gid_prefix;
1258         gid->global.interface_id = dev->dd->ipath_guid;
1259
1260         ret = 0;
1261
1262 bail:
1263         return ret;
1264 }
1265
1266 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1267                                     struct ib_ucontext *context,
1268                                     struct ib_udata *udata)
1269 {
1270         struct ipath_ibdev *dev = to_idev(ibdev);
1271         struct ipath_pd *pd;
1272         struct ib_pd *ret;
1273
1274         /*
1275          * This is actually totally arbitrary.  Some correctness tests
1276          * assume there's a maximum number of PDs that can be allocated.
1277          * We don't actually have this limit, but we fail the test if
1278          * we allow allocations of more than we report for this value.
1279          */
1280
1281         pd = kmalloc(sizeof *pd, GFP_KERNEL);
1282         if (!pd) {
1283                 ret = ERR_PTR(-ENOMEM);
1284                 goto bail;
1285         }
1286
1287         spin_lock(&dev->n_pds_lock);
1288         if (dev->n_pds_allocated == ib_ipath_max_pds) {
1289                 spin_unlock(&dev->n_pds_lock);
1290                 kfree(pd);
1291                 ret = ERR_PTR(-ENOMEM);
1292                 goto bail;
1293         }
1294
1295         dev->n_pds_allocated++;
1296         spin_unlock(&dev->n_pds_lock);
1297
1298         /* ib_alloc_pd() will initialize pd->ibpd. */
1299         pd->user = udata != NULL;
1300
1301         ret = &pd->ibpd;
1302
1303 bail:
1304         return ret;
1305 }
1306
1307 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1308 {
1309         struct ipath_pd *pd = to_ipd(ibpd);
1310         struct ipath_ibdev *dev = to_idev(ibpd->device);
1311
1312         spin_lock(&dev->n_pds_lock);
1313         dev->n_pds_allocated--;
1314         spin_unlock(&dev->n_pds_lock);
1315
1316         kfree(pd);
1317
1318         return 0;
1319 }
1320
1321 /**
1322  * ipath_create_ah - create an address handle
1323  * @pd: the protection domain
1324  * @ah_attr: the attributes of the AH
1325  *
1326  * This may be called from interrupt context.
1327  */
1328 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1329                                      struct ib_ah_attr *ah_attr)
1330 {
1331         struct ipath_ah *ah;
1332         struct ib_ah *ret;
1333         struct ipath_ibdev *dev = to_idev(pd->device);
1334         unsigned long flags;
1335
1336         /* A multicast address requires a GRH (see ch. 8.4.1). */
1337         if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1338             ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1339             !(ah_attr->ah_flags & IB_AH_GRH)) {
1340                 ret = ERR_PTR(-EINVAL);
1341                 goto bail;
1342         }
1343
1344         if (ah_attr->dlid == 0) {
1345                 ret = ERR_PTR(-EINVAL);
1346                 goto bail;
1347         }
1348
1349         if (ah_attr->port_num < 1 ||
1350             ah_attr->port_num > pd->device->phys_port_cnt) {
1351                 ret = ERR_PTR(-EINVAL);
1352                 goto bail;
1353         }
1354
1355         ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1356         if (!ah) {
1357                 ret = ERR_PTR(-ENOMEM);
1358                 goto bail;
1359         }
1360
1361         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1362         if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1363                 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1364                 kfree(ah);
1365                 ret = ERR_PTR(-ENOMEM);
1366                 goto bail;
1367         }
1368
1369         dev->n_ahs_allocated++;
1370         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1371
1372         /* ib_create_ah() will initialize ah->ibah. */
1373         ah->attr = *ah_attr;
1374
1375         ret = &ah->ibah;
1376
1377 bail:
1378         return ret;
1379 }
1380
1381 /**
1382  * ipath_destroy_ah - destroy an address handle
1383  * @ibah: the AH to destroy
1384  *
1385  * This may be called from interrupt context.
1386  */
1387 static int ipath_destroy_ah(struct ib_ah *ibah)
1388 {
1389         struct ipath_ibdev *dev = to_idev(ibah->device);
1390         struct ipath_ah *ah = to_iah(ibah);
1391         unsigned long flags;
1392
1393         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1394         dev->n_ahs_allocated--;
1395         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1396
1397         kfree(ah);
1398
1399         return 0;
1400 }
1401
1402 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1403 {
1404         struct ipath_ah *ah = to_iah(ibah);
1405
1406         *ah_attr = ah->attr;
1407
1408         return 0;
1409 }
1410
1411 /**
1412  * ipath_get_npkeys - return the size of the PKEY table for port 0
1413  * @dd: the infinipath device
1414  */
1415 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1416 {
1417         return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1418 }
1419
1420 /**
1421  * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1422  * @dd: the infinipath device
1423  * @index: the PKEY index
1424  */
1425 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1426 {
1427         unsigned ret;
1428
1429         if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1430                 ret = 0;
1431         else
1432                 ret = dd->ipath_pd[0]->port_pkeys[index];
1433
1434         return ret;
1435 }
1436
1437 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1438                             u16 *pkey)
1439 {
1440         struct ipath_ibdev *dev = to_idev(ibdev);
1441         int ret;
1442
1443         if (index >= ipath_get_npkeys(dev->dd)) {
1444                 ret = -EINVAL;
1445                 goto bail;
1446         }
1447
1448         *pkey = ipath_get_pkey(dev->dd, index);
1449         ret = 0;
1450
1451 bail:
1452         return ret;
1453 }
1454
1455 /**
1456  * ipath_alloc_ucontext - allocate a ucontest
1457  * @ibdev: the infiniband device
1458  * @udata: not used by the InfiniPath driver
1459  */
1460
1461 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1462                                                 struct ib_udata *udata)
1463 {
1464         struct ipath_ucontext *context;
1465         struct ib_ucontext *ret;
1466
1467         context = kmalloc(sizeof *context, GFP_KERNEL);
1468         if (!context) {
1469                 ret = ERR_PTR(-ENOMEM);
1470                 goto bail;
1471         }
1472
1473         ret = &context->ibucontext;
1474
1475 bail:
1476         return ret;
1477 }
1478
1479 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1480 {
1481         kfree(to_iucontext(context));
1482         return 0;
1483 }
1484
1485 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1486
1487 static void __verbs_timer(unsigned long arg)
1488 {
1489         struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1490
1491         /* Handle verbs layer timeouts. */
1492         ipath_ib_timer(dd->verbs_dev);
1493
1494         mod_timer(&dd->verbs_timer, jiffies + 1);
1495 }
1496
1497 static int enable_timer(struct ipath_devdata *dd)
1498 {
1499         /*
1500          * Early chips had a design flaw where the chip and kernel idea
1501          * of the tail register don't always agree, and therefore we won't
1502          * get an interrupt on the next packet received.
1503          * If the board supports per packet receive interrupts, use it.
1504          * Otherwise, the timer function periodically checks for packets
1505          * to cover this case.
1506          * Either way, the timer is needed for verbs layer related
1507          * processing.
1508          */
1509         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1510                 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1511                                  0x2074076542310ULL);
1512                 /* Enable GPIO bit 2 interrupt */
1513                 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1514                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1515                                  dd->ipath_gpio_mask);
1516         }
1517
1518         init_timer(&dd->verbs_timer);
1519         dd->verbs_timer.function = __verbs_timer;
1520         dd->verbs_timer.data = (unsigned long)dd;
1521         dd->verbs_timer.expires = jiffies + 1;
1522         add_timer(&dd->verbs_timer);
1523
1524         return 0;
1525 }
1526
1527 static int disable_timer(struct ipath_devdata *dd)
1528 {
1529         /* Disable GPIO bit 2 interrupt */
1530         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1531                 /* Disable GPIO bit 2 interrupt */
1532                 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1533                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1534                                  dd->ipath_gpio_mask);
1535                 /*
1536                  * We might want to undo changes to debugportselect,
1537                  * but how?
1538                  */
1539         }
1540
1541         del_timer_sync(&dd->verbs_timer);
1542
1543         return 0;
1544 }
1545
1546 /**
1547  * ipath_register_ib_device - register our device with the infiniband core
1548  * @dd: the device data structure
1549  * Return the allocated ipath_ibdev pointer or NULL on error.
1550  */
1551 int ipath_register_ib_device(struct ipath_devdata *dd)
1552 {
1553         struct ipath_verbs_counters cntrs;
1554         struct ipath_ibdev *idev;
1555         struct ib_device *dev;
1556         int ret;
1557
1558         idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1559         if (idev == NULL) {
1560                 ret = -ENOMEM;
1561                 goto bail;
1562         }
1563
1564         dev = &idev->ibdev;
1565
1566         /* Only need to initialize non-zero fields. */
1567         spin_lock_init(&idev->n_pds_lock);
1568         spin_lock_init(&idev->n_ahs_lock);
1569         spin_lock_init(&idev->n_cqs_lock);
1570         spin_lock_init(&idev->n_qps_lock);
1571         spin_lock_init(&idev->n_srqs_lock);
1572         spin_lock_init(&idev->n_mcast_grps_lock);
1573
1574         spin_lock_init(&idev->qp_table.lock);
1575         spin_lock_init(&idev->lk_table.lock);
1576         idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1577         /* Set the prefix to the default value (see ch. 4.1.1) */
1578         idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1579
1580         ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1581         if (ret)
1582                 goto err_qp;
1583
1584         /*
1585          * The top ib_ipath_lkey_table_size bits are used to index the
1586          * table.  The lower 8 bits can be owned by the user (copied from
1587          * the LKEY).  The remaining bits act as a generation number or tag.
1588          */
1589         idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1590         idev->lk_table.table = kzalloc(idev->lk_table.max *
1591                                        sizeof(*idev->lk_table.table),
1592                                        GFP_KERNEL);
1593         if (idev->lk_table.table == NULL) {
1594                 ret = -ENOMEM;
1595                 goto err_lk;
1596         }
1597         INIT_LIST_HEAD(&idev->pending_mmaps);
1598         spin_lock_init(&idev->pending_lock);
1599         idev->mmap_offset = PAGE_SIZE;
1600         spin_lock_init(&idev->mmap_offset_lock);
1601         INIT_LIST_HEAD(&idev->pending[0]);
1602         INIT_LIST_HEAD(&idev->pending[1]);
1603         INIT_LIST_HEAD(&idev->pending[2]);
1604         INIT_LIST_HEAD(&idev->piowait);
1605         INIT_LIST_HEAD(&idev->rnrwait);
1606         idev->pending_index = 0;
1607         idev->port_cap_flags =
1608                 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1609         idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1610         idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1611         idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1612         idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1613         idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1614         idev->link_width_enabled = 3;   /* 1x or 4x */
1615
1616         /* Snapshot current HW counters to "clear" them. */
1617         ipath_get_counters(dd, &cntrs);
1618         idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1619         idev->z_link_error_recovery_counter =
1620                 cntrs.link_error_recovery_counter;
1621         idev->z_link_downed_counter = cntrs.link_downed_counter;
1622         idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1623         idev->z_port_rcv_remphys_errors =
1624                 cntrs.port_rcv_remphys_errors;
1625         idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1626         idev->z_port_xmit_data = cntrs.port_xmit_data;
1627         idev->z_port_rcv_data = cntrs.port_rcv_data;
1628         idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1629         idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1630         idev->z_local_link_integrity_errors =
1631                 cntrs.local_link_integrity_errors;
1632         idev->z_excessive_buffer_overrun_errors =
1633                 cntrs.excessive_buffer_overrun_errors;
1634
1635         /*
1636          * The system image GUID is supposed to be the same for all
1637          * IB HCAs in a single system but since there can be other
1638          * device types in the system, we can't be sure this is unique.
1639          */
1640         if (!sys_image_guid)
1641                 sys_image_guid = dd->ipath_guid;
1642         idev->sys_image_guid = sys_image_guid;
1643         idev->ib_unit = dd->ipath_unit;
1644         idev->dd = dd;
1645
1646         strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1647         dev->owner = THIS_MODULE;
1648         dev->node_guid = dd->ipath_guid;
1649         dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1650         dev->uverbs_cmd_mask =
1651                 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT)         |
1652                 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)        |
1653                 (1ull << IB_USER_VERBS_CMD_QUERY_PORT)          |
1654                 (1ull << IB_USER_VERBS_CMD_ALLOC_PD)            |
1655                 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD)          |
1656                 (1ull << IB_USER_VERBS_CMD_CREATE_AH)           |
1657                 (1ull << IB_USER_VERBS_CMD_DESTROY_AH)          |
1658                 (1ull << IB_USER_VERBS_CMD_QUERY_AH)            |
1659                 (1ull << IB_USER_VERBS_CMD_REG_MR)              |
1660                 (1ull << IB_USER_VERBS_CMD_DEREG_MR)            |
1661                 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1662                 (1ull << IB_USER_VERBS_CMD_CREATE_CQ)           |
1663                 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ)           |
1664                 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ)          |
1665                 (1ull << IB_USER_VERBS_CMD_POLL_CQ)             |
1666                 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ)       |
1667                 (1ull << IB_USER_VERBS_CMD_CREATE_QP)           |
1668                 (1ull << IB_USER_VERBS_CMD_QUERY_QP)            |
1669                 (1ull << IB_USER_VERBS_CMD_MODIFY_QP)           |
1670                 (1ull << IB_USER_VERBS_CMD_DESTROY_QP)          |
1671                 (1ull << IB_USER_VERBS_CMD_POST_SEND)           |
1672                 (1ull << IB_USER_VERBS_CMD_POST_RECV)           |
1673                 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)        |
1674                 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST)        |
1675                 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ)          |
1676                 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)          |
1677                 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ)           |
1678                 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)         |
1679                 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1680         dev->node_type = RDMA_NODE_IB_CA;
1681         dev->phys_port_cnt = 1;
1682         dev->num_comp_vectors = 1;
1683         dev->dma_device = &dd->pcidev->dev;
1684         dev->query_device = ipath_query_device;
1685         dev->modify_device = ipath_modify_device;
1686         dev->query_port = ipath_query_port;
1687         dev->modify_port = ipath_modify_port;
1688         dev->query_pkey = ipath_query_pkey;
1689         dev->query_gid = ipath_query_gid;
1690         dev->alloc_ucontext = ipath_alloc_ucontext;
1691         dev->dealloc_ucontext = ipath_dealloc_ucontext;
1692         dev->alloc_pd = ipath_alloc_pd;
1693         dev->dealloc_pd = ipath_dealloc_pd;
1694         dev->create_ah = ipath_create_ah;
1695         dev->destroy_ah = ipath_destroy_ah;
1696         dev->query_ah = ipath_query_ah;
1697         dev->create_srq = ipath_create_srq;
1698         dev->modify_srq = ipath_modify_srq;
1699         dev->query_srq = ipath_query_srq;
1700         dev->destroy_srq = ipath_destroy_srq;
1701         dev->create_qp = ipath_create_qp;
1702         dev->modify_qp = ipath_modify_qp;
1703         dev->query_qp = ipath_query_qp;
1704         dev->destroy_qp = ipath_destroy_qp;
1705         dev->post_send = ipath_post_send;
1706         dev->post_recv = ipath_post_receive;
1707         dev->post_srq_recv = ipath_post_srq_receive;
1708         dev->create_cq = ipath_create_cq;
1709         dev->destroy_cq = ipath_destroy_cq;
1710         dev->resize_cq = ipath_resize_cq;
1711         dev->poll_cq = ipath_poll_cq;
1712         dev->req_notify_cq = ipath_req_notify_cq;
1713         dev->get_dma_mr = ipath_get_dma_mr;
1714         dev->reg_phys_mr = ipath_reg_phys_mr;
1715         dev->reg_user_mr = ipath_reg_user_mr;
1716         dev->dereg_mr = ipath_dereg_mr;
1717         dev->alloc_fmr = ipath_alloc_fmr;
1718         dev->map_phys_fmr = ipath_map_phys_fmr;
1719         dev->unmap_fmr = ipath_unmap_fmr;
1720         dev->dealloc_fmr = ipath_dealloc_fmr;
1721         dev->attach_mcast = ipath_multicast_attach;
1722         dev->detach_mcast = ipath_multicast_detach;
1723         dev->process_mad = ipath_process_mad;
1724         dev->mmap = ipath_mmap;
1725         dev->dma_ops = &ipath_dma_mapping_ops;
1726
1727         snprintf(dev->node_desc, sizeof(dev->node_desc),
1728                  IPATH_IDSTR " %s", init_utsname()->nodename);
1729
1730         ret = ib_register_device(dev);
1731         if (ret)
1732                 goto err_reg;
1733
1734         if (ipath_verbs_register_sysfs(dev))
1735                 goto err_class;
1736
1737         enable_timer(dd);
1738
1739         goto bail;
1740
1741 err_class:
1742         ib_unregister_device(dev);
1743 err_reg:
1744         kfree(idev->lk_table.table);
1745 err_lk:
1746         kfree(idev->qp_table.table);
1747 err_qp:
1748         ib_dealloc_device(dev);
1749         ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1750         idev = NULL;
1751
1752 bail:
1753         dd->verbs_dev = idev;
1754         return ret;
1755 }
1756
1757 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1758 {
1759         struct ib_device *ibdev = &dev->ibdev;
1760
1761         disable_timer(dev->dd);
1762
1763         ib_unregister_device(ibdev);
1764
1765         if (!list_empty(&dev->pending[0]) ||
1766             !list_empty(&dev->pending[1]) ||
1767             !list_empty(&dev->pending[2]))
1768                 ipath_dev_err(dev->dd, "pending list not empty!\n");
1769         if (!list_empty(&dev->piowait))
1770                 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1771         if (!list_empty(&dev->rnrwait))
1772                 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1773         if (!ipath_mcast_tree_empty())
1774                 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1775         /*
1776          * Note that ipath_unregister_ib_device() can be called before all
1777          * the QPs are destroyed!
1778          */
1779         ipath_free_all_qps(&dev->qp_table);
1780         kfree(dev->qp_table.table);
1781         kfree(dev->lk_table.table);
1782         ib_dealloc_device(ibdev);
1783 }
1784
1785 static ssize_t show_rev(struct class_device *cdev, char *buf)
1786 {
1787         struct ipath_ibdev *dev =
1788                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1789
1790         return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1791 }
1792
1793 static ssize_t show_hca(struct class_device *cdev, char *buf)
1794 {
1795         struct ipath_ibdev *dev =
1796                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1797         int ret;
1798
1799         ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1800         if (ret < 0)
1801                 goto bail;
1802         strcat(buf, "\n");
1803         ret = strlen(buf);
1804
1805 bail:
1806         return ret;
1807 }
1808
1809 static ssize_t show_stats(struct class_device *cdev, char *buf)
1810 {
1811         struct ipath_ibdev *dev =
1812                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1813         int i;
1814         int len;
1815
1816         len = sprintf(buf,
1817                       "RC resends  %d\n"
1818                       "RC no QACK  %d\n"
1819                       "RC ACKs     %d\n"
1820                       "RC SEQ NAKs %d\n"
1821                       "RC RDMA seq %d\n"
1822                       "RC RNR NAKs %d\n"
1823                       "RC OTH NAKs %d\n"
1824                       "RC timeouts %d\n"
1825                       "RC RDMA dup %d\n"
1826                       "RC stalls   %d\n"
1827                       "piobuf wait %d\n"
1828                       "no piobuf   %d\n"
1829                       "PKT drops   %d\n"
1830                       "WQE errs    %d\n",
1831                       dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1832                       dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1833                       dev->n_other_naks, dev->n_timeouts,
1834                       dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1835                       dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1836         for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1837                 const struct ipath_opcode_stats *si = &dev->opstats[i];
1838
1839                 if (!si->n_packets && !si->n_bytes)
1840                         continue;
1841                 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1842                                (unsigned long long) si->n_packets,
1843                                (unsigned long long) si->n_bytes);
1844         }
1845         return len;
1846 }
1847
1848 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1849 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1850 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1851 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1852
1853 static struct class_device_attribute *ipath_class_attributes[] = {
1854         &class_device_attr_hw_rev,
1855         &class_device_attr_hca_type,
1856         &class_device_attr_board_id,
1857         &class_device_attr_stats
1858 };
1859
1860 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1861 {
1862         int i;
1863         int ret;
1864
1865         for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1866                 if (class_device_create_file(&dev->class_dev,
1867                                              ipath_class_attributes[i])) {
1868                         ret = 1;
1869                         goto bail;
1870                 }
1871
1872         ret = 0;
1873
1874 bail:
1875         return ret;
1876 }