SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/infiniband/hw/ipath/ipath_init_chip.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/vmalloc.h>
  37
  38 #include "ipath_kernel.h"
  39 #include "ipath_common.h"
  40
  41 /*
  42  * min buffers we want to have per port, after driver
  43  */
  44 #define IPATH_MIN_USER_PORT_BUFCNT 8
  45
  46 /*
  47  * Number of ports we are configured to use (to allow for more pio
  48  * buffers per port, etc.)  Zero means use chip value.
  49  */
  50 static ushort ipath_cfgports;
  51
  52 module_param_named(cfgports, ipath_cfgports, ushort, S_IRUGO);
  53 MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
  54
  55 /*
  56  * Number of buffers reserved for driver (verbs and layered drivers.)
  57  * Reserved at end of buffer list.   Initialized based on
  58  * number of PIO buffers if not set via module interface.
  59  * The problem with this is that it's global, but we'll use different
  60  * numbers for different chip types.  So the default value is not
  61  * very useful.  I've redefined it for the 1.3 release so that it's
  62  * zero unless set by the user to something else, in which case we
  63  * try to respect it.
  64  */
  65 static ushort ipath_kpiobufs;
  66
  67 static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
  68
  69 module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
  70                   &ipath_kpiobufs, S_IWUSR | S_IRUGO);
  71 MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
  72
  73 /**
  74  * create_port0_egr - allocate the eager TID buffers
  75  * @dd: the infinipath device
  76  *
  77  * This code is now quite different for user and kernel, because
  78  * the kernel uses skb's, for the accelerated network performance.
  79  * This is the kernel (port0) version.
  80  *
  81  * Allocate the eager TID buffers and program them into infinipath.
  82  * We use the network layer alloc_skb() allocator to allocate the
  83  * memory, and either use the buffers as is for things like verbs
  84  * packets, or pass the buffers up to the ipath layered driver and
  85  * thence the network layer, replacing them as we do so (see
  86  * ipath_rcv_layer()).
  87  */
  88 static int create_port0_egr(struct ipath_devdata *dd)
  89 {
  90         unsigned e, egrcnt;
  91         struct ipath_skbinfo *skbinfo;
  92         int ret;
  93
  94         egrcnt = dd->ipath_rcvegrcnt;
  95
  96         skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt);
  97         if (skbinfo == NULL) {
  98                 ipath_dev_err(dd, "allocation error for eager TID "
  99                               "skb array\n");
 100                 ret = -ENOMEM;
 101                 goto bail;
 102         }
 103         for (e = 0; e < egrcnt; e++) {
 104                 /*
 105                  * This is a bit tricky in that we allocate extra
 106                  * space for 2 bytes of the 14 byte ethernet header.
 107                  * These two bytes are passed in the ipath header so
 108                  * the rest of the data is word aligned.  We allocate
 109                  * 4 bytes so that the data buffer stays word aligned.
 110                  * See ipath_kreceive() for more details.
 111                  */
 112                 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL);
 113                 if (!skbinfo[e].skb) {
 114                         ipath_dev_err(dd, "SKB allocation error for "
 115                                       "eager TID %u\n", e);
 116                         while (e != 0)
 117                                 dev_kfree_skb(skbinfo[--e].skb);
 118                         vfree(skbinfo);
 119                         ret = -ENOMEM;
 120                         goto bail;
 121                 }
 122         }
 123         /*
 124          * After loop above, so we can test non-NULL to see if ready
 125          * to use at receive, etc.
 126          */
 127         dd->ipath_port0_skbinfo = skbinfo;
 128
 129         for (e = 0; e < egrcnt; e++) {
 130                 dd->ipath_port0_skbinfo[e].phys =
 131                   ipath_map_single(dd->pcidev,
 132                                    dd->ipath_port0_skbinfo[e].skb->data,
 133                                    dd->ipath_ibmaxlen, PCI_DMA_FROMDEVICE);
 134                 dd->ipath_f_put_tid(dd, e + (u64 __iomem *)
 135                                     ((char __iomem *) dd->ipath_kregbase +
 136                                      dd->ipath_rcvegrbase), 0,
 137                                     dd->ipath_port0_skbinfo[e].phys);
 138         }
 139
 140         ret = 0;
 141
 142 bail:
 143         return ret;
 144 }
 145
 146 static int bringup_link(struct ipath_devdata *dd)
 147 {
 148         u64 val, ibc;
 149         int ret = 0;
 150
 151         /* hold IBC in reset */
 152         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
 153         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 154                          dd->ipath_control);
 155
 156         /*
 157          * Note that prior to try 14 or 15 of IB, the credit scaling
 158          * wasn't working, because it was swapped for writes with the
 159          * 1 bit default linkstate field
 160          */
 161
 162         /* ignore pbc and align word */
 163         val = dd->ipath_piosize2k - 2 * sizeof(u32);
 164         /*
 165          * for ICRC, which we only send in diag test pkt mode, and we
 166          * don't need to worry about that for mtu
 167          */
 168         val += 1;
 169         /*
 170          * Set the IBC maxpktlength to the size of our pio buffers the
 171          * maxpktlength is in words.  This is *not* the IB data MTU.
 172          */
 173         ibc = (val / sizeof(u32)) << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
 174         /* in KB */
 175         ibc |= 0x5ULL << INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT;
 176         /*
 177          * How often flowctrl sent.  More or less in usecs; balance against
 178          * watermark value, so that in theory senders always get a flow
 179          * control update in time to not let the IB link go idle.
 180          */
 181         ibc |= 0x3ULL << INFINIPATH_IBCC_FLOWCTRLPERIOD_SHIFT;
 182         /* max error tolerance */
 183         ibc |= 0xfULL << INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT;
 184         /* use "real" buffer space for */
 185         ibc |= 4ULL << INFINIPATH_IBCC_CREDITSCALE_SHIFT;
 186         /* IB credit flow control. */
 187         ibc |= 0xfULL << INFINIPATH_IBCC_OVERRUNTHRESHOLD_SHIFT;
 188         /* initially come up waiting for TS1, without sending anything. */
 189         dd->ipath_ibcctrl = ibc;
 190         /*
 191          * Want to start out with both LINKCMD and LINKINITCMD in NOP
 192          * (0 and 0).  Don't put linkinitcmd in ipath_ibcctrl, want that
 193          * to stay a NOP
 194          */
 195         ibc |= INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
 196                 INFINIPATH_IBCC_LINKINITCMD_SHIFT;
 197         ipath_cdbg(VERBOSE, "Writing 0x%llx to ibcctrl\n",
 198                    (unsigned long long) ibc);
 199         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc);
 200
 201         // be sure chip saw it
 202         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 203
 204         ret = dd->ipath_f_bringup_serdes(dd);
 205
 206         if (ret)
 207                 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, "
 208                          "not usable\n");
 209         else {
 210                 /* enable IBC */
 211                 dd->ipath_control |= INFINIPATH_C_LINKENABLE;
 212                 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 213                                  dd->ipath_control);
 214         }
 215
 216         return ret;
 217 }
 218
 219 static int init_chip_first(struct ipath_devdata *dd,
 220                            struct ipath_portdata **pdp)
 221 {
 222         struct ipath_portdata *pd = NULL;
 223         int ret = 0;
 224         u64 val;
 225
 226         /*
 227          * skip cfgports stuff because we are not allocating memory,
 228          * and we don't want problems if the portcnt changed due to
 229          * cfgports.  We do still check and report a difference, if
 230          * not same (should be impossible).
 231          */
 232         dd->ipath_portcnt =
 233                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
 234         if (!ipath_cfgports)
 235                 dd->ipath_cfgports = dd->ipath_portcnt;
 236         else if (ipath_cfgports <= dd->ipath_portcnt) {
 237                 dd->ipath_cfgports = ipath_cfgports;
 238                 ipath_dbg("Configured to use %u ports out of %u in chip\n",
 239                           dd->ipath_cfgports, dd->ipath_portcnt);
 240         } else {
 241                 dd->ipath_cfgports = dd->ipath_portcnt;
 242                 ipath_dbg("Tried to configured to use %u ports; chip "
 243                           "only supports %u\n", ipath_cfgports,
 244                           dd->ipath_portcnt);
 245         }
 246         /*
 247          * Allocate full portcnt array, rather than just cfgports, because
 248          * cleanup iterates across all possible ports.
 249          */
 250         dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt,
 251                                GFP_KERNEL);
 252
 253         if (!dd->ipath_pd) {
 254                 ipath_dev_err(dd, "Unable to allocate portdata array, "
 255                               "failing\n");
 256                 ret = -ENOMEM;
 257                 goto done;
 258         }
 259
 260         dd->ipath_lastegrheads = kzalloc(sizeof(*dd->ipath_lastegrheads)
 261                                          * dd->ipath_cfgports,
 262                                          GFP_KERNEL);
 263         dd->ipath_lastrcvhdrqtails =
 264                 kzalloc(sizeof(*dd->ipath_lastrcvhdrqtails)
 265                         * dd->ipath_cfgports, GFP_KERNEL);
 266
 267         if (!dd->ipath_lastegrheads || !dd->ipath_lastrcvhdrqtails) {
 268                 ipath_dev_err(dd, "Unable to allocate head arrays, "
 269                               "failing\n");
 270                 ret = -ENOMEM;
 271                 goto done;
 272         }
 273
 274         dd->ipath_pd[0] = kzalloc(sizeof(*pd), GFP_KERNEL);
 275
 276         if (!dd->ipath_pd[0]) {
 277                 ipath_dev_err(dd, "Unable to allocate portdata for port "
 278                               "0, failing\n");
 279                 ret = -ENOMEM;
 280                 goto done;
 281         }
 282         pd = dd->ipath_pd[0];
 283         pd->port_dd = dd;
 284         pd->port_port = 0;
 285         pd->port_cnt = 1;
 286         /* The port 0 pkey table is used by the layer interface. */
 287         pd->port_pkeys[0] = IPATH_DEFAULT_P_KEY;
 288         dd->ipath_rcvtidcnt =
 289                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
 290         dd->ipath_rcvtidbase =
 291                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
 292         dd->ipath_rcvegrcnt =
 293                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
 294         dd->ipath_rcvegrbase =
 295                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
 296         dd->ipath_palign =
 297                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
 298         dd->ipath_piobufbase =
 299                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase);
 300         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize);
 301         dd->ipath_piosize2k = val & ~0U;
 302         dd->ipath_piosize4k = val >> 32;
 303         dd->ipath_ibmtu = 4096; /* default to largest legal MTU */
 304         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt);
 305         dd->ipath_piobcnt2k = val & ~0U;
 306         dd->ipath_piobcnt4k = val >> 32;
 307         dd->ipath_pio2kbase =
 308                 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) +
 309                                  (dd->ipath_piobufbase & 0xffffffff));
 310         if (dd->ipath_piobcnt4k) {
 311                 dd->ipath_pio4kbase = (u32 __iomem *)
 312                         (((char __iomem *) dd->ipath_kregbase) +
 313                          (dd->ipath_piobufbase >> 32));
 314                 /*
 315                  * 4K buffers take 2 pages; we use roundup just to be
 316                  * paranoid; we calculate it once here, rather than on
 317                  * ever buf allocate
 318                  */
 319                 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k,
 320                                           dd->ipath_palign);
 321                 ipath_dbg("%u 2k(%x) piobufs @ %p, %u 4k(%x) @ %p "
 322                           "(%x aligned)\n",
 323                           dd->ipath_piobcnt2k, dd->ipath_piosize2k,
 324                           dd->ipath_pio2kbase, dd->ipath_piobcnt4k,
 325                           dd->ipath_piosize4k, dd->ipath_pio4kbase,
 326                           dd->ipath_4kalign);
 327         }
 328         else ipath_dbg("%u 2k piobufs @ %p\n",
 329                        dd->ipath_piobcnt2k, dd->ipath_pio2kbase);
 330
 331         spin_lock_init(&dd->ipath_tid_lock);
 332
 333 done:
 334         *pdp = pd;
 335         return ret;
 336 }
 337
 338 /**
 339  * init_chip_reset - re-initialize after a reset, or enable
 340  * @dd: the infinipath device
 341  * @pdp: output for port data
 342  *
 343  * sanity check at least some of the values after reset, and
 344  * ensure no receive or transmit (explictly, in case reset
 345  * failed
 346  */
 347 static int init_chip_reset(struct ipath_devdata *dd,
 348                            struct ipath_portdata **pdp)
 349 {
 350         u32 rtmp;
 351
 352         *pdp = dd->ipath_pd[0];
 353         /* ensure chip does no sends or receives while we re-initialize */
 354         dd->ipath_control = dd->ipath_sendctrl = dd->ipath_rcvctrl = 0U;
 355         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, 0);
 356         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0);
 357         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0);
 358
 359         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
 360         if (dd->ipath_portcnt != rtmp)
 361                 dev_info(&dd->pcidev->dev, "portcnt was %u before "
 362                          "reset, now %u, using original\n",
 363                          dd->ipath_portcnt, rtmp);
 364         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
 365         if (rtmp != dd->ipath_rcvtidcnt)
 366                 dev_info(&dd->pcidev->dev, "tidcnt was %u before "
 367                          "reset, now %u, using original\n",
 368                          dd->ipath_rcvtidcnt, rtmp);
 369         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
 370         if (rtmp != dd->ipath_rcvtidbase)
 371                 dev_info(&dd->pcidev->dev, "tidbase was %u before "
 372                          "reset, now %u, using original\n",
 373                          dd->ipath_rcvtidbase, rtmp);
 374         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
 375         if (rtmp != dd->ipath_rcvegrcnt)
 376                 dev_info(&dd->pcidev->dev, "egrcnt was %u before "
 377                          "reset, now %u, using original\n",
 378                          dd->ipath_rcvegrcnt, rtmp);
 379         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
 380         if (rtmp != dd->ipath_rcvegrbase)
 381                 dev_info(&dd->pcidev->dev, "egrbase was %u before "
 382                          "reset, now %u, using original\n",
 383                          dd->ipath_rcvegrbase, rtmp);
 384
 385         return 0;
 386 }
 387
 388 static int init_pioavailregs(struct ipath_devdata *dd)
 389 {
 390         int ret;
 391
 392         dd->ipath_pioavailregs_dma = dma_alloc_coherent(
 393                 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys,
 394                 GFP_KERNEL);
 395         if (!dd->ipath_pioavailregs_dma) {
 396                 ipath_dev_err(dd, "failed to allocate PIOavail reg area "
 397                               "in memory\n");
 398                 ret = -ENOMEM;
 399                 goto done;
 400         }
 401
 402         /*
 403          * we really want L2 cache aligned, but for current CPUs of
 404          * interest, they are the same.
 405          */
 406         dd->ipath_statusp = (u64 *)
 407                 ((char *)dd->ipath_pioavailregs_dma +
 408                  ((2 * L1_CACHE_BYTES +
 409                    dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
 410         /* copy the current value now that it's really allocated */
 411         *dd->ipath_statusp = dd->_ipath_status;
 412         /*
 413          * setup buffer to hold freeze msg, accessible to apps,
 414          * following statusp
 415          */
 416         dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1];
 417         /* and its length */
 418         dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]);
 419
 420         ret = 0;
 421
 422 done:
 423         return ret;
 424 }
 425
 426 /**
 427  * init_shadow_tids - allocate the shadow TID array
 428  * @dd: the infinipath device
 429  *
 430  * allocate the shadow TID array, so we can ipath_munlock previous
 431  * entries.  It may make more sense to move the pageshadow to the
 432  * port data structure, so we only allocate memory for ports actually
 433  * in use, since we at 8k per port, now.
 434  */
 435 static void init_shadow_tids(struct ipath_devdata *dd)
 436 {
 437         struct page **pages;
 438         dma_addr_t *addrs;
 439
 440         pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
 441                         sizeof(struct page *));
 442         if (!pages) {
 443                 ipath_dev_err(dd, "failed to allocate shadow page * "
 444                               "array, no expected sends!\n");
 445                 dd->ipath_pageshadow = NULL;
 446                 return;
 447         }
 448
 449         addrs = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
 450                         sizeof(dma_addr_t));
 451         if (!addrs) {
 452                 ipath_dev_err(dd, "failed to allocate shadow dma handle "
 453                               "array, no expected sends!\n");
 454                 vfree(dd->ipath_pageshadow);
 455                 dd->ipath_pageshadow = NULL;
 456                 return;
 457         }
 458
 459         memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt *
 460                sizeof(struct page *));
 461
 462         dd->ipath_pageshadow = pages;
 463         dd->ipath_physshadow = addrs;
 464 }
 465
 466 static void enable_chip(struct ipath_devdata *dd,
 467                         struct ipath_portdata *pd, int reinit)
 468 {
 469         u32 val;
 470         int i;
 471
 472         if (!reinit)
 473                 init_waitqueue_head(&ipath_state_wait);
 474
 475         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 476                          dd->ipath_rcvctrl);
 477
 478         /* Enable PIO send, and update of PIOavail regs to memory. */
 479         dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE |
 480                 INFINIPATH_S_PIOBUFAVAILUPD;
 481         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 482                          dd->ipath_sendctrl);
 483
 484         /*
 485          * enable port 0 receive, and receive interrupt.  other ports
 486          * done as user opens and inits them.
 487          */
 488         dd->ipath_rcvctrl = INFINIPATH_R_TAILUPD |
 489                 (1ULL << INFINIPATH_R_PORTENABLE_SHIFT) |
 490                 (1ULL << INFINIPATH_R_INTRAVAIL_SHIFT);
 491         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 492                          dd->ipath_rcvctrl);
 493
 494         /*
 495          * now ready for use.  this should be cleared whenever we
 496          * detect a reset, or initiate one.
 497          */
 498         dd->ipath_flags |= IPATH_INITTED;
 499
 500         /*
 501          * init our shadow copies of head from tail values, and write
 502          * head values to match.
 503          */
 504         val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
 505         (void)ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
 506         dd->ipath_port0head = ipath_read_ureg32(dd, ur_rcvhdrtail, 0);
 507
 508         /* Initialize so we interrupt on next packet received */
 509         (void)ipath_write_ureg(dd, ur_rcvhdrhead,
 510                                dd->ipath_rhdrhead_intr_off |
 511                                dd->ipath_port0head, 0);
 512
 513         /*
 514          * by now pioavail updates to memory should have occurred, so
 515          * copy them into our working/shadow registers; this is in
 516          * case something went wrong with abort, but mostly to get the
 517          * initial values of the generation bit correct.
 518          */
 519         for (i = 0; i < dd->ipath_pioavregs; i++) {
 520                 __le64 val;
 521
 522                 /*
 523                  * Chip Errata bug 6641; even and odd qwords>3 are swapped.
 524                  */
 525                 if (i > 3) {
 526                         if (i & 1)
 527                                 val = dd->ipath_pioavailregs_dma[i - 1];
 528                         else
 529                                 val = dd->ipath_pioavailregs_dma[i + 1];
 530                 }
 531                 else
 532                         val = dd->ipath_pioavailregs_dma[i];
 533                 dd->ipath_pioavailshadow[i] = le64_to_cpu(val);
 534         }
 535         /* can get counters, stats, etc. */
 536         dd->ipath_flags |= IPATH_PRESENT;
 537 }
 538
 539 static int init_housekeeping(struct ipath_devdata *dd,
 540                              struct ipath_portdata **pdp, int reinit)
 541 {
 542         char boardn[32];
 543         int ret = 0;
 544
 545         /*
 546          * have to clear shadow copies of registers at init that are
 547          * not otherwise set here, or all kinds of bizarre things
 548          * happen with driver on chip reset
 549          */
 550         dd->ipath_rcvhdrsize = 0;
 551
 552         /*
 553          * Don't clear ipath_flags as 8bit mode was set before
 554          * entering this func. However, we do set the linkstate to
 555          * unknown, so we can watch for a transition.
 556          * PRESENT is set because we want register reads to work,
 557          * and the kernel infrastructure saw it in config space;
 558          * We clear it if we have failures.
 559          */
 560         dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
 561         dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
 562                              IPATH_LINKDOWN | IPATH_LINKINIT);
 563
 564         ipath_cdbg(VERBOSE, "Try to read spc chip revision\n");
 565         dd->ipath_revision =
 566                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
 567
 568         /*
 569          * set up fundamental info we need to use the chip; we assume
 570          * if the revision reg and these regs are OK, we don't need to
 571          * special case the rest
 572          */
 573         dd->ipath_sregbase =
 574                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase);
 575         dd->ipath_cregbase =
 576                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase);
 577         dd->ipath_uregbase =
 578                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase);
 579         ipath_cdbg(VERBOSE, "ipath_kregbase %p, sendbase %x usrbase %x, "
 580                    "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase,
 581                    dd->ipath_uregbase, dd->ipath_cregbase);
 582         if ((dd->ipath_revision & 0xffffffff) == 0xffffffff
 583             || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff
 584             || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff
 585             || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
 586                 ipath_dev_err(dd, "Register read failures from chip, "
 587                               "giving up initialization\n");
 588                 dd->ipath_flags &= ~IPATH_PRESENT;
 589                 ret = -ENODEV;
 590                 goto done;
 591         }
 592
 593         /* clear the initial reset flag, in case first driver load */
 594         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
 595                          INFINIPATH_E_RESET);
 596
 597         if (reinit)
 598                 ret = init_chip_reset(dd, pdp);
 599         else
 600                 ret = init_chip_first(dd, pdp);
 601
 602         if (ret)
 603                 goto done;
 604
 605         ipath_cdbg(VERBOSE, "Revision %llx (PCI %x), %u ports, %u tids, "
 606                    "%u egrtids\n", (unsigned long long) dd->ipath_revision,
 607                    dd->ipath_pcirev, dd->ipath_portcnt, dd->ipath_rcvtidcnt,
 608                    dd->ipath_rcvegrcnt);
 609
 610         if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) &
 611              INFINIPATH_R_SOFTWARE_MASK) != IPATH_CHIP_SWVERSION) {
 612                 ipath_dev_err(dd, "Driver only handles version %d, "
 613                               "chip swversion is %d (%llx), failng\n",
 614                               IPATH_CHIP_SWVERSION,
 615                               (int)(dd->ipath_revision >>
 616                                     INFINIPATH_R_SOFTWARE_SHIFT) &
 617                               INFINIPATH_R_SOFTWARE_MASK,
 618                               (unsigned long long) dd->ipath_revision);
 619                 ret = -ENOSYS;
 620                 goto done;
 621         }
 622         dd->ipath_majrev = (u8) ((dd->ipath_revision >>
 623                                   INFINIPATH_R_CHIPREVMAJOR_SHIFT) &
 624                                  INFINIPATH_R_CHIPREVMAJOR_MASK);
 625         dd->ipath_minrev = (u8) ((dd->ipath_revision >>
 626                                   INFINIPATH_R_CHIPREVMINOR_SHIFT) &
 627                                  INFINIPATH_R_CHIPREVMINOR_MASK);
 628         dd->ipath_boardrev = (u8) ((dd->ipath_revision >>
 629                                     INFINIPATH_R_BOARDID_SHIFT) &
 630                                    INFINIPATH_R_BOARDID_MASK);
 631
 632         ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn);
 633
 634         snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion),
 635                  "Driver %u.%u, %s, InfiniPath%u %u.%u, PCI %u, "
 636                  "SW Compat %u\n",
 637                  IPATH_CHIP_VERS_MAJ, IPATH_CHIP_VERS_MIN, boardn,
 638                  (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) &
 639                  INFINIPATH_R_ARCH_MASK,
 640                  dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev,
 641                  (unsigned)(dd->ipath_revision >>
 642                             INFINIPATH_R_SOFTWARE_SHIFT) &
 643                  INFINIPATH_R_SOFTWARE_MASK);
 644
 645         ipath_dbg("%s", dd->ipath_boardversion);
 646
 647 done:
 648         return ret;
 649 }
 650
 651
 652 /**
 653  * ipath_init_chip - do the actual initialization sequence on the chip
 654  * @dd: the infinipath device
 655  * @reinit: reinitializing, so don't allocate new memory
 656  *
 657  * Do the actual initialization sequence on the chip.  This is done
 658  * both from the init routine called from the PCI infrastructure, and
 659  * when we reset the chip, or detect that it was reset internally,
 660  * or it's administratively re-enabled.
 661  *
 662  * Memory allocation here and in called routines is only done in
 663  * the first case (reinit == 0).  We have to be careful, because even
 664  * without memory allocation, we need to re-write all the chip registers
 665  * TIDs, etc. after the reset or enable has completed.
 666  */
 667 int ipath_init_chip(struct ipath_devdata *dd, int reinit)
 668 {
 669         int ret = 0, i;
 670         u32 val32, kpiobufs;
 671         u32 piobufs, uports;
 672         u64 val;
 673         struct ipath_portdata *pd = NULL; /* keep gcc4 happy */
 674         gfp_t gfp_flags = GFP_USER | __GFP_COMP;
 675
 676         ret = init_housekeeping(dd, &pd, reinit);
 677         if (ret)
 678                 goto done;
 679
 680         /*
 681          * we ignore most issues after reporting them, but have to specially
 682          * handle hardware-disabled chips.
 683          */
 684         if (ret == 2) {
 685                 /* unique error, known to ipath_init_one */
 686                 ret = -EPERM;
 687                 goto done;
 688         }
 689
 690         /*
 691          * We could bump this to allow for full rcvegrcnt + rcvtidcnt,
 692          * but then it no longer nicely fits power of two, and since
 693          * we now use routines that backend onto __get_free_pages, the
 694          * rest would be wasted.
 695          */
 696         dd->ipath_rcvhdrcnt = dd->ipath_rcvegrcnt;
 697         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt,
 698                          dd->ipath_rcvhdrcnt);
 699
 700         /*
 701          * Set up the shadow copies of the piobufavail registers,
 702          * which we compare against the chip registers for now, and
 703          * the in memory DMA'ed copies of the registers.  This has to
 704          * be done early, before we calculate lastport, etc.
 705          */
 706         piobufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
 707         /*
 708          * calc number of pioavail registers, and save it; we have 2
 709          * bits per buffer.
 710          */
 711         dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2)
 712                 / (sizeof(u64) * BITS_PER_BYTE / 2);
 713         uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0;
 714         if (ipath_kpiobufs == 0) {
 715                 /* not set by user (this is default) */
 716                 if (piobufs >= (uports * IPATH_MIN_USER_PORT_BUFCNT) + 32)
 717                         kpiobufs = 32;
 718                 else
 719                         kpiobufs = 16;
 720         }
 721         else
 722                 kpiobufs = ipath_kpiobufs;
 723
 724         if (kpiobufs + (uports * IPATH_MIN_USER_PORT_BUFCNT) > piobufs) {
 725                 i = (int) piobufs -
 726                         (int) (uports * IPATH_MIN_USER_PORT_BUFCNT);
 727                 if (i < 0)
 728                         i = 0;
 729                 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of "
 730                          "%d for kernel leaves too few for %d user ports "
 731                          "(%d each); using %u\n", kpiobufs,
 732                          piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i);
 733                 /*
 734                  * shouldn't change ipath_kpiobufs, because could be
 735                  * different for different devices...
 736                  */
 737                 kpiobufs = i;
 738         }
 739         dd->ipath_lastport_piobuf = piobufs - kpiobufs;
 740         dd->ipath_pbufsport =
 741                 uports ? dd->ipath_lastport_piobuf / uports : 0;
 742         val32 = dd->ipath_lastport_piobuf - (dd->ipath_pbufsport * uports);
 743         if (val32 > 0) {
 744                 ipath_dbg("allocating %u pbufs/port leaves %u unused, "
 745                           "add to kernel\n", dd->ipath_pbufsport, val32);
 746                 dd->ipath_lastport_piobuf -= val32;
 747                 ipath_dbg("%u pbufs/port leaves %u unused, add to kernel\n",
 748                           dd->ipath_pbufsport, val32);
 749         }
 750         dd->ipath_lastpioindex = dd->ipath_lastport_piobuf;
 751         ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
 752                    "each for %u user ports\n", kpiobufs,
 753                    piobufs, dd->ipath_pbufsport, uports);
 754
 755         dd->ipath_f_early_init(dd);
 756
 757         /* early_init sets rcvhdrentsize and rcvhdrsize, so this must be
 758          * done after early_init */
 759         dd->ipath_hdrqlast =
 760                 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1);
 761         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize,
 762                          dd->ipath_rcvhdrentsize);
 763         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
 764                          dd->ipath_rcvhdrsize);
 765
 766         if (!reinit) {
 767                 ret = init_pioavailregs(dd);
 768                 init_shadow_tids(dd);
 769                 if (ret)
 770                         goto done;
 771         }
 772
 773         (void)ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
 774                                dd->ipath_pioavailregs_phys);
 775         /*
 776          * this is to detect s/w errors, which the h/w works around by
 777          * ignoring the low 6 bits of address, if it wasn't aligned.
 778          */
 779         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr);
 780         if (val != dd->ipath_pioavailregs_phys) {
 781                 ipath_dev_err(dd, "Catastrophic software error, "
 782                               "SendPIOAvailAddr written as %lx, "
 783                               "read back as %llx\n",
 784                               (unsigned long) dd->ipath_pioavailregs_phys,
 785                               (unsigned long long) val);
 786                 ret = -EINVAL;
 787                 goto done;
 788         }
 789
 790         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP);
 791
 792         /*
 793          * make sure we are not in freeze, and PIO send enabled, so
 794          * writes to pbc happen
 795          */
 796         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL);
 797         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
 798                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
 799         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
 800         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 801                          INFINIPATH_S_PIOENABLE);
 802
 803         /*
 804          * before error clears, since we expect serdes pll errors during
 805          * this, the first time after reset
 806          */
 807         if (bringup_link(dd)) {
 808                 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n");
 809                 ret = -ENETDOWN;
 810                 goto done;
 811         }
 812
 813         /*
 814          * clear any "expected" hwerrs from reset and/or initialization
 815          * clear any that aren't enabled (at least this once), and then
 816          * set the enable mask
 817          */
 818         dd->ipath_f_init_hwerrors(dd);
 819         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
 820                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
 821         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
 822                          dd->ipath_hwerrmask);
 823
 824         dd->ipath_maskederrs = dd->ipath_ignorederrs;
 825         /* clear all */
 826         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
 827         /* enable errors that are masked, at least this first time. */
 828         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 829                          ~dd->ipath_maskederrs);
 830         /* clear any interrups up to this point (ints still not enabled) */
 831         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
 832
 833         /*
 834          * Set up the port 0 (kernel) rcvhdr q and egr TIDs.  If doing
 835          * re-init, the simplest way to handle this is to free
 836          * existing, and re-allocate.
 837          */
 838         if (reinit) {
 839                 struct ipath_portdata *pd = dd->ipath_pd[0];
 840                 dd->ipath_pd[0] = NULL;
 841                 ipath_free_pddata(dd, pd);
 842         }
 843         dd->ipath_f_tidtemplate(dd);
 844         ret = ipath_create_rcvhdrq(dd, pd);
 845         if (!ret) {
 846                 dd->ipath_hdrqtailptr =
 847                         (volatile __le64 *)pd->port_rcvhdrtail_kvaddr;
 848                 ret = create_port0_egr(dd);
 849         }
 850         if (ret)
 851                 ipath_dev_err(dd, "failed to allocate port 0 (kernel) "
 852                               "rcvhdrq and/or egr bufs\n");
 853         else
 854                 enable_chip(dd, pd, reinit);
 855
 856
 857         if (!ret && !reinit) {
 858             /* used when we close a port, for DMA already in flight at close */
 859                 dd->ipath_dummy_hdrq = dma_alloc_coherent(
 860                         &dd->pcidev->dev, pd->port_rcvhdrq_size,
 861                         &dd->ipath_dummy_hdrq_phys,
 862                         gfp_flags);
 863                 if (!dd->ipath_dummy_hdrq ) {
 864                         dev_info(&dd->pcidev->dev,
 865                                 "Couldn't allocate 0x%lx bytes for dummy hdrq\n",
 866                                 pd->port_rcvhdrq_size);
 867                         /* fallback to just 0'ing */
 868                         dd->ipath_dummy_hdrq_phys = 0UL;
 869                 }
 870         }
 871
 872         /*
 873          * cause retrigger of pending interrupts ignored during init,
 874          * even if we had errors
 875          */
 876         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
 877
 878         if(!dd->ipath_stats_timer_active) {
 879                 /*
 880                  * first init, or after an admin disable/enable
 881                  * set up stats retrieval timer, even if we had errors
 882                  * in last portion of setup
 883                  */
 884                 init_timer(&dd->ipath_stats_timer);
 885                 dd->ipath_stats_timer.function = ipath_get_faststats;
 886                 dd->ipath_stats_timer.data = (unsigned long) dd;
 887                 /* every 5 seconds; */
 888                 dd->ipath_stats_timer.expires = jiffies + 5 * HZ;
 889                 /* takes ~16 seconds to overflow at full IB 4x bandwdith */
 890                 add_timer(&dd->ipath_stats_timer);
 891                 dd->ipath_stats_timer_active = 1;
 892         }
 893
 894 done:
 895         if (!ret) {
 896                 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT;
 897                 if (!dd->ipath_f_intrsetup(dd)) {
 898                         /* now we can enable all interrupts from the chip */
 899                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 900                                          -1LL);
 901                         /* force re-interrupt of any pending interrupts. */
 902                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear,
 903                                          0ULL);
 904                         /* chip is usable; mark it as initialized */
 905                         *dd->ipath_statusp |= IPATH_STATUS_INITTED;
 906                 } else
 907                         ipath_dev_err(dd, "No interrupts enabled, couldn't "
 908                                       "setup interrupt address\n");
 909
 910                 if (dd->ipath_cfgports > ipath_stats.sps_nports)
 911                         /*
 912                          * sps_nports is a global, so, we set it to
 913                          * the highest number of ports of any of the
 914                          * chips we find; we never decrement it, at
 915                          * least for now.  Since this might have changed
 916                          * over disable/enable or prior to reset, always
 917                          * do the check and potentially adjust.
 918                          */
 919                         ipath_stats.sps_nports = dd->ipath_cfgports;
 920         } else
 921                 ipath_dbg("Failed (%d) to initialize chip\n", ret);
 922
 923         /* if ret is non-zero, we probably should do some cleanup
 924            here... */
 925         return ret;
 926 }
 927
 928 static int ipath_set_kpiobufs(const char *str, struct kernel_param *kp)
 929 {
 930         struct ipath_devdata *dd;
 931         unsigned long flags;
 932         unsigned short val;
 933         int ret;
 934
 935         ret = ipath_parse_ushort(str, &val);
 936
 937         spin_lock_irqsave(&ipath_devs_lock, flags);
 938
 939         if (ret < 0)
 940                 goto bail;
 941
 942         if (val == 0) {
 943                 ret = -EINVAL;
 944                 goto bail;
 945         }
 946
 947         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 948                 if (dd->ipath_kregbase)
 949                         continue;
 950                 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
 951                            (dd->ipath_cfgports *
 952                             IPATH_MIN_USER_PORT_BUFCNT)))
 953                 {
 954                         ipath_dev_err(
 955                                 dd,
 956                                 "Allocating %d PIO bufs for kernel leaves "
 957                                 "too few for %d user ports (%d each)\n",
 958                                 val, dd->ipath_cfgports - 1,
 959                                 IPATH_MIN_USER_PORT_BUFCNT);
 960                         ret = -EINVAL;
 961                         goto bail;
 962                 }
 963                 dd->ipath_lastport_piobuf =
 964                         dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val;
 965         }
 966
 967         ipath_kpiobufs = val;
 968         ret = 0;
 969 bail:
 970         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 971
 972         return ret;
 973 }