IB/ipath: iterate over correct number of ports during reset
[safe/jmp/linux-2.6] / drivers / infiniband / hw / ipath / ipath_driver.c
1 /*
2  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <linux/spinlock.h>
34 #include <linux/idr.h>
35 #include <linux/pci.h>
36 #include <linux/delay.h>
37 #include <linux/netdevice.h>
38 #include <linux/vmalloc.h>
39
40 #include "ipath_kernel.h"
41 #include "ips_common.h"
42 #include "ipath_layer.h"
43
44 static void ipath_update_pio_bufs(struct ipath_devdata *);
45
46 const char *ipath_get_unit_name(int unit)
47 {
48         static char iname[16];
49         snprintf(iname, sizeof iname, "infinipath%u", unit);
50         return iname;
51 }
52
53 EXPORT_SYMBOL_GPL(ipath_get_unit_name);
54
55 #define DRIVER_LOAD_MSG "PathScale " IPATH_DRV_NAME " loaded: "
56 #define PFX IPATH_DRV_NAME ": "
57
58 /*
59  * The size has to be longer than this string, so we can append
60  * board/chip information to it in the init code.
61  */
62 const char ipath_core_version[] = IPATH_IDSTR "\n";
63
64 static struct idr unit_table;
65 DEFINE_SPINLOCK(ipath_devs_lock);
66 LIST_HEAD(ipath_dev_list);
67
68 wait_queue_head_t ipath_sma_state_wait;
69
70 unsigned ipath_debug = __IPATH_INFO;
71
72 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
73 MODULE_PARM_DESC(debug, "mask for debug prints");
74 EXPORT_SYMBOL_GPL(ipath_debug);
75
76 MODULE_LICENSE("GPL");
77 MODULE_AUTHOR("PathScale <support@pathscale.com>");
78 MODULE_DESCRIPTION("Pathscale InfiniPath driver");
79
80 const char *ipath_ibcstatus_str[] = {
81         "Disabled",
82         "LinkUp",
83         "PollActive",
84         "PollQuiet",
85         "SleepDelay",
86         "SleepQuiet",
87         "LState6",              /* unused */
88         "LState7",              /* unused */
89         "CfgDebounce",
90         "CfgRcvfCfg",
91         "CfgWaitRmt",
92         "CfgIdle",
93         "RecovRetrain",
94         "LState0xD",            /* unused */
95         "RecovWaitRmt",
96         "RecovIdle",
97 };
98
99 /*
100  * These variables are initialized in the chip-specific files
101  * but are defined here.
102  */
103 u16 ipath_gpio_sda_num, ipath_gpio_scl_num;
104 u64 ipath_gpio_sda, ipath_gpio_scl;
105 u64 infinipath_i_bitsextant;
106 ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
107 u32 infinipath_i_rcvavail_mask, infinipath_i_rcvurg_mask;
108
109 static void __devexit ipath_remove_one(struct pci_dev *);
110 static int __devinit ipath_init_one(struct pci_dev *,
111                                     const struct pci_device_id *);
112
113 /* Only needed for registration, nothing else needs this info */
114 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
115 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
116 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
117
118 static const struct pci_device_id ipath_pci_tbl[] = {
119         {PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE,
120                     PCI_DEVICE_ID_INFINIPATH_HT)},
121         {PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE,
122                     PCI_DEVICE_ID_INFINIPATH_PE800)},
123 };
124
125 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
126
127 static struct pci_driver ipath_driver = {
128         .name = IPATH_DRV_NAME,
129         .probe = ipath_init_one,
130         .remove = __devexit_p(ipath_remove_one),
131         .id_table = ipath_pci_tbl,
132 };
133
134 /*
135  * This is where port 0's rcvhdrtail register is written back; we also
136  * want nothing else sharing the cache line, so make it a cache line
137  * in size.  Used for all units.
138  */
139 volatile __le64 *ipath_port0_rcvhdrtail;
140 dma_addr_t ipath_port0_rcvhdrtail_dma;
141 static int port0_rcvhdrtail_refs;
142
143 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
144                              u32 *bar0, u32 *bar1)
145 {
146         int ret;
147
148         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
149         if (ret)
150                 ipath_dev_err(dd, "failed to read bar0 before enable: "
151                               "error %d\n", -ret);
152
153         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
154         if (ret)
155                 ipath_dev_err(dd, "failed to read bar1 before enable: "
156                               "error %d\n", -ret);
157
158         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
159 }
160
161 static void ipath_free_devdata(struct pci_dev *pdev,
162                                struct ipath_devdata *dd)
163 {
164         unsigned long flags;
165
166         pci_set_drvdata(pdev, NULL);
167
168         if (dd->ipath_unit != -1) {
169                 spin_lock_irqsave(&ipath_devs_lock, flags);
170                 idr_remove(&unit_table, dd->ipath_unit);
171                 list_del(&dd->ipath_list);
172                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
173         }
174         dma_free_coherent(&pdev->dev, sizeof(*dd), dd, dd->ipath_dma_addr);
175 }
176
177 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
178 {
179         unsigned long flags;
180         struct ipath_devdata *dd;
181         dma_addr_t dma_addr;
182         int ret;
183
184         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
185                 dd = ERR_PTR(-ENOMEM);
186                 goto bail;
187         }
188
189         dd = dma_alloc_coherent(&pdev->dev, sizeof(*dd), &dma_addr,
190                                 GFP_KERNEL);
191
192         if (!dd) {
193                 dd = ERR_PTR(-ENOMEM);
194                 goto bail;
195         }
196
197         dd->ipath_dma_addr = dma_addr;
198         dd->ipath_unit = -1;
199
200         spin_lock_irqsave(&ipath_devs_lock, flags);
201
202         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
203         if (ret < 0) {
204                 printk(KERN_ERR IPATH_DRV_NAME
205                        ": Could not allocate unit ID: error %d\n", -ret);
206                 ipath_free_devdata(pdev, dd);
207                 dd = ERR_PTR(ret);
208                 goto bail_unlock;
209         }
210
211         dd->pcidev = pdev;
212         pci_set_drvdata(pdev, dd);
213
214         list_add(&dd->ipath_list, &ipath_dev_list);
215
216 bail_unlock:
217         spin_unlock_irqrestore(&ipath_devs_lock, flags);
218
219 bail:
220         return dd;
221 }
222
223 static inline struct ipath_devdata *__ipath_lookup(int unit)
224 {
225         return idr_find(&unit_table, unit);
226 }
227
228 struct ipath_devdata *ipath_lookup(int unit)
229 {
230         struct ipath_devdata *dd;
231         unsigned long flags;
232
233         spin_lock_irqsave(&ipath_devs_lock, flags);
234         dd = __ipath_lookup(unit);
235         spin_unlock_irqrestore(&ipath_devs_lock, flags);
236
237         return dd;
238 }
239
240 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
241 {
242         int nunits, npresent, nup;
243         struct ipath_devdata *dd;
244         unsigned long flags;
245         u32 maxports;
246
247         nunits = npresent = nup = maxports = 0;
248
249         spin_lock_irqsave(&ipath_devs_lock, flags);
250
251         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
252                 nunits++;
253                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
254                         npresent++;
255                 if (dd->ipath_lid &&
256                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
257                                          | IPATH_LINKUNK)))
258                         nup++;
259                 if (dd->ipath_cfgports > maxports)
260                         maxports = dd->ipath_cfgports;
261         }
262
263         spin_unlock_irqrestore(&ipath_devs_lock, flags);
264
265         if (npresentp)
266                 *npresentp = npresent;
267         if (nupp)
268                 *nupp = nup;
269         if (maxportsp)
270                 *maxportsp = maxports;
271
272         return nunits;
273 }
274
275 static int init_port0_rcvhdrtail(struct pci_dev *pdev)
276 {
277         int ret;
278
279         mutex_lock(&ipath_mutex);
280
281         if (!ipath_port0_rcvhdrtail) {
282                 ipath_port0_rcvhdrtail =
283                         dma_alloc_coherent(&pdev->dev,
284                                            IPATH_PORT0_RCVHDRTAIL_SIZE,
285                                            &ipath_port0_rcvhdrtail_dma,
286                                            GFP_KERNEL);
287
288                 if (!ipath_port0_rcvhdrtail) {
289                         ret = -ENOMEM;
290                         goto bail;
291                 }
292         }
293         port0_rcvhdrtail_refs++;
294         ret = 0;
295
296 bail:
297         mutex_unlock(&ipath_mutex);
298
299         return ret;
300 }
301
302 static void cleanup_port0_rcvhdrtail(struct pci_dev *pdev)
303 {
304         mutex_lock(&ipath_mutex);
305
306         if (!--port0_rcvhdrtail_refs) {
307                 dma_free_coherent(&pdev->dev, IPATH_PORT0_RCVHDRTAIL_SIZE,
308                                   (void *) ipath_port0_rcvhdrtail,
309                                   ipath_port0_rcvhdrtail_dma);
310                 ipath_port0_rcvhdrtail = NULL;
311         }
312
313         mutex_unlock(&ipath_mutex);
314 }
315
316 /*
317  * These next two routines are placeholders in case we don't have per-arch
318  * code for controlling write combining.  If explicit control of write
319  * combining is not available, performance will probably be awful.
320  */
321
322 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
323 {
324         return -EOPNOTSUPP;
325 }
326
327 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
328 {
329 }
330
331 static int __devinit ipath_init_one(struct pci_dev *pdev,
332                                     const struct pci_device_id *ent)
333 {
334         int ret, len, j;
335         struct ipath_devdata *dd;
336         unsigned long long addr;
337         u32 bar0 = 0, bar1 = 0;
338         u8 rev;
339
340         ret = init_port0_rcvhdrtail(pdev);
341         if (ret < 0) {
342                 printk(KERN_ERR IPATH_DRV_NAME
343                        ": Could not allocate port0_rcvhdrtail: error %d\n",
344                        -ret);
345                 goto bail;
346         }
347
348         dd = ipath_alloc_devdata(pdev);
349         if (IS_ERR(dd)) {
350                 ret = PTR_ERR(dd);
351                 printk(KERN_ERR IPATH_DRV_NAME
352                        ": Could not allocate devdata: error %d\n", -ret);
353                 goto bail_rcvhdrtail;
354         }
355
356         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
357
358         read_bars(dd, pdev, &bar0, &bar1);
359
360         ret = pci_enable_device(pdev);
361         if (ret) {
362                 /* This can happen iff:
363                  *
364                  * We did a chip reset, and then failed to reprogram the
365                  * BAR, or the chip reset due to an internal error.  We then
366                  * unloaded the driver and reloaded it.
367                  *
368                  * Both reset cases set the BAR back to initial state.  For
369                  * the latter case, the AER sticky error bit at offset 0x718
370                  * should be set, but the Linux kernel doesn't yet know
371                  * about that, it appears.  If the original BAR was retained
372                  * in the kernel data structures, this may be OK.
373                  */
374                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
375                               dd->ipath_unit, -ret);
376                 goto bail_devdata;
377         }
378         addr = pci_resource_start(pdev, 0);
379         len = pci_resource_len(pdev, 0);
380         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %x, vend %x/%x "
381                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
382                    ent->device, ent->driver_data);
383
384         read_bars(dd, pdev, &bar0, &bar1);
385
386         if (!bar1 && !(bar0 & ~0xf)) {
387                 if (addr) {
388                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
389                                  "rewriting as %llx\n", addr);
390                         ret = pci_write_config_dword(
391                                 pdev, PCI_BASE_ADDRESS_0, addr);
392                         if (ret) {
393                                 ipath_dev_err(dd, "rewrite of BAR0 "
394                                               "failed: err %d\n", -ret);
395                                 goto bail_disable;
396                         }
397                         ret = pci_write_config_dword(
398                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
399                         if (ret) {
400                                 ipath_dev_err(dd, "rewrite of BAR1 "
401                                               "failed: err %d\n", -ret);
402                                 goto bail_disable;
403                         }
404                 } else {
405                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
406                                       "not usable until reboot\n");
407                         ret = -ENODEV;
408                         goto bail_disable;
409                 }
410         }
411
412         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
413         if (ret) {
414                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
415                          "err %d\n", dd->ipath_unit, -ret);
416                 goto bail_disable;
417         }
418
419         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
420         if (ret) {
421                 /*
422                  * if the 64 bit setup fails, try 32 bit.  Some systems
423                  * do not setup 64 bit maps on systems with 2GB or less
424                  * memory installed.
425                  */
426                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
427                 if (ret) {
428                         dev_info(&pdev->dev, "pci_set_dma_mask unit %u "
429                                  "fails: %d\n", dd->ipath_unit, ret);
430                         goto bail_regions;
431                 }
432                 else
433                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
434         }
435
436         pci_set_master(pdev);
437
438         /*
439          * Save BARs to rewrite after device reset.  Save all 64 bits of
440          * BAR, just in case.
441          */
442         dd->ipath_pcibar0 = addr;
443         dd->ipath_pcibar1 = addr >> 32;
444         dd->ipath_deviceid = ent->device;       /* save for later use */
445         dd->ipath_vendorid = ent->vendor;
446
447         /* setup the chip-specific functions, as early as possible. */
448         switch (ent->device) {
449         case PCI_DEVICE_ID_INFINIPATH_HT:
450                 ipath_init_ht400_funcs(dd);
451                 break;
452         case PCI_DEVICE_ID_INFINIPATH_PE800:
453                 ipath_init_pe800_funcs(dd);
454                 break;
455         default:
456                 ipath_dev_err(dd, "Found unknown PathScale deviceid 0x%x, "
457                               "failing\n", ent->device);
458                 return -ENODEV;
459         }
460
461         for (j = 0; j < 6; j++) {
462                 if (!pdev->resource[j].start)
463                         continue;
464                 ipath_cdbg(VERBOSE, "BAR %d start %lx, end %lx, len %lx\n",
465                            j, pdev->resource[j].start,
466                            pdev->resource[j].end,
467                            pci_resource_len(pdev, j));
468         }
469
470         if (!addr) {
471                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
472                 ret = -ENODEV;
473                 goto bail_regions;
474         }
475
476         dd->ipath_deviceid = ent->device;       /* save for later use */
477         dd->ipath_vendorid = ent->vendor;
478
479         ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
480         if (ret) {
481                 ipath_dev_err(dd, "Failed to read PCI revision ID unit "
482                               "%u: err %d\n", dd->ipath_unit, -ret);
483                 goto bail_regions;      /* shouldn't ever happen */
484         }
485         dd->ipath_pcirev = rev;
486
487         dd->ipath_kregbase = ioremap_nocache(addr, len);
488
489         if (!dd->ipath_kregbase) {
490                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
491                           addr);
492                 ret = -ENOMEM;
493                 goto bail_iounmap;
494         }
495         dd->ipath_kregend = (u64 __iomem *)
496                 ((void __iomem *)dd->ipath_kregbase + len);
497         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
498         /* for user mmap */
499         dd->ipath_kregvirt = (u64 __iomem *) phys_to_virt(addr);
500         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p "
501                    "kregvirt %p\n", addr, dd->ipath_kregbase,
502                    dd->ipath_kregvirt);
503
504         /*
505          * clear ipath_flags here instead of in ipath_init_chip as it is set
506          * by ipath_setup_htconfig.
507          */
508         dd->ipath_flags = 0;
509
510         if (dd->ipath_f_bus(dd, pdev))
511                 ipath_dev_err(dd, "Failed to setup config space; "
512                               "continuing anyway\n");
513
514         /*
515          * set up our interrupt handler; SA_SHIRQ probably not needed,
516          * since MSI interrupts shouldn't be shared but won't  hurt for now.
517          * check 0 irq after we return from chip-specific bus setup, since
518          * that can affect this due to setup
519          */
520         if (!pdev->irq)
521                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
522                               "work\n");
523         else {
524                 ret = request_irq(pdev->irq, ipath_intr, SA_SHIRQ,
525                                   IPATH_DRV_NAME, dd);
526                 if (ret) {
527                         ipath_dev_err(dd, "Couldn't setup irq handler, "
528                                       "irq=%u: %d\n", pdev->irq, ret);
529                         goto bail_iounmap;
530                 }
531         }
532
533         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
534         if (ret)
535                 goto bail_iounmap;
536
537         ret = ipath_enable_wc(dd);
538
539         if (ret) {
540                 ipath_dev_err(dd, "Write combining not enabled "
541                               "(err %d): performance may be poor\n",
542                               -ret);
543                 ret = 0;
544         }
545
546         ipath_device_create_group(&pdev->dev, dd);
547         ipathfs_add_device(dd);
548         ipath_user_add(dd);
549         ipath_layer_add(dd);
550
551         goto bail;
552
553 bail_iounmap:
554         iounmap((volatile void __iomem *) dd->ipath_kregbase);
555
556 bail_regions:
557         pci_release_regions(pdev);
558
559 bail_disable:
560         pci_disable_device(pdev);
561
562 bail_devdata:
563         ipath_free_devdata(pdev, dd);
564
565 bail_rcvhdrtail:
566         cleanup_port0_rcvhdrtail(pdev);
567
568 bail:
569         return ret;
570 }
571
572 static void __devexit ipath_remove_one(struct pci_dev *pdev)
573 {
574         struct ipath_devdata *dd;
575
576         ipath_cdbg(VERBOSE, "removing, pdev=%p\n", pdev);
577         if (!pdev)
578                 return;
579
580         dd = pci_get_drvdata(pdev);
581         ipath_layer_del(dd);
582         ipath_user_del(dd);
583         ipathfs_remove_device(dd);
584         ipath_device_remove_group(&pdev->dev, dd);
585         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
586                    "unit %u\n", dd, (u32) dd->ipath_unit);
587         if (dd->ipath_kregbase) {
588                 ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n",
589                            dd->ipath_kregbase);
590                 iounmap((volatile void __iomem *) dd->ipath_kregbase);
591                 dd->ipath_kregbase = NULL;
592         }
593         pci_release_regions(pdev);
594         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
595         pci_disable_device(pdev);
596
597         ipath_free_devdata(pdev, dd);
598         cleanup_port0_rcvhdrtail(pdev);
599 }
600
601 /* general driver use */
602 DEFINE_MUTEX(ipath_mutex);
603
604 static DEFINE_SPINLOCK(ipath_pioavail_lock);
605
606 /**
607  * ipath_disarm_piobufs - cancel a range of PIO buffers
608  * @dd: the infinipath device
609  * @first: the first PIO buffer to cancel
610  * @cnt: the number of PIO buffers to cancel
611  *
612  * cancel a range of PIO buffers, used when they might be armed, but
613  * not triggered.  Used at init to ensure buffer state, and also user
614  * process close, in case it died while writing to a PIO buffer
615  * Also after errors.
616  */
617 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
618                           unsigned cnt)
619 {
620         unsigned i, last = first + cnt;
621         u64 sendctrl, sendorig;
622
623         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
624         sendorig = dd->ipath_sendctrl | INFINIPATH_S_DISARM;
625         for (i = first; i < last; i++) {
626                 sendctrl = sendorig |
627                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT);
628                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
629                                  sendctrl);
630         }
631
632         /*
633          * Write it again with current value, in case ipath_sendctrl changed
634          * while we were looping; no critical bits that would require
635          * locking.
636          *
637          * Write a 0, and then the original value, reading scratch in
638          * between.  This seems to avoid a chip timing race that causes
639          * pioavail updates to memory to stop.
640          */
641         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
642                          0);
643         sendorig = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
644         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
645                          dd->ipath_sendctrl);
646 }
647
648 /**
649  * ipath_wait_linkstate - wait for an IB link state change to occur
650  * @dd: the infinipath device
651  * @state: the state to wait for
652  * @msecs: the number of milliseconds to wait
653  *
654  * wait up to msecs milliseconds for IB link state change to occur for
655  * now, take the easy polling route.  Currently used only by
656  * ipath_layer_set_linkstate.  Returns 0 if state reached, otherwise
657  * -ETIMEDOUT state can have multiple states set, for any of several
658  * transitions.
659  */
660 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
661 {
662         dd->ipath_sma_state_wanted = state;
663         wait_event_interruptible_timeout(ipath_sma_state_wait,
664                                          (dd->ipath_flags & state),
665                                          msecs_to_jiffies(msecs));
666         dd->ipath_sma_state_wanted = 0;
667
668         if (!(dd->ipath_flags & state)) {
669                 u64 val;
670                 ipath_cdbg(SMA, "Didn't reach linkstate %s within %u ms\n",
671                            /* test INIT ahead of DOWN, both can be set */
672                            (state & IPATH_LINKINIT) ? "INIT" :
673                            ((state & IPATH_LINKDOWN) ? "DOWN" :
674                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
675                            msecs);
676                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
677                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
678                            (unsigned long long) ipath_read_kreg64(
679                                    dd, dd->ipath_kregs->kr_ibcctrl),
680                            (unsigned long long) val,
681                            ipath_ibcstatus_str[val & 0xf]);
682         }
683         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
684 }
685
686 void ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
687 {
688         *buf = '\0';
689         if (err & INFINIPATH_E_RHDRLEN)
690                 strlcat(buf, "rhdrlen ", blen);
691         if (err & INFINIPATH_E_RBADTID)
692                 strlcat(buf, "rbadtid ", blen);
693         if (err & INFINIPATH_E_RBADVERSION)
694                 strlcat(buf, "rbadversion ", blen);
695         if (err & INFINIPATH_E_RHDR)
696                 strlcat(buf, "rhdr ", blen);
697         if (err & INFINIPATH_E_RLONGPKTLEN)
698                 strlcat(buf, "rlongpktlen ", blen);
699         if (err & INFINIPATH_E_RSHORTPKTLEN)
700                 strlcat(buf, "rshortpktlen ", blen);
701         if (err & INFINIPATH_E_RMAXPKTLEN)
702                 strlcat(buf, "rmaxpktlen ", blen);
703         if (err & INFINIPATH_E_RMINPKTLEN)
704                 strlcat(buf, "rminpktlen ", blen);
705         if (err & INFINIPATH_E_RFORMATERR)
706                 strlcat(buf, "rformaterr ", blen);
707         if (err & INFINIPATH_E_RUNSUPVL)
708                 strlcat(buf, "runsupvl ", blen);
709         if (err & INFINIPATH_E_RUNEXPCHAR)
710                 strlcat(buf, "runexpchar ", blen);
711         if (err & INFINIPATH_E_RIBFLOW)
712                 strlcat(buf, "ribflow ", blen);
713         if (err & INFINIPATH_E_REBP)
714                 strlcat(buf, "EBP ", blen);
715         if (err & INFINIPATH_E_SUNDERRUN)
716                 strlcat(buf, "sunderrun ", blen);
717         if (err & INFINIPATH_E_SPIOARMLAUNCH)
718                 strlcat(buf, "spioarmlaunch ", blen);
719         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
720                 strlcat(buf, "sunexperrpktnum ", blen);
721         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
722                 strlcat(buf, "sdroppeddatapkt ", blen);
723         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
724                 strlcat(buf, "sdroppedsmppkt ", blen);
725         if (err & INFINIPATH_E_SMAXPKTLEN)
726                 strlcat(buf, "smaxpktlen ", blen);
727         if (err & INFINIPATH_E_SMINPKTLEN)
728                 strlcat(buf, "sminpktlen ", blen);
729         if (err & INFINIPATH_E_SUNSUPVL)
730                 strlcat(buf, "sunsupVL ", blen);
731         if (err & INFINIPATH_E_SPKTLEN)
732                 strlcat(buf, "spktlen ", blen);
733         if (err & INFINIPATH_E_INVALIDADDR)
734                 strlcat(buf, "invalidaddr ", blen);
735         if (err & INFINIPATH_E_RICRC)
736                 strlcat(buf, "CRC ", blen);
737         if (err & INFINIPATH_E_RVCRC)
738                 strlcat(buf, "VCRC ", blen);
739         if (err & INFINIPATH_E_RRCVEGRFULL)
740                 strlcat(buf, "rcvegrfull ", blen);
741         if (err & INFINIPATH_E_RRCVHDRFULL)
742                 strlcat(buf, "rcvhdrfull ", blen);
743         if (err & INFINIPATH_E_IBSTATUSCHANGED)
744                 strlcat(buf, "ibcstatuschg ", blen);
745         if (err & INFINIPATH_E_RIBLOSTLINK)
746                 strlcat(buf, "riblostlink ", blen);
747         if (err & INFINIPATH_E_HARDWARE)
748                 strlcat(buf, "hardware ", blen);
749         if (err & INFINIPATH_E_RESET)
750                 strlcat(buf, "reset ", blen);
751 }
752
753 /**
754  * get_rhf_errstring - decode RHF errors
755  * @err: the err number
756  * @msg: the output buffer
757  * @len: the length of the output buffer
758  *
759  * only used one place now, may want more later
760  */
761 static void get_rhf_errstring(u32 err, char *msg, size_t len)
762 {
763         /* if no errors, and so don't need to check what's first */
764         *msg = '\0';
765
766         if (err & INFINIPATH_RHF_H_ICRCERR)
767                 strlcat(msg, "icrcerr ", len);
768         if (err & INFINIPATH_RHF_H_VCRCERR)
769                 strlcat(msg, "vcrcerr ", len);
770         if (err & INFINIPATH_RHF_H_PARITYERR)
771                 strlcat(msg, "parityerr ", len);
772         if (err & INFINIPATH_RHF_H_LENERR)
773                 strlcat(msg, "lenerr ", len);
774         if (err & INFINIPATH_RHF_H_MTUERR)
775                 strlcat(msg, "mtuerr ", len);
776         if (err & INFINIPATH_RHF_H_IHDRERR)
777                 /* infinipath hdr checksum error */
778                 strlcat(msg, "ipathhdrerr ", len);
779         if (err & INFINIPATH_RHF_H_TIDERR)
780                 strlcat(msg, "tiderr ", len);
781         if (err & INFINIPATH_RHF_H_MKERR)
782                 /* bad port, offset, etc. */
783                 strlcat(msg, "invalid ipathhdr ", len);
784         if (err & INFINIPATH_RHF_H_IBERR)
785                 strlcat(msg, "iberr ", len);
786         if (err & INFINIPATH_RHF_L_SWA)
787                 strlcat(msg, "swA ", len);
788         if (err & INFINIPATH_RHF_L_SWB)
789                 strlcat(msg, "swB ", len);
790 }
791
792 /**
793  * ipath_get_egrbuf - get an eager buffer
794  * @dd: the infinipath device
795  * @bufnum: the eager buffer to get
796  * @err: unused
797  *
798  * must only be called if ipath_pd[port] is known to be allocated
799  */
800 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum,
801                                      int err)
802 {
803         return dd->ipath_port0_skbs ?
804                 (void *)dd->ipath_port0_skbs[bufnum]->data : NULL;
805 }
806
807 /**
808  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
809  * @dd: the infinipath device
810  * @gfp_mask: the sk_buff SFP mask
811  */
812 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
813                                 gfp_t gfp_mask)
814 {
815         struct sk_buff *skb;
816         u32 len;
817
818         /*
819          * Only fully supported way to handle this is to allocate lots
820          * extra, align as needed, and then do skb_reserve().  That wastes
821          * a lot of memory...  I'll have to hack this into infinipath_copy
822          * also.
823          */
824
825         /*
826          * We need 4 extra bytes for unaligned transfer copying
827          */
828         if (dd->ipath_flags & IPATH_4BYTE_TID) {
829                 /* we need a 4KB multiple alignment, and there is no way
830                  * to do it except to allocate extra and then skb_reserve
831                  * enough to bring it up to the right alignment.
832                  */
833                 len = dd->ipath_ibmaxlen + 4 + (1 << 11) - 1;
834         }
835         else
836                 len = dd->ipath_ibmaxlen + 4;
837         skb = __dev_alloc_skb(len, gfp_mask);
838         if (!skb) {
839                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
840                               len);
841                 goto bail;
842         }
843         if (dd->ipath_flags & IPATH_4BYTE_TID) {
844                 u32 una = ((1 << 11) - 1) & (unsigned long)(skb->data + 4);
845                 if (una)
846                         skb_reserve(skb, 4 + (1 << 11) - una);
847                 else
848                         skb_reserve(skb, 4);
849         } else
850                 skb_reserve(skb, 4);
851
852 bail:
853         return skb;
854 }
855
856 /**
857  * ipath_rcv_layer - receive a packet for the layered (ethernet) driver
858  * @dd: the infinipath device
859  * @etail: the sk_buff number
860  * @tlen: the total packet length
861  * @hdr: the ethernet header
862  *
863  * Separate routine for better overall optimization
864  */
865 static void ipath_rcv_layer(struct ipath_devdata *dd, u32 etail,
866                             u32 tlen, struct ether_header *hdr)
867 {
868         u32 elen;
869         u8 pad, *bthbytes;
870         struct sk_buff *skb, *nskb;
871
872         if (dd->ipath_port0_skbs && hdr->sub_opcode == OPCODE_ENCAP) {
873                 /*
874                  * Allocate a new sk_buff to replace the one we give
875                  * to the network stack.
876                  */
877                 nskb = ipath_alloc_skb(dd, GFP_ATOMIC);
878                 if (!nskb) {
879                         /* count OK packets that we drop */
880                         ipath_stats.sps_krdrops++;
881                         return;
882                 }
883
884                 bthbytes = (u8 *) hdr->bth;
885                 pad = (bthbytes[1] >> 4) & 3;
886                 /* +CRC32 */
887                 elen = tlen - (sizeof(*hdr) + pad + sizeof(u32));
888
889                 skb = dd->ipath_port0_skbs[etail];
890                 dd->ipath_port0_skbs[etail] = nskb;
891                 skb_put(skb, elen);
892
893                 dd->ipath_f_put_tid(dd, etail + (u64 __iomem *)
894                                     ((char __iomem *) dd->ipath_kregbase
895                                      + dd->ipath_rcvegrbase), 0,
896                                     virt_to_phys(nskb->data));
897
898                 __ipath_layer_rcv(dd, hdr, skb);
899
900                 /* another ether packet received */
901                 ipath_stats.sps_ether_rpkts++;
902         }
903         else if (hdr->sub_opcode == OPCODE_LID_ARP)
904                 __ipath_layer_rcv_lid(dd, hdr);
905 }
906
907 /*
908  * ipath_kreceive - receive a packet
909  * @dd: the infinipath device
910  *
911  * called from interrupt handler for errors or receive interrupt
912  */
913 void ipath_kreceive(struct ipath_devdata *dd)
914 {
915         u64 *rc;
916         void *ebuf;
917         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
918         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
919         u32 etail = -1, l, hdrqtail;
920         struct ips_message_header *hdr;
921         u32 eflags, i, etype, tlen, pkttot = 0;
922         static u64 totcalls;    /* stats, may eventually remove */
923         char emsg[128];
924
925         if (!dd->ipath_hdrqtailptr) {
926                 ipath_dev_err(dd,
927                               "hdrqtailptr not set, can't do receives\n");
928                 goto bail;
929         }
930
931         /* There is already a thread processing this queue. */
932         if (test_and_set_bit(0, &dd->ipath_rcv_pending))
933                 goto bail;
934
935         if (dd->ipath_port0head ==
936             (u32)le64_to_cpu(*dd->ipath_hdrqtailptr))
937                 goto done;
938
939 gotmore:
940         /*
941          * read only once at start.  If in flood situation, this helps
942          * performance slightly.  If more arrive while we are processing,
943          * we'll come back here and do them
944          */
945         hdrqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
946
947         for (i = 0, l = dd->ipath_port0head; l != hdrqtail; i++) {
948                 u32 qp;
949                 u8 *bthbytes;
950
951                 rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2));
952                 hdr = (struct ips_message_header *)&rc[1];
953                 /*
954                  * could make a network order version of IPATH_KD_QP, and
955                  * do the obvious shift before masking to speed this up.
956                  */
957                 qp = ntohl(hdr->bth[1]) & 0xffffff;
958                 bthbytes = (u8 *) hdr->bth;
959
960                 eflags = ips_get_hdr_err_flags((__le32 *) rc);
961                 etype = ips_get_rcv_type((__le32 *) rc);
962                 /* total length */
963                 tlen = ips_get_length_in_bytes((__le32 *) rc);
964                 ebuf = NULL;
965                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
966                         /*
967                          * it turns out that the chips uses an eager buffer
968                          * for all non-expected packets, whether it "needs"
969                          * one or not.  So always get the index, but don't
970                          * set ebuf (so we try to copy data) unless the
971                          * length requires it.
972                          */
973                         etail = ips_get_index((__le32 *) rc);
974                         if (tlen > sizeof(*hdr) ||
975                             etype == RCVHQ_RCV_TYPE_NON_KD)
976                                 ebuf = ipath_get_egrbuf(dd, etail, 0);
977                 }
978
979                 /*
980                  * both tiderr and ipathhdrerr are set for all plain IB
981                  * packets; only ipathhdrerr should be set.
982                  */
983
984                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
985                     RCVHQ_RCV_TYPE_ERROR && ips_get_ipath_ver(
986                             hdr->iph.ver_port_tid_offset) !=
987                     IPS_PROTO_VERSION) {
988                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
989                                    "%x\n", etype);
990                 }
991
992                 if (eflags & ~(INFINIPATH_RHF_H_TIDERR |
993                                INFINIPATH_RHF_H_IHDRERR)) {
994                         get_rhf_errstring(eflags, emsg, sizeof emsg);
995                         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
996                                    "tlen=%x opcode=%x egridx=%x: %s\n",
997                                    eflags, l, etype, tlen, bthbytes[0],
998                                    ips_get_index((__le32 *) rc), emsg);
999                 } else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1000                                 int ret = __ipath_verbs_rcv(dd, rc + 1,
1001                                                             ebuf, tlen);
1002                                 if (ret == -ENODEV)
1003                                         ipath_cdbg(VERBOSE,
1004                                                    "received IB packet, "
1005                                                    "not SMA (QP=%x)\n", qp);
1006                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
1007                         if (qp == IPATH_KD_QP &&
1008                             bthbytes[0] == ipath_layer_rcv_opcode &&
1009                             ebuf)
1010                                 ipath_rcv_layer(dd, etail, tlen,
1011                                                 (struct ether_header *)hdr);
1012                         else
1013                                 ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1014                                            "qp=%x), len %x; ignored\n",
1015                                            etype, bthbytes[0], qp, tlen);
1016                 }
1017                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1018                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1019                                   be32_to_cpu(hdr->bth[0]) & 0xff);
1020                 else if (eflags & (INFINIPATH_RHF_H_TIDERR |
1021                                    INFINIPATH_RHF_H_IHDRERR)) {
1022                         /*
1023                          * This is a type 3 packet, only the LRH is in the
1024                          * rcvhdrq, the rest of the header is in the eager
1025                          * buffer.
1026                          */
1027                         u8 opcode;
1028                         if (ebuf) {
1029                                 bthbytes = (u8 *) ebuf;
1030                                 opcode = *bthbytes;
1031                         }
1032                         else
1033                                 opcode = 0;
1034                         get_rhf_errstring(eflags, emsg, sizeof emsg);
1035                         ipath_dbg("Err %x (%s), opcode %x, egrbuf %x, "
1036                                   "len %x\n", eflags, emsg, opcode, etail,
1037                                   tlen);
1038                 } else {
1039                         /*
1040                          * error packet, type of error  unknown.
1041                          * Probably type 3, but we don't know, so don't
1042                          * even try to print the opcode, etc.
1043                          */
1044                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1045                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1046                                   "hdr %llx %llx %llx %llx %llx\n",
1047                                   etail, tlen, (unsigned long) rc, l,
1048                                   (unsigned long long) rc[0],
1049                                   (unsigned long long) rc[1],
1050                                   (unsigned long long) rc[2],
1051                                   (unsigned long long) rc[3],
1052                                   (unsigned long long) rc[4],
1053                                   (unsigned long long) rc[5]);
1054                 }
1055                 l += rsize;
1056                 if (l >= maxcnt)
1057                         l = 0;
1058                 /*
1059                  * update for each packet, to help prevent overflows if we
1060                  * have lots of packets.
1061                  */
1062                 (void)ipath_write_ureg(dd, ur_rcvhdrhead,
1063                                        dd->ipath_rhdrhead_intr_off | l, 0);
1064                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
1065                         (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
1066                                                etail, 0);
1067         }
1068
1069         pkttot += i;
1070
1071         dd->ipath_port0head = l;
1072
1073         if (hdrqtail != (u32)le64_to_cpu(*dd->ipath_hdrqtailptr))
1074                 /* more arrived while we handled first batch */
1075                 goto gotmore;
1076
1077         if (pkttot > ipath_stats.sps_maxpkts_call)
1078                 ipath_stats.sps_maxpkts_call = pkttot;
1079         ipath_stats.sps_port0pkts += pkttot;
1080         ipath_stats.sps_avgpkts_call =
1081                 ipath_stats.sps_port0pkts / ++totcalls;
1082
1083 done:
1084         clear_bit(0, &dd->ipath_rcv_pending);
1085         smp_mb__after_clear_bit();
1086
1087 bail:;
1088 }
1089
1090 /**
1091  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1092  * @dd: the infinipath device
1093  *
1094  * called whenever our local copy indicates we have run out of send buffers
1095  * NOTE: This can be called from interrupt context by some code
1096  * and from non-interrupt context by ipath_getpiobuf().
1097  */
1098
1099 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1100 {
1101         unsigned long flags;
1102         int i;
1103         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1104
1105         /* If the generation (check) bits have changed, then we update the
1106          * busy bit for the corresponding PIO buffer.  This algorithm will
1107          * modify positions to the value they already have in some cases
1108          * (i.e., no change), but it's faster than changing only the bits
1109          * that have changed.
1110          *
1111          * We would like to do this atomicly, to avoid spinlocks in the
1112          * critical send path, but that's not really possible, given the
1113          * type of changes, and that this routine could be called on
1114          * multiple cpu's simultaneously, so we lock in this routine only,
1115          * to avoid conflicting updates; all we change is the shadow, and
1116          * it's a single 64 bit memory location, so by definition the update
1117          * is atomic in terms of what other cpu's can see in testing the
1118          * bits.  The spin_lock overhead isn't too bad, since it only
1119          * happens when all buffers are in use, so only cpu overhead, not
1120          * latency or bandwidth is affected.
1121          */
1122 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1123         if (!dd->ipath_pioavailregs_dma) {
1124                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1125                 return;
1126         }
1127         if (ipath_debug & __IPATH_VERBDBG) {
1128                 /* only if packet debug and verbose */
1129                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1130                 unsigned long *shadow = dd->ipath_pioavailshadow;
1131
1132                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1133                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1134                            "s3=%lx\n",
1135                            (unsigned long long) le64_to_cpu(dma[0]),
1136                            shadow[0],
1137                            (unsigned long long) le64_to_cpu(dma[1]),
1138                            shadow[1],
1139                            (unsigned long long) le64_to_cpu(dma[2]),
1140                            shadow[2],
1141                            (unsigned long long) le64_to_cpu(dma[3]),
1142                            shadow[3]);
1143                 if (piobregs > 4)
1144                         ipath_cdbg(
1145                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1146                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1147                                 "d7=%llx s7=%lx\n",
1148                                 (unsigned long long) le64_to_cpu(dma[4]),
1149                                 shadow[4],
1150                                 (unsigned long long) le64_to_cpu(dma[5]),
1151                                 shadow[5],
1152                                 (unsigned long long) le64_to_cpu(dma[6]),
1153                                 shadow[6],
1154                                 (unsigned long long) le64_to_cpu(dma[7]),
1155                                 shadow[7]);
1156         }
1157         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1158         for (i = 0; i < piobregs; i++) {
1159                 u64 pchbusy, pchg, piov, pnew;
1160                 /*
1161                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1162                  */
1163                 if (i > 3) {
1164                         if (i & 1)
1165                                 piov = le64_to_cpu(
1166                                         dd->ipath_pioavailregs_dma[i - 1]);
1167                         else
1168                                 piov = le64_to_cpu(
1169                                         dd->ipath_pioavailregs_dma[i + 1]);
1170                 } else
1171                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1172                 pchg = _IPATH_ALL_CHECKBITS &
1173                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1174                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1175                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1176                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1177                         pnew |= piov & pchbusy;
1178                         dd->ipath_pioavailshadow[i] = pnew;
1179                 }
1180         }
1181         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1182 }
1183
1184 /**
1185  * ipath_setrcvhdrsize - set the receive header size
1186  * @dd: the infinipath device
1187  * @rhdrsize: the receive header size
1188  *
1189  * called from user init code, and also layered driver init
1190  */
1191 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1192 {
1193         int ret = 0;
1194
1195         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1196                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1197                         dev_info(&dd->pcidev->dev,
1198                                  "Error: can't set protocol header "
1199                                  "size %u, already %u\n",
1200                                  rhdrsize, dd->ipath_rcvhdrsize);
1201                         ret = -EAGAIN;
1202                 } else
1203                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1204                                    "size %u\n", dd->ipath_rcvhdrsize);
1205         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1206                                (sizeof(u64) / sizeof(u32)))) {
1207                 ipath_dbg("Error: can't set protocol header size %u "
1208                           "(> max %u)\n", rhdrsize,
1209                           dd->ipath_rcvhdrentsize -
1210                           (u32) (sizeof(u64) / sizeof(u32)));
1211                 ret = -EOVERFLOW;
1212         } else {
1213                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1214                 dd->ipath_rcvhdrsize = rhdrsize;
1215                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1216                                  dd->ipath_rcvhdrsize);
1217                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1218                            dd->ipath_rcvhdrsize);
1219         }
1220         return ret;
1221 }
1222
1223 /**
1224  * ipath_getpiobuf - find an available pio buffer
1225  * @dd: the infinipath device
1226  * @pbufnum: the buffer number is placed here
1227  *
1228  * do appropriate marking as busy, etc.
1229  * returns buffer number if one found (>=0), negative number is error.
1230  * Used by ipath_sma_send_pkt and ipath_layer_send
1231  */
1232 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1233 {
1234         int i, j, starti, updated = 0;
1235         unsigned piobcnt, iter;
1236         unsigned long flags;
1237         unsigned long *shadow = dd->ipath_pioavailshadow;
1238         u32 __iomem *buf;
1239
1240         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1241                              + dd->ipath_piobcnt4k);
1242         starti = dd->ipath_lastport_piobuf;
1243         iter = piobcnt - starti;
1244         if (dd->ipath_upd_pio_shadow) {
1245                 /*
1246                  * Minor optimization.  If we had no buffers on last call,
1247                  * start out by doing the update; continue and do scan even
1248                  * if no buffers were updated, to be paranoid
1249                  */
1250                 ipath_update_pio_bufs(dd);
1251                 /* we scanned here, don't do it at end of scan */
1252                 updated = 1;
1253                 i = starti;
1254         } else
1255                 i = dd->ipath_lastpioindex;
1256
1257 rescan:
1258         /*
1259          * while test_and_set_bit() is atomic, we do that and then the
1260          * change_bit(), and the pair is not.  See if this is the cause
1261          * of the remaining armlaunch errors.
1262          */
1263         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1264         for (j = 0; j < iter; j++, i++) {
1265                 if (i >= piobcnt)
1266                         i = starti;
1267                 /*
1268                  * To avoid bus lock overhead, we first find a candidate
1269                  * buffer, then do the test and set, and continue if that
1270                  * fails.
1271                  */
1272                 if (test_bit((2 * i) + 1, shadow) ||
1273                     test_and_set_bit((2 * i) + 1, shadow))
1274                         continue;
1275                 /* flip generation bit */
1276                 change_bit(2 * i, shadow);
1277                 break;
1278         }
1279         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1280
1281         if (j == iter) {
1282                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1283
1284                 /*
1285                  * first time through; shadow exhausted, but may be real
1286                  * buffers available, so go see; if any updated, rescan
1287                  * (once)
1288                  */
1289                 if (!updated) {
1290                         ipath_update_pio_bufs(dd);
1291                         updated = 1;
1292                         i = starti;
1293                         goto rescan;
1294                 }
1295                 dd->ipath_upd_pio_shadow = 1;
1296                 /*
1297                  * not atomic, but if we lose one once in a while, that's OK
1298                  */
1299                 ipath_stats.sps_nopiobufs++;
1300                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1301                         ipath_dbg(
1302                                 "%u pio sends with no bufavail; dmacopy: "
1303                                 "%llx %llx %llx %llx; shadow:  "
1304                                 "%lx %lx %lx %lx\n",
1305                                 dd->ipath_consec_nopiobuf,
1306                                 (unsigned long long) le64_to_cpu(dma[0]),
1307                                 (unsigned long long) le64_to_cpu(dma[1]),
1308                                 (unsigned long long) le64_to_cpu(dma[2]),
1309                                 (unsigned long long) le64_to_cpu(dma[3]),
1310                                 shadow[0], shadow[1], shadow[2],
1311                                 shadow[3]);
1312                         /*
1313                          * 4 buffers per byte, 4 registers above, cover rest
1314                          * below
1315                          */
1316                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1317                             (sizeof(shadow[0]) * 4 * 4))
1318                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1319                                           "%llx %llx; shadow: %lx %lx "
1320                                           "%lx %lx\n",
1321                                           (unsigned long long)
1322                                           le64_to_cpu(dma[4]),
1323                                           (unsigned long long)
1324                                           le64_to_cpu(dma[5]),
1325                                           (unsigned long long)
1326                                           le64_to_cpu(dma[6]),
1327                                           (unsigned long long)
1328                                           le64_to_cpu(dma[7]),
1329                                           shadow[4], shadow[5],
1330                                           shadow[6], shadow[7]);
1331                 }
1332                 buf = NULL;
1333                 goto bail;
1334         }
1335
1336         if (updated)
1337                 /*
1338                  * ran out of bufs, now some (at least this one we just
1339                  * got) are now available, so tell the layered driver.
1340                  */
1341                 __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE);
1342
1343         /*
1344          * set next starting place.  Since it's just an optimization,
1345          * it doesn't matter who wins on this, so no locking
1346          */
1347         dd->ipath_lastpioindex = i + 1;
1348         if (dd->ipath_upd_pio_shadow)
1349                 dd->ipath_upd_pio_shadow = 0;
1350         if (dd->ipath_consec_nopiobuf)
1351                 dd->ipath_consec_nopiobuf = 0;
1352         if (i < dd->ipath_piobcnt2k)
1353                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1354                                        i * dd->ipath_palign);
1355         else
1356                 buf = (u32 __iomem *)
1357                         (dd->ipath_pio4kbase +
1358                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1359         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1360                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1361         if (pbufnum)
1362                 *pbufnum = i;
1363
1364 bail:
1365         return buf;
1366 }
1367
1368 /**
1369  * ipath_create_rcvhdrq - create a receive header queue
1370  * @dd: the infinipath device
1371  * @pd: the port data
1372  *
1373  * this *must* be physically contiguous memory, and for now,
1374  * that limits it to what kmalloc can do.
1375  */
1376 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1377                          struct ipath_portdata *pd)
1378 {
1379         int ret = 0, amt;
1380
1381         amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1382                     sizeof(u32), PAGE_SIZE);
1383         if (!pd->port_rcvhdrq) {
1384                 /*
1385                  * not using REPEAT isn't viable; at 128KB, we can easily
1386                  * fail this.  The problem with REPEAT is we can block here
1387                  * "forever".  There isn't an inbetween, unfortunately.  We
1388                  * could reduce the risk by never freeing the rcvhdrq except
1389                  * at unload, but even then, the first time a port is used,
1390                  * we could delay for some time...
1391                  */
1392                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1393
1394                 pd->port_rcvhdrq = dma_alloc_coherent(
1395                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1396                         gfp_flags);
1397
1398                 if (!pd->port_rcvhdrq) {
1399                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1400                                       "for port %u rcvhdrq failed\n",
1401                                       amt, pd->port_port);
1402                         ret = -ENOMEM;
1403                         goto bail;
1404                 }
1405
1406                 pd->port_rcvhdrq_size = amt;
1407
1408                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1409                            "for port %u rcvhdr Q\n",
1410                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1411                            (unsigned long) pd->port_rcvhdrq_phys,
1412                            (unsigned long) pd->port_rcvhdrq_size,
1413                            pd->port_port);
1414         } else {
1415                 /*
1416                  * clear for security, sanity, and/or debugging, each
1417                  * time we reuse
1418                  */
1419                 memset(pd->port_rcvhdrq, 0, amt);
1420         }
1421
1422         /*
1423          * tell chip each time we init it, even if we are re-using previous
1424          * memory (we zero it at process close)
1425          */
1426         ipath_cdbg(VERBOSE, "writing port %d rcvhdraddr as %lx\n",
1427                    pd->port_port, (unsigned long) pd->port_rcvhdrq_phys);
1428         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1429                               pd->port_port, pd->port_rcvhdrq_phys);
1430
1431         ret = 0;
1432 bail:
1433         return ret;
1434 }
1435
1436 int ipath_waitfor_complete(struct ipath_devdata *dd, ipath_kreg reg_id,
1437                            u64 bits_to_wait_for, u64 * valp)
1438 {
1439         unsigned long timeout;
1440         u64 lastval, val;
1441         int ret;
1442
1443         lastval = ipath_read_kreg64(dd, reg_id);
1444         /* wait a ridiculously long time */
1445         timeout = jiffies + msecs_to_jiffies(5);
1446         do {
1447                 val = ipath_read_kreg64(dd, reg_id);
1448                 /* set so they have something, even on failures. */
1449                 *valp = val;
1450                 if ((val & bits_to_wait_for) == bits_to_wait_for) {
1451                         ret = 0;
1452                         break;
1453                 }
1454                 if (val != lastval)
1455                         ipath_cdbg(VERBOSE, "Changed from %llx to %llx, "
1456                                    "waiting for %llx bits\n",
1457                                    (unsigned long long) lastval,
1458                                    (unsigned long long) val,
1459                                    (unsigned long long) bits_to_wait_for);
1460                 cond_resched();
1461                 if (time_after(jiffies, timeout)) {
1462                         ipath_dbg("Didn't get bits %llx in register 0x%x, "
1463                                   "got %llx\n",
1464                                   (unsigned long long) bits_to_wait_for,
1465                                   reg_id, (unsigned long long) *valp);
1466                         ret = -ENODEV;
1467                         break;
1468                 }
1469         } while (1);
1470
1471         return ret;
1472 }
1473
1474 /**
1475  * ipath_waitfor_mdio_cmdready - wait for last command to complete
1476  * @dd: the infinipath device
1477  *
1478  * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1479  * away indicating the last command has completed.  It doesn't return data
1480  */
1481 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *dd)
1482 {
1483         unsigned long timeout;
1484         u64 val;
1485         int ret;
1486
1487         /* wait a ridiculously long time */
1488         timeout = jiffies + msecs_to_jiffies(5);
1489         do {
1490                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_mdio);
1491                 if (!(val & IPATH_MDIO_CMDVALID)) {
1492                         ret = 0;
1493                         break;
1494                 }
1495                 cond_resched();
1496                 if (time_after(jiffies, timeout)) {
1497                         ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1498                                   (unsigned long long) val);
1499                         ret = -ENODEV;
1500                         break;
1501                 }
1502         } while (1);
1503
1504         return ret;
1505 }
1506
1507 void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1508 {
1509         static const char *what[4] = {
1510                 [0] = "DOWN",
1511                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1512                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1513                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1514         };
1515         ipath_cdbg(SMA, "Trying to move unit %u to %s, current ltstate "
1516                    "is %s\n", dd->ipath_unit,
1517                    what[(which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1518                         INFINIPATH_IBCC_LINKCMD_MASK],
1519                    ipath_ibcstatus_str[
1520                            (ipath_read_kreg64
1521                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1522                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1523                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1524
1525         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1526                          dd->ipath_ibcctrl | which);
1527 }
1528
1529 /**
1530  * ipath_read_kreg64_port - read a device's per-port 64-bit kernel register
1531  * @dd: the infinipath device
1532  * @regno: the register number to read
1533  * @port: the port containing the register
1534  *
1535  * Registers that vary with the chip implementation constants (port)
1536  * use this routine.
1537  */
1538 u64 ipath_read_kreg64_port(const struct ipath_devdata *dd, ipath_kreg regno,
1539                            unsigned port)
1540 {
1541         u16 where;
1542
1543         if (port < dd->ipath_portcnt &&
1544             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1545              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1546                 where = regno + port;
1547         else
1548                 where = -1;
1549
1550         return ipath_read_kreg64(dd, where);
1551 }
1552
1553 /**
1554  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1555  * @dd: the infinipath device
1556  * @regno: the register number to write
1557  * @port: the port containing the register
1558  * @value: the value to write
1559  *
1560  * Registers that vary with the chip implementation constants (port)
1561  * use this routine.
1562  */
1563 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1564                           unsigned port, u64 value)
1565 {
1566         u16 where;
1567
1568         if (port < dd->ipath_portcnt &&
1569             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1570              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1571                 where = regno + port;
1572         else
1573                 where = -1;
1574
1575         ipath_write_kreg(dd, where, value);
1576 }
1577
1578 /**
1579  * ipath_shutdown_device - shut down a device
1580  * @dd: the infinipath device
1581  *
1582  * This is called to make the device quiet when we are about to
1583  * unload the driver, and also when the device is administratively
1584  * disabled.   It does not free any data structures.
1585  * Everything it does has to be setup again by ipath_init_chip(dd,1)
1586  */
1587 void ipath_shutdown_device(struct ipath_devdata *dd)
1588 {
1589         u64 val;
1590
1591         ipath_dbg("Shutting down the device\n");
1592
1593         dd->ipath_flags |= IPATH_LINKUNK;
1594         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
1595                              IPATH_LINKINIT | IPATH_LINKARMED |
1596                              IPATH_LINKACTIVE);
1597         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
1598                                 IPATH_STATUS_IB_READY);
1599
1600         /* mask interrupts, but not errors */
1601         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
1602
1603         dd->ipath_rcvctrl = 0;
1604         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1605                          dd->ipath_rcvctrl);
1606
1607         /*
1608          * gracefully stop all sends allowing any in progress to trickle out
1609          * first.
1610          */
1611         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0ULL);
1612         /* flush it */
1613         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1614         /*
1615          * enough for anything that's going to trickle out to have actually
1616          * done so.
1617          */
1618         udelay(5);
1619
1620         /*
1621          * abort any armed or launched PIO buffers that didn't go. (self
1622          * clearing).  Will cause any packet currently being transmitted to
1623          * go out with an EBP, and may also cause a short packet error on
1624          * the receiver.
1625          */
1626         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1627                          INFINIPATH_S_ABORT);
1628
1629         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1630                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1631
1632         /*
1633          * we are shutting down, so tell the layered driver.  We don't do
1634          * this on just a link state change, much like ethernet, a cable
1635          * unplug, etc. doesn't change driver state
1636          */
1637         ipath_layer_intr(dd, IPATH_LAYER_INT_IF_DOWN);
1638
1639         /* disable IBC */
1640         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
1641         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1642                          dd->ipath_control);
1643
1644         /*
1645          * clear SerdesEnable and turn the leds off; do this here because
1646          * we are unloading, so don't count on interrupts to move along
1647          * Turn the LEDs off explictly for the same reason.
1648          */
1649         dd->ipath_f_quiet_serdes(dd);
1650         dd->ipath_f_setextled(dd, 0, 0);
1651
1652         if (dd->ipath_stats_timer_active) {
1653                 del_timer_sync(&dd->ipath_stats_timer);
1654                 dd->ipath_stats_timer_active = 0;
1655         }
1656
1657         /*
1658          * clear all interrupts and errors, so that the next time the driver
1659          * is loaded or device is enabled, we know that whatever is set
1660          * happened while we were unloaded
1661          */
1662         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1663                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
1664         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
1665         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
1666 }
1667
1668 /**
1669  * ipath_free_pddata - free a port's allocated data
1670  * @dd: the infinipath device
1671  * @port: the port
1672  * @freehdrq: free the port data structure if true
1673  *
1674  * when closing, free up any allocated data for a port, if the
1675  * reference count goes to zero
1676  * Note: this also optionally frees the portdata itself!
1677  * Any changes here have to be matched up with the reinit case
1678  * of ipath_init_chip(), which calls this routine on reinit after reset.
1679  */
1680 void ipath_free_pddata(struct ipath_devdata *dd, u32 port, int freehdrq)
1681 {
1682         struct ipath_portdata *pd = dd->ipath_pd[port];
1683
1684         if (!pd)
1685                 return;
1686         if (freehdrq)
1687                 /*
1688                  * only clear and free portdata if we are going to also
1689                  * release the hdrq, otherwise we leak the hdrq on each
1690                  * open/close cycle
1691                  */
1692                 dd->ipath_pd[port] = NULL;
1693         if (freehdrq && pd->port_rcvhdrq) {
1694                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
1695                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
1696                            (unsigned long) pd->port_rcvhdrq_size);
1697                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
1698                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1699                 pd->port_rcvhdrq = NULL;
1700         }
1701         if (port && pd->port_rcvegrbuf) {
1702                 /* always free this */
1703                 if (pd->port_rcvegrbuf) {
1704                         unsigned e;
1705
1706                         for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
1707                                 void *base = pd->port_rcvegrbuf[e];
1708                                 size_t size = pd->port_rcvegrbuf_size;
1709
1710                                 ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
1711                                            "chunk %u/%u\n", base,
1712                                            (unsigned long) size,
1713                                            e, pd->port_rcvegrbuf_chunks);
1714                                 dma_free_coherent(
1715                                         &dd->pcidev->dev, size, base,
1716                                         pd->port_rcvegrbuf_phys[e]);
1717                         }
1718                         vfree(pd->port_rcvegrbuf);
1719                         pd->port_rcvegrbuf = NULL;
1720                         vfree(pd->port_rcvegrbuf_phys);
1721                         pd->port_rcvegrbuf_phys = NULL;
1722                 }
1723                 pd->port_rcvegrbuf_chunks = 0;
1724         } else if (port == 0 && dd->ipath_port0_skbs) {
1725                 unsigned e;
1726                 struct sk_buff **skbs = dd->ipath_port0_skbs;
1727
1728                 dd->ipath_port0_skbs = NULL;
1729                 ipath_cdbg(VERBOSE, "free closed port %d ipath_port0_skbs "
1730                            "@ %p\n", pd->port_port, skbs);
1731                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
1732                         if (skbs[e])
1733                                 dev_kfree_skb(skbs[e]);
1734                 vfree(skbs);
1735         }
1736         if (freehdrq) {
1737                 kfree(pd->port_tid_pg_list);
1738                 kfree(pd);
1739         }
1740 }
1741
1742 static int __init infinipath_init(void)
1743 {
1744         int ret;
1745
1746         ipath_dbg(KERN_INFO DRIVER_LOAD_MSG "%s", ipath_core_version);
1747
1748         /*
1749          * These must be called before the driver is registered with
1750          * the PCI subsystem.
1751          */
1752         idr_init(&unit_table);
1753         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
1754                 ret = -ENOMEM;
1755                 goto bail;
1756         }
1757
1758         ret = pci_register_driver(&ipath_driver);
1759         if (ret < 0) {
1760                 printk(KERN_ERR IPATH_DRV_NAME
1761                        ": Unable to register driver: error %d\n", -ret);
1762                 goto bail_unit;
1763         }
1764
1765         ret = ipath_driver_create_group(&ipath_driver.driver);
1766         if (ret < 0) {
1767                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create driver "
1768                        "sysfs entries: error %d\n", -ret);
1769                 goto bail_pci;
1770         }
1771
1772         ret = ipath_init_ipathfs();
1773         if (ret < 0) {
1774                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
1775                        "ipathfs: error %d\n", -ret);
1776                 goto bail_group;
1777         }
1778
1779         goto bail;
1780
1781 bail_group:
1782         ipath_driver_remove_group(&ipath_driver.driver);
1783
1784 bail_pci:
1785         pci_unregister_driver(&ipath_driver);
1786
1787 bail_unit:
1788         idr_destroy(&unit_table);
1789
1790 bail:
1791         return ret;
1792 }
1793
1794 static void cleanup_device(struct ipath_devdata *dd)
1795 {
1796         int port;
1797
1798         ipath_shutdown_device(dd);
1799
1800         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
1801                 /* can't do anything more with chip; needs re-init */
1802                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
1803                 if (dd->ipath_kregbase) {
1804                         /*
1805                          * if we haven't already cleaned up before these are
1806                          * to ensure any register reads/writes "fail" until
1807                          * re-init
1808                          */
1809                         dd->ipath_kregbase = NULL;
1810                         dd->ipath_kregvirt = NULL;
1811                         dd->ipath_uregbase = 0;
1812                         dd->ipath_sregbase = 0;
1813                         dd->ipath_cregbase = 0;
1814                         dd->ipath_kregsize = 0;
1815                 }
1816                 ipath_disable_wc(dd);
1817         }
1818
1819         if (dd->ipath_pioavailregs_dma) {
1820                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1821                                   (void *) dd->ipath_pioavailregs_dma,
1822                                   dd->ipath_pioavailregs_phys);
1823                 dd->ipath_pioavailregs_dma = NULL;
1824         }
1825
1826         if (dd->ipath_pageshadow) {
1827                 struct page **tmpp = dd->ipath_pageshadow;
1828                 int i, cnt = 0;
1829
1830                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
1831                            "locked\n");
1832                 for (port = 0; port < dd->ipath_cfgports; port++) {
1833                         int port_tidbase = port * dd->ipath_rcvtidcnt;
1834                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
1835                         for (i = port_tidbase; i < maxtid; i++) {
1836                                 if (!tmpp[i])
1837                                         continue;
1838                                 ipath_release_user_pages(&tmpp[i], 1);
1839                                 tmpp[i] = NULL;
1840                                 cnt++;
1841                         }
1842                 }
1843                 if (cnt) {
1844                         ipath_stats.sps_pageunlocks += cnt;
1845                         ipath_cdbg(VERBOSE, "There were still %u expTID "
1846                                    "entries locked\n", cnt);
1847                 }
1848                 if (ipath_stats.sps_pagelocks ||
1849                     ipath_stats.sps_pageunlocks)
1850                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
1851                                    "unlocked via ipath_m{un}lock\n",
1852                                    (unsigned long long)
1853                                    ipath_stats.sps_pagelocks,
1854                                    (unsigned long long)
1855                                    ipath_stats.sps_pageunlocks);
1856
1857                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
1858                            dd->ipath_pageshadow);
1859                 vfree(dd->ipath_pageshadow);
1860                 dd->ipath_pageshadow = NULL;
1861         }
1862
1863         /*
1864          * free any resources still in use (usually just kernel ports)
1865          * at unload
1866          */
1867         for (port = 0; port < dd->ipath_cfgports; port++)
1868                 ipath_free_pddata(dd, port, 1);
1869         kfree(dd->ipath_pd);
1870         /*
1871          * debuggability, in case some cleanup path tries to use it
1872          * after this
1873          */
1874         dd->ipath_pd = NULL;
1875 }
1876
1877 static void __exit infinipath_cleanup(void)
1878 {
1879         struct ipath_devdata *dd, *tmp;
1880         unsigned long flags;
1881
1882         ipath_exit_ipathfs();
1883
1884         ipath_driver_remove_group(&ipath_driver.driver);
1885
1886         spin_lock_irqsave(&ipath_devs_lock, flags);
1887
1888         /*
1889          * turn off rcv, send, and interrupts for all ports, all drivers
1890          * should also hard reset the chip here?
1891          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
1892          * for all versions of the driver, if they were allocated
1893          */
1894         list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) {
1895                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
1896
1897                 if (dd->ipath_kregbase)
1898                         cleanup_device(dd);
1899
1900                 if (dd->pcidev) {
1901                         if (dd->pcidev->irq) {
1902                                 ipath_cdbg(VERBOSE,
1903                                            "unit %u free_irq of irq %x\n",
1904                                            dd->ipath_unit, dd->pcidev->irq);
1905                                 free_irq(dd->pcidev->irq, dd);
1906                         } else
1907                                 ipath_dbg("irq is 0, not doing free_irq "
1908                                           "for unit %u\n", dd->ipath_unit);
1909                         dd->pcidev = NULL;
1910                 }
1911
1912                 /*
1913                  * we check for NULL here, because it's outside the kregbase
1914                  * check, and we need to call it after the free_irq.  Thus
1915                  * it's possible that the function pointers were never
1916                  * initialized.
1917                  */
1918                 if (dd->ipath_f_cleanup)
1919                         /* clean up chip-specific stuff */
1920                         dd->ipath_f_cleanup(dd);
1921
1922                 spin_lock_irqsave(&ipath_devs_lock, flags);
1923         }
1924
1925         spin_unlock_irqrestore(&ipath_devs_lock, flags);
1926
1927         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
1928         pci_unregister_driver(&ipath_driver);
1929
1930         idr_destroy(&unit_table);
1931 }
1932
1933 /**
1934  * ipath_reset_device - reset the chip if possible
1935  * @unit: the device to reset
1936  *
1937  * Whether or not reset is successful, we attempt to re-initialize the chip
1938  * (that is, much like a driver unload/reload).  We clear the INITTED flag
1939  * so that the various entry points will fail until we reinitialize.  For
1940  * now, we only allow this if no user ports are open that use chip resources
1941  */
1942 int ipath_reset_device(int unit)
1943 {
1944         int ret, i;
1945         struct ipath_devdata *dd = ipath_lookup(unit);
1946
1947         if (!dd) {
1948                 ret = -ENODEV;
1949                 goto bail;
1950         }
1951
1952         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
1953
1954         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
1955                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
1956                          "not initialized or not present\n", unit);
1957                 ret = -ENXIO;
1958                 goto bail;
1959         }
1960
1961         if (dd->ipath_pd)
1962                 for (i = 1; i < dd->ipath_cfgports; i++) {
1963                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
1964                                 ipath_dbg("unit %u port %d is in use "
1965                                           "(PID %u cmd %s), can't reset\n",
1966                                           unit, i,
1967                                           dd->ipath_pd[i]->port_pid,
1968                                           dd->ipath_pd[i]->port_comm);
1969                                 ret = -EBUSY;
1970                                 goto bail;
1971                         }
1972                 }
1973
1974         dd->ipath_flags &= ~IPATH_INITTED;
1975         ret = dd->ipath_f_reset(dd);
1976         if (ret != 1)
1977                 ipath_dbg("reset was not successful\n");
1978         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
1979                   unit);
1980         ret = ipath_init_chip(dd, 1);
1981         if (ret)
1982                 ipath_dev_err(dd, "Reinitialize unit %u after "
1983                               "reset failed with %d\n", unit, ret);
1984         else
1985                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
1986                          "resetting\n", unit);
1987
1988 bail:
1989         return ret;
1990 }
1991
1992 module_init(infinipath_init);
1993 module_exit(infinipath_cleanup);