SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/idle/i7300_idle.c

   1 /*
   2  * (C) Copyright 2008 Intel Corporation
   3  * Authors:
   4  * Andy Henroid <andrew.d.henroid@intel.com>
   5  * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
   6  */
   7
   8 /*
   9  * Save DIMM power on Intel 7300-based platforms when all CPUs/cores
  10  * are idle, using the DIMM thermal throttling capability.
  11  *
  12  * This driver depends on the Intel integrated DMA controller (I/O AT).
  13  * If the driver for I/O AT (drivers/dma/ioatdma*) is also enabled,
  14  * this driver should work cooperatively.
  15  */
  16
  17 /* #define DEBUG */
  18
  19 #include <linux/module.h>
  20 #include <linux/pci.h>
  21 #include <linux/sched.h>
  22 #include <linux/notifier.h>
  23 #include <linux/cpumask.h>
  24 #include <linux/ktime.h>
  25 #include <linux/delay.h>
  26 #include <linux/debugfs.h>
  27 #include <linux/stop_machine.h>
  28 #include <linux/i7300_idle.h>
  29
  30 #include <asm/idle.h>
  31
  32 #include "../dma/ioatdma_hw.h"
  33 #include "../dma/ioatdma_registers.h"
  34
  35 #define I7300_IDLE_DRIVER_VERSION       "1.55"
  36 #define I7300_PRINT                     "i7300_idle:"
  37
  38 static int debug;
  39 module_param_named(debug, debug, uint, 0644);
  40 MODULE_PARM_DESC(debug, "Enable debug printks in this driver");
  41
  42 #define dprintk(fmt, arg...) \
  43         do { if (debug) printk(KERN_INFO I7300_PRINT fmt, ##arg); } while (0)
  44
  45 /*
  46  * Value to set THRTLOW to when initiating throttling
  47  *  0 = No throttling
  48  *  1 = Throttle when > 4 activations per eval window (Maximum throttling)
  49  *  2 = Throttle when > 8 activations
  50  *  168 = Throttle when > 168 activations (Minimum throttling)
  51  */
  52 #define MAX_THRTLWLIMIT         168
  53 static uint i7300_idle_thrtlowlm = 1;
  54 module_param_named(thrtlwlimit, i7300_idle_thrtlowlm, uint, 0644);
  55 MODULE_PARM_DESC(thrtlwlimit,
  56                 "Value for THRTLOWLM activation field "
  57                 "(0 = disable throttle, 1 = Max throttle, 168 = Min throttle)");
  58
  59 /*
  60  * simple invocation and duration statistics
  61  */
  62 static unsigned long total_starts;
  63 static unsigned long total_us;
  64
  65 #ifdef DEBUG
  66 static unsigned long past_skip;
  67 #endif
  68
  69 static struct pci_dev *fbd_dev;
  70
  71 static spinlock_t i7300_idle_lock;
  72 static int i7300_idle_active;
  73
  74 static u8 i7300_idle_thrtctl_saved;
  75 static u8 i7300_idle_thrtlow_saved;
  76 static u32 i7300_idle_mc_saved;
  77
  78 static cpumask_t idle_cpumask;
  79 static ktime_t start_ktime;
  80 static unsigned long avg_idle_us;
  81
  82 static struct dentry *debugfs_dir;
  83
  84 /* Begin: I/O AT Helper routines */
  85
  86 #define IOAT_CHANBASE(ioat_ctl, chan) (ioat_ctl + 0x80 + 0x80 * chan)
  87 /* Snoop control (disable snoops when coherency is not important) */
  88 #define IOAT_DESC_SADDR_SNP_CTL (1UL << 1)
  89 #define IOAT_DESC_DADDR_SNP_CTL (1UL << 2)
  90
  91 static struct pci_dev *ioat_dev;
  92 static struct ioat_dma_descriptor *ioat_desc; /* I/O AT desc & data (1 page) */
  93 static unsigned long ioat_desc_phys;
  94 static u8 *ioat_iomap; /* I/O AT memory-mapped control regs (aka CB_BAR) */
  95 static u8 *ioat_chanbase;
  96
  97 /* Start I/O AT memory copy */
  98 static int i7300_idle_ioat_start(void)
  99 {
 100         u32 err;
 101         /* Clear error (due to circular descriptor pointer) */
 102         err = readl(ioat_chanbase + IOAT_CHANERR_OFFSET);
 103         if (err)
 104                 writel(err, ioat_chanbase + IOAT_CHANERR_OFFSET);
 105
 106         writeb(IOAT_CHANCMD_START, ioat_chanbase + IOAT1_CHANCMD_OFFSET);
 107         return 0;
 108 }
 109
 110 /* Stop I/O AT memory copy */
 111 static void i7300_idle_ioat_stop(void)
 112 {
 113         int i;
 114         u8 sts;
 115
 116         for (i = 0; i < 5; i++) {
 117                 writeb(IOAT_CHANCMD_RESET,
 118                         ioat_chanbase + IOAT1_CHANCMD_OFFSET);
 119
 120                 udelay(10);
 121
 122                 sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
 123                         IOAT_CHANSTS_DMA_TRANSFER_STATUS;
 124
 125                 if (sts != IOAT_CHANSTS_DMA_TRANSFER_STATUS_ACTIVE)
 126                         break;
 127
 128         }
 129
 130         if (i == 5)
 131                 dprintk("failed to suspend+reset I/O AT after 5 retries\n");
 132
 133 }
 134
 135 /* Test I/O AT by copying 1024 byte from 2k to 1k */
 136 static int __init i7300_idle_ioat_selftest(u8 *ctl,
 137                 struct ioat_dma_descriptor *desc, unsigned long desc_phys)
 138 {
 139         u64 chan_sts;
 140
 141         memset(desc, 0, 2048);
 142         memset((u8 *) desc + 2048, 0xab, 1024);
 143
 144         desc[0].size = 1024;
 145         desc[0].ctl = 0;
 146         desc[0].src_addr = desc_phys + 2048;
 147         desc[0].dst_addr = desc_phys + 1024;
 148         desc[0].next = 0;
 149
 150         writeb(IOAT_CHANCMD_RESET, ioat_chanbase + IOAT1_CHANCMD_OFFSET);
 151         writeb(IOAT_CHANCMD_START, ioat_chanbase + IOAT1_CHANCMD_OFFSET);
 152
 153         udelay(1000);
 154
 155         chan_sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
 156                         IOAT_CHANSTS_DMA_TRANSFER_STATUS;
 157
 158         if (chan_sts != IOAT_CHANSTS_DMA_TRANSFER_STATUS_DONE) {
 159                 /* Not complete, reset the channel */
 160                 writeb(IOAT_CHANCMD_RESET,
 161                        ioat_chanbase + IOAT1_CHANCMD_OFFSET);
 162                 return -1;
 163         }
 164
 165         if (*(u32 *) ((u8 *) desc + 3068) != 0xabababab ||
 166             *(u32 *) ((u8 *) desc + 2044) != 0xabababab) {
 167                 dprintk("Data values src 0x%x, dest 0x%x, memset 0x%x\n",
 168                         *(u32 *) ((u8 *) desc + 2048),
 169                         *(u32 *) ((u8 *) desc + 1024),
 170                         *(u32 *) ((u8 *) desc + 3072));
 171                 return -1;
 172         }
 173         return 0;
 174 }
 175
 176 static struct device dummy_dma_dev = {
 177         .bus_id = "fallback device",
 178         .coherent_dma_mask = DMA_64BIT_MASK,
 179         .dma_mask = &dummy_dma_dev.coherent_dma_mask,
 180 };
 181
 182 /* Setup and initialize I/O AT */
 183 /* This driver needs I/O AT as the throttling takes effect only when there is
 184  * some memory activity. We use I/O AT to set up a dummy copy, while all CPUs
 185  * go idle and memory is throttled.
 186  */
 187 static int __init i7300_idle_ioat_init(void)
 188 {
 189         u8 ver, chan_count, ioat_chan;
 190         u16 chan_ctl;
 191
 192         ioat_iomap = (u8 *) ioremap_nocache(pci_resource_start(ioat_dev, 0),
 193                                             pci_resource_len(ioat_dev, 0));
 194
 195         if (!ioat_iomap) {
 196                 printk(KERN_ERR I7300_PRINT "failed to map I/O AT registers\n");
 197                 goto err_ret;
 198         }
 199
 200         ver = readb(ioat_iomap + IOAT_VER_OFFSET);
 201         if (ver != IOAT_VER_1_2) {
 202                 printk(KERN_ERR I7300_PRINT "unknown I/O AT version (%u.%u)\n",
 203                         ver >> 4, ver & 0xf);
 204                 goto err_unmap;
 205         }
 206
 207         chan_count = readb(ioat_iomap + IOAT_CHANCNT_OFFSET);
 208         if (!chan_count) {
 209                 printk(KERN_ERR I7300_PRINT "unexpected # of I/O AT channels "
 210                         "(%u)\n",
 211                         chan_count);
 212                 goto err_unmap;
 213         }
 214
 215         ioat_chan = chan_count - 1;
 216         ioat_chanbase = IOAT_CHANBASE(ioat_iomap, ioat_chan);
 217
 218         chan_ctl = readw(ioat_chanbase + IOAT_CHANCTRL_OFFSET);
 219         if (chan_ctl & IOAT_CHANCTRL_CHANNEL_IN_USE) {
 220                 printk(KERN_ERR I7300_PRINT "channel %d in use\n", ioat_chan);
 221                 goto err_unmap;
 222         }
 223
 224         writew(IOAT_CHANCTRL_CHANNEL_IN_USE,
 225                 ioat_chanbase + IOAT_CHANCTRL_OFFSET);
 226
 227         ioat_desc = (struct ioat_dma_descriptor *)dma_alloc_coherent(
 228                         &dummy_dma_dev, 4096,
 229                         (dma_addr_t *)&ioat_desc_phys, GFP_KERNEL);
 230         if (!ioat_desc) {
 231                 printk(KERN_ERR I7300_PRINT "failed to allocate I/O AT desc\n");
 232                 goto err_mark_unused;
 233         }
 234
 235         writel(ioat_desc_phys & 0xffffffffUL,
 236                ioat_chanbase + IOAT1_CHAINADDR_OFFSET_LOW);
 237         writel(ioat_desc_phys >> 32,
 238                ioat_chanbase + IOAT1_CHAINADDR_OFFSET_HIGH);
 239
 240         if (i7300_idle_ioat_selftest(ioat_iomap, ioat_desc, ioat_desc_phys)) {
 241                 printk(KERN_ERR I7300_PRINT "I/O AT self-test failed\n");
 242                 goto err_free;
 243         }
 244
 245         /* Setup circular I/O AT descriptor chain */
 246         ioat_desc[0].ctl = IOAT_DESC_SADDR_SNP_CTL | IOAT_DESC_DADDR_SNP_CTL;
 247         ioat_desc[0].src_addr = ioat_desc_phys + 2048;
 248         ioat_desc[0].dst_addr = ioat_desc_phys + 3072;
 249         ioat_desc[0].size = 128;
 250         ioat_desc[0].next = ioat_desc_phys + sizeof(struct ioat_dma_descriptor);
 251
 252         ioat_desc[1].ctl = ioat_desc[0].ctl;
 253         ioat_desc[1].src_addr = ioat_desc[0].src_addr;
 254         ioat_desc[1].dst_addr = ioat_desc[0].dst_addr;
 255         ioat_desc[1].size = ioat_desc[0].size;
 256         ioat_desc[1].next = ioat_desc_phys;
 257
 258         return 0;
 259
 260 err_free:
 261         dma_free_coherent(&dummy_dma_dev, 4096, (void *)ioat_desc, 0);
 262 err_mark_unused:
 263         writew(0, ioat_chanbase + IOAT_CHANCTRL_OFFSET);
 264 err_unmap:
 265         iounmap(ioat_iomap);
 266 err_ret:
 267         return -ENODEV;
 268 }
 269
 270 /* Cleanup I/O AT */
 271 static void __exit i7300_idle_ioat_exit(void)
 272 {
 273         int i;
 274         u64 chan_sts;
 275
 276         i7300_idle_ioat_stop();
 277
 278         /* Wait for a while for the channel to halt before releasing */
 279         for (i = 0; i < 10; i++) {
 280                 writeb(IOAT_CHANCMD_RESET,
 281                        ioat_chanbase + IOAT1_CHANCMD_OFFSET);
 282
 283                 chan_sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
 284                         IOAT_CHANSTS_DMA_TRANSFER_STATUS;
 285
 286                 if (chan_sts != IOAT_CHANSTS_DMA_TRANSFER_STATUS_ACTIVE) {
 287                         writew(0, ioat_chanbase + IOAT_CHANCTRL_OFFSET);
 288                         break;
 289                 }
 290                 udelay(1000);
 291         }
 292
 293         chan_sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
 294                         IOAT_CHANSTS_DMA_TRANSFER_STATUS;
 295
 296         /*
 297          * We tried to reset multiple times. If IO A/T channel is still active
 298          * flag an error and return without cleanup. Memory leak is better
 299          * than random corruption in that extreme error situation.
 300          */
 301         if (chan_sts == IOAT_CHANSTS_DMA_TRANSFER_STATUS_ACTIVE) {
 302                 printk(KERN_ERR I7300_PRINT "Unable to stop IO A/T channels."
 303                         " Not freeing resources\n");
 304                 return;
 305         }
 306
 307         dma_free_coherent(&dummy_dma_dev, 4096, (void *)ioat_desc, 0);
 308         iounmap(ioat_iomap);
 309 }
 310
 311 /* End: I/O AT Helper routines */
 312
 313 #define DIMM_THRTLOW 0x64
 314 #define DIMM_THRTCTL 0x67
 315 #define DIMM_THRTCTL_THRMHUNT (1UL << 0)
 316 #define DIMM_MC 0x40
 317 #define DIMM_GTW_MODE (1UL << 17)
 318 #define DIMM_GBLACT 0x60
 319
 320 /*
 321  * Keep track of an exponential-decaying average of recent idle durations.
 322  * The latest duration gets DURATION_WEIGHT_PCT percentage weight
 323  * in this average, with the old average getting the remaining weight.
 324  *
 325  * High weights emphasize recent history, low weights include long history.
 326  */
 327 #define DURATION_WEIGHT_PCT 55
 328
 329 /*
 330  * When the decaying average of recent durations or the predicted duration
 331  * of the next timer interrupt is shorter than duration_threshold, the
 332  * driver will decline to throttle.
 333  */
 334 #define DURATION_THRESHOLD_US 100
 335
 336
 337 /* Store DIMM thermal throttle configuration */
 338 static int i7300_idle_thrt_save(void)
 339 {
 340         u32 new_mc_val;
 341         u8 gblactlm;
 342
 343         pci_read_config_byte(fbd_dev, DIMM_THRTCTL, &i7300_idle_thrtctl_saved);
 344         pci_read_config_byte(fbd_dev, DIMM_THRTLOW, &i7300_idle_thrtlow_saved);
 345         pci_read_config_dword(fbd_dev, DIMM_MC, &i7300_idle_mc_saved);
 346         /*
 347          * Make sure we have Global Throttling Window Mode set to have a
 348          * "short" window. This (mostly) works around an issue where
 349          * throttling persists until the end of the global throttling window
 350          * size. On the tested system, this was resulting in a maximum of
 351          * 64 ms to exit throttling (average 32 ms). The actual numbers
 352          * depends on system frequencies. Setting the short window reduces
 353          * this by a factor of 4096.
 354          *
 355          * We will only do this only if the system is set for
 356          * unlimited-activations while in open-loop throttling (i.e., when
 357          * Global Activation Throttle Limit is zero).
 358          */
 359         pci_read_config_byte(fbd_dev, DIMM_GBLACT, &gblactlm);
 360         dprintk("thrtctl_saved = 0x%02x, thrtlow_saved = 0x%02x\n",
 361                 i7300_idle_thrtctl_saved,
 362                 i7300_idle_thrtlow_saved);
 363         dprintk("mc_saved = 0x%08x, gblactlm = 0x%02x\n",
 364                 i7300_idle_mc_saved,
 365                 gblactlm);
 366         if (gblactlm == 0) {
 367                 new_mc_val = i7300_idle_mc_saved | DIMM_GTW_MODE;
 368                 pci_write_config_dword(fbd_dev, DIMM_MC, new_mc_val);
 369                 return 0;
 370         } else {
 371                 dprintk("could not set GTW_MODE = 1 (OLTT enabled)\n");
 372                 return -ENODEV;
 373         }
 374 }
 375
 376 /* Restore DIMM thermal throttle configuration */
 377 static void i7300_idle_thrt_restore(void)
 378 {
 379         pci_write_config_dword(fbd_dev, DIMM_MC, i7300_idle_mc_saved);
 380         pci_write_config_byte(fbd_dev, DIMM_THRTLOW, i7300_idle_thrtlow_saved);
 381         pci_write_config_byte(fbd_dev, DIMM_THRTCTL, i7300_idle_thrtctl_saved);
 382 }
 383
 384 /* Enable DIMM thermal throttling */
 385 static void i7300_idle_start(void)
 386 {
 387         u8 new_ctl;
 388         u8 limit;
 389
 390         new_ctl = i7300_idle_thrtctl_saved & ~DIMM_THRTCTL_THRMHUNT;
 391         pci_write_config_byte(fbd_dev, DIMM_THRTCTL, new_ctl);
 392
 393         limit = i7300_idle_thrtlowlm;
 394         if (unlikely(limit > MAX_THRTLWLIMIT))
 395                 limit = MAX_THRTLWLIMIT;
 396
 397         pci_write_config_byte(fbd_dev, DIMM_THRTLOW, limit);
 398
 399         new_ctl = i7300_idle_thrtctl_saved | DIMM_THRTCTL_THRMHUNT;
 400         pci_write_config_byte(fbd_dev, DIMM_THRTCTL, new_ctl);
 401 }
 402
 403 /* Disable DIMM thermal throttling */
 404 static void i7300_idle_stop(void)
 405 {
 406         u8 new_ctl;
 407         u8 got_ctl;
 408
 409         new_ctl = i7300_idle_thrtctl_saved & ~DIMM_THRTCTL_THRMHUNT;
 410         pci_write_config_byte(fbd_dev, DIMM_THRTCTL, new_ctl);
 411
 412         pci_write_config_byte(fbd_dev, DIMM_THRTLOW, i7300_idle_thrtlow_saved);
 413         pci_write_config_byte(fbd_dev, DIMM_THRTCTL, i7300_idle_thrtctl_saved);
 414         pci_read_config_byte(fbd_dev, DIMM_THRTCTL, &got_ctl);
 415         WARN_ON_ONCE(got_ctl != i7300_idle_thrtctl_saved);
 416 }
 417
 418
 419 /*
 420  * i7300_avg_duration_check()
 421  * return 0 if the decaying average of recent idle durations is
 422  * more than DURATION_THRESHOLD_US
 423  */
 424 static int i7300_avg_duration_check(void)
 425 {
 426         if (avg_idle_us >= DURATION_THRESHOLD_US)
 427                 return 0;
 428
 429 #ifdef DEBUG
 430         past_skip++;
 431 #endif
 432         return 1;
 433 }
 434
 435 /* Idle notifier to look at idle CPUs */
 436 static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
 437                                 void *data)
 438 {
 439         unsigned long flags;
 440         ktime_t now_ktime;
 441         static ktime_t idle_begin_time;
 442         static int time_init = 1;
 443
 444         if (!i7300_idle_thrtlowlm)
 445                 return 0;
 446
 447         if (unlikely(time_init)) {
 448                 time_init = 0;
 449                 idle_begin_time = ktime_get();
 450         }
 451
 452         spin_lock_irqsave(&i7300_idle_lock, flags);
 453         if (val == IDLE_START) {
 454
 455                 cpu_set(smp_processor_id(), idle_cpumask);
 456
 457                 if (cpus_weight(idle_cpumask) != num_online_cpus())
 458                         goto end;
 459
 460                 now_ktime = ktime_get();
 461                 idle_begin_time = now_ktime;
 462
 463                 if (i7300_avg_duration_check())
 464                         goto end;
 465
 466                 i7300_idle_active = 1;
 467                 total_starts++;
 468                 start_ktime = now_ktime;
 469
 470                 i7300_idle_start();
 471                 i7300_idle_ioat_start();
 472
 473         } else if (val == IDLE_END) {
 474                 cpu_clear(smp_processor_id(), idle_cpumask);
 475                 if (cpus_weight(idle_cpumask) == (num_online_cpus() - 1)) {
 476                         /* First CPU coming out of idle */
 477                         u64 idle_duration_us;
 478
 479                         now_ktime = ktime_get();
 480
 481                         idle_duration_us = ktime_to_us(ktime_sub
 482                                                 (now_ktime, idle_begin_time));
 483
 484                         avg_idle_us =
 485                                 ((100 - DURATION_WEIGHT_PCT) * avg_idle_us +
 486                                  DURATION_WEIGHT_PCT * idle_duration_us) / 100;
 487
 488                         if (i7300_idle_active) {
 489                                 ktime_t idle_ktime;
 490
 491                                 idle_ktime = ktime_sub(now_ktime, start_ktime);
 492                                 total_us += ktime_to_us(idle_ktime);
 493
 494                                 i7300_idle_ioat_stop();
 495                                 i7300_idle_stop();
 496                                 i7300_idle_active = 0;
 497                         }
 498                 }
 499         }
 500 end:
 501         spin_unlock_irqrestore(&i7300_idle_lock, flags);
 502         return 0;
 503 }
 504
 505 static struct notifier_block i7300_idle_nb = {
 506         .notifier_call = i7300_idle_notifier,
 507 };
 508
 509 MODULE_DEVICE_TABLE(pci, pci_tbl);
 510
 511 int stats_open_generic(struct inode *inode, struct file *fp)
 512 {
 513         fp->private_data = inode->i_private;
 514         return 0;
 515 }
 516
 517 static ssize_t stats_read_ul(struct file *fp, char __user *ubuf, size_t count,
 518                                 loff_t *off)
 519 {
 520         unsigned long *p = fp->private_data;
 521         char buf[32];
 522         int len;
 523
 524         len = snprintf(buf, 32, "%lu\n", *p);
 525         return simple_read_from_buffer(ubuf, count, off, buf, len);
 526 }
 527
 528 static const struct file_operations idle_fops = {
 529         .open   = stats_open_generic,
 530         .read   = stats_read_ul,
 531 };
 532
 533 struct debugfs_file_info {
 534         void *ptr;
 535         char name[32];
 536         struct dentry *file;
 537 } debugfs_file_list[] = {
 538                                 {&total_starts, "total_starts", NULL},
 539                                 {&total_us, "total_us", NULL},
 540 #ifdef DEBUG
 541                                 {&past_skip, "past_skip", NULL},
 542 #endif
 543                                 {NULL, "", NULL}
 544                         };
 545
 546 static int __init i7300_idle_init(void)
 547 {
 548         spin_lock_init(&i7300_idle_lock);
 549         cpus_clear(idle_cpumask);
 550         total_us = 0;
 551
 552         if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev))
 553                 return -ENODEV;
 554
 555         if (i7300_idle_thrt_save())
 556                 return -ENODEV;
 557
 558         if (i7300_idle_ioat_init())
 559                 return -ENODEV;
 560
 561         debugfs_dir = debugfs_create_dir("i7300_idle", NULL);
 562         if (debugfs_dir) {
 563                 int i = 0;
 564
 565                 while (debugfs_file_list[i].ptr != NULL) {
 566                         debugfs_file_list[i].file = debugfs_create_file(
 567                                         debugfs_file_list[i].name,
 568                                         S_IRUSR,
 569                                         debugfs_dir,
 570                                         debugfs_file_list[i].ptr,
 571                                         &idle_fops);
 572                         i++;
 573                 }
 574         }
 575
 576         idle_notifier_register(&i7300_idle_nb);
 577
 578         printk(KERN_INFO "i7300_idle: loaded v%s\n", I7300_IDLE_DRIVER_VERSION);
 579         return 0;
 580 }
 581
 582 static void __exit i7300_idle_exit(void)
 583 {
 584         idle_notifier_unregister(&i7300_idle_nb);
 585
 586         if (debugfs_dir) {
 587                 int i = 0;
 588
 589                 while (debugfs_file_list[i].file != NULL) {
 590                         debugfs_remove(debugfs_file_list[i].file);
 591                         i++;
 592                 }
 593
 594                 debugfs_remove(debugfs_dir);
 595         }
 596         i7300_idle_thrt_restore();
 597         i7300_idle_ioat_exit();
 598 }
 599
 600 module_init(i7300_idle_init);
 601 module_exit(i7300_idle_exit);
 602
 603 MODULE_AUTHOR("Andy Henroid <andrew.d.henroid@intel.com>");
 604 MODULE_DESCRIPTION("Intel Chipset DIMM Idle Power Saving Driver v"
 605                         I7300_IDLE_DRIVER_VERSION);
 606 MODULE_LICENSE("GPL");