2 * Provides I2C support for Philips PNX010x/PNX4008 boards.
4 * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
5 * Vitaly Wool <vwool@ru.mvista.com>
7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/timer.h>
19 #include <linux/completion.h>
20 #include <linux/platform_device.h>
21 #include <linux/i2c-pnx.h>
22 #include <mach/hardware.h>
24 #include <asm/uaccess.h>
26 #define I2C_PNX_TIMEOUT 10 /* msec */
27 #define I2C_PNX_SPEED_KHZ 100
28 #define I2C_PNX_REGION_SIZE 0x100
29 #define PNX_DEFAULT_FREQ 13 /* MHz */
31 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
34 (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
38 return (timeout <= 0);
41 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
44 (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
48 return (timeout <= 0);
51 static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
53 struct i2c_pnx_algo_data *data = adap->algo_data;
54 struct timer_list *timer = &data->mif.timer;
55 int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
60 del_timer_sync(timer);
62 dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
65 timer->expires = jiffies + expires;
66 timer->data = (unsigned long)adap;
72 * i2c_pnx_start - start a device
73 * @slave_addr: slave address
74 * @adap: pointer to adapter structure
76 * Generate a START signal in the desired mode.
78 static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
80 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
82 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
83 slave_addr, alg_data->mif.mode);
85 /* Check for 7 bit slave addresses only */
86 if (slave_addr & ~0x7f) {
87 dev_err(&adap->dev, "%s: Invalid slave address %x. "
88 "Only 7-bit addresses are supported\n",
89 adap->name, slave_addr);
93 /* First, make sure bus is idle */
94 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
95 /* Somebody else is monopolizing the bus */
96 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
97 "cntrl = %x, stat = %x\n",
98 adap->name, slave_addr,
99 ioread32(I2C_REG_CTL(alg_data)),
100 ioread32(I2C_REG_STS(alg_data)));
102 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
103 /* Sorry, we lost the bus */
104 dev_err(&adap->dev, "%s: Arbitration failure. "
105 "Slave addr = %02x\n", adap->name, slave_addr);
110 * OK, I2C is enabled and we have the bus.
111 * Clear the current TDI and AFI status flags.
113 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
114 I2C_REG_STS(alg_data));
116 dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
117 (slave_addr << 1) | start_bit | alg_data->mif.mode);
119 /* Write the slave address, START bit and R/W bit */
120 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
121 I2C_REG_TX(alg_data));
123 dev_dbg(&adap->dev, "%s(): exit\n", __func__);
129 * i2c_pnx_stop - stop a device
130 * @adap: pointer to I2C adapter structure
132 * Generate a STOP signal to terminate the master transaction.
134 static void i2c_pnx_stop(struct i2c_adapter *adap)
136 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
137 /* Only 1 msec max timeout due to interrupt context */
140 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
141 __func__, ioread32(I2C_REG_STS(alg_data)));
143 /* Write a STOP bit to TX FIFO */
144 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
146 /* Wait until the STOP is seen. */
147 while (timeout > 0 &&
148 (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
149 /* may be called from interrupt context */
154 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
155 __func__, ioread32(I2C_REG_STS(alg_data)));
159 * i2c_pnx_master_xmit - transmit data to slave
160 * @adap: pointer to I2C adapter structure
162 * Sends one byte of data to the slave
164 static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
166 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
169 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
170 __func__, ioread32(I2C_REG_STS(alg_data)));
172 if (alg_data->mif.len > 0) {
173 /* We still have something to talk about... */
174 val = *alg_data->mif.buf++;
176 if (alg_data->mif.len == 1) {
183 iowrite32(val, I2C_REG_TX(alg_data));
185 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
186 val, alg_data->mif.len + 1);
188 if (alg_data->mif.len == 0) {
189 if (alg_data->last) {
190 /* Wait until the STOP is seen. */
191 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
192 dev_err(&adap->dev, "The bus is still "
193 "active after timeout\n");
195 /* Disable master interrupts */
196 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
197 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
198 I2C_REG_CTL(alg_data));
200 del_timer_sync(&alg_data->mif.timer);
202 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
205 complete(&alg_data->mif.complete);
207 } else if (alg_data->mif.len == 0) {
208 /* zero-sized transfer */
211 /* Disable master interrupts. */
212 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
213 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
214 I2C_REG_CTL(alg_data));
217 del_timer_sync(&alg_data->mif.timer);
218 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
219 "zero-xfer.\n", __func__);
221 complete(&alg_data->mif.complete);
224 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
225 __func__, ioread32(I2C_REG_STS(alg_data)));
231 * i2c_pnx_master_rcv - receive data from slave
232 * @adap: pointer to I2C adapter structure
234 * Reads one byte data from the slave
236 static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
238 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
239 unsigned int val = 0;
242 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
243 __func__, ioread32(I2C_REG_STS(alg_data)));
245 /* Check, whether there is already data,
246 * or we didn't 'ask' for it yet.
248 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
249 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
250 "Rx-fifo...\n", __func__);
252 if (alg_data->mif.len == 1) {
253 /* Last byte, do not acknowledge next rcv. */
259 * Enable interrupt RFDAIE (data in Rx fifo),
260 * and disable DRMIE (need data for Tx)
262 ctl = ioread32(I2C_REG_CTL(alg_data));
263 ctl |= mcntrl_rffie | mcntrl_daie;
264 ctl &= ~mcntrl_drmie;
265 iowrite32(ctl, I2C_REG_CTL(alg_data));
269 * Now we'll 'ask' for data:
270 * For each byte we want to receive, we must
271 * write a (dummy) byte to the Tx-FIFO.
273 iowrite32(val, I2C_REG_TX(alg_data));
279 if (alg_data->mif.len > 0) {
280 val = ioread32(I2C_REG_RX(alg_data));
281 *alg_data->mif.buf++ = (u8) (val & 0xff);
282 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
286 if (alg_data->mif.len == 0) {
288 /* Wait until the STOP is seen. */
289 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
290 dev_err(&adap->dev, "The bus is still "
291 "active after timeout\n");
293 /* Disable master interrupts */
294 ctl = ioread32(I2C_REG_CTL(alg_data));
295 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
296 mcntrl_drmie | mcntrl_daie);
297 iowrite32(ctl, I2C_REG_CTL(alg_data));
300 del_timer_sync(&alg_data->mif.timer);
301 complete(&alg_data->mif.complete);
305 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
306 __func__, ioread32(I2C_REG_STS(alg_data)));
311 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
314 struct i2c_adapter *adap = dev_id;
315 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
317 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
319 ioread32(I2C_REG_STS(alg_data)),
320 ioread32(I2C_REG_CTL(alg_data)),
322 stat = ioread32(I2C_REG_STS(alg_data));
324 /* let's see what kind of event this is */
325 if (stat & mstatus_afi) {
326 /* We lost arbitration in the midst of a transfer */
327 alg_data->mif.ret = -EIO;
329 /* Disable master interrupts. */
330 ctl = ioread32(I2C_REG_CTL(alg_data));
331 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
333 iowrite32(ctl, I2C_REG_CTL(alg_data));
335 /* Stop timer, to prevent timeout. */
336 del_timer_sync(&alg_data->mif.timer);
337 complete(&alg_data->mif.complete);
338 } else if (stat & mstatus_nai) {
339 /* Slave did not acknowledge, generate a STOP */
340 dev_dbg(&adap->dev, "%s(): "
341 "Slave did not acknowledge, generating a STOP.\n",
345 /* Disable master interrupts. */
346 ctl = ioread32(I2C_REG_CTL(alg_data));
347 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
349 iowrite32(ctl, I2C_REG_CTL(alg_data));
351 /* Our return value. */
352 alg_data->mif.ret = -EIO;
354 /* Stop timer, to prevent timeout. */
355 del_timer_sync(&alg_data->mif.timer);
356 complete(&alg_data->mif.complete);
360 * - Master Tx needs data.
361 * - There is data in the Rx-fifo
362 * The latter is only the case if we have requested for data,
363 * via a dummy write. (See 'i2c_pnx_master_rcv'.)
364 * We therefore check, as a sanity check, whether that interrupt
367 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
368 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
369 i2c_pnx_master_xmit(adap);
370 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
371 i2c_pnx_master_rcv(adap);
376 /* Clear TDI and AFI bits */
377 stat = ioread32(I2C_REG_STS(alg_data));
378 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
380 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
381 __func__, ioread32(I2C_REG_STS(alg_data)),
382 ioread32(I2C_REG_CTL(alg_data)));
387 static void i2c_pnx_timeout(unsigned long data)
389 struct i2c_adapter *adap = (struct i2c_adapter *)data;
390 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
393 dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
394 "Resetting master...\n",
395 ioread32(I2C_REG_STS(alg_data)),
396 ioread32(I2C_REG_CTL(alg_data)));
398 /* Reset master and disable interrupts */
399 ctl = ioread32(I2C_REG_CTL(alg_data));
400 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
401 iowrite32(ctl, I2C_REG_CTL(alg_data));
404 iowrite32(ctl, I2C_REG_CTL(alg_data));
405 wait_reset(I2C_PNX_TIMEOUT, alg_data);
406 alg_data->mif.ret = -EIO;
407 complete(&alg_data->mif.complete);
410 static inline void bus_reset_if_active(struct i2c_adapter *adap)
412 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
415 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
417 "%s: Bus is still active after xfer. Reset it...\n",
419 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
420 I2C_REG_CTL(alg_data));
421 wait_reset(I2C_PNX_TIMEOUT, alg_data);
422 } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
423 /* If there is data in the fifo's after transfer,
424 * flush fifo's by reset.
426 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
427 I2C_REG_CTL(alg_data));
428 wait_reset(I2C_PNX_TIMEOUT, alg_data);
429 } else if (stat & mstatus_nai) {
430 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
431 I2C_REG_CTL(alg_data));
432 wait_reset(I2C_PNX_TIMEOUT, alg_data);
437 * i2c_pnx_xfer - generic transfer entry point
438 * @adap: pointer to I2C adapter structure
439 * @msgs: array of messages
440 * @num: number of messages
442 * Initiates the transfer
445 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
447 struct i2c_msg *pmsg;
448 int rc = 0, completed = 0, i;
449 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
450 u32 stat = ioread32(I2C_REG_STS(alg_data));
452 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
453 __func__, num, ioread32(I2C_REG_STS(alg_data)));
455 bus_reset_if_active(adap);
457 /* Process transactions in a loop. */
458 for (i = 0; rc >= 0 && i < num; i++) {
464 if (pmsg->flags & I2C_M_TEN) {
466 "%s: 10 bits addr not supported!\n",
472 alg_data->mif.buf = pmsg->buf;
473 alg_data->mif.len = pmsg->len;
474 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
475 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
476 alg_data->mif.ret = 0;
477 alg_data->last = (i == num - 1);
479 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
483 i2c_pnx_arm_timer(adap);
485 /* initialize the completion var */
486 init_completion(&alg_data->mif.complete);
488 /* Enable master interrupt */
489 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
490 mcntrl_naie | mcntrl_drmie,
491 I2C_REG_CTL(alg_data));
493 /* Put start-code and slave-address on the bus. */
494 rc = i2c_pnx_start(addr, adap);
498 /* Wait for completion */
499 wait_for_completion(&alg_data->mif.complete);
501 if (!(rc = alg_data->mif.ret))
503 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
506 /* Clear TDI and AFI bits in case they are set. */
507 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
509 "%s: TDI still set... clearing now.\n",
511 iowrite32(stat, I2C_REG_STS(alg_data));
513 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
515 "%s: AFI still set... clearing now.\n",
517 iowrite32(stat, I2C_REG_STS(alg_data));
521 bus_reset_if_active(adap);
523 /* Cleanup to be sure... */
524 alg_data->mif.buf = NULL;
525 alg_data->mif.len = 0;
527 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
528 __func__, ioread32(I2C_REG_STS(alg_data)));
530 if (completed != num)
531 return ((rc < 0) ? rc : -EREMOTEIO);
536 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
538 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
541 static struct i2c_algorithm pnx_algorithm = {
542 .master_xfer = i2c_pnx_xfer,
543 .functionality = i2c_pnx_func,
546 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
549 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
550 return i2c_pnx->suspend(pdev, state);
553 static int i2c_pnx_controller_resume(struct platform_device *pdev)
555 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
556 return i2c_pnx->resume(pdev);
559 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
563 struct i2c_pnx_algo_data *alg_data;
565 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
567 if (!i2c_pnx || !i2c_pnx->adapter) {
568 dev_err(&pdev->dev, "%s: no platform data supplied\n",
574 platform_set_drvdata(pdev, i2c_pnx);
576 if (i2c_pnx->calculate_input_freq)
577 freq_mhz = i2c_pnx->calculate_input_freq(pdev);
579 freq_mhz = PNX_DEFAULT_FREQ;
580 dev_info(&pdev->dev, "Setting bus frequency to default value: "
581 "%d MHz\n", freq_mhz);
584 i2c_pnx->adapter->algo = &pnx_algorithm;
586 alg_data = i2c_pnx->adapter->algo_data;
587 init_timer(&alg_data->mif.timer);
588 alg_data->mif.timer.function = i2c_pnx_timeout;
589 alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
591 /* Register I/O resource */
592 if (!request_mem_region(alg_data->base, I2C_PNX_REGION_SIZE,
595 "I/O region 0x%08x for I2C already in use.\n",
601 if (!(alg_data->ioaddr =
602 (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
603 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
608 i2c_pnx->set_clock_run(pdev);
611 * Clock Divisor High This value is the number of system clocks
612 * the serial clock (SCL) will be high.
613 * For example, if the system clock period is 50 ns and the maximum
614 * desired serial period is 10000 ns (100 kHz), then CLKHI would be
615 * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
616 * programmed into CLKHI will vary from this slightly due to
617 * variations in the output pad's rise and fall times as well as
618 * the deglitching filter length.
621 tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
622 iowrite32(tmp, I2C_REG_CKH(alg_data));
623 iowrite32(tmp, I2C_REG_CKL(alg_data));
625 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
626 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
630 init_completion(&alg_data->mif.complete);
632 ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
633 0, pdev->name, i2c_pnx->adapter);
637 /* Register this adapter with the I2C subsystem */
638 i2c_pnx->adapter->dev.parent = &pdev->dev;
639 ret = i2c_add_adapter(i2c_pnx->adapter);
641 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
645 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
646 i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
651 free_irq(alg_data->irq, alg_data);
653 i2c_pnx->set_clock_stop(pdev);
655 iounmap((void *)alg_data->ioaddr);
657 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
659 platform_set_drvdata(pdev, NULL);
664 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
666 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
667 struct i2c_adapter *adap = i2c_pnx->adapter;
668 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
670 free_irq(alg_data->irq, alg_data);
671 i2c_del_adapter(adap);
672 i2c_pnx->set_clock_stop(pdev);
673 iounmap((void *)alg_data->ioaddr);
674 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
675 platform_set_drvdata(pdev, NULL);
680 static struct platform_driver i2c_pnx_driver = {
683 .owner = THIS_MODULE,
685 .probe = i2c_pnx_probe,
686 .remove = __devexit_p(i2c_pnx_remove),
687 .suspend = i2c_pnx_controller_suspend,
688 .resume = i2c_pnx_controller_resume,
691 static int __init i2c_adap_pnx_init(void)
693 return platform_driver_register(&i2c_pnx_driver);
696 static void __exit i2c_adap_pnx_exit(void)
698 platform_driver_unregister(&i2c_pnx_driver);
701 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
702 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
703 MODULE_LICENSE("GPL");
704 MODULE_ALIAS("platform:pnx-i2c");
706 /* We need to make sure I2C is initialized before USB */
707 subsys_initcall(i2c_adap_pnx_init);
708 module_exit(i2c_adap_pnx_exit);