SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/gpu/drm/radeon/radeon_object.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <linux/list.h>
  33 #include <drm/drmP.h>
  34 #include "radeon_drm.h"
  35 #include "radeon.h"
  36
  37
  38 int radeon_ttm_init(struct radeon_device *rdev);
  39 void radeon_ttm_fini(struct radeon_device *rdev);
  40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
  41
  42 /*
  43  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  44  * function are calling it.
  45  */
  46
  47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
  48 {
  49         struct radeon_bo *bo;
  50
  51         bo = container_of(tbo, struct radeon_bo, tbo);
  52         mutex_lock(&bo->rdev->gem.mutex);
  53         list_del_init(&bo->list);
  54         mutex_unlock(&bo->rdev->gem.mutex);
  55         radeon_bo_clear_surface_reg(bo);
  56         kfree(bo);
  57 }
  58
  59 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
  60 {
  61         u32 c = 0;
  62
  63         rbo->placement.fpfn = 0;
  64         rbo->placement.lpfn = 0;
  65         rbo->placement.placement = rbo->placements;
  66         rbo->placement.busy_placement = rbo->placements;
  67         if (domain & RADEON_GEM_DOMAIN_VRAM)
  68                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
  69                                         TTM_PL_FLAG_VRAM;
  70         if (domain & RADEON_GEM_DOMAIN_GTT)
  71                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  72         if (domain & RADEON_GEM_DOMAIN_CPU)
  73                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  74         if (!c)
  75                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  76         rbo->placement.num_placement = c;
  77         rbo->placement.num_busy_placement = c;
  78 }
  79
  80 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
  81                         unsigned long size, bool kernel, u32 domain,
  82                         struct radeon_bo **bo_ptr)
  83 {
  84         struct radeon_bo *bo;
  85         enum ttm_bo_type type;
  86         int r;
  87
  88         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
  89                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
  90         }
  91         if (kernel) {
  92                 type = ttm_bo_type_kernel;
  93         } else {
  94                 type = ttm_bo_type_device;
  95         }
  96         *bo_ptr = NULL;
  97         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
  98         if (bo == NULL)
  99                 return -ENOMEM;
 100         bo->rdev = rdev;
 101         bo->gobj = gobj;
 102         bo->surface_reg = -1;
 103         INIT_LIST_HEAD(&bo->list);
 104
 105         radeon_ttm_placement_from_domain(bo, domain);
 106         /* Kernel allocation are uninterruptible */
 107         r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
 108                         &bo->placement, 0, 0, !kernel, NULL, size,
 109                         &radeon_ttm_bo_destroy);
 110         if (unlikely(r != 0)) {
 111                 if (r != -ERESTARTSYS)
 112                         dev_err(rdev->dev,
 113                                 "object_init failed for (%lu, 0x%08X)\n",
 114                                 size, domain);
 115                 return r;
 116         }
 117         *bo_ptr = bo;
 118         if (gobj) {
 119                 mutex_lock(&bo->rdev->gem.mutex);
 120                 list_add_tail(&bo->list, &rdev->gem.objects);
 121                 mutex_unlock(&bo->rdev->gem.mutex);
 122         }
 123         return 0;
 124 }
 125
 126 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
 127 {
 128         bool is_iomem;
 129         int r;
 130
 131         if (bo->kptr) {
 132                 if (ptr) {
 133                         *ptr = bo->kptr;
 134                 }
 135                 return 0;
 136         }
 137         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
 138         if (r) {
 139                 return r;
 140         }
 141         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
 142         if (ptr) {
 143                 *ptr = bo->kptr;
 144         }
 145         radeon_bo_check_tiling(bo, 0, 0);
 146         return 0;
 147 }
 148
 149 void radeon_bo_kunmap(struct radeon_bo *bo)
 150 {
 151         if (bo->kptr == NULL)
 152                 return;
 153         bo->kptr = NULL;
 154         radeon_bo_check_tiling(bo, 0, 0);
 155         ttm_bo_kunmap(&bo->kmap);
 156 }
 157
 158 void radeon_bo_unref(struct radeon_bo **bo)
 159 {
 160         struct ttm_buffer_object *tbo;
 161
 162         if ((*bo) == NULL)
 163                 return;
 164         tbo = &((*bo)->tbo);
 165         ttm_bo_unref(&tbo);
 166         if (tbo == NULL)
 167                 *bo = NULL;
 168 }
 169
 170 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
 171 {
 172         int r, i;
 173
 174         radeon_ttm_placement_from_domain(bo, domain);
 175         if (bo->pin_count) {
 176                 bo->pin_count++;
 177                 if (gpu_addr)
 178                         *gpu_addr = radeon_bo_gpu_offset(bo);
 179                 return 0;
 180         }
 181         radeon_ttm_placement_from_domain(bo, domain);
 182         for (i = 0; i < bo->placement.num_placement; i++)
 183                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
 184         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 185         if (likely(r == 0)) {
 186                 bo->pin_count = 1;
 187                 if (gpu_addr != NULL)
 188                         *gpu_addr = radeon_bo_gpu_offset(bo);
 189         }
 190         if (unlikely(r != 0))
 191                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
 192         return r;
 193 }
 194
 195 int radeon_bo_unpin(struct radeon_bo *bo)
 196 {
 197         int r, i;
 198
 199         if (!bo->pin_count) {
 200                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
 201                 return 0;
 202         }
 203         bo->pin_count--;
 204         if (bo->pin_count)
 205                 return 0;
 206         for (i = 0; i < bo->placement.num_placement; i++)
 207                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
 208         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 209         if (unlikely(r != 0))
 210                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
 211         return r;
 212 }
 213
 214 int radeon_bo_evict_vram(struct radeon_device *rdev)
 215 {
 216         if (rdev->flags & RADEON_IS_IGP) {
 217                 /* Useless to evict on IGP chips */
 218                 return 0;
 219         }
 220         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 221 }
 222
 223 void radeon_bo_force_delete(struct radeon_device *rdev)
 224 {
 225         struct radeon_bo *bo, *n;
 226         struct drm_gem_object *gobj;
 227
 228         if (list_empty(&rdev->gem.objects)) {
 229                 return;
 230         }
 231         dev_err(rdev->dev, "Userspace still has active objects !\n");
 232         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
 233                 mutex_lock(&rdev->ddev->struct_mutex);
 234                 gobj = bo->gobj;
 235                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
 236                         gobj, bo, (unsigned long)gobj->size,
 237                         *((unsigned long *)&gobj->refcount));
 238                 mutex_lock(&bo->rdev->gem.mutex);
 239                 list_del_init(&bo->list);
 240                 mutex_unlock(&bo->rdev->gem.mutex);
 241                 radeon_bo_unref(&bo);
 242                 gobj->driver_private = NULL;
 243                 drm_gem_object_unreference(gobj);
 244                 mutex_unlock(&rdev->ddev->struct_mutex);
 245         }
 246 }
 247
 248 int radeon_bo_init(struct radeon_device *rdev)
 249 {
 250         /* Add an MTRR for the VRAM */
 251         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
 252                         MTRR_TYPE_WRCOMB, 1);
 253         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
 254                 rdev->mc.mc_vram_size >> 20,
 255                 (unsigned long long)rdev->mc.aper_size >> 20);
 256         DRM_INFO("RAM width %dbits %cDR\n",
 257                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
 258         return radeon_ttm_init(rdev);
 259 }
 260
 261 void radeon_bo_fini(struct radeon_device *rdev)
 262 {
 263         radeon_ttm_fini(rdev);
 264 }
 265
 266 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
 267                                 struct list_head *head)
 268 {
 269         if (lobj->wdomain) {
 270                 list_add(&lobj->list, head);
 271         } else {
 272                 list_add_tail(&lobj->list, head);
 273         }
 274 }
 275
 276 int radeon_bo_list_reserve(struct list_head *head)
 277 {
 278         struct radeon_bo_list *lobj;
 279         int r;
 280
 281         list_for_each_entry(lobj, head, list){
 282                 r = radeon_bo_reserve(lobj->bo, false);
 283                 if (unlikely(r != 0))
 284                         return r;
 285         }
 286         return 0;
 287 }
 288
 289 void radeon_bo_list_unreserve(struct list_head *head)
 290 {
 291         struct radeon_bo_list *lobj;
 292
 293         list_for_each_entry(lobj, head, list) {
 294                 /* only unreserve object we successfully reserved */
 295                 if (radeon_bo_is_reserved(lobj->bo))
 296                         radeon_bo_unreserve(lobj->bo);
 297         }
 298 }
 299
 300 int radeon_bo_list_validate(struct list_head *head, void *fence)
 301 {
 302         struct radeon_bo_list *lobj;
 303         struct radeon_bo *bo;
 304         struct radeon_fence *old_fence = NULL;
 305         int r;
 306
 307         r = radeon_bo_list_reserve(head);
 308         if (unlikely(r != 0)) {
 309                 return r;
 310         }
 311         list_for_each_entry(lobj, head, list) {
 312                 bo = lobj->bo;
 313                 if (!bo->pin_count) {
 314                         if (lobj->wdomain) {
 315                                 radeon_ttm_placement_from_domain(bo,
 316                                                                 lobj->wdomain);
 317                         } else {
 318                                 radeon_ttm_placement_from_domain(bo,
 319                                                                 lobj->rdomain);
 320                         }
 321                         r = ttm_bo_validate(&bo->tbo, &bo->placement,
 322                                                 true, false);
 323                         if (unlikely(r))
 324                                 return r;
 325                 }
 326                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
 327                 lobj->tiling_flags = bo->tiling_flags;
 328                 if (fence) {
 329                         old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
 330                         bo->tbo.sync_obj = radeon_fence_ref(fence);
 331                         bo->tbo.sync_obj_arg = NULL;
 332                 }
 333                 if (old_fence) {
 334                         radeon_fence_unref(&old_fence);
 335                 }
 336         }
 337         return 0;
 338 }
 339
 340 void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
 341 {
 342         struct radeon_bo_list *lobj;
 343         struct radeon_fence *old_fence;
 344
 345         if (fence)
 346                 list_for_each_entry(lobj, head, list) {
 347                         old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
 348                         if (old_fence == fence) {
 349                                 lobj->bo->tbo.sync_obj = NULL;
 350                                 radeon_fence_unref(&old_fence);
 351                         }
 352                 }
 353         radeon_bo_list_unreserve(head);
 354 }
 355
 356 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 357                              struct vm_area_struct *vma)
 358 {
 359         return ttm_fbdev_mmap(vma, &bo->tbo);
 360 }
 361
 362 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 363 {
 364         struct radeon_device *rdev = bo->rdev;
 365         struct radeon_surface_reg *reg;
 366         struct radeon_bo *old_object;
 367         int steal;
 368         int i;
 369
 370         BUG_ON(!atomic_read(&bo->tbo.reserved));
 371
 372         if (!bo->tiling_flags)
 373                 return 0;
 374
 375         if (bo->surface_reg >= 0) {
 376                 reg = &rdev->surface_regs[bo->surface_reg];
 377                 i = bo->surface_reg;
 378                 goto out;
 379         }
 380
 381         steal = -1;
 382         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 383
 384                 reg = &rdev->surface_regs[i];
 385                 if (!reg->bo)
 386                         break;
 387
 388                 old_object = reg->bo;
 389                 if (old_object->pin_count == 0)
 390                         steal = i;
 391         }
 392
 393         /* if we are all out */
 394         if (i == RADEON_GEM_MAX_SURFACES) {
 395                 if (steal == -1)
 396                         return -ENOMEM;
 397                 /* find someone with a surface reg and nuke their BO */
 398                 reg = &rdev->surface_regs[steal];
 399                 old_object = reg->bo;
 400                 /* blow away the mapping */
 401                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
 402                 ttm_bo_unmap_virtual(&old_object->tbo);
 403                 old_object->surface_reg = -1;
 404                 i = steal;
 405         }
 406
 407         bo->surface_reg = i;
 408         reg->bo = bo;
 409
 410 out:
 411         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
 412                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
 413                                bo->tbo.num_pages << PAGE_SHIFT);
 414         return 0;
 415 }
 416
 417 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
 418 {
 419         struct radeon_device *rdev = bo->rdev;
 420         struct radeon_surface_reg *reg;
 421
 422         if (bo->surface_reg == -1)
 423                 return;
 424
 425         reg = &rdev->surface_regs[bo->surface_reg];
 426         radeon_clear_surface_reg(rdev, bo->surface_reg);
 427
 428         reg->bo = NULL;
 429         bo->surface_reg = -1;
 430 }
 431
 432 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
 433                                 uint32_t tiling_flags, uint32_t pitch)
 434 {
 435         int r;
 436
 437         r = radeon_bo_reserve(bo, false);
 438         if (unlikely(r != 0))
 439                 return r;
 440         bo->tiling_flags = tiling_flags;
 441         bo->pitch = pitch;
 442         radeon_bo_unreserve(bo);
 443         return 0;
 444 }
 445
 446 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
 447                                 uint32_t *tiling_flags,
 448                                 uint32_t *pitch)
 449 {
 450         BUG_ON(!atomic_read(&bo->tbo.reserved));
 451         if (tiling_flags)
 452                 *tiling_flags = bo->tiling_flags;
 453         if (pitch)
 454                 *pitch = bo->pitch;
 455 }
 456
 457 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 458                                 bool force_drop)
 459 {
 460         BUG_ON(!atomic_read(&bo->tbo.reserved));
 461
 462         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
 463                 return 0;
 464
 465         if (force_drop) {
 466                 radeon_bo_clear_surface_reg(bo);
 467                 return 0;
 468         }
 469
 470         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
 471                 if (!has_moved)
 472                         return 0;
 473
 474                 if (bo->surface_reg >= 0)
 475                         radeon_bo_clear_surface_reg(bo);
 476                 return 0;
 477         }
 478
 479         if ((bo->surface_reg >= 0) && !has_moved)
 480                 return 0;
 481
 482         return radeon_bo_get_surface_reg(bo);
 483 }
 484
 485 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
 486                                 struct ttm_mem_reg *mem)
 487 {
 488         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 489         radeon_bo_check_tiling(rbo, 0, 1);
 490 }
 491
 492 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 493 {
 494         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 495         radeon_bo_check_tiling(rbo, 0, 0);
 496 }