SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/gpu/drm/radeon/radeon_object.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <linux/list.h>
  33 #include <drm/drmP.h>
  34 #include "radeon_drm.h"
  35 #include "radeon.h"
  36
  37
  38 int radeon_ttm_init(struct radeon_device *rdev);
  39 void radeon_ttm_fini(struct radeon_device *rdev);
  40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
  41
  42 /*
  43  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  44  * function are calling it.
  45  */
  46
  47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
  48 {
  49         struct radeon_bo *bo;
  50
  51         bo = container_of(tbo, struct radeon_bo, tbo);
  52         mutex_lock(&bo->rdev->gem.mutex);
  53         list_del_init(&bo->list);
  54         mutex_unlock(&bo->rdev->gem.mutex);
  55         radeon_bo_clear_surface_reg(bo);
  56         kfree(bo);
  57 }
  58
  59 static inline u32 radeon_ttm_flags_from_domain(u32 domain)
  60 {
  61         u32 flags = 0;
  62
  63         if (domain & RADEON_GEM_DOMAIN_VRAM) {
  64                 flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
  65         }
  66         if (domain & RADEON_GEM_DOMAIN_GTT) {
  67                 flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
  68         }
  69         if (domain & RADEON_GEM_DOMAIN_CPU) {
  70                 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
  71         }
  72         if (!flags) {
  73                 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
  74         }
  75         return flags;
  76 }
  77
  78 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
  79 {
  80         u32 c = 0;
  81
  82         rbo->placement.fpfn = 0;
  83         rbo->placement.lpfn = 0;
  84         rbo->placement.placement = rbo->placements;
  85         rbo->placement.busy_placement = rbo->placements;
  86         if (domain & RADEON_GEM_DOMAIN_VRAM)
  87                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
  88                                         TTM_PL_FLAG_VRAM;
  89         if (domain & RADEON_GEM_DOMAIN_GTT)
  90                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  91         if (domain & RADEON_GEM_DOMAIN_CPU)
  92                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  93         rbo->placement.num_placement = c;
  94         rbo->placement.num_busy_placement = c;
  95 }
  96
  97 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
  98                         unsigned long size, bool kernel, u32 domain,
  99                         struct radeon_bo **bo_ptr)
 100 {
 101         struct radeon_bo *bo;
 102         enum ttm_bo_type type;
 103         u32 flags;
 104         int r;
 105
 106         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
 107                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
 108         }
 109         if (kernel) {
 110                 type = ttm_bo_type_kernel;
 111         } else {
 112                 type = ttm_bo_type_device;
 113         }
 114         *bo_ptr = NULL;
 115         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
 116         if (bo == NULL)
 117                 return -ENOMEM;
 118         bo->rdev = rdev;
 119         bo->gobj = gobj;
 120         bo->surface_reg = -1;
 121         INIT_LIST_HEAD(&bo->list);
 122
 123         flags = radeon_ttm_flags_from_domain(domain);
 124         /* Kernel allocation are uninterruptible */
 125         r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type,
 126                                         flags, 0, 0, !kernel, NULL, size,
 127                                         &radeon_ttm_bo_destroy);
 128         if (unlikely(r != 0)) {
 129                 if (r != -ERESTARTSYS)
 130                         dev_err(rdev->dev,
 131                                 "object_init failed for (%ld, 0x%08X)\n",
 132                                 size, flags);
 133                 return r;
 134         }
 135         *bo_ptr = bo;
 136         if (gobj) {
 137                 mutex_lock(&bo->rdev->gem.mutex);
 138                 list_add_tail(&bo->list, &rdev->gem.objects);
 139                 mutex_unlock(&bo->rdev->gem.mutex);
 140         }
 141         return 0;
 142 }
 143
 144 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
 145 {
 146         bool is_iomem;
 147         int r;
 148
 149         if (bo->kptr) {
 150                 if (ptr) {
 151                         *ptr = bo->kptr;
 152                 }
 153                 return 0;
 154         }
 155         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
 156         if (r) {
 157                 return r;
 158         }
 159         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
 160         if (ptr) {
 161                 *ptr = bo->kptr;
 162         }
 163         radeon_bo_check_tiling(bo, 0, 0);
 164         return 0;
 165 }
 166
 167 void radeon_bo_kunmap(struct radeon_bo *bo)
 168 {
 169         if (bo->kptr == NULL)
 170                 return;
 171         bo->kptr = NULL;
 172         radeon_bo_check_tiling(bo, 0, 0);
 173         ttm_bo_kunmap(&bo->kmap);
 174 }
 175
 176 void radeon_bo_unref(struct radeon_bo **bo)
 177 {
 178         struct ttm_buffer_object *tbo;
 179
 180         if ((*bo) == NULL)
 181                 return;
 182         tbo = &((*bo)->tbo);
 183         ttm_bo_unref(&tbo);
 184         if (tbo == NULL)
 185                 *bo = NULL;
 186 }
 187
 188 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
 189 {
 190         int r, i;
 191
 192         radeon_ttm_placement_from_domain(bo, domain);
 193         if (bo->pin_count) {
 194                 bo->pin_count++;
 195                 if (gpu_addr)
 196                         *gpu_addr = radeon_bo_gpu_offset(bo);
 197                 return 0;
 198         }
 199         radeon_ttm_placement_from_domain(bo, domain);
 200         for (i = 0; i < bo->placement.num_placement; i++)
 201                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
 202         r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, false, false);
 203         if (likely(r == 0)) {
 204                 bo->pin_count = 1;
 205                 if (gpu_addr != NULL)
 206                         *gpu_addr = radeon_bo_gpu_offset(bo);
 207         }
 208         if (unlikely(r != 0))
 209                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
 210         return r;
 211 }
 212
 213 int radeon_bo_unpin(struct radeon_bo *bo)
 214 {
 215         int r, i;
 216
 217         if (!bo->pin_count) {
 218                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
 219                 return 0;
 220         }
 221         bo->pin_count--;
 222         if (bo->pin_count)
 223                 return 0;
 224         for (i = 0; i < bo->placement.num_placement; i++)
 225                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
 226         r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, false, false);
 227         if (unlikely(r != 0))
 228                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
 229         return r;
 230 }
 231
 232 int radeon_bo_evict_vram(struct radeon_device *rdev)
 233 {
 234         if (rdev->flags & RADEON_IS_IGP) {
 235                 /* Useless to evict on IGP chips */
 236                 return 0;
 237         }
 238         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 239 }
 240
 241 void radeon_bo_force_delete(struct radeon_device *rdev)
 242 {
 243         struct radeon_bo *bo, *n;
 244         struct drm_gem_object *gobj;
 245
 246         if (list_empty(&rdev->gem.objects)) {
 247                 return;
 248         }
 249         dev_err(rdev->dev, "Userspace still has active objects !\n");
 250         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
 251                 mutex_lock(&rdev->ddev->struct_mutex);
 252                 gobj = bo->gobj;
 253                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
 254                         gobj, bo, (unsigned long)gobj->size,
 255                         *((unsigned long *)&gobj->refcount));
 256                 mutex_lock(&bo->rdev->gem.mutex);
 257                 list_del_init(&bo->list);
 258                 mutex_unlock(&bo->rdev->gem.mutex);
 259                 radeon_bo_unref(&bo);
 260                 gobj->driver_private = NULL;
 261                 drm_gem_object_unreference(gobj);
 262                 mutex_unlock(&rdev->ddev->struct_mutex);
 263         }
 264 }
 265
 266 int radeon_bo_init(struct radeon_device *rdev)
 267 {
 268         /* Add an MTRR for the VRAM */
 269         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
 270                         MTRR_TYPE_WRCOMB, 1);
 271         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
 272                 rdev->mc.mc_vram_size >> 20,
 273                 (unsigned long long)rdev->mc.aper_size >> 20);
 274         DRM_INFO("RAM width %dbits %cDR\n",
 275                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
 276         return radeon_ttm_init(rdev);
 277 }
 278
 279 void radeon_bo_fini(struct radeon_device *rdev)
 280 {
 281         radeon_ttm_fini(rdev);
 282 }
 283
 284 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
 285                                 struct list_head *head)
 286 {
 287         if (lobj->wdomain) {
 288                 list_add(&lobj->list, head);
 289         } else {
 290                 list_add_tail(&lobj->list, head);
 291         }
 292 }
 293
 294 int radeon_bo_list_reserve(struct list_head *head)
 295 {
 296         struct radeon_bo_list *lobj;
 297         int r;
 298
 299         list_for_each_entry(lobj, head, list){
 300                 r = radeon_bo_reserve(lobj->bo, false);
 301                 if (unlikely(r != 0))
 302                         return r;
 303         }
 304         return 0;
 305 }
 306
 307 void radeon_bo_list_unreserve(struct list_head *head)
 308 {
 309         struct radeon_bo_list *lobj;
 310
 311         list_for_each_entry(lobj, head, list) {
 312                 /* only unreserve object we successfully reserved */
 313                 if (radeon_bo_is_reserved(lobj->bo))
 314                         radeon_bo_unreserve(lobj->bo);
 315         }
 316 }
 317
 318 int radeon_bo_list_validate(struct list_head *head, void *fence)
 319 {
 320         struct radeon_bo_list *lobj;
 321         struct radeon_bo *bo;
 322         struct radeon_fence *old_fence = NULL;
 323         int r;
 324
 325         r = radeon_bo_list_reserve(head);
 326         if (unlikely(r != 0)) {
 327                 return r;
 328         }
 329         list_for_each_entry(lobj, head, list) {
 330                 bo = lobj->bo;
 331                 if (!bo->pin_count) {
 332                         if (lobj->wdomain) {
 333                                 radeon_ttm_placement_from_domain(bo,
 334                                                                 lobj->wdomain);
 335                         } else {
 336                                 radeon_ttm_placement_from_domain(bo,
 337                                                                 lobj->rdomain);
 338                         }
 339                         r = ttm_buffer_object_validate(&bo->tbo,
 340                                                 &bo->placement,
 341                                                 true, false);
 342                         if (unlikely(r))
 343                                 return r;
 344                 }
 345                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
 346                 lobj->tiling_flags = bo->tiling_flags;
 347                 if (fence) {
 348                         old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
 349                         bo->tbo.sync_obj = radeon_fence_ref(fence);
 350                         bo->tbo.sync_obj_arg = NULL;
 351                 }
 352                 if (old_fence) {
 353                         radeon_fence_unref(&old_fence);
 354                 }
 355         }
 356         return 0;
 357 }
 358
 359 void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
 360 {
 361         struct radeon_bo_list *lobj;
 362         struct radeon_fence *old_fence;
 363
 364         if (fence)
 365                 list_for_each_entry(lobj, head, list) {
 366                         old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
 367                         if (old_fence == fence) {
 368                                 lobj->bo->tbo.sync_obj = NULL;
 369                                 radeon_fence_unref(&old_fence);
 370                         }
 371                 }
 372         radeon_bo_list_unreserve(head);
 373 }
 374
 375 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 376                              struct vm_area_struct *vma)
 377 {
 378         return ttm_fbdev_mmap(vma, &bo->tbo);
 379 }
 380
 381 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 382 {
 383         struct radeon_device *rdev = bo->rdev;
 384         struct radeon_surface_reg *reg;
 385         struct radeon_bo *old_object;
 386         int steal;
 387         int i;
 388
 389         BUG_ON(!atomic_read(&bo->tbo.reserved));
 390
 391         if (!bo->tiling_flags)
 392                 return 0;
 393
 394         if (bo->surface_reg >= 0) {
 395                 reg = &rdev->surface_regs[bo->surface_reg];
 396                 i = bo->surface_reg;
 397                 goto out;
 398         }
 399
 400         steal = -1;
 401         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 402
 403                 reg = &rdev->surface_regs[i];
 404                 if (!reg->bo)
 405                         break;
 406
 407                 old_object = reg->bo;
 408                 if (old_object->pin_count == 0)
 409                         steal = i;
 410         }
 411
 412         /* if we are all out */
 413         if (i == RADEON_GEM_MAX_SURFACES) {
 414                 if (steal == -1)
 415                         return -ENOMEM;
 416                 /* find someone with a surface reg and nuke their BO */
 417                 reg = &rdev->surface_regs[steal];
 418                 old_object = reg->bo;
 419                 /* blow away the mapping */
 420                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
 421                 ttm_bo_unmap_virtual(&old_object->tbo);
 422                 old_object->surface_reg = -1;
 423                 i = steal;
 424         }
 425
 426         bo->surface_reg = i;
 427         reg->bo = bo;
 428
 429 out:
 430         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
 431                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
 432                                bo->tbo.num_pages << PAGE_SHIFT);
 433         return 0;
 434 }
 435
 436 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
 437 {
 438         struct radeon_device *rdev = bo->rdev;
 439         struct radeon_surface_reg *reg;
 440
 441         if (bo->surface_reg == -1)
 442                 return;
 443
 444         reg = &rdev->surface_regs[bo->surface_reg];
 445         radeon_clear_surface_reg(rdev, bo->surface_reg);
 446
 447         reg->bo = NULL;
 448         bo->surface_reg = -1;
 449 }
 450
 451 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
 452                                 uint32_t tiling_flags, uint32_t pitch)
 453 {
 454         int r;
 455
 456         r = radeon_bo_reserve(bo, false);
 457         if (unlikely(r != 0))
 458                 return r;
 459         bo->tiling_flags = tiling_flags;
 460         bo->pitch = pitch;
 461         radeon_bo_unreserve(bo);
 462         return 0;
 463 }
 464
 465 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
 466                                 uint32_t *tiling_flags,
 467                                 uint32_t *pitch)
 468 {
 469         BUG_ON(!atomic_read(&bo->tbo.reserved));
 470         if (tiling_flags)
 471                 *tiling_flags = bo->tiling_flags;
 472         if (pitch)
 473                 *pitch = bo->pitch;
 474 }
 475
 476 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 477                                 bool force_drop)
 478 {
 479         BUG_ON(!atomic_read(&bo->tbo.reserved));
 480
 481         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
 482                 return 0;
 483
 484         if (force_drop) {
 485                 radeon_bo_clear_surface_reg(bo);
 486                 return 0;
 487         }
 488
 489         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
 490                 if (!has_moved)
 491                         return 0;
 492
 493                 if (bo->surface_reg >= 0)
 494                         radeon_bo_clear_surface_reg(bo);
 495                 return 0;
 496         }
 497
 498         if ((bo->surface_reg >= 0) && !has_moved)
 499                 return 0;
 500
 501         return radeon_bo_get_surface_reg(bo);
 502 }
 503
 504 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
 505                                 struct ttm_mem_reg *mem)
 506 {
 507         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 508         radeon_bo_check_tiling(rbo, 0, 1);
 509 }
 510
 511 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 512 {
 513         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 514         radeon_bo_check_tiling(rbo, 0, 0);
 515 }