drm/radeon/kms: force pinning buffer into visible VRAM
[safe/jmp/linux-2.6] / drivers / gpu / drm / radeon / radeon_object.c
1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32 #include <linux/list.h>
33 #include <drm/drmP.h>
34 #include "radeon_drm.h"
35 #include "radeon.h"
36
37
38 int radeon_ttm_init(struct radeon_device *rdev);
39 void radeon_ttm_fini(struct radeon_device *rdev);
40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
41
42 /*
43  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
44  * function are calling it.
45  */
46
47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
48 {
49         struct radeon_bo *bo;
50
51         bo = container_of(tbo, struct radeon_bo, tbo);
52         mutex_lock(&bo->rdev->gem.mutex);
53         list_del_init(&bo->list);
54         mutex_unlock(&bo->rdev->gem.mutex);
55         radeon_bo_clear_surface_reg(bo);
56         kfree(bo);
57 }
58
59 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
60 {
61         if (bo->destroy == &radeon_ttm_bo_destroy)
62                 return true;
63         return false;
64 }
65
66 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
67 {
68         u32 c = 0;
69
70         rbo->placement.fpfn = 0;
71         rbo->placement.lpfn = 0;
72         rbo->placement.placement = rbo->placements;
73         rbo->placement.busy_placement = rbo->placements;
74         if (domain & RADEON_GEM_DOMAIN_VRAM)
75                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
76                                         TTM_PL_FLAG_VRAM;
77         if (domain & RADEON_GEM_DOMAIN_GTT)
78                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
79         if (domain & RADEON_GEM_DOMAIN_CPU)
80                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
81         if (!c)
82                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
83         rbo->placement.num_placement = c;
84         rbo->placement.num_busy_placement = c;
85 }
86
87 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
88                         unsigned long size, bool kernel, u32 domain,
89                         struct radeon_bo **bo_ptr)
90 {
91         struct radeon_bo *bo;
92         enum ttm_bo_type type;
93         int r;
94
95         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
96                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
97         }
98         if (kernel) {
99                 type = ttm_bo_type_kernel;
100         } else {
101                 type = ttm_bo_type_device;
102         }
103         *bo_ptr = NULL;
104         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
105         if (bo == NULL)
106                 return -ENOMEM;
107         bo->rdev = rdev;
108         bo->gobj = gobj;
109         bo->surface_reg = -1;
110         INIT_LIST_HEAD(&bo->list);
111
112         radeon_ttm_placement_from_domain(bo, domain);
113         /* Kernel allocation are uninterruptible */
114         r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
115                         &bo->placement, 0, 0, !kernel, NULL, size,
116                         &radeon_ttm_bo_destroy);
117         if (unlikely(r != 0)) {
118                 if (r != -ERESTARTSYS)
119                         dev_err(rdev->dev,
120                                 "object_init failed for (%lu, 0x%08X)\n",
121                                 size, domain);
122                 return r;
123         }
124         *bo_ptr = bo;
125         if (gobj) {
126                 mutex_lock(&bo->rdev->gem.mutex);
127                 list_add_tail(&bo->list, &rdev->gem.objects);
128                 mutex_unlock(&bo->rdev->gem.mutex);
129         }
130         return 0;
131 }
132
133 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
134 {
135         bool is_iomem;
136         int r;
137
138         if (bo->kptr) {
139                 if (ptr) {
140                         *ptr = bo->kptr;
141                 }
142                 return 0;
143         }
144         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
145         if (r) {
146                 return r;
147         }
148         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
149         if (ptr) {
150                 *ptr = bo->kptr;
151         }
152         radeon_bo_check_tiling(bo, 0, 0);
153         return 0;
154 }
155
156 void radeon_bo_kunmap(struct radeon_bo *bo)
157 {
158         if (bo->kptr == NULL)
159                 return;
160         bo->kptr = NULL;
161         radeon_bo_check_tiling(bo, 0, 0);
162         ttm_bo_kunmap(&bo->kmap);
163 }
164
165 void radeon_bo_unref(struct radeon_bo **bo)
166 {
167         struct ttm_buffer_object *tbo;
168
169         if ((*bo) == NULL)
170                 return;
171         tbo = &((*bo)->tbo);
172         ttm_bo_unref(&tbo);
173         if (tbo == NULL)
174                 *bo = NULL;
175 }
176
177 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
178 {
179         int r, i;
180
181         if (bo->pin_count) {
182                 bo->pin_count++;
183                 if (gpu_addr)
184                         *gpu_addr = radeon_bo_gpu_offset(bo);
185                 return 0;
186         }
187         radeon_ttm_placement_from_domain(bo, domain);
188         /* force to pin into visible video ram */
189         bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
190         for (i = 0; i < bo->placement.num_placement; i++)
191                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
192         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
193         if (likely(r == 0)) {
194                 bo->pin_count = 1;
195                 if (gpu_addr != NULL)
196                         *gpu_addr = radeon_bo_gpu_offset(bo);
197         }
198         if (unlikely(r != 0))
199                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
200         return r;
201 }
202
203 int radeon_bo_unpin(struct radeon_bo *bo)
204 {
205         int r, i;
206
207         if (!bo->pin_count) {
208                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
209                 return 0;
210         }
211         bo->pin_count--;
212         if (bo->pin_count)
213                 return 0;
214         for (i = 0; i < bo->placement.num_placement; i++)
215                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
216         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
217         if (unlikely(r != 0))
218                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
219         return r;
220 }
221
222 int radeon_bo_evict_vram(struct radeon_device *rdev)
223 {
224         /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
225         if (0 && (rdev->flags & RADEON_IS_IGP)) {
226                 if (rdev->mc.igp_sideport_enabled == false)
227                         /* Useless to evict on IGP chips */
228                         return 0;
229         }
230         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
231 }
232
233 void radeon_bo_force_delete(struct radeon_device *rdev)
234 {
235         struct radeon_bo *bo, *n;
236         struct drm_gem_object *gobj;
237
238         if (list_empty(&rdev->gem.objects)) {
239                 return;
240         }
241         dev_err(rdev->dev, "Userspace still has active objects !\n");
242         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
243                 mutex_lock(&rdev->ddev->struct_mutex);
244                 gobj = bo->gobj;
245                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
246                         gobj, bo, (unsigned long)gobj->size,
247                         *((unsigned long *)&gobj->refcount));
248                 mutex_lock(&bo->rdev->gem.mutex);
249                 list_del_init(&bo->list);
250                 mutex_unlock(&bo->rdev->gem.mutex);
251                 radeon_bo_unref(&bo);
252                 gobj->driver_private = NULL;
253                 drm_gem_object_unreference(gobj);
254                 mutex_unlock(&rdev->ddev->struct_mutex);
255         }
256 }
257
258 int radeon_bo_init(struct radeon_device *rdev)
259 {
260         /* Add an MTRR for the VRAM */
261         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
262                         MTRR_TYPE_WRCOMB, 1);
263         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
264                 rdev->mc.mc_vram_size >> 20,
265                 (unsigned long long)rdev->mc.aper_size >> 20);
266         DRM_INFO("RAM width %dbits %cDR\n",
267                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
268         return radeon_ttm_init(rdev);
269 }
270
271 void radeon_bo_fini(struct radeon_device *rdev)
272 {
273         radeon_ttm_fini(rdev);
274 }
275
276 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
277                                 struct list_head *head)
278 {
279         if (lobj->wdomain) {
280                 list_add(&lobj->list, head);
281         } else {
282                 list_add_tail(&lobj->list, head);
283         }
284 }
285
286 int radeon_bo_list_reserve(struct list_head *head)
287 {
288         struct radeon_bo_list *lobj;
289         int r;
290
291         list_for_each_entry(lobj, head, list){
292                 r = radeon_bo_reserve(lobj->bo, false);
293                 if (unlikely(r != 0))
294                         return r;
295         }
296         return 0;
297 }
298
299 void radeon_bo_list_unreserve(struct list_head *head)
300 {
301         struct radeon_bo_list *lobj;
302
303         list_for_each_entry(lobj, head, list) {
304                 /* only unreserve object we successfully reserved */
305                 if (radeon_bo_is_reserved(lobj->bo))
306                         radeon_bo_unreserve(lobj->bo);
307         }
308 }
309
310 int radeon_bo_list_validate(struct list_head *head)
311 {
312         struct radeon_bo_list *lobj;
313         struct radeon_bo *bo;
314         int r;
315
316         r = radeon_bo_list_reserve(head);
317         if (unlikely(r != 0)) {
318                 return r;
319         }
320         list_for_each_entry(lobj, head, list) {
321                 bo = lobj->bo;
322                 if (!bo->pin_count) {
323                         if (lobj->wdomain) {
324                                 radeon_ttm_placement_from_domain(bo,
325                                                                 lobj->wdomain);
326                         } else {
327                                 radeon_ttm_placement_from_domain(bo,
328                                                                 lobj->rdomain);
329                         }
330                         r = ttm_bo_validate(&bo->tbo, &bo->placement,
331                                                 true, false);
332                         if (unlikely(r))
333                                 return r;
334                 }
335                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
336                 lobj->tiling_flags = bo->tiling_flags;
337         }
338         return 0;
339 }
340
341 void radeon_bo_list_fence(struct list_head *head, void *fence)
342 {
343         struct radeon_bo_list *lobj;
344         struct radeon_bo *bo;
345         struct radeon_fence *old_fence = NULL;
346
347         list_for_each_entry(lobj, head, list) {
348                 bo = lobj->bo;
349                 spin_lock(&bo->tbo.lock);
350                 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
351                 bo->tbo.sync_obj = radeon_fence_ref(fence);
352                 bo->tbo.sync_obj_arg = NULL;
353                 spin_unlock(&bo->tbo.lock);
354                 if (old_fence) {
355                         radeon_fence_unref(&old_fence);
356                 }
357         }
358 }
359
360 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
361                              struct vm_area_struct *vma)
362 {
363         return ttm_fbdev_mmap(vma, &bo->tbo);
364 }
365
366 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
367 {
368         struct radeon_device *rdev = bo->rdev;
369         struct radeon_surface_reg *reg;
370         struct radeon_bo *old_object;
371         int steal;
372         int i;
373
374         BUG_ON(!atomic_read(&bo->tbo.reserved));
375
376         if (!bo->tiling_flags)
377                 return 0;
378
379         if (bo->surface_reg >= 0) {
380                 reg = &rdev->surface_regs[bo->surface_reg];
381                 i = bo->surface_reg;
382                 goto out;
383         }
384
385         steal = -1;
386         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
387
388                 reg = &rdev->surface_regs[i];
389                 if (!reg->bo)
390                         break;
391
392                 old_object = reg->bo;
393                 if (old_object->pin_count == 0)
394                         steal = i;
395         }
396
397         /* if we are all out */
398         if (i == RADEON_GEM_MAX_SURFACES) {
399                 if (steal == -1)
400                         return -ENOMEM;
401                 /* find someone with a surface reg and nuke their BO */
402                 reg = &rdev->surface_regs[steal];
403                 old_object = reg->bo;
404                 /* blow away the mapping */
405                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
406                 ttm_bo_unmap_virtual(&old_object->tbo);
407                 old_object->surface_reg = -1;
408                 i = steal;
409         }
410
411         bo->surface_reg = i;
412         reg->bo = bo;
413
414 out:
415         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
416                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
417                                bo->tbo.num_pages << PAGE_SHIFT);
418         return 0;
419 }
420
421 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
422 {
423         struct radeon_device *rdev = bo->rdev;
424         struct radeon_surface_reg *reg;
425
426         if (bo->surface_reg == -1)
427                 return;
428
429         reg = &rdev->surface_regs[bo->surface_reg];
430         radeon_clear_surface_reg(rdev, bo->surface_reg);
431
432         reg->bo = NULL;
433         bo->surface_reg = -1;
434 }
435
436 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
437                                 uint32_t tiling_flags, uint32_t pitch)
438 {
439         int r;
440
441         r = radeon_bo_reserve(bo, false);
442         if (unlikely(r != 0))
443                 return r;
444         bo->tiling_flags = tiling_flags;
445         bo->pitch = pitch;
446         radeon_bo_unreserve(bo);
447         return 0;
448 }
449
450 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
451                                 uint32_t *tiling_flags,
452                                 uint32_t *pitch)
453 {
454         BUG_ON(!atomic_read(&bo->tbo.reserved));
455         if (tiling_flags)
456                 *tiling_flags = bo->tiling_flags;
457         if (pitch)
458                 *pitch = bo->pitch;
459 }
460
461 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
462                                 bool force_drop)
463 {
464         BUG_ON(!atomic_read(&bo->tbo.reserved));
465
466         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
467                 return 0;
468
469         if (force_drop) {
470                 radeon_bo_clear_surface_reg(bo);
471                 return 0;
472         }
473
474         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
475                 if (!has_moved)
476                         return 0;
477
478                 if (bo->surface_reg >= 0)
479                         radeon_bo_clear_surface_reg(bo);
480                 return 0;
481         }
482
483         if ((bo->surface_reg >= 0) && !has_moved)
484                 return 0;
485
486         return radeon_bo_get_surface_reg(bo);
487 }
488
489 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
490                            struct ttm_mem_reg *mem)
491 {
492         struct radeon_bo *rbo;
493         if (!radeon_ttm_bo_is_radeon_bo(bo))
494                 return;
495         rbo = container_of(bo, struct radeon_bo, tbo);
496         radeon_bo_check_tiling(rbo, 0, 1);
497 }
498
499 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
500 {
501         struct radeon_bo *rbo;
502         if (!radeon_ttm_bo_is_radeon_bo(bo))
503                 return;
504         rbo = container_of(bo, struct radeon_bo, tbo);
505         radeon_bo_check_tiling(rbo, 0, 0);
506 }