2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
36 #include <drm_dp_helper.h>
37 #include <linux/i2c.h>
38 #include <linux/i2c-id.h>
39 #include <linux/i2c-algo-bit.h>
40 #include "radeon_fixed.h"
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 enum radeon_rmx_type {
68 /* radeon gpio-based i2c
69 * 1. "mask" reg and bits
70 * grabs the gpio pins for software use
75 * 3. "en" reg and bits
76 * sets the pin direction
82 struct radeon_i2c_bus_rec {
88 /* can be used with hw i2c engine */
90 /* uses multi-media i2c engine */
93 uint32_t mask_clk_reg;
94 uint32_t mask_data_reg;
101 uint32_t mask_clk_mask;
102 uint32_t mask_data_mask;
104 uint32_t a_data_mask;
105 uint32_t en_clk_mask;
106 uint32_t en_data_mask;
108 uint32_t y_data_mask;
111 struct radeon_tmds_pll {
116 #define RADEON_MAX_BIOS_CONNECTOR 16
119 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
120 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
121 #define RADEON_PLL_USE_REF_DIV (1 << 2)
122 #define RADEON_PLL_LEGACY (1 << 3)
123 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
124 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
125 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
126 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
127 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
128 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
129 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
130 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
131 #define RADEON_PLL_USE_POST_DIV (1 << 12)
132 #define RADEON_PLL_IS_LCD (1 << 13)
135 enum radeon_pll_algo {
141 /* reference frequency */
142 uint32_t reference_freq;
145 uint32_t reference_div;
148 /* pll in/out limits */
151 uint32_t pll_out_min;
152 uint32_t pll_out_max;
153 uint32_t lcd_pll_out_min;
154 uint32_t lcd_pll_out_max;
158 uint32_t min_ref_div;
159 uint32_t max_ref_div;
160 uint32_t min_post_div;
161 uint32_t max_post_div;
162 uint32_t min_feedback_div;
163 uint32_t max_feedback_div;
164 uint32_t min_frac_feedback_div;
165 uint32_t max_frac_feedback_div;
167 /* flags for the current clock */
173 enum radeon_pll_algo algo;
176 struct i2c_algo_radeon_data {
177 struct i2c_adapter bit_adapter;
178 struct i2c_algo_bit_data bit_data;
181 struct radeon_i2c_chan {
182 struct i2c_adapter adapter;
183 struct drm_device *dev;
185 struct i2c_algo_dp_aux_data dp;
186 struct i2c_algo_radeon_data radeon;
188 struct radeon_i2c_bus_rec rec;
191 /* mostly for macs, but really any system without connector tables */
192 enum radeon_connector_table {
196 CT_POWERBOOK_EXTERNAL,
197 CT_POWERBOOK_INTERNAL,
205 enum radeon_dvo_chip {
210 struct radeon_mode_info {
211 struct atom_context *atom_context;
212 struct card_info *atom_card_info;
213 enum radeon_connector_table connector_table;
214 bool mode_config_initialized;
215 struct radeon_crtc *crtcs[6];
216 /* DVI-I properties */
217 struct drm_property *coherent_mode_property;
218 /* DAC enable load detect */
219 struct drm_property *load_detect_property;
220 /* TV standard load detect */
221 struct drm_property *tv_std_property;
222 /* legacy TMDS PLL detect */
223 struct drm_property *tmds_pll_property;
224 /* hardcoded DFP edid from BIOS */
225 struct edid *bios_hardcoded_edid;
228 #define MAX_H_CODE_TIMING_LEN 32
229 #define MAX_V_CODE_TIMING_LEN 32
231 /* need to store these as reading
232 back code tables is excessive */
233 struct radeon_tv_regs {
235 uint32_t timing_cntl;
239 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
240 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
244 struct drm_crtc base;
246 u16 lut_r[256], lut_g[256], lut_b[256];
249 uint32_t crtc_offset;
250 struct drm_gem_object *cursor_bo;
251 uint64_t cursor_addr;
254 uint32_t legacy_display_base_addr;
255 uint32_t legacy_cursor_offset;
256 enum radeon_rmx_type rmx_type;
259 struct drm_display_mode native_mode;
263 struct radeon_encoder_primary_dac {
264 /* legacy primary dac */
265 uint32_t ps2_pdac_adj;
268 struct radeon_encoder_lvds {
270 uint16_t panel_vcc_delay;
271 uint8_t panel_pwr_delay;
272 uint8_t panel_digon_delay;
273 uint8_t panel_blon_delay;
274 uint16_t panel_ref_divider;
275 uint8_t panel_post_divider;
276 uint16_t panel_fb_divider;
277 bool use_bios_dividers;
278 uint32_t lvds_gen_cntl;
280 struct drm_display_mode native_mode;
283 struct radeon_encoder_tv_dac {
285 uint32_t ps2_tvdac_adj;
286 uint32_t ntsc_tvdac_adj;
287 uint32_t pal_tvdac_adj;
292 int supported_tv_stds;
294 enum radeon_tv_std tv_std;
295 struct radeon_tv_regs tv;
298 struct radeon_encoder_int_tmds {
299 /* legacy int tmds */
300 struct radeon_tmds_pll tmds_pll[4];
303 struct radeon_encoder_ext_tmds {
305 struct radeon_i2c_chan *i2c_bus;
307 enum radeon_dvo_chip dvo_chip;
310 /* spread spectrum */
311 struct radeon_atom_ss {
320 struct radeon_encoder_atom_dig {
323 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
326 uint16_t panel_pwr_delay;
327 enum radeon_pll_algo pll_algo;
328 struct radeon_atom_ss *ss;
330 struct drm_display_mode native_mode;
333 struct radeon_encoder_atom_dac {
334 enum radeon_tv_std tv_std;
337 struct radeon_encoder {
338 struct drm_encoder base;
341 uint32_t active_device;
343 uint32_t pixel_clock;
344 enum radeon_rmx_type rmx_type;
345 struct drm_display_mode native_mode;
348 int hdmi_audio_workaround;
349 int hdmi_buffer_status;
352 struct radeon_connector_atom_dig {
353 uint32_t igp_lane_info;
356 struct radeon_i2c_chan *dp_i2c_bus;
363 struct radeon_gpio_rec {
381 enum radeon_hpd_id hpd;
383 struct radeon_gpio_rec gpio;
386 struct radeon_connector {
387 struct drm_connector base;
388 uint32_t connector_id;
390 struct radeon_i2c_chan *ddc_bus;
391 /* some systems have a an hdmi and vga port with a shared ddc line */
394 /* we need to mind the EDID between detect
395 and get modes due to analog/digital/tvencoder */
398 bool dac_load_detect;
399 uint16_t connector_object_id;
400 struct radeon_hpd hpd;
403 struct radeon_framebuffer {
404 struct drm_framebuffer base;
405 struct drm_gem_object *obj;
408 extern enum radeon_tv_std
409 radeon_combios_get_tv_info(struct radeon_device *rdev);
410 extern enum radeon_tv_std
411 radeon_atombios_get_tv_info(struct radeon_device *rdev);
413 extern void radeon_connector_hotplug(struct drm_connector *connector);
414 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
415 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
416 struct drm_display_mode *mode);
417 extern void radeon_dp_set_link_config(struct drm_connector *connector,
418 struct drm_display_mode *mode);
419 extern void dp_link_train(struct drm_encoder *encoder,
420 struct drm_connector *connector);
421 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
422 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
423 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
424 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
425 int action, uint8_t lane_num,
427 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
428 uint8_t write_byte, uint8_t *read_byte);
430 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
431 struct radeon_i2c_bus_rec *rec,
433 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
434 struct radeon_i2c_bus_rec *rec,
436 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
437 extern void radeon_i2c_destroy_dp(struct radeon_i2c_chan *i2c);
438 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
442 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
446 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
447 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
449 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
451 extern void radeon_compute_pll(struct radeon_pll *pll,
453 uint32_t *dot_clock_p,
455 uint32_t *frac_fb_div_p,
457 uint32_t *post_div_p);
459 extern void radeon_setup_encoder_clones(struct drm_device *dev);
461 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
462 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
463 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
464 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
465 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
466 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
467 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
468 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
469 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
471 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
472 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
473 struct drm_framebuffer *old_fb);
474 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
475 struct drm_display_mode *mode,
476 struct drm_display_mode *adjusted_mode,
478 struct drm_framebuffer *old_fb);
479 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
481 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
482 struct drm_framebuffer *old_fb);
484 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
485 struct drm_file *file_priv,
489 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
492 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
494 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
495 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
496 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
497 extern struct radeon_encoder_atom_dig *
498 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
499 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
500 struct radeon_encoder_int_tmds *tmds);
501 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
502 struct radeon_encoder_int_tmds *tmds);
503 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
504 struct radeon_encoder_int_tmds *tmds);
505 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
506 struct radeon_encoder_ext_tmds *tmds);
507 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
508 struct radeon_encoder_ext_tmds *tmds);
509 extern struct radeon_encoder_primary_dac *
510 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
511 extern struct radeon_encoder_tv_dac *
512 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
513 extern struct radeon_encoder_lvds *
514 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
515 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
516 extern struct radeon_encoder_tv_dac *
517 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
518 extern struct radeon_encoder_primary_dac *
519 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
520 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
521 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
522 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
523 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
524 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
525 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
526 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
527 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
529 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
531 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
533 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
535 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
536 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
537 u16 blue, int regno);
538 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
539 u16 *blue, int regno);
540 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
541 struct drm_mode_fb_cmd *mode_cmd,
542 struct drm_gem_object *obj);
544 int radeonfb_probe(struct drm_device *dev);
546 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
547 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
548 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
549 void radeon_atombios_init_crtc(struct drm_device *dev,
550 struct radeon_crtc *radeon_crtc);
551 void radeon_legacy_init_crtc(struct drm_device *dev,
552 struct radeon_crtc *radeon_crtc);
554 void radeon_get_clock_info(struct drm_device *dev);
556 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
557 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
559 void radeon_enc_destroy(struct drm_encoder *encoder);
560 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
561 void radeon_combios_asic_init(struct drm_device *dev);
562 extern int radeon_static_clocks_init(struct drm_device *dev);
563 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
564 struct drm_display_mode *mode,
565 struct drm_display_mode *adjusted_mode);
566 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
569 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
570 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
571 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
572 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
573 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
574 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
575 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
576 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
577 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
578 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
579 struct drm_display_mode *mode,
580 struct drm_display_mode *adjusted_mode);