SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/gpu/drm/radeon/radeon_fence.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Dave Airlie
  30  */
  31 #include <linux/seq_file.h>
  32 #include <asm/atomic.h>
  33 #include <linux/wait.h>
  34 #include <linux/list.h>
  35 #include <linux/kref.h>
  36 #include "drmP.h"
  37 #include "drm.h"
  38 #include "radeon_reg.h"
  39 #include "radeon.h"
  40
  41 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  42 {
  43         unsigned long irq_flags;
  44
  45         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  46         if (fence->emited) {
  47                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  48                 return 0;
  49         }
  50         fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
  51         if (!rdev->cp.ready) {
  52                 /* FIXME: cp is not running assume everythings is done right
  53                  * away
  54                  */
  55                 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
  56         } else
  57                 radeon_fence_ring_emit(rdev, fence);
  58
  59         fence->emited = true;
  60         list_del(&fence->list);
  61         list_add_tail(&fence->list, &rdev->fence_drv.emited);
  62         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  63         return 0;
  64 }
  65
  66 static bool radeon_fence_poll_locked(struct radeon_device *rdev)
  67 {
  68         struct radeon_fence *fence;
  69         struct list_head *i, *n;
  70         uint32_t seq;
  71         bool wake = false;
  72         unsigned long cjiffies;
  73
  74         seq = RREG32(rdev->fence_drv.scratch_reg);
  75         if (seq != rdev->fence_drv.last_seq) {
  76                 rdev->fence_drv.last_seq = seq;
  77                 rdev->fence_drv.last_jiffies = jiffies;
  78                 rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
  79         } else {
  80                 cjiffies = jiffies;
  81                 if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
  82                         cjiffies -= rdev->fence_drv.last_jiffies;
  83                         if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
  84                                 /* update the timeout */
  85                                 rdev->fence_drv.last_timeout -= cjiffies;
  86                         } else {
  87                                 /* the 500ms timeout is elapsed we should test
  88                                  * for GPU lockup
  89                                  */
  90                                 rdev->fence_drv.last_timeout = 1;
  91                         }
  92                 } else {
  93                         /* wrap around update last jiffies, we will just wait
  94                          * a little longer
  95                          */
  96                         rdev->fence_drv.last_jiffies = cjiffies;
  97                 }
  98                 return false;
  99         }
 100         n = NULL;
 101         list_for_each(i, &rdev->fence_drv.emited) {
 102                 fence = list_entry(i, struct radeon_fence, list);
 103                 if (fence->seq == seq) {
 104                         n = i;
 105                         break;
 106                 }
 107         }
 108         /* all fence previous to this one are considered as signaled */
 109         if (n) {
 110                 i = n;
 111                 do {
 112                         n = i->prev;
 113                         list_del(i);
 114                         list_add_tail(i, &rdev->fence_drv.signaled);
 115                         fence = list_entry(i, struct radeon_fence, list);
 116                         fence->signaled = true;
 117                         i = n;
 118                 } while (i != &rdev->fence_drv.emited);
 119                 wake = true;
 120         }
 121         return wake;
 122 }
 123
 124 static void radeon_fence_destroy(struct kref *kref)
 125 {
 126         unsigned long irq_flags;
 127         struct radeon_fence *fence;
 128
 129         fence = container_of(kref, struct radeon_fence, kref);
 130         write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
 131         list_del(&fence->list);
 132         fence->emited = false;
 133         write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
 134         kfree(fence);
 135 }
 136
 137 int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
 138 {
 139         unsigned long irq_flags;
 140
 141         *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
 142         if ((*fence) == NULL) {
 143                 return -ENOMEM;
 144         }
 145         kref_init(&((*fence)->kref));
 146         (*fence)->rdev = rdev;
 147         (*fence)->emited = false;
 148         (*fence)->signaled = false;
 149         (*fence)->seq = 0;
 150         INIT_LIST_HEAD(&(*fence)->list);
 151
 152         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 153         list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
 154         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 155         return 0;
 156 }
 157
 158
 159 bool radeon_fence_signaled(struct radeon_fence *fence)
 160 {
 161         unsigned long irq_flags;
 162         bool signaled = false;
 163
 164         if (!fence)
 165                 return true;
 166
 167         if (fence->rdev->gpu_lockup)
 168                 return true;
 169
 170         write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
 171         signaled = fence->signaled;
 172         /* if we are shuting down report all fence as signaled */
 173         if (fence->rdev->shutdown) {
 174                 signaled = true;
 175         }
 176         if (!fence->emited) {
 177                 WARN(1, "Querying an unemited fence : %p !\n", fence);
 178                 signaled = true;
 179         }
 180         if (!signaled) {
 181                 radeon_fence_poll_locked(fence->rdev);
 182                 signaled = fence->signaled;
 183         }
 184         write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
 185         return signaled;
 186 }
 187
 188 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 189 {
 190         struct radeon_device *rdev;
 191         unsigned long irq_flags, timeout;
 192         u32 seq;
 193         int r;
 194
 195         if (fence == NULL) {
 196                 WARN(1, "Querying an invalid fence : %p !\n", fence);
 197                 return 0;
 198         }
 199         rdev = fence->rdev;
 200         if (radeon_fence_signaled(fence)) {
 201                 return 0;
 202         }
 203         timeout = rdev->fence_drv.last_timeout;
 204 retry:
 205         /* save current sequence used to check for GPU lockup */
 206         seq = rdev->fence_drv.last_seq;
 207         if (intr) {
 208                 radeon_irq_kms_sw_irq_get(rdev);
 209                 r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
 210                                 radeon_fence_signaled(fence), timeout);
 211                 radeon_irq_kms_sw_irq_put(rdev);
 212                 if (unlikely(r < 0))
 213                         return r;
 214         } else {
 215                 radeon_irq_kms_sw_irq_get(rdev);
 216                 r = wait_event_timeout(rdev->fence_drv.queue,
 217                          radeon_fence_signaled(fence), timeout);
 218                 radeon_irq_kms_sw_irq_put(rdev);
 219         }
 220         if (unlikely(!radeon_fence_signaled(fence))) {
 221                 /* we were interrupted for some reason and fence isn't
 222                  * isn't signaled yet, resume wait
 223                  */
 224                 if (r) {
 225                         timeout = r;
 226                         goto retry;
 227                 }
 228                 /* don't protect read access to rdev->fence_drv.last_seq
 229                  * if we experiencing a lockup the value doesn't change
 230                  */
 231                 if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
 232                         /* good news we believe it's a lockup */
 233                         dev_warn(rdev->dev, "GPU lockup (last fence id 0x%08X)\n", seq);
 234                         r = radeon_gpu_reset(rdev);
 235                         if (r)
 236                                 return r;
 237                         /* FIXME: what should we do ? marking everyone
 238                          * as signaled for now
 239                          */
 240                         WREG32(rdev->fence_drv.scratch_reg, fence->seq);
 241                 }
 242                 timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 243                 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 244                 rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 245                 rdev->fence_drv.last_jiffies = jiffies;
 246                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 247                 goto retry;
 248         }
 249         return 0;
 250 }
 251
 252 int radeon_fence_wait_next(struct radeon_device *rdev)
 253 {
 254         unsigned long irq_flags;
 255         struct radeon_fence *fence;
 256         int r;
 257
 258         if (rdev->gpu_lockup) {
 259                 return 0;
 260         }
 261         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 262         if (list_empty(&rdev->fence_drv.emited)) {
 263                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 264                 return 0;
 265         }
 266         fence = list_entry(rdev->fence_drv.emited.next,
 267                            struct radeon_fence, list);
 268         radeon_fence_ref(fence);
 269         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 270         r = radeon_fence_wait(fence, false);
 271         radeon_fence_unref(&fence);
 272         return r;
 273 }
 274
 275 int radeon_fence_wait_last(struct radeon_device *rdev)
 276 {
 277         unsigned long irq_flags;
 278         struct radeon_fence *fence;
 279         int r;
 280
 281         if (rdev->gpu_lockup) {
 282                 return 0;
 283         }
 284         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 285         if (list_empty(&rdev->fence_drv.emited)) {
 286                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 287                 return 0;
 288         }
 289         fence = list_entry(rdev->fence_drv.emited.prev,
 290                            struct radeon_fence, list);
 291         radeon_fence_ref(fence);
 292         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 293         r = radeon_fence_wait(fence, false);
 294         radeon_fence_unref(&fence);
 295         return r;
 296 }
 297
 298 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
 299 {
 300         kref_get(&fence->kref);
 301         return fence;
 302 }
 303
 304 void radeon_fence_unref(struct radeon_fence **fence)
 305 {
 306         struct radeon_fence *tmp = *fence;
 307
 308         *fence = NULL;
 309         if (tmp) {
 310                 kref_put(&tmp->kref, &radeon_fence_destroy);
 311         }
 312 }
 313
 314 void radeon_fence_process(struct radeon_device *rdev)
 315 {
 316         unsigned long irq_flags;
 317         bool wake;
 318
 319         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 320         wake = radeon_fence_poll_locked(rdev);
 321         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 322         if (wake) {
 323                 wake_up_all(&rdev->fence_drv.queue);
 324         }
 325 }
 326
 327 int radeon_fence_driver_init(struct radeon_device *rdev)
 328 {
 329         unsigned long irq_flags;
 330         int r;
 331
 332         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 333         r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
 334         if (r) {
 335                 dev_err(rdev->dev, "fence failed to get scratch register\n");
 336                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 337                 return r;
 338         }
 339         WREG32(rdev->fence_drv.scratch_reg, 0);
 340         atomic_set(&rdev->fence_drv.seq, 0);
 341         INIT_LIST_HEAD(&rdev->fence_drv.created);
 342         INIT_LIST_HEAD(&rdev->fence_drv.emited);
 343         INIT_LIST_HEAD(&rdev->fence_drv.signaled);
 344         init_waitqueue_head(&rdev->fence_drv.queue);
 345         rdev->fence_drv.initialized = true;
 346         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 347         if (radeon_debugfs_fence_init(rdev)) {
 348                 dev_err(rdev->dev, "fence debugfs file creation failed\n");
 349         }
 350         return 0;
 351 }
 352
 353 void radeon_fence_driver_fini(struct radeon_device *rdev)
 354 {
 355         unsigned long irq_flags;
 356
 357         if (!rdev->fence_drv.initialized)
 358                 return;
 359         wake_up_all(&rdev->fence_drv.queue);
 360         write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 361         radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
 362         write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 363         rdev->fence_drv.initialized = false;
 364 }
 365
 366
 367 /*
 368  * Fence debugfs
 369  */
 370 #if defined(CONFIG_DEBUG_FS)
 371 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
 372 {
 373         struct drm_info_node *node = (struct drm_info_node *)m->private;
 374         struct drm_device *dev = node->minor->dev;
 375         struct radeon_device *rdev = dev->dev_private;
 376         struct radeon_fence *fence;
 377
 378         seq_printf(m, "Last signaled fence 0x%08X\n",
 379                    RREG32(rdev->fence_drv.scratch_reg));
 380         if (!list_empty(&rdev->fence_drv.emited)) {
 381                    fence = list_entry(rdev->fence_drv.emited.prev,
 382                                       struct radeon_fence, list);
 383                    seq_printf(m, "Last emited fence %p with 0x%08X\n",
 384                               fence,  fence->seq);
 385         }
 386         return 0;
 387 }
 388
 389 static struct drm_info_list radeon_debugfs_fence_list[] = {
 390         {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
 391 };
 392 #endif
 393
 394 int radeon_debugfs_fence_init(struct radeon_device *rdev)
 395 {
 396 #if defined(CONFIG_DEBUG_FS)
 397         return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
 398 #else
 399         return 0;
 400 #endif
 401 }