drm/radeon/kms: respect single crtc cards, only create one crtc. (v2)
[safe/jmp/linux-2.6] / drivers / gpu / drm / radeon / radeon_fb.c
1 /*
2  * Copyright © 2007 David Airlie
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     David Airlie
25  */
26     /*
27      *  Modularization
28      */
29
30 #include <linux/module.h>
31 #include <linux/fb.h>
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "drm_crtc.h"
36 #include "drm_crtc_helper.h"
37 #include "radeon_drm.h"
38 #include "radeon.h"
39
40 #include "drm_fb_helper.h"
41
42 struct radeon_fb_device {
43         struct drm_fb_helper helper;
44         struct radeon_framebuffer       *rfb;
45         struct radeon_device            *rdev;
46 };
47
48 static struct fb_ops radeonfb_ops = {
49         .owner = THIS_MODULE,
50         .fb_check_var = drm_fb_helper_check_var,
51         .fb_set_par = drm_fb_helper_set_par,
52         .fb_setcolreg = drm_fb_helper_setcolreg,
53         .fb_fillrect = cfb_fillrect,
54         .fb_copyarea = cfb_copyarea,
55         .fb_imageblit = cfb_imageblit,
56         .fb_pan_display = drm_fb_helper_pan_display,
57         .fb_blank = drm_fb_helper_blank,
58 };
59
60 /**
61  * Curretly it is assumed that the old framebuffer is reused.
62  *
63  * LOCKING
64  * caller should hold the mode config lock.
65  *
66  */
67 int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
68 {
69         struct fb_info *info;
70         struct drm_framebuffer *fb;
71         struct drm_display_mode *mode = crtc->desired_mode;
72
73         fb = crtc->fb;
74         if (fb == NULL) {
75                 return 1;
76         }
77         info = fb->fbdev;
78         if (info == NULL) {
79                 return 1;
80         }
81         if (mode == NULL) {
82                 return 1;
83         }
84         info->var.xres = mode->hdisplay;
85         info->var.right_margin = mode->hsync_start - mode->hdisplay;
86         info->var.hsync_len = mode->hsync_end - mode->hsync_start;
87         info->var.left_margin = mode->htotal - mode->hsync_end;
88         info->var.yres = mode->vdisplay;
89         info->var.lower_margin = mode->vsync_start - mode->vdisplay;
90         info->var.vsync_len = mode->vsync_end - mode->vsync_start;
91         info->var.upper_margin = mode->vtotal - mode->vsync_end;
92         info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
93         /* avoid overflow */
94         info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
95
96         return 0;
97 }
98 EXPORT_SYMBOL(radeonfb_resize);
99
100 static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
101 {
102         int aligned = width;
103         int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
104         int pitch_mask = 0;
105
106         switch (bpp / 8) {
107         case 1:
108                 pitch_mask = align_large ? 255 : 127;
109                 break;
110         case 2:
111                 pitch_mask = align_large ? 127 : 31;
112                 break;
113         case 3:
114         case 4:
115                 pitch_mask = align_large ? 63 : 15;
116                 break;
117         }
118
119         aligned += pitch_mask;
120         aligned &= ~pitch_mask;
121         return aligned;
122 }
123
124 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
125         .gamma_set = radeon_crtc_fb_gamma_set,
126 };
127
128 int radeonfb_create(struct drm_device *dev,
129                     uint32_t fb_width, uint32_t fb_height,
130                     uint32_t surface_width, uint32_t surface_height,
131                     uint32_t surface_depth, uint32_t surface_bpp,
132                     struct drm_framebuffer **fb_p)
133 {
134         struct radeon_device *rdev = dev->dev_private;
135         struct fb_info *info;
136         struct radeon_fb_device *rfbdev;
137         struct drm_framebuffer *fb = NULL;
138         struct radeon_framebuffer *rfb;
139         struct drm_mode_fb_cmd mode_cmd;
140         struct drm_gem_object *gobj = NULL;
141         struct radeon_object *robj = NULL;
142         struct device *device = &rdev->pdev->dev;
143         int size, aligned_size, ret;
144         u64 fb_gpuaddr;
145         void *fbptr = NULL;
146         unsigned long tmp;
147         bool fb_tiled = false; /* useful for testing */
148         u32 tiling_flags = 0;
149         int crtc_count;
150
151         mode_cmd.width = surface_width;
152         mode_cmd.height = surface_height;
153         mode_cmd.bpp = surface_bpp;
154         /* need to align pitch with crtc limits */
155         mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
156         mode_cmd.depth = surface_depth;
157
158         size = mode_cmd.pitch * mode_cmd.height;
159         aligned_size = ALIGN(size, PAGE_SIZE);
160
161         ret = radeon_gem_object_create(rdev, aligned_size, 0,
162                         RADEON_GEM_DOMAIN_VRAM,
163                         false, ttm_bo_type_kernel,
164                         false, &gobj);
165         if (ret) {
166                 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
167                        surface_width, surface_height);
168                 ret = -ENOMEM;
169                 goto out;
170         }
171         robj = gobj->driver_private;
172
173         if (fb_tiled)
174                 tiling_flags = RADEON_TILING_MACRO;
175
176 #ifdef __BIG_ENDIAN
177         switch (mode_cmd.bpp) {
178         case 32:
179                 tiling_flags |= RADEON_TILING_SWAP_32BIT;
180                 break;
181         case 16:
182                 tiling_flags |= RADEON_TILING_SWAP_16BIT;
183         default:
184                 break;
185         }
186 #endif
187
188         if (tiling_flags)
189                 radeon_object_set_tiling_flags(robj, tiling_flags | RADEON_TILING_SURFACE, mode_cmd.pitch);
190         mutex_lock(&rdev->ddev->struct_mutex);
191         fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
192         if (fb == NULL) {
193                 DRM_ERROR("failed to allocate fb.\n");
194                 ret = -ENOMEM;
195                 goto out_unref;
196         }
197         ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
198         if (ret) {
199                 printk(KERN_ERR "failed to pin framebuffer\n");
200                 ret = -ENOMEM;
201                 goto out_unref;
202         }
203
204         list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
205
206         *fb_p = fb;
207         rfb = to_radeon_framebuffer(fb);
208         rdev->fbdev_rfb = rfb;
209         rdev->fbdev_robj = robj;
210
211         info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
212         if (info == NULL) {
213                 ret = -ENOMEM;
214                 goto out_unref;
215         }
216
217         rdev->fbdev_info = info;
218         rfbdev = info->par;
219         rfbdev->helper.funcs = &radeon_fb_helper_funcs;
220         rfbdev->helper.dev = dev;
221         if (rdev->flags & RADEON_SINGLE_CRTC)
222                 crtc_count = 1;
223         else
224                 crtc_count = 2;
225         ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, crtc_count,
226                                             RADEONFB_CONN_LIMIT);
227         if (ret)
228                 goto out_unref;
229
230         if (fb_tiled)
231                 radeon_object_check_tiling(robj, 0, 0);
232
233         ret = radeon_object_kmap(robj, &fbptr);
234         if (ret) {
235                 goto out_unref;
236         }
237
238         memset_io(fbptr, 0, aligned_size);
239
240         strcpy(info->fix.id, "radeondrmfb");
241
242         drm_fb_helper_fill_fix(info, fb->pitch);
243
244         info->flags = FBINFO_DEFAULT;
245         info->fbops = &radeonfb_ops;
246
247         tmp = fb_gpuaddr - rdev->mc.vram_location;
248         info->fix.smem_start = rdev->mc.aper_base + tmp;
249         info->fix.smem_len = size;
250         info->screen_base = fbptr;
251         info->screen_size = size;
252
253         drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
254
255         /* setup aperture base/size for vesafb takeover */
256         info->aperture_base = rdev->ddev->mode_config.fb_base;
257         info->aperture_size = rdev->mc.real_vram_size;
258
259         info->fix.mmio_start = 0;
260         info->fix.mmio_len = 0;
261         info->pixmap.size = 64*1024;
262         info->pixmap.buf_align = 8;
263         info->pixmap.access_align = 32;
264         info->pixmap.flags = FB_PIXMAP_SYSTEM;
265         info->pixmap.scan_align = 1;
266         if (info->screen_base == NULL) {
267                 ret = -ENOSPC;
268                 goto out_unref;
269         }
270         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
271         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
272         DRM_INFO("size %lu\n", (unsigned long)size);
273         DRM_INFO("fb depth is %d\n", fb->depth);
274         DRM_INFO("   pitch is %d\n", fb->pitch);
275
276         fb->fbdev = info;
277         rfbdev->rfb = rfb;
278         rfbdev->rdev = rdev;
279
280         mutex_unlock(&rdev->ddev->struct_mutex);
281         return 0;
282
283 out_unref:
284         if (robj) {
285                 radeon_object_kunmap(robj);
286         }
287         if (fb && ret) {
288                 list_del(&fb->filp_head);
289                 drm_gem_object_unreference(gobj);
290                 drm_framebuffer_cleanup(fb);
291                 kfree(fb);
292         }
293         drm_gem_object_unreference(gobj);
294         mutex_unlock(&rdev->ddev->struct_mutex);
295 out:
296         return ret;
297 }
298
299 static char *mode_option;
300 int radeon_parse_options(char *options)
301 {
302         char *this_opt;
303
304         if (!options || !*options)
305                 return 0;
306
307         while ((this_opt = strsep(&options, ",")) != NULL) {
308                 if (!*this_opt)
309                         continue;
310                 mode_option = this_opt;
311         }
312         return 0;
313 }
314
315 int radeonfb_probe(struct drm_device *dev)
316 {
317         return drm_fb_helper_single_fb_probe(dev, &radeonfb_create);
318 }
319
320 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
321 {
322         struct fb_info *info;
323         struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
324         struct radeon_object *robj;
325
326         if (!fb) {
327                 return -EINVAL;
328         }
329         info = fb->fbdev;
330         if (info) {
331                 struct radeon_fb_device *rfbdev = info->par;
332                 robj = rfb->obj->driver_private;
333                 unregister_framebuffer(info);
334                 radeon_object_kunmap(robj);
335                 radeon_object_unpin(robj);
336                 drm_fb_helper_free(&rfbdev->helper);
337                 framebuffer_release(info);
338         }
339
340         printk(KERN_INFO "unregistered panic notifier\n");
341
342         return 0;
343 }
344 EXPORT_SYMBOL(radeonfb_remove);
345 MODULE_LICENSE("GPL");