SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/gpu/drm/nouveau/nouveau_drv.c

   1 /*
   2  * Copyright 2005 Stephane Marchesin.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 #include <linux/console.h>
  26
  27 #include "drmP.h"
  28 #include "drm.h"
  29 #include "drm_crtc_helper.h"
  30 #include "nouveau_drv.h"
  31 #include "nouveau_hw.h"
  32 #include "nouveau_fb.h"
  33 #include "nouveau_fbcon.h"
  34 #include "nv50_display.h"
  35
  36 #include "drm_pciids.h"
  37
  38 MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
  39 int nouveau_ctxfw = 0;
  40 module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
  41
  42 MODULE_PARM_DESC(noagp, "Disable AGP");
  43 int nouveau_noagp;
  44 module_param_named(noagp, nouveau_noagp, int, 0400);
  45
  46 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  47 static int nouveau_modeset = -1; /* kms */
  48 module_param_named(modeset, nouveau_modeset, int, 0400);
  49
  50 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  51 char *nouveau_vbios;
  52 module_param_named(vbios, nouveau_vbios, charp, 0400);
  53
  54 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  55 int nouveau_vram_pushbuf;
  56 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  57
  58 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  59 int nouveau_vram_notify = 1;
  60 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  61
  62 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  63 int nouveau_duallink = 1;
  64 module_param_named(duallink, nouveau_duallink, int, 0400);
  65
  66 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  67 int nouveau_uscript_lvds = -1;
  68 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  69
  70 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  71 int nouveau_uscript_tmds = -1;
  72 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  73
  74 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  75 int nouveau_ignorelid = 0;
  76 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  77
  78 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  79                  "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  80                  "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  81                  "\t\tDefault: PAL\n"
  82                  "\t\t*NOTE* Ignored for cards with external TV encoders.");
  83 char *nouveau_tv_norm;
  84 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  85
  86 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  87                 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  88                 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  89                 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  90 int nouveau_reg_debug;
  91 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  92
  93 int nouveau_fbpercrtc;
  94 #if 0
  95 module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  96 #endif
  97
  98 static struct pci_device_id pciidlist[] = {
  99         {
 100                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
 101                 .class = PCI_BASE_CLASS_DISPLAY << 16,
 102                 .class_mask  = 0xff << 16,
 103         },
 104         {
 105                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
 106                 .class = PCI_BASE_CLASS_DISPLAY << 16,
 107                 .class_mask  = 0xff << 16,
 108         },
 109         {}
 110 };
 111
 112 MODULE_DEVICE_TABLE(pci, pciidlist);
 113
 114 static struct drm_driver driver;
 115
 116 static int __devinit
 117 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 118 {
 119         return drm_get_dev(pdev, ent, &driver);
 120 }
 121
 122 static void
 123 nouveau_pci_remove(struct pci_dev *pdev)
 124 {
 125         struct drm_device *dev = pci_get_drvdata(pdev);
 126
 127         drm_put_dev(dev);
 128 }
 129
 130 static int
 131 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
 132 {
 133         struct drm_device *dev = pci_get_drvdata(pdev);
 134         struct drm_nouveau_private *dev_priv = dev->dev_private;
 135         struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
 136         struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
 137         struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
 138         struct nouveau_channel *chan;
 139         struct drm_crtc *crtc;
 140         uint32_t fbdev_flags;
 141         int ret, i;
 142
 143         if (!drm_core_check_feature(dev, DRIVER_MODESET))
 144                 return -ENODEV;
 145
 146         if (pm_state.event == PM_EVENT_PRETHAW)
 147                 return 0;
 148
 149         fbdev_flags = dev_priv->fbdev_info->flags;
 150         dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
 151
 152         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 153                 struct nouveau_framebuffer *nouveau_fb;
 154
 155                 nouveau_fb = nouveau_framebuffer(crtc->fb);
 156                 if (!nouveau_fb || !nouveau_fb->nvbo)
 157                         continue;
 158
 159                 nouveau_bo_unpin(nouveau_fb->nvbo);
 160         }
 161
 162         NV_INFO(dev, "Evicting buffers...\n");
 163         ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
 164
 165         NV_INFO(dev, "Idling channels...\n");
 166         for (i = 0; i < pfifo->channels; i++) {
 167                 struct nouveau_fence *fence = NULL;
 168
 169                 chan = dev_priv->fifos[i];
 170                 if (!chan || (dev_priv->card_type >= NV_50 &&
 171                               chan == dev_priv->fifos[0]))
 172                         continue;
 173
 174                 ret = nouveau_fence_new(chan, &fence, true);
 175                 if (ret == 0) {
 176                         ret = nouveau_fence_wait(fence, NULL, false, false);
 177                         nouveau_fence_unref((void *)&fence);
 178                 }
 179
 180                 if (ret) {
 181                         NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
 182                                  chan->id);
 183                 }
 184         }
 185
 186         pgraph->fifo_access(dev, false);
 187         nouveau_wait_for_idle(dev);
 188         pfifo->reassign(dev, false);
 189         pfifo->disable(dev);
 190         pfifo->unload_context(dev);
 191         pgraph->unload_context(dev);
 192
 193         NV_INFO(dev, "Suspending GPU objects...\n");
 194         ret = nouveau_gpuobj_suspend(dev);
 195         if (ret) {
 196                 NV_ERROR(dev, "... failed: %d\n", ret);
 197                 goto out_abort;
 198         }
 199
 200         ret = pinstmem->suspend(dev);
 201         if (ret) {
 202                 NV_ERROR(dev, "... failed: %d\n", ret);
 203                 nouveau_gpuobj_suspend_cleanup(dev);
 204                 goto out_abort;
 205         }
 206
 207         NV_INFO(dev, "And we're gone!\n");
 208         pci_save_state(pdev);
 209         if (pm_state.event == PM_EVENT_SUSPEND) {
 210                 pci_disable_device(pdev);
 211                 pci_set_power_state(pdev, PCI_D3hot);
 212         }
 213
 214         acquire_console_sem();
 215         fb_set_suspend(dev_priv->fbdev_info, 1);
 216         release_console_sem();
 217         dev_priv->fbdev_info->flags = fbdev_flags;
 218         return 0;
 219
 220 out_abort:
 221         NV_INFO(dev, "Re-enabling acceleration..\n");
 222         pfifo->enable(dev);
 223         pfifo->reassign(dev, true);
 224         pgraph->fifo_access(dev, true);
 225         return ret;
 226 }
 227
 228 static int
 229 nouveau_pci_resume(struct pci_dev *pdev)
 230 {
 231         struct drm_device *dev = pci_get_drvdata(pdev);
 232         struct drm_nouveau_private *dev_priv = dev->dev_private;
 233         struct nouveau_engine *engine = &dev_priv->engine;
 234         struct drm_crtc *crtc;
 235         uint32_t fbdev_flags;
 236         int ret, i;
 237
 238         if (!drm_core_check_feature(dev, DRIVER_MODESET))
 239                 return -ENODEV;
 240
 241         fbdev_flags = dev_priv->fbdev_info->flags;
 242         dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
 243
 244         NV_INFO(dev, "We're back, enabling device...\n");
 245         pci_set_power_state(pdev, PCI_D0);
 246         pci_restore_state(pdev);
 247         if (pci_enable_device(pdev))
 248                 return -1;
 249         pci_set_master(dev->pdev);
 250
 251         NV_INFO(dev, "POSTing device...\n");
 252         ret = nouveau_run_vbios_init(dev);
 253         if (ret)
 254                 return ret;
 255
 256         if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
 257                 ret = nouveau_mem_init_agp(dev);
 258                 if (ret) {
 259                         NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
 260                         return ret;
 261                 }
 262         }
 263
 264         NV_INFO(dev, "Reinitialising engines...\n");
 265         engine->instmem.resume(dev);
 266         engine->mc.init(dev);
 267         engine->timer.init(dev);
 268         engine->fb.init(dev);
 269         engine->graph.init(dev);
 270         engine->fifo.init(dev);
 271
 272         NV_INFO(dev, "Restoring GPU objects...\n");
 273         nouveau_gpuobj_resume(dev);
 274
 275         nouveau_irq_postinstall(dev);
 276
 277         /* Re-write SKIPS, they'll have been lost over the suspend */
 278         if (nouveau_vram_pushbuf) {
 279                 struct nouveau_channel *chan;
 280                 int j;
 281
 282                 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
 283                         chan = dev_priv->fifos[i];
 284                         if (!chan || !chan->pushbuf_bo)
 285                                 continue;
 286
 287                         for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
 288                                 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
 289                 }
 290         }
 291
 292         NV_INFO(dev, "Restoring mode...\n");
 293         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 294                 struct nouveau_framebuffer *nouveau_fb;
 295
 296                 nouveau_fb = nouveau_framebuffer(crtc->fb);
 297                 if (!nouveau_fb || !nouveau_fb->nvbo)
 298                         continue;
 299
 300                 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
 301         }
 302
 303         if (dev_priv->card_type < NV_50) {
 304                 nv04_display_restore(dev);
 305                 NVLockVgaCrtcs(dev, false);
 306         } else
 307                 nv50_display_init(dev);
 308
 309         /* Force CLUT to get re-loaded during modeset */
 310         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 311                 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
 312
 313                 nv_crtc->lut.depth = 0;
 314         }
 315
 316         acquire_console_sem();
 317         fb_set_suspend(dev_priv->fbdev_info, 0);
 318         release_console_sem();
 319
 320         nouveau_fbcon_zfill(dev);
 321
 322         drm_helper_resume_force_mode(dev);
 323         dev_priv->fbdev_info->flags = fbdev_flags;
 324         return 0;
 325 }
 326
 327 static struct drm_driver driver = {
 328         .driver_features =
 329                 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
 330                 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
 331         .load = nouveau_load,
 332         .firstopen = nouveau_firstopen,
 333         .lastclose = nouveau_lastclose,
 334         .unload = nouveau_unload,
 335         .preclose = nouveau_preclose,
 336 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
 337         .debugfs_init = nouveau_debugfs_init,
 338         .debugfs_cleanup = nouveau_debugfs_takedown,
 339 #endif
 340         .irq_preinstall = nouveau_irq_preinstall,
 341         .irq_postinstall = nouveau_irq_postinstall,
 342         .irq_uninstall = nouveau_irq_uninstall,
 343         .irq_handler = nouveau_irq_handler,
 344         .reclaim_buffers = drm_core_reclaim_buffers,
 345         .get_map_ofs = drm_core_get_map_ofs,
 346         .get_reg_ofs = drm_core_get_reg_ofs,
 347         .ioctls = nouveau_ioctls,
 348         .fops = {
 349                 .owner = THIS_MODULE,
 350                 .open = drm_open,
 351                 .release = drm_release,
 352                 .unlocked_ioctl = drm_ioctl,
 353                 .mmap = nouveau_ttm_mmap,
 354                 .poll = drm_poll,
 355                 .fasync = drm_fasync,
 356 #if defined(CONFIG_COMPAT)
 357                 .compat_ioctl = nouveau_compat_ioctl,
 358 #endif
 359         },
 360         .pci_driver = {
 361                 .name = DRIVER_NAME,
 362                 .id_table = pciidlist,
 363                 .probe = nouveau_pci_probe,
 364                 .remove = nouveau_pci_remove,
 365                 .suspend = nouveau_pci_suspend,
 366                 .resume = nouveau_pci_resume
 367         },
 368
 369         .gem_init_object = nouveau_gem_object_new,
 370         .gem_free_object = nouveau_gem_object_del,
 371
 372         .name = DRIVER_NAME,
 373         .desc = DRIVER_DESC,
 374 #ifdef GIT_REVISION
 375         .date = GIT_REVISION,
 376 #else
 377         .date = DRIVER_DATE,
 378 #endif
 379         .major = DRIVER_MAJOR,
 380         .minor = DRIVER_MINOR,
 381         .patchlevel = DRIVER_PATCHLEVEL,
 382 };
 383
 384 static int __init nouveau_init(void)
 385 {
 386         driver.num_ioctls = nouveau_max_ioctl;
 387
 388         if (nouveau_modeset == -1) {
 389 #ifdef CONFIG_VGA_CONSOLE
 390                 if (vgacon_text_force())
 391                         nouveau_modeset = 0;
 392                 else
 393 #endif
 394                         nouveau_modeset = 1;
 395         }
 396
 397         if (nouveau_modeset == 1)
 398                 driver.driver_features |= DRIVER_MODESET;
 399
 400         return drm_init(&driver);
 401 }
 402
 403 static void __exit nouveau_exit(void)
 404 {
 405         drm_exit(&driver);
 406 }
 407
 408 module_init(nouveau_init);
 409 module_exit(nouveau_exit);
 410
 411 MODULE_AUTHOR(DRIVER_AUTHOR);
 412 MODULE_DESCRIPTION(DRIVER_DESC);
 413 MODULE_LICENSE("GPL and additional rights");