Merge Linus master to drm-next
[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <linux/dmi.h>
31 #include <linux/i2c.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include <linux/acpi.h>
40
41 /* Private structure for the integrated LVDS support */
42 struct intel_lvds_priv {
43         int fitting_mode;
44         u32 pfit_control;
45         u32 pfit_pgm_ratios;
46 };
47
48 /**
49  * Sets the backlight level.
50  *
51  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
52  */
53 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
54 {
55         struct drm_i915_private *dev_priv = dev->dev_private;
56         u32 blc_pwm_ctl, reg;
57
58         if (IS_IGDNG(dev))
59                 reg = BLC_PWM_CPU_CTL;
60         else
61                 reg = BLC_PWM_CTL;
62
63         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
64         I915_WRITE(reg, (blc_pwm_ctl |
65                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
66 }
67
68 /**
69  * Returns the maximum level of the backlight duty cycle field.
70  */
71 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
72 {
73         struct drm_i915_private *dev_priv = dev->dev_private;
74         u32 reg;
75
76         if (IS_IGDNG(dev))
77                 reg = BLC_PWM_PCH_CTL2;
78         else
79                 reg = BLC_PWM_CTL;
80
81         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
82                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
83 }
84
85 /**
86  * Sets the power state for the panel.
87  */
88 static void intel_lvds_set_power(struct drm_device *dev, bool on)
89 {
90         struct drm_i915_private *dev_priv = dev->dev_private;
91         u32 pp_status, ctl_reg, status_reg;
92
93         if (IS_IGDNG(dev)) {
94                 ctl_reg = PCH_PP_CONTROL;
95                 status_reg = PCH_PP_STATUS;
96         } else {
97                 ctl_reg = PP_CONTROL;
98                 status_reg = PP_STATUS;
99         }
100
101         if (on) {
102                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
103                            POWER_TARGET_ON);
104                 do {
105                         pp_status = I915_READ(status_reg);
106                 } while ((pp_status & PP_ON) == 0);
107
108                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
109         } else {
110                 intel_lvds_set_backlight(dev, 0);
111
112                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
113                            ~POWER_TARGET_ON);
114                 do {
115                         pp_status = I915_READ(status_reg);
116                 } while (pp_status & PP_ON);
117         }
118 }
119
120 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
121 {
122         struct drm_device *dev = encoder->dev;
123
124         if (mode == DRM_MODE_DPMS_ON)
125                 intel_lvds_set_power(dev, true);
126         else
127                 intel_lvds_set_power(dev, false);
128
129         /* XXX: We never power down the LVDS pairs. */
130 }
131
132 static void intel_lvds_save(struct drm_connector *connector)
133 {
134         struct drm_device *dev = connector->dev;
135         struct drm_i915_private *dev_priv = dev->dev_private;
136         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
137         u32 pwm_ctl_reg;
138
139         if (IS_IGDNG(dev)) {
140                 pp_on_reg = PCH_PP_ON_DELAYS;
141                 pp_off_reg = PCH_PP_OFF_DELAYS;
142                 pp_ctl_reg = PCH_PP_CONTROL;
143                 pp_div_reg = PCH_PP_DIVISOR;
144                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
145         } else {
146                 pp_on_reg = PP_ON_DELAYS;
147                 pp_off_reg = PP_OFF_DELAYS;
148                 pp_ctl_reg = PP_CONTROL;
149                 pp_div_reg = PP_DIVISOR;
150                 pwm_ctl_reg = BLC_PWM_CTL;
151         }
152
153         dev_priv->savePP_ON = I915_READ(pp_on_reg);
154         dev_priv->savePP_OFF = I915_READ(pp_off_reg);
155         dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
156         dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
157         dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
158         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
159                                        BACKLIGHT_DUTY_CYCLE_MASK);
160
161         /*
162          * If the light is off at server startup, just make it full brightness
163          */
164         if (dev_priv->backlight_duty_cycle == 0)
165                 dev_priv->backlight_duty_cycle =
166                         intel_lvds_get_max_backlight(dev);
167 }
168
169 static void intel_lvds_restore(struct drm_connector *connector)
170 {
171         struct drm_device *dev = connector->dev;
172         struct drm_i915_private *dev_priv = dev->dev_private;
173         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
174         u32 pwm_ctl_reg;
175
176         if (IS_IGDNG(dev)) {
177                 pp_on_reg = PCH_PP_ON_DELAYS;
178                 pp_off_reg = PCH_PP_OFF_DELAYS;
179                 pp_ctl_reg = PCH_PP_CONTROL;
180                 pp_div_reg = PCH_PP_DIVISOR;
181                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
182         } else {
183                 pp_on_reg = PP_ON_DELAYS;
184                 pp_off_reg = PP_OFF_DELAYS;
185                 pp_ctl_reg = PP_CONTROL;
186                 pp_div_reg = PP_DIVISOR;
187                 pwm_ctl_reg = BLC_PWM_CTL;
188         }
189
190         I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
191         I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
192         I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
193         I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
194         I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
195         if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
196                 intel_lvds_set_power(dev, true);
197         else
198                 intel_lvds_set_power(dev, false);
199 }
200
201 static int intel_lvds_mode_valid(struct drm_connector *connector,
202                                  struct drm_display_mode *mode)
203 {
204         struct drm_device *dev = connector->dev;
205         struct drm_i915_private *dev_priv = dev->dev_private;
206         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
207
208         if (fixed_mode) {
209                 if (mode->hdisplay > fixed_mode->hdisplay)
210                         return MODE_PANEL;
211                 if (mode->vdisplay > fixed_mode->vdisplay)
212                         return MODE_PANEL;
213         }
214
215         return MODE_OK;
216 }
217
218 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
219                                   struct drm_display_mode *mode,
220                                   struct drm_display_mode *adjusted_mode)
221 {
222         /*
223          * float point operation is not supported . So the PANEL_RATIO_FACTOR
224          * is defined, which can avoid the float point computation when
225          * calculating the panel ratio.
226          */
227 #define PANEL_RATIO_FACTOR 8192
228         struct drm_device *dev = encoder->dev;
229         struct drm_i915_private *dev_priv = dev->dev_private;
230         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
231         struct drm_encoder *tmp_encoder;
232         struct intel_output *intel_output = enc_to_intel_output(encoder);
233         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
234         u32 pfit_control = 0, pfit_pgm_ratios = 0;
235         int left_border = 0, right_border = 0, top_border = 0;
236         int bottom_border = 0;
237         bool border = 0;
238         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
239         int horiz_ratio, vert_ratio;
240         u32 hsync_width, vsync_width;
241         u32 hblank_width, vblank_width;
242         u32 hsync_pos, vsync_pos;
243
244         /* Should never happen!! */
245         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
246                 DRM_ERROR("Can't support LVDS on pipe A\n");
247                 return false;
248         }
249
250         /* Should never happen!! */
251         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
252                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
253                         DRM_ERROR("Can't enable LVDS and another "
254                                "encoder on the same pipe\n");
255                         return false;
256                 }
257         }
258         /* If we don't have a panel mode, there is nothing we can do */
259         if (dev_priv->panel_fixed_mode == NULL)
260                 return true;
261         /*
262          * If we have timings from the BIOS for the panel, put them in
263          * to the adjusted mode.  The CRTC will be set up for this mode,
264          * with the panel scaling set up to source from the H/VDisplay
265          * of the original mode.
266          */
267         if (dev_priv->panel_fixed_mode != NULL) {
268                 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
269                 adjusted_mode->hsync_start =
270                         dev_priv->panel_fixed_mode->hsync_start;
271                 adjusted_mode->hsync_end =
272                         dev_priv->panel_fixed_mode->hsync_end;
273                 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
274                 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
275                 adjusted_mode->vsync_start =
276                         dev_priv->panel_fixed_mode->vsync_start;
277                 adjusted_mode->vsync_end =
278                         dev_priv->panel_fixed_mode->vsync_end;
279                 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
280                 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
281                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
282         }
283
284         /* Make sure pre-965s set dither correctly */
285         if (!IS_I965G(dev)) {
286                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
287                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
288         }
289
290         /* Native modes don't need fitting */
291         if (adjusted_mode->hdisplay == mode->hdisplay &&
292                         adjusted_mode->vdisplay == mode->vdisplay) {
293                 pfit_pgm_ratios = 0;
294                 border = 0;
295                 goto out;
296         }
297
298         /* 965+ wants fuzzy fitting */
299         if (IS_I965G(dev))
300                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
301                                         PFIT_FILTER_FUZZY;
302
303         hsync_width = adjusted_mode->crtc_hsync_end -
304                                         adjusted_mode->crtc_hsync_start;
305         vsync_width = adjusted_mode->crtc_vsync_end -
306                                         adjusted_mode->crtc_vsync_start;
307         hblank_width = adjusted_mode->crtc_hblank_end -
308                                         adjusted_mode->crtc_hblank_start;
309         vblank_width = adjusted_mode->crtc_vblank_end -
310                                         adjusted_mode->crtc_vblank_start;
311         /*
312          * Deal with panel fitting options. Figure out how to stretch the
313          * image based on its aspect ratio & the current panel fitting mode.
314          */
315         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
316                                 adjusted_mode->vdisplay;
317         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
318                                 mode->vdisplay;
319         /*
320          * Enable automatic panel scaling for non-native modes so that they fill
321          * the screen.  Should be enabled before the pipe is enabled, according
322          * to register description and PRM.
323          * Change the value here to see the borders for debugging
324          */
325         I915_WRITE(BCLRPAT_A, 0);
326         I915_WRITE(BCLRPAT_B, 0);
327
328         switch (lvds_priv->fitting_mode) {
329         case DRM_MODE_SCALE_CENTER:
330                 /*
331                  * For centered modes, we have to calculate border widths &
332                  * heights and modify the values programmed into the CRTC.
333                  */
334                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
335                 right_border = left_border;
336                 if (mode->hdisplay & 1)
337                         right_border++;
338                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
339                 bottom_border = top_border;
340                 if (mode->vdisplay & 1)
341                         bottom_border++;
342                 /* Set active & border values */
343                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
344                 /* Keep the boder be even */
345                 if (right_border & 1)
346                         right_border++;
347                 /* use the border directly instead of border minuse one */
348                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
349                                                 right_border;
350                 /* keep the blank width constant */
351                 adjusted_mode->crtc_hblank_end =
352                         adjusted_mode->crtc_hblank_start + hblank_width;
353                 /* get the hsync pos relative to hblank start */
354                 hsync_pos = (hblank_width - hsync_width) / 2;
355                 /* keep the hsync pos be even */
356                 if (hsync_pos & 1)
357                         hsync_pos++;
358                 adjusted_mode->crtc_hsync_start =
359                                 adjusted_mode->crtc_hblank_start + hsync_pos;
360                 /* keep the hsync width constant */
361                 adjusted_mode->crtc_hsync_end =
362                                 adjusted_mode->crtc_hsync_start + hsync_width;
363                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
364                 /* use the border instead of border minus one */
365                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
366                                                 bottom_border;
367                 /* keep the vblank width constant */
368                 adjusted_mode->crtc_vblank_end =
369                                 adjusted_mode->crtc_vblank_start + vblank_width;
370                 /* get the vsync start postion relative to vblank start */
371                 vsync_pos = (vblank_width - vsync_width) / 2;
372                 adjusted_mode->crtc_vsync_start =
373                                 adjusted_mode->crtc_vblank_start + vsync_pos;
374                 /* keep the vsync width constant */
375                 adjusted_mode->crtc_vsync_end =
376                                 adjusted_mode->crtc_vblank_start + vsync_width;
377                 border = 1;
378                 break;
379         case DRM_MODE_SCALE_ASPECT:
380                 /* Scale but preserve the spect ratio */
381                 pfit_control |= PFIT_ENABLE;
382                 if (IS_I965G(dev)) {
383                         /* 965+ is easy, it does everything in hw */
384                         if (panel_ratio > desired_ratio)
385                                 pfit_control |= PFIT_SCALING_PILLAR;
386                         else if (panel_ratio < desired_ratio)
387                                 pfit_control |= PFIT_SCALING_LETTER;
388                         else
389                                 pfit_control |= PFIT_SCALING_AUTO;
390                 } else {
391                         /*
392                          * For earlier chips we have to calculate the scaling
393                          * ratio by hand and program it into the
394                          * PFIT_PGM_RATIO register
395                          */
396                         u32 horiz_bits, vert_bits, bits = 12;
397                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
398                                                 adjusted_mode->hdisplay;
399                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
400                                                 adjusted_mode->vdisplay;
401                         horiz_scale = adjusted_mode->hdisplay *
402                                         PANEL_RATIO_FACTOR / mode->hdisplay;
403                         vert_scale = adjusted_mode->vdisplay *
404                                         PANEL_RATIO_FACTOR / mode->vdisplay;
405
406                         /* retain aspect ratio */
407                         if (panel_ratio > desired_ratio) { /* Pillar */
408                                 u32 scaled_width;
409                                 scaled_width = mode->hdisplay * vert_scale /
410                                                 PANEL_RATIO_FACTOR;
411                                 horiz_ratio = vert_ratio;
412                                 pfit_control |= (VERT_AUTO_SCALE |
413                                                  VERT_INTERP_BILINEAR |
414                                                  HORIZ_INTERP_BILINEAR);
415                                 /* Pillar will have left/right borders */
416                                 left_border = (adjusted_mode->hdisplay -
417                                                 scaled_width) / 2;
418                                 right_border = left_border;
419                                 if (mode->hdisplay & 1) /* odd resolutions */
420                                         right_border++;
421                                 /* keep the border be even */
422                                 if (right_border & 1)
423                                         right_border++;
424                                 adjusted_mode->crtc_hdisplay = scaled_width;
425                                 /* use border instead of border minus one */
426                                 adjusted_mode->crtc_hblank_start =
427                                         scaled_width + right_border;
428                                 /* keep the hblank width constant */
429                                 adjusted_mode->crtc_hblank_end =
430                                         adjusted_mode->crtc_hblank_start +
431                                                         hblank_width;
432                                 /*
433                                  * get the hsync start pos relative to
434                                  * hblank start
435                                  */
436                                 hsync_pos = (hblank_width - hsync_width) / 2;
437                                 /* keep the hsync_pos be even */
438                                 if (hsync_pos & 1)
439                                         hsync_pos++;
440                                 adjusted_mode->crtc_hsync_start =
441                                         adjusted_mode->crtc_hblank_start +
442                                                         hsync_pos;
443                                 /* keept hsync width constant */
444                                 adjusted_mode->crtc_hsync_end =
445                                         adjusted_mode->crtc_hsync_start +
446                                                         hsync_width;
447                                 border = 1;
448                         } else if (panel_ratio < desired_ratio) { /* letter */
449                                 u32 scaled_height = mode->vdisplay *
450                                         horiz_scale / PANEL_RATIO_FACTOR;
451                                 vert_ratio = horiz_ratio;
452                                 pfit_control |= (HORIZ_AUTO_SCALE |
453                                                  VERT_INTERP_BILINEAR |
454                                                  HORIZ_INTERP_BILINEAR);
455                                 /* Letterbox will have top/bottom border */
456                                 top_border = (adjusted_mode->vdisplay -
457                                         scaled_height) / 2;
458                                 bottom_border = top_border;
459                                 if (mode->vdisplay & 1)
460                                         bottom_border++;
461                                 adjusted_mode->crtc_vdisplay = scaled_height;
462                                 /* use border instead of border minus one */
463                                 adjusted_mode->crtc_vblank_start =
464                                         scaled_height + bottom_border;
465                                 /* keep the vblank width constant */
466                                 adjusted_mode->crtc_vblank_end =
467                                         adjusted_mode->crtc_vblank_start +
468                                                         vblank_width;
469                                 /*
470                                  * get the vsync start pos relative to
471                                  * vblank start
472                                  */
473                                 vsync_pos = (vblank_width - vsync_width) / 2;
474                                 adjusted_mode->crtc_vsync_start =
475                                         adjusted_mode->crtc_vblank_start +
476                                                         vsync_pos;
477                                 /* keep the vsync width constant */
478                                 adjusted_mode->crtc_vsync_end =
479                                         adjusted_mode->crtc_vsync_start +
480                                                         vsync_width;
481                                 border = 1;
482                         } else {
483                         /* Aspects match, Let hw scale both directions */
484                                 pfit_control |= (VERT_AUTO_SCALE |
485                                                  HORIZ_AUTO_SCALE |
486                                                  VERT_INTERP_BILINEAR |
487                                                  HORIZ_INTERP_BILINEAR);
488                         }
489                         horiz_bits = (1 << bits) * horiz_ratio /
490                                         PANEL_RATIO_FACTOR;
491                         vert_bits = (1 << bits) * vert_ratio /
492                                         PANEL_RATIO_FACTOR;
493                         pfit_pgm_ratios =
494                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
495                                                 PFIT_VERT_SCALE_MASK) |
496                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
497                                                 PFIT_HORIZ_SCALE_MASK);
498                 }
499                 break;
500
501         case DRM_MODE_SCALE_FULLSCREEN:
502                 /*
503                  * Full scaling, even if it changes the aspect ratio.
504                  * Fortunately this is all done for us in hw.
505                  */
506                 pfit_control |= PFIT_ENABLE;
507                 if (IS_I965G(dev))
508                         pfit_control |= PFIT_SCALING_AUTO;
509                 else
510                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
511                                          VERT_INTERP_BILINEAR |
512                                          HORIZ_INTERP_BILINEAR);
513                 break;
514         default:
515                 break;
516         }
517
518 out:
519         lvds_priv->pfit_control = pfit_control;
520         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
521         /*
522          * XXX: It would be nice to support lower refresh rates on the
523          * panels to reduce power consumption, and perhaps match the
524          * user's requested refresh rate.
525          */
526
527         return true;
528 }
529
530 static void intel_lvds_prepare(struct drm_encoder *encoder)
531 {
532         struct drm_device *dev = encoder->dev;
533         struct drm_i915_private *dev_priv = dev->dev_private;
534         u32 reg;
535
536         if (IS_IGDNG(dev))
537                 reg = BLC_PWM_CPU_CTL;
538         else
539                 reg = BLC_PWM_CTL;
540
541         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
542         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
543                                        BACKLIGHT_DUTY_CYCLE_MASK);
544
545         intel_lvds_set_power(dev, false);
546 }
547
548 static void intel_lvds_commit( struct drm_encoder *encoder)
549 {
550         struct drm_device *dev = encoder->dev;
551         struct drm_i915_private *dev_priv = dev->dev_private;
552
553         if (dev_priv->backlight_duty_cycle == 0)
554                 dev_priv->backlight_duty_cycle =
555                         intel_lvds_get_max_backlight(dev);
556
557         intel_lvds_set_power(dev, true);
558 }
559
560 static void intel_lvds_mode_set(struct drm_encoder *encoder,
561                                 struct drm_display_mode *mode,
562                                 struct drm_display_mode *adjusted_mode)
563 {
564         struct drm_device *dev = encoder->dev;
565         struct drm_i915_private *dev_priv = dev->dev_private;
566         struct intel_output *intel_output = enc_to_intel_output(encoder);
567         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
568
569         /*
570          * The LVDS pin pair will already have been turned on in the
571          * intel_crtc_mode_set since it has a large impact on the DPLL
572          * settings.
573          */
574
575         /* No panel fitting yet, fixme */
576         if (IS_IGDNG(dev))
577                 return;
578
579         /*
580          * Enable automatic panel scaling so that non-native modes fill the
581          * screen.  Should be enabled before the pipe is enabled, according to
582          * register description and PRM.
583          */
584         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
585         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
586 }
587
588 /**
589  * Detect the LVDS connection.
590  *
591  * This always returns CONNECTOR_STATUS_CONNECTED.  This connector should only have
592  * been set up if the LVDS was actually connected anyway.
593  */
594 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
595 {
596         return connector_status_connected;
597 }
598
599 /**
600  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
601  */
602 static int intel_lvds_get_modes(struct drm_connector *connector)
603 {
604         struct drm_device *dev = connector->dev;
605         struct intel_output *intel_output = to_intel_output(connector);
606         struct drm_i915_private *dev_priv = dev->dev_private;
607         int ret = 0;
608
609         ret = intel_ddc_get_modes(intel_output);
610
611         if (ret)
612                 return ret;
613
614         /* Didn't get an EDID, so
615          * Set wide sync ranges so we get all modes
616          * handed to valid_mode for checking
617          */
618         connector->display_info.min_vfreq = 0;
619         connector->display_info.max_vfreq = 200;
620         connector->display_info.min_hfreq = 0;
621         connector->display_info.max_hfreq = 200;
622
623         if (dev_priv->panel_fixed_mode != NULL) {
624                 struct drm_display_mode *mode;
625
626                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
627                 drm_mode_probed_add(connector, mode);
628
629                 return 1;
630         }
631
632         return 0;
633 }
634
635 /**
636  * intel_lvds_destroy - unregister and free LVDS structures
637  * @connector: connector to free
638  *
639  * Unregister the DDC bus for this connector then free the driver private
640  * structure.
641  */
642 static void intel_lvds_destroy(struct drm_connector *connector)
643 {
644         struct intel_output *intel_output = to_intel_output(connector);
645
646         if (intel_output->ddc_bus)
647                 intel_i2c_destroy(intel_output->ddc_bus);
648         drm_sysfs_connector_remove(connector);
649         drm_connector_cleanup(connector);
650         kfree(connector);
651 }
652
653 static int intel_lvds_set_property(struct drm_connector *connector,
654                                    struct drm_property *property,
655                                    uint64_t value)
656 {
657         struct drm_device *dev = connector->dev;
658         struct intel_output *intel_output =
659                         to_intel_output(connector);
660
661         if (property == dev->mode_config.scaling_mode_property &&
662                                 connector->encoder) {
663                 struct drm_crtc *crtc = connector->encoder->crtc;
664                 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
665                 if (value == DRM_MODE_SCALE_NONE) {
666                         DRM_DEBUG_KMS("no scaling not supported\n");
667                         return 0;
668                 }
669                 if (lvds_priv->fitting_mode == value) {
670                         /* the LVDS scaling property is not changed */
671                         return 0;
672                 }
673                 lvds_priv->fitting_mode = value;
674                 if (crtc && crtc->enabled) {
675                         /*
676                          * If the CRTC is enabled, the display will be changed
677                          * according to the new panel fitting mode.
678                          */
679                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
680                                 crtc->x, crtc->y, crtc->fb);
681                 }
682         }
683
684         return 0;
685 }
686
687 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
688         .dpms = intel_lvds_dpms,
689         .mode_fixup = intel_lvds_mode_fixup,
690         .prepare = intel_lvds_prepare,
691         .mode_set = intel_lvds_mode_set,
692         .commit = intel_lvds_commit,
693 };
694
695 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
696         .get_modes = intel_lvds_get_modes,
697         .mode_valid = intel_lvds_mode_valid,
698         .best_encoder = intel_best_encoder,
699 };
700
701 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
702         .dpms = drm_helper_connector_dpms,
703         .save = intel_lvds_save,
704         .restore = intel_lvds_restore,
705         .detect = intel_lvds_detect,
706         .fill_modes = drm_helper_probe_single_connector_modes,
707         .set_property = intel_lvds_set_property,
708         .destroy = intel_lvds_destroy,
709 };
710
711
712 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
713 {
714         drm_encoder_cleanup(encoder);
715 }
716
717 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
718         .destroy = intel_lvds_enc_destroy,
719 };
720
721 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
722 {
723         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
724         return 1;
725 }
726
727 /* These systems claim to have LVDS, but really don't */
728 static const struct dmi_system_id intel_no_lvds[] = {
729         {
730                 .callback = intel_no_lvds_dmi_callback,
731                 .ident = "Apple Mac Mini (Core series)",
732                 .matches = {
733                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
734                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
735                 },
736         },
737         {
738                 .callback = intel_no_lvds_dmi_callback,
739                 .ident = "Apple Mac Mini (Core 2 series)",
740                 .matches = {
741                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
742                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
743                 },
744         },
745         {
746                 .callback = intel_no_lvds_dmi_callback,
747                 .ident = "MSI IM-945GSE-A",
748                 .matches = {
749                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
750                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
751                 },
752         },
753         {
754                 .callback = intel_no_lvds_dmi_callback,
755                 .ident = "Dell Studio Hybrid",
756                 .matches = {
757                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
758                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
759                 },
760         },
761         {
762                 .callback = intel_no_lvds_dmi_callback,
763                 .ident = "AOpen Mini PC",
764                 .matches = {
765                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
766                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
767                 },
768         },
769         {
770                 .callback = intel_no_lvds_dmi_callback,
771                 .ident = "AOpen Mini PC MP915",
772                 .matches = {
773                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
774                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
775                 },
776         },
777         {
778                 .callback = intel_no_lvds_dmi_callback,
779                 .ident = "Aopen i945GTt-VFA",
780                 .matches = {
781                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
782                 },
783         },
784
785         { }     /* terminating entry */
786 };
787
788 #ifdef CONFIG_ACPI
789 /*
790  * check_lid_device -- check whether @handle is an ACPI LID device.
791  * @handle: ACPI device handle
792  * @level : depth in the ACPI namespace tree
793  * @context: the number of LID device when we find the device
794  * @rv: a return value to fill if desired (Not use)
795  */
796 static acpi_status
797 check_lid_device(acpi_handle handle, u32 level, void *context,
798                         void **return_value)
799 {
800         struct acpi_device *acpi_dev;
801         int *lid_present = context;
802
803         acpi_dev = NULL;
804         /* Get the acpi device for device handle */
805         if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
806                 /* If there is no ACPI device for handle, return */
807                 return AE_OK;
808         }
809
810         if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
811                 *lid_present = 1;
812
813         return AE_OK;
814 }
815
816 /**
817  * check whether there exists the ACPI LID device by enumerating the ACPI
818  * device tree.
819  */
820 static int intel_lid_present(void)
821 {
822         int lid_present = 0;
823
824         if (acpi_disabled) {
825                 /* If ACPI is disabled, there is no ACPI device tree to
826                  * check, so assume the LID device would have been present.
827                  */
828                 return 1;
829         }
830
831         acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
832                                 ACPI_UINT32_MAX,
833                                 check_lid_device, &lid_present, NULL);
834
835         return lid_present;
836 }
837 #else
838 static int intel_lid_present(void)
839 {
840         /* In the absence of ACPI built in, assume that the LID device would
841          * have been present.
842          */
843         return 1;
844 }
845 #endif
846
847 /**
848  * intel_lvds_init - setup LVDS connectors on this device
849  * @dev: drm device
850  *
851  * Create the connector, register the LVDS DDC bus, and try to figure out what
852  * modes we can display on the LVDS panel (if present).
853  */
854 void intel_lvds_init(struct drm_device *dev)
855 {
856         struct drm_i915_private *dev_priv = dev->dev_private;
857         struct intel_output *intel_output;
858         struct drm_connector *connector;
859         struct drm_encoder *encoder;
860         struct drm_display_mode *scan; /* *modes, *bios_mode; */
861         struct drm_crtc *crtc;
862         struct intel_lvds_priv *lvds_priv;
863         u32 lvds;
864         int pipe, gpio = GPIOC;
865
866         /* Skip init on machines we know falsely report LVDS */
867         if (dmi_check_system(intel_no_lvds))
868                 return;
869
870         /* Assume that any device without an ACPI LID device also doesn't
871          * have an integrated LVDS.  We would be better off parsing the BIOS
872          * to get a reliable indicator, but that code isn't written yet.
873          *
874          * In the case of all-in-one desktops using LVDS that we've seen,
875          * they're using SDVO LVDS.
876          */
877         if (!intel_lid_present())
878                 return;
879
880         if (IS_IGDNG(dev)) {
881                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
882                         return;
883                 if (dev_priv->edp_support) {
884                         DRM_DEBUG("disable LVDS for eDP support\n");
885                         return;
886                 }
887                 gpio = PCH_GPIOC;
888         }
889
890         intel_output = kzalloc(sizeof(struct intel_output) +
891                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
892         if (!intel_output) {
893                 return;
894         }
895
896         connector = &intel_output->base;
897         encoder = &intel_output->enc;
898         drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
899                            DRM_MODE_CONNECTOR_LVDS);
900
901         drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
902                          DRM_MODE_ENCODER_LVDS);
903
904         drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
905         intel_output->type = INTEL_OUTPUT_LVDS;
906
907         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
908         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
909         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
910         connector->interlace_allowed = false;
911         connector->doublescan_allowed = false;
912
913         lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
914         intel_output->dev_priv = lvds_priv;
915         /* create the scaling mode property */
916         drm_mode_create_scaling_mode_property(dev);
917         /*
918          * the initial panel fitting mode will be FULL_SCREEN.
919          */
920
921         drm_connector_attach_property(&intel_output->base,
922                                       dev->mode_config.scaling_mode_property,
923                                       DRM_MODE_SCALE_FULLSCREEN);
924         lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
925         /*
926          * LVDS discovery:
927          * 1) check for EDID on DDC
928          * 2) check for VBT data
929          * 3) check to see if LVDS is already on
930          *    if none of the above, no panel
931          * 4) make sure lid is open
932          *    if closed, act like it's not there for now
933          */
934
935         /* Set up the DDC bus. */
936         intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
937         if (!intel_output->ddc_bus) {
938                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
939                            "failed.\n");
940                 goto failed;
941         }
942
943         /*
944          * Attempt to get the fixed panel mode from DDC.  Assume that the
945          * preferred mode is the right one.
946          */
947         intel_ddc_get_modes(intel_output);
948
949         list_for_each_entry(scan, &connector->probed_modes, head) {
950                 mutex_lock(&dev->mode_config.mutex);
951                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
952                         dev_priv->panel_fixed_mode =
953                                 drm_mode_duplicate(dev, scan);
954                         mutex_unlock(&dev->mode_config.mutex);
955                         goto out;
956                 }
957                 mutex_unlock(&dev->mode_config.mutex);
958         }
959
960         /* Failed to get EDID, what about VBT? */
961         if (dev_priv->lfp_lvds_vbt_mode) {
962                 mutex_lock(&dev->mode_config.mutex);
963                 dev_priv->panel_fixed_mode =
964                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
965                 mutex_unlock(&dev->mode_config.mutex);
966                 if (dev_priv->panel_fixed_mode) {
967                         dev_priv->panel_fixed_mode->type |=
968                                 DRM_MODE_TYPE_PREFERRED;
969                         goto out;
970                 }
971         }
972
973         /*
974          * If we didn't get EDID, try checking if the panel is already turned
975          * on.  If so, assume that whatever is currently programmed is the
976          * correct mode.
977          */
978
979         /* IGDNG: FIXME if still fail, not try pipe mode now */
980         if (IS_IGDNG(dev))
981                 goto failed;
982
983         lvds = I915_READ(LVDS);
984         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
985         crtc = intel_get_crtc_from_pipe(dev, pipe);
986
987         if (crtc && (lvds & LVDS_PORT_EN)) {
988                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
989                 if (dev_priv->panel_fixed_mode) {
990                         dev_priv->panel_fixed_mode->type |=
991                                 DRM_MODE_TYPE_PREFERRED;
992                         goto out;
993                 }
994         }
995
996         /* If we still don't have a mode after all that, give up. */
997         if (!dev_priv->panel_fixed_mode)
998                 goto failed;
999
1000 out:
1001         if (IS_IGDNG(dev)) {
1002                 u32 pwm;
1003                 /* make sure PWM is enabled */
1004                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1005                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1006                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1007
1008                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1009                 pwm |= PWM_PCH_ENABLE;
1010                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1011         }
1012         drm_sysfs_connector_add(connector);
1013         return;
1014
1015 failed:
1016         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1017         if (intel_output->ddc_bus)
1018                 intel_i2c_destroy(intel_output->ddc_bus);
1019         drm_connector_cleanup(connector);
1020         kfree(intel_output);
1021 }