drm/i915: convert VGA driver to new encoder/connector structure
[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / intel_crt.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *      Eric Anholt <eric@anholt.net>
25  */
26
27 #include <linux/i2c.h>
28 #include "drmP.h"
29 #include "drm.h"
30 #include "drm_crtc.h"
31 #include "drm_crtc_helper.h"
32 #include "intel_drv.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
37 {
38         struct drm_device *dev = encoder->dev;
39         struct drm_i915_private *dev_priv = dev->dev_private;
40         u32 temp, reg;
41
42         if (HAS_PCH_SPLIT(dev))
43                 reg = PCH_ADPA;
44         else
45                 reg = ADPA;
46
47         temp = I915_READ(reg);
48         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
49         temp &= ~ADPA_DAC_ENABLE;
50
51         switch(mode) {
52         case DRM_MODE_DPMS_ON:
53                 temp |= ADPA_DAC_ENABLE;
54                 break;
55         case DRM_MODE_DPMS_STANDBY:
56                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
57                 break;
58         case DRM_MODE_DPMS_SUSPEND:
59                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
60                 break;
61         case DRM_MODE_DPMS_OFF:
62                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
63                 break;
64         }
65
66         I915_WRITE(reg, temp);
67 }
68
69 static int intel_crt_mode_valid(struct drm_connector *connector,
70                                 struct drm_display_mode *mode)
71 {
72         struct drm_device *dev = connector->dev;
73
74         int max_clock = 0;
75         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
76                 return MODE_NO_DBLESCAN;
77
78         if (mode->clock < 25000)
79                 return MODE_CLOCK_LOW;
80
81         if (!IS_I9XX(dev))
82                 max_clock = 350000;
83         else
84                 max_clock = 400000;
85         if (mode->clock > max_clock)
86                 return MODE_CLOCK_HIGH;
87
88         return MODE_OK;
89 }
90
91 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
92                                  struct drm_display_mode *mode,
93                                  struct drm_display_mode *adjusted_mode)
94 {
95         return true;
96 }
97
98 static void intel_crt_mode_set(struct drm_encoder *encoder,
99                                struct drm_display_mode *mode,
100                                struct drm_display_mode *adjusted_mode)
101 {
102
103         struct drm_device *dev = encoder->dev;
104         struct drm_crtc *crtc = encoder->crtc;
105         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
106         struct drm_i915_private *dev_priv = dev->dev_private;
107         int dpll_md_reg;
108         u32 adpa, dpll_md;
109         u32 adpa_reg;
110
111         if (intel_crtc->pipe == 0)
112                 dpll_md_reg = DPLL_A_MD;
113         else
114                 dpll_md_reg = DPLL_B_MD;
115
116         if (HAS_PCH_SPLIT(dev))
117                 adpa_reg = PCH_ADPA;
118         else
119                 adpa_reg = ADPA;
120
121         /*
122          * Disable separate mode multiplier used when cloning SDVO to CRT
123          * XXX this needs to be adjusted when we really are cloning
124          */
125         if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
126                 dpll_md = I915_READ(dpll_md_reg);
127                 I915_WRITE(dpll_md_reg,
128                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
129         }
130
131         adpa = 0;
132         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
133                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
134         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
135                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
136
137         if (intel_crtc->pipe == 0) {
138                 if (HAS_PCH_CPT(dev))
139                         adpa |= PORT_TRANS_A_SEL_CPT;
140                 else
141                         adpa |= ADPA_PIPE_A_SELECT;
142                 if (!HAS_PCH_SPLIT(dev))
143                         I915_WRITE(BCLRPAT_A, 0);
144         } else {
145                 if (HAS_PCH_CPT(dev))
146                         adpa |= PORT_TRANS_B_SEL_CPT;
147                 else
148                         adpa |= ADPA_PIPE_B_SELECT;
149                 if (!HAS_PCH_SPLIT(dev))
150                         I915_WRITE(BCLRPAT_B, 0);
151         }
152
153         I915_WRITE(adpa_reg, adpa);
154 }
155
156 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
157 {
158         struct drm_device *dev = connector->dev;
159         struct drm_i915_private *dev_priv = dev->dev_private;
160         u32 adpa, temp;
161         bool ret;
162
163         temp = adpa = I915_READ(PCH_ADPA);
164
165         if (HAS_PCH_CPT(dev)) {
166                 /* Disable DAC before force detect */
167                 I915_WRITE(PCH_ADPA, adpa & ~ADPA_DAC_ENABLE);
168                 (void)I915_READ(PCH_ADPA);
169         } else {
170                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
171                 /* disable HPD first */
172                 I915_WRITE(PCH_ADPA, adpa);
173                 (void)I915_READ(PCH_ADPA);
174         }
175
176         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
177                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
178                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
179                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
180                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
181                         ADPA_CRT_HOTPLUG_ENABLE |
182                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
183
184         DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
185         I915_WRITE(PCH_ADPA, adpa);
186
187         while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
188                 ;
189
190         if (HAS_PCH_CPT(dev)) {
191                 I915_WRITE(PCH_ADPA, temp);
192                 (void)I915_READ(PCH_ADPA);
193         }
194
195         /* Check the status to see if both blue and green are on now */
196         adpa = I915_READ(PCH_ADPA);
197         adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
198         if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
199                 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
200                 ret = true;
201         else
202                 ret = false;
203
204         return ret;
205 }
206
207 /**
208  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
209  *
210  * Not for i915G/i915GM
211  *
212  * \return true if CRT is connected.
213  * \return false if CRT is disconnected.
214  */
215 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
216 {
217         struct drm_device *dev = connector->dev;
218         struct drm_i915_private *dev_priv = dev->dev_private;
219         u32 hotplug_en;
220         int i, tries = 0;
221
222         if (HAS_PCH_SPLIT(dev))
223                 return intel_ironlake_crt_detect_hotplug(connector);
224
225         /*
226          * On 4 series desktop, CRT detect sequence need to be done twice
227          * to get a reliable result.
228          */
229
230         if (IS_G4X(dev) && !IS_GM45(dev))
231                 tries = 2;
232         else
233                 tries = 1;
234         hotplug_en = I915_READ(PORT_HOTPLUG_EN);
235         hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
236         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
237
238         if (IS_G4X(dev))
239                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
240
241         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
242
243         for (i = 0; i < tries ; i++) {
244                 unsigned long timeout;
245                 /* turn on the FORCE_DETECT */
246                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
247                 timeout = jiffies + msecs_to_jiffies(1000);
248                 /* wait for FORCE_DETECT to go off */
249                 do {
250                         if (!(I915_READ(PORT_HOTPLUG_EN) &
251                                         CRT_HOTPLUG_FORCE_DETECT))
252                                 break;
253                         msleep(1);
254                 } while (time_after(timeout, jiffies));
255         }
256
257         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
258             CRT_HOTPLUG_MONITOR_NONE)
259                 return true;
260
261         return false;
262 }
263
264 static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
265 {
266         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
267
268         /* CRT should always be at 0, but check anyway */
269         if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
270                 return false;
271
272         return intel_ddc_probe(intel_encoder);
273 }
274
275 static enum drm_connector_status
276 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
277 {
278         struct drm_encoder *encoder = &intel_encoder->enc;
279         struct drm_device *dev = encoder->dev;
280         struct drm_i915_private *dev_priv = dev->dev_private;
281         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
282         uint32_t pipe = intel_crtc->pipe;
283         uint32_t save_bclrpat;
284         uint32_t save_vtotal;
285         uint32_t vtotal, vactive;
286         uint32_t vsample;
287         uint32_t vblank, vblank_start, vblank_end;
288         uint32_t dsl;
289         uint32_t bclrpat_reg;
290         uint32_t vtotal_reg;
291         uint32_t vblank_reg;
292         uint32_t vsync_reg;
293         uint32_t pipeconf_reg;
294         uint32_t pipe_dsl_reg;
295         uint8_t st00;
296         enum drm_connector_status status;
297
298         if (pipe == 0) {
299                 bclrpat_reg = BCLRPAT_A;
300                 vtotal_reg = VTOTAL_A;
301                 vblank_reg = VBLANK_A;
302                 vsync_reg = VSYNC_A;
303                 pipeconf_reg = PIPEACONF;
304                 pipe_dsl_reg = PIPEADSL;
305         } else {
306                 bclrpat_reg = BCLRPAT_B;
307                 vtotal_reg = VTOTAL_B;
308                 vblank_reg = VBLANK_B;
309                 vsync_reg = VSYNC_B;
310                 pipeconf_reg = PIPEBCONF;
311                 pipe_dsl_reg = PIPEBDSL;
312         }
313
314         save_bclrpat = I915_READ(bclrpat_reg);
315         save_vtotal = I915_READ(vtotal_reg);
316         vblank = I915_READ(vblank_reg);
317
318         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
319         vactive = (save_vtotal & 0x7ff) + 1;
320
321         vblank_start = (vblank & 0xfff) + 1;
322         vblank_end = ((vblank >> 16) & 0xfff) + 1;
323
324         /* Set the border color to purple. */
325         I915_WRITE(bclrpat_reg, 0x500050);
326
327         if (IS_I9XX(dev)) {
328                 uint32_t pipeconf = I915_READ(pipeconf_reg);
329                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
330                 /* Wait for next Vblank to substitue
331                  * border color for Color info */
332                 intel_wait_for_vblank(dev);
333                 st00 = I915_READ8(VGA_MSR_WRITE);
334                 status = ((st00 & (1 << 4)) != 0) ?
335                         connector_status_connected :
336                         connector_status_disconnected;
337
338                 I915_WRITE(pipeconf_reg, pipeconf);
339         } else {
340                 bool restore_vblank = false;
341                 int count, detect;
342
343                 /*
344                 * If there isn't any border, add some.
345                 * Yes, this will flicker
346                 */
347                 if (vblank_start <= vactive && vblank_end >= vtotal) {
348                         uint32_t vsync = I915_READ(vsync_reg);
349                         uint32_t vsync_start = (vsync & 0xffff) + 1;
350
351                         vblank_start = vsync_start;
352                         I915_WRITE(vblank_reg,
353                                    (vblank_start - 1) |
354                                    ((vblank_end - 1) << 16));
355                         restore_vblank = true;
356                 }
357                 /* sample in the vertical border, selecting the larger one */
358                 if (vblank_start - vactive >= vtotal - vblank_end)
359                         vsample = (vblank_start + vactive) >> 1;
360                 else
361                         vsample = (vtotal + vblank_end) >> 1;
362
363                 /*
364                  * Wait for the border to be displayed
365                  */
366                 while (I915_READ(pipe_dsl_reg) >= vactive)
367                         ;
368                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
369                         ;
370                 /*
371                  * Watch ST00 for an entire scanline
372                  */
373                 detect = 0;
374                 count = 0;
375                 do {
376                         count++;
377                         /* Read the ST00 VGA status register */
378                         st00 = I915_READ8(VGA_MSR_WRITE);
379                         if (st00 & (1 << 4))
380                                 detect++;
381                 } while ((I915_READ(pipe_dsl_reg) == dsl));
382
383                 /* restore vblank if necessary */
384                 if (restore_vblank)
385                         I915_WRITE(vblank_reg, vblank);
386                 /*
387                  * If more than 3/4 of the scanline detected a monitor,
388                  * then it is assumed to be present. This works even on i830,
389                  * where there isn't any way to force the border color across
390                  * the screen
391                  */
392                 status = detect * 4 > count * 3 ?
393                          connector_status_connected :
394                          connector_status_disconnected;
395         }
396
397         /* Restore previous settings */
398         I915_WRITE(bclrpat_reg, save_bclrpat);
399
400         return status;
401 }
402
403 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
404 {
405         struct drm_device *dev = connector->dev;
406         struct drm_encoder *encoder = intel_attached_encoder(connector);
407         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
408         struct drm_crtc *crtc;
409         int dpms_mode;
410         enum drm_connector_status status;
411
412         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
413                 if (intel_crt_detect_hotplug(connector))
414                         return connector_status_connected;
415                 else
416                         return connector_status_disconnected;
417         }
418
419         if (intel_crt_detect_ddc(encoder))
420                 return connector_status_connected;
421
422         /* for pre-945g platforms use load detect */
423         if (encoder->crtc && encoder->crtc->enabled) {
424                 status = intel_crt_load_detect(encoder->crtc, intel_encoder);
425         } else {
426                 crtc = intel_get_load_detect_pipe(intel_encoder, connector,
427                                                   NULL, &dpms_mode);
428                 if (crtc) {
429                         status = intel_crt_load_detect(crtc, intel_encoder);
430                         intel_release_load_detect_pipe(intel_encoder,
431                                                        connector, dpms_mode);
432                 } else
433                         status = connector_status_unknown;
434         }
435
436         return status;
437 }
438
439 static void intel_crt_destroy(struct drm_connector *connector)
440 {
441         drm_sysfs_connector_remove(connector);
442         drm_connector_cleanup(connector);
443         kfree(connector);
444 }
445
446 static int intel_crt_get_modes(struct drm_connector *connector)
447 {
448         int ret;
449         struct drm_encoder *encoder = intel_attached_encoder(connector);
450         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
451         struct i2c_adapter *ddc_bus;
452         struct drm_device *dev = connector->dev;
453
454
455         ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
456         if (ret || !IS_G4X(dev))
457                 goto end;
458
459         /* Try to probe digital port for output in DVI-I -> VGA mode. */
460         ddc_bus = intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
461
462         if (!ddc_bus) {
463                 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
464                            "DDC bus registration failed for CRTDDC_D.\n");
465                 goto end;
466         }
467         /* Try to get modes by GPIOD port */
468         ret = intel_ddc_get_modes(connector, ddc_bus);
469         intel_i2c_destroy(ddc_bus);
470
471 end:
472         return ret;
473
474 }
475
476 static int intel_crt_set_property(struct drm_connector *connector,
477                                   struct drm_property *property,
478                                   uint64_t value)
479 {
480         return 0;
481 }
482
483 /*
484  * Routines for controlling stuff on the analog port
485  */
486
487 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
488         .dpms = intel_crt_dpms,
489         .mode_fixup = intel_crt_mode_fixup,
490         .prepare = intel_encoder_prepare,
491         .commit = intel_encoder_commit,
492         .mode_set = intel_crt_mode_set,
493 };
494
495 static const struct drm_connector_funcs intel_crt_connector_funcs = {
496         .dpms = drm_helper_connector_dpms,
497         .detect = intel_crt_detect,
498         .fill_modes = drm_helper_probe_single_connector_modes,
499         .destroy = intel_crt_destroy,
500         .set_property = intel_crt_set_property,
501 };
502
503 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
504         .mode_valid = intel_crt_mode_valid,
505         .get_modes = intel_crt_get_modes,
506         .best_encoder = intel_attached_encoder,
507 };
508
509 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
510 {
511         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
512
513         intel_i2c_destroy(intel_encoder->ddc_bus);
514         drm_encoder_cleanup(encoder);
515         kfree(intel_encoder);
516 }
517
518 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
519         .destroy = intel_crt_enc_destroy,
520 };
521
522 void intel_crt_init(struct drm_device *dev)
523 {
524         struct drm_connector *connector;
525         struct intel_encoder *intel_encoder;
526         struct intel_connector *intel_connector;
527         struct drm_i915_private *dev_priv = dev->dev_private;
528         u32 i2c_reg;
529
530         intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
531         if (!intel_encoder)
532                 return;
533
534         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
535         if (!intel_connector) {
536                 kfree(intel_encoder);
537                 return;
538         }
539
540         connector = &intel_connector->base;
541         drm_connector_init(dev, &intel_connector->base,
542                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
543
544         drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs,
545                          DRM_MODE_ENCODER_DAC);
546
547         drm_mode_connector_attach_encoder(&intel_connector->base,
548                                           &intel_encoder->enc);
549
550         /* Set up the DDC bus. */
551         if (HAS_PCH_SPLIT(dev))
552                 i2c_reg = PCH_GPIOA;
553         else {
554                 i2c_reg = GPIOA;
555                 /* Use VBT information for CRT DDC if available */
556                 if (dev_priv->crt_ddc_bus != 0)
557                         i2c_reg = dev_priv->crt_ddc_bus;
558         }
559         intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
560         if (!intel_encoder->ddc_bus) {
561                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
562                            "failed.\n");
563                 return;
564         }
565
566         intel_encoder->type = INTEL_OUTPUT_ANALOG;
567         intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
568                                    (1 << INTEL_ANALOG_CLONE_BIT) |
569                                    (1 << INTEL_SDVO_LVDS_CLONE_BIT);
570         intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
571         connector->interlace_allowed = 0;
572         connector->doublescan_allowed = 0;
573
574         drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs);
575         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
576
577         drm_sysfs_connector_add(connector);
578
579         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
580 }