drm/i915: Correct the Sandybridge chipset info structs.
[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / i915_drv.c
1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2  */
3 /*
4  *
5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6  * All Rights Reserved.
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the
10  * "Software"), to deal in the Software without restriction, including
11  * without limitation the rights to use, copy, modify, merge, publish,
12  * distribute, sub license, and/or sell copies of the Software, and to
13  * permit persons to whom the Software is furnished to do so, subject to
14  * the following conditions:
15  *
16  * The above copyright notice and this permission notice (including the
17  * next paragraph) shall be included in all copies or substantial portions
18  * of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27  *
28  */
29
30 #include <linux/device.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
38
39 static int i915_modeset = -1;
40 module_param_named(modeset, i915_modeset, int, 0400);
41
42 unsigned int i915_fbpercrtc = 0;
43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
44
45 unsigned int i915_powersave = 1;
46 module_param_named(powersave, i915_powersave, int, 0400);
47
48 unsigned int i915_lvds_downclock = 0;
49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
50
51 static struct drm_driver driver;
52
53 #define INTEL_VGA_DEVICE(id, info) {            \
54         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
55         .class_mask = 0xffff00,                 \
56         .vendor = 0x8086,                       \
57         .device = id,                           \
58         .subvendor = PCI_ANY_ID,                \
59         .subdevice = PCI_ANY_ID,                \
60         .driver_data = (unsigned long) info }
61
62 const static struct intel_device_info intel_i830_info = {
63         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
64 };
65
66 const static struct intel_device_info intel_845g_info = {
67         .is_i8xx = 1,
68 };
69
70 const static struct intel_device_info intel_i85x_info = {
71         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
72 };
73
74 const static struct intel_device_info intel_i865g_info = {
75         .is_i8xx = 1,
76 };
77
78 const static struct intel_device_info intel_i915g_info = {
79         .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
80 };
81 const static struct intel_device_info intel_i915gm_info = {
82         .is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
83         .cursor_needs_physical = 1,
84 };
85 const static struct intel_device_info intel_i945g_info = {
86         .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
87 };
88 const static struct intel_device_info intel_i945gm_info = {
89         .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
90         .has_hotplug = 1, .cursor_needs_physical = 1,
91 };
92
93 const static struct intel_device_info intel_i965g_info = {
94         .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
95 };
96
97 const static struct intel_device_info intel_i965gm_info = {
98         .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
99         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
100         .has_hotplug = 1,
101 };
102
103 const static struct intel_device_info intel_g33_info = {
104         .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
105         .has_hotplug = 1,
106 };
107
108 const static struct intel_device_info intel_g45_info = {
109         .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
110         .has_pipe_cxsr = 1,
111         .has_hotplug = 1,
112 };
113
114 const static struct intel_device_info intel_gm45_info = {
115         .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
116         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
117         .has_pipe_cxsr = 1,
118         .has_hotplug = 1,
119 };
120
121 const static struct intel_device_info intel_pineview_info = {
122         .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
123         .need_gfx_hws = 1,
124         .has_hotplug = 1,
125 };
126
127 const static struct intel_device_info intel_ironlake_d_info = {
128         .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
129         .has_pipe_cxsr = 1,
130         .has_hotplug = 1,
131 };
132
133 const static struct intel_device_info intel_ironlake_m_info = {
134         .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
135         .need_gfx_hws = 1, .has_rc6 = 1,
136         .has_hotplug = 1,
137 };
138
139 const static struct intel_device_info intel_sandybridge_d_info = {
140         .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
141         .has_hotplug = 1,
142 };
143
144 const static struct intel_device_info intel_sandybridge_m_info = {
145         .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
146         .has_hotplug = 1,
147 };
148
149 const static struct pci_device_id pciidlist[] = {
150         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
151         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
152         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
153         INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
154         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
155         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
156         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
157         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
158         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
159         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
160         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
161         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
162         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
163         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
164         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
165         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
166         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
167         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
168         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
169         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
170         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
171         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
172         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
173         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
174         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
175         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
176         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
177         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
178         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
179         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
180         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
181         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
182         {0, 0, 0}
183 };
184
185 #if defined(CONFIG_DRM_I915_KMS)
186 MODULE_DEVICE_TABLE(pci, pciidlist);
187 #endif
188
189 static int i915_drm_freeze(struct drm_device *dev)
190 {
191         struct drm_i915_private *dev_priv = dev->dev_private;
192
193         pci_save_state(dev->pdev);
194
195         /* If KMS is active, we do the leavevt stuff here */
196         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
197                 int error = i915_gem_idle(dev);
198                 if (error) {
199                         dev_err(&dev->pdev->dev,
200                                 "GEM idle failed, resume might fail\n");
201                         return error;
202                 }
203                 drm_irq_uninstall(dev);
204         }
205
206         i915_save_state(dev);
207
208         intel_opregion_free(dev, 1);
209
210         /* Modeset on resume, not lid events */
211         dev_priv->modeset_on_lid = 0;
212
213         return 0;
214 }
215
216 static int i915_suspend(struct drm_device *dev, pm_message_t state)
217 {
218         int error;
219
220         if (!dev || !dev->dev_private) {
221                 DRM_ERROR("dev: %p\n", dev);
222                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
223                 return -ENODEV;
224         }
225
226         if (state.event == PM_EVENT_PRETHAW)
227                 return 0;
228
229         error = i915_drm_freeze(dev);
230         if (error)
231                 return error;
232
233         if (state.event == PM_EVENT_SUSPEND) {
234                 /* Shut down the device */
235                 pci_disable_device(dev->pdev);
236                 pci_set_power_state(dev->pdev, PCI_D3hot);
237         }
238
239         return 0;
240 }
241
242 static int i915_drm_thaw(struct drm_device *dev)
243 {
244         struct drm_i915_private *dev_priv = dev->dev_private;
245         int error = 0;
246
247         i915_restore_state(dev);
248
249         intel_opregion_init(dev, 1);
250
251         /* KMS EnterVT equivalent */
252         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
253                 mutex_lock(&dev->struct_mutex);
254                 dev_priv->mm.suspended = 0;
255
256                 error = i915_gem_init_ringbuffer(dev);
257                 mutex_unlock(&dev->struct_mutex);
258
259                 drm_irq_install(dev);
260
261                 /* Resume the modeset for every activated CRTC */
262                 drm_helper_resume_force_mode(dev);
263         }
264
265         dev_priv->modeset_on_lid = 0;
266
267         return error;
268 }
269
270 static int i915_resume(struct drm_device *dev)
271 {
272         if (pci_enable_device(dev->pdev))
273                 return -EIO;
274
275         pci_set_master(dev->pdev);
276
277         return i915_drm_thaw(dev);
278 }
279
280 /**
281  * i965_reset - reset chip after a hang
282  * @dev: drm device to reset
283  * @flags: reset domains
284  *
285  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
286  * reset or otherwise an error code.
287  *
288  * Procedure is fairly simple:
289  *   - reset the chip using the reset reg
290  *   - re-init context state
291  *   - re-init hardware status page
292  *   - re-init ring buffer
293  *   - re-init interrupt state
294  *   - re-init display
295  */
296 int i965_reset(struct drm_device *dev, u8 flags)
297 {
298         drm_i915_private_t *dev_priv = dev->dev_private;
299         unsigned long timeout;
300         u8 gdrst;
301         /*
302          * We really should only reset the display subsystem if we actually
303          * need to
304          */
305         bool need_display = true;
306
307         mutex_lock(&dev->struct_mutex);
308
309         /*
310          * Clear request list
311          */
312         i915_gem_retire_requests(dev);
313
314         if (need_display)
315                 i915_save_display(dev);
316
317         if (IS_I965G(dev) || IS_G4X(dev)) {
318                 /*
319                  * Set the domains we want to reset, then the reset bit (bit 0).
320                  * Clear the reset bit after a while and wait for hardware status
321                  * bit (bit 1) to be set
322                  */
323                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
324                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
325                 udelay(50);
326                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
327
328                 /* ...we don't want to loop forever though, 500ms should be plenty */
329                timeout = jiffies + msecs_to_jiffies(500);
330                 do {
331                         udelay(100);
332                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
333                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
334
335                 if (gdrst & 0x1) {
336                         WARN(true, "i915: Failed to reset chip\n");
337                         mutex_unlock(&dev->struct_mutex);
338                         return -EIO;
339                 }
340         } else {
341                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
342                 return -ENODEV;
343         }
344
345         /* Ok, now get things going again... */
346
347         /*
348          * Everything depends on having the GTT running, so we need to start
349          * there.  Fortunately we don't need to do this unless we reset the
350          * chip at a PCI level.
351          *
352          * Next we need to restore the context, but we don't use those
353          * yet either...
354          *
355          * Ring buffer needs to be re-initialized in the KMS case, or if X
356          * was running at the time of the reset (i.e. we weren't VT
357          * switched away).
358          */
359         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
360             !dev_priv->mm.suspended) {
361                 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
362                 struct drm_gem_object *obj = ring->ring_obj;
363                 struct drm_i915_gem_object *obj_priv = obj->driver_private;
364                 dev_priv->mm.suspended = 0;
365
366                 /* Stop the ring if it's running. */
367                 I915_WRITE(PRB0_CTL, 0);
368                 I915_WRITE(PRB0_TAIL, 0);
369                 I915_WRITE(PRB0_HEAD, 0);
370
371                 /* Initialize the ring. */
372                 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
373                 I915_WRITE(PRB0_CTL,
374                            ((obj->size - 4096) & RING_NR_PAGES) |
375                            RING_NO_REPORT |
376                            RING_VALID);
377                 if (!drm_core_check_feature(dev, DRIVER_MODESET))
378                         i915_kernel_lost_context(dev);
379                 else {
380                         ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
381                         ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
382                         ring->space = ring->head - (ring->tail + 8);
383                         if (ring->space < 0)
384                                 ring->space += ring->Size;
385                 }
386
387                 mutex_unlock(&dev->struct_mutex);
388                 drm_irq_uninstall(dev);
389                 drm_irq_install(dev);
390                 mutex_lock(&dev->struct_mutex);
391         }
392
393         /*
394          * Display needs restore too...
395          */
396         if (need_display)
397                 i915_restore_display(dev);
398
399         mutex_unlock(&dev->struct_mutex);
400         return 0;
401 }
402
403
404 static int __devinit
405 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
406 {
407         return drm_get_dev(pdev, ent, &driver);
408 }
409
410 static void
411 i915_pci_remove(struct pci_dev *pdev)
412 {
413         struct drm_device *dev = pci_get_drvdata(pdev);
414
415         drm_put_dev(dev);
416 }
417
418 static int i915_pm_suspend(struct device *dev)
419 {
420         struct pci_dev *pdev = to_pci_dev(dev);
421         struct drm_device *drm_dev = pci_get_drvdata(pdev);
422         int error;
423
424         if (!drm_dev || !drm_dev->dev_private) {
425                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
426                 return -ENODEV;
427         }
428
429         error = i915_drm_freeze(drm_dev);
430         if (error)
431                 return error;
432
433         pci_disable_device(pdev);
434         pci_set_power_state(pdev, PCI_D3hot);
435
436         return 0;
437 }
438
439 static int i915_pm_resume(struct device *dev)
440 {
441         struct pci_dev *pdev = to_pci_dev(dev);
442         struct drm_device *drm_dev = pci_get_drvdata(pdev);
443
444         return i915_resume(drm_dev);
445 }
446
447 static int i915_pm_freeze(struct device *dev)
448 {
449         struct pci_dev *pdev = to_pci_dev(dev);
450         struct drm_device *drm_dev = pci_get_drvdata(pdev);
451
452         if (!drm_dev || !drm_dev->dev_private) {
453                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
454                 return -ENODEV;
455         }
456
457         return i915_drm_freeze(drm_dev);
458 }
459
460 static int i915_pm_thaw(struct device *dev)
461 {
462         struct pci_dev *pdev = to_pci_dev(dev);
463         struct drm_device *drm_dev = pci_get_drvdata(pdev);
464
465         return i915_drm_thaw(drm_dev);
466 }
467
468 static int i915_pm_poweroff(struct device *dev)
469 {
470         struct pci_dev *pdev = to_pci_dev(dev);
471         struct drm_device *drm_dev = pci_get_drvdata(pdev);
472
473         return i915_drm_freeze(drm_dev);
474 }
475
476 const struct dev_pm_ops i915_pm_ops = {
477      .suspend = i915_pm_suspend,
478      .resume = i915_pm_resume,
479      .freeze = i915_pm_freeze,
480      .thaw = i915_pm_thaw,
481      .poweroff = i915_pm_poweroff,
482      .restore = i915_pm_resume,
483 };
484
485 static struct vm_operations_struct i915_gem_vm_ops = {
486         .fault = i915_gem_fault,
487         .open = drm_gem_vm_open,
488         .close = drm_gem_vm_close,
489 };
490
491 static struct drm_driver driver = {
492         /* don't use mtrr's here, the Xserver or user space app should
493          * deal with them for intel hardware.
494          */
495         .driver_features =
496             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
497             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
498         .load = i915_driver_load,
499         .unload = i915_driver_unload,
500         .open = i915_driver_open,
501         .lastclose = i915_driver_lastclose,
502         .preclose = i915_driver_preclose,
503         .postclose = i915_driver_postclose,
504
505         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
506         .suspend = i915_suspend,
507         .resume = i915_resume,
508
509         .device_is_agp = i915_driver_device_is_agp,
510         .enable_vblank = i915_enable_vblank,
511         .disable_vblank = i915_disable_vblank,
512         .irq_preinstall = i915_driver_irq_preinstall,
513         .irq_postinstall = i915_driver_irq_postinstall,
514         .irq_uninstall = i915_driver_irq_uninstall,
515         .irq_handler = i915_driver_irq_handler,
516         .reclaim_buffers = drm_core_reclaim_buffers,
517         .get_map_ofs = drm_core_get_map_ofs,
518         .get_reg_ofs = drm_core_get_reg_ofs,
519         .master_create = i915_master_create,
520         .master_destroy = i915_master_destroy,
521 #if defined(CONFIG_DEBUG_FS)
522         .debugfs_init = i915_debugfs_init,
523         .debugfs_cleanup = i915_debugfs_cleanup,
524 #endif
525         .gem_init_object = i915_gem_init_object,
526         .gem_free_object = i915_gem_free_object,
527         .gem_vm_ops = &i915_gem_vm_ops,
528         .ioctls = i915_ioctls,
529         .fops = {
530                  .owner = THIS_MODULE,
531                  .open = drm_open,
532                  .release = drm_release,
533                  .unlocked_ioctl = drm_ioctl,
534                  .mmap = drm_gem_mmap,
535                  .poll = drm_poll,
536                  .fasync = drm_fasync,
537                  .read = drm_read,
538 #ifdef CONFIG_COMPAT
539                  .compat_ioctl = i915_compat_ioctl,
540 #endif
541         },
542
543         .pci_driver = {
544                  .name = DRIVER_NAME,
545                  .id_table = pciidlist,
546                  .probe = i915_pci_probe,
547                  .remove = i915_pci_remove,
548                  .driver.pm = &i915_pm_ops,
549         },
550
551         .name = DRIVER_NAME,
552         .desc = DRIVER_DESC,
553         .date = DRIVER_DATE,
554         .major = DRIVER_MAJOR,
555         .minor = DRIVER_MINOR,
556         .patchlevel = DRIVER_PATCHLEVEL,
557 };
558
559 static int __init i915_init(void)
560 {
561         driver.num_ioctls = i915_max_ioctl;
562
563         i915_gem_shrinker_init();
564
565         /*
566          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
567          * explicitly disabled with the module pararmeter.
568          *
569          * Otherwise, just follow the parameter (defaulting to off).
570          *
571          * Allow optional vga_text_mode_force boot option to override
572          * the default behavior.
573          */
574 #if defined(CONFIG_DRM_I915_KMS)
575         if (i915_modeset != 0)
576                 driver.driver_features |= DRIVER_MODESET;
577 #endif
578         if (i915_modeset == 1)
579                 driver.driver_features |= DRIVER_MODESET;
580
581 #ifdef CONFIG_VGA_CONSOLE
582         if (vgacon_text_force() && i915_modeset == -1)
583                 driver.driver_features &= ~DRIVER_MODESET;
584 #endif
585
586         if (!(driver.driver_features & DRIVER_MODESET)) {
587                 driver.suspend = i915_suspend;
588                 driver.resume = i915_resume;
589         }
590
591         return drm_init(&driver);
592 }
593
594 static void __exit i915_exit(void)
595 {
596         i915_gem_shrinker_exit();
597         drm_exit(&driver);
598 }
599
600 module_init(i915_init);
601 module_exit(i915_exit);
602
603 MODULE_AUTHOR(DRIVER_AUTHOR);
604 MODULE_DESCRIPTION(DRIVER_DESC);
605 MODULE_LICENSE("GPL and additional rights");