drm/i915: Fix sandybridge status page setup.
[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / i915_drv.c
1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2  */
3 /*
4  *
5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6  * All Rights Reserved.
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the
10  * "Software"), to deal in the Software without restriction, including
11  * without limitation the rights to use, copy, modify, merge, publish,
12  * distribute, sub license, and/or sell copies of the Software, and to
13  * permit persons to whom the Software is furnished to do so, subject to
14  * the following conditions:
15  *
16  * The above copyright notice and this permission notice (including the
17  * next paragraph) shall be included in all copies or substantial portions
18  * of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27  *
28  */
29
30 #include <linux/device.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
38
39 static int i915_modeset = -1;
40 module_param_named(modeset, i915_modeset, int, 0400);
41
42 unsigned int i915_fbpercrtc = 0;
43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
44
45 unsigned int i915_powersave = 1;
46 module_param_named(powersave, i915_powersave, int, 0400);
47
48 unsigned int i915_lvds_downclock = 0;
49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
50
51 static struct drm_driver driver;
52
53 #define INTEL_VGA_DEVICE(id, info) {            \
54         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
55         .class_mask = 0xffff00,                 \
56         .vendor = 0x8086,                       \
57         .device = id,                           \
58         .subvendor = PCI_ANY_ID,                \
59         .subdevice = PCI_ANY_ID,                \
60         .driver_data = (unsigned long) info }
61
62 const static struct intel_device_info intel_i830_info = {
63         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
64 };
65
66 const static struct intel_device_info intel_845g_info = {
67         .is_i8xx = 1,
68 };
69
70 const static struct intel_device_info intel_i85x_info = {
71         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
72 };
73
74 const static struct intel_device_info intel_i865g_info = {
75         .is_i8xx = 1,
76 };
77
78 const static struct intel_device_info intel_i915g_info = {
79         .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
80 };
81 const static struct intel_device_info intel_i915gm_info = {
82         .is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
83         .cursor_needs_physical = 1,
84 };
85 const static struct intel_device_info intel_i945g_info = {
86         .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
87 };
88 const static struct intel_device_info intel_i945gm_info = {
89         .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
90         .has_hotplug = 1, .cursor_needs_physical = 1,
91 };
92
93 const static struct intel_device_info intel_i965g_info = {
94         .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
95 };
96
97 const static struct intel_device_info intel_i965gm_info = {
98         .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
99         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
100         .has_hotplug = 1,
101 };
102
103 const static struct intel_device_info intel_g33_info = {
104         .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
105         .has_hotplug = 1,
106 };
107
108 const static struct intel_device_info intel_g45_info = {
109         .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
110         .has_pipe_cxsr = 1,
111         .has_hotplug = 1,
112 };
113
114 const static struct intel_device_info intel_gm45_info = {
115         .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
116         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
117         .has_pipe_cxsr = 1,
118         .has_hotplug = 1,
119 };
120
121 const static struct intel_device_info intel_pineview_info = {
122         .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
123         .need_gfx_hws = 1,
124         .has_hotplug = 1,
125 };
126
127 const static struct intel_device_info intel_ironlake_d_info = {
128         .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
129         .has_pipe_cxsr = 1,
130         .has_hotplug = 1,
131 };
132
133 const static struct intel_device_info intel_ironlake_m_info = {
134         .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
135         .need_gfx_hws = 1, .has_rc6 = 1,
136         .has_hotplug = 1,
137 };
138
139 const static struct intel_device_info intel_sandybridge_d_info = {
140         .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
141         .has_pipe_cxsr = 1,
142         .has_hotplug = 1,
143 };
144
145 const static struct pci_device_id pciidlist[] = {
146         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
147         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
148         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
149         INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
150         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
151         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
152         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
153         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
154         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
155         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
156         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
157         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
158         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
159         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
160         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
161         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
162         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
163         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
164         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
165         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
166         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
167         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
168         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
169         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
170         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
171         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
172         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
173         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
174         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
175         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
176         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
177         {0, 0, 0}
178 };
179
180 #if defined(CONFIG_DRM_I915_KMS)
181 MODULE_DEVICE_TABLE(pci, pciidlist);
182 #endif
183
184 static int i915_drm_freeze(struct drm_device *dev)
185 {
186         struct drm_i915_private *dev_priv = dev->dev_private;
187
188         pci_save_state(dev->pdev);
189
190         /* If KMS is active, we do the leavevt stuff here */
191         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
192                 int error = i915_gem_idle(dev);
193                 if (error) {
194                         dev_err(&dev->pdev->dev,
195                                 "GEM idle failed, resume might fail\n");
196                         return error;
197                 }
198                 drm_irq_uninstall(dev);
199         }
200
201         i915_save_state(dev);
202
203         intel_opregion_free(dev, 1);
204
205         /* Modeset on resume, not lid events */
206         dev_priv->modeset_on_lid = 0;
207
208         return 0;
209 }
210
211 static int i915_suspend(struct drm_device *dev, pm_message_t state)
212 {
213         int error;
214
215         if (!dev || !dev->dev_private) {
216                 DRM_ERROR("dev: %p\n", dev);
217                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
218                 return -ENODEV;
219         }
220
221         if (state.event == PM_EVENT_PRETHAW)
222                 return 0;
223
224         error = i915_drm_freeze(dev);
225         if (error)
226                 return error;
227
228         if (state.event == PM_EVENT_SUSPEND) {
229                 /* Shut down the device */
230                 pci_disable_device(dev->pdev);
231                 pci_set_power_state(dev->pdev, PCI_D3hot);
232         }
233
234         return 0;
235 }
236
237 static int i915_drm_thaw(struct drm_device *dev)
238 {
239         struct drm_i915_private *dev_priv = dev->dev_private;
240         int error = 0;
241
242         i915_restore_state(dev);
243
244         intel_opregion_init(dev, 1);
245
246         /* KMS EnterVT equivalent */
247         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
248                 mutex_lock(&dev->struct_mutex);
249                 dev_priv->mm.suspended = 0;
250
251                 error = i915_gem_init_ringbuffer(dev);
252                 mutex_unlock(&dev->struct_mutex);
253
254                 drm_irq_install(dev);
255
256                 /* Resume the modeset for every activated CRTC */
257                 drm_helper_resume_force_mode(dev);
258         }
259
260         dev_priv->modeset_on_lid = 0;
261
262         return error;
263 }
264
265 static int i915_resume(struct drm_device *dev)
266 {
267         if (pci_enable_device(dev->pdev))
268                 return -EIO;
269
270         pci_set_master(dev->pdev);
271
272         return i915_drm_thaw(dev);
273 }
274
275 /**
276  * i965_reset - reset chip after a hang
277  * @dev: drm device to reset
278  * @flags: reset domains
279  *
280  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
281  * reset or otherwise an error code.
282  *
283  * Procedure is fairly simple:
284  *   - reset the chip using the reset reg
285  *   - re-init context state
286  *   - re-init hardware status page
287  *   - re-init ring buffer
288  *   - re-init interrupt state
289  *   - re-init display
290  */
291 int i965_reset(struct drm_device *dev, u8 flags)
292 {
293         drm_i915_private_t *dev_priv = dev->dev_private;
294         unsigned long timeout;
295         u8 gdrst;
296         /*
297          * We really should only reset the display subsystem if we actually
298          * need to
299          */
300         bool need_display = true;
301
302         mutex_lock(&dev->struct_mutex);
303
304         /*
305          * Clear request list
306          */
307         i915_gem_retire_requests(dev);
308
309         if (need_display)
310                 i915_save_display(dev);
311
312         if (IS_I965G(dev) || IS_G4X(dev)) {
313                 /*
314                  * Set the domains we want to reset, then the reset bit (bit 0).
315                  * Clear the reset bit after a while and wait for hardware status
316                  * bit (bit 1) to be set
317                  */
318                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
319                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
320                 udelay(50);
321                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
322
323                 /* ...we don't want to loop forever though, 500ms should be plenty */
324                timeout = jiffies + msecs_to_jiffies(500);
325                 do {
326                         udelay(100);
327                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
328                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
329
330                 if (gdrst & 0x1) {
331                         WARN(true, "i915: Failed to reset chip\n");
332                         mutex_unlock(&dev->struct_mutex);
333                         return -EIO;
334                 }
335         } else {
336                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
337                 return -ENODEV;
338         }
339
340         /* Ok, now get things going again... */
341
342         /*
343          * Everything depends on having the GTT running, so we need to start
344          * there.  Fortunately we don't need to do this unless we reset the
345          * chip at a PCI level.
346          *
347          * Next we need to restore the context, but we don't use those
348          * yet either...
349          *
350          * Ring buffer needs to be re-initialized in the KMS case, or if X
351          * was running at the time of the reset (i.e. we weren't VT
352          * switched away).
353          */
354         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
355             !dev_priv->mm.suspended) {
356                 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
357                 struct drm_gem_object *obj = ring->ring_obj;
358                 struct drm_i915_gem_object *obj_priv = obj->driver_private;
359                 dev_priv->mm.suspended = 0;
360
361                 /* Stop the ring if it's running. */
362                 I915_WRITE(PRB0_CTL, 0);
363                 I915_WRITE(PRB0_TAIL, 0);
364                 I915_WRITE(PRB0_HEAD, 0);
365
366                 /* Initialize the ring. */
367                 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
368                 I915_WRITE(PRB0_CTL,
369                            ((obj->size - 4096) & RING_NR_PAGES) |
370                            RING_NO_REPORT |
371                            RING_VALID);
372                 if (!drm_core_check_feature(dev, DRIVER_MODESET))
373                         i915_kernel_lost_context(dev);
374                 else {
375                         ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
376                         ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
377                         ring->space = ring->head - (ring->tail + 8);
378                         if (ring->space < 0)
379                                 ring->space += ring->Size;
380                 }
381
382                 mutex_unlock(&dev->struct_mutex);
383                 drm_irq_uninstall(dev);
384                 drm_irq_install(dev);
385                 mutex_lock(&dev->struct_mutex);
386         }
387
388         /*
389          * Display needs restore too...
390          */
391         if (need_display)
392                 i915_restore_display(dev);
393
394         mutex_unlock(&dev->struct_mutex);
395         return 0;
396 }
397
398
399 static int __devinit
400 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
401 {
402         return drm_get_dev(pdev, ent, &driver);
403 }
404
405 static void
406 i915_pci_remove(struct pci_dev *pdev)
407 {
408         struct drm_device *dev = pci_get_drvdata(pdev);
409
410         drm_put_dev(dev);
411 }
412
413 static int i915_pm_suspend(struct device *dev)
414 {
415         struct pci_dev *pdev = to_pci_dev(dev);
416         struct drm_device *drm_dev = pci_get_drvdata(pdev);
417         int error;
418
419         if (!drm_dev || !drm_dev->dev_private) {
420                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
421                 return -ENODEV;
422         }
423
424         error = i915_drm_freeze(drm_dev);
425         if (error)
426                 return error;
427
428         pci_disable_device(pdev);
429         pci_set_power_state(pdev, PCI_D3hot);
430
431         return 0;
432 }
433
434 static int i915_pm_resume(struct device *dev)
435 {
436         struct pci_dev *pdev = to_pci_dev(dev);
437         struct drm_device *drm_dev = pci_get_drvdata(pdev);
438
439         return i915_resume(drm_dev);
440 }
441
442 static int i915_pm_freeze(struct device *dev)
443 {
444         struct pci_dev *pdev = to_pci_dev(dev);
445         struct drm_device *drm_dev = pci_get_drvdata(pdev);
446
447         if (!drm_dev || !drm_dev->dev_private) {
448                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
449                 return -ENODEV;
450         }
451
452         return i915_drm_freeze(drm_dev);
453 }
454
455 static int i915_pm_thaw(struct device *dev)
456 {
457         struct pci_dev *pdev = to_pci_dev(dev);
458         struct drm_device *drm_dev = pci_get_drvdata(pdev);
459
460         return i915_drm_thaw(drm_dev);
461 }
462
463 static int i915_pm_poweroff(struct device *dev)
464 {
465         struct pci_dev *pdev = to_pci_dev(dev);
466         struct drm_device *drm_dev = pci_get_drvdata(pdev);
467
468         return i915_drm_freeze(drm_dev);
469 }
470
471 const struct dev_pm_ops i915_pm_ops = {
472      .suspend = i915_pm_suspend,
473      .resume = i915_pm_resume,
474      .freeze = i915_pm_freeze,
475      .thaw = i915_pm_thaw,
476      .poweroff = i915_pm_poweroff,
477      .restore = i915_pm_resume,
478 };
479
480 static struct vm_operations_struct i915_gem_vm_ops = {
481         .fault = i915_gem_fault,
482         .open = drm_gem_vm_open,
483         .close = drm_gem_vm_close,
484 };
485
486 static struct drm_driver driver = {
487         /* don't use mtrr's here, the Xserver or user space app should
488          * deal with them for intel hardware.
489          */
490         .driver_features =
491             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
492             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
493         .load = i915_driver_load,
494         .unload = i915_driver_unload,
495         .open = i915_driver_open,
496         .lastclose = i915_driver_lastclose,
497         .preclose = i915_driver_preclose,
498         .postclose = i915_driver_postclose,
499
500         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
501         .suspend = i915_suspend,
502         .resume = i915_resume,
503
504         .device_is_agp = i915_driver_device_is_agp,
505         .enable_vblank = i915_enable_vblank,
506         .disable_vblank = i915_disable_vblank,
507         .irq_preinstall = i915_driver_irq_preinstall,
508         .irq_postinstall = i915_driver_irq_postinstall,
509         .irq_uninstall = i915_driver_irq_uninstall,
510         .irq_handler = i915_driver_irq_handler,
511         .reclaim_buffers = drm_core_reclaim_buffers,
512         .get_map_ofs = drm_core_get_map_ofs,
513         .get_reg_ofs = drm_core_get_reg_ofs,
514         .master_create = i915_master_create,
515         .master_destroy = i915_master_destroy,
516 #if defined(CONFIG_DEBUG_FS)
517         .debugfs_init = i915_debugfs_init,
518         .debugfs_cleanup = i915_debugfs_cleanup,
519 #endif
520         .gem_init_object = i915_gem_init_object,
521         .gem_free_object = i915_gem_free_object,
522         .gem_vm_ops = &i915_gem_vm_ops,
523         .ioctls = i915_ioctls,
524         .fops = {
525                  .owner = THIS_MODULE,
526                  .open = drm_open,
527                  .release = drm_release,
528                  .unlocked_ioctl = drm_ioctl,
529                  .mmap = drm_gem_mmap,
530                  .poll = drm_poll,
531                  .fasync = drm_fasync,
532                  .read = drm_read,
533 #ifdef CONFIG_COMPAT
534                  .compat_ioctl = i915_compat_ioctl,
535 #endif
536         },
537
538         .pci_driver = {
539                  .name = DRIVER_NAME,
540                  .id_table = pciidlist,
541                  .probe = i915_pci_probe,
542                  .remove = i915_pci_remove,
543                  .driver.pm = &i915_pm_ops,
544         },
545
546         .name = DRIVER_NAME,
547         .desc = DRIVER_DESC,
548         .date = DRIVER_DATE,
549         .major = DRIVER_MAJOR,
550         .minor = DRIVER_MINOR,
551         .patchlevel = DRIVER_PATCHLEVEL,
552 };
553
554 static int __init i915_init(void)
555 {
556         driver.num_ioctls = i915_max_ioctl;
557
558         i915_gem_shrinker_init();
559
560         /*
561          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
562          * explicitly disabled with the module pararmeter.
563          *
564          * Otherwise, just follow the parameter (defaulting to off).
565          *
566          * Allow optional vga_text_mode_force boot option to override
567          * the default behavior.
568          */
569 #if defined(CONFIG_DRM_I915_KMS)
570         if (i915_modeset != 0)
571                 driver.driver_features |= DRIVER_MODESET;
572 #endif
573         if (i915_modeset == 1)
574                 driver.driver_features |= DRIVER_MODESET;
575
576 #ifdef CONFIG_VGA_CONSOLE
577         if (vgacon_text_force() && i915_modeset == -1)
578                 driver.driver_features &= ~DRIVER_MODESET;
579 #endif
580
581         if (!(driver.driver_features & DRIVER_MODESET)) {
582                 driver.suspend = i915_suspend;
583                 driver.resume = i915_resume;
584         }
585
586         return drm_init(&driver);
587 }
588
589 static void __exit i915_exit(void)
590 {
591         i915_gem_shrinker_exit();
592         drm_exit(&driver);
593 }
594
595 module_init(i915_init);
596 module_exit(i915_exit);
597
598 MODULE_AUTHOR(DRIVER_AUTHOR);
599 MODULE_DESCRIPTION(DRIVER_DESC);
600 MODULE_LICENSE("GPL and additional rights");