2 * The list_sort function is (presumably) licensed under the GPL (see the
3 * top level "COPYING" file for details).
5 * The remainder of this file is:
7 * Copyright © 1997-2003 by The XFree86 Project, Inc.
8 * Copyright © 2007 Dave Airlie
9 * Copyright © 2007-2008 Intel Corporation
10 * Jesse Barnes <jesse.barnes@intel.com>
11 * Copyright 2005-2006 Luc Verhaegen
12 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
21 * The above copyright notice and this permission notice shall be included in
22 * all copies or substantial portions of the Software.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
28 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
29 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
30 * OTHER DEALINGS IN THE SOFTWARE.
32 * Except as contained in this notice, the name of the copyright holder(s)
33 * and author(s) shall not be used in advertising or otherwise to promote
34 * the sale, use or other dealings in this Software without prior written
35 * authorization from the copyright holder(s) and author(s).
38 #include <linux/list.h>
44 * drm_mode_debug_printmodeline - debug print a mode
46 * @mode: mode to print
51 * Describe @mode using DRM_DEBUG.
53 void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
55 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
57 mode->base.id, mode->name, mode->vrefresh, mode->clock,
58 mode->hdisplay, mode->hsync_start,
59 mode->hsync_end, mode->htotal,
60 mode->vdisplay, mode->vsync_start,
61 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
63 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
66 * drm_cvt_mode -create a modeline based on CVT algorithm
68 * @hdisplay: hdisplay size
69 * @vdisplay: vdisplay size
70 * @vrefresh : vrefresh rate
71 * @reduced : Whether the GTF calculation is simplified
72 * @interlaced:Whether the interlace is supported
77 * return the modeline based on CVT algorithm
79 * This function is called to generate the modeline based on CVT algorithm
80 * according to the hdisplay, vdisplay, vrefresh.
81 * It is based from the VESA(TM) Coordinated Video Timing Generator by
82 * Graham Loveridge April 9, 2003 available at
83 * http://www.vesa.org/public/CVT/CVTd6r1.xls
85 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
86 * What I have done is to translate it by using integer calculation.
88 #define HV_FACTOR 1000
89 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
90 int vdisplay, int vrefresh,
91 bool reduced, bool interlaced)
93 /* 1) top/bottom margin size (% of height) - default: 1.8, */
94 #define CVT_MARGIN_PERCENTAGE 18
95 /* 2) character cell horizontal granularity (pixels) - default 8 */
96 #define CVT_H_GRANULARITY 8
97 /* 3) Minimum vertical porch (lines) - default 3 */
98 #define CVT_MIN_V_PORCH 3
99 /* 4) Minimum number of vertical back porch lines - default 6 */
100 #define CVT_MIN_V_BPORCH 6
101 /* Pixel Clock step (kHz) */
102 #define CVT_CLOCK_STEP 250
103 struct drm_display_mode *drm_mode;
104 bool margins = false;
105 unsigned int vfieldrate, hperiod;
106 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
109 /* allocate the drm_display_mode structure. If failure, we will
112 drm_mode = drm_mode_create(dev);
116 /* the CVT default refresh rate is 60Hz */
120 /* the required field fresh rate */
122 vfieldrate = vrefresh * 2;
124 vfieldrate = vrefresh;
126 /* horizontal pixels */
127 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
129 /* determine the left&right borders */
132 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
133 hmargin -= hmargin % CVT_H_GRANULARITY;
135 /* find the total active pixels */
136 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
138 /* find the number of lines per field */
140 vdisplay_rnd = vdisplay / 2;
142 vdisplay_rnd = vdisplay;
144 /* find the top & bottom borders */
147 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
149 drm_mode->vdisplay = vdisplay_rnd + 2 * vmargin;
157 /* Determine VSync Width from aspect ratio */
158 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
160 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
162 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
164 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
166 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
172 /* simplify the GTF calculation */
173 /* 4) Minimum time of vertical sync + back porch interval (µs)
177 #define CVT_MIN_VSYNC_BP 550
178 /* 3) Nominal HSync width (% of line period) - default 8 */
179 #define CVT_HSYNC_PERCENTAGE 8
180 unsigned int hblank_percentage;
181 int vsyncandback_porch, vback_porch, hblank;
183 /* estimated the horizontal period */
184 tmp1 = HV_FACTOR * 1000000 -
185 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
186 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
188 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
190 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
191 /* 9. Find number of lines in sync + backporch */
192 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
193 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
195 vsyncandback_porch = tmp1;
196 /* 10. Find number of lines in back porch */
197 vback_porch = vsyncandback_porch - vsync;
198 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
199 vsyncandback_porch + CVT_MIN_V_PORCH;
200 /* 5) Definition of Horizontal blanking time limitation */
201 /* Gradient (%/kHz) - default 600 */
202 #define CVT_M_FACTOR 600
203 /* Offset (%) - default 40 */
204 #define CVT_C_FACTOR 40
205 /* Blanking time scaling factor - default 128 */
206 #define CVT_K_FACTOR 128
207 /* Scaling factor weighting - default 20 */
208 #define CVT_J_FACTOR 20
209 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
210 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
212 /* 12. Find ideal blanking duty cycle from formula */
213 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
215 /* 13. Blanking time */
216 if (hblank_percentage < 20 * HV_FACTOR)
217 hblank_percentage = 20 * HV_FACTOR;
218 hblank = drm_mode->hdisplay * hblank_percentage /
219 (100 * HV_FACTOR - hblank_percentage);
220 hblank -= hblank % (2 * CVT_H_GRANULARITY);
221 /* 14. find the total pixes per line */
222 drm_mode->htotal = drm_mode->hdisplay + hblank;
223 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
224 drm_mode->hsync_start = drm_mode->hsync_end -
225 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
226 drm_mode->hsync_start += CVT_H_GRANULARITY -
227 drm_mode->hsync_start % CVT_H_GRANULARITY;
228 /* fill the Vsync values */
229 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
230 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
232 /* Reduced blanking */
233 /* Minimum vertical blanking interval time (µs)- default 460 */
234 #define CVT_RB_MIN_VBLANK 460
235 /* Fixed number of clocks for horizontal sync */
236 #define CVT_RB_H_SYNC 32
237 /* Fixed number of clocks for horizontal blanking */
238 #define CVT_RB_H_BLANK 160
239 /* Fixed number of lines for vertical front porch - default 3*/
240 #define CVT_RB_VFPORCH 3
243 /* 8. Estimate Horizontal period. */
244 tmp1 = HV_FACTOR * 1000000 -
245 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
246 tmp2 = vdisplay_rnd + 2 * vmargin;
247 hperiod = tmp1 / (tmp2 * vfieldrate);
248 /* 9. Find number of lines in vertical blanking */
249 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
250 /* 10. Check if vertical blanking is sufficient */
251 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
252 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
253 /* 11. Find total number of lines in vertical field */
254 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
255 /* 12. Find total number of pixels in a line */
256 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
257 /* Fill in HSync values */
258 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
259 drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC;
261 /* 15/13. Find pixel clock frequency (kHz for xf86) */
262 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
263 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
264 /* 18/16. Find actual vertical frame frequency */
265 /* ignore - just set the mode flag for interlaced */
267 drm_mode->vtotal *= 2;
268 /* Fill the mode line name */
269 drm_mode_set_name(drm_mode);
271 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
272 DRM_MODE_FLAG_NVSYNC);
274 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
275 DRM_MODE_FLAG_NHSYNC);
277 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
281 EXPORT_SYMBOL(drm_cvt_mode);
284 * drm_gtf_mode - create the modeline based on GTF algorithm
287 * @hdisplay :hdisplay size
288 * @vdisplay :vdisplay size
289 * @vrefresh :vrefresh rate.
290 * @interlaced :whether the interlace is supported
291 * @margins :whether the margin is supported
296 * return the modeline based on GTF algorithm
298 * This function is to create the modeline based on the GTF algorithm.
299 * Generalized Timing Formula is derived from:
300 * GTF Spreadsheet by Andy Morrish (1/5/97)
301 * available at http://www.vesa.org
303 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
304 * What I have done is to translate it by using integer calculation.
305 * I also refer to the function of fb_get_mode in the file of
306 * drivers/video/fbmon.c
308 struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, int hdisplay,
309 int vdisplay, int vrefresh,
310 bool interlaced, int margins)
312 /* 1) top/bottom margin size (% of height) - default: 1.8, */
313 #define GTF_MARGIN_PERCENTAGE 18
314 /* 2) character cell horizontal granularity (pixels) - default 8 */
315 #define GTF_CELL_GRAN 8
316 /* 3) Minimum vertical porch (lines) - default 3 */
317 #define GTF_MIN_V_PORCH 1
318 /* width of vsync in lines */
320 /* width of hsync as % of total line */
321 #define H_SYNC_PERCENT 8
322 /* min time of vsync + back porch (microsec) */
323 #define MIN_VSYNC_PLUS_BP 550
324 /* blanking formula gradient */
326 /* blanking formula offset */
328 /* blanking formula scaling factor */
330 /* blanking formula scaling factor */
332 /* C' and M' are part of the Blanking Duty Cycle computation */
333 #define GTF_C_PRIME (((GTF_C - GTF_J) * GTF_K / 256) + GTF_J)
334 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
335 struct drm_display_mode *drm_mode;
336 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
337 int top_margin, bottom_margin;
339 unsigned int hfreq_est;
340 int vsync_plus_bp, vback_porch;
341 unsigned int vtotal_lines, vfieldrate_est, hperiod;
342 unsigned int vfield_rate, vframe_rate;
343 int left_margin, right_margin;
344 unsigned int total_active_pixels, ideal_duty_cycle;
345 unsigned int hblank, total_pixels, pixel_freq;
346 int hsync, hfront_porch, vodd_front_porch_lines;
347 unsigned int tmp1, tmp2;
349 drm_mode = drm_mode_create(dev);
353 /* 1. In order to give correct results, the number of horizontal
354 * pixels requested is first processed to ensure that it is divisible
355 * by the character size, by rounding it to the nearest character
358 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
359 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
361 /* 2. If interlace is requested, the number of vertical lines assumed
362 * by the calculation must be halved, as the computation calculates
363 * the number of vertical lines per field.
366 vdisplay_rnd = vdisplay / 2;
368 vdisplay_rnd = vdisplay;
370 /* 3. Find the frame rate required: */
372 vfieldrate_rqd = vrefresh * 2;
374 vfieldrate_rqd = vrefresh;
376 /* 4. Find number of lines in Top margin: */
379 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
381 /* 5. Find number of lines in bottom margin: */
382 bottom_margin = top_margin;
384 /* 6. If interlace is required, then set variable interlace: */
390 /* 7. Estimate the Horizontal frequency */
392 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
393 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
395 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
398 /* 8. Find the number of lines in V sync + back porch */
399 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
400 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
401 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
402 /* 9. Find the number of lines in V back porch alone: */
403 vback_porch = vsync_plus_bp - V_SYNC_RQD;
404 /* 10. Find the total number of lines in Vertical field period: */
405 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
406 vsync_plus_bp + GTF_MIN_V_PORCH;
407 /* 11. Estimate the Vertical field frequency: */
408 vfieldrate_est = hfreq_est / vtotal_lines;
409 /* 12. Find the actual horizontal period: */
410 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
412 /* 13. Find the actual Vertical field frequency: */
413 vfield_rate = hfreq_est / vtotal_lines;
414 /* 14. Find the Vertical frame frequency: */
416 vframe_rate = vfield_rate / 2;
418 vframe_rate = vfield_rate;
419 /* 15. Find number of pixels in left margin: */
421 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
426 /* 16.Find number of pixels in right margin: */
427 right_margin = left_margin;
428 /* 17.Find total number of active pixels in image and left and right */
429 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
430 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
431 ideal_duty_cycle = GTF_C_PRIME * 1000 -
432 (GTF_M_PRIME * 1000000 / hfreq_est);
433 /* 19.Find the number of pixels in the blanking time to the nearest
434 * double character cell: */
435 hblank = total_active_pixels * ideal_duty_cycle /
436 (100000 - ideal_duty_cycle);
437 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
438 hblank = hblank * 2 * GTF_CELL_GRAN;
439 /* 20.Find total number of pixels: */
440 total_pixels = total_active_pixels + hblank;
441 /* 21.Find pixel clock frequency: */
442 pixel_freq = total_pixels * hfreq_est / 1000;
443 /* Stage 1 computations are now complete; I should really pass
444 * the results to another function and do the Stage 2 computations,
445 * but I only need a few more values so I'll just append the
446 * computations here for now */
447 /* 17. Find the number of pixels in the horizontal sync period: */
448 hsync = H_SYNC_PERCENT * total_pixels / 100;
449 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
450 hsync = hsync * GTF_CELL_GRAN;
451 /* 18. Find the number of pixels in horizontal front porch period */
452 hfront_porch = hblank / 2 - hsync;
453 /* 36. Find the number of lines in the odd front porch period: */
454 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
456 /* finally, pack the results in the mode struct */
457 drm_mode->hdisplay = hdisplay_rnd;
458 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
459 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
460 drm_mode->htotal = total_pixels;
461 drm_mode->vdisplay = vdisplay_rnd;
462 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
463 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
464 drm_mode->vtotal = vtotal_lines;
466 drm_mode->clock = pixel_freq;
468 drm_mode_set_name(drm_mode);
469 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
472 drm_mode->vtotal *= 2;
473 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
478 EXPORT_SYMBOL(drm_gtf_mode);
480 * drm_mode_set_name - set the name on a mode
481 * @mode: name will be set in this mode
486 * Set the name of @mode to a standard format.
488 void drm_mode_set_name(struct drm_display_mode *mode)
490 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d", mode->hdisplay,
493 EXPORT_SYMBOL(drm_mode_set_name);
496 * drm_mode_list_concat - move modes from one list to another
501 * Caller must ensure both lists are locked.
503 * Move all the modes from @head to @new.
505 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
508 struct list_head *entry, *tmp;
510 list_for_each_safe(entry, tmp, head) {
511 list_move_tail(entry, new);
514 EXPORT_SYMBOL(drm_mode_list_concat);
517 * drm_mode_width - get the width of a mode
523 * Return @mode's width (hdisplay) value.
525 * FIXME: is this needed?
530 int drm_mode_width(struct drm_display_mode *mode)
532 return mode->hdisplay;
535 EXPORT_SYMBOL(drm_mode_width);
538 * drm_mode_height - get the height of a mode
544 * Return @mode's height (vdisplay) value.
546 * FIXME: is this needed?
551 int drm_mode_height(struct drm_display_mode *mode)
553 return mode->vdisplay;
555 EXPORT_SYMBOL(drm_mode_height);
558 * drm_mode_vrefresh - get the vrefresh of a mode
564 * Return @mode's vrefresh rate or calculate it if necessary.
566 * FIXME: why is this needed? shouldn't vrefresh be set already?
569 * Vertical refresh rate of @mode x 1000. For precision reasons.
571 int drm_mode_vrefresh(struct drm_display_mode *mode)
574 unsigned int calc_val;
576 if (mode->vrefresh > 0)
577 refresh = mode->vrefresh;
578 else if (mode->htotal > 0 && mode->vtotal > 0) {
579 /* work out vrefresh the value will be x1000 */
580 calc_val = (mode->clock * 1000);
582 calc_val /= mode->htotal;
584 calc_val /= mode->vtotal;
587 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
589 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
592 refresh /= mode->vscan;
596 EXPORT_SYMBOL(drm_mode_vrefresh);
599 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
601 * @adjust_flags: unused? (FIXME)
606 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
608 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
610 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
613 p->crtc_hdisplay = p->hdisplay;
614 p->crtc_hsync_start = p->hsync_start;
615 p->crtc_hsync_end = p->hsync_end;
616 p->crtc_htotal = p->htotal;
617 p->crtc_hskew = p->hskew;
618 p->crtc_vdisplay = p->vdisplay;
619 p->crtc_vsync_start = p->vsync_start;
620 p->crtc_vsync_end = p->vsync_end;
621 p->crtc_vtotal = p->vtotal;
623 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
624 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
625 p->crtc_vdisplay /= 2;
626 p->crtc_vsync_start /= 2;
627 p->crtc_vsync_end /= 2;
634 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
635 p->crtc_vdisplay *= 2;
636 p->crtc_vsync_start *= 2;
637 p->crtc_vsync_end *= 2;
642 p->crtc_vdisplay *= p->vscan;
643 p->crtc_vsync_start *= p->vscan;
644 p->crtc_vsync_end *= p->vscan;
645 p->crtc_vtotal *= p->vscan;
648 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
649 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
650 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
651 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
653 p->crtc_hadjusted = false;
654 p->crtc_vadjusted = false;
656 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
660 * drm_mode_duplicate - allocate and duplicate an existing mode
661 * @m: mode to duplicate
666 * Just allocate a new mode, copy the existing mode into it, and return
667 * a pointer to it. Used to create new instances of established modes.
669 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
670 struct drm_display_mode *mode)
672 struct drm_display_mode *nmode;
675 nmode = drm_mode_create(dev);
679 new_id = nmode->base.id;
681 nmode->base.id = new_id;
682 INIT_LIST_HEAD(&nmode->head);
685 EXPORT_SYMBOL(drm_mode_duplicate);
688 * drm_mode_equal - test modes for equality
690 * @mode2: second mode
695 * Check to see if @mode1 and @mode2 are equivalent.
698 * True if the modes are equal, false otherwise.
700 bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
702 /* do clock check convert to PICOS so fb modes get matched
704 if (mode1->clock && mode2->clock) {
705 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
707 } else if (mode1->clock != mode2->clock)
710 if (mode1->hdisplay == mode2->hdisplay &&
711 mode1->hsync_start == mode2->hsync_start &&
712 mode1->hsync_end == mode2->hsync_end &&
713 mode1->htotal == mode2->htotal &&
714 mode1->hskew == mode2->hskew &&
715 mode1->vdisplay == mode2->vdisplay &&
716 mode1->vsync_start == mode2->vsync_start &&
717 mode1->vsync_end == mode2->vsync_end &&
718 mode1->vtotal == mode2->vtotal &&
719 mode1->vscan == mode2->vscan &&
720 mode1->flags == mode2->flags)
725 EXPORT_SYMBOL(drm_mode_equal);
728 * drm_mode_validate_size - make sure modes adhere to size constraints
730 * @mode_list: list of modes to check
731 * @maxX: maximum width
732 * @maxY: maximum height
733 * @maxPitch: max pitch
736 * Caller must hold a lock protecting @mode_list.
738 * The DRM device (@dev) has size and pitch limits. Here we validate the
739 * modes we probed for @dev against those limits and set their status as
742 void drm_mode_validate_size(struct drm_device *dev,
743 struct list_head *mode_list,
744 int maxX, int maxY, int maxPitch)
746 struct drm_display_mode *mode;
748 list_for_each_entry(mode, mode_list, head) {
749 if (maxPitch > 0 && mode->hdisplay > maxPitch)
750 mode->status = MODE_BAD_WIDTH;
752 if (maxX > 0 && mode->hdisplay > maxX)
753 mode->status = MODE_VIRTUAL_X;
755 if (maxY > 0 && mode->vdisplay > maxY)
756 mode->status = MODE_VIRTUAL_Y;
759 EXPORT_SYMBOL(drm_mode_validate_size);
762 * drm_mode_validate_clocks - validate modes against clock limits
764 * @mode_list: list of modes to check
765 * @min: minimum clock rate array
766 * @max: maximum clock rate array
767 * @n_ranges: number of clock ranges (size of arrays)
770 * Caller must hold a lock protecting @mode_list.
772 * Some code may need to check a mode list against the clock limits of the
773 * device in question. This function walks the mode list, testing to make
774 * sure each mode falls within a given range (defined by @min and @max
775 * arrays) and sets @mode->status as needed.
777 void drm_mode_validate_clocks(struct drm_device *dev,
778 struct list_head *mode_list,
779 int *min, int *max, int n_ranges)
781 struct drm_display_mode *mode;
784 list_for_each_entry(mode, mode_list, head) {
786 for (i = 0; i < n_ranges; i++) {
787 if (mode->clock >= min[i] && mode->clock <= max[i]) {
793 mode->status = MODE_CLOCK_RANGE;
796 EXPORT_SYMBOL(drm_mode_validate_clocks);
799 * drm_mode_prune_invalid - remove invalid modes from mode list
801 * @mode_list: list of modes to check
802 * @verbose: be verbose about it
805 * Caller must hold a lock protecting @mode_list.
807 * Once mode list generation is complete, a caller can use this routine to
808 * remove invalid modes from a mode list. If any of the modes have a
809 * status other than %MODE_OK, they are removed from @mode_list and freed.
811 void drm_mode_prune_invalid(struct drm_device *dev,
812 struct list_head *mode_list, bool verbose)
814 struct drm_display_mode *mode, *t;
816 list_for_each_entry_safe(mode, t, mode_list, head) {
817 if (mode->status != MODE_OK) {
818 list_del(&mode->head);
820 drm_mode_debug_printmodeline(mode);
821 DRM_DEBUG_KMS("Not using %s mode %d\n",
822 mode->name, mode->status);
824 drm_mode_destroy(dev, mode);
828 EXPORT_SYMBOL(drm_mode_prune_invalid);
831 * drm_mode_compare - compare modes for favorability
832 * @lh_a: list_head for first mode
833 * @lh_b: list_head for second mode
838 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
842 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
843 * positive if @lh_b is better than @lh_a.
845 static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b)
847 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
848 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
851 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
852 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
855 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
858 diff = b->clock - a->clock;
862 /* FIXME: what we don't have a list sort function? */
863 /* list sort from Mark J Roberts (mjr@znex.org) */
864 void list_sort(struct list_head *head,
865 int (*cmp)(struct list_head *a, struct list_head *b))
867 struct list_head *p, *q, *e, *list, *tail, *oldhead;
868 int insize, nmerges, psize, qsize, i;
882 for (i = 0; i < insize; i++) {
884 q = q->next == oldhead ? NULL : q->next;
890 while (psize > 0 || (qsize > 0 && q)) {
897 } else if (!qsize || !q) {
903 } else if (cmp(p, q) <= 0) {
936 head->prev = list->prev;
937 list->prev->next = head;
942 * drm_mode_sort - sort mode list
943 * @mode_list: list to sort
946 * Caller must hold a lock protecting @mode_list.
948 * Sort @mode_list by favorability, putting good modes first.
950 void drm_mode_sort(struct list_head *mode_list)
952 list_sort(mode_list, drm_mode_compare);
954 EXPORT_SYMBOL(drm_mode_sort);
957 * drm_mode_connector_list_update - update the mode list for the connector
958 * @connector: the connector to update
961 * Caller must hold a lock protecting @mode_list.
963 * This moves the modes from the @connector probed_modes list
964 * to the actual mode list. It compares the probed mode against the current
965 * list and only adds different modes. All modes unverified after this point
966 * will be removed by the prune invalid modes.
968 void drm_mode_connector_list_update(struct drm_connector *connector)
970 struct drm_display_mode *mode;
971 struct drm_display_mode *pmode, *pt;
974 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
977 /* go through current modes checking for the new probed mode */
978 list_for_each_entry(mode, &connector->modes, head) {
979 if (drm_mode_equal(pmode, mode)) {
981 /* if equal delete the probed mode */
982 mode->status = pmode->status;
983 list_del(&pmode->head);
984 drm_mode_destroy(connector->dev, pmode);
990 list_move_tail(&pmode->head, &connector->modes);
994 EXPORT_SYMBOL(drm_mode_connector_list_update);