2 * Renesas SuperH DMA Engine support
4 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
5 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
7 * This is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
16 #include <linux/dmaengine.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
20 #include <asm/dmaengine.h>
22 #define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
25 u32 sar; /* SAR / source address */
26 u32 dar; /* DAR / destination address */
27 u32 tcr; /* TCR / transfer count */
31 struct sh_dmae_regs hw;
32 struct list_head node;
33 struct dma_async_tx_descriptor async_tx;
34 enum dma_data_direction direction;
43 dma_cookie_t completed_cookie; /* The maximum cookie completed */
44 spinlock_t desc_lock; /* Descriptor operation lock */
45 struct list_head ld_queue; /* Link descriptors queue */
46 struct list_head ld_free; /* Link descriptors free */
47 struct dma_chan common; /* DMA common channel */
48 struct device *dev; /* Channel device */
49 struct tasklet_struct tasklet; /* Tasklet */
50 int descs_allocated; /* desc count */
51 int xmit_shift; /* log_2(bytes_per_xfer) */
53 int id; /* Raw id of this channel */
55 char dev_id[16]; /* unique name per DMAC of channel */
58 struct sh_dmae_device {
59 struct dma_device common;
60 struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS];
61 struct sh_dmae_pdata *pdata;
62 u32 __iomem *chan_reg;
66 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
67 #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
68 #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
70 #endif /* __DMA_SHDMA_H */