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   1 /*
   2  * DMA Engine test module
   3  *
   4  * Copyright (C) 2007 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/delay.h>
  11 #include <linux/dmaengine.h>
  12 #include <linux/init.h>
  13 #include <linux/kthread.h>
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/random.h>
  17 #include <linux/wait.h>
  18
  19 static unsigned int test_buf_size = 16384;
  20 module_param(test_buf_size, uint, S_IRUGO);
  21 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  22
  23 static char test_channel[20];
  24 module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
  25 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  26
  27 static char test_device[20];
  28 module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
  29 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  30
  31 static unsigned int threads_per_chan = 1;
  32 module_param(threads_per_chan, uint, S_IRUGO);
  33 MODULE_PARM_DESC(threads_per_chan,
  34                 "Number of threads to start per channel (default: 1)");
  35
  36 static unsigned int max_channels;
  37 module_param(max_channels, uint, S_IRUGO);
  38 MODULE_PARM_DESC(max_channels,
  39                 "Maximum number of channels to use (default: all)");
  40
  41 static unsigned int xor_sources = 3;
  42 module_param(xor_sources, uint, S_IRUGO);
  43 MODULE_PARM_DESC(xor_sources,
  44                 "Number of xor source buffers (default: 3)");
  45
  46 static unsigned int pq_sources = 3;
  47 module_param(pq_sources, uint, S_IRUGO);
  48 MODULE_PARM_DESC(pq_sources,
  49                 "Number of p+q source buffers (default: 3)");
  50
  51 /*
  52  * Initialization patterns. All bytes in the source buffer has bit 7
  53  * set, all bytes in the destination buffer has bit 7 cleared.
  54  *
  55  * Bit 6 is set for all bytes which are to be copied by the DMA
  56  * engine. Bit 5 is set for all bytes which are to be overwritten by
  57  * the DMA engine.
  58  *
  59  * The remaining bits are the inverse of a counter which increments by
  60  * one for each byte address.
  61  */
  62 #define PATTERN_SRC             0x80
  63 #define PATTERN_DST             0x00
  64 #define PATTERN_COPY            0x40
  65 #define PATTERN_OVERWRITE       0x20
  66 #define PATTERN_COUNT_MASK      0x1f
  67
  68 struct dmatest_thread {
  69         struct list_head        node;
  70         struct task_struct      *task;
  71         struct dma_chan         *chan;
  72         u8                      **srcs;
  73         u8                      **dsts;
  74         enum dma_transaction_type type;
  75 };
  76
  77 struct dmatest_chan {
  78         struct list_head        node;
  79         struct dma_chan         *chan;
  80         struct list_head        threads;
  81 };
  82
  83 /*
  84  * These are protected by dma_list_mutex since they're only used by
  85  * the DMA filter function callback
  86  */
  87 static LIST_HEAD(dmatest_channels);
  88 static unsigned int nr_channels;
  89
  90 static bool dmatest_match_channel(struct dma_chan *chan)
  91 {
  92         if (test_channel[0] == '\0')
  93                 return true;
  94         return strcmp(dma_chan_name(chan), test_channel) == 0;
  95 }
  96
  97 static bool dmatest_match_device(struct dma_device *device)
  98 {
  99         if (test_device[0] == '\0')
 100                 return true;
 101         return strcmp(dev_name(device->dev), test_device) == 0;
 102 }
 103
 104 static unsigned long dmatest_random(void)
 105 {
 106         unsigned long buf;
 107
 108         get_random_bytes(&buf, sizeof(buf));
 109         return buf;
 110 }
 111
 112 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
 113 {
 114         unsigned int i;
 115         u8 *buf;
 116
 117         for (; (buf = *bufs); bufs++) {
 118                 for (i = 0; i < start; i++)
 119                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 120                 for ( ; i < start + len; i++)
 121                         buf[i] = PATTERN_SRC | PATTERN_COPY
 122                                 | (~i & PATTERN_COUNT_MASK);;
 123                 for ( ; i < test_buf_size; i++)
 124                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 125                 buf++;
 126         }
 127 }
 128
 129 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
 130 {
 131         unsigned int i;
 132         u8 *buf;
 133
 134         for (; (buf = *bufs); bufs++) {
 135                 for (i = 0; i < start; i++)
 136                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 137                 for ( ; i < start + len; i++)
 138                         buf[i] = PATTERN_DST | PATTERN_OVERWRITE
 139                                 | (~i & PATTERN_COUNT_MASK);
 140                 for ( ; i < test_buf_size; i++)
 141                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 142         }
 143 }
 144
 145 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
 146                 unsigned int counter, bool is_srcbuf)
 147 {
 148         u8              diff = actual ^ pattern;
 149         u8              expected = pattern | (~counter & PATTERN_COUNT_MASK);
 150         const char      *thread_name = current->comm;
 151
 152         if (is_srcbuf)
 153                 pr_warning("%s: srcbuf[0x%x] overwritten!"
 154                                 " Expected %02x, got %02x\n",
 155                                 thread_name, index, expected, actual);
 156         else if ((pattern & PATTERN_COPY)
 157                         && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
 158                 pr_warning("%s: dstbuf[0x%x] not copied!"
 159                                 " Expected %02x, got %02x\n",
 160                                 thread_name, index, expected, actual);
 161         else if (diff & PATTERN_SRC)
 162                 pr_warning("%s: dstbuf[0x%x] was copied!"
 163                                 " Expected %02x, got %02x\n",
 164                                 thread_name, index, expected, actual);
 165         else
 166                 pr_warning("%s: dstbuf[0x%x] mismatch!"
 167                                 " Expected %02x, got %02x\n",
 168                                 thread_name, index, expected, actual);
 169 }
 170
 171 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
 172                 unsigned int end, unsigned int counter, u8 pattern,
 173                 bool is_srcbuf)
 174 {
 175         unsigned int i;
 176         unsigned int error_count = 0;
 177         u8 actual;
 178         u8 expected;
 179         u8 *buf;
 180         unsigned int counter_orig = counter;
 181
 182         for (; (buf = *bufs); bufs++) {
 183                 counter = counter_orig;
 184                 for (i = start; i < end; i++) {
 185                         actual = buf[i];
 186                         expected = pattern | (~counter & PATTERN_COUNT_MASK);
 187                         if (actual != expected) {
 188                                 if (error_count < 32)
 189                                         dmatest_mismatch(actual, pattern, i,
 190                                                          counter, is_srcbuf);
 191                                 error_count++;
 192                         }
 193                         counter++;
 194                 }
 195         }
 196
 197         if (error_count > 32)
 198                 pr_warning("%s: %u errors suppressed\n",
 199                         current->comm, error_count - 32);
 200
 201         return error_count;
 202 }
 203
 204 static void dmatest_callback(void *completion)
 205 {
 206         complete(completion);
 207 }
 208
 209 /*
 210  * This function repeatedly tests DMA transfers of various lengths and
 211  * offsets for a given operation type until it is told to exit by
 212  * kthread_stop(). There may be multiple threads running this function
 213  * in parallel for a single channel, and there may be multiple channels
 214  * being tested in parallel.
 215  *
 216  * Before each test, the source and destination buffer is initialized
 217  * with a known pattern. This pattern is different depending on
 218  * whether it's in an area which is supposed to be copied or
 219  * overwritten, and different in the source and destination buffers.
 220  * So if the DMA engine doesn't copy exactly what we tell it to copy,
 221  * we'll notice.
 222  */
 223 static int dmatest_func(void *data)
 224 {
 225         struct dmatest_thread   *thread = data;
 226         struct dma_chan         *chan;
 227         const char              *thread_name;
 228         unsigned int            src_off, dst_off, len;
 229         unsigned int            error_count;
 230         unsigned int            failed_tests = 0;
 231         unsigned int            total_tests = 0;
 232         dma_cookie_t            cookie;
 233         enum dma_status         status;
 234         enum dma_ctrl_flags     flags;
 235         u8                      pq_coefs[pq_sources];
 236         int                     ret;
 237         int                     src_cnt;
 238         int                     dst_cnt;
 239         int                     i;
 240
 241         thread_name = current->comm;
 242
 243         ret = -ENOMEM;
 244
 245         smp_rmb();
 246         chan = thread->chan;
 247         if (thread->type == DMA_MEMCPY)
 248                 src_cnt = dst_cnt = 1;
 249         else if (thread->type == DMA_XOR) {
 250                 src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
 251                 dst_cnt = 1;
 252         } else if (thread->type == DMA_PQ) {
 253                 src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
 254                 dst_cnt = 2;
 255                 for (i = 0; i < pq_sources; i++)
 256                         pq_coefs[i] = 1;
 257         } else
 258                 goto err_srcs;
 259
 260         thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
 261         if (!thread->srcs)
 262                 goto err_srcs;
 263         for (i = 0; i < src_cnt; i++) {
 264                 thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
 265                 if (!thread->srcs[i])
 266                         goto err_srcbuf;
 267         }
 268         thread->srcs[i] = NULL;
 269
 270         thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
 271         if (!thread->dsts)
 272                 goto err_dsts;
 273         for (i = 0; i < dst_cnt; i++) {
 274                 thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
 275                 if (!thread->dsts[i])
 276                         goto err_dstbuf;
 277         }
 278         thread->dsts[i] = NULL;
 279
 280         set_user_nice(current, 10);
 281
 282         flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
 283
 284         while (!kthread_should_stop()) {
 285                 struct dma_device *dev = chan->device;
 286                 struct dma_async_tx_descriptor *tx = NULL;
 287                 dma_addr_t dma_srcs[src_cnt];
 288                 dma_addr_t dma_dsts[dst_cnt];
 289                 struct completion cmp;
 290                 unsigned long tmo = msecs_to_jiffies(3000);
 291
 292                 total_tests++;
 293
 294                 len = dmatest_random() % test_buf_size + 1;
 295                 src_off = dmatest_random() % (test_buf_size - len + 1);
 296                 dst_off = dmatest_random() % (test_buf_size - len + 1);
 297
 298                 dmatest_init_srcs(thread->srcs, src_off, len);
 299                 dmatest_init_dsts(thread->dsts, dst_off, len);
 300
 301                 for (i = 0; i < src_cnt; i++) {
 302                         u8 *buf = thread->srcs[i] + src_off;
 303
 304                         dma_srcs[i] = dma_map_single(dev->dev, buf, len,
 305                                                      DMA_TO_DEVICE);
 306                 }
 307                 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
 308                 for (i = 0; i < dst_cnt; i++) {
 309                         dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
 310                                                      test_buf_size,
 311                                                      DMA_BIDIRECTIONAL);
 312                 }
 313
 314                 if (thread->type == DMA_MEMCPY)
 315                         tx = dev->device_prep_dma_memcpy(chan,
 316                                                          dma_dsts[0] + dst_off,
 317                                                          dma_srcs[0], len,
 318                                                          flags);
 319                 else if (thread->type == DMA_XOR)
 320                         tx = dev->device_prep_dma_xor(chan,
 321                                                       dma_dsts[0] + dst_off,
 322                                                       dma_srcs, xor_sources,
 323                                                       len, flags);
 324                 else if (thread->type == DMA_PQ) {
 325                         dma_addr_t dma_pq[dst_cnt];
 326
 327                         for (i = 0; i < dst_cnt; i++)
 328                                 dma_pq[i] = dma_dsts[i] + dst_off;
 329                         tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
 330                                                      pq_sources, pq_coefs,
 331                                                      len, flags);
 332                 }
 333
 334                 if (!tx) {
 335                         for (i = 0; i < src_cnt; i++)
 336                                 dma_unmap_single(dev->dev, dma_srcs[i], len,
 337                                                  DMA_TO_DEVICE);
 338                         for (i = 0; i < dst_cnt; i++)
 339                                 dma_unmap_single(dev->dev, dma_dsts[i],
 340                                                  test_buf_size,
 341                                                  DMA_BIDIRECTIONAL);
 342                         pr_warning("%s: #%u: prep error with src_off=0x%x "
 343                                         "dst_off=0x%x len=0x%x\n",
 344                                         thread_name, total_tests - 1,
 345                                         src_off, dst_off, len);
 346                         msleep(100);
 347                         failed_tests++;
 348                         continue;
 349                 }
 350
 351                 init_completion(&cmp);
 352                 tx->callback = dmatest_callback;
 353                 tx->callback_param = &cmp;
 354                 cookie = tx->tx_submit(tx);
 355
 356                 if (dma_submit_error(cookie)) {
 357                         pr_warning("%s: #%u: submit error %d with src_off=0x%x "
 358                                         "dst_off=0x%x len=0x%x\n",
 359                                         thread_name, total_tests - 1, cookie,
 360                                         src_off, dst_off, len);
 361                         msleep(100);
 362                         failed_tests++;
 363                         continue;
 364                 }
 365                 dma_async_issue_pending(chan);
 366
 367                 tmo = wait_for_completion_timeout(&cmp, tmo);
 368                 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
 369
 370                 if (tmo == 0) {
 371                         pr_warning("%s: #%u: test timed out\n",
 372                                    thread_name, total_tests - 1);
 373                         failed_tests++;
 374                         continue;
 375                 } else if (status != DMA_SUCCESS) {
 376                         pr_warning("%s: #%u: got completion callback,"
 377                                    " but status is \'%s\'\n",
 378                                    thread_name, total_tests - 1,
 379                                    status == DMA_ERROR ? "error" : "in progress");
 380                         failed_tests++;
 381                         continue;
 382                 }
 383
 384                 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
 385                 for (i = 0; i < dst_cnt; i++)
 386                         dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
 387                                          DMA_BIDIRECTIONAL);
 388
 389                 error_count = 0;
 390
 391                 pr_debug("%s: verifying source buffer...\n", thread_name);
 392                 error_count += dmatest_verify(thread->srcs, 0, src_off,
 393                                 0, PATTERN_SRC, true);
 394                 error_count += dmatest_verify(thread->srcs, src_off,
 395                                 src_off + len, src_off,
 396                                 PATTERN_SRC | PATTERN_COPY, true);
 397                 error_count += dmatest_verify(thread->srcs, src_off + len,
 398                                 test_buf_size, src_off + len,
 399                                 PATTERN_SRC, true);
 400
 401                 pr_debug("%s: verifying dest buffer...\n",
 402                                 thread->task->comm);
 403                 error_count += dmatest_verify(thread->dsts, 0, dst_off,
 404                                 0, PATTERN_DST, false);
 405                 error_count += dmatest_verify(thread->dsts, dst_off,
 406                                 dst_off + len, src_off,
 407                                 PATTERN_SRC | PATTERN_COPY, false);
 408                 error_count += dmatest_verify(thread->dsts, dst_off + len,
 409                                 test_buf_size, dst_off + len,
 410                                 PATTERN_DST, false);
 411
 412                 if (error_count) {
 413                         pr_warning("%s: #%u: %u errors with "
 414                                 "src_off=0x%x dst_off=0x%x len=0x%x\n",
 415                                 thread_name, total_tests - 1, error_count,
 416                                 src_off, dst_off, len);
 417                         failed_tests++;
 418                 } else {
 419                         pr_debug("%s: #%u: No errors with "
 420                                 "src_off=0x%x dst_off=0x%x len=0x%x\n",
 421                                 thread_name, total_tests - 1,
 422                                 src_off, dst_off, len);
 423                 }
 424         }
 425
 426         ret = 0;
 427         for (i = 0; thread->dsts[i]; i++)
 428                 kfree(thread->dsts[i]);
 429 err_dstbuf:
 430         kfree(thread->dsts);
 431 err_dsts:
 432         for (i = 0; thread->srcs[i]; i++)
 433                 kfree(thread->srcs[i]);
 434 err_srcbuf:
 435         kfree(thread->srcs);
 436 err_srcs:
 437         pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
 438                         thread_name, total_tests, failed_tests, ret);
 439         return ret;
 440 }
 441
 442 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
 443 {
 444         struct dmatest_thread   *thread;
 445         struct dmatest_thread   *_thread;
 446         int                     ret;
 447
 448         list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
 449                 ret = kthread_stop(thread->task);
 450                 pr_debug("dmatest: thread %s exited with status %d\n",
 451                                 thread->task->comm, ret);
 452                 list_del(&thread->node);
 453                 kfree(thread);
 454         }
 455         kfree(dtc);
 456 }
 457
 458 static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
 459 {
 460         struct dmatest_thread *thread;
 461         struct dma_chan *chan = dtc->chan;
 462         char *op;
 463         unsigned int i;
 464
 465         if (type == DMA_MEMCPY)
 466                 op = "copy";
 467         else if (type == DMA_XOR)
 468                 op = "xor";
 469         else if (type == DMA_PQ)
 470                 op = "pq";
 471         else
 472                 return -EINVAL;
 473
 474         for (i = 0; i < threads_per_chan; i++) {
 475                 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
 476                 if (!thread) {
 477                         pr_warning("dmatest: No memory for %s-%s%u\n",
 478                                    dma_chan_name(chan), op, i);
 479
 480                         break;
 481                 }
 482                 thread->chan = dtc->chan;
 483                 thread->type = type;
 484                 smp_wmb();
 485                 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
 486                                 dma_chan_name(chan), op, i);
 487                 if (IS_ERR(thread->task)) {
 488                         pr_warning("dmatest: Failed to run thread %s-%s%u\n",
 489                                         dma_chan_name(chan), op, i);
 490                         kfree(thread);
 491                         break;
 492                 }
 493
 494                 /* srcbuf and dstbuf are allocated by the thread itself */
 495
 496                 list_add_tail(&thread->node, &dtc->threads);
 497         }
 498
 499         return i;
 500 }
 501
 502 static int dmatest_add_channel(struct dma_chan *chan)
 503 {
 504         struct dmatest_chan     *dtc;
 505         struct dma_device       *dma_dev = chan->device;
 506         unsigned int            thread_count = 0;
 507         unsigned int            cnt;
 508
 509         dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 510         if (!dtc) {
 511                 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
 512                 return -ENOMEM;
 513         }
 514
 515         dtc->chan = chan;
 516         INIT_LIST_HEAD(&dtc->threads);
 517
 518         if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 519                 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
 520                 thread_count += cnt > 0 ?: 0;
 521         }
 522         if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
 523                 cnt = dmatest_add_threads(dtc, DMA_XOR);
 524                 thread_count += cnt > 0 ?: 0;
 525         }
 526         if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
 527                 cnt = dmatest_add_threads(dtc, DMA_PQ);
 528                 thread_count += cnt > 0 ?: 0;
 529         }
 530
 531         pr_info("dmatest: Started %u threads using %s\n",
 532                 thread_count, dma_chan_name(chan));
 533
 534         list_add_tail(&dtc->node, &dmatest_channels);
 535         nr_channels++;
 536
 537         return 0;
 538 }
 539
 540 static bool filter(struct dma_chan *chan, void *param)
 541 {
 542         if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
 543                 return false;
 544         else
 545                 return true;
 546 }
 547
 548 static int __init dmatest_init(void)
 549 {
 550         dma_cap_mask_t mask;
 551         struct dma_chan *chan;
 552         int err = 0;
 553
 554         dma_cap_zero(mask);
 555         dma_cap_set(DMA_MEMCPY, mask);
 556         for (;;) {
 557                 chan = dma_request_channel(mask, filter, NULL);
 558                 if (chan) {
 559                         err = dmatest_add_channel(chan);
 560                         if (err) {
 561                                 dma_release_channel(chan);
 562                                 break; /* add_channel failed, punt */
 563                         }
 564                 } else
 565                         break; /* no more channels available */
 566                 if (max_channels && nr_channels >= max_channels)
 567                         break; /* we have all we need */
 568         }
 569
 570         return err;
 571 }
 572 /* when compiled-in wait for drivers to load first */
 573 late_initcall(dmatest_init);
 574
 575 static void __exit dmatest_exit(void)
 576 {
 577         struct dmatest_chan *dtc, *_dtc;
 578         struct dma_chan *chan;
 579
 580         list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
 581                 list_del(&dtc->node);
 582                 chan = dtc->chan;
 583                 dmatest_cleanup_channel(dtc);
 584                 pr_debug("dmatest: dropped channel %s\n",
 585                          dma_chan_name(chan));
 586                 dma_release_channel(chan);
 587         }
 588 }
 589 module_exit(dmatest_exit);
 590
 591 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
 592 MODULE_LICENSE("GPL v2");