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   1 /*
   2  * Intel AGPGART routines.
   3  */
   4
   5 /*
   6  * Intel(R) 855GM/852GM and 865G support added by David Dawes
   7  * <dawes@tungstengraphics.com>.
   8  *
   9  * Intel(R) 915G/915GM support added by Alan Hourihane
  10  * <alanh@tungstengraphics.com>.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16 #include <linux/pagemap.h>
  17 #include <linux/agp_backend.h>
  18 #include "agp.h"
  19
  20 /* Intel 815 register */
  21 #define INTEL_815_APCONT        0x51
  22 #define INTEL_815_ATTBASE_MASK  ~0x1FFFFFFF
  23
  24 /* Intel i820 registers */
  25 #define INTEL_I820_RDCR         0x51
  26 #define INTEL_I820_ERRSTS       0xc8
  27
  28 /* Intel i840 registers */
  29 #define INTEL_I840_MCHCFG       0x50
  30 #define INTEL_I840_ERRSTS       0xc8
  31
  32 /* Intel i850 registers */
  33 #define INTEL_I850_MCHCFG       0x50
  34 #define INTEL_I850_ERRSTS       0xc8
  35
  36 /* intel 915G registers */
  37 #define I915_GMADDR     0x18
  38 #define I915_MMADDR     0x10
  39 #define I915_PTEADDR    0x1C
  40 #define I915_GMCH_GMS_STOLEN_48M        (0x6 << 4)
  41 #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
  42
  43
  44 /* Intel 7505 registers */
  45 #define INTEL_I7505_APSIZE      0x74
  46 #define INTEL_I7505_NCAPID      0x60
  47 #define INTEL_I7505_NISTAT      0x6c
  48 #define INTEL_I7505_ATTBASE     0x78
  49 #define INTEL_I7505_ERRSTS      0x42
  50 #define INTEL_I7505_AGPCTRL     0x70
  51 #define INTEL_I7505_MCHCFG      0x50
  52
  53 static struct aper_size_info_fixed intel_i810_sizes[] =
  54 {
  55         {64, 16384, 4},
  56         /* The 32M mode still requires a 64k gatt */
  57         {32, 8192, 4}
  58 };
  59
  60 #define AGP_DCACHE_MEMORY       1
  61 #define AGP_PHYS_MEMORY         2
  62
  63 static struct gatt_mask intel_i810_masks[] =
  64 {
  65         {.mask = I810_PTE_VALID, .type = 0},
  66         {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
  67         {.mask = I810_PTE_VALID, .type = 0}
  68 };
  69
  70 static struct _intel_i810_private {
  71         struct pci_dev *i810_dev;       /* device one */
  72         volatile u8 __iomem *registers;
  73         int num_dcache_entries;
  74 } intel_i810_private;
  75
  76 static int intel_i810_fetch_size(void)
  77 {
  78         u32 smram_miscc;
  79         struct aper_size_info_fixed *values;
  80
  81         pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
  82         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
  83
  84         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
  85                 printk(KERN_WARNING PFX "i810 is disabled\n");
  86                 return 0;
  87         }
  88         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
  89                 agp_bridge->previous_size =
  90                         agp_bridge->current_size = (void *) (values + 1);
  91                 agp_bridge->aperture_size_idx = 1;
  92                 return values[1].size;
  93         } else {
  94                 agp_bridge->previous_size =
  95                         agp_bridge->current_size = (void *) (values);
  96                 agp_bridge->aperture_size_idx = 0;
  97                 return values[0].size;
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int intel_i810_configure(void)
 104 {
 105         struct aper_size_info_fixed *current_size;
 106         u32 temp;
 107         int i;
 108
 109         current_size = A_SIZE_FIX(agp_bridge->current_size);
 110
 111         pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
 112         temp &= 0xfff80000;
 113
 114         intel_i810_private.registers = ioremap(temp, 128 * 4096);
 115         if (!intel_i810_private.registers) {
 116                 printk(KERN_ERR PFX "Unable to remap memory.\n");
 117                 return -ENOMEM;
 118         }
 119
 120         if ((readl(intel_i810_private.registers+I810_DRAM_CTL)
 121                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
 122                 /* This will need to be dynamically assigned */
 123                 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
 124                 intel_i810_private.num_dcache_entries = 1024;
 125         }
 126         pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
 127         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 128         writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_i810_private.registers+I810_PGETBL_CTL);
 129         readl(intel_i810_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 130
 131         if (agp_bridge->driver->needs_scratch_page) {
 132                 for (i = 0; i < current_size->num_entries; i++) {
 133                         writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 134                         readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI posting. */
 135                 }
 136         }
 137         global_cache_flush();
 138         return 0;
 139 }
 140
 141 static void intel_i810_cleanup(void)
 142 {
 143         writel(0, intel_i810_private.registers+I810_PGETBL_CTL);
 144         readl(intel_i810_private.registers);    /* PCI Posting. */
 145         iounmap(intel_i810_private.registers);
 146 }
 147
 148 static void intel_i810_tlbflush(struct agp_memory *mem)
 149 {
 150         return;
 151 }
 152
 153 static void intel_i810_agp_enable(struct agp_bridge_data *bridge, u32 mode)
 154 {
 155         return;
 156 }
 157
 158 /* Exists to support ARGB cursors */
 159 static void *i8xx_alloc_pages(void)
 160 {
 161         struct page * page;
 162
 163         page = alloc_pages(GFP_KERNEL, 2);
 164         if (page == NULL)
 165                 return NULL;
 166
 167         if (change_page_attr(page, 4, PAGE_KERNEL_NOCACHE) < 0) {
 168                 global_flush_tlb();
 169                 __free_page(page);
 170                 return NULL;
 171         }
 172         global_flush_tlb();
 173         get_page(page);
 174         SetPageLocked(page);
 175         atomic_inc(&agp_bridge->current_memory_agp);
 176         return page_address(page);
 177 }
 178
 179 static void i8xx_destroy_pages(void *addr)
 180 {
 181         struct page *page;
 182
 183         if (addr == NULL)
 184                 return;
 185
 186         page = virt_to_page(addr);
 187         change_page_attr(page, 4, PAGE_KERNEL);
 188         global_flush_tlb();
 189         put_page(page);
 190         unlock_page(page);
 191         free_pages((unsigned long)addr, 2);
 192         atomic_dec(&agp_bridge->current_memory_agp);
 193 }
 194
 195 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 196                                 int type)
 197 {
 198         int i, j, num_entries;
 199         void *temp;
 200
 201         temp = agp_bridge->current_size;
 202         num_entries = A_SIZE_FIX(temp)->num_entries;
 203
 204         if ((pg_start + mem->page_count) > num_entries) {
 205                 return -EINVAL;
 206         }
 207         for (j = pg_start; j < (pg_start + mem->page_count); j++) {
 208                 if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
 209                         return -EBUSY;
 210         }
 211
 212         if (type != 0 || mem->type != 0) {
 213                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
 214                         /* special insert */
 215                         global_cache_flush();
 216                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
 217                                 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 218                                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 219                         }
 220                         global_cache_flush();
 221                         agp_bridge->driver->tlb_flush(mem);
 222                         return 0;
 223                 }
 224                 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
 225                         goto insert;
 226                 return -EINVAL;
 227         }
 228
 229 insert:
 230         global_cache_flush();
 231         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 232                 writel(agp_bridge->driver->mask_memory(agp_bridge,
 233                         mem->memory[i], mem->type),
 234                         intel_i810_private.registers+I810_PTE_BASE+(j*4));
 235                 readl(intel_i810_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 236         }
 237         global_cache_flush();
 238
 239         agp_bridge->driver->tlb_flush(mem);
 240         return 0;
 241 }
 242
 243 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 244                                 int type)
 245 {
 246         int i;
 247
 248         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 249                 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 250                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 251         }
 252
 253         global_cache_flush();
 254         agp_bridge->driver->tlb_flush(mem);
 255         return 0;
 256 }
 257
 258 /*
 259  * The i810/i830 requires a physical address to program its mouse
 260  * pointer into hardware.
 261  * However the Xserver still writes to it through the agp aperture.
 262  */
 263 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 264 {
 265         struct agp_memory *new;
 266         void *addr;
 267
 268         if (pg_count != 1 && pg_count != 4)
 269                 return NULL;
 270
 271         switch (pg_count) {
 272         case 1: addr = agp_bridge->driver->agp_alloc_page(agp_bridge);
 273                 global_flush_tlb();
 274                 break;
 275         case 4:
 276                 /* kludge to get 4 physical pages for ARGB cursor */
 277                 addr = i8xx_alloc_pages();
 278                 break;
 279         default:
 280                 return NULL;
 281         }
 282
 283         if (addr == NULL)
 284                 return NULL;
 285
 286         new = agp_create_memory(pg_count);
 287         if (new == NULL)
 288                 return NULL;
 289
 290         new->memory[0] = virt_to_gart(addr);
 291         if (pg_count == 4) {
 292                 /* kludge to get 4 physical pages for ARGB cursor */
 293                 new->memory[1] = new->memory[0] + PAGE_SIZE;
 294                 new->memory[2] = new->memory[1] + PAGE_SIZE;
 295                 new->memory[3] = new->memory[2] + PAGE_SIZE;
 296         }
 297         new->page_count = pg_count;
 298         new->num_scratch_pages = pg_count;
 299         new->type = AGP_PHYS_MEMORY;
 300         new->physical = new->memory[0];
 301         return new;
 302 }
 303
 304 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 305 {
 306         struct agp_memory *new;
 307
 308         if (type == AGP_DCACHE_MEMORY) {
 309                 if (pg_count != intel_i810_private.num_dcache_entries)
 310                         return NULL;
 311
 312                 new = agp_create_memory(1);
 313                 if (new == NULL)
 314                         return NULL;
 315
 316                 new->type = AGP_DCACHE_MEMORY;
 317                 new->page_count = pg_count;
 318                 new->num_scratch_pages = 0;
 319                 vfree(new->memory);
 320                 return new;
 321         }
 322         if (type == AGP_PHYS_MEMORY)
 323                 return alloc_agpphysmem_i8xx(pg_count, type);
 324
 325         return NULL;
 326 }
 327
 328 static void intel_i810_free_by_type(struct agp_memory *curr)
 329 {
 330         agp_free_key(curr->key);
 331         if(curr->type == AGP_PHYS_MEMORY) {
 332                 if (curr->page_count == 4)
 333                         i8xx_destroy_pages(gart_to_virt(curr->memory[0]));
 334                 else {
 335                         agp_bridge->driver->agp_destroy_page(
 336                                  gart_to_virt(curr->memory[0]));
 337                         global_flush_tlb();
 338                 }
 339                 vfree(curr->memory);
 340         }
 341         kfree(curr);
 342 }
 343
 344 static unsigned long intel_i810_mask_memory(struct agp_bridge_data *bridge,
 345         unsigned long addr, int type)
 346 {
 347         /* Type checking must be done elsewhere */
 348         return addr | bridge->driver->masks[type].mask;
 349 }
 350
 351 static struct aper_size_info_fixed intel_i830_sizes[] =
 352 {
 353         {128, 32768, 5},
 354         /* The 64M mode still requires a 128k gatt */
 355         {64, 16384, 5},
 356         {256, 65536, 6},
 357 };
 358
 359 static struct _intel_i830_private {
 360         struct pci_dev *i830_dev;               /* device one */
 361         volatile u8 __iomem *registers;
 362         volatile u32 __iomem *gtt;              /* I915G */
 363         int gtt_entries;
 364 } intel_i830_private;
 365
 366 static void intel_i830_init_gtt_entries(void)
 367 {
 368         u16 gmch_ctrl;
 369         int gtt_entries;
 370         u8 rdct;
 371         int local = 0;
 372         static const int ddt[4] = { 0, 16, 32, 64 };
 373         int size;
 374
 375         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 376
 377         /* We obtain the size of the GTT, which is also stored (for some
 378          * reason) at the top of stolen memory. Then we add 4KB to that
 379          * for the video BIOS popup, which is also stored in there. */
 380         size = agp_bridge->driver->fetch_size() + 4;
 381
 382         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
 383             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
 384                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 385                 case I830_GMCH_GMS_STOLEN_512:
 386                         gtt_entries = KB(512) - KB(size);
 387                         break;
 388                 case I830_GMCH_GMS_STOLEN_1024:
 389                         gtt_entries = MB(1) - KB(size);
 390                         break;
 391                 case I830_GMCH_GMS_STOLEN_8192:
 392                         gtt_entries = MB(8) - KB(size);
 393                         break;
 394                 case I830_GMCH_GMS_LOCAL:
 395                         rdct = readb(intel_i830_private.registers+I830_RDRAM_CHANNEL_TYPE);
 396                         gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
 397                                         MB(ddt[I830_RDRAM_DDT(rdct)]);
 398                         local = 1;
 399                         break;
 400                 default:
 401                         gtt_entries = 0;
 402                         break;
 403                 }
 404         } else {
 405                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 406                 case I855_GMCH_GMS_STOLEN_1M:
 407                         gtt_entries = MB(1) - KB(size);
 408                         break;
 409                 case I855_GMCH_GMS_STOLEN_4M:
 410                         gtt_entries = MB(4) - KB(size);
 411                         break;
 412                 case I855_GMCH_GMS_STOLEN_8M:
 413                         gtt_entries = MB(8) - KB(size);
 414                         break;
 415                 case I855_GMCH_GMS_STOLEN_16M:
 416                         gtt_entries = MB(16) - KB(size);
 417                         break;
 418                 case I855_GMCH_GMS_STOLEN_32M:
 419                         gtt_entries = MB(32) - KB(size);
 420                         break;
 421                 case I915_GMCH_GMS_STOLEN_48M:
 422                         /* Check it's really I915G */
 423                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
 424                             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
 425                             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB)
 426                                 gtt_entries = MB(48) - KB(size);
 427                         else
 428                                 gtt_entries = 0;
 429                         break;
 430                 case I915_GMCH_GMS_STOLEN_64M:
 431                         /* Check it's really I915G */
 432                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
 433                             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
 434                             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB)
 435                                 gtt_entries = MB(64) - KB(size);
 436                         else
 437                                 gtt_entries = 0;
 438                 default:
 439                         gtt_entries = 0;
 440                         break;
 441                 }
 442         }
 443         if (gtt_entries > 0)
 444                 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
 445                        gtt_entries / KB(1), local ? "local" : "stolen");
 446         else
 447                 printk(KERN_INFO PFX
 448                        "No pre-allocated video memory detected.\n");
 449         gtt_entries /= KB(4);
 450
 451         intel_i830_private.gtt_entries = gtt_entries;
 452 }
 453
 454 /* The intel i830 automatically initializes the agp aperture during POST.
 455  * Use the memory already set aside for in the GTT.
 456  */
 457 static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge)
 458 {
 459         int page_order;
 460         struct aper_size_info_fixed *size;
 461         int num_entries;
 462         u32 temp;
 463
 464         size = agp_bridge->current_size;
 465         page_order = size->page_order;
 466         num_entries = size->num_entries;
 467         agp_bridge->gatt_table_real = NULL;
 468
 469         pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
 470         temp &= 0xfff80000;
 471
 472         intel_i830_private.registers = ioremap(temp,128 * 4096);
 473         if (!intel_i830_private.registers)
 474                 return -ENOMEM;
 475
 476         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 477         global_cache_flush();   /* FIXME: ?? */
 478
 479         /* we have to call this as early as possible after the MMIO base address is known */
 480         intel_i830_init_gtt_entries();
 481
 482         agp_bridge->gatt_table = NULL;
 483
 484         agp_bridge->gatt_bus_addr = temp;
 485
 486         return 0;
 487 }
 488
 489 /* Return the gatt table to a sane state. Use the top of stolen
 490  * memory for the GTT.
 491  */
 492 static int intel_i830_free_gatt_table(struct agp_bridge_data *bridge)
 493 {
 494         return 0;
 495 }
 496
 497 static int intel_i830_fetch_size(void)
 498 {
 499         u16 gmch_ctrl;
 500         struct aper_size_info_fixed *values;
 501
 502         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 503
 504         if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
 505             agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
 506                 /* 855GM/852GM/865G has 128MB aperture size */
 507                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 508                 agp_bridge->aperture_size_idx = 0;
 509                 return values[0].size;
 510         }
 511
 512         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 513
 514         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
 515                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 516                 agp_bridge->aperture_size_idx = 0;
 517                 return values[0].size;
 518         } else {
 519                 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + 1);
 520                 agp_bridge->aperture_size_idx = 1;
 521                 return values[1].size;
 522         }
 523
 524         return 0;
 525 }
 526
 527 static int intel_i830_configure(void)
 528 {
 529         struct aper_size_info_fixed *current_size;
 530         u32 temp;
 531         u16 gmch_ctrl;
 532         int i;
 533
 534         current_size = A_SIZE_FIX(agp_bridge->current_size);
 535
 536         pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
 537         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 538
 539         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 540         gmch_ctrl |= I830_GMCH_ENABLED;
 541         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 542
 543         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 544         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 545
 546         if (agp_bridge->driver->needs_scratch_page) {
 547                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 548                         writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 549                         readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 550                 }
 551         }
 552
 553         global_cache_flush();
 554         return 0;
 555 }
 556
 557 static void intel_i830_cleanup(void)
 558 {
 559         iounmap(intel_i830_private.registers);
 560 }
 561
 562 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type)
 563 {
 564         int i,j,num_entries;
 565         void *temp;
 566
 567         temp = agp_bridge->current_size;
 568         num_entries = A_SIZE_FIX(temp)->num_entries;
 569
 570         if (pg_start < intel_i830_private.gtt_entries) {
 571                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 572                                 pg_start,intel_i830_private.gtt_entries);
 573
 574                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 575                 return -EINVAL;
 576         }
 577
 578         if ((pg_start + mem->page_count) > num_entries)
 579                 return -EINVAL;
 580
 581         /* The i830 can't check the GTT for entries since its read only,
 582          * depend on the caller to make the correct offset decisions.
 583          */
 584
 585         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 586                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 587                 return -EINVAL;
 588
 589         global_cache_flush();   /* FIXME: Necessary ?*/
 590
 591         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 592                 writel(agp_bridge->driver->mask_memory(agp_bridge,
 593                         mem->memory[i], mem->type),
 594                         intel_i830_private.registers+I810_PTE_BASE+(j*4));
 595                 readl(intel_i830_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 596         }
 597
 598         global_cache_flush();
 599         agp_bridge->driver->tlb_flush(mem);
 600         return 0;
 601 }
 602
 603 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 604                                 int type)
 605 {
 606         int i;
 607
 608         global_cache_flush();
 609
 610         if (pg_start < intel_i830_private.gtt_entries) {
 611                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 612                 return -EINVAL;
 613         }
 614
 615         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 616                 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 617                 readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 618         }
 619
 620         global_cache_flush();
 621         agp_bridge->driver->tlb_flush(mem);
 622         return 0;
 623 }
 624
 625 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
 626 {
 627         if (type == AGP_PHYS_MEMORY)
 628                 return alloc_agpphysmem_i8xx(pg_count, type);
 629
 630         /* always return NULL for other allocation types for now */
 631         return NULL;
 632 }
 633
 634 static int intel_i915_configure(void)
 635 {
 636         struct aper_size_info_fixed *current_size;
 637         u32 temp;
 638         u16 gmch_ctrl;
 639         int i;
 640
 641         current_size = A_SIZE_FIX(agp_bridge->current_size);
 642
 643         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 644
 645         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 646
 647         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 648         gmch_ctrl |= I830_GMCH_ENABLED;
 649         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 650
 651         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 652         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 653
 654         if (agp_bridge->driver->needs_scratch_page) {
 655                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 656                         writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 657                         readl(intel_i830_private.gtt+i);        /* PCI Posting. */
 658                 }
 659         }
 660
 661         global_cache_flush();
 662         return 0;
 663 }
 664
 665 static void intel_i915_cleanup(void)
 666 {
 667         iounmap(intel_i830_private.gtt);
 668         iounmap(intel_i830_private.registers);
 669 }
 670
 671 static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
 672                                 int type)
 673 {
 674         int i,j,num_entries;
 675         void *temp;
 676
 677         temp = agp_bridge->current_size;
 678         num_entries = A_SIZE_FIX(temp)->num_entries;
 679
 680         if (pg_start < intel_i830_private.gtt_entries) {
 681                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 682                                 pg_start,intel_i830_private.gtt_entries);
 683
 684                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 685                 return -EINVAL;
 686         }
 687
 688         if ((pg_start + mem->page_count) > num_entries)
 689                 return -EINVAL;
 690
 691         /* The i830 can't check the GTT for entries since its read only,
 692          * depend on the caller to make the correct offset decisions.
 693          */
 694
 695         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 696                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 697                 return -EINVAL;
 698
 699         global_cache_flush();
 700
 701         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 702                 writel(agp_bridge->driver->mask_memory(agp_bridge,
 703                         mem->memory[i], mem->type), intel_i830_private.gtt+j);
 704                 readl(intel_i830_private.gtt+j);        /* PCI Posting. */
 705         }
 706
 707         global_cache_flush();
 708         agp_bridge->driver->tlb_flush(mem);
 709         return 0;
 710 }
 711
 712 static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 713                                 int type)
 714 {
 715         int i;
 716
 717         global_cache_flush();
 718
 719         if (pg_start < intel_i830_private.gtt_entries) {
 720                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 721                 return -EINVAL;
 722         }
 723
 724         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 725                 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 726                 readl(intel_i830_private.gtt+i);
 727         }
 728
 729         global_cache_flush();
 730         agp_bridge->driver->tlb_flush(mem);
 731         return 0;
 732 }
 733
 734 static int intel_i915_fetch_size(void)
 735 {
 736         struct aper_size_info_fixed *values;
 737         u32 temp, offset = 0;
 738
 739 #define I915_256MB_ADDRESS_MASK (1<<27)
 740
 741         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 742
 743         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 744         if (temp & I915_256MB_ADDRESS_MASK)
 745                 offset = 0;     /* 128MB aperture */
 746         else
 747                 offset = 2;     /* 256MB aperture */
 748         agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
 749         return values[offset].size;
 750 }
 751
 752 /* The intel i915 automatically initializes the agp aperture during POST.
 753  * Use the memory already set aside for in the GTT.
 754  */
 755 static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
 756 {
 757         int page_order;
 758         struct aper_size_info_fixed *size;
 759         int num_entries;
 760         u32 temp, temp2;
 761
 762         size = agp_bridge->current_size;
 763         page_order = size->page_order;
 764         num_entries = size->num_entries;
 765         agp_bridge->gatt_table_real = NULL;
 766
 767         pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
 768         pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
 769
 770         intel_i830_private.gtt = ioremap(temp2, 256 * 1024);
 771         if (!intel_i830_private.gtt)
 772                 return -ENOMEM;
 773
 774         temp &= 0xfff80000;
 775
 776         intel_i830_private.registers = ioremap(temp,128 * 4096);
 777         if (!intel_i830_private.registers)
 778                 return -ENOMEM;
 779
 780         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 781         global_cache_flush();   /* FIXME: ? */
 782
 783         /* we have to call this as early as possible after the MMIO base address is known */
 784         intel_i830_init_gtt_entries();
 785
 786         agp_bridge->gatt_table = NULL;
 787
 788         agp_bridge->gatt_bus_addr = temp;
 789
 790         return 0;
 791 }
 792
 793 static int intel_fetch_size(void)
 794 {
 795         int i;
 796         u16 temp;
 797         struct aper_size_info_16 *values;
 798
 799         pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
 800         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 801
 802         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 803                 if (temp == values[i].size_value) {
 804                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 805                         agp_bridge->aperture_size_idx = i;
 806                         return values[i].size;
 807                 }
 808         }
 809
 810         return 0;
 811 }
 812
 813 static int __intel_8xx_fetch_size(u8 temp)
 814 {
 815         int i;
 816         struct aper_size_info_8 *values;
 817
 818         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 819
 820         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 821                 if (temp == values[i].size_value) {
 822                         agp_bridge->previous_size =
 823                                 agp_bridge->current_size = (void *) (values + i);
 824                         agp_bridge->aperture_size_idx = i;
 825                         return values[i].size;
 826                 }
 827         }
 828         return 0;
 829 }
 830
 831 static int intel_8xx_fetch_size(void)
 832 {
 833         u8 temp;
 834
 835         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 836         return __intel_8xx_fetch_size(temp);
 837 }
 838
 839 static int intel_815_fetch_size(void)
 840 {
 841         u8 temp;
 842
 843         /* Intel 815 chipsets have a _weird_ APSIZE register with only
 844          * one non-reserved bit, so mask the others out ... */
 845         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 846         temp &= (1 << 3);
 847
 848         return __intel_8xx_fetch_size(temp);
 849 }
 850
 851 static void intel_tlbflush(struct agp_memory *mem)
 852 {
 853         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
 854         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 855 }
 856
 857
 858 static void intel_8xx_tlbflush(struct agp_memory *mem)
 859 {
 860         u32 temp;
 861         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 862         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
 863         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 864         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
 865 }
 866
 867
 868 static void intel_cleanup(void)
 869 {
 870         u16 temp;
 871         struct aper_size_info_16 *previous_size;
 872
 873         previous_size = A_SIZE_16(agp_bridge->previous_size);
 874         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 875         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 876         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 877 }
 878
 879
 880 static void intel_8xx_cleanup(void)
 881 {
 882         u16 temp;
 883         struct aper_size_info_8 *previous_size;
 884
 885         previous_size = A_SIZE_8(agp_bridge->previous_size);
 886         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 887         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 888         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 889 }
 890
 891
 892 static int intel_configure(void)
 893 {
 894         u32 temp;
 895         u16 temp2;
 896         struct aper_size_info_16 *current_size;
 897
 898         current_size = A_SIZE_16(agp_bridge->current_size);
 899
 900         /* aperture size */
 901         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 902
 903         /* address to map to */
 904         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 905         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 906
 907         /* attbase - aperture base */
 908         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 909
 910         /* agpctrl */
 911         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 912
 913         /* paccfg/nbxcfg */
 914         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 915         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 916                         (temp2 & ~(1 << 10)) | (1 << 9));
 917         /* clear any possible error conditions */
 918         pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 919         return 0;
 920 }
 921
 922 static int intel_815_configure(void)
 923 {
 924         u32 temp, addr;
 925         u8 temp2;
 926         struct aper_size_info_8 *current_size;
 927
 928         /* attbase - aperture base */
 929         /* the Intel 815 chipset spec. says that bits 29-31 in the
 930         * ATTBASE register are reserved -> try not to write them */
 931         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 932                 printk (KERN_EMERG PFX "gatt bus addr too high");
 933                 return -EINVAL;
 934         }
 935
 936         current_size = A_SIZE_8(agp_bridge->current_size);
 937
 938         /* aperture size */
 939         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 940                         current_size->size_value);
 941
 942         /* address to map to */
 943         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 944         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 945
 946         pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 947         addr &= INTEL_815_ATTBASE_MASK;
 948         addr |= agp_bridge->gatt_bus_addr;
 949         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 950
 951         /* agpctrl */
 952         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 953
 954         /* apcont */
 955         pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 956         pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 957
 958         /* clear any possible error conditions */
 959         /* Oddness : this chipset seems to have no ERRSTS register ! */
 960         return 0;
 961 }
 962
 963 static void intel_820_tlbflush(struct agp_memory *mem)
 964 {
 965         return;
 966 }
 967
 968 static void intel_820_cleanup(void)
 969 {
 970         u8 temp;
 971         struct aper_size_info_8 *previous_size;
 972
 973         previous_size = A_SIZE_8(agp_bridge->previous_size);
 974         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 975         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 976                         temp & ~(1 << 1));
 977         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 978                         previous_size->size_value);
 979 }
 980
 981
 982 static int intel_820_configure(void)
 983 {
 984         u32 temp;
 985         u8 temp2;
 986         struct aper_size_info_8 *current_size;
 987
 988         current_size = A_SIZE_8(agp_bridge->current_size);
 989
 990         /* aperture size */
 991         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 992
 993         /* address to map to */
 994         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 995         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 996
 997         /* attbase - aperture base */
 998         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 999
1000         /* agpctrl */
1001         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1002
1003         /* global enable aperture access */
1004         /* This flag is not accessed through MCHCFG register as in */
1005         /* i850 chipset. */
1006         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
1007         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
1008         /* clear any possible AGP-related error conditions */
1009         pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
1010         return 0;
1011 }
1012
1013 static int intel_840_configure(void)
1014 {
1015         u32 temp;
1016         u16 temp2;
1017         struct aper_size_info_8 *current_size;
1018
1019         current_size = A_SIZE_8(agp_bridge->current_size);
1020
1021         /* aperture size */
1022         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1023
1024         /* address to map to */
1025         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1026         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1027
1028         /* attbase - aperture base */
1029         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1030
1031         /* agpctrl */
1032         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1033
1034         /* mcgcfg */
1035         pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
1036         pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
1037         /* clear any possible error conditions */
1038         pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
1039         return 0;
1040 }
1041
1042 static int intel_845_configure(void)
1043 {
1044         u32 temp;
1045         u8 temp2;
1046         struct aper_size_info_8 *current_size;
1047
1048         current_size = A_SIZE_8(agp_bridge->current_size);
1049
1050         /* aperture size */
1051         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1052
1053         if (agp_bridge->apbase_config != 0) {
1054                 pci_write_config_dword(agp_bridge->dev, AGP_APBASE,
1055                                        agp_bridge->apbase_config);
1056         } else {
1057                 /* address to map to */
1058                 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1059                 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1060                 agp_bridge->apbase_config = temp;
1061         }
1062
1063         /* attbase - aperture base */
1064         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1065
1066         /* agpctrl */
1067         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1068
1069         /* agpm */
1070         pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
1071         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
1072         /* clear any possible error conditions */
1073         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
1074         return 0;
1075 }
1076
1077 static int intel_850_configure(void)
1078 {
1079         u32 temp;
1080         u16 temp2;
1081         struct aper_size_info_8 *current_size;
1082
1083         current_size = A_SIZE_8(agp_bridge->current_size);
1084
1085         /* aperture size */
1086         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1087
1088         /* address to map to */
1089         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1090         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1091
1092         /* attbase - aperture base */
1093         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1094
1095         /* agpctrl */
1096         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1097
1098         /* mcgcfg */
1099         pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
1100         pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
1101         /* clear any possible AGP-related error conditions */
1102         pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
1103         return 0;
1104 }
1105
1106 static int intel_860_configure(void)
1107 {
1108         u32 temp;
1109         u16 temp2;
1110         struct aper_size_info_8 *current_size;
1111
1112         current_size = A_SIZE_8(agp_bridge->current_size);
1113
1114         /* aperture size */
1115         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1116
1117         /* address to map to */
1118         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1119         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1120
1121         /* attbase - aperture base */
1122         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1123
1124         /* agpctrl */
1125         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1126
1127         /* mcgcfg */
1128         pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
1129         pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
1130         /* clear any possible AGP-related error conditions */
1131         pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
1132         return 0;
1133 }
1134
1135 static int intel_830mp_configure(void)
1136 {
1137         u32 temp;
1138         u16 temp2;
1139         struct aper_size_info_8 *current_size;
1140
1141         current_size = A_SIZE_8(agp_bridge->current_size);
1142
1143         /* aperture size */
1144         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1145
1146         /* address to map to */
1147         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1148         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1149
1150         /* attbase - aperture base */
1151         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1152
1153         /* agpctrl */
1154         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1155
1156         /* gmch */
1157         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
1158         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
1159         /* clear any possible AGP-related error conditions */
1160         pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
1161         return 0;
1162 }
1163
1164 static int intel_7505_configure(void)
1165 {
1166         u32 temp;
1167         u16 temp2;
1168         struct aper_size_info_8 *current_size;
1169
1170         current_size = A_SIZE_8(agp_bridge->current_size);
1171
1172         /* aperture size */
1173         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1174
1175         /* address to map to */
1176         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1177         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1178
1179         /* attbase - aperture base */
1180         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1181
1182         /* agpctrl */
1183         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1184
1185         /* mchcfg */
1186         pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
1187         pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
1188
1189         return 0;
1190 }
1191
1192 /* Setup function */
1193 static struct gatt_mask intel_generic_masks[] =
1194 {
1195         {.mask = 0x00000017, .type = 0}
1196 };
1197
1198 static struct aper_size_info_8 intel_815_sizes[2] =
1199 {
1200         {64, 16384, 4, 0},
1201         {32, 8192, 3, 8},
1202 };
1203
1204 static struct aper_size_info_8 intel_8xx_sizes[7] =
1205 {
1206         {256, 65536, 6, 0},
1207         {128, 32768, 5, 32},
1208         {64, 16384, 4, 48},
1209         {32, 8192, 3, 56},
1210         {16, 4096, 2, 60},
1211         {8, 2048, 1, 62},
1212         {4, 1024, 0, 63}
1213 };
1214
1215 static struct aper_size_info_16 intel_generic_sizes[7] =
1216 {
1217         {256, 65536, 6, 0},
1218         {128, 32768, 5, 32},
1219         {64, 16384, 4, 48},
1220         {32, 8192, 3, 56},
1221         {16, 4096, 2, 60},
1222         {8, 2048, 1, 62},
1223         {4, 1024, 0, 63}
1224 };
1225
1226 static struct aper_size_info_8 intel_830mp_sizes[4] =
1227 {
1228         {256, 65536, 6, 0},
1229         {128, 32768, 5, 32},
1230         {64, 16384, 4, 48},
1231         {32, 8192, 3, 56}
1232 };
1233
1234 static struct agp_bridge_driver intel_generic_driver = {
1235         .owner                  = THIS_MODULE,
1236         .aperture_sizes         = intel_generic_sizes,
1237         .size_type              = U16_APER_SIZE,
1238         .num_aperture_sizes     = 7,
1239         .configure              = intel_configure,
1240         .fetch_size             = intel_fetch_size,
1241         .cleanup                = intel_cleanup,
1242         .tlb_flush              = intel_tlbflush,
1243         .mask_memory            = agp_generic_mask_memory,
1244         .masks                  = intel_generic_masks,
1245         .agp_enable             = agp_generic_enable,
1246         .cache_flush            = global_cache_flush,
1247         .create_gatt_table      = agp_generic_create_gatt_table,
1248         .free_gatt_table        = agp_generic_free_gatt_table,
1249         .insert_memory          = agp_generic_insert_memory,
1250         .remove_memory          = agp_generic_remove_memory,
1251         .alloc_by_type          = agp_generic_alloc_by_type,
1252         .free_by_type           = agp_generic_free_by_type,
1253         .agp_alloc_page         = agp_generic_alloc_page,
1254         .agp_destroy_page       = agp_generic_destroy_page,
1255 };
1256
1257 static struct agp_bridge_driver intel_810_driver = {
1258         .owner                  = THIS_MODULE,
1259         .aperture_sizes         = intel_i810_sizes,
1260         .size_type              = FIXED_APER_SIZE,
1261         .num_aperture_sizes     = 2,
1262         .needs_scratch_page     = TRUE,
1263         .configure              = intel_i810_configure,
1264         .fetch_size             = intel_i810_fetch_size,
1265         .cleanup                = intel_i810_cleanup,
1266         .tlb_flush              = intel_i810_tlbflush,
1267         .mask_memory            = intel_i810_mask_memory,
1268         .masks                  = intel_i810_masks,
1269         .agp_enable             = intel_i810_agp_enable,
1270         .cache_flush            = global_cache_flush,
1271         .create_gatt_table      = agp_generic_create_gatt_table,
1272         .free_gatt_table        = agp_generic_free_gatt_table,
1273         .insert_memory          = intel_i810_insert_entries,
1274         .remove_memory          = intel_i810_remove_entries,
1275         .alloc_by_type          = intel_i810_alloc_by_type,
1276         .free_by_type           = intel_i810_free_by_type,
1277         .agp_alloc_page         = agp_generic_alloc_page,
1278         .agp_destroy_page       = agp_generic_destroy_page,
1279 };
1280
1281 static struct agp_bridge_driver intel_815_driver = {
1282         .owner                  = THIS_MODULE,
1283         .aperture_sizes         = intel_815_sizes,
1284         .size_type              = U8_APER_SIZE,
1285         .num_aperture_sizes     = 2,
1286         .configure              = intel_815_configure,
1287         .fetch_size             = intel_815_fetch_size,
1288         .cleanup                = intel_8xx_cleanup,
1289         .tlb_flush              = intel_8xx_tlbflush,
1290         .mask_memory            = agp_generic_mask_memory,
1291         .masks                  = intel_generic_masks,
1292         .agp_enable             = agp_generic_enable,
1293         .cache_flush            = global_cache_flush,
1294         .create_gatt_table      = agp_generic_create_gatt_table,
1295         .free_gatt_table        = agp_generic_free_gatt_table,
1296         .insert_memory          = agp_generic_insert_memory,
1297         .remove_memory          = agp_generic_remove_memory,
1298         .alloc_by_type          = agp_generic_alloc_by_type,
1299         .free_by_type           = agp_generic_free_by_type,
1300         .agp_alloc_page         = agp_generic_alloc_page,
1301         .agp_destroy_page       = agp_generic_destroy_page,
1302 };
1303
1304 static struct agp_bridge_driver intel_830_driver = {
1305         .owner                  = THIS_MODULE,
1306         .aperture_sizes         = intel_i830_sizes,
1307         .size_type              = FIXED_APER_SIZE,
1308         .num_aperture_sizes     = 3,
1309         .needs_scratch_page     = TRUE,
1310         .configure              = intel_i830_configure,
1311         .fetch_size             = intel_i830_fetch_size,
1312         .cleanup                = intel_i830_cleanup,
1313         .tlb_flush              = intel_i810_tlbflush,
1314         .mask_memory            = intel_i810_mask_memory,
1315         .masks                  = intel_i810_masks,
1316         .agp_enable             = intel_i810_agp_enable,
1317         .cache_flush            = global_cache_flush,
1318         .create_gatt_table      = intel_i830_create_gatt_table,
1319         .free_gatt_table        = intel_i830_free_gatt_table,
1320         .insert_memory          = intel_i830_insert_entries,
1321         .remove_memory          = intel_i830_remove_entries,
1322         .alloc_by_type          = intel_i830_alloc_by_type,
1323         .free_by_type           = intel_i810_free_by_type,
1324         .agp_alloc_page         = agp_generic_alloc_page,
1325         .agp_destroy_page       = agp_generic_destroy_page,
1326 };
1327
1328 static struct agp_bridge_driver intel_820_driver = {
1329         .owner                  = THIS_MODULE,
1330         .aperture_sizes         = intel_8xx_sizes,
1331         .size_type              = U8_APER_SIZE,
1332         .num_aperture_sizes     = 7,
1333         .configure              = intel_820_configure,
1334         .fetch_size             = intel_8xx_fetch_size,
1335         .cleanup                = intel_820_cleanup,
1336         .tlb_flush              = intel_820_tlbflush,
1337         .mask_memory            = agp_generic_mask_memory,
1338         .masks                  = intel_generic_masks,
1339         .agp_enable             = agp_generic_enable,
1340         .cache_flush            = global_cache_flush,
1341         .create_gatt_table      = agp_generic_create_gatt_table,
1342         .free_gatt_table        = agp_generic_free_gatt_table,
1343         .insert_memory          = agp_generic_insert_memory,
1344         .remove_memory          = agp_generic_remove_memory,
1345         .alloc_by_type          = agp_generic_alloc_by_type,
1346         .free_by_type           = agp_generic_free_by_type,
1347         .agp_alloc_page         = agp_generic_alloc_page,
1348         .agp_destroy_page       = agp_generic_destroy_page,
1349 };
1350
1351 static struct agp_bridge_driver intel_830mp_driver = {
1352         .owner                  = THIS_MODULE,
1353         .aperture_sizes         = intel_830mp_sizes,
1354         .size_type              = U8_APER_SIZE,
1355         .num_aperture_sizes     = 4,
1356         .configure              = intel_830mp_configure,
1357         .fetch_size             = intel_8xx_fetch_size,
1358         .cleanup                = intel_8xx_cleanup,
1359         .tlb_flush              = intel_8xx_tlbflush,
1360         .mask_memory            = agp_generic_mask_memory,
1361         .masks                  = intel_generic_masks,
1362         .agp_enable             = agp_generic_enable,
1363         .cache_flush            = global_cache_flush,
1364         .create_gatt_table      = agp_generic_create_gatt_table,
1365         .free_gatt_table        = agp_generic_free_gatt_table,
1366         .insert_memory          = agp_generic_insert_memory,
1367         .remove_memory          = agp_generic_remove_memory,
1368         .alloc_by_type          = agp_generic_alloc_by_type,
1369         .free_by_type           = agp_generic_free_by_type,
1370         .agp_alloc_page         = agp_generic_alloc_page,
1371         .agp_destroy_page       = agp_generic_destroy_page,
1372 };
1373
1374 static struct agp_bridge_driver intel_840_driver = {
1375         .owner                  = THIS_MODULE,
1376         .aperture_sizes         = intel_8xx_sizes,
1377         .size_type              = U8_APER_SIZE,
1378         .num_aperture_sizes     = 7,
1379         .configure              = intel_840_configure,
1380         .fetch_size             = intel_8xx_fetch_size,
1381         .cleanup                = intel_8xx_cleanup,
1382         .tlb_flush              = intel_8xx_tlbflush,
1383         .mask_memory            = agp_generic_mask_memory,
1384         .masks                  = intel_generic_masks,
1385         .agp_enable             = agp_generic_enable,
1386         .cache_flush            = global_cache_flush,
1387         .create_gatt_table      = agp_generic_create_gatt_table,
1388         .free_gatt_table        = agp_generic_free_gatt_table,
1389         .insert_memory          = agp_generic_insert_memory,
1390         .remove_memory          = agp_generic_remove_memory,
1391         .alloc_by_type          = agp_generic_alloc_by_type,
1392         .free_by_type           = agp_generic_free_by_type,
1393         .agp_alloc_page         = agp_generic_alloc_page,
1394         .agp_destroy_page       = agp_generic_destroy_page,
1395 };
1396
1397 static struct agp_bridge_driver intel_845_driver = {
1398         .owner                  = THIS_MODULE,
1399         .aperture_sizes         = intel_8xx_sizes,
1400         .size_type              = U8_APER_SIZE,
1401         .num_aperture_sizes     = 7,
1402         .configure              = intel_845_configure,
1403         .fetch_size             = intel_8xx_fetch_size,
1404         .cleanup                = intel_8xx_cleanup,
1405         .tlb_flush              = intel_8xx_tlbflush,
1406         .mask_memory            = agp_generic_mask_memory,
1407         .masks                  = intel_generic_masks,
1408         .agp_enable             = agp_generic_enable,
1409         .cache_flush            = global_cache_flush,
1410         .create_gatt_table      = agp_generic_create_gatt_table,
1411         .free_gatt_table        = agp_generic_free_gatt_table,
1412         .insert_memory          = agp_generic_insert_memory,
1413         .remove_memory          = agp_generic_remove_memory,
1414         .alloc_by_type          = agp_generic_alloc_by_type,
1415         .free_by_type           = agp_generic_free_by_type,
1416         .agp_alloc_page         = agp_generic_alloc_page,
1417         .agp_destroy_page       = agp_generic_destroy_page,
1418 };
1419
1420 static struct agp_bridge_driver intel_850_driver = {
1421         .owner                  = THIS_MODULE,
1422         .aperture_sizes         = intel_8xx_sizes,
1423         .size_type              = U8_APER_SIZE,
1424         .num_aperture_sizes     = 7,
1425         .configure              = intel_850_configure,
1426         .fetch_size             = intel_8xx_fetch_size,
1427         .cleanup                = intel_8xx_cleanup,
1428         .tlb_flush              = intel_8xx_tlbflush,
1429         .mask_memory            = agp_generic_mask_memory,
1430         .masks                  = intel_generic_masks,
1431         .agp_enable             = agp_generic_enable,
1432         .cache_flush            = global_cache_flush,
1433         .create_gatt_table      = agp_generic_create_gatt_table,
1434         .free_gatt_table        = agp_generic_free_gatt_table,
1435         .insert_memory          = agp_generic_insert_memory,
1436         .remove_memory          = agp_generic_remove_memory,
1437         .alloc_by_type          = agp_generic_alloc_by_type,
1438         .free_by_type           = agp_generic_free_by_type,
1439         .agp_alloc_page         = agp_generic_alloc_page,
1440         .agp_destroy_page       = agp_generic_destroy_page,
1441 };
1442
1443 static struct agp_bridge_driver intel_860_driver = {
1444         .owner                  = THIS_MODULE,
1445         .aperture_sizes         = intel_8xx_sizes,
1446         .size_type              = U8_APER_SIZE,
1447         .num_aperture_sizes     = 7,
1448         .configure              = intel_860_configure,
1449         .fetch_size             = intel_8xx_fetch_size,
1450         .cleanup                = intel_8xx_cleanup,
1451         .tlb_flush              = intel_8xx_tlbflush,
1452         .mask_memory            = agp_generic_mask_memory,
1453         .masks                  = intel_generic_masks,
1454         .agp_enable             = agp_generic_enable,
1455         .cache_flush            = global_cache_flush,
1456         .create_gatt_table      = agp_generic_create_gatt_table,
1457         .free_gatt_table        = agp_generic_free_gatt_table,
1458         .insert_memory          = agp_generic_insert_memory,
1459         .remove_memory          = agp_generic_remove_memory,
1460         .alloc_by_type          = agp_generic_alloc_by_type,
1461         .free_by_type           = agp_generic_free_by_type,
1462         .agp_alloc_page         = agp_generic_alloc_page,
1463         .agp_destroy_page       = agp_generic_destroy_page,
1464 };
1465
1466 static struct agp_bridge_driver intel_915_driver = {
1467         .owner                  = THIS_MODULE,
1468         .aperture_sizes         = intel_i830_sizes,
1469         .size_type              = FIXED_APER_SIZE,
1470         .num_aperture_sizes     = 3,
1471         .needs_scratch_page     = TRUE,
1472         .configure              = intel_i915_configure,
1473         .fetch_size             = intel_i915_fetch_size,
1474         .cleanup                = intel_i915_cleanup,
1475         .tlb_flush              = intel_i810_tlbflush,
1476         .mask_memory            = intel_i810_mask_memory,
1477         .masks                  = intel_i810_masks,
1478         .agp_enable             = intel_i810_agp_enable,
1479         .cache_flush            = global_cache_flush,
1480         .create_gatt_table      = intel_i915_create_gatt_table,
1481         .free_gatt_table        = intel_i830_free_gatt_table,
1482         .insert_memory          = intel_i915_insert_entries,
1483         .remove_memory          = intel_i915_remove_entries,
1484         .alloc_by_type          = intel_i830_alloc_by_type,
1485         .free_by_type           = intel_i810_free_by_type,
1486         .agp_alloc_page         = agp_generic_alloc_page,
1487         .agp_destroy_page       = agp_generic_destroy_page,
1488 };
1489
1490
1491 static struct agp_bridge_driver intel_7505_driver = {
1492         .owner                  = THIS_MODULE,
1493         .aperture_sizes         = intel_8xx_sizes,
1494         .size_type              = U8_APER_SIZE,
1495         .num_aperture_sizes     = 7,
1496         .configure              = intel_7505_configure,
1497         .fetch_size             = intel_8xx_fetch_size,
1498         .cleanup                = intel_8xx_cleanup,
1499         .tlb_flush              = intel_8xx_tlbflush,
1500         .mask_memory            = agp_generic_mask_memory,
1501         .masks                  = intel_generic_masks,
1502         .agp_enable             = agp_generic_enable,
1503         .cache_flush            = global_cache_flush,
1504         .create_gatt_table      = agp_generic_create_gatt_table,
1505         .free_gatt_table        = agp_generic_free_gatt_table,
1506         .insert_memory          = agp_generic_insert_memory,
1507         .remove_memory          = agp_generic_remove_memory,
1508         .alloc_by_type          = agp_generic_alloc_by_type,
1509         .free_by_type           = agp_generic_free_by_type,
1510         .agp_alloc_page         = agp_generic_alloc_page,
1511         .agp_destroy_page       = agp_generic_destroy_page,
1512 };
1513
1514 static int find_i810(u16 device)
1515 {
1516         struct pci_dev *i810_dev;
1517
1518         i810_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1519         if (!i810_dev)
1520                 return 0;
1521         intel_i810_private.i810_dev = i810_dev;
1522         return 1;
1523 }
1524
1525 static int find_i830(u16 device)
1526 {
1527         struct pci_dev *i830_dev;
1528
1529         i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1530         if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1531                 i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
1532                                 device, i830_dev);
1533         }
1534
1535         if (!i830_dev)
1536                 return 0;
1537
1538         intel_i830_private.i830_dev = i830_dev;
1539         return 1;
1540 }
1541
1542 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1543                                      const struct pci_device_id *ent)
1544 {
1545         struct agp_bridge_data *bridge;
1546         char *name = "(unknown)";
1547         u8 cap_ptr = 0;
1548         struct resource *r;
1549
1550         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1551
1552         bridge = agp_alloc_bridge();
1553         if (!bridge)
1554                 return -ENOMEM;
1555
1556         switch (pdev->device) {
1557         case PCI_DEVICE_ID_INTEL_82443LX_0:
1558                 bridge->driver = &intel_generic_driver;
1559                 name = "440LX";
1560                 break;
1561         case PCI_DEVICE_ID_INTEL_82443BX_0:
1562                 bridge->driver = &intel_generic_driver;
1563                 name = "440BX";
1564                 break;
1565         case PCI_DEVICE_ID_INTEL_82443GX_0:
1566                 bridge->driver = &intel_generic_driver;
1567                 name = "440GX";
1568                 break;
1569         case PCI_DEVICE_ID_INTEL_82810_MC1:
1570                 name = "i810";
1571                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1))
1572                         goto fail;
1573                 bridge->driver = &intel_810_driver;
1574                 break;
1575         case PCI_DEVICE_ID_INTEL_82810_MC3:
1576                 name = "i810 DC100";
1577                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3))
1578                         goto fail;
1579                 bridge->driver = &intel_810_driver;
1580                 break;
1581         case PCI_DEVICE_ID_INTEL_82810E_MC:
1582                 name = "i810 E";
1583                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG))
1584                         goto fail;
1585                 bridge->driver = &intel_810_driver;
1586                 break;
1587          case PCI_DEVICE_ID_INTEL_82815_MC:
1588                 /*
1589                  * The i815 can operate either as an i810 style
1590                  * integrated device, or as an AGP4X motherboard.
1591                  */
1592                 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC))
1593                         bridge->driver = &intel_810_driver;
1594                 else
1595                         bridge->driver = &intel_815_driver;
1596                 name = "i815";
1597                 break;
1598         case PCI_DEVICE_ID_INTEL_82820_HB:
1599         case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1600                 bridge->driver = &intel_820_driver;
1601                 name = "i820";
1602                 break;
1603         case PCI_DEVICE_ID_INTEL_82830_HB:
1604                 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1605                         bridge->driver = &intel_830_driver;
1606                 } else {
1607                         bridge->driver = &intel_830mp_driver;
1608                 }
1609                 name = "830M";
1610                 break;
1611         case PCI_DEVICE_ID_INTEL_82840_HB:
1612                 bridge->driver = &intel_840_driver;
1613                 name = "i840";
1614                 break;
1615         case PCI_DEVICE_ID_INTEL_82845_HB:
1616                 bridge->driver = &intel_845_driver;
1617                 name = "i845";
1618                 break;
1619         case PCI_DEVICE_ID_INTEL_82845G_HB:
1620                 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1621                         bridge->driver = &intel_830_driver;
1622                 } else {
1623                         bridge->driver = &intel_845_driver;
1624                 }
1625                 name = "845G";
1626                 break;
1627         case PCI_DEVICE_ID_INTEL_82850_HB:
1628                 bridge->driver = &intel_850_driver;
1629                 name = "i850";
1630                 break;
1631         case PCI_DEVICE_ID_INTEL_82855PM_HB:
1632                 bridge->driver = &intel_845_driver;
1633                 name = "855PM";
1634                 break;
1635         case PCI_DEVICE_ID_INTEL_82855GM_HB:
1636                 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1637                         bridge->driver = &intel_830_driver;
1638                         name = "855";
1639                 } else {
1640                         bridge->driver = &intel_845_driver;
1641                         name = "855GM";
1642                 }
1643                 break;
1644         case PCI_DEVICE_ID_INTEL_82860_HB:
1645                 bridge->driver = &intel_860_driver;
1646                 name = "i860";
1647                 break;
1648         case PCI_DEVICE_ID_INTEL_82865_HB:
1649                 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1650                         bridge->driver = &intel_830_driver;
1651                 } else {
1652                         bridge->driver = &intel_845_driver;
1653                 }
1654                 name = "865";
1655                 break;
1656         case PCI_DEVICE_ID_INTEL_82875_HB:
1657                 bridge->driver = &intel_845_driver;
1658                 name = "i875";
1659                 break;
1660         case PCI_DEVICE_ID_INTEL_82915G_HB:
1661                 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG)) {
1662                         bridge->driver = &intel_915_driver;
1663                 } else {
1664                         bridge->driver = &intel_845_driver;
1665                 }
1666                 name = "915G";
1667                 break;
1668         case PCI_DEVICE_ID_INTEL_82915GM_HB:
1669                 if (find_i830(PCI_DEVICE_ID_INTEL_82915GM_IG)) {
1670                         bridge->driver = &intel_915_driver;
1671                 } else {
1672                         bridge->driver = &intel_845_driver;
1673                 }
1674                 name = "915GM";
1675                 break;
1676         case PCI_DEVICE_ID_INTEL_82945G_HB:
1677                 if (find_i830(PCI_DEVICE_ID_INTEL_82945G_IG)) {
1678                         bridge->driver = &intel_915_driver;
1679                 } else {
1680                         bridge->driver = &intel_845_driver;
1681                 }
1682                 name = "945G";
1683                 break;
1684         case PCI_DEVICE_ID_INTEL_7505_0:
1685                 bridge->driver = &intel_7505_driver;
1686                 name = "E7505";
1687                 break;
1688         case PCI_DEVICE_ID_INTEL_7205_0:
1689                 bridge->driver = &intel_7505_driver;
1690                 name = "E7205";
1691                 break;
1692         default:
1693                 if (cap_ptr)
1694                         printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1695                             pdev->device);
1696                 agp_put_bridge(bridge);
1697                 return -ENODEV;
1698         };
1699
1700         bridge->dev = pdev;
1701         bridge->capndx = cap_ptr;
1702
1703         if (bridge->driver == &intel_810_driver)
1704                 bridge->dev_private_data = &intel_i810_private;
1705         else if (bridge->driver == &intel_830_driver)
1706                 bridge->dev_private_data = &intel_i830_private;
1707
1708         printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1709
1710         /*
1711         * The following fixes the case where the BIOS has "forgotten" to
1712         * provide an address range for the GART.
1713         * 20030610 - hamish@zot.org
1714         */
1715         r = &pdev->resource[0];
1716         if (!r->start && r->end) {
1717                 if(pci_assign_resource(pdev, 0)) {
1718                         printk(KERN_ERR PFX "could not assign resource 0\n");
1719                         agp_put_bridge(bridge);
1720                         return -ENODEV;
1721                 }
1722         }
1723
1724         /*
1725         * If the device has not been properly setup, the following will catch
1726         * the problem and should stop the system from crashing.
1727         * 20030610 - hamish@zot.org
1728         */
1729         if (pci_enable_device(pdev)) {
1730                 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1731                 agp_put_bridge(bridge);
1732                 return -ENODEV;
1733         }
1734
1735         /* Fill in the mode register */
1736         if (cap_ptr) {
1737                 pci_read_config_dword(pdev,
1738                                 bridge->capndx+PCI_AGP_STATUS,
1739                                 &bridge->mode);
1740         }
1741
1742         pci_set_drvdata(pdev, bridge);
1743         return agp_add_bridge(bridge);
1744
1745 fail:
1746         printk(KERN_ERR PFX "Detected an Intel %s chipset, "
1747                 "but could not find the secondary device.\n", name);
1748         agp_put_bridge(bridge);
1749         return -ENODEV;
1750 }
1751
1752 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1753 {
1754         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1755
1756         agp_remove_bridge(bridge);
1757
1758         if (intel_i810_private.i810_dev)
1759                 pci_dev_put(intel_i810_private.i810_dev);
1760         if (intel_i830_private.i830_dev)
1761                 pci_dev_put(intel_i830_private.i830_dev);
1762
1763         agp_put_bridge(bridge);
1764 }
1765
1766 static int agp_intel_resume(struct pci_dev *pdev)
1767 {
1768         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1769
1770         pci_restore_state(pdev);
1771
1772         if (bridge->driver == &intel_generic_driver)
1773                 intel_configure();
1774         else if (bridge->driver == &intel_850_driver)
1775                 intel_850_configure();
1776         else if (bridge->driver == &intel_845_driver)
1777                 intel_845_configure();
1778         else if (bridge->driver == &intel_830mp_driver)
1779                 intel_830mp_configure();
1780         else if (bridge->driver == &intel_915_driver)
1781                 intel_i915_configure();
1782         else if (bridge->driver == &intel_830_driver)
1783                 intel_i830_configure();
1784         else if (bridge->driver == &intel_810_driver)
1785                 intel_i810_configure();
1786
1787         return 0;
1788 }
1789
1790 static struct pci_device_id agp_intel_pci_table[] = {
1791 #define ID(x)                                           \
1792         {                                               \
1793         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
1794         .class_mask     = ~0,                           \
1795         .vendor         = PCI_VENDOR_ID_INTEL,          \
1796         .device         = x,                            \
1797         .subvendor      = PCI_ANY_ID,                   \
1798         .subdevice      = PCI_ANY_ID,                   \
1799         }
1800         ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1801         ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1802         ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1803         ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1804         ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1805         ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1806         ID(PCI_DEVICE_ID_INTEL_82815_MC),
1807         ID(PCI_DEVICE_ID_INTEL_82820_HB),
1808         ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1809         ID(PCI_DEVICE_ID_INTEL_82830_HB),
1810         ID(PCI_DEVICE_ID_INTEL_82840_HB),
1811         ID(PCI_DEVICE_ID_INTEL_82845_HB),
1812         ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1813         ID(PCI_DEVICE_ID_INTEL_82850_HB),
1814         ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1815         ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1816         ID(PCI_DEVICE_ID_INTEL_82860_HB),
1817         ID(PCI_DEVICE_ID_INTEL_82865_HB),
1818         ID(PCI_DEVICE_ID_INTEL_82875_HB),
1819         ID(PCI_DEVICE_ID_INTEL_7505_0),
1820         ID(PCI_DEVICE_ID_INTEL_7205_0),
1821         ID(PCI_DEVICE_ID_INTEL_82915G_HB),
1822         ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
1823         ID(PCI_DEVICE_ID_INTEL_82945G_HB),
1824         { }
1825 };
1826
1827 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1828
1829 static struct pci_driver agp_intel_pci_driver = {
1830         .name           = "agpgart-intel",
1831         .id_table       = agp_intel_pci_table,
1832         .probe          = agp_intel_probe,
1833         .remove         = __devexit_p(agp_intel_remove),
1834         .resume         = agp_intel_resume,
1835 };
1836
1837 static int __init agp_intel_init(void)
1838 {
1839         if (agp_off)
1840                 return -EINVAL;
1841         return pci_register_driver(&agp_intel_pci_driver);
1842 }
1843
1844 static void __exit agp_intel_cleanup(void)
1845 {
1846         pci_unregister_driver(&agp_intel_pci_driver);
1847 }
1848
1849 module_init(agp_intel_init);
1850 module_exit(agp_intel_cleanup);
1851
1852 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1853 MODULE_LICENSE("GPL and additional rights");