2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
63 /* debounce timing parameters in msecs { interval, duration, timeout } */
64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
68 static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71 static unsigned int ata_dev_set_AN(struct ata_device *dev, u8 enable);
72 static void ata_dev_xfermask(struct ata_device *dev);
73 static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
75 unsigned int ata_print_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
88 int atapi_passthru16 = 1;
89 module_param(atapi_passthru16, int, 0444);
90 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
93 module_param_named(fua, libata_fua, int, 0444);
94 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
96 static int ata_ignore_hpa = 0;
97 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
98 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
100 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
101 module_param(ata_probe_timeout, int, 0444);
102 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
104 int libata_noacpi = 1;
105 module_param_named(noacpi, libata_noacpi, int, 0444);
106 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
108 MODULE_AUTHOR("Jeff Garzik");
109 MODULE_DESCRIPTION("Library module for ATA devices");
110 MODULE_LICENSE("GPL");
111 MODULE_VERSION(DRV_VERSION);
115 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
116 * @tf: Taskfile to convert
117 * @pmp: Port multiplier port
118 * @is_cmd: This FIS is for command
119 * @fis: Buffer into which data will output
121 * Converts a standard ATA taskfile to a Serial ATA
122 * FIS structure (Register - Host to Device).
125 * Inherited from caller.
127 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
129 fis[0] = 0x27; /* Register - Host to Device FIS */
130 fis[1] = pmp & 0xf; /* Port multiplier number*/
132 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
134 fis[2] = tf->command;
135 fis[3] = tf->feature;
142 fis[8] = tf->hob_lbal;
143 fis[9] = tf->hob_lbam;
144 fis[10] = tf->hob_lbah;
145 fis[11] = tf->hob_feature;
148 fis[13] = tf->hob_nsect;
159 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
160 * @fis: Buffer from which data will be input
161 * @tf: Taskfile to output
163 * Converts a serial ATA FIS structure to a standard ATA taskfile.
166 * Inherited from caller.
169 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
171 tf->command = fis[2]; /* status */
172 tf->feature = fis[3]; /* error */
179 tf->hob_lbal = fis[8];
180 tf->hob_lbam = fis[9];
181 tf->hob_lbah = fis[10];
184 tf->hob_nsect = fis[13];
187 static const u8 ata_rw_cmds[] = {
191 ATA_CMD_READ_MULTI_EXT,
192 ATA_CMD_WRITE_MULTI_EXT,
196 ATA_CMD_WRITE_MULTI_FUA_EXT,
200 ATA_CMD_PIO_READ_EXT,
201 ATA_CMD_PIO_WRITE_EXT,
214 ATA_CMD_WRITE_FUA_EXT
218 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
219 * @tf: command to examine and configure
220 * @dev: device tf belongs to
222 * Examine the device configuration and tf->flags to calculate
223 * the proper read/write commands and protocol to use.
228 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
232 int index, fua, lba48, write;
234 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
235 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
236 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
238 if (dev->flags & ATA_DFLAG_PIO) {
239 tf->protocol = ATA_PROT_PIO;
240 index = dev->multi_count ? 0 : 8;
241 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
242 /* Unable to use DMA due to host limitation */
243 tf->protocol = ATA_PROT_PIO;
244 index = dev->multi_count ? 0 : 8;
246 tf->protocol = ATA_PROT_DMA;
250 cmd = ata_rw_cmds[index + fua + lba48 + write];
259 * ata_tf_read_block - Read block address from ATA taskfile
260 * @tf: ATA taskfile of interest
261 * @dev: ATA device @tf belongs to
266 * Read block address from @tf. This function can handle all
267 * three address formats - LBA, LBA48 and CHS. tf->protocol and
268 * flags select the address format to use.
271 * Block address read from @tf.
273 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
277 if (tf->flags & ATA_TFLAG_LBA) {
278 if (tf->flags & ATA_TFLAG_LBA48) {
279 block |= (u64)tf->hob_lbah << 40;
280 block |= (u64)tf->hob_lbam << 32;
281 block |= tf->hob_lbal << 24;
283 block |= (tf->device & 0xf) << 24;
285 block |= tf->lbah << 16;
286 block |= tf->lbam << 8;
291 cyl = tf->lbam | (tf->lbah << 8);
292 head = tf->device & 0xf;
295 block = (cyl * dev->heads + head) * dev->sectors + sect;
302 * ata_build_rw_tf - Build ATA taskfile for given read/write request
303 * @tf: Target ATA taskfile
304 * @dev: ATA device @tf belongs to
305 * @block: Block address
306 * @n_block: Number of blocks
307 * @tf_flags: RW/FUA etc...
313 * Build ATA taskfile @tf for read/write request described by
314 * @block, @n_block, @tf_flags and @tag on @dev.
318 * 0 on success, -ERANGE if the request is too large for @dev,
319 * -EINVAL if the request is invalid.
321 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
322 u64 block, u32 n_block, unsigned int tf_flags,
325 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
326 tf->flags |= tf_flags;
328 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
330 if (!lba_48_ok(block, n_block))
333 tf->protocol = ATA_PROT_NCQ;
334 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
336 if (tf->flags & ATA_TFLAG_WRITE)
337 tf->command = ATA_CMD_FPDMA_WRITE;
339 tf->command = ATA_CMD_FPDMA_READ;
341 tf->nsect = tag << 3;
342 tf->hob_feature = (n_block >> 8) & 0xff;
343 tf->feature = n_block & 0xff;
345 tf->hob_lbah = (block >> 40) & 0xff;
346 tf->hob_lbam = (block >> 32) & 0xff;
347 tf->hob_lbal = (block >> 24) & 0xff;
348 tf->lbah = (block >> 16) & 0xff;
349 tf->lbam = (block >> 8) & 0xff;
350 tf->lbal = block & 0xff;
353 if (tf->flags & ATA_TFLAG_FUA)
354 tf->device |= 1 << 7;
355 } else if (dev->flags & ATA_DFLAG_LBA) {
356 tf->flags |= ATA_TFLAG_LBA;
358 if (lba_28_ok(block, n_block)) {
360 tf->device |= (block >> 24) & 0xf;
361 } else if (lba_48_ok(block, n_block)) {
362 if (!(dev->flags & ATA_DFLAG_LBA48))
366 tf->flags |= ATA_TFLAG_LBA48;
368 tf->hob_nsect = (n_block >> 8) & 0xff;
370 tf->hob_lbah = (block >> 40) & 0xff;
371 tf->hob_lbam = (block >> 32) & 0xff;
372 tf->hob_lbal = (block >> 24) & 0xff;
374 /* request too large even for LBA48 */
377 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
380 tf->nsect = n_block & 0xff;
382 tf->lbah = (block >> 16) & 0xff;
383 tf->lbam = (block >> 8) & 0xff;
384 tf->lbal = block & 0xff;
386 tf->device |= ATA_LBA;
389 u32 sect, head, cyl, track;
391 /* The request -may- be too large for CHS addressing. */
392 if (!lba_28_ok(block, n_block))
395 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
398 /* Convert LBA to CHS */
399 track = (u32)block / dev->sectors;
400 cyl = track / dev->heads;
401 head = track % dev->heads;
402 sect = (u32)block % dev->sectors + 1;
404 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
405 (u32)block, track, cyl, head, sect);
407 /* Check whether the converted CHS can fit.
411 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
414 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
425 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
426 * @pio_mask: pio_mask
427 * @mwdma_mask: mwdma_mask
428 * @udma_mask: udma_mask
430 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
431 * unsigned int xfer_mask.
439 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
440 unsigned int mwdma_mask,
441 unsigned int udma_mask)
443 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
444 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
445 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
449 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
450 * @xfer_mask: xfer_mask to unpack
451 * @pio_mask: resulting pio_mask
452 * @mwdma_mask: resulting mwdma_mask
453 * @udma_mask: resulting udma_mask
455 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
456 * Any NULL distination masks will be ignored.
458 static void ata_unpack_xfermask(unsigned int xfer_mask,
459 unsigned int *pio_mask,
460 unsigned int *mwdma_mask,
461 unsigned int *udma_mask)
464 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
466 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
468 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
471 static const struct ata_xfer_ent {
475 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
476 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
477 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
482 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
483 * @xfer_mask: xfer_mask of interest
485 * Return matching XFER_* value for @xfer_mask. Only the highest
486 * bit of @xfer_mask is considered.
492 * Matching XFER_* value, 0 if no match found.
494 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
496 int highbit = fls(xfer_mask) - 1;
497 const struct ata_xfer_ent *ent;
499 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
500 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
501 return ent->base + highbit - ent->shift;
506 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
507 * @xfer_mode: XFER_* of interest
509 * Return matching xfer_mask for @xfer_mode.
515 * Matching xfer_mask, 0 if no match found.
517 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
519 const struct ata_xfer_ent *ent;
521 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
522 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
523 return 1 << (ent->shift + xfer_mode - ent->base);
528 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
529 * @xfer_mode: XFER_* of interest
531 * Return matching xfer_shift for @xfer_mode.
537 * Matching xfer_shift, -1 if no match found.
539 static int ata_xfer_mode2shift(unsigned int xfer_mode)
541 const struct ata_xfer_ent *ent;
543 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
544 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
550 * ata_mode_string - convert xfer_mask to string
551 * @xfer_mask: mask of bits supported; only highest bit counts.
553 * Determine string which represents the highest speed
554 * (highest bit in @modemask).
560 * Constant C string representing highest speed listed in
561 * @mode_mask, or the constant C string "<n/a>".
563 static const char *ata_mode_string(unsigned int xfer_mask)
565 static const char * const xfer_mode_str[] = {
589 highbit = fls(xfer_mask) - 1;
590 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
591 return xfer_mode_str[highbit];
595 static const char *sata_spd_string(unsigned int spd)
597 static const char * const spd_str[] = {
602 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
604 return spd_str[spd - 1];
607 void ata_dev_disable(struct ata_device *dev)
609 if (ata_dev_enabled(dev)) {
610 if (ata_msg_drv(dev->link->ap))
611 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
612 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
619 * ata_devchk - PATA device presence detection
620 * @ap: ATA channel to examine
621 * @device: Device to examine (starting at zero)
623 * This technique was originally described in
624 * Hale Landis's ATADRVR (www.ata-atapi.com), and
625 * later found its way into the ATA/ATAPI spec.
627 * Write a pattern to the ATA shadow registers,
628 * and if a device is present, it will respond by
629 * correctly storing and echoing back the
630 * ATA shadow register contents.
636 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
638 struct ata_ioports *ioaddr = &ap->ioaddr;
641 ap->ops->dev_select(ap, device);
643 iowrite8(0x55, ioaddr->nsect_addr);
644 iowrite8(0xaa, ioaddr->lbal_addr);
646 iowrite8(0xaa, ioaddr->nsect_addr);
647 iowrite8(0x55, ioaddr->lbal_addr);
649 iowrite8(0x55, ioaddr->nsect_addr);
650 iowrite8(0xaa, ioaddr->lbal_addr);
652 nsect = ioread8(ioaddr->nsect_addr);
653 lbal = ioread8(ioaddr->lbal_addr);
655 if ((nsect == 0x55) && (lbal == 0xaa))
656 return 1; /* we found a device */
658 return 0; /* nothing found */
662 * ata_dev_classify - determine device type based on ATA-spec signature
663 * @tf: ATA taskfile register set for device to be identified
665 * Determine from taskfile register contents whether a device is
666 * ATA or ATAPI, as per "Signature and persistence" section
667 * of ATA/PI spec (volume 1, sect 5.14).
673 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
674 * the event of failure.
677 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
679 /* Apple's open source Darwin code hints that some devices only
680 * put a proper signature into the LBA mid/high registers,
681 * So, we only check those. It's sufficient for uniqueness.
684 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
685 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
686 DPRINTK("found ATA device by sig\n");
690 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
691 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
692 DPRINTK("found ATAPI device by sig\n");
693 return ATA_DEV_ATAPI;
696 DPRINTK("unknown device\n");
697 return ATA_DEV_UNKNOWN;
701 * ata_dev_try_classify - Parse returned ATA device signature
702 * @dev: ATA device to classify (starting at zero)
703 * @present: device seems present
704 * @r_err: Value of error register on completion
706 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
707 * an ATA/ATAPI-defined set of values is placed in the ATA
708 * shadow registers, indicating the results of device detection
711 * Select the ATA device, and read the values from the ATA shadow
712 * registers. Then parse according to the Error register value,
713 * and the spec-defined values examined by ata_dev_classify().
719 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
721 unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
724 struct ata_port *ap = dev->link->ap;
725 struct ata_taskfile tf;
729 ap->ops->dev_select(ap, dev->devno);
731 memset(&tf, 0, sizeof(tf));
733 ap->ops->tf_read(ap, &tf);
738 /* see if device passed diags: if master then continue and warn later */
739 if (err == 0 && dev->devno == 0)
740 /* diagnostic fail : do nothing _YET_ */
741 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
744 else if ((dev->devno == 0) && (err == 0x81))
749 /* determine if device is ATA or ATAPI */
750 class = ata_dev_classify(&tf);
752 if (class == ATA_DEV_UNKNOWN) {
753 /* If the device failed diagnostic, it's likely to
754 * have reported incorrect device signature too.
755 * Assume ATA device if the device seems present but
756 * device signature is invalid with diagnostic
759 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
762 class = ATA_DEV_NONE;
763 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
764 class = ATA_DEV_NONE;
770 * ata_id_string - Convert IDENTIFY DEVICE page into string
771 * @id: IDENTIFY DEVICE results we will examine
772 * @s: string into which data is output
773 * @ofs: offset into identify device page
774 * @len: length of string to return. must be an even number.
776 * The strings in the IDENTIFY DEVICE page are broken up into
777 * 16-bit chunks. Run through the string, and output each
778 * 8-bit chunk linearly, regardless of platform.
784 void ata_id_string(const u16 *id, unsigned char *s,
785 unsigned int ofs, unsigned int len)
804 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
805 * @id: IDENTIFY DEVICE results we will examine
806 * @s: string into which data is output
807 * @ofs: offset into identify device page
808 * @len: length of string to return. must be an odd number.
810 * This function is identical to ata_id_string except that it
811 * trims trailing spaces and terminates the resulting string with
812 * null. @len must be actual maximum length (even number) + 1.
817 void ata_id_c_string(const u16 *id, unsigned char *s,
818 unsigned int ofs, unsigned int len)
824 ata_id_string(id, s, ofs, len - 1);
826 p = s + strnlen(s, len - 1);
827 while (p > s && p[-1] == ' ')
832 static u64 ata_id_n_sectors(const u16 *id)
834 if (ata_id_has_lba(id)) {
835 if (ata_id_has_lba48(id))
836 return ata_id_u64(id, 100);
838 return ata_id_u32(id, 60);
840 if (ata_id_current_chs_valid(id))
841 return ata_id_u32(id, 57);
843 return id[1] * id[3] * id[6];
847 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
851 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
852 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
853 sectors |= (tf->hob_lbal & 0xff) << 24;
854 sectors |= (tf->lbah & 0xff) << 16;
855 sectors |= (tf->lbam & 0xff) << 8;
856 sectors |= (tf->lbal & 0xff);
861 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
865 sectors |= (tf->device & 0x0f) << 24;
866 sectors |= (tf->lbah & 0xff) << 16;
867 sectors |= (tf->lbam & 0xff) << 8;
868 sectors |= (tf->lbal & 0xff);
874 * ata_read_native_max_address - Read native max address
875 * @dev: target device
876 * @max_sectors: out parameter for the result native max address
878 * Perform an LBA48 or LBA28 native size query upon the device in
882 * 0 on success, -EACCES if command is aborted by the drive.
883 * -EIO on other errors.
885 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
887 unsigned int err_mask;
888 struct ata_taskfile tf;
889 int lba48 = ata_id_has_lba48(dev->id);
891 ata_tf_init(dev, &tf);
893 /* always clear all address registers */
894 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
897 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
898 tf.flags |= ATA_TFLAG_LBA48;
900 tf.command = ATA_CMD_READ_NATIVE_MAX;
902 tf.protocol |= ATA_PROT_NODATA;
903 tf.device |= ATA_LBA;
905 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
907 ata_dev_printk(dev, KERN_WARNING, "failed to read native "
908 "max address (err_mask=0x%x)\n", err_mask);
909 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
915 *max_sectors = ata_tf_to_lba48(&tf);
917 *max_sectors = ata_tf_to_lba(&tf);
923 * ata_set_max_sectors - Set max sectors
924 * @dev: target device
925 * @new_sectors: new max sectors value to set for the device
927 * Set max sectors of @dev to @new_sectors.
930 * 0 on success, -EACCES if command is aborted or denied (due to
931 * previous non-volatile SET_MAX) by the drive. -EIO on other
934 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
936 unsigned int err_mask;
937 struct ata_taskfile tf;
938 int lba48 = ata_id_has_lba48(dev->id);
942 ata_tf_init(dev, &tf);
944 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
947 tf.command = ATA_CMD_SET_MAX_EXT;
948 tf.flags |= ATA_TFLAG_LBA48;
950 tf.hob_lbal = (new_sectors >> 24) & 0xff;
951 tf.hob_lbam = (new_sectors >> 32) & 0xff;
952 tf.hob_lbah = (new_sectors >> 40) & 0xff;
954 tf.command = ATA_CMD_SET_MAX;
956 tf.protocol |= ATA_PROT_NODATA;
957 tf.device |= ATA_LBA;
959 tf.lbal = (new_sectors >> 0) & 0xff;
960 tf.lbam = (new_sectors >> 8) & 0xff;
961 tf.lbah = (new_sectors >> 16) & 0xff;
963 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
965 ata_dev_printk(dev, KERN_WARNING, "failed to set "
966 "max address (err_mask=0x%x)\n", err_mask);
967 if (err_mask == AC_ERR_DEV &&
968 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
977 * ata_hpa_resize - Resize a device with an HPA set
978 * @dev: Device to resize
980 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
981 * it if required to the full size of the media. The caller must check
982 * the drive has the HPA feature set enabled.
985 * 0 on success, -errno on failure.
987 static int ata_hpa_resize(struct ata_device *dev)
989 struct ata_eh_context *ehc = &dev->link->eh_context;
990 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
991 u64 sectors = ata_id_n_sectors(dev->id);
995 /* do we need to do it? */
996 if (dev->class != ATA_DEV_ATA ||
997 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
998 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
1001 /* read native max address */
1002 rc = ata_read_native_max_address(dev, &native_sectors);
1004 /* If HPA isn't going to be unlocked, skip HPA
1005 * resizing from the next try.
1007 if (!ata_ignore_hpa) {
1008 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1009 "broken, will skip HPA handling\n");
1010 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1012 /* we can continue if device aborted the command */
1020 /* nothing to do? */
1021 if (native_sectors <= sectors || !ata_ignore_hpa) {
1022 if (!print_info || native_sectors == sectors)
1025 if (native_sectors > sectors)
1026 ata_dev_printk(dev, KERN_INFO,
1027 "HPA detected: current %llu, native %llu\n",
1028 (unsigned long long)sectors,
1029 (unsigned long long)native_sectors);
1030 else if (native_sectors < sectors)
1031 ata_dev_printk(dev, KERN_WARNING,
1032 "native sectors (%llu) is smaller than "
1034 (unsigned long long)native_sectors,
1035 (unsigned long long)sectors);
1039 /* let's unlock HPA */
1040 rc = ata_set_max_sectors(dev, native_sectors);
1041 if (rc == -EACCES) {
1042 /* if device aborted the command, skip HPA resizing */
1043 ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
1044 "(%llu -> %llu), skipping HPA handling\n",
1045 (unsigned long long)sectors,
1046 (unsigned long long)native_sectors);
1047 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1052 /* re-read IDENTIFY data */
1053 rc = ata_dev_reread_id(dev, 0);
1055 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
1056 "data after HPA resizing\n");
1061 u64 new_sectors = ata_id_n_sectors(dev->id);
1062 ata_dev_printk(dev, KERN_INFO,
1063 "HPA unlocked: %llu -> %llu, native %llu\n",
1064 (unsigned long long)sectors,
1065 (unsigned long long)new_sectors,
1066 (unsigned long long)native_sectors);
1073 * ata_id_to_dma_mode - Identify DMA mode from id block
1074 * @dev: device to identify
1075 * @unknown: mode to assume if we cannot tell
1077 * Set up the timing values for the device based upon the identify
1078 * reported values for the DMA mode. This function is used by drivers
1079 * which rely upon firmware configured modes, but wish to report the
1080 * mode correctly when possible.
1082 * In addition we emit similarly formatted messages to the default
1083 * ata_dev_set_mode handler, in order to provide consistency of
1087 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
1092 /* Pack the DMA modes */
1093 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
1094 if (dev->id[53] & 0x04)
1095 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
1097 /* Select the mode in use */
1098 mode = ata_xfer_mask2mode(mask);
1101 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1102 ata_mode_string(mask));
1104 /* SWDMA perhaps ? */
1106 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
1109 /* Configure the device reporting */
1110 dev->xfer_mode = mode;
1111 dev->xfer_shift = ata_xfer_mode2shift(mode);
1115 * ata_noop_dev_select - Select device 0/1 on ATA bus
1116 * @ap: ATA channel to manipulate
1117 * @device: ATA device (numbered from zero) to select
1119 * This function performs no actual function.
1121 * May be used as the dev_select() entry in ata_port_operations.
1126 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
1132 * ata_std_dev_select - Select device 0/1 on ATA bus
1133 * @ap: ATA channel to manipulate
1134 * @device: ATA device (numbered from zero) to select
1136 * Use the method defined in the ATA specification to
1137 * make either device 0, or device 1, active on the
1138 * ATA channel. Works with both PIO and MMIO.
1140 * May be used as the dev_select() entry in ata_port_operations.
1146 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1151 tmp = ATA_DEVICE_OBS;
1153 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1155 iowrite8(tmp, ap->ioaddr.device_addr);
1156 ata_pause(ap); /* needed; also flushes, for mmio */
1160 * ata_dev_select - Select device 0/1 on ATA bus
1161 * @ap: ATA channel to manipulate
1162 * @device: ATA device (numbered from zero) to select
1163 * @wait: non-zero to wait for Status register BSY bit to clear
1164 * @can_sleep: non-zero if context allows sleeping
1166 * Use the method defined in the ATA specification to
1167 * make either device 0, or device 1, active on the
1170 * This is a high-level version of ata_std_dev_select(),
1171 * which additionally provides the services of inserting
1172 * the proper pauses and status polling, where needed.
1178 void ata_dev_select(struct ata_port *ap, unsigned int device,
1179 unsigned int wait, unsigned int can_sleep)
1181 if (ata_msg_probe(ap))
1182 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1183 "device %u, wait %u\n", device, wait);
1188 ap->ops->dev_select(ap, device);
1191 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
1198 * ata_dump_id - IDENTIFY DEVICE info debugging output
1199 * @id: IDENTIFY DEVICE page to dump
1201 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1208 static inline void ata_dump_id(const u16 *id)
1210 DPRINTK("49==0x%04x "
1220 DPRINTK("80==0x%04x "
1230 DPRINTK("88==0x%04x "
1237 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1238 * @id: IDENTIFY data to compute xfer mask from
1240 * Compute the xfermask for this device. This is not as trivial
1241 * as it seems if we must consider early devices correctly.
1243 * FIXME: pre IDE drive timing (do we care ?).
1251 static unsigned int ata_id_xfermask(const u16 *id)
1253 unsigned int pio_mask, mwdma_mask, udma_mask;
1255 /* Usual case. Word 53 indicates word 64 is valid */
1256 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1257 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1261 /* If word 64 isn't valid then Word 51 high byte holds
1262 * the PIO timing number for the maximum. Turn it into
1265 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1266 if (mode < 5) /* Valid PIO range */
1267 pio_mask = (2 << mode) - 1;
1271 /* But wait.. there's more. Design your standards by
1272 * committee and you too can get a free iordy field to
1273 * process. However its the speeds not the modes that
1274 * are supported... Note drivers using the timing API
1275 * will get this right anyway
1279 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1281 if (ata_id_is_cfa(id)) {
1283 * Process compact flash extended modes
1285 int pio = id[163] & 0x7;
1286 int dma = (id[163] >> 3) & 7;
1289 pio_mask |= (1 << 5);
1291 pio_mask |= (1 << 6);
1293 mwdma_mask |= (1 << 3);
1295 mwdma_mask |= (1 << 4);
1299 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1300 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1302 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1306 * ata_port_queue_task - Queue port_task
1307 * @ap: The ata_port to queue port_task for
1308 * @fn: workqueue function to be scheduled
1309 * @data: data for @fn to use
1310 * @delay: delay time for workqueue function
1312 * Schedule @fn(@data) for execution after @delay jiffies using
1313 * port_task. There is one port_task per port and it's the
1314 * user(low level driver)'s responsibility to make sure that only
1315 * one task is active at any given time.
1317 * libata core layer takes care of synchronization between
1318 * port_task and EH. ata_port_queue_task() may be ignored for EH
1322 * Inherited from caller.
1324 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1325 unsigned long delay)
1327 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1328 ap->port_task_data = data;
1330 /* may fail if ata_port_flush_task() in progress */
1331 queue_delayed_work(ata_wq, &ap->port_task, delay);
1335 * ata_port_flush_task - Flush port_task
1336 * @ap: The ata_port to flush port_task for
1338 * After this function completes, port_task is guranteed not to
1339 * be running or scheduled.
1342 * Kernel thread context (may sleep)
1344 void ata_port_flush_task(struct ata_port *ap)
1348 cancel_rearming_delayed_work(&ap->port_task);
1350 if (ata_msg_ctl(ap))
1351 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1354 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1356 struct completion *waiting = qc->private_data;
1362 * ata_exec_internal_sg - execute libata internal command
1363 * @dev: Device to which the command is sent
1364 * @tf: Taskfile registers for the command and the result
1365 * @cdb: CDB for packet command
1366 * @dma_dir: Data tranfer direction of the command
1367 * @sg: sg list for the data buffer of the command
1368 * @n_elem: Number of sg entries
1370 * Executes libata internal command with timeout. @tf contains
1371 * command on entry and result on return. Timeout and error
1372 * conditions are reported via return value. No recovery action
1373 * is taken after a command times out. It's caller's duty to
1374 * clean up after timeout.
1377 * None. Should be called with kernel context, might sleep.
1380 * Zero on success, AC_ERR_* mask on failure
1382 unsigned ata_exec_internal_sg(struct ata_device *dev,
1383 struct ata_taskfile *tf, const u8 *cdb,
1384 int dma_dir, struct scatterlist *sg,
1385 unsigned int n_elem)
1387 struct ata_link *link = dev->link;
1388 struct ata_port *ap = link->ap;
1389 u8 command = tf->command;
1390 struct ata_queued_cmd *qc;
1391 unsigned int tag, preempted_tag;
1392 u32 preempted_sactive, preempted_qc_active;
1393 DECLARE_COMPLETION_ONSTACK(wait);
1394 unsigned long flags;
1395 unsigned int err_mask;
1398 spin_lock_irqsave(ap->lock, flags);
1400 /* no internal command while frozen */
1401 if (ap->pflags & ATA_PFLAG_FROZEN) {
1402 spin_unlock_irqrestore(ap->lock, flags);
1403 return AC_ERR_SYSTEM;
1406 /* initialize internal qc */
1408 /* XXX: Tag 0 is used for drivers with legacy EH as some
1409 * drivers choke if any other tag is given. This breaks
1410 * ata_tag_internal() test for those drivers. Don't use new
1411 * EH stuff without converting to it.
1413 if (ap->ops->error_handler)
1414 tag = ATA_TAG_INTERNAL;
1418 if (test_and_set_bit(tag, &ap->qc_allocated))
1420 qc = __ata_qc_from_tag(ap, tag);
1428 preempted_tag = link->active_tag;
1429 preempted_sactive = link->sactive;
1430 preempted_qc_active = ap->qc_active;
1431 link->active_tag = ATA_TAG_POISON;
1435 /* prepare & issue qc */
1438 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1439 qc->flags |= ATA_QCFLAG_RESULT_TF;
1440 qc->dma_dir = dma_dir;
1441 if (dma_dir != DMA_NONE) {
1442 unsigned int i, buflen = 0;
1444 for (i = 0; i < n_elem; i++)
1445 buflen += sg[i].length;
1447 ata_sg_init(qc, sg, n_elem);
1448 qc->nbytes = buflen;
1451 qc->private_data = &wait;
1452 qc->complete_fn = ata_qc_complete_internal;
1456 spin_unlock_irqrestore(ap->lock, flags);
1458 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1460 ata_port_flush_task(ap);
1463 spin_lock_irqsave(ap->lock, flags);
1465 /* We're racing with irq here. If we lose, the
1466 * following test prevents us from completing the qc
1467 * twice. If we win, the port is frozen and will be
1468 * cleaned up by ->post_internal_cmd().
1470 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1471 qc->err_mask |= AC_ERR_TIMEOUT;
1473 if (ap->ops->error_handler)
1474 ata_port_freeze(ap);
1476 ata_qc_complete(qc);
1478 if (ata_msg_warn(ap))
1479 ata_dev_printk(dev, KERN_WARNING,
1480 "qc timeout (cmd 0x%x)\n", command);
1483 spin_unlock_irqrestore(ap->lock, flags);
1486 /* do post_internal_cmd */
1487 if (ap->ops->post_internal_cmd)
1488 ap->ops->post_internal_cmd(qc);
1490 /* perform minimal error analysis */
1491 if (qc->flags & ATA_QCFLAG_FAILED) {
1492 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1493 qc->err_mask |= AC_ERR_DEV;
1496 qc->err_mask |= AC_ERR_OTHER;
1498 if (qc->err_mask & ~AC_ERR_OTHER)
1499 qc->err_mask &= ~AC_ERR_OTHER;
1503 spin_lock_irqsave(ap->lock, flags);
1505 *tf = qc->result_tf;
1506 err_mask = qc->err_mask;
1509 link->active_tag = preempted_tag;
1510 link->sactive = preempted_sactive;
1511 ap->qc_active = preempted_qc_active;
1513 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1514 * Until those drivers are fixed, we detect the condition
1515 * here, fail the command with AC_ERR_SYSTEM and reenable the
1518 * Note that this doesn't change any behavior as internal
1519 * command failure results in disabling the device in the
1520 * higher layer for LLDDs without new reset/EH callbacks.
1522 * Kill the following code as soon as those drivers are fixed.
1524 if (ap->flags & ATA_FLAG_DISABLED) {
1525 err_mask |= AC_ERR_SYSTEM;
1529 spin_unlock_irqrestore(ap->lock, flags);
1535 * ata_exec_internal - execute libata internal command
1536 * @dev: Device to which the command is sent
1537 * @tf: Taskfile registers for the command and the result
1538 * @cdb: CDB for packet command
1539 * @dma_dir: Data tranfer direction of the command
1540 * @buf: Data buffer of the command
1541 * @buflen: Length of data buffer
1543 * Wrapper around ata_exec_internal_sg() which takes simple
1544 * buffer instead of sg list.
1547 * None. Should be called with kernel context, might sleep.
1550 * Zero on success, AC_ERR_* mask on failure
1552 unsigned ata_exec_internal(struct ata_device *dev,
1553 struct ata_taskfile *tf, const u8 *cdb,
1554 int dma_dir, void *buf, unsigned int buflen)
1556 struct scatterlist *psg = NULL, sg;
1557 unsigned int n_elem = 0;
1559 if (dma_dir != DMA_NONE) {
1561 sg_init_one(&sg, buf, buflen);
1566 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1570 * ata_do_simple_cmd - execute simple internal command
1571 * @dev: Device to which the command is sent
1572 * @cmd: Opcode to execute
1574 * Execute a 'simple' command, that only consists of the opcode
1575 * 'cmd' itself, without filling any other registers
1578 * Kernel thread context (may sleep).
1581 * Zero on success, AC_ERR_* mask on failure
1583 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1585 struct ata_taskfile tf;
1587 ata_tf_init(dev, &tf);
1590 tf.flags |= ATA_TFLAG_DEVICE;
1591 tf.protocol = ATA_PROT_NODATA;
1593 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1597 * ata_pio_need_iordy - check if iordy needed
1600 * Check if the current speed of the device requires IORDY. Used
1601 * by various controllers for chip configuration.
1604 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1606 /* Controller doesn't support IORDY. Probably a pointless check
1607 as the caller should know this */
1608 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1610 /* PIO3 and higher it is mandatory */
1611 if (adev->pio_mode > XFER_PIO_2)
1613 /* We turn it on when possible */
1614 if (ata_id_has_iordy(adev->id))
1620 * ata_pio_mask_no_iordy - Return the non IORDY mask
1623 * Compute the highest mode possible if we are not using iordy. Return
1624 * -1 if no iordy mode is available.
1627 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1629 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1630 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1631 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1632 /* Is the speed faster than the drive allows non IORDY ? */
1634 /* This is cycle times not frequency - watch the logic! */
1635 if (pio > 240) /* PIO2 is 240nS per cycle */
1636 return 3 << ATA_SHIFT_PIO;
1637 return 7 << ATA_SHIFT_PIO;
1640 return 3 << ATA_SHIFT_PIO;
1644 * ata_dev_read_id - Read ID data from the specified device
1645 * @dev: target device
1646 * @p_class: pointer to class of the target device (may be changed)
1647 * @flags: ATA_READID_* flags
1648 * @id: buffer to read IDENTIFY data into
1650 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1651 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1652 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1653 * for pre-ATA4 drives.
1655 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
1656 * now we abort if we hit that case.
1659 * Kernel thread context (may sleep)
1662 * 0 on success, -errno otherwise.
1664 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1665 unsigned int flags, u16 *id)
1667 struct ata_port *ap = dev->link->ap;
1668 unsigned int class = *p_class;
1669 struct ata_taskfile tf;
1670 unsigned int err_mask = 0;
1672 int may_fallback = 1, tried_spinup = 0;
1675 if (ata_msg_ctl(ap))
1676 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1678 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1680 ata_tf_init(dev, &tf);
1684 tf.command = ATA_CMD_ID_ATA;
1687 tf.command = ATA_CMD_ID_ATAPI;
1691 reason = "unsupported class";
1695 tf.protocol = ATA_PROT_PIO;
1697 /* Some devices choke if TF registers contain garbage. Make
1698 * sure those are properly initialized.
1700 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1702 /* Device presence detection is unreliable on some
1703 * controllers. Always poll IDENTIFY if available.
1705 tf.flags |= ATA_TFLAG_POLLING;
1707 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1708 id, sizeof(id[0]) * ATA_ID_WORDS);
1710 if (err_mask & AC_ERR_NODEV_HINT) {
1711 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1712 ap->print_id, dev->devno);
1716 /* Device or controller might have reported the wrong
1717 * device class. Give a shot at the other IDENTIFY if
1718 * the current one is aborted by the device.
1721 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1724 if (class == ATA_DEV_ATA)
1725 class = ATA_DEV_ATAPI;
1727 class = ATA_DEV_ATA;
1732 reason = "I/O error";
1736 /* Falling back doesn't make sense if ID data was read
1737 * successfully at least once.
1741 swap_buf_le16(id, ATA_ID_WORDS);
1745 reason = "device reports invalid type";
1747 if (class == ATA_DEV_ATA) {
1748 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1751 if (ata_id_is_ata(id))
1755 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1758 * Drive powered-up in standby mode, and requires a specific
1759 * SET_FEATURES spin-up subcommand before it will accept
1760 * anything other than the original IDENTIFY command.
1762 ata_tf_init(dev, &tf);
1763 tf.command = ATA_CMD_SET_FEATURES;
1764 tf.feature = SETFEATURES_SPINUP;
1765 tf.protocol = ATA_PROT_NODATA;
1766 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1767 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1768 if (err_mask && id[2] != 0x738c) {
1770 reason = "SPINUP failed";
1774 * If the drive initially returned incomplete IDENTIFY info,
1775 * we now must reissue the IDENTIFY command.
1777 if (id[2] == 0x37c8)
1781 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1783 * The exact sequence expected by certain pre-ATA4 drives is:
1785 * IDENTIFY (optional in early ATA)
1786 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
1788 * Some drives were very specific about that exact sequence.
1790 * Note that ATA4 says lba is mandatory so the second check
1791 * shoud never trigger.
1793 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1794 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1797 reason = "INIT_DEV_PARAMS failed";
1801 /* current CHS translation info (id[53-58]) might be
1802 * changed. reread the identify device info.
1804 flags &= ~ATA_READID_POSTRESET;
1814 if (ata_msg_warn(ap))
1815 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1816 "(%s, err_mask=0x%x)\n", reason, err_mask);
1820 static inline u8 ata_dev_knobble(struct ata_device *dev)
1822 struct ata_port *ap = dev->link->ap;
1823 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1826 static void ata_dev_config_ncq(struct ata_device *dev,
1827 char *desc, size_t desc_sz)
1829 struct ata_port *ap = dev->link->ap;
1830 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1832 if (!ata_id_has_ncq(dev->id)) {
1836 if (dev->horkage & ATA_HORKAGE_NONCQ) {
1837 snprintf(desc, desc_sz, "NCQ (not used)");
1840 if (ap->flags & ATA_FLAG_NCQ) {
1841 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1842 dev->flags |= ATA_DFLAG_NCQ;
1845 if (hdepth >= ddepth)
1846 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1848 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1852 * ata_dev_configure - Configure the specified ATA/ATAPI device
1853 * @dev: Target device to configure
1855 * Configure @dev according to @dev->id. Generic and low-level
1856 * driver specific fixups are also applied.
1859 * Kernel thread context (may sleep)
1862 * 0 on success, -errno otherwise
1864 int ata_dev_configure(struct ata_device *dev)
1866 struct ata_port *ap = dev->link->ap;
1867 struct ata_eh_context *ehc = &dev->link->eh_context;
1868 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1869 const u16 *id = dev->id;
1870 unsigned int xfer_mask;
1871 char revbuf[7]; /* XYZ-99\0 */
1872 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1873 char modelbuf[ATA_ID_PROD_LEN+1];
1876 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1877 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
1882 if (ata_msg_probe(ap))
1883 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1886 dev->horkage |= ata_dev_blacklisted(dev);
1888 /* let ACPI work its magic */
1889 rc = ata_acpi_on_devcfg(dev);
1893 /* massage HPA, do it early as it might change IDENTIFY data */
1894 rc = ata_hpa_resize(dev);
1898 /* print device capabilities */
1899 if (ata_msg_probe(ap))
1900 ata_dev_printk(dev, KERN_DEBUG,
1901 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1902 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1904 id[49], id[82], id[83], id[84],
1905 id[85], id[86], id[87], id[88]);
1907 /* initialize to-be-configured parameters */
1908 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1909 dev->max_sectors = 0;
1917 * common ATA, ATAPI feature tests
1920 /* find max transfer mode; for printk only */
1921 xfer_mask = ata_id_xfermask(id);
1923 if (ata_msg_probe(ap))
1926 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1927 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1930 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1933 /* ATA-specific feature tests */
1934 if (dev->class == ATA_DEV_ATA) {
1935 if (ata_id_is_cfa(id)) {
1936 if (id[162] & 1) /* CPRM may make this media unusable */
1937 ata_dev_printk(dev, KERN_WARNING,
1938 "supports DRM functions and may "
1939 "not be fully accessable.\n");
1940 snprintf(revbuf, 7, "CFA");
1943 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1945 dev->n_sectors = ata_id_n_sectors(id);
1947 if (dev->id[59] & 0x100)
1948 dev->multi_count = dev->id[59] & 0xff;
1950 if (ata_id_has_lba(id)) {
1951 const char *lba_desc;
1955 dev->flags |= ATA_DFLAG_LBA;
1956 if (ata_id_has_lba48(id)) {
1957 dev->flags |= ATA_DFLAG_LBA48;
1960 if (dev->n_sectors >= (1UL << 28) &&
1961 ata_id_has_flush_ext(id))
1962 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1966 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1968 /* print device info to dmesg */
1969 if (ata_msg_drv(ap) && print_info) {
1970 ata_dev_printk(dev, KERN_INFO,
1971 "%s: %s, %s, max %s\n",
1972 revbuf, modelbuf, fwrevbuf,
1973 ata_mode_string(xfer_mask));
1974 ata_dev_printk(dev, KERN_INFO,
1975 "%Lu sectors, multi %u: %s %s\n",
1976 (unsigned long long)dev->n_sectors,
1977 dev->multi_count, lba_desc, ncq_desc);
1982 /* Default translation */
1983 dev->cylinders = id[1];
1985 dev->sectors = id[6];
1987 if (ata_id_current_chs_valid(id)) {
1988 /* Current CHS translation is valid. */
1989 dev->cylinders = id[54];
1990 dev->heads = id[55];
1991 dev->sectors = id[56];
1994 /* print device info to dmesg */
1995 if (ata_msg_drv(ap) && print_info) {
1996 ata_dev_printk(dev, KERN_INFO,
1997 "%s: %s, %s, max %s\n",
1998 revbuf, modelbuf, fwrevbuf,
1999 ata_mode_string(xfer_mask));
2000 ata_dev_printk(dev, KERN_INFO,
2001 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
2002 (unsigned long long)dev->n_sectors,
2003 dev->multi_count, dev->cylinders,
2004 dev->heads, dev->sectors);
2011 /* ATAPI-specific feature tests */
2012 else if (dev->class == ATA_DEV_ATAPI) {
2013 const char *cdb_intr_string = "";
2014 const char *atapi_an_string = "";
2016 rc = atapi_cdb_len(id);
2017 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
2018 if (ata_msg_warn(ap))
2019 ata_dev_printk(dev, KERN_WARNING,
2020 "unsupported CDB len\n");
2024 dev->cdb_len = (unsigned int) rc;
2027 * check to see if this ATAPI device supports
2028 * Asynchronous Notification
2030 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id)) {
2031 unsigned int err_mask;
2033 /* issue SET feature command to turn this on */
2034 err_mask = ata_dev_set_AN(dev, SETFEATURES_SATA_ENABLE);
2036 ata_dev_printk(dev, KERN_ERR,
2037 "failed to enable ATAPI AN "
2038 "(err_mask=0x%x)\n", err_mask);
2040 dev->flags |= ATA_DFLAG_AN;
2041 atapi_an_string = ", ATAPI AN";
2045 if (ata_id_cdb_intr(dev->id)) {
2046 dev->flags |= ATA_DFLAG_CDB_INTR;
2047 cdb_intr_string = ", CDB intr";
2050 /* print device info to dmesg */
2051 if (ata_msg_drv(ap) && print_info)
2052 ata_dev_printk(dev, KERN_INFO,
2053 "ATAPI: %s, %s, max %s%s%s\n",
2055 ata_mode_string(xfer_mask),
2056 cdb_intr_string, atapi_an_string);
2059 /* determine max_sectors */
2060 dev->max_sectors = ATA_MAX_SECTORS;
2061 if (dev->flags & ATA_DFLAG_LBA48)
2062 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2064 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2065 /* Let the user know. We don't want to disallow opens for
2066 rescue purposes, or in case the vendor is just a blithering
2069 ata_dev_printk(dev, KERN_WARNING,
2070 "Drive reports diagnostics failure. This may indicate a drive\n");
2071 ata_dev_printk(dev, KERN_WARNING,
2072 "fault or invalid emulation. Contact drive vendor for information.\n");
2076 /* limit bridge transfers to udma5, 200 sectors */
2077 if (ata_dev_knobble(dev)) {
2078 if (ata_msg_drv(ap) && print_info)
2079 ata_dev_printk(dev, KERN_INFO,
2080 "applying bridge limits\n");
2081 dev->udma_mask &= ATA_UDMA5;
2082 dev->max_sectors = ATA_MAX_SECTORS;
2085 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
2086 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2089 if (ap->ops->dev_config)
2090 ap->ops->dev_config(dev);
2092 if (ata_msg_probe(ap))
2093 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2094 __FUNCTION__, ata_chk_status(ap));
2098 if (ata_msg_probe(ap))
2099 ata_dev_printk(dev, KERN_DEBUG,
2100 "%s: EXIT, err\n", __FUNCTION__);
2105 * ata_cable_40wire - return 40 wire cable type
2108 * Helper method for drivers which want to hardwire 40 wire cable
2112 int ata_cable_40wire(struct ata_port *ap)
2114 return ATA_CBL_PATA40;
2118 * ata_cable_80wire - return 80 wire cable type
2121 * Helper method for drivers which want to hardwire 80 wire cable
2125 int ata_cable_80wire(struct ata_port *ap)
2127 return ATA_CBL_PATA80;
2131 * ata_cable_unknown - return unknown PATA cable.
2134 * Helper method for drivers which have no PATA cable detection.
2137 int ata_cable_unknown(struct ata_port *ap)
2139 return ATA_CBL_PATA_UNK;
2143 * ata_cable_sata - return SATA cable type
2146 * Helper method for drivers which have SATA cables
2149 int ata_cable_sata(struct ata_port *ap)
2151 return ATA_CBL_SATA;
2155 * ata_bus_probe - Reset and probe ATA bus
2158 * Master ATA bus probing function. Initiates a hardware-dependent
2159 * bus reset, then attempts to identify any devices found on
2163 * PCI/etc. bus probe sem.
2166 * Zero on success, negative errno otherwise.
2169 int ata_bus_probe(struct ata_port *ap)
2171 unsigned int classes[ATA_MAX_DEVICES];
2172 int tries[ATA_MAX_DEVICES];
2174 struct ata_device *dev;
2178 ata_link_for_each_dev(dev, &ap->link)
2179 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
2182 /* reset and determine device classes */
2183 ap->ops->phy_reset(ap);
2185 ata_link_for_each_dev(dev, &ap->link) {
2186 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2187 dev->class != ATA_DEV_UNKNOWN)
2188 classes[dev->devno] = dev->class;
2190 classes[dev->devno] = ATA_DEV_NONE;
2192 dev->class = ATA_DEV_UNKNOWN;
2197 /* after the reset the device state is PIO 0 and the controller
2198 state is undefined. Record the mode */
2200 ata_link_for_each_dev(dev, &ap->link)
2201 dev->pio_mode = XFER_PIO_0;
2203 /* read IDENTIFY page and configure devices. We have to do the identify
2204 specific sequence bass-ackwards so that PDIAG- is released by
2207 ata_link_for_each_dev(dev, &ap->link) {
2208 if (tries[dev->devno])
2209 dev->class = classes[dev->devno];
2211 if (!ata_dev_enabled(dev))
2214 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2220 /* Now ask for the cable type as PDIAG- should have been released */
2221 if (ap->ops->cable_detect)
2222 ap->cbl = ap->ops->cable_detect(ap);
2224 /* We may have SATA bridge glue hiding here irrespective of the
2225 reported cable types and sensed types */
2226 ata_link_for_each_dev(dev, &ap->link) {
2227 if (!ata_dev_enabled(dev))
2229 /* SATA drives indicate we have a bridge. We don't know which
2230 end of the link the bridge is which is a problem */
2231 if (ata_id_is_sata(dev->id))
2232 ap->cbl = ATA_CBL_SATA;
2235 /* After the identify sequence we can now set up the devices. We do
2236 this in the normal order so that the user doesn't get confused */
2238 ata_link_for_each_dev(dev, &ap->link) {
2239 if (!ata_dev_enabled(dev))
2242 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
2243 rc = ata_dev_configure(dev);
2244 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2249 /* configure transfer mode */
2250 rc = ata_set_mode(&ap->link, &dev);
2254 ata_link_for_each_dev(dev, &ap->link)
2255 if (ata_dev_enabled(dev))
2258 /* no device present, disable port */
2259 ata_port_disable(ap);
2263 tries[dev->devno]--;
2267 /* eeek, something went very wrong, give up */
2268 tries[dev->devno] = 0;
2272 /* give it just one more chance */
2273 tries[dev->devno] = min(tries[dev->devno], 1);
2275 if (tries[dev->devno] == 1) {
2276 /* This is the last chance, better to slow
2277 * down than lose it.
2279 sata_down_spd_limit(&ap->link);
2280 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2284 if (!tries[dev->devno])
2285 ata_dev_disable(dev);
2291 * ata_port_probe - Mark port as enabled
2292 * @ap: Port for which we indicate enablement
2294 * Modify @ap data structure such that the system
2295 * thinks that the entire port is enabled.
2297 * LOCKING: host lock, or some other form of
2301 void ata_port_probe(struct ata_port *ap)
2303 ap->flags &= ~ATA_FLAG_DISABLED;
2307 * sata_print_link_status - Print SATA link status
2308 * @link: SATA link to printk link status about
2310 * This function prints link speed and status of a SATA link.
2315 void sata_print_link_status(struct ata_link *link)
2317 u32 sstatus, scontrol, tmp;
2319 if (sata_scr_read(link, SCR_STATUS, &sstatus))
2321 sata_scr_read(link, SCR_CONTROL, &scontrol);
2323 if (ata_link_online(link)) {
2324 tmp = (sstatus >> 4) & 0xf;
2325 ata_link_printk(link, KERN_INFO,
2326 "SATA link up %s (SStatus %X SControl %X)\n",
2327 sata_spd_string(tmp), sstatus, scontrol);
2329 ata_link_printk(link, KERN_INFO,
2330 "SATA link down (SStatus %X SControl %X)\n",
2336 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2337 * @ap: SATA port associated with target SATA PHY.
2339 * This function issues commands to standard SATA Sxxx
2340 * PHY registers, to wake up the phy (and device), and
2341 * clear any reset condition.
2344 * PCI/etc. bus probe sem.
2347 void __sata_phy_reset(struct ata_port *ap)
2349 struct ata_link *link = &ap->link;
2350 unsigned long timeout = jiffies + (HZ * 5);
2353 if (ap->flags & ATA_FLAG_SATA_RESET) {
2354 /* issue phy wake/reset */
2355 sata_scr_write_flush(link, SCR_CONTROL, 0x301);
2356 /* Couldn't find anything in SATA I/II specs, but
2357 * AHCI-1.1 10.4.2 says at least 1 ms. */
2360 /* phy wake/clear reset */
2361 sata_scr_write_flush(link, SCR_CONTROL, 0x300);
2363 /* wait for phy to become ready, if necessary */
2366 sata_scr_read(link, SCR_STATUS, &sstatus);
2367 if ((sstatus & 0xf) != 1)
2369 } while (time_before(jiffies, timeout));
2371 /* print link status */
2372 sata_print_link_status(link);
2374 /* TODO: phy layer with polling, timeouts, etc. */
2375 if (!ata_link_offline(link))
2378 ata_port_disable(ap);
2380 if (ap->flags & ATA_FLAG_DISABLED)
2383 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2384 ata_port_disable(ap);
2388 ap->cbl = ATA_CBL_SATA;
2392 * sata_phy_reset - Reset SATA bus.
2393 * @ap: SATA port associated with target SATA PHY.
2395 * This function resets the SATA bus, and then probes
2396 * the bus for devices.
2399 * PCI/etc. bus probe sem.
2402 void sata_phy_reset(struct ata_port *ap)
2404 __sata_phy_reset(ap);
2405 if (ap->flags & ATA_FLAG_DISABLED)
2411 * ata_dev_pair - return other device on cable
2414 * Obtain the other device on the same cable, or if none is
2415 * present NULL is returned
2418 struct ata_device *ata_dev_pair(struct ata_device *adev)
2420 struct ata_link *link = adev->link;
2421 struct ata_device *pair = &link->device[1 - adev->devno];
2422 if (!ata_dev_enabled(pair))
2428 * ata_port_disable - Disable port.
2429 * @ap: Port to be disabled.
2431 * Modify @ap data structure such that the system
2432 * thinks that the entire port is disabled, and should
2433 * never attempt to probe or communicate with devices
2436 * LOCKING: host lock, or some other form of
2440 void ata_port_disable(struct ata_port *ap)
2442 ap->link.device[0].class = ATA_DEV_NONE;
2443 ap->link.device[1].class = ATA_DEV_NONE;
2444 ap->flags |= ATA_FLAG_DISABLED;
2448 * sata_down_spd_limit - adjust SATA spd limit downward
2449 * @link: Link to adjust SATA spd limit for
2451 * Adjust SATA spd limit of @link downward. Note that this
2452 * function only adjusts the limit. The change must be applied
2453 * using sata_set_spd().
2456 * Inherited from caller.
2459 * 0 on success, negative errno on failure
2461 int sata_down_spd_limit(struct ata_link *link)
2463 u32 sstatus, spd, mask;
2466 if (!sata_scr_valid(link))
2469 /* If SCR can be read, use it to determine the current SPD.
2470 * If not, use cached value in link->sata_spd.
2472 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
2474 spd = (sstatus >> 4) & 0xf;
2476 spd = link->sata_spd;
2478 mask = link->sata_spd_limit;
2482 /* unconditionally mask off the highest bit */
2483 highbit = fls(mask) - 1;
2484 mask &= ~(1 << highbit);
2486 /* Mask off all speeds higher than or equal to the current
2487 * one. Force 1.5Gbps if current SPD is not available.
2490 mask &= (1 << (spd - 1)) - 1;
2494 /* were we already at the bottom? */
2498 link->sata_spd_limit = mask;
2500 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
2501 sata_spd_string(fls(mask)));
2506 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
2510 if (link->sata_spd_limit == UINT_MAX)
2513 limit = fls(link->sata_spd_limit);
2515 spd = (*scontrol >> 4) & 0xf;
2516 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2518 return spd != limit;
2522 * sata_set_spd_needed - is SATA spd configuration needed
2523 * @link: Link in question
2525 * Test whether the spd limit in SControl matches
2526 * @link->sata_spd_limit. This function is used to determine
2527 * whether hardreset is necessary to apply SATA spd
2531 * Inherited from caller.
2534 * 1 if SATA spd configuration is needed, 0 otherwise.
2536 int sata_set_spd_needed(struct ata_link *link)
2540 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
2543 return __sata_set_spd_needed(link, &scontrol);
2547 * sata_set_spd - set SATA spd according to spd limit
2548 * @link: Link to set SATA spd for
2550 * Set SATA spd of @link according to sata_spd_limit.
2553 * Inherited from caller.
2556 * 0 if spd doesn't need to be changed, 1 if spd has been
2557 * changed. Negative errno if SCR registers are inaccessible.
2559 int sata_set_spd(struct ata_link *link)
2564 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
2567 if (!__sata_set_spd_needed(link, &scontrol))
2570 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
2577 * This mode timing computation functionality is ported over from
2578 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2581 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2582 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2583 * for UDMA6, which is currently supported only by Maxtor drives.
2585 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2588 static const struct ata_timing ata_timing[] = {
2590 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2591 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2592 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2593 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2595 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2596 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2597 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2598 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2599 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2601 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2603 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2604 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2605 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2607 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2608 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2609 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2611 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2612 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2613 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2614 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2616 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2617 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2618 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2620 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2625 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2626 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2628 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2630 q->setup = EZ(t->setup * 1000, T);
2631 q->act8b = EZ(t->act8b * 1000, T);
2632 q->rec8b = EZ(t->rec8b * 1000, T);
2633 q->cyc8b = EZ(t->cyc8b * 1000, T);
2634 q->active = EZ(t->active * 1000, T);
2635 q->recover = EZ(t->recover * 1000, T);
2636 q->cycle = EZ(t->cycle * 1000, T);
2637 q->udma = EZ(t->udma * 1000, UT);
2640 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2641 struct ata_timing *m, unsigned int what)
2643 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2644 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2645 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2646 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2647 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2648 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2649 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2650 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2653 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2655 const struct ata_timing *t;
2657 for (t = ata_timing; t->mode != speed; t++)
2658 if (t->mode == 0xFF)
2663 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2664 struct ata_timing *t, int T, int UT)
2666 const struct ata_timing *s;
2667 struct ata_timing p;
2673 if (!(s = ata_timing_find_mode(speed)))
2676 memcpy(t, s, sizeof(*s));
2679 * If the drive is an EIDE drive, it can tell us it needs extended
2680 * PIO/MW_DMA cycle timing.
2683 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2684 memset(&p, 0, sizeof(p));
2685 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2686 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2687 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2688 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2689 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2691 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2695 * Convert the timing to bus clock counts.
2698 ata_timing_quantize(t, t, T, UT);
2701 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2702 * S.M.A.R.T * and some other commands. We have to ensure that the
2703 * DMA cycle timing is slower/equal than the fastest PIO timing.
2706 if (speed > XFER_PIO_6) {
2707 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2708 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2712 * Lengthen active & recovery time so that cycle time is correct.
2715 if (t->act8b + t->rec8b < t->cyc8b) {
2716 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2717 t->rec8b = t->cyc8b - t->act8b;
2720 if (t->active + t->recover < t->cycle) {
2721 t->active += (t->cycle - (t->active + t->recover)) / 2;
2722 t->recover = t->cycle - t->active;
2725 /* In a few cases quantisation may produce enough errors to
2726 leave t->cycle too low for the sum of active and recovery
2727 if so we must correct this */
2728 if (t->active + t->recover > t->cycle)
2729 t->cycle = t->active + t->recover;
2735 * ata_down_xfermask_limit - adjust dev xfer masks downward
2736 * @dev: Device to adjust xfer masks
2737 * @sel: ATA_DNXFER_* selector
2739 * Adjust xfer masks of @dev downward. Note that this function
2740 * does not apply the change. Invoking ata_set_mode() afterwards
2741 * will apply the limit.
2744 * Inherited from caller.
2747 * 0 on success, negative errno on failure
2749 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2752 unsigned int orig_mask, xfer_mask;
2753 unsigned int pio_mask, mwdma_mask, udma_mask;
2756 quiet = !!(sel & ATA_DNXFER_QUIET);
2757 sel &= ~ATA_DNXFER_QUIET;
2759 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2762 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2765 case ATA_DNXFER_PIO:
2766 highbit = fls(pio_mask) - 1;
2767 pio_mask &= ~(1 << highbit);
2770 case ATA_DNXFER_DMA:
2772 highbit = fls(udma_mask) - 1;
2773 udma_mask &= ~(1 << highbit);
2776 } else if (mwdma_mask) {
2777 highbit = fls(mwdma_mask) - 1;
2778 mwdma_mask &= ~(1 << highbit);
2784 case ATA_DNXFER_40C:
2785 udma_mask &= ATA_UDMA_MASK_40C;
2788 case ATA_DNXFER_FORCE_PIO0:
2790 case ATA_DNXFER_FORCE_PIO:
2799 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2801 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2805 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2806 snprintf(buf, sizeof(buf), "%s:%s",
2807 ata_mode_string(xfer_mask),
2808 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2810 snprintf(buf, sizeof(buf), "%s",
2811 ata_mode_string(xfer_mask));
2813 ata_dev_printk(dev, KERN_WARNING,
2814 "limiting speed to %s\n", buf);
2817 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2823 static int ata_dev_set_mode(struct ata_device *dev)
2825 struct ata_eh_context *ehc = &dev->link->eh_context;
2826 unsigned int err_mask;
2829 dev->flags &= ~ATA_DFLAG_PIO;
2830 if (dev->xfer_shift == ATA_SHIFT_PIO)
2831 dev->flags |= ATA_DFLAG_PIO;
2833 err_mask = ata_dev_set_xfermode(dev);
2834 /* Old CFA may refuse this command, which is just fine */
2835 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2836 err_mask &= ~AC_ERR_DEV;
2837 /* Some very old devices and some bad newer ones fail any kind of
2838 SET_XFERMODE request but support PIO0-2 timings and no IORDY */
2839 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
2840 dev->pio_mode <= XFER_PIO_2)
2841 err_mask &= ~AC_ERR_DEV;
2843 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2844 "(err_mask=0x%x)\n", err_mask);
2848 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2849 rc = ata_dev_revalidate(dev, 0);
2850 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2854 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2855 dev->xfer_shift, (int)dev->xfer_mode);
2857 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2858 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2863 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
2864 * @link: link on which timings will be programmed
2865 * @r_failed_dev: out paramter for failed device
2867 * Standard implementation of the function used to tune and set
2868 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2869 * ata_dev_set_mode() fails, pointer to the failing device is
2870 * returned in @r_failed_dev.
2873 * PCI/etc. bus probe sem.
2876 * 0 on success, negative errno otherwise
2879 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
2881 struct ata_port *ap = link->ap;
2882 struct ata_device *dev;
2883 int rc = 0, used_dma = 0, found = 0;
2885 /* step 1: calculate xfer_mask */
2886 ata_link_for_each_dev(dev, link) {
2887 unsigned int pio_mask, dma_mask;
2889 if (!ata_dev_enabled(dev))
2892 ata_dev_xfermask(dev);
2894 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2895 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2896 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2897 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2906 /* step 2: always set host PIO timings */
2907 ata_link_for_each_dev(dev, link) {
2908 if (!ata_dev_enabled(dev))
2911 if (!dev->pio_mode) {
2912 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2917 dev->xfer_mode = dev->pio_mode;
2918 dev->xfer_shift = ATA_SHIFT_PIO;
2919 if (ap->ops->set_piomode)
2920 ap->ops->set_piomode(ap, dev);
2923 /* step 3: set host DMA timings */
2924 ata_link_for_each_dev(dev, link) {
2925 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2928 dev->xfer_mode = dev->dma_mode;
2929 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2930 if (ap->ops->set_dmamode)
2931 ap->ops->set_dmamode(ap, dev);
2934 /* step 4: update devices' xfer mode */
2935 ata_link_for_each_dev(dev, link) {
2936 /* don't update suspended devices' xfer mode */
2937 if (!ata_dev_enabled(dev))
2940 rc = ata_dev_set_mode(dev);
2945 /* Record simplex status. If we selected DMA then the other
2946 * host channels are not permitted to do so.
2948 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2949 ap->host->simplex_claimed = ap;
2953 *r_failed_dev = dev;
2958 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2959 * @link: link on which timings will be programmed
2960 * @r_failed_dev: out paramter for failed device
2962 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2963 * ata_set_mode() fails, pointer to the failing device is
2964 * returned in @r_failed_dev.
2967 * PCI/etc. bus probe sem.
2970 * 0 on success, negative errno otherwise
2972 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
2974 struct ata_port *ap = link->ap;
2976 /* has private set_mode? */
2977 if (ap->ops->set_mode)
2978 return ap->ops->set_mode(link, r_failed_dev);
2979 return ata_do_set_mode(link, r_failed_dev);
2983 * ata_tf_to_host - issue ATA taskfile to host controller
2984 * @ap: port to which command is being issued
2985 * @tf: ATA taskfile register set
2987 * Issues ATA taskfile register set to ATA host controller,
2988 * with proper synchronization with interrupt handler and
2992 * spin_lock_irqsave(host lock)
2995 static inline void ata_tf_to_host(struct ata_port *ap,
2996 const struct ata_taskfile *tf)
2998 ap->ops->tf_load(ap, tf);
2999 ap->ops->exec_command(ap, tf);
3003 * ata_busy_sleep - sleep until BSY clears, or timeout
3004 * @ap: port containing status register to be polled
3005 * @tmout_pat: impatience timeout
3006 * @tmout: overall timeout
3008 * Sleep until ATA Status register bit BSY clears,
3009 * or a timeout occurs.
3012 * Kernel thread context (may sleep).
3015 * 0 on success, -errno otherwise.
3017 int ata_busy_sleep(struct ata_port *ap,
3018 unsigned long tmout_pat, unsigned long tmout)
3020 unsigned long timer_start, timeout;
3023 status = ata_busy_wait(ap, ATA_BUSY, 300);
3024 timer_start = jiffies;
3025 timeout = timer_start + tmout_pat;
3026 while (status != 0xff && (status & ATA_BUSY) &&
3027 time_before(jiffies, timeout)) {
3029 status = ata_busy_wait(ap, ATA_BUSY, 3);
3032 if (status != 0xff && (status & ATA_BUSY))
3033 ata_port_printk(ap, KERN_WARNING,
3034 "port is slow to respond, please be patient "
3035 "(Status 0x%x)\n", status);
3037 timeout = timer_start + tmout;
3038 while (status != 0xff && (status & ATA_BUSY) &&
3039 time_before(jiffies, timeout)) {
3041 status = ata_chk_status(ap);
3047 if (status & ATA_BUSY) {
3048 ata_port_printk(ap, KERN_ERR, "port failed to respond "
3049 "(%lu secs, Status 0x%x)\n",
3050 tmout / HZ, status);
3058 * ata_wait_ready - sleep until BSY clears, or timeout
3059 * @ap: port containing status register to be polled
3060 * @deadline: deadline jiffies for the operation
3062 * Sleep until ATA Status register bit BSY clears, or timeout
3066 * Kernel thread context (may sleep).
3069 * 0 on success, -errno otherwise.
3071 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
3073 unsigned long start = jiffies;
3077 u8 status = ata_chk_status(ap);
3078 unsigned long now = jiffies;
3080 if (!(status & ATA_BUSY))
3082 if (!ata_link_online(&ap->link) && status == 0xff)
3084 if (time_after(now, deadline))
3087 if (!warned && time_after(now, start + 5 * HZ) &&
3088 (deadline - now > 3 * HZ)) {
3089 ata_port_printk(ap, KERN_WARNING,
3090 "port is slow to respond, please be patient "
3091 "(Status 0x%x)\n", status);
3099 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3100 unsigned long deadline)
3102 struct ata_ioports *ioaddr = &ap->ioaddr;
3103 unsigned int dev0 = devmask & (1 << 0);
3104 unsigned int dev1 = devmask & (1 << 1);
3107 /* if device 0 was found in ata_devchk, wait for its
3111 rc = ata_wait_ready(ap, deadline);
3119 /* if device 1 was found in ata_devchk, wait for register
3120 * access briefly, then wait for BSY to clear.
3125 ap->ops->dev_select(ap, 1);
3127 /* Wait for register access. Some ATAPI devices fail
3128 * to set nsect/lbal after reset, so don't waste too
3129 * much time on it. We're gonna wait for !BSY anyway.
3131 for (i = 0; i < 2; i++) {
3134 nsect = ioread8(ioaddr->nsect_addr);
3135 lbal = ioread8(ioaddr->lbal_addr);
3136 if ((nsect == 1) && (lbal == 1))
3138 msleep(50); /* give drive a breather */
3141 rc = ata_wait_ready(ap, deadline);
3149 /* is all this really necessary? */
3150 ap->ops->dev_select(ap, 0);
3152 ap->ops->dev_select(ap, 1);
3154 ap->ops->dev_select(ap, 0);
3159 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3160 unsigned long deadline)
3162 struct ata_ioports *ioaddr = &ap->ioaddr;
3164 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3166 /* software reset. causes dev0 to be selected */
3167 iowrite8(ap->ctl, ioaddr->ctl_addr);
3168 udelay(20); /* FIXME: flush */
3169 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3170 udelay(20); /* FIXME: flush */
3171 iowrite8(ap->ctl, ioaddr->ctl_addr);
3173 /* spec mandates ">= 2ms" before checking status.
3174 * We wait 150ms, because that was the magic delay used for
3175 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
3176 * between when the ATA command register is written, and then
3177 * status is checked. Because waiting for "a while" before
3178 * checking status is fine, post SRST, we perform this magic
3179 * delay here as well.
3181 * Old drivers/ide uses the 2mS rule and then waits for ready
3185 /* Before we perform post reset processing we want to see if
3186 * the bus shows 0xFF because the odd clown forgets the D7
3187 * pulldown resistor.
3189 if (ata_check_status(ap) == 0xFF)
3192 return ata_bus_post_reset(ap, devmask, deadline);
3196 * ata_bus_reset - reset host port and associated ATA channel
3197 * @ap: port to reset
3199 * This is typically the first time we actually start issuing
3200 * commands to the ATA channel. We wait for BSY to clear, then
3201 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3202 * result. Determine what devices, if any, are on the channel
3203 * by looking at the device 0/1 error register. Look at the signature
3204 * stored in each device's taskfile registers, to determine if
3205 * the device is ATA or ATAPI.
3208 * PCI/etc. bus probe sem.
3209 * Obtains host lock.
3212 * Sets ATA_FLAG_DISABLED if bus reset fails.
3215 void ata_bus_reset(struct ata_port *ap)
3217 struct ata_device *device = ap->link.device;
3218 struct ata_ioports *ioaddr = &ap->ioaddr;
3219 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3221 unsigned int dev0, dev1 = 0, devmask = 0;
3224 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3226 /* determine if device 0/1 are present */
3227 if (ap->flags & ATA_FLAG_SATA_RESET)
3230 dev0 = ata_devchk(ap, 0);
3232 dev1 = ata_devchk(ap, 1);
3236 devmask |= (1 << 0);
3238 devmask |= (1 << 1);
3240 /* select device 0 again */
3241 ap->ops->dev_select(ap, 0);
3243 /* issue bus reset */
3244 if (ap->flags & ATA_FLAG_SRST) {
3245 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3246 if (rc && rc != -ENODEV)
3251 * determine by signature whether we have ATA or ATAPI devices
3253 device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
3254 if ((slave_possible) && (err != 0x81))
3255 device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
3257 /* is double-select really necessary? */
3258 if (device[1].class != ATA_DEV_NONE)
3259 ap->ops->dev_select(ap, 1);
3260 if (device[0].class != ATA_DEV_NONE)
3261 ap->ops->dev_select(ap, 0);
3263 /* if no devices were detected, disable this port */
3264 if ((device[0].class == ATA_DEV_NONE) &&
3265 (device[1].class == ATA_DEV_NONE))
3268 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3269 /* set up device control for ATA_FLAG_SATA_RESET */
3270 iowrite8(ap->ctl, ioaddr->ctl_addr);
3277 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3278 ata_port_disable(ap);
3284 * sata_link_debounce - debounce SATA phy status
3285 * @link: ATA link to debounce SATA phy status for
3286 * @params: timing parameters { interval, duratinon, timeout } in msec
3287 * @deadline: deadline jiffies for the operation
3289 * Make sure SStatus of @link reaches stable state, determined by
3290 * holding the same value where DET is not 1 for @duration polled
3291 * every @interval, before @timeout. Timeout constraints the
3292 * beginning of the stable state. Because DET gets stuck at 1 on
3293 * some controllers after hot unplugging, this functions waits
3294 * until timeout then returns 0 if DET is stable at 1.
3296 * @timeout is further limited by @deadline. The sooner of the
3300 * Kernel thread context (may sleep)
3303 * 0 on success, -errno on failure.
3305 int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3306 unsigned long deadline)
3308 unsigned long interval_msec = params[0];
3309 unsigned long duration = msecs_to_jiffies(params[1]);
3310 unsigned long last_jiffies, t;
3314 t = jiffies + msecs_to_jiffies(params[2]);
3315 if (time_before(t, deadline))
3318 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3323 last_jiffies = jiffies;
3326 msleep(interval_msec);
3327 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3333 if (cur == 1 && time_before(jiffies, deadline))
3335 if (time_after(jiffies, last_jiffies + duration))
3340 /* unstable, start over */
3342 last_jiffies = jiffies;
3344 /* Check deadline. If debouncing failed, return
3345 * -EPIPE to tell upper layer to lower link speed.
3347 if (time_after(jiffies, deadline))
3353 * sata_link_resume - resume SATA link
3354 * @link: ATA link to resume SATA
3355 * @params: timing parameters { interval, duratinon, timeout } in msec
3356 * @deadline: deadline jiffies for the operation
3358 * Resume SATA phy @link and debounce it.
3361 * Kernel thread context (may sleep)
3364 * 0 on success, -errno on failure.
3366 int sata_link_resume(struct ata_link *link, const unsigned long *params,
3367 unsigned long deadline)
3372 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3375 scontrol = (scontrol & 0x0f0) | 0x300;
3377 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3380 /* Some PHYs react badly if SStatus is pounded immediately
3381 * after resuming. Delay 200ms before debouncing.
3385 return sata_link_debounce(link, params, deadline);
3389 * ata_std_prereset - prepare for reset
3390 * @link: ATA link to be reset
3391 * @deadline: deadline jiffies for the operation
3393 * @link is about to be reset. Initialize it. Failure from
3394 * prereset makes libata abort whole reset sequence and give up
3395 * that port, so prereset should be best-effort. It does its
3396 * best to prepare for reset sequence but if things go wrong, it
3397 * should just whine, not fail.
3400 * Kernel thread context (may sleep)
3403 * 0 on success, -errno otherwise.
3405 int ata_std_prereset(struct ata_link *link, unsigned long deadline)
3407 struct ata_port *ap = link->ap;
3408 struct ata_eh_context *ehc = &link->eh_context;
3409 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3412 /* handle link resume */
3413 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3414 (link->flags & ATA_LFLAG_HRST_TO_RESUME))
3415 ehc->i.action |= ATA_EH_HARDRESET;
3417 /* if we're about to do hardreset, nothing more to do */
3418 if (ehc->i.action & ATA_EH_HARDRESET)
3421 /* if SATA, resume link */
3422 if (ap->flags & ATA_FLAG_SATA) {
3423 rc = sata_link_resume(link, timing, deadline);
3424 /* whine about phy resume failure but proceed */
3425 if (rc && rc != -EOPNOTSUPP)
3426 ata_link_printk(link, KERN_WARNING, "failed to resume "
3427 "link for reset (errno=%d)\n", rc);
3430 /* Wait for !BSY if the controller can wait for the first D2H
3431 * Reg FIS and we don't know that no device is attached.
3433 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
3434 rc = ata_wait_ready(ap, deadline);
3435 if (rc && rc != -ENODEV) {
3436 ata_link_printk(link, KERN_WARNING, "device not ready "
3437 "(errno=%d), forcing hardreset\n", rc);
3438 ehc->i.action |= ATA_EH_HARDRESET;
3446 * ata_std_softreset - reset host port via ATA SRST
3447 * @link: ATA link to reset
3448 * @classes: resulting classes of attached devices
3449 * @deadline: deadline jiffies for the operation
3451 * Reset host port using ATA SRST.
3454 * Kernel thread context (may sleep)
3457 * 0 on success, -errno otherwise.
3459 int ata_std_softreset(struct ata_link *link, unsigned int *classes,
3460 unsigned long deadline)
3462 struct ata_port *ap = link->ap;
3463 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3464 unsigned int devmask = 0;
3470 if (ata_link_offline(link)) {
3471 classes[0] = ATA_DEV_NONE;
3475 /* determine if device 0/1 are present */
3476 if (ata_devchk(ap, 0))
3477 devmask |= (1 << 0);
3478 if (slave_possible && ata_devchk(ap, 1))
3479 devmask |= (1 << 1);
3481 /* select device 0 again */
3482 ap->ops->dev_select(ap, 0);
3484 /* issue bus reset */
3485 DPRINTK("about to softreset, devmask=%x\n", devmask);
3486 rc = ata_bus_softreset(ap, devmask, deadline);
3487 /* if link is occupied, -ENODEV too is an error */
3488 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
3489 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
3493 /* determine by signature whether we have ATA or ATAPI devices */
3494 classes[0] = ata_dev_try_classify(&link->device[0],
3495 devmask & (1 << 0), &err);
3496 if (slave_possible && err != 0x81)
3497 classes[1] = ata_dev_try_classify(&link->device[1],
3498 devmask & (1 << 1), &err);
3501 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3506 * sata_link_hardreset - reset link via SATA phy reset
3507 * @link: link to reset
3508 * @timing: timing parameters { interval, duratinon, timeout } in msec
3509 * @deadline: deadline jiffies for the operation
3511 * SATA phy-reset @link using DET bits of SControl register.
3514 * Kernel thread context (may sleep)
3517 * 0 on success, -errno otherwise.
3519 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
3520 unsigned long deadline)
3527 if (sata_set_spd_needed(link)) {
3528 /* SATA spec says nothing about how to reconfigure
3529 * spd. To be on the safe side, turn off phy during
3530 * reconfiguration. This works for at least ICH7 AHCI
3533 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3536 scontrol = (scontrol & 0x0f0) | 0x304;
3538 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3544 /* issue phy wake/reset */
3545 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3548 scontrol = (scontrol & 0x0f0) | 0x301;
3550 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
3553 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3554 * 10.4.2 says at least 1 ms.
3558 /* bring link back */
3559 rc = sata_link_resume(link, timing, deadline);
3561 DPRINTK("EXIT, rc=%d\n", rc);
3566 * sata_std_hardreset - reset host port via SATA phy reset
3567 * @link: link to reset
3568 * @class: resulting class of attached device
3569 * @deadline: deadline jiffies for the operation
3571 * SATA phy-reset host port using DET bits of SControl register,
3572 * wait for !BSY and classify the attached device.
3575 * Kernel thread context (may sleep)
3578 * 0 on success, -errno otherwise.
3580 int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3581 unsigned long deadline)
3583 struct ata_port *ap = link->ap;
3584 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3590 rc = sata_link_hardreset(link, timing, deadline);
3592 ata_link_printk(link, KERN_ERR,
3593 "COMRESET failed (errno=%d)\n", rc);
3597 /* TODO: phy layer with polling, timeouts, etc. */
3598 if (ata_link_offline(link)) {
3599 *class = ATA_DEV_NONE;
3600 DPRINTK("EXIT, link offline\n");
3604 /* wait a while before checking status, see SRST for more info */
3607 rc = ata_wait_ready(ap, deadline);
3608 /* link occupied, -ENODEV too is an error */
3610 ata_link_printk(link, KERN_ERR,
3611 "COMRESET failed (errno=%d)\n", rc);
3615 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3617 *class = ata_dev_try_classify(link->device, 1, NULL);
3619 DPRINTK("EXIT, class=%u\n", *class);
3624 * ata_std_postreset - standard postreset callback
3625 * @link: the target ata_link
3626 * @classes: classes of attached devices
3628 * This function is invoked after a successful reset. Note that
3629 * the device might have been reset more than once using
3630 * different reset methods before postreset is invoked.
3633 * Kernel thread context (may sleep)
3635 void ata_std_postreset(struct ata_link *link, unsigned int *classes)
3637 struct ata_port *ap = link->ap;
3642 /* print link status */
3643 sata_print_link_status(link);
3646 if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
3647 sata_scr_write(link, SCR_ERROR, serror);
3649 /* is double-select really necessary? */
3650 if (classes[0] != ATA_DEV_NONE)
3651 ap->ops->dev_select(ap, 1);
3652 if (classes[1] != ATA_DEV_NONE)
3653 ap->ops->dev_select(ap, 0);
3655 /* bail out if no device is present */
3656 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3657 DPRINTK("EXIT, no device\n");
3661 /* set up device control */
3662 if (ap->ioaddr.ctl_addr)
3663 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3669 * ata_dev_same_device - Determine whether new ID matches configured device
3670 * @dev: device to compare against
3671 * @new_class: class of the new device
3672 * @new_id: IDENTIFY page of the new device
3674 * Compare @new_class and @new_id against @dev and determine
3675 * whether @dev is the device indicated by @new_class and
3682 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3684 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3687 const u16 *old_id = dev->id;
3688 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3689 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3691 if (dev->class != new_class) {
3692 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3693 dev->class, new_class);
3697 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3698 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3699 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3700 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3702 if (strcmp(model[0], model[1])) {
3703 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3704 "'%s' != '%s'\n", model[0], model[1]);
3708 if (strcmp(serial[0], serial[1])) {
3709 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3710 "'%s' != '%s'\n", serial[0], serial[1]);
3718 * ata_dev_reread_id - Re-read IDENTIFY data
3719 * @dev: target ATA device
3720 * @readid_flags: read ID flags
3722 * Re-read IDENTIFY page and make sure @dev is still attached to
3726 * Kernel thread context (may sleep)
3729 * 0 on success, negative errno otherwise
3731 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
3733 unsigned int class = dev->class;
3734 u16 *id = (void *)dev->link->ap->sector_buf;
3738 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3742 /* is the device still there? */
3743 if (!ata_dev_same_device(dev, class, id))
3746 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3751 * ata_dev_revalidate - Revalidate ATA device
3752 * @dev: device to revalidate
3753 * @readid_flags: read ID flags
3755 * Re-read IDENTIFY page, make sure @dev is still attached to the
3756 * port and reconfigure it according to the new IDENTIFY page.
3759 * Kernel thread context (may sleep)
3762 * 0 on success, negative errno otherwise
3764 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3766 u64 n_sectors = dev->n_sectors;
3769 if (!ata_dev_enabled(dev))
3773 rc = ata_dev_reread_id(dev, readid_flags);
3777 /* configure device according to the new ID */
3778 rc = ata_dev_configure(dev);
3782 /* verify n_sectors hasn't changed */
3783 if (dev->class == ATA_DEV_ATA && n_sectors &&
3784 dev->n_sectors != n_sectors) {
3785 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3787 (unsigned long long)n_sectors,
3788 (unsigned long long)dev->n_sectors);
3790 /* restore original n_sectors */
3791 dev->n_sectors = n_sectors;
3800 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3804 struct ata_blacklist_entry {
3805 const char *model_num;
3806 const char *model_rev;
3807 unsigned long horkage;
3810 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3811 /* Devices with DMA related problems under Linux */
3812 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3813 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3814 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3815 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3816 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3817 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3818 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3819 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3820 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3821 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3822 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3823 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3824 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3825 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3826 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3827 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3828 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3829 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3830 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3831 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3832 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3833 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3834 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3835 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3836 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3837 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3838 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3839 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3840 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3841 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
3842 { "IOMEGA ZIP 250 ATAPI", NULL, ATA_HORKAGE_NODMA }, /* temporary fix */
3843 { "IOMEGA ZIP 250 ATAPI Floppy",
3844 NULL, ATA_HORKAGE_NODMA },
3846 /* Weird ATAPI devices */
3847 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
3849 /* Devices we expect to fail diagnostics */
3851 /* Devices where NCQ should be avoided */
3853 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3854 /* http://thread.gmane.org/gmane.linux.ide/14907 */
3855 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
3857 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
3858 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
3859 { "HITACHI HDS7250SASUN500G 0621KTAWSD", "K2AOAJ0AHITACHI",
3860 ATA_HORKAGE_NONCQ },
3862 /* Blacklist entries taken from Silicon Image 3124/3132
3863 Windows driver .inf file - also several Linux problem reports */
3864 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
3865 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
3866 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
3867 /* Drives which do spurious command completion */
3868 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
3869 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
3870 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
3871 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
3872 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
3873 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
3874 { "ST3160812AS", "3.AD", ATA_HORKAGE_NONCQ, },
3875 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
3877 /* devices which puke on READ_NATIVE_MAX */
3878 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
3879 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
3880 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
3881 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
3887 int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
3893 * check for trailing wildcard: *\0
3895 p = strchr(patt, wildchar);
3896 if (p && ((*(p + 1)) == 0))
3901 return strncmp(patt, name, len);
3904 static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
3906 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3907 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3908 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3910 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3911 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3913 while (ad->model_num) {
3914 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
3915 if (ad->model_rev == NULL)
3917 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
3925 static int ata_dma_blacklisted(const struct ata_device *dev)
3927 /* We don't support polling DMA.
3928 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3929 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3931 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
3932 (dev->flags & ATA_DFLAG_CDB_INTR))
3934 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
3938 * ata_dev_xfermask - Compute supported xfermask of the given device
3939 * @dev: Device to compute xfermask for
3941 * Compute supported xfermask of @dev and store it in
3942 * dev->*_mask. This function is responsible for applying all
3943 * known limits including host controller limits, device
3949 static void ata_dev_xfermask(struct ata_device *dev)
3951 struct ata_link *link = dev->link;
3952 struct ata_port *ap = link->ap;
3953 struct ata_host *host = ap->host;
3954 unsigned long xfer_mask;
3956 /* controller modes available */
3957 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3958 ap->mwdma_mask, ap->udma_mask);
3960 /* drive modes available */
3961 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3962 dev->mwdma_mask, dev->udma_mask);
3963 xfer_mask &= ata_id_xfermask(dev->id);
3966 * CFA Advanced TrueIDE timings are not allowed on a shared
3969 if (ata_dev_pair(dev)) {
3970 /* No PIO5 or PIO6 */
3971 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3972 /* No MWDMA3 or MWDMA 4 */
3973 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3976 if (ata_dma_blacklisted(dev)) {
3977 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3978 ata_dev_printk(dev, KERN_WARNING,
3979 "device is on DMA blacklist, disabling DMA\n");
3982 if ((host->flags & ATA_HOST_SIMPLEX) &&
3983 host->simplex_claimed && host->simplex_claimed != ap) {
3984 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3985 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3986 "other device, disabling DMA\n");
3989 if (ap->flags & ATA_FLAG_NO_IORDY)
3990 xfer_mask &= ata_pio_mask_no_iordy(dev);
3992 if (ap->ops->mode_filter)
3993 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
3995 /* Apply cable rule here. Don't apply it early because when
3996 * we handle hot plug the cable type can itself change.
3997 * Check this last so that we know if the transfer rate was
3998 * solely limited by the cable.
3999 * Unknown or 80 wire cables reported host side are checked
4000 * drive side as well. Cases where we know a 40wire cable
4001 * is used safely for 80 are not checked here.
4003 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4004 /* UDMA/44 or higher would be available */
4005 if((ap->cbl == ATA_CBL_PATA40) ||
4006 (ata_drive_40wire(dev->id) &&
4007 (ap->cbl == ATA_CBL_PATA_UNK ||
4008 ap->cbl == ATA_CBL_PATA80))) {
4009 ata_dev_printk(dev, KERN_WARNING,
4010 "limited to UDMA/33 due to 40-wire cable\n");
4011 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4014 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4015 &dev->mwdma_mask, &dev->udma_mask);
4019 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
4020 * @dev: Device to which command will be sent
4022 * Issue SET FEATURES - XFER MODE command to device @dev
4026 * PCI/etc. bus probe sem.
4029 * 0 on success, AC_ERR_* mask otherwise.
4032 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
4034 struct ata_taskfile tf;
4035 unsigned int err_mask;
4037 /* set up set-features taskfile */
4038 DPRINTK("set features - xfer mode\n");
4040 /* Some controllers and ATAPI devices show flaky interrupt
4041 * behavior after setting xfer mode. Use polling instead.
4043 ata_tf_init(dev, &tf);
4044 tf.command = ATA_CMD_SET_FEATURES;
4045 tf.feature = SETFEATURES_XFER;
4046 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
4047 tf.protocol = ATA_PROT_NODATA;
4048 tf.nsect = dev->xfer_mode;
4050 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4052 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4057 * ata_dev_set_AN - Issue SET FEATURES - SATA FEATURES
4058 * @dev: Device to which command will be sent
4059 * @enable: Whether to enable or disable the feature
4061 * Issue SET FEATURES - SATA FEATURES command to device @dev
4062 * on port @ap with sector count set to indicate Asynchronous
4063 * Notification feature
4066 * PCI/etc. bus probe sem.
4069 * 0 on success, AC_ERR_* mask otherwise.
4071 static unsigned int ata_dev_set_AN(struct ata_device *dev, u8 enable)
4073 struct ata_taskfile tf;
4074 unsigned int err_mask;
4076 /* set up set-features taskfile */
4077 DPRINTK("set features - SATA features\n");
4079 ata_tf_init(dev, &tf);
4080 tf.command = ATA_CMD_SET_FEATURES;
4081 tf.feature = enable;
4082 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4083 tf.protocol = ATA_PROT_NODATA;
4086 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4088 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4093 * ata_dev_init_params - Issue INIT DEV PARAMS command
4094 * @dev: Device to which command will be sent
4095 * @heads: Number of heads (taskfile parameter)
4096 * @sectors: Number of sectors (taskfile parameter)
4099 * Kernel thread context (may sleep)
4102 * 0 on success, AC_ERR_* mask otherwise.
4104 static unsigned int ata_dev_init_params(struct ata_device *dev,
4105 u16 heads, u16 sectors)
4107 struct ata_taskfile tf;
4108 unsigned int err_mask;
4110 /* Number of sectors per track 1-255. Number of heads 1-16 */
4111 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
4112 return AC_ERR_INVALID;
4114 /* set up init dev params taskfile */
4115 DPRINTK("init dev params \n");
4117 ata_tf_init(dev, &tf);
4118 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4119 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4120 tf.protocol = ATA_PROT_NODATA;
4122 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
4124 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4125 /* A clean abort indicates an original or just out of spec drive
4126 and we should continue as we issue the setup based on the
4127 drive reported working geometry */
4128 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4131 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4136 * ata_sg_clean - Unmap DMA memory associated with command
4137 * @qc: Command containing DMA memory to be released
4139 * Unmap all mapped DMA memory associated with this command.
4142 * spin_lock_irqsave(host lock)
4144 void ata_sg_clean(struct ata_queued_cmd *qc)
4146 struct ata_port *ap = qc->ap;
4147 struct scatterlist *sg = qc->__sg;
4148 int dir = qc->dma_dir;
4149 void *pad_buf = NULL;
4151 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
4152 WARN_ON(sg == NULL);
4154 if (qc->flags & ATA_QCFLAG_SINGLE)
4155 WARN_ON(qc->n_elem > 1);
4157 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4159 /* if we padded the buffer out to 32-bit bound, and data
4160 * xfer direction is from-device, we must copy from the
4161 * pad buffer back into the supplied buffer
4163 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
4164 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4166 if (qc->flags & ATA_QCFLAG_SG) {
4168 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4169 /* restore last sg */
4170 sg[qc->orig_n_elem - 1].length += qc->pad_len;
4172 struct scatterlist *psg = &qc->pad_sgent;
4173 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4174 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
4175 kunmap_atomic(addr, KM_IRQ0);
4179 dma_unmap_single(ap->dev,
4180 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
4183 sg->length += qc->pad_len;
4185 memcpy(qc->buf_virt + sg->length - qc->pad_len,
4186 pad_buf, qc->pad_len);
4189 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4194 * ata_fill_sg - Fill PCI IDE PRD table
4195 * @qc: Metadata associated with taskfile to be transferred
4197 * Fill PCI IDE PRD (scatter-gather) table with segments
4198 * associated with the current disk command.
4201 * spin_lock_irqsave(host lock)
4204 static void ata_fill_sg(struct ata_queued_cmd *qc)
4206 struct ata_port *ap = qc->ap;
4207 struct scatterlist *sg;
4210 WARN_ON(qc->__sg == NULL);
4211 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4214 ata_for_each_sg(sg, qc) {
4218 /* determine if physical DMA addr spans 64K boundary.
4219 * Note h/w doesn't support 64-bit, so we unconditionally
4220 * truncate dma_addr_t to u32.
4222 addr = (u32) sg_dma_address(sg);
4223 sg_len = sg_dma_len(sg);
4226 offset = addr & 0xffff;
4228 if ((offset + sg_len) > 0x10000)
4229 len = 0x10000 - offset;
4231 ap->prd[idx].addr = cpu_to_le32(addr);
4232 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
4233 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4242 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4246 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4247 * @qc: Metadata associated with taskfile to be transferred
4249 * Fill PCI IDE PRD (scatter-gather) table with segments
4250 * associated with the current disk command. Perform the fill
4251 * so that we avoid writing any length 64K records for
4252 * controllers that don't follow the spec.
4255 * spin_lock_irqsave(host lock)
4258 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4260 struct ata_port *ap = qc->ap;
4261 struct scatterlist *sg;
4264 WARN_ON(qc->__sg == NULL);
4265 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4268 ata_for_each_sg(sg, qc) {
4270 u32 sg_len, len, blen;
4272 /* determine if physical DMA addr spans 64K boundary.
4273 * Note h/w doesn't support 64-bit, so we unconditionally
4274 * truncate dma_addr_t to u32.
4276 addr = (u32) sg_dma_address(sg);
4277 sg_len = sg_dma_len(sg);
4280 offset = addr & 0xffff;
4282 if ((offset + sg_len) > 0x10000)
4283 len = 0x10000 - offset;
4285 blen = len & 0xffff;
4286 ap->prd[idx].addr = cpu_to_le32(addr);
4288 /* Some PATA chipsets like the CS5530 can't
4289 cope with 0x0000 meaning 64K as the spec says */
4290 ap->prd[idx].flags_len = cpu_to_le32(0x8000);
4292 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
4294 ap->prd[idx].flags_len = cpu_to_le32(blen);
4295 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4304 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4308 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4309 * @qc: Metadata associated with taskfile to check
4311 * Allow low-level driver to filter ATA PACKET commands, returning
4312 * a status indicating whether or not it is OK to use DMA for the
4313 * supplied PACKET command.
4316 * spin_lock_irqsave(host lock)
4318 * RETURNS: 0 when ATAPI DMA can be used
4321 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4323 struct ata_port *ap = qc->ap;
4325 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4326 * few ATAPI devices choke on such DMA requests.
4328 if (unlikely(qc->nbytes & 15))
4331 if (ap->ops->check_atapi_dma)
4332 return ap->ops->check_atapi_dma(qc);
4338 * ata_qc_prep - Prepare taskfile for submission
4339 * @qc: Metadata associated with taskfile to be prepared
4341 * Prepare ATA taskfile for submission.
4344 * spin_lock_irqsave(host lock)
4346 void ata_qc_prep(struct ata_queued_cmd *qc)
4348 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4355 * ata_dumb_qc_prep - Prepare taskfile for submission
4356 * @qc: Metadata associated with taskfile to be prepared
4358 * Prepare ATA taskfile for submission.
4361 * spin_lock_irqsave(host lock)
4363 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
4365 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4368 ata_fill_sg_dumb(qc);
4371 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
4374 * ata_sg_init_one - Associate command with memory buffer
4375 * @qc: Command to be associated
4376 * @buf: Memory buffer
4377 * @buflen: Length of memory buffer, in bytes.
4379 * Initialize the data-related elements of queued_cmd @qc
4380 * to point to a single memory buffer, @buf of byte length @buflen.
4383 * spin_lock_irqsave(host lock)
4386 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
4388 qc->flags |= ATA_QCFLAG_SINGLE;
4390 qc->__sg = &qc->sgent;
4392 qc->orig_n_elem = 1;
4394 qc->nbytes = buflen;
4396 sg_init_one(&qc->sgent, buf, buflen);
4400 * ata_sg_init - Associate command with scatter-gather table.
4401 * @qc: Command to be associated
4402 * @sg: Scatter-gather table.
4403 * @n_elem: Number of elements in s/g table.
4405 * Initialize the data-related elements of queued_cmd @qc
4406 * to point to a scatter-gather table @sg, containing @n_elem
4410 * spin_lock_irqsave(host lock)
4413 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4414 unsigned int n_elem)
4416 qc->flags |= ATA_QCFLAG_SG;
4418 qc->n_elem = n_elem;
4419 qc->orig_n_elem = n_elem;
4423 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
4424 * @qc: Command with memory buffer to be mapped.
4426 * DMA-map the memory buffer associated with queued_cmd @qc.
4429 * spin_lock_irqsave(host lock)
4432 * Zero on success, negative on error.
4435 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
4437 struct ata_port *ap = qc->ap;
4438 int dir = qc->dma_dir;
4439 struct scatterlist *sg = qc->__sg;
4440 dma_addr_t dma_address;
4443 /* we must lengthen transfers to end on a 32-bit boundary */
4444 qc->pad_len = sg->length & 3;
4446 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4447 struct scatterlist *psg = &qc->pad_sgent;
4449 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4451 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4453 if (qc->tf.flags & ATA_TFLAG_WRITE)
4454 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
4457 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4458 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4460 sg->length -= qc->pad_len;
4461 if (sg->length == 0)
4464 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
4465 sg->length, qc->pad_len);
4473 dma_address = dma_map_single(ap->dev, qc->buf_virt,
4475 if (dma_mapping_error(dma_address)) {
4477 sg->length += qc->pad_len;
4481 sg_dma_address(sg) = dma_address;
4482 sg_dma_len(sg) = sg->length;
4485 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
4486 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4492 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4493 * @qc: Command with scatter-gather table to be mapped.
4495 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4498 * spin_lock_irqsave(host lock)
4501 * Zero on success, negative on error.
4505 static int ata_sg_setup(struct ata_queued_cmd *qc)
4507 struct ata_port *ap = qc->ap;
4508 struct scatterlist *sg = qc->__sg;
4509 struct scatterlist *lsg = &sg[qc->n_elem - 1];
4510 int n_elem, pre_n_elem, dir, trim_sg = 0;
4512 VPRINTK("ENTER, ata%u\n", ap->print_id);
4513 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
4515 /* we must lengthen transfers to end on a 32-bit boundary */
4516 qc->pad_len = lsg->length & 3;
4518 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4519 struct scatterlist *psg = &qc->pad_sgent;
4520 unsigned int offset;
4522 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4524 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4527 * psg->page/offset are used to copy to-be-written
4528 * data in this function or read data in ata_sg_clean.
4530 offset = lsg->offset + lsg->length - qc->pad_len;
4531 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
4532 psg->offset = offset_in_page(offset);
4534 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4535 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4536 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
4537 kunmap_atomic(addr, KM_IRQ0);
4540 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4541 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4543 lsg->length -= qc->pad_len;
4544 if (lsg->length == 0)
4547 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
4548 qc->n_elem - 1, lsg->length, qc->pad_len);
4551 pre_n_elem = qc->n_elem;
4552 if (trim_sg && pre_n_elem)
4561 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4563 /* restore last sg */
4564 lsg->length += qc->pad_len;
4568 DPRINTK("%d sg elements mapped\n", n_elem);
4571 qc->n_elem = n_elem;
4577 * swap_buf_le16 - swap halves of 16-bit words in place
4578 * @buf: Buffer to swap
4579 * @buf_words: Number of 16-bit words in buffer.
4581 * Swap halves of 16-bit words if needed to convert from
4582 * little-endian byte order to native cpu byte order, or
4586 * Inherited from caller.
4588 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4593 for (i = 0; i < buf_words; i++)
4594 buf[i] = le16_to_cpu(buf[i]);
4595 #endif /* __BIG_ENDIAN */
4599 * ata_data_xfer - Transfer data by PIO
4600 * @adev: device to target
4602 * @buflen: buffer length
4603 * @write_data: read/write
4605 * Transfer data from/to the device data register by PIO.
4608 * Inherited from caller.
4610 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4611 unsigned int buflen, int write_data)
4613 struct ata_port *ap = adev->link->ap;
4614 unsigned int words = buflen >> 1;
4616 /* Transfer multiple of 2 bytes */
4618 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4620 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4622 /* Transfer trailing 1 byte, if any. */
4623 if (unlikely(buflen & 0x01)) {
4624 u16 align_buf[1] = { 0 };
4625 unsigned char *trailing_buf = buf + buflen - 1;
4628 memcpy(align_buf, trailing_buf, 1);
4629 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4631 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4632 memcpy(trailing_buf, align_buf, 1);
4638 * ata_data_xfer_noirq - Transfer data by PIO
4639 * @adev: device to target
4641 * @buflen: buffer length
4642 * @write_data: read/write
4644 * Transfer data from/to the device data register by PIO. Do the
4645 * transfer with interrupts disabled.
4648 * Inherited from caller.
4650 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4651 unsigned int buflen, int write_data)
4653 unsigned long flags;
4654 local_irq_save(flags);
4655 ata_data_xfer(adev, buf, buflen, write_data);
4656 local_irq_restore(flags);
4661 * ata_pio_sector - Transfer a sector of data.
4662 * @qc: Command on going
4664 * Transfer qc->sect_size bytes of data from/to the ATA device.
4667 * Inherited from caller.
4670 static void ata_pio_sector(struct ata_queued_cmd *qc)
4672 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4673 struct scatterlist *sg = qc->__sg;
4674 struct ata_port *ap = qc->ap;
4676 unsigned int offset;
4679 if (qc->curbytes == qc->nbytes - qc->sect_size)
4680 ap->hsm_task_state = HSM_ST_LAST;
4682 page = sg[qc->cursg].page;
4683 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4685 /* get the current page and offset */
4686 page = nth_page(page, (offset >> PAGE_SHIFT));
4687 offset %= PAGE_SIZE;
4689 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4691 if (PageHighMem(page)) {
4692 unsigned long flags;
4694 /* FIXME: use a bounce buffer */
4695 local_irq_save(flags);
4696 buf = kmap_atomic(page, KM_IRQ0);
4698 /* do the actual data transfer */
4699 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4701 kunmap_atomic(buf, KM_IRQ0);
4702 local_irq_restore(flags);
4704 buf = page_address(page);
4705 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4708 qc->curbytes += qc->sect_size;
4709 qc->cursg_ofs += qc->sect_size;
4711 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4718 * ata_pio_sectors - Transfer one or many sectors.
4719 * @qc: Command on going
4721 * Transfer one or many sectors of data from/to the
4722 * ATA device for the DRQ request.
4725 * Inherited from caller.
4728 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4730 if (is_multi_taskfile(&qc->tf)) {
4731 /* READ/WRITE MULTIPLE */
4734 WARN_ON(qc->dev->multi_count == 0);
4736 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
4737 qc->dev->multi_count);
4743 ata_altstatus(qc->ap); /* flush */
4747 * atapi_send_cdb - Write CDB bytes to hardware
4748 * @ap: Port to which ATAPI device is attached.
4749 * @qc: Taskfile currently active
4751 * When device has indicated its readiness to accept
4752 * a CDB, this function is called. Send the CDB.
4758 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4761 DPRINTK("send cdb\n");
4762 WARN_ON(qc->dev->cdb_len < 12);
4764 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4765 ata_altstatus(ap); /* flush */
4767 switch (qc->tf.protocol) {
4768 case ATA_PROT_ATAPI:
4769 ap->hsm_task_state = HSM_ST;
4771 case ATA_PROT_ATAPI_NODATA:
4772 ap->hsm_task_state = HSM_ST_LAST;
4774 case ATA_PROT_ATAPI_DMA:
4775 ap->hsm_task_state = HSM_ST_LAST;
4776 /* initiate bmdma */
4777 ap->ops->bmdma_start(qc);
4783 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4784 * @qc: Command on going
4785 * @bytes: number of bytes
4787 * Transfer Transfer data from/to the ATAPI device.
4790 * Inherited from caller.
4794 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4796 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4797 struct scatterlist *sg = qc->__sg;
4798 struct ata_port *ap = qc->ap;
4801 unsigned int offset, count;
4803 if (qc->curbytes + bytes >= qc->nbytes)
4804 ap->hsm_task_state = HSM_ST_LAST;
4807 if (unlikely(qc->cursg >= qc->n_elem)) {
4809 * The end of qc->sg is reached and the device expects
4810 * more data to transfer. In order not to overrun qc->sg
4811 * and fulfill length specified in the byte count register,
4812 * - for read case, discard trailing data from the device
4813 * - for write case, padding zero data to the device
4815 u16 pad_buf[1] = { 0 };
4816 unsigned int words = bytes >> 1;
4819 if (words) /* warning if bytes > 1 */
4820 ata_dev_printk(qc->dev, KERN_WARNING,
4821 "%u bytes trailing data\n", bytes);
4823 for (i = 0; i < words; i++)
4824 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4826 ap->hsm_task_state = HSM_ST_LAST;
4830 sg = &qc->__sg[qc->cursg];
4833 offset = sg->offset + qc->cursg_ofs;
4835 /* get the current page and offset */
4836 page = nth_page(page, (offset >> PAGE_SHIFT));
4837 offset %= PAGE_SIZE;
4839 /* don't overrun current sg */
4840 count = min(sg->length - qc->cursg_ofs, bytes);
4842 /* don't cross page boundaries */
4843 count = min(count, (unsigned int)PAGE_SIZE - offset);
4845 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4847 if (PageHighMem(page)) {
4848 unsigned long flags;
4850 /* FIXME: use bounce buffer */
4851 local_irq_save(flags);
4852 buf = kmap_atomic(page, KM_IRQ0);
4854 /* do the actual data transfer */
4855 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4857 kunmap_atomic(buf, KM_IRQ0);
4858 local_irq_restore(flags);
4860 buf = page_address(page);
4861 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4865 qc->curbytes += count;
4866 qc->cursg_ofs += count;
4868 if (qc->cursg_ofs == sg->length) {
4878 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4879 * @qc: Command on going
4881 * Transfer Transfer data from/to the ATAPI device.
4884 * Inherited from caller.
4887 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4889 struct ata_port *ap = qc->ap;
4890 struct ata_device *dev = qc->dev;
4891 unsigned int ireason, bc_lo, bc_hi, bytes;
4892 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4894 /* Abuse qc->result_tf for temp storage of intermediate TF
4895 * here to save some kernel stack usage.
4896 * For normal completion, qc->result_tf is not relevant. For
4897 * error, qc->result_tf is later overwritten by ata_qc_complete().
4898 * So, the correctness of qc->result_tf is not affected.
4900 ap->ops->tf_read(ap, &qc->result_tf);
4901 ireason = qc->result_tf.nsect;
4902 bc_lo = qc->result_tf.lbam;
4903 bc_hi = qc->result_tf.lbah;
4904 bytes = (bc_hi << 8) | bc_lo;
4906 /* shall be cleared to zero, indicating xfer of data */
4907 if (ireason & (1 << 0))
4910 /* make sure transfer direction matches expected */
4911 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4912 if (do_write != i_write)
4915 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
4917 __atapi_pio_bytes(qc, bytes);
4918 ata_altstatus(ap); /* flush */
4923 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4924 qc->err_mask |= AC_ERR_HSM;
4925 ap->hsm_task_state = HSM_ST_ERR;
4929 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4930 * @ap: the target ata_port
4934 * 1 if ok in workqueue, 0 otherwise.
4937 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4939 if (qc->tf.flags & ATA_TFLAG_POLLING)
4942 if (ap->hsm_task_state == HSM_ST_FIRST) {
4943 if (qc->tf.protocol == ATA_PROT_PIO &&
4944 (qc->tf.flags & ATA_TFLAG_WRITE))
4947 if (is_atapi_taskfile(&qc->tf) &&
4948 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4956 * ata_hsm_qc_complete - finish a qc running on standard HSM
4957 * @qc: Command to complete
4958 * @in_wq: 1 if called from workqueue, 0 otherwise
4960 * Finish @qc which is running on standard HSM.
4963 * If @in_wq is zero, spin_lock_irqsave(host lock).
4964 * Otherwise, none on entry and grabs host lock.
4966 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4968 struct ata_port *ap = qc->ap;
4969 unsigned long flags;
4971 if (ap->ops->error_handler) {
4973 spin_lock_irqsave(ap->lock, flags);
4975 /* EH might have kicked in while host lock is
4978 qc = ata_qc_from_tag(ap, qc->tag);
4980 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4981 ap->ops->irq_on(ap);
4982 ata_qc_complete(qc);
4984 ata_port_freeze(ap);
4987 spin_unlock_irqrestore(ap->lock, flags);
4989 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4990 ata_qc_complete(qc);
4992 ata_port_freeze(ap);
4996 spin_lock_irqsave(ap->lock, flags);
4997 ap->ops->irq_on(ap);
4998 ata_qc_complete(qc);
4999 spin_unlock_irqrestore(ap->lock, flags);
5001 ata_qc_complete(qc);
5006 * ata_hsm_move - move the HSM to the next state.
5007 * @ap: the target ata_port
5009 * @status: current device status
5010 * @in_wq: 1 if called from workqueue, 0 otherwise
5013 * 1 when poll next status needed, 0 otherwise.
5015 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
5016 u8 status, int in_wq)
5018 unsigned long flags = 0;
5021 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
5023 /* Make sure ata_qc_issue_prot() does not throw things
5024 * like DMA polling into the workqueue. Notice that
5025 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
5027 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
5030 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
5031 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
5033 switch (ap->hsm_task_state) {
5035 /* Send first data block or PACKET CDB */
5037 /* If polling, we will stay in the work queue after
5038 * sending the data. Otherwise, interrupt handler
5039 * takes over after sending the data.
5041 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
5043 /* check device status */
5044 if (unlikely((status & ATA_DRQ) == 0)) {
5045 /* handle BSY=0, DRQ=0 as error */
5046 if (likely(status & (ATA_ERR | ATA_DF)))
5047 /* device stops HSM for abort/error */
5048 qc->err_mask |= AC_ERR_DEV;
5050 /* HSM violation. Let EH handle this */
5051 qc->err_mask |= AC_ERR_HSM;
5053 ap->hsm_task_state = HSM_ST_ERR;
5057 /* Device should not ask for data transfer (DRQ=1)
5058 * when it finds something wrong.
5059 * We ignore DRQ here and stop the HSM by
5060 * changing hsm_task_state to HSM_ST_ERR and
5061 * let the EH abort the command or reset the device.
5063 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5064 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
5065 "error, dev_stat 0x%X\n", status);
5066 qc->err_mask |= AC_ERR_HSM;
5067 ap->hsm_task_state = HSM_ST_ERR;
5071 /* Send the CDB (atapi) or the first data block (ata pio out).
5072 * During the state transition, interrupt handler shouldn't
5073 * be invoked before the data transfer is complete and
5074 * hsm_task_state is changed. Hence, the following locking.
5077 spin_lock_irqsave(ap->lock, flags);
5079 if (qc->tf.protocol == ATA_PROT_PIO) {
5080 /* PIO data out protocol.
5081 * send first data block.
5084 /* ata_pio_sectors() might change the state
5085 * to HSM_ST_LAST. so, the state is changed here
5086 * before ata_pio_sectors().
5088 ap->hsm_task_state = HSM_ST;
5089 ata_pio_sectors(qc);
5092 atapi_send_cdb(ap, qc);
5095 spin_unlock_irqrestore(ap->lock, flags);
5097 /* if polling, ata_pio_task() handles the rest.
5098 * otherwise, interrupt handler takes over from here.
5103 /* complete command or read/write the data register */
5104 if (qc->tf.protocol == ATA_PROT_ATAPI) {
5105 /* ATAPI PIO protocol */
5106 if ((status & ATA_DRQ) == 0) {
5107 /* No more data to transfer or device error.
5108 * Device error will be tagged in HSM_ST_LAST.
5110 ap->hsm_task_state = HSM_ST_LAST;
5114 /* Device should not ask for data transfer (DRQ=1)
5115 * when it finds something wrong.
5116 * We ignore DRQ here and stop the HSM by
5117 * changing hsm_task_state to HSM_ST_ERR and
5118 * let the EH abort the command or reset the device.
5120 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5121 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
5122 "device error, dev_stat 0x%X\n",
5124 qc->err_mask |= AC_ERR_HSM;
5125 ap->hsm_task_state = HSM_ST_ERR;
5129 atapi_pio_bytes(qc);
5131 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
5132 /* bad ireason reported by device */
5136 /* ATA PIO protocol */
5137 if (unlikely((status & ATA_DRQ) == 0)) {
5138 /* handle BSY=0, DRQ=0 as error */
5139 if (likely(status & (ATA_ERR | ATA_DF)))
5140 /* device stops HSM for abort/error */
5141 qc->err_mask |= AC_ERR_DEV;
5143 /* HSM violation. Let EH handle this.
5144 * Phantom devices also trigger this
5145 * condition. Mark hint.
5147 qc->err_mask |= AC_ERR_HSM |
5150 ap->hsm_task_state = HSM_ST_ERR;
5154 /* For PIO reads, some devices may ask for
5155 * data transfer (DRQ=1) alone with ERR=1.
5156 * We respect DRQ here and transfer one
5157 * block of junk data before changing the
5158 * hsm_task_state to HSM_ST_ERR.
5160 * For PIO writes, ERR=1 DRQ=1 doesn't make
5161 * sense since the data block has been
5162 * transferred to the device.
5164 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5165 /* data might be corrputed */
5166 qc->err_mask |= AC_ERR_DEV;
5168 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
5169 ata_pio_sectors(qc);
5170 status = ata_wait_idle(ap);
5173 if (status & (ATA_BUSY | ATA_DRQ))
5174 qc->err_mask |= AC_ERR_HSM;
5176 /* ata_pio_sectors() might change the
5177 * state to HSM_ST_LAST. so, the state
5178 * is changed after ata_pio_sectors().
5180 ap->hsm_task_state = HSM_ST_ERR;
5184 ata_pio_sectors(qc);
5186 if (ap->hsm_task_state == HSM_ST_LAST &&
5187 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5189 status = ata_wait_idle(ap);
5198 if (unlikely(!ata_ok(status))) {
5199 qc->err_mask |= __ac_err_mask(status);
5200 ap->hsm_task_state = HSM_ST_ERR;
5204 /* no more data to transfer */
5205 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5206 ap->print_id, qc->dev->devno, status);
5208 WARN_ON(qc->err_mask);
5210 ap->hsm_task_state = HSM_ST_IDLE;
5212 /* complete taskfile transaction */
5213 ata_hsm_qc_complete(qc, in_wq);
5219 /* make sure qc->err_mask is available to
5220 * know what's wrong and recover
5222 WARN_ON(qc->err_mask == 0);
5224 ap->hsm_task_state = HSM_ST_IDLE;
5226 /* complete taskfile transaction */
5227 ata_hsm_qc_complete(qc, in_wq);
5239 static void ata_pio_task(struct work_struct *work)
5241 struct ata_port *ap =
5242 container_of(work, struct ata_port, port_task.work);
5243 struct ata_queued_cmd *qc = ap->port_task_data;
5248 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5251 * This is purely heuristic. This is a fast path.
5252 * Sometimes when we enter, BSY will be cleared in
5253 * a chk-status or two. If not, the drive is probably seeking
5254 * or something. Snooze for a couple msecs, then
5255 * chk-status again. If still busy, queue delayed work.
5257 status = ata_busy_wait(ap, ATA_BUSY, 5);
5258 if (status & ATA_BUSY) {
5260 status = ata_busy_wait(ap, ATA_BUSY, 10);
5261 if (status & ATA_BUSY) {
5262 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
5268 poll_next = ata_hsm_move(ap, qc, status, 1);
5270 /* another command or interrupt handler
5271 * may be running at this point.
5278 * ata_qc_new - Request an available ATA command, for queueing
5279 * @ap: Port associated with device @dev
5280 * @dev: Device from whom we request an available command structure
5286 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5288 struct ata_queued_cmd *qc = NULL;
5291 /* no command while frozen */
5292 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5295 /* the last tag is reserved for internal command. */
5296 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5297 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5298 qc = __ata_qc_from_tag(ap, i);
5309 * ata_qc_new_init - Request an available ATA command, and initialize it
5310 * @dev: Device from whom we request an available command structure
5316 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5318 struct ata_port *ap = dev->link->ap;
5319 struct ata_queued_cmd *qc;
5321 qc = ata_qc_new(ap);
5334 * ata_qc_free - free unused ata_queued_cmd
5335 * @qc: Command to complete
5337 * Designed to free unused ata_queued_cmd object
5338 * in case something prevents using it.
5341 * spin_lock_irqsave(host lock)
5343 void ata_qc_free(struct ata_queued_cmd *qc)
5345 struct ata_port *ap = qc->ap;
5348 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5352 if (likely(ata_tag_valid(tag))) {
5353 qc->tag = ATA_TAG_POISON;
5354 clear_bit(tag, &ap->qc_allocated);
5358 void __ata_qc_complete(struct ata_queued_cmd *qc)
5360 struct ata_port *ap = qc->ap;
5361 struct ata_link *link = qc->dev->link;
5363 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5364 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5366 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5369 /* command should be marked inactive atomically with qc completion */
5370 if (qc->tf.protocol == ATA_PROT_NCQ)
5371 link->sactive &= ~(1 << qc->tag);
5373 link->active_tag = ATA_TAG_POISON;
5375 /* atapi: mark qc as inactive to prevent the interrupt handler
5376 * from completing the command twice later, before the error handler
5377 * is called. (when rc != 0 and atapi request sense is needed)
5379 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5380 ap->qc_active &= ~(1 << qc->tag);
5382 /* call completion callback */
5383 qc->complete_fn(qc);
5386 static void fill_result_tf(struct ata_queued_cmd *qc)
5388 struct ata_port *ap = qc->ap;
5390 qc->result_tf.flags = qc->tf.flags;
5391 ap->ops->tf_read(ap, &qc->result_tf);
5395 * ata_qc_complete - Complete an active ATA command
5396 * @qc: Command to complete
5397 * @err_mask: ATA Status register contents
5399 * Indicate to the mid and upper layers that an ATA
5400 * command has completed, with either an ok or not-ok status.
5403 * spin_lock_irqsave(host lock)
5405 void ata_qc_complete(struct ata_queued_cmd *qc)
5407 struct ata_port *ap = qc->ap;
5409 /* XXX: New EH and old EH use different mechanisms to
5410 * synchronize EH with regular execution path.
5412 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5413 * Normal execution path is responsible for not accessing a
5414 * failed qc. libata core enforces the rule by returning NULL
5415 * from ata_qc_from_tag() for failed qcs.
5417 * Old EH depends on ata_qc_complete() nullifying completion
5418 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5419 * not synchronize with interrupt handler. Only PIO task is
5422 if (ap->ops->error_handler) {
5423 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5425 if (unlikely(qc->err_mask))
5426 qc->flags |= ATA_QCFLAG_FAILED;
5428 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5429 if (!ata_tag_internal(qc->tag)) {
5430 /* always fill result TF for failed qc */
5432 ata_qc_schedule_eh(qc);
5437 /* read result TF if requested */
5438 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5441 __ata_qc_complete(qc);
5443 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5446 /* read result TF if failed or requested */
5447 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5450 __ata_qc_complete(qc);
5455 * ata_qc_complete_multiple - Complete multiple qcs successfully
5456 * @ap: port in question
5457 * @qc_active: new qc_active mask
5458 * @finish_qc: LLDD callback invoked before completing a qc
5460 * Complete in-flight commands. This functions is meant to be
5461 * called from low-level driver's interrupt routine to complete
5462 * requests normally. ap->qc_active and @qc_active is compared
5463 * and commands are completed accordingly.
5466 * spin_lock_irqsave(host lock)
5469 * Number of completed commands on success, -errno otherwise.
5471 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
5472 void (*finish_qc)(struct ata_queued_cmd *))
5478 done_mask = ap->qc_active ^ qc_active;
5480 if (unlikely(done_mask & qc_active)) {
5481 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
5482 "(%08x->%08x)\n", ap->qc_active, qc_active);
5486 for (i = 0; i < ATA_MAX_QUEUE; i++) {
5487 struct ata_queued_cmd *qc;
5489 if (!(done_mask & (1 << i)))
5492 if ((qc = ata_qc_from_tag(ap, i))) {
5495 ata_qc_complete(qc);
5503 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
5505 struct ata_port *ap = qc->ap;
5507 switch (qc->tf.protocol) {
5510 case ATA_PROT_ATAPI_DMA:
5513 case ATA_PROT_ATAPI:
5515 if (ap->flags & ATA_FLAG_PIO_DMA)
5528 * ata_qc_issue - issue taskfile to device
5529 * @qc: command to issue to device
5531 * Prepare an ATA command to submission to device.
5532 * This includes mapping the data into a DMA-able
5533 * area, filling in the S/G table, and finally
5534 * writing the taskfile to hardware, starting the command.
5537 * spin_lock_irqsave(host lock)
5539 void ata_qc_issue(struct ata_queued_cmd *qc)
5541 struct ata_port *ap = qc->ap;
5542 struct ata_link *link = qc->dev->link;
5544 /* Make sure only one non-NCQ command is outstanding. The
5545 * check is skipped for old EH because it reuses active qc to
5546 * request ATAPI sense.
5548 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
5550 if (qc->tf.protocol == ATA_PROT_NCQ) {
5551 WARN_ON(link->sactive & (1 << qc->tag));
5552 link->sactive |= 1 << qc->tag;
5554 WARN_ON(link->sactive);
5555 link->active_tag = qc->tag;
5558 qc->flags |= ATA_QCFLAG_ACTIVE;
5559 ap->qc_active |= 1 << qc->tag;
5561 if (ata_should_dma_map(qc)) {
5562 if (qc->flags & ATA_QCFLAG_SG) {
5563 if (ata_sg_setup(qc))
5565 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
5566 if (ata_sg_setup_one(qc))
5570 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5573 ap->ops->qc_prep(qc);
5575 qc->err_mask |= ap->ops->qc_issue(qc);
5576 if (unlikely(qc->err_mask))
5581 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5582 qc->err_mask |= AC_ERR_SYSTEM;
5584 ata_qc_complete(qc);
5588 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
5589 * @qc: command to issue to device
5591 * Using various libata functions and hooks, this function
5592 * starts an ATA command. ATA commands are grouped into
5593 * classes called "protocols", and issuing each type of protocol
5594 * is slightly different.
5596 * May be used as the qc_issue() entry in ata_port_operations.
5599 * spin_lock_irqsave(host lock)
5602 * Zero on success, AC_ERR_* mask on failure
5605 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
5607 struct ata_port *ap = qc->ap;
5609 /* Use polling pio if the LLD doesn't handle
5610 * interrupt driven pio and atapi CDB interrupt.
5612 if (ap->flags & ATA_FLAG_PIO_POLLING) {
5613 switch (qc->tf.protocol) {
5615 case ATA_PROT_NODATA:
5616 case ATA_PROT_ATAPI:
5617 case ATA_PROT_ATAPI_NODATA:
5618 qc->tf.flags |= ATA_TFLAG_POLLING;
5620 case ATA_PROT_ATAPI_DMA:
5621 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
5622 /* see ata_dma_blacklisted() */
5630 /* select the device */
5631 ata_dev_select(ap, qc->dev->devno, 1, 0);
5633 /* start the command */
5634 switch (qc->tf.protocol) {
5635 case ATA_PROT_NODATA:
5636 if (qc->tf.flags & ATA_TFLAG_POLLING)
5637 ata_qc_set_polling(qc);
5639 ata_tf_to_host(ap, &qc->tf);
5640 ap->hsm_task_state = HSM_ST_LAST;
5642 if (qc->tf.flags & ATA_TFLAG_POLLING)
5643 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5648 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5650 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5651 ap->ops->bmdma_setup(qc); /* set up bmdma */
5652 ap->ops->bmdma_start(qc); /* initiate bmdma */
5653 ap->hsm_task_state = HSM_ST_LAST;
5657 if (qc->tf.flags & ATA_TFLAG_POLLING)
5658 ata_qc_set_polling(qc);
5660 ata_tf_to_host(ap, &qc->tf);
5662 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5663 /* PIO data out protocol */
5664 ap->hsm_task_state = HSM_ST_FIRST;
5665 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5667 /* always send first data block using
5668 * the ata_pio_task() codepath.
5671 /* PIO data in protocol */
5672 ap->hsm_task_state = HSM_ST;
5674 if (qc->tf.flags & ATA_TFLAG_POLLING)
5675 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5677 /* if polling, ata_pio_task() handles the rest.
5678 * otherwise, interrupt handler takes over from here.
5684 case ATA_PROT_ATAPI:
5685 case ATA_PROT_ATAPI_NODATA:
5686 if (qc->tf.flags & ATA_TFLAG_POLLING)
5687 ata_qc_set_polling(qc);
5689 ata_tf_to_host(ap, &qc->tf);
5691 ap->hsm_task_state = HSM_ST_FIRST;
5693 /* send cdb by polling if no cdb interrupt */
5694 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5695 (qc->tf.flags & ATA_TFLAG_POLLING))
5696 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5699 case ATA_PROT_ATAPI_DMA:
5700 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5702 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5703 ap->ops->bmdma_setup(qc); /* set up bmdma */
5704 ap->hsm_task_state = HSM_ST_FIRST;
5706 /* send cdb by polling if no cdb interrupt */
5707 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5708 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5713 return AC_ERR_SYSTEM;
5720 * ata_host_intr - Handle host interrupt for given (port, task)
5721 * @ap: Port on which interrupt arrived (possibly...)
5722 * @qc: Taskfile currently active in engine
5724 * Handle host interrupt for given queued command. Currently,
5725 * only DMA interrupts are handled. All other commands are
5726 * handled via polling with interrupts disabled (nIEN bit).
5729 * spin_lock_irqsave(host lock)
5732 * One if interrupt was handled, zero if not (shared irq).
5735 inline unsigned int ata_host_intr (struct ata_port *ap,
5736 struct ata_queued_cmd *qc)
5738 struct ata_eh_info *ehi = &ap->link.eh_info;
5739 u8 status, host_stat = 0;
5741 VPRINTK("ata%u: protocol %d task_state %d\n",
5742 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
5744 /* Check whether we are expecting interrupt in this state */
5745 switch (ap->hsm_task_state) {
5747 /* Some pre-ATAPI-4 devices assert INTRQ
5748 * at this state when ready to receive CDB.
5751 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5752 * The flag was turned on only for atapi devices.
5753 * No need to check is_atapi_taskfile(&qc->tf) again.
5755 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5759 if (qc->tf.protocol == ATA_PROT_DMA ||
5760 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5761 /* check status of DMA engine */
5762 host_stat = ap->ops->bmdma_status(ap);
5763 VPRINTK("ata%u: host_stat 0x%X\n",
5764 ap->print_id, host_stat);
5766 /* if it's not our irq... */
5767 if (!(host_stat & ATA_DMA_INTR))
5770 /* before we do anything else, clear DMA-Start bit */
5771 ap->ops->bmdma_stop(qc);
5773 if (unlikely(host_stat & ATA_DMA_ERR)) {
5774 /* error when transfering data to/from memory */
5775 qc->err_mask |= AC_ERR_HOST_BUS;
5776 ap->hsm_task_state = HSM_ST_ERR;
5786 /* check altstatus */
5787 status = ata_altstatus(ap);
5788 if (status & ATA_BUSY)
5791 /* check main status, clearing INTRQ */
5792 status = ata_chk_status(ap);
5793 if (unlikely(status & ATA_BUSY))
5796 /* ack bmdma irq events */
5797 ap->ops->irq_clear(ap);
5799 ata_hsm_move(ap, qc, status, 0);
5801 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5802 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5803 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5805 return 1; /* irq handled */
5808 ap->stats.idle_irq++;
5811 if ((ap->stats.idle_irq % 1000) == 0) {
5813 ap->ops->irq_clear(ap);
5814 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5818 return 0; /* irq not handled */
5822 * ata_interrupt - Default ATA host interrupt handler
5823 * @irq: irq line (unused)
5824 * @dev_instance: pointer to our ata_host information structure
5826 * Default interrupt handler for PCI IDE devices. Calls
5827 * ata_host_intr() for each port that is not disabled.
5830 * Obtains host lock during operation.
5833 * IRQ_NONE or IRQ_HANDLED.
5836 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5838 struct ata_host *host = dev_instance;
5840 unsigned int handled = 0;
5841 unsigned long flags;
5843 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5844 spin_lock_irqsave(&host->lock, flags);
5846 for (i = 0; i < host->n_ports; i++) {
5847 struct ata_port *ap;
5849 ap = host->ports[i];
5851 !(ap->flags & ATA_FLAG_DISABLED)) {
5852 struct ata_queued_cmd *qc;
5854 qc = ata_qc_from_tag(ap, ap->link.active_tag);
5855 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5856 (qc->flags & ATA_QCFLAG_ACTIVE))
5857 handled |= ata_host_intr(ap, qc);
5861 spin_unlock_irqrestore(&host->lock, flags);
5863 return IRQ_RETVAL(handled);
5867 * sata_scr_valid - test whether SCRs are accessible
5868 * @link: ATA link to test SCR accessibility for
5870 * Test whether SCRs are accessible for @link.
5876 * 1 if SCRs are accessible, 0 otherwise.
5878 int sata_scr_valid(struct ata_link *link)
5880 struct ata_port *ap = link->ap;
5882 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
5886 * sata_scr_read - read SCR register of the specified port
5887 * @link: ATA link to read SCR for
5889 * @val: Place to store read value
5891 * Read SCR register @reg of @link into *@val. This function is
5892 * guaranteed to succeed if the cable type of the port is SATA
5893 * and the port implements ->scr_read.
5899 * 0 on success, negative errno on failure.
5901 int sata_scr_read(struct ata_link *link, int reg, u32 *val)
5903 struct ata_port *ap = link->ap;
5905 if (sata_scr_valid(link))
5906 return ap->ops->scr_read(ap, reg, val);
5911 * sata_scr_write - write SCR register of the specified port
5912 * @link: ATA link to write SCR for
5913 * @reg: SCR to write
5914 * @val: value to write
5916 * Write @val to SCR register @reg of @link. This function is
5917 * guaranteed to succeed if the cable type of the port is SATA
5918 * and the port implements ->scr_read.
5924 * 0 on success, negative errno on failure.
5926 int sata_scr_write(struct ata_link *link, int reg, u32 val)
5928 struct ata_port *ap = link->ap;
5930 if (sata_scr_valid(link))
5931 return ap->ops->scr_write(ap, reg, val);
5936 * sata_scr_write_flush - write SCR register of the specified port and flush
5937 * @link: ATA link to write SCR for
5938 * @reg: SCR to write
5939 * @val: value to write
5941 * This function is identical to sata_scr_write() except that this
5942 * function performs flush after writing to the register.
5948 * 0 on success, negative errno on failure.
5950 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
5952 struct ata_port *ap = link->ap;
5955 if (sata_scr_valid(link)) {
5956 rc = ap->ops->scr_write(ap, reg, val);
5958 rc = ap->ops->scr_read(ap, reg, &val);
5965 * ata_link_online - test whether the given link is online
5966 * @link: ATA link to test
5968 * Test whether @link is online. Note that this function returns
5969 * 0 if online status of @link cannot be obtained, so
5970 * ata_link_online(link) != !ata_link_offline(link).
5976 * 1 if the port online status is available and online.
5978 int ata_link_online(struct ata_link *link)
5982 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
5983 (sstatus & 0xf) == 0x3)
5989 * ata_link_offline - test whether the given link is offline
5990 * @link: ATA link to test
5992 * Test whether @link is offline. Note that this function
5993 * returns 0 if offline status of @link cannot be obtained, so
5994 * ata_link_online(link) != !ata_link_offline(link).
6000 * 1 if the port offline status is available and offline.
6002 int ata_link_offline(struct ata_link *link)
6006 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6007 (sstatus & 0xf) != 0x3)
6012 int ata_flush_cache(struct ata_device *dev)
6014 unsigned int err_mask;
6017 if (!ata_try_flush_cache(dev))
6020 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
6021 cmd = ATA_CMD_FLUSH_EXT;
6023 cmd = ATA_CMD_FLUSH;
6025 /* This is wrong. On a failed flush we get back the LBA of the lost
6026 sector and we should (assuming it wasn't aborted as unknown) issue
6027 a further flush command to continue the writeback until it
6029 err_mask = ata_do_simple_cmd(dev, cmd);
6031 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
6039 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
6040 unsigned int action, unsigned int ehi_flags,
6043 unsigned long flags;
6046 for (i = 0; i < host->n_ports; i++) {
6047 struct ata_port *ap = host->ports[i];
6048 struct ata_link *link;
6050 /* Previous resume operation might still be in
6051 * progress. Wait for PM_PENDING to clear.
6053 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
6054 ata_port_wait_eh(ap);
6055 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6058 /* request PM ops to EH */
6059 spin_lock_irqsave(ap->lock, flags);
6064 ap->pm_result = &rc;
6067 ap->pflags |= ATA_PFLAG_PM_PENDING;
6068 __ata_port_for_each_link(link, ap) {
6069 link->eh_info.action |= action;
6070 link->eh_info.flags |= ehi_flags;
6073 ata_port_schedule_eh(ap);
6075 spin_unlock_irqrestore(ap->lock, flags);
6077 /* wait and check result */
6079 ata_port_wait_eh(ap);
6080 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6090 * ata_host_suspend - suspend host
6091 * @host: host to suspend
6094 * Suspend @host. Actual operation is performed by EH. This
6095 * function requests EH to perform PM operations and waits for EH
6099 * Kernel thread context (may sleep).
6102 * 0 on success, -errno on failure.
6104 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
6108 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
6110 host->dev->power.power_state = mesg;
6115 * ata_host_resume - resume host
6116 * @host: host to resume
6118 * Resume @host. Actual operation is performed by EH. This
6119 * function requests EH to perform PM operations and returns.
6120 * Note that all resume operations are performed parallely.
6123 * Kernel thread context (may sleep).
6125 void ata_host_resume(struct ata_host *host)
6127 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
6128 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
6129 host->dev->power.power_state = PMSG_ON;
6134 * ata_port_start - Set port up for dma.
6135 * @ap: Port to initialize
6137 * Called just after data structures for each port are
6138 * initialized. Allocates space for PRD table.
6140 * May be used as the port_start() entry in ata_port_operations.
6143 * Inherited from caller.
6145 int ata_port_start(struct ata_port *ap)
6147 struct device *dev = ap->dev;
6150 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
6155 rc = ata_pad_alloc(ap, dev);
6159 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
6160 (unsigned long long)ap->prd_dma);
6165 * ata_dev_init - Initialize an ata_device structure
6166 * @dev: Device structure to initialize
6168 * Initialize @dev in preparation for probing.
6171 * Inherited from caller.
6173 void ata_dev_init(struct ata_device *dev)
6175 struct ata_link *link = dev->link;
6176 struct ata_port *ap = link->ap;
6177 unsigned long flags;
6179 /* SATA spd limit is bound to the first device */
6180 link->sata_spd_limit = link->hw_sata_spd_limit;
6183 /* High bits of dev->flags are used to record warm plug
6184 * requests which occur asynchronously. Synchronize using
6187 spin_lock_irqsave(ap->lock, flags);
6188 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6190 spin_unlock_irqrestore(ap->lock, flags);
6192 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6193 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6194 dev->pio_mask = UINT_MAX;
6195 dev->mwdma_mask = UINT_MAX;
6196 dev->udma_mask = UINT_MAX;
6200 * ata_link_init - Initialize an ata_link structure
6201 * @ap: ATA port link is attached to
6202 * @link: Link structure to initialize
6203 * @pmp: Port multiplier port number
6208 * Kernel thread context (may sleep)
6210 static void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
6214 /* clear everything except for devices */
6215 memset(link, 0, offsetof(struct ata_link, device[0]));
6219 link->active_tag = ATA_TAG_POISON;
6220 link->hw_sata_spd_limit = UINT_MAX;
6222 /* can't use iterator, ap isn't initialized yet */
6223 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6224 struct ata_device *dev = &link->device[i];
6227 dev->devno = dev - link->device;
6233 * sata_link_init_spd - Initialize link->sata_spd_limit
6234 * @link: Link to configure sata_spd_limit for
6236 * Initialize @link->[hw_]sata_spd_limit to the currently
6240 * Kernel thread context (may sleep).
6243 * 0 on success, -errno on failure.
6245 static int sata_link_init_spd(struct ata_link *link)
6250 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
6254 spd = (scontrol >> 4) & 0xf;
6256 link->hw_sata_spd_limit &= (1 << spd) - 1;
6258 link->sata_spd_limit = link->hw_sata_spd_limit;
6264 * ata_port_alloc - allocate and initialize basic ATA port resources
6265 * @host: ATA host this allocated port belongs to
6267 * Allocate and initialize basic ATA port resources.
6270 * Allocate ATA port on success, NULL on failure.
6273 * Inherited from calling layer (may sleep).
6275 struct ata_port *ata_port_alloc(struct ata_host *host)
6277 struct ata_port *ap;
6281 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6285 ap->pflags |= ATA_PFLAG_INITIALIZING;
6286 ap->lock = &host->lock;
6287 ap->flags = ATA_FLAG_DISABLED;
6289 ap->ctl = ATA_DEVCTL_OBS;
6291 ap->dev = host->dev;
6292 ap->last_ctl = 0xFF;
6294 #if defined(ATA_VERBOSE_DEBUG)
6295 /* turn on all debugging levels */
6296 ap->msg_enable = 0x00FF;
6297 #elif defined(ATA_DEBUG)
6298 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6300 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6303 INIT_DELAYED_WORK(&ap->port_task, NULL);
6304 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6305 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6306 INIT_LIST_HEAD(&ap->eh_done_q);
6307 init_waitqueue_head(&ap->eh_wait_q);
6308 init_timer_deferrable(&ap->fastdrain_timer);
6309 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6310 ap->fastdrain_timer.data = (unsigned long)ap;
6312 ap->cbl = ATA_CBL_NONE;
6314 ata_link_init(ap, &ap->link, 0);
6317 ap->stats.unhandled_irq = 1;
6318 ap->stats.idle_irq = 1;
6323 static void ata_host_release(struct device *gendev, void *res)
6325 struct ata_host *host = dev_get_drvdata(gendev);
6328 for (i = 0; i < host->n_ports; i++) {
6329 struct ata_port *ap = host->ports[i];
6334 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop)
6335 ap->ops->port_stop(ap);
6338 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop)
6339 host->ops->host_stop(host);
6341 for (i = 0; i < host->n_ports; i++) {
6342 struct ata_port *ap = host->ports[i];
6348 scsi_host_put(ap->scsi_host);
6351 host->ports[i] = NULL;
6354 dev_set_drvdata(gendev, NULL);
6358 * ata_host_alloc - allocate and init basic ATA host resources
6359 * @dev: generic device this host is associated with
6360 * @max_ports: maximum number of ATA ports associated with this host
6362 * Allocate and initialize basic ATA host resources. LLD calls
6363 * this function to allocate a host, initializes it fully and
6364 * attaches it using ata_host_register().
6366 * @max_ports ports are allocated and host->n_ports is
6367 * initialized to @max_ports. The caller is allowed to decrease
6368 * host->n_ports before calling ata_host_register(). The unused
6369 * ports will be automatically freed on registration.
6372 * Allocate ATA host on success, NULL on failure.
6375 * Inherited from calling layer (may sleep).
6377 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6379 struct ata_host *host;
6385 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6388 /* alloc a container for our list of ATA ports (buses) */
6389 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6390 /* alloc a container for our list of ATA ports (buses) */
6391 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6395 devres_add(dev, host);
6396 dev_set_drvdata(dev, host);
6398 spin_lock_init(&host->lock);
6400 host->n_ports = max_ports;
6402 /* allocate ports bound to this host */
6403 for (i = 0; i < max_ports; i++) {
6404 struct ata_port *ap;
6406 ap = ata_port_alloc(host);
6411 host->ports[i] = ap;
6414 devres_remove_group(dev, NULL);
6418 devres_release_group(dev, NULL);
6423 * ata_host_alloc_pinfo - alloc host and init with port_info array
6424 * @dev: generic device this host is associated with
6425 * @ppi: array of ATA port_info to initialize host with
6426 * @n_ports: number of ATA ports attached to this host
6428 * Allocate ATA host and initialize with info from @ppi. If NULL
6429 * terminated, @ppi may contain fewer entries than @n_ports. The
6430 * last entry will be used for the remaining ports.
6433 * Allocate ATA host on success, NULL on failure.
6436 * Inherited from calling layer (may sleep).
6438 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6439 const struct ata_port_info * const * ppi,
6442 const struct ata_port_info *pi;
6443 struct ata_host *host;
6446 host = ata_host_alloc(dev, n_ports);
6450 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6451 struct ata_port *ap = host->ports[i];
6456 ap->pio_mask = pi->pio_mask;
6457 ap->mwdma_mask = pi->mwdma_mask;
6458 ap->udma_mask = pi->udma_mask;
6459 ap->flags |= pi->flags;
6460 ap->link.flags |= pi->link_flags;
6461 ap->ops = pi->port_ops;
6463 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6464 host->ops = pi->port_ops;
6465 if (!host->private_data && pi->private_data)
6466 host->private_data = pi->private_data;
6473 * ata_host_start - start and freeze ports of an ATA host
6474 * @host: ATA host to start ports for
6476 * Start and then freeze ports of @host. Started status is
6477 * recorded in host->flags, so this function can be called
6478 * multiple times. Ports are guaranteed to get started only
6479 * once. If host->ops isn't initialized yet, its set to the
6480 * first non-dummy port ops.
6483 * Inherited from calling layer (may sleep).
6486 * 0 if all ports are started successfully, -errno otherwise.
6488 int ata_host_start(struct ata_host *host)
6492 if (host->flags & ATA_HOST_STARTED)
6495 for (i = 0; i < host->n_ports; i++) {
6496 struct ata_port *ap = host->ports[i];
6498 if (!host->ops && !ata_port_is_dummy(ap))
6499 host->ops = ap->ops;
6501 if (ap->ops->port_start) {
6502 rc = ap->ops->port_start(ap);
6504 ata_port_printk(ap, KERN_ERR, "failed to "
6505 "start port (errno=%d)\n", rc);
6510 ata_eh_freeze_port(ap);
6513 host->flags |= ATA_HOST_STARTED;
6518 struct ata_port *ap = host->ports[i];
6520 if (ap->ops->port_stop)
6521 ap->ops->port_stop(ap);
6527 * ata_sas_host_init - Initialize a host struct
6528 * @host: host to initialize
6529 * @dev: device host is attached to
6530 * @flags: host flags
6534 * PCI/etc. bus probe sem.
6537 /* KILLME - the only user left is ipr */
6538 void ata_host_init(struct ata_host *host, struct device *dev,
6539 unsigned long flags, const struct ata_port_operations *ops)
6541 spin_lock_init(&host->lock);
6543 host->flags = flags;
6548 * ata_host_register - register initialized ATA host
6549 * @host: ATA host to register
6550 * @sht: template for SCSI host
6552 * Register initialized ATA host. @host is allocated using
6553 * ata_host_alloc() and fully initialized by LLD. This function
6554 * starts ports, registers @host with ATA and SCSI layers and
6555 * probe registered devices.
6558 * Inherited from calling layer (may sleep).
6561 * 0 on success, -errno otherwise.
6563 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6567 /* host must have been started */
6568 if (!(host->flags & ATA_HOST_STARTED)) {
6569 dev_printk(KERN_ERR, host->dev,
6570 "BUG: trying to register unstarted host\n");
6575 /* Blow away unused ports. This happens when LLD can't
6576 * determine the exact number of ports to allocate at
6579 for (i = host->n_ports; host->ports[i]; i++)
6580 kfree(host->ports[i]);
6582 /* give ports names and add SCSI hosts */
6583 for (i = 0; i < host->n_ports; i++)
6584 host->ports[i]->print_id = ata_print_id++;
6586 rc = ata_scsi_add_hosts(host, sht);
6590 /* associate with ACPI nodes */
6591 ata_acpi_associate(host);
6593 /* set cable, sata_spd_limit and report */
6594 for (i = 0; i < host->n_ports; i++) {
6595 struct ata_port *ap = host->ports[i];
6596 unsigned long xfer_mask;
6598 /* set SATA cable type if still unset */
6599 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6600 ap->cbl = ATA_CBL_SATA;
6602 /* init sata_spd_limit to the current value */
6603 sata_link_init_spd(&ap->link);
6605 /* print per-port info to dmesg */
6606 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6609 if (!ata_port_is_dummy(ap))
6610 ata_port_printk(ap, KERN_INFO,
6611 "%cATA max %s %s\n",
6612 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6613 ata_mode_string(xfer_mask),
6614 ap->link.eh_info.desc);
6616 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
6619 /* perform each probe synchronously */
6620 DPRINTK("probe begin\n");
6621 for (i = 0; i < host->n_ports; i++) {
6622 struct ata_port *ap = host->ports[i];
6626 if (ap->ops->error_handler) {
6627 struct ata_eh_info *ehi = &ap->link.eh_info;
6628 unsigned long flags;
6632 /* kick EH for boot probing */
6633 spin_lock_irqsave(ap->lock, flags);
6636 (1 << ata_link_max_devices(&ap->link)) - 1;
6637 ehi->action |= ATA_EH_SOFTRESET;
6638 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
6640 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
6641 ap->pflags |= ATA_PFLAG_LOADING;
6642 ata_port_schedule_eh(ap);
6644 spin_unlock_irqrestore(ap->lock, flags);
6646 /* wait for EH to finish */
6647 ata_port_wait_eh(ap);
6649 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6650 rc = ata_bus_probe(ap);
6651 DPRINTK("ata%u: bus probe end\n", ap->print_id);
6654 /* FIXME: do something useful here?
6655 * Current libata behavior will
6656 * tear down everything when
6657 * the module is removed
6658 * or the h/w is unplugged.
6664 /* probes are done, now scan each port's disk(s) */
6665 DPRINTK("host probe begin\n");
6666 for (i = 0; i < host->n_ports; i++) {
6667 struct ata_port *ap = host->ports[i];
6669 ata_scsi_scan_host(ap, 1);
6676 * ata_host_activate - start host, request IRQ and register it
6677 * @host: target ATA host
6678 * @irq: IRQ to request
6679 * @irq_handler: irq_handler used when requesting IRQ
6680 * @irq_flags: irq_flags used when requesting IRQ
6681 * @sht: scsi_host_template to use when registering the host
6683 * After allocating an ATA host and initializing it, most libata
6684 * LLDs perform three steps to activate the host - start host,
6685 * request IRQ and register it. This helper takes necessasry
6686 * arguments and performs the three steps in one go.
6689 * Inherited from calling layer (may sleep).
6692 * 0 on success, -errno otherwise.
6694 int ata_host_activate(struct ata_host *host, int irq,
6695 irq_handler_t irq_handler, unsigned long irq_flags,
6696 struct scsi_host_template *sht)
6700 rc = ata_host_start(host);
6704 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6705 dev_driver_string(host->dev), host);
6709 for (i = 0; i < host->n_ports; i++)
6710 ata_port_desc(host->ports[i], "irq %d", irq);
6712 rc = ata_host_register(host, sht);
6713 /* if failed, just free the IRQ and leave ports alone */
6715 devm_free_irq(host->dev, irq, host);
6721 * ata_port_detach - Detach ATA port in prepration of device removal
6722 * @ap: ATA port to be detached
6724 * Detach all ATA devices and the associated SCSI devices of @ap;
6725 * then, remove the associated SCSI host. @ap is guaranteed to
6726 * be quiescent on return from this function.
6729 * Kernel thread context (may sleep).
6731 void ata_port_detach(struct ata_port *ap)
6733 unsigned long flags;
6734 struct ata_link *link;
6735 struct ata_device *dev;
6737 if (!ap->ops->error_handler)
6740 /* tell EH we're leaving & flush EH */
6741 spin_lock_irqsave(ap->lock, flags);
6742 ap->pflags |= ATA_PFLAG_UNLOADING;
6743 spin_unlock_irqrestore(ap->lock, flags);
6745 ata_port_wait_eh(ap);
6747 /* EH is now guaranteed to see UNLOADING, so no new device
6748 * will be attached. Disable all existing devices.
6750 spin_lock_irqsave(ap->lock, flags);
6752 ata_port_for_each_link(link, ap) {
6753 ata_link_for_each_dev(dev, link)
6754 ata_dev_disable(dev);
6757 spin_unlock_irqrestore(ap->lock, flags);
6759 /* Final freeze & EH. All in-flight commands are aborted. EH
6760 * will be skipped and retrials will be terminated with bad
6763 spin_lock_irqsave(ap->lock, flags);
6764 ata_port_freeze(ap); /* won't be thawed */
6765 spin_unlock_irqrestore(ap->lock, flags);
6767 ata_port_wait_eh(ap);
6768 cancel_rearming_delayed_work(&ap->hotplug_task);
6771 /* remove the associated SCSI host */
6772 scsi_remove_host(ap->scsi_host);
6776 * ata_host_detach - Detach all ports of an ATA host
6777 * @host: Host to detach
6779 * Detach all ports of @host.
6782 * Kernel thread context (may sleep).
6784 void ata_host_detach(struct ata_host *host)
6788 for (i = 0; i < host->n_ports; i++)
6789 ata_port_detach(host->ports[i]);
6793 * ata_std_ports - initialize ioaddr with standard port offsets.
6794 * @ioaddr: IO address structure to be initialized
6796 * Utility function which initializes data_addr, error_addr,
6797 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6798 * device_addr, status_addr, and command_addr to standard offsets
6799 * relative to cmd_addr.
6801 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6804 void ata_std_ports(struct ata_ioports *ioaddr)
6806 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6807 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6808 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6809 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6810 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6811 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6812 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6813 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6814 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6815 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6822 * ata_pci_remove_one - PCI layer callback for device removal
6823 * @pdev: PCI device that was removed
6825 * PCI layer indicates to libata via this hook that hot-unplug or
6826 * module unload event has occurred. Detach all ports. Resource
6827 * release is handled via devres.
6830 * Inherited from PCI layer (may sleep).
6832 void ata_pci_remove_one(struct pci_dev *pdev)
6834 struct device *dev = pci_dev_to_dev(pdev);
6835 struct ata_host *host = dev_get_drvdata(dev);
6837 ata_host_detach(host);
6840 /* move to PCI subsystem */
6841 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6843 unsigned long tmp = 0;
6845 switch (bits->width) {
6848 pci_read_config_byte(pdev, bits->reg, &tmp8);
6854 pci_read_config_word(pdev, bits->reg, &tmp16);
6860 pci_read_config_dword(pdev, bits->reg, &tmp32);
6871 return (tmp == bits->val) ? 1 : 0;
6875 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6877 pci_save_state(pdev);
6878 pci_disable_device(pdev);
6880 if (mesg.event == PM_EVENT_SUSPEND)
6881 pci_set_power_state(pdev, PCI_D3hot);
6884 int ata_pci_device_do_resume(struct pci_dev *pdev)
6888 pci_set_power_state(pdev, PCI_D0);
6889 pci_restore_state(pdev);
6891 rc = pcim_enable_device(pdev);
6893 dev_printk(KERN_ERR, &pdev->dev,
6894 "failed to enable device after resume (%d)\n", rc);
6898 pci_set_master(pdev);
6902 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6904 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6907 rc = ata_host_suspend(host, mesg);
6911 ata_pci_device_do_suspend(pdev, mesg);
6916 int ata_pci_device_resume(struct pci_dev *pdev)
6918 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6921 rc = ata_pci_device_do_resume(pdev);
6923 ata_host_resume(host);
6926 #endif /* CONFIG_PM */
6928 #endif /* CONFIG_PCI */
6931 static int __init ata_init(void)
6933 ata_probe_timeout *= HZ;
6934 ata_wq = create_workqueue("ata");
6938 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6940 destroy_workqueue(ata_wq);
6944 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6948 static void __exit ata_exit(void)
6950 destroy_workqueue(ata_wq);
6951 destroy_workqueue(ata_aux_wq);
6954 subsys_initcall(ata_init);
6955 module_exit(ata_exit);
6957 static unsigned long ratelimit_time;
6958 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6960 int ata_ratelimit(void)
6963 unsigned long flags;
6965 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6967 if (time_after(jiffies, ratelimit_time)) {
6969 ratelimit_time = jiffies + (HZ/5);
6973 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6979 * ata_wait_register - wait until register value changes
6980 * @reg: IO-mapped register
6981 * @mask: Mask to apply to read register value
6982 * @val: Wait condition
6983 * @interval_msec: polling interval in milliseconds
6984 * @timeout_msec: timeout in milliseconds
6986 * Waiting for some bits of register to change is a common
6987 * operation for ATA controllers. This function reads 32bit LE
6988 * IO-mapped register @reg and tests for the following condition.
6990 * (*@reg & mask) != val
6992 * If the condition is met, it returns; otherwise, the process is
6993 * repeated after @interval_msec until timeout.
6996 * Kernel thread context (may sleep)
6999 * The final register value.
7001 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
7002 unsigned long interval_msec,
7003 unsigned long timeout_msec)
7005 unsigned long timeout;
7008 tmp = ioread32(reg);
7010 /* Calculate timeout _after_ the first read to make sure
7011 * preceding writes reach the controller before starting to
7012 * eat away the timeout.
7014 timeout = jiffies + (timeout_msec * HZ) / 1000;
7016 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
7017 msleep(interval_msec);
7018 tmp = ioread32(reg);
7027 static void ata_dummy_noret(struct ata_port *ap) { }
7028 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
7029 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
7031 static u8 ata_dummy_check_status(struct ata_port *ap)
7036 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
7038 return AC_ERR_SYSTEM;
7041 const struct ata_port_operations ata_dummy_port_ops = {
7042 .check_status = ata_dummy_check_status,
7043 .check_altstatus = ata_dummy_check_status,
7044 .dev_select = ata_noop_dev_select,
7045 .qc_prep = ata_noop_qc_prep,
7046 .qc_issue = ata_dummy_qc_issue,
7047 .freeze = ata_dummy_noret,
7048 .thaw = ata_dummy_noret,
7049 .error_handler = ata_dummy_noret,
7050 .post_internal_cmd = ata_dummy_qc_noret,
7051 .irq_clear = ata_dummy_noret,
7052 .port_start = ata_dummy_ret0,
7053 .port_stop = ata_dummy_noret,
7056 const struct ata_port_info ata_dummy_port_info = {
7057 .port_ops = &ata_dummy_port_ops,
7061 * libata is essentially a library of internal helper functions for
7062 * low-level ATA host controller drivers. As such, the API/ABI is
7063 * likely to change as new drivers are added and updated.
7064 * Do not depend on ABI/API stability.
7067 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7068 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7069 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
7070 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
7071 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
7072 EXPORT_SYMBOL_GPL(ata_std_bios_param);
7073 EXPORT_SYMBOL_GPL(ata_std_ports);
7074 EXPORT_SYMBOL_GPL(ata_host_init);
7075 EXPORT_SYMBOL_GPL(ata_host_alloc);
7076 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
7077 EXPORT_SYMBOL_GPL(ata_host_start);
7078 EXPORT_SYMBOL_GPL(ata_host_register);
7079 EXPORT_SYMBOL_GPL(ata_host_activate);
7080 EXPORT_SYMBOL_GPL(ata_host_detach);
7081 EXPORT_SYMBOL_GPL(ata_sg_init);
7082 EXPORT_SYMBOL_GPL(ata_sg_init_one);
7083 EXPORT_SYMBOL_GPL(ata_hsm_move);
7084 EXPORT_SYMBOL_GPL(ata_qc_complete);
7085 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
7086 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
7087 EXPORT_SYMBOL_GPL(ata_tf_load);
7088 EXPORT_SYMBOL_GPL(ata_tf_read);
7089 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
7090 EXPORT_SYMBOL_GPL(ata_std_dev_select);
7091 EXPORT_SYMBOL_GPL(sata_print_link_status);
7092 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7093 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
7094 EXPORT_SYMBOL_GPL(ata_check_status);
7095 EXPORT_SYMBOL_GPL(ata_altstatus);
7096 EXPORT_SYMBOL_GPL(ata_exec_command);
7097 EXPORT_SYMBOL_GPL(ata_port_start);
7098 EXPORT_SYMBOL_GPL(ata_sff_port_start);
7099 EXPORT_SYMBOL_GPL(ata_interrupt);
7100 EXPORT_SYMBOL_GPL(ata_do_set_mode);
7101 EXPORT_SYMBOL_GPL(ata_data_xfer);
7102 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
7103 EXPORT_SYMBOL_GPL(ata_qc_prep);
7104 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
7105 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
7106 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
7107 EXPORT_SYMBOL_GPL(ata_bmdma_start);
7108 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
7109 EXPORT_SYMBOL_GPL(ata_bmdma_status);
7110 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
7111 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
7112 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
7113 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
7114 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
7115 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
7116 EXPORT_SYMBOL_GPL(ata_port_probe);
7117 EXPORT_SYMBOL_GPL(ata_dev_disable);
7118 EXPORT_SYMBOL_GPL(sata_set_spd);
7119 EXPORT_SYMBOL_GPL(sata_link_debounce);
7120 EXPORT_SYMBOL_GPL(sata_link_resume);
7121 EXPORT_SYMBOL_GPL(sata_phy_reset);
7122 EXPORT_SYMBOL_GPL(__sata_phy_reset);
7123 EXPORT_SYMBOL_GPL(ata_bus_reset);
7124 EXPORT_SYMBOL_GPL(ata_std_prereset);
7125 EXPORT_SYMBOL_GPL(ata_std_softreset);
7126 EXPORT_SYMBOL_GPL(sata_link_hardreset);
7127 EXPORT_SYMBOL_GPL(sata_std_hardreset);
7128 EXPORT_SYMBOL_GPL(ata_std_postreset);
7129 EXPORT_SYMBOL_GPL(ata_dev_classify);
7130 EXPORT_SYMBOL_GPL(ata_dev_pair);
7131 EXPORT_SYMBOL_GPL(ata_port_disable);
7132 EXPORT_SYMBOL_GPL(ata_ratelimit);
7133 EXPORT_SYMBOL_GPL(ata_wait_register);
7134 EXPORT_SYMBOL_GPL(ata_busy_sleep);
7135 EXPORT_SYMBOL_GPL(ata_wait_ready);
7136 EXPORT_SYMBOL_GPL(ata_port_queue_task);
7137 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
7138 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
7139 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
7140 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
7141 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
7142 EXPORT_SYMBOL_GPL(ata_host_intr);
7143 EXPORT_SYMBOL_GPL(sata_scr_valid);
7144 EXPORT_SYMBOL_GPL(sata_scr_read);
7145 EXPORT_SYMBOL_GPL(sata_scr_write);
7146 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
7147 EXPORT_SYMBOL_GPL(ata_link_online);
7148 EXPORT_SYMBOL_GPL(ata_link_offline);
7150 EXPORT_SYMBOL_GPL(ata_host_suspend);
7151 EXPORT_SYMBOL_GPL(ata_host_resume);
7152 #endif /* CONFIG_PM */
7153 EXPORT_SYMBOL_GPL(ata_id_string);
7154 EXPORT_SYMBOL_GPL(ata_id_c_string);
7155 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
7156 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7158 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
7159 EXPORT_SYMBOL_GPL(ata_timing_compute);
7160 EXPORT_SYMBOL_GPL(ata_timing_merge);
7163 EXPORT_SYMBOL_GPL(pci_test_config_bits);
7164 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
7165 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
7166 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
7167 EXPORT_SYMBOL_GPL(ata_pci_init_one);
7168 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
7170 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
7171 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
7172 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
7173 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
7174 #endif /* CONFIG_PM */
7175 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
7176 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
7177 #endif /* CONFIG_PCI */
7179 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
7180 EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
7181 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
7182 EXPORT_SYMBOL_GPL(ata_port_desc);
7184 EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
7185 #endif /* CONFIG_PCI */
7186 EXPORT_SYMBOL_GPL(ata_eng_timeout);
7187 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
7188 EXPORT_SYMBOL_GPL(ata_link_abort);
7189 EXPORT_SYMBOL_GPL(ata_port_abort);
7190 EXPORT_SYMBOL_GPL(ata_port_freeze);
7191 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
7192 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
7193 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
7194 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
7195 EXPORT_SYMBOL_GPL(ata_do_eh);
7196 EXPORT_SYMBOL_GPL(ata_irq_on);
7197 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
7199 EXPORT_SYMBOL_GPL(ata_cable_40wire);
7200 EXPORT_SYMBOL_GPL(ata_cable_80wire);
7201 EXPORT_SYMBOL_GPL(ata_cable_unknown);
7202 EXPORT_SYMBOL_GPL(ata_cable_sata);