2 * mmconfig-shared.c - Low-level direct PCI config space access via
3 * MMCONFIG - common code between i386 and x86-64.
6 * - known chipset handling
7 * - ACPI decoding and validation
9 * Per-architecture code takes care of the mappings and accesses
13 #include <linux/pci.h>
14 #include <linux/init.h>
15 #include <linux/acpi.h>
16 #include <linux/sfi_acpi.h>
17 #include <linux/bitmap.h>
18 #include <linux/dmi.h>
20 #include <asm/pci_x86.h>
23 #define PREFIX "PCI: "
25 /* Indicate if the mmcfg resources have been placed into the resource table. */
26 static int __initdata pci_mmcfg_resources_inserted;
28 LIST_HEAD(pci_mmcfg_list);
30 static __init void free_all_mmcfg(void)
32 struct pci_mmcfg_region *cfg, *tmp;
34 pci_mmcfg_arch_free();
35 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list) {
37 release_resource(&cfg->res);
43 static __init void list_add_sorted(struct pci_mmcfg_region *new)
45 struct pci_mmcfg_region *cfg;
47 /* keep list sorted by segment and starting bus number */
48 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
49 if (cfg->segment > new->segment ||
50 (cfg->segment == new->segment &&
51 cfg->start_bus >= new->start_bus)) {
52 list_add_tail(&new->list, &cfg->list);
56 list_add_tail(&new->list, &pci_mmcfg_list);
59 static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
62 struct pci_mmcfg_region *new;
69 new = kzalloc(sizeof(*new), GFP_KERNEL);
74 new->segment = segment;
75 new->start_bus = start;
80 num_buses = end - start + 1;
82 res->start = addr + PCI_MMCFG_BUS_OFFSET(start);
83 res->end = addr + PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
84 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
85 snprintf(new->name, PCI_MMCFG_RESOURCE_NAME_LEN,
86 "PCI MMCONFIG %04x [bus %02x-%02x]", segment, start, end);
87 res->name = new->name;
92 static const char __init *pci_mmcfg_e7520(void)
95 raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0xce, 2, &win);
98 if (win == 0x0000 || win == 0xf000)
101 if (pci_mmconfig_add(0, 0, 255, win << 16) == NULL)
104 return "Intel Corporation E7520 Memory Controller Hub";
107 static const char __init *pci_mmcfg_intel_945(void)
109 u32 pciexbar, mask = 0, len = 0;
111 raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0x48, 4, &pciexbar);
118 switch ((pciexbar >> 1) & 3) {
135 /* Errata #2, things break when not aligned on a 256Mb boundary */
136 /* Can only happen in 64M/128M mode */
138 if ((pciexbar & mask) & 0x0fffffffU)
141 /* Don't hit the APIC registers and their friends */
142 if ((pciexbar & mask) >= 0xf0000000U)
145 if (pci_mmconfig_add(0, 0, (len >> 20) - 1, pciexbar & mask) == NULL)
148 return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub";
151 static const char __init *pci_mmcfg_amd_fam10h(void)
153 u32 low, high, address;
156 unsigned segnbits = 0, busnbits, end_bus;
158 if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
161 address = MSR_FAM10H_MMIO_CONF_BASE;
162 if (rdmsr_safe(address, &low, &high))
169 /* mmconfig is not enable */
170 if (!(msr & FAM10H_MMIO_CONF_ENABLE))
173 base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
175 busnbits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
176 FAM10H_MMIO_CONF_BUSRANGE_MASK;
179 * only handle bus 0 ?
186 segnbits = busnbits - 8;
190 end_bus = (1 << busnbits) - 1;
191 for (i = 0; i < (1 << segnbits); i++)
192 if (pci_mmconfig_add(i, 0, end_bus,
193 base + (1<<28) * i) == NULL) {
198 return "AMD Family 10h NB";
201 static bool __initdata mcp55_checked;
202 static const char __init *pci_mmcfg_nvidia_mcp55(void)
205 int mcp55_mmconf_found = 0;
207 static const u32 extcfg_regnum = 0x90;
208 static const u32 extcfg_regsize = 4;
209 static const u32 extcfg_enable_mask = 1<<31;
210 static const u32 extcfg_start_mask = 0xff<<16;
211 static const int extcfg_start_shift = 16;
212 static const u32 extcfg_size_mask = 0x3<<28;
213 static const int extcfg_size_shift = 28;
214 static const int extcfg_sizebus[] = {0x100, 0x80, 0x40, 0x20};
215 static const u32 extcfg_base_mask[] = {0x7ff8, 0x7ffc, 0x7ffe, 0x7fff};
216 static const int extcfg_base_lshift = 25;
219 * do check if amd fam10h already took over
221 if (!acpi_disabled || !list_empty(&pci_mmcfg_list) || mcp55_checked)
224 mcp55_checked = true;
225 for (bus = 0; bus < 256; bus++) {
229 int start, size_index, end;
231 raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), 0, 4, &l);
233 device = (l >> 16) & 0xffff;
235 if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device)
238 raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), extcfg_regnum,
239 extcfg_regsize, &extcfg);
241 if (!(extcfg & extcfg_enable_mask))
244 size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift;
245 base = extcfg & extcfg_base_mask[size_index];
246 /* base could > 4G */
247 base <<= extcfg_base_lshift;
248 start = (extcfg & extcfg_start_mask) >> extcfg_start_shift;
249 end = start + extcfg_sizebus[size_index] - 1;
250 if (pci_mmconfig_add(0, start, end, base) == NULL)
252 mcp55_mmconf_found++;
255 if (!mcp55_mmconf_found)
258 return "nVidia MCP55";
261 struct pci_mmcfg_hostbridge_probe {
266 const char *(*probe)(void);
269 static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
270 { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL,
271 PCI_DEVICE_ID_INTEL_E7520_MCH, pci_mmcfg_e7520 },
272 { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL,
273 PCI_DEVICE_ID_INTEL_82945G_HB, pci_mmcfg_intel_945 },
274 { 0, PCI_DEVFN(0x18, 0), PCI_VENDOR_ID_AMD,
275 0x1200, pci_mmcfg_amd_fam10h },
276 { 0xff, PCI_DEVFN(0, 0), PCI_VENDOR_ID_AMD,
277 0x1200, pci_mmcfg_amd_fam10h },
278 { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_NVIDIA,
279 0x0369, pci_mmcfg_nvidia_mcp55 },
282 static void __init pci_mmcfg_check_end_bus_number(void)
284 struct pci_mmcfg_region *cfg, *cfgx;
287 cfg = list_entry(pci_mmcfg_list.prev, typeof(*cfg), list);
289 if (cfg->end_bus < cfg->start_bus)
292 if (list_is_singular(&pci_mmcfg_list))
295 /* don't overlap please */
296 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
297 if (cfg->end_bus < cfg->start_bus)
300 cfgx = list_entry(cfg->list.next, typeof(*cfg), list);
301 if (cfg != cfgx && cfg->end_bus >= cfgx->start_bus)
302 cfg->end_bus = cfgx->start_bus - 1;
306 static int __init pci_mmcfg_check_hostbridge(void)
319 for (i = 0; i < ARRAY_SIZE(pci_mmcfg_probes); i++) {
320 bus = pci_mmcfg_probes[i].bus;
321 devfn = pci_mmcfg_probes[i].devfn;
322 raw_pci_ops->read(0, bus, devfn, 0, 4, &l);
324 device = (l >> 16) & 0xffff;
327 if (pci_mmcfg_probes[i].vendor == vendor &&
328 pci_mmcfg_probes[i].device == device)
329 name = pci_mmcfg_probes[i].probe();
332 printk(KERN_INFO "PCI: Found %s with MMCONFIG support.\n",
336 /* some end_bus_number is crazy, fix it */
337 pci_mmcfg_check_end_bus_number();
339 return !list_empty(&pci_mmcfg_list);
342 static void __init pci_mmcfg_insert_resources(void)
344 struct pci_mmcfg_region *cfg;
346 list_for_each_entry(cfg, &pci_mmcfg_list, list)
347 insert_resource(&iomem_resource, &cfg->res);
349 /* Mark that the resources have been inserted. */
350 pci_mmcfg_resources_inserted = 1;
353 static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
356 struct resource *mcfg_res = data;
357 struct acpi_resource_address64 address;
360 if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
361 struct acpi_resource_fixed_memory32 *fixmem32 =
362 &res->data.fixed_memory32;
365 if ((mcfg_res->start >= fixmem32->address) &&
366 (mcfg_res->end < (fixmem32->address +
367 fixmem32->address_length))) {
369 return AE_CTRL_TERMINATE;
372 if ((res->type != ACPI_RESOURCE_TYPE_ADDRESS32) &&
373 (res->type != ACPI_RESOURCE_TYPE_ADDRESS64))
376 status = acpi_resource_to_address64(res, &address);
377 if (ACPI_FAILURE(status) ||
378 (address.address_length <= 0) ||
379 (address.resource_type != ACPI_MEMORY_RANGE))
382 if ((mcfg_res->start >= address.minimum) &&
383 (mcfg_res->end < (address.minimum + address.address_length))) {
385 return AE_CTRL_TERMINATE;
390 static acpi_status __init find_mboard_resource(acpi_handle handle, u32 lvl,
391 void *context, void **rv)
393 struct resource *mcfg_res = context;
395 acpi_walk_resources(handle, METHOD_NAME__CRS,
396 check_mcfg_resource, context);
399 return AE_CTRL_TERMINATE;
404 static int __init is_acpi_reserved(u64 start, u64 end, unsigned not_used)
406 struct resource mcfg_res;
408 mcfg_res.start = start;
409 mcfg_res.end = end - 1;
412 acpi_get_devices("PNP0C01", find_mboard_resource, &mcfg_res, NULL);
415 acpi_get_devices("PNP0C02", find_mboard_resource, &mcfg_res,
418 return mcfg_res.flags;
421 typedef int (*check_reserved_t)(u64 start, u64 end, unsigned type);
423 static int __init is_mmconf_reserved(check_reserved_t is_reserved,
424 int i, struct pci_mmcfg_region *cfg, int with_e820)
426 u64 addr = cfg->res.start;
427 u64 size = resource_size(&cfg->res);
429 int valid = 0, num_buses;
431 while (!is_reserved(addr, addr + size, E820_RESERVED)) {
433 if (size < (16UL<<20))
437 if (size >= (16UL<<20) || size == old_size) {
439 "PCI: MCFG area at %Lx reserved in %s\n",
440 addr, with_e820?"E820":"ACPI motherboard resources");
443 if (old_size != size) {
445 cfg->end_bus = cfg->start_bus + ((size>>20) - 1);
446 num_buses = cfg->end_bus - cfg->start_bus + 1;
447 cfg->res.end = cfg->res.start +
448 PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
449 snprintf(cfg->name, PCI_MMCFG_RESOURCE_NAME_LEN,
450 "PCI MMCONFIG %04x [bus %02x-%02x]",
451 cfg->segment, cfg->start_bus, cfg->end_bus);
452 printk(KERN_NOTICE "PCI: updated MCFG configuration %d: base %lx "
453 "segment %hu buses %u - %u\n",
454 i, (unsigned long)cfg->address, cfg->segment,
455 (unsigned int)cfg->start_bus,
456 (unsigned int)cfg->end_bus);
463 static void __init pci_mmcfg_reject_broken(int early)
465 struct pci_mmcfg_region *cfg;
468 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
471 printk(KERN_NOTICE "PCI: MCFG configuration %d: base %lx "
472 "segment %hu buses %u - %u\n",
473 i, (unsigned long)cfg->address, cfg->segment,
474 (unsigned int)cfg->start_bus,
475 (unsigned int)cfg->end_bus);
478 if (!early && !acpi_disabled)
479 valid = is_mmconf_reserved(is_acpi_reserved, i, cfg, 0);
485 printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %Lx is not"
486 " reserved in ACPI motherboard resources\n",
489 /* Don't try to do this check unless configuration
490 type 1 is available. how about type 2 ?*/
492 valid = is_mmconf_reserved(e820_all_mapped, i, cfg, 1);
501 printk(KERN_INFO "PCI: Not using MMCONFIG.\n");
505 static int __initdata known_bridge;
507 static int __init acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg,
508 struct acpi_mcfg_allocation *cfg)
512 if (cfg->address < 0xFFFFFFFF)
515 if (!strcmp(mcfg->header.oem_id, "SGI"))
518 if (mcfg->header.revision >= 1) {
519 if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) &&
524 printk(KERN_ERR PREFIX "MCFG region for %04x:%02x-%02x at %#llx "
525 "is above 4GB, ignored\n", cfg->pci_segment,
526 cfg->start_bus_number, cfg->end_bus_number, cfg->address);
530 static int __init pci_parse_mcfg(struct acpi_table_header *header)
532 struct acpi_table_mcfg *mcfg;
533 struct acpi_mcfg_allocation *cfg_table, *cfg;
540 mcfg = (struct acpi_table_mcfg *)header;
542 /* how many config structures do we have */
545 i = header->length - sizeof(struct acpi_table_mcfg);
546 while (i >= sizeof(struct acpi_mcfg_allocation)) {
548 i -= sizeof(struct acpi_mcfg_allocation);
551 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
555 cfg_table = (struct acpi_mcfg_allocation *) &mcfg[1];
556 for (i = 0; i < entries; i++) {
558 if (acpi_mcfg_check_entry(mcfg, cfg)) {
563 if (pci_mmconfig_add(cfg->pci_segment, cfg->start_bus_number,
564 cfg->end_bus_number, cfg->address) == NULL) {
565 printk(KERN_WARNING PREFIX
566 "no memory for MCFG entries\n");
575 static void __init __pci_mmcfg_init(int early)
577 /* MMCONFIG disabled */
578 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
581 /* MMCONFIG already enabled */
582 if (!early && !(pci_probe & PCI_PROBE_MASK & ~PCI_PROBE_MMCONF))
585 /* for late to exit */
590 if (pci_mmcfg_check_hostbridge())
595 acpi_sfi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
597 pci_mmcfg_reject_broken(early);
599 if (list_empty(&pci_mmcfg_list))
602 if (pci_mmcfg_arch_init())
603 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
606 * Signal not to attempt to insert mmcfg resources because
607 * the architecture mmcfg setup could not initialize.
609 pci_mmcfg_resources_inserted = 1;
613 void __init pci_mmcfg_early_init(void)
618 void __init pci_mmcfg_late_init(void)
623 static int __init pci_mmcfg_late_insert_resources(void)
626 * If resources are already inserted or we are not using MMCONFIG,
627 * don't insert the resources.
629 if ((pci_mmcfg_resources_inserted == 1) ||
630 (pci_probe & PCI_PROBE_MMCONF) == 0 ||
631 list_empty(&pci_mmcfg_list))
635 * Attempt to insert the mmcfg resources but not with the busy flag
636 * marked so it won't cause request errors when __request_region is
639 pci_mmcfg_insert_resources();
645 * Perform MMCONFIG resource insertion after PCI initialization to allow for
646 * misprogrammed MCFG tables that state larger sizes but actually conflict
647 * with other system resources.
649 late_initcall(pci_mmcfg_late_insert_resources);