2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <linux/perf_event.h>
44 #include <trace/events/kvm.h>
46 #define CREATE_TRACE_POINTS
49 #include <asm/debugreg.h>
50 #include <asm/uaccess.h>
56 #define MAX_IO_MSRS 256
57 #define CR0_RESERVED_BITS \
58 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
59 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
60 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
61 #define CR4_RESERVED_BITS \
62 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
63 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
64 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
65 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
67 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
79 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
87 struct kvm_cpuid_entry2 __user *entries);
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
95 #define KVM_NR_SHARED_MSRS 16
97 struct kvm_shared_msrs_global {
99 u32 msrs[KVM_NR_SHARED_MSRS];
102 struct kvm_shared_msrs {
103 struct user_return_notifier urn;
105 struct kvm_shared_msr_values {
108 } values[KVM_NR_SHARED_MSRS];
111 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
112 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
114 struct kvm_stats_debugfs_item debugfs_entries[] = {
115 { "pf_fixed", VCPU_STAT(pf_fixed) },
116 { "pf_guest", VCPU_STAT(pf_guest) },
117 { "tlb_flush", VCPU_STAT(tlb_flush) },
118 { "invlpg", VCPU_STAT(invlpg) },
119 { "exits", VCPU_STAT(exits) },
120 { "io_exits", VCPU_STAT(io_exits) },
121 { "mmio_exits", VCPU_STAT(mmio_exits) },
122 { "signal_exits", VCPU_STAT(signal_exits) },
123 { "irq_window", VCPU_STAT(irq_window_exits) },
124 { "nmi_window", VCPU_STAT(nmi_window_exits) },
125 { "halt_exits", VCPU_STAT(halt_exits) },
126 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
127 { "hypercalls", VCPU_STAT(hypercalls) },
128 { "request_irq", VCPU_STAT(request_irq_exits) },
129 { "irq_exits", VCPU_STAT(irq_exits) },
130 { "host_state_reload", VCPU_STAT(host_state_reload) },
131 { "efer_reload", VCPU_STAT(efer_reload) },
132 { "fpu_reload", VCPU_STAT(fpu_reload) },
133 { "insn_emulation", VCPU_STAT(insn_emulation) },
134 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
135 { "irq_injections", VCPU_STAT(irq_injections) },
136 { "nmi_injections", VCPU_STAT(nmi_injections) },
137 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
138 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
139 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
140 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
141 { "mmu_flooded", VM_STAT(mmu_flooded) },
142 { "mmu_recycled", VM_STAT(mmu_recycled) },
143 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
144 { "mmu_unsync", VM_STAT(mmu_unsync) },
145 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
146 { "largepages", VM_STAT(lpages) },
150 static void kvm_on_user_return(struct user_return_notifier *urn)
153 struct kvm_shared_msrs *locals
154 = container_of(urn, struct kvm_shared_msrs, urn);
155 struct kvm_shared_msr_values *values;
157 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
158 values = &locals->values[slot];
159 if (values->host != values->curr) {
160 wrmsrl(shared_msrs_global.msrs[slot], values->host);
161 values->curr = values->host;
164 locals->registered = false;
165 user_return_notifier_unregister(urn);
168 static void shared_msr_update(unsigned slot, u32 msr)
170 struct kvm_shared_msrs *smsr;
173 smsr = &__get_cpu_var(shared_msrs);
174 /* only read, and nobody should modify it at this time,
175 * so don't need lock */
176 if (slot >= shared_msrs_global.nr) {
177 printk(KERN_ERR "kvm: invalid MSR slot!");
180 rdmsrl_safe(msr, &value);
181 smsr->values[slot].host = value;
182 smsr->values[slot].curr = value;
185 void kvm_define_shared_msr(unsigned slot, u32 msr)
187 if (slot >= shared_msrs_global.nr)
188 shared_msrs_global.nr = slot + 1;
189 shared_msrs_global.msrs[slot] = msr;
190 /* we need ensured the shared_msr_global have been updated */
193 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
195 static void kvm_shared_msr_cpu_online(void)
199 for (i = 0; i < shared_msrs_global.nr; ++i)
200 shared_msr_update(i, shared_msrs_global.msrs[i]);
203 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
205 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
207 if (((value ^ smsr->values[slot].curr) & mask) == 0)
209 smsr->values[slot].curr = value;
210 wrmsrl(shared_msrs_global.msrs[slot], value);
211 if (!smsr->registered) {
212 smsr->urn.on_user_return = kvm_on_user_return;
213 user_return_notifier_register(&smsr->urn);
214 smsr->registered = true;
217 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
219 static void drop_user_return_notifiers(void *ignore)
221 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
223 if (smsr->registered)
224 kvm_on_user_return(&smsr->urn);
227 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
229 if (irqchip_in_kernel(vcpu->kvm))
230 return vcpu->arch.apic_base;
232 return vcpu->arch.apic_base;
234 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
236 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
238 /* TODO: reserve bits check */
239 if (irqchip_in_kernel(vcpu->kvm))
240 kvm_lapic_set_base(vcpu, data);
242 vcpu->arch.apic_base = data;
244 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
246 #define EXCPT_BENIGN 0
247 #define EXCPT_CONTRIBUTORY 1
250 static int exception_class(int vector)
260 return EXCPT_CONTRIBUTORY;
267 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
268 unsigned nr, bool has_error, u32 error_code,
274 if (!vcpu->arch.exception.pending) {
276 vcpu->arch.exception.pending = true;
277 vcpu->arch.exception.has_error_code = has_error;
278 vcpu->arch.exception.nr = nr;
279 vcpu->arch.exception.error_code = error_code;
280 vcpu->arch.exception.reinject = reinject;
284 /* to check exception */
285 prev_nr = vcpu->arch.exception.nr;
286 if (prev_nr == DF_VECTOR) {
287 /* triple fault -> shutdown */
288 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
291 class1 = exception_class(prev_nr);
292 class2 = exception_class(nr);
293 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
294 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
295 /* generate double fault per SDM Table 5-5 */
296 vcpu->arch.exception.pending = true;
297 vcpu->arch.exception.has_error_code = true;
298 vcpu->arch.exception.nr = DF_VECTOR;
299 vcpu->arch.exception.error_code = 0;
301 /* replace previous exception with a new one in a hope
302 that instruction re-execution will regenerate lost
307 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
309 kvm_multiple_exception(vcpu, nr, false, 0, false);
311 EXPORT_SYMBOL_GPL(kvm_queue_exception);
313 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
315 kvm_multiple_exception(vcpu, nr, false, 0, true);
317 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
319 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
322 ++vcpu->stat.pf_guest;
323 vcpu->arch.cr2 = addr;
324 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
327 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
329 vcpu->arch.nmi_pending = 1;
331 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
333 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
335 kvm_multiple_exception(vcpu, nr, true, error_code, false);
337 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
339 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
341 kvm_multiple_exception(vcpu, nr, true, error_code, true);
343 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
346 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
347 * a #GP and return false.
349 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
351 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
353 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
356 EXPORT_SYMBOL_GPL(kvm_require_cpl);
359 * Load the pae pdptrs. Return true is they are all valid.
361 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
363 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
364 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
367 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
369 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
370 offset * sizeof(u64), sizeof(pdpte));
375 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
376 if (is_present_gpte(pdpte[i]) &&
377 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
384 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
385 __set_bit(VCPU_EXREG_PDPTR,
386 (unsigned long *)&vcpu->arch.regs_avail);
387 __set_bit(VCPU_EXREG_PDPTR,
388 (unsigned long *)&vcpu->arch.regs_dirty);
393 EXPORT_SYMBOL_GPL(load_pdptrs);
395 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
397 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
401 if (is_long_mode(vcpu) || !is_pae(vcpu))
404 if (!test_bit(VCPU_EXREG_PDPTR,
405 (unsigned long *)&vcpu->arch.regs_avail))
408 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
411 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
417 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
422 if (cr0 & 0xffffffff00000000UL) {
423 kvm_inject_gp(vcpu, 0);
428 cr0 &= ~CR0_RESERVED_BITS;
430 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
431 kvm_inject_gp(vcpu, 0);
435 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
436 kvm_inject_gp(vcpu, 0);
440 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
442 if ((vcpu->arch.efer & EFER_LME)) {
446 kvm_inject_gp(vcpu, 0);
449 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
451 kvm_inject_gp(vcpu, 0);
457 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
458 kvm_inject_gp(vcpu, 0);
464 kvm_x86_ops->set_cr0(vcpu, cr0);
466 kvm_mmu_reset_context(vcpu);
469 EXPORT_SYMBOL_GPL(kvm_set_cr0);
471 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
473 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
475 EXPORT_SYMBOL_GPL(kvm_lmsw);
477 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
479 unsigned long old_cr4 = kvm_read_cr4(vcpu);
480 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
482 if (cr4 & CR4_RESERVED_BITS) {
483 kvm_inject_gp(vcpu, 0);
487 if (is_long_mode(vcpu)) {
488 if (!(cr4 & X86_CR4_PAE)) {
489 kvm_inject_gp(vcpu, 0);
492 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
493 && ((cr4 ^ old_cr4) & pdptr_bits)
494 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
495 kvm_inject_gp(vcpu, 0);
499 if (cr4 & X86_CR4_VMXE) {
500 kvm_inject_gp(vcpu, 0);
503 kvm_x86_ops->set_cr4(vcpu, cr4);
504 vcpu->arch.cr4 = cr4;
505 kvm_mmu_reset_context(vcpu);
507 EXPORT_SYMBOL_GPL(kvm_set_cr4);
509 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
511 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
512 kvm_mmu_sync_roots(vcpu);
513 kvm_mmu_flush_tlb(vcpu);
517 if (is_long_mode(vcpu)) {
518 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
519 kvm_inject_gp(vcpu, 0);
524 if (cr3 & CR3_PAE_RESERVED_BITS) {
525 kvm_inject_gp(vcpu, 0);
528 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
529 kvm_inject_gp(vcpu, 0);
534 * We don't check reserved bits in nonpae mode, because
535 * this isn't enforced, and VMware depends on this.
540 * Does the new cr3 value map to physical memory? (Note, we
541 * catch an invalid cr3 even in real-mode, because it would
542 * cause trouble later on when we turn on paging anyway.)
544 * A real CPU would silently accept an invalid cr3 and would
545 * attempt to use it - with largely undefined (and often hard
546 * to debug) behavior on the guest side.
548 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
549 kvm_inject_gp(vcpu, 0);
551 vcpu->arch.cr3 = cr3;
552 vcpu->arch.mmu.new_cr3(vcpu);
555 EXPORT_SYMBOL_GPL(kvm_set_cr3);
557 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
559 if (cr8 & CR8_RESERVED_BITS) {
560 kvm_inject_gp(vcpu, 0);
563 if (irqchip_in_kernel(vcpu->kvm))
564 kvm_lapic_set_tpr(vcpu, cr8);
566 vcpu->arch.cr8 = cr8;
568 EXPORT_SYMBOL_GPL(kvm_set_cr8);
570 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
572 if (irqchip_in_kernel(vcpu->kvm))
573 return kvm_lapic_get_cr8(vcpu);
575 return vcpu->arch.cr8;
577 EXPORT_SYMBOL_GPL(kvm_get_cr8);
579 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
583 vcpu->arch.db[dr] = val;
584 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
585 vcpu->arch.eff_db[dr] = val;
588 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
589 kvm_queue_exception(vcpu, UD_VECTOR);
594 if (val & 0xffffffff00000000ULL) {
595 kvm_inject_gp(vcpu, 0);
598 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
601 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
602 kvm_queue_exception(vcpu, UD_VECTOR);
607 if (val & 0xffffffff00000000ULL) {
608 kvm_inject_gp(vcpu, 0);
611 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
612 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
613 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
614 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
621 EXPORT_SYMBOL_GPL(kvm_set_dr);
623 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
627 *val = vcpu->arch.db[dr];
630 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
631 kvm_queue_exception(vcpu, UD_VECTOR);
636 *val = vcpu->arch.dr6;
639 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
640 kvm_queue_exception(vcpu, UD_VECTOR);
645 *val = vcpu->arch.dr7;
651 EXPORT_SYMBOL_GPL(kvm_get_dr);
653 static inline u32 bit(int bitno)
655 return 1 << (bitno & 31);
659 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
660 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
662 * This list is modified at module load time to reflect the
663 * capabilities of the host cpu. This capabilities test skips MSRs that are
664 * kvm-specific. Those are put in the beginning of the list.
667 #define KVM_SAVE_MSRS_BEGIN 7
668 static u32 msrs_to_save[] = {
669 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
670 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
671 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
672 HV_X64_MSR_APIC_ASSIST_PAGE,
673 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
676 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
678 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
681 static unsigned num_msrs_to_save;
683 static u32 emulated_msrs[] = {
684 MSR_IA32_MISC_ENABLE,
687 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
689 if (efer & efer_reserved_bits)
693 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
696 if (efer & EFER_FFXSR) {
697 struct kvm_cpuid_entry2 *feat;
699 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
700 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
704 if (efer & EFER_SVME) {
705 struct kvm_cpuid_entry2 *feat;
707 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
708 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
713 efer |= vcpu->arch.efer & EFER_LMA;
715 kvm_x86_ops->set_efer(vcpu, efer);
717 vcpu->arch.efer = efer;
719 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
720 kvm_mmu_reset_context(vcpu);
725 void kvm_enable_efer_bits(u64 mask)
727 efer_reserved_bits &= ~mask;
729 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
733 * Writes msr value into into the appropriate "register".
734 * Returns 0 on success, non-0 otherwise.
735 * Assumes vcpu_load() was already called.
737 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
739 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
743 * Adapt set_msr() to msr_io()'s calling convention
745 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
747 return kvm_set_msr(vcpu, index, *data);
750 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
754 struct pvclock_wall_clock wc;
755 struct timespec boot;
760 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
765 ++version; /* first time write, random junk */
769 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
772 * The guest calculates current wall clock time by adding
773 * system time (updated by kvm_write_guest_time below) to the
774 * wall clock specified here. guest system time equals host
775 * system time for us, thus we must fill in host boot time here.
779 wc.sec = boot.tv_sec;
780 wc.nsec = boot.tv_nsec;
781 wc.version = version;
783 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
786 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
789 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
791 uint32_t quotient, remainder;
793 /* Don't try to replace with do_div(), this one calculates
794 * "(dividend << 32) / divisor" */
796 : "=a" (quotient), "=d" (remainder)
797 : "0" (0), "1" (dividend), "r" (divisor) );
801 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
803 uint64_t nsecs = 1000000000LL;
808 tps64 = tsc_khz * 1000LL;
809 while (tps64 > nsecs*2) {
814 tps32 = (uint32_t)tps64;
815 while (tps32 <= (uint32_t)nsecs) {
820 hv_clock->tsc_shift = shift;
821 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
823 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
824 __func__, tsc_khz, hv_clock->tsc_shift,
825 hv_clock->tsc_to_system_mul);
828 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
830 static void kvm_write_guest_time(struct kvm_vcpu *v)
834 struct kvm_vcpu_arch *vcpu = &v->arch;
836 unsigned long this_tsc_khz;
838 if ((!vcpu->time_page))
841 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
842 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
843 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
844 vcpu->hv_clock_tsc_khz = this_tsc_khz;
846 put_cpu_var(cpu_tsc_khz);
848 /* Keep irq disabled to prevent changes to the clock */
849 local_irq_save(flags);
850 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
852 monotonic_to_bootbased(&ts);
853 local_irq_restore(flags);
855 /* With all the info we got, fill in the values */
857 vcpu->hv_clock.system_time = ts.tv_nsec +
858 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
860 vcpu->hv_clock.flags = 0;
863 * The interface expects us to write an even number signaling that the
864 * update is finished. Since the guest won't see the intermediate
865 * state, we just increase by 2 at the end.
867 vcpu->hv_clock.version += 2;
869 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
871 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
872 sizeof(vcpu->hv_clock));
874 kunmap_atomic(shared_kaddr, KM_USER0);
876 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
879 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
881 struct kvm_vcpu_arch *vcpu = &v->arch;
883 if (!vcpu->time_page)
885 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
889 static bool msr_mtrr_valid(unsigned msr)
892 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
893 case MSR_MTRRfix64K_00000:
894 case MSR_MTRRfix16K_80000:
895 case MSR_MTRRfix16K_A0000:
896 case MSR_MTRRfix4K_C0000:
897 case MSR_MTRRfix4K_C8000:
898 case MSR_MTRRfix4K_D0000:
899 case MSR_MTRRfix4K_D8000:
900 case MSR_MTRRfix4K_E0000:
901 case MSR_MTRRfix4K_E8000:
902 case MSR_MTRRfix4K_F0000:
903 case MSR_MTRRfix4K_F8000:
904 case MSR_MTRRdefType:
905 case MSR_IA32_CR_PAT:
913 static bool valid_pat_type(unsigned t)
915 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
918 static bool valid_mtrr_type(unsigned t)
920 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
923 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
927 if (!msr_mtrr_valid(msr))
930 if (msr == MSR_IA32_CR_PAT) {
931 for (i = 0; i < 8; i++)
932 if (!valid_pat_type((data >> (i * 8)) & 0xff))
935 } else if (msr == MSR_MTRRdefType) {
938 return valid_mtrr_type(data & 0xff);
939 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
940 for (i = 0; i < 8 ; i++)
941 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
947 return valid_mtrr_type(data & 0xff);
950 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
952 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
954 if (!mtrr_valid(vcpu, msr, data))
957 if (msr == MSR_MTRRdefType) {
958 vcpu->arch.mtrr_state.def_type = data;
959 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
960 } else if (msr == MSR_MTRRfix64K_00000)
962 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
963 p[1 + msr - MSR_MTRRfix16K_80000] = data;
964 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
965 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
966 else if (msr == MSR_IA32_CR_PAT)
967 vcpu->arch.pat = data;
968 else { /* Variable MTRRs */
969 int idx, is_mtrr_mask;
972 idx = (msr - 0x200) / 2;
973 is_mtrr_mask = msr - 0x200 - 2 * idx;
976 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
979 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
983 kvm_mmu_reset_context(vcpu);
987 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
989 u64 mcg_cap = vcpu->arch.mcg_cap;
990 unsigned bank_num = mcg_cap & 0xff;
993 case MSR_IA32_MCG_STATUS:
994 vcpu->arch.mcg_status = data;
996 case MSR_IA32_MCG_CTL:
997 if (!(mcg_cap & MCG_CTL_P))
999 if (data != 0 && data != ~(u64)0)
1001 vcpu->arch.mcg_ctl = data;
1004 if (msr >= MSR_IA32_MC0_CTL &&
1005 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1006 u32 offset = msr - MSR_IA32_MC0_CTL;
1007 /* only 0 or all 1s can be written to IA32_MCi_CTL
1008 * some Linux kernels though clear bit 10 in bank 4 to
1009 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1010 * this to avoid an uncatched #GP in the guest
1012 if ((offset & 0x3) == 0 &&
1013 data != 0 && (data | (1 << 10)) != ~(u64)0)
1015 vcpu->arch.mce_banks[offset] = data;
1023 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1025 struct kvm *kvm = vcpu->kvm;
1026 int lm = is_long_mode(vcpu);
1027 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1028 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1029 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1030 : kvm->arch.xen_hvm_config.blob_size_32;
1031 u32 page_num = data & ~PAGE_MASK;
1032 u64 page_addr = data & PAGE_MASK;
1037 if (page_num >= blob_size)
1040 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1044 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1046 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1055 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1057 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1060 static bool kvm_hv_msr_partition_wide(u32 msr)
1064 case HV_X64_MSR_GUEST_OS_ID:
1065 case HV_X64_MSR_HYPERCALL:
1073 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1075 struct kvm *kvm = vcpu->kvm;
1078 case HV_X64_MSR_GUEST_OS_ID:
1079 kvm->arch.hv_guest_os_id = data;
1080 /* setting guest os id to zero disables hypercall page */
1081 if (!kvm->arch.hv_guest_os_id)
1082 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1084 case HV_X64_MSR_HYPERCALL: {
1089 /* if guest os id is not set hypercall should remain disabled */
1090 if (!kvm->arch.hv_guest_os_id)
1092 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1093 kvm->arch.hv_hypercall = data;
1096 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1097 addr = gfn_to_hva(kvm, gfn);
1098 if (kvm_is_error_hva(addr))
1100 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1101 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1102 if (copy_to_user((void __user *)addr, instructions, 4))
1104 kvm->arch.hv_hypercall = data;
1108 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1109 "data 0x%llx\n", msr, data);
1115 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1118 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1121 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1122 vcpu->arch.hv_vapic = data;
1125 addr = gfn_to_hva(vcpu->kvm, data >>
1126 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1127 if (kvm_is_error_hva(addr))
1129 if (clear_user((void __user *)addr, PAGE_SIZE))
1131 vcpu->arch.hv_vapic = data;
1134 case HV_X64_MSR_EOI:
1135 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1136 case HV_X64_MSR_ICR:
1137 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1138 case HV_X64_MSR_TPR:
1139 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1141 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1142 "data 0x%llx\n", msr, data);
1149 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1153 return set_efer(vcpu, data);
1155 data &= ~(u64)0x40; /* ignore flush filter disable */
1156 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1158 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1163 case MSR_FAM10H_MMIO_CONF_BASE:
1165 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1170 case MSR_AMD64_NB_CFG:
1172 case MSR_IA32_DEBUGCTLMSR:
1174 /* We support the non-activated case already */
1176 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1177 /* Values other than LBR and BTF are vendor-specific,
1178 thus reserved and should throw a #GP */
1181 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1184 case MSR_IA32_UCODE_REV:
1185 case MSR_IA32_UCODE_WRITE:
1186 case MSR_VM_HSAVE_PA:
1187 case MSR_AMD64_PATCH_LOADER:
1189 case 0x200 ... 0x2ff:
1190 return set_msr_mtrr(vcpu, msr, data);
1191 case MSR_IA32_APICBASE:
1192 kvm_set_apic_base(vcpu, data);
1194 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1195 return kvm_x2apic_msr_write(vcpu, msr, data);
1196 case MSR_IA32_MISC_ENABLE:
1197 vcpu->arch.ia32_misc_enable_msr = data;
1199 case MSR_KVM_WALL_CLOCK_NEW:
1200 case MSR_KVM_WALL_CLOCK:
1201 vcpu->kvm->arch.wall_clock = data;
1202 kvm_write_wall_clock(vcpu->kvm, data);
1204 case MSR_KVM_SYSTEM_TIME_NEW:
1205 case MSR_KVM_SYSTEM_TIME: {
1206 if (vcpu->arch.time_page) {
1207 kvm_release_page_dirty(vcpu->arch.time_page);
1208 vcpu->arch.time_page = NULL;
1211 vcpu->arch.time = data;
1213 /* we verify if the enable bit is set... */
1217 /* ...but clean it before doing the actual write */
1218 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1220 vcpu->arch.time_page =
1221 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1223 if (is_error_page(vcpu->arch.time_page)) {
1224 kvm_release_page_clean(vcpu->arch.time_page);
1225 vcpu->arch.time_page = NULL;
1228 kvm_request_guest_time_update(vcpu);
1231 case MSR_IA32_MCG_CTL:
1232 case MSR_IA32_MCG_STATUS:
1233 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1234 return set_msr_mce(vcpu, msr, data);
1236 /* Performance counters are not protected by a CPUID bit,
1237 * so we should check all of them in the generic path for the sake of
1238 * cross vendor migration.
1239 * Writing a zero into the event select MSRs disables them,
1240 * which we perfectly emulate ;-). Any other value should be at least
1241 * reported, some guests depend on them.
1243 case MSR_P6_EVNTSEL0:
1244 case MSR_P6_EVNTSEL1:
1245 case MSR_K7_EVNTSEL0:
1246 case MSR_K7_EVNTSEL1:
1247 case MSR_K7_EVNTSEL2:
1248 case MSR_K7_EVNTSEL3:
1250 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1251 "0x%x data 0x%llx\n", msr, data);
1253 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1254 * so we ignore writes to make it happy.
1256 case MSR_P6_PERFCTR0:
1257 case MSR_P6_PERFCTR1:
1258 case MSR_K7_PERFCTR0:
1259 case MSR_K7_PERFCTR1:
1260 case MSR_K7_PERFCTR2:
1261 case MSR_K7_PERFCTR3:
1262 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1263 "0x%x data 0x%llx\n", msr, data);
1265 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1266 if (kvm_hv_msr_partition_wide(msr)) {
1268 mutex_lock(&vcpu->kvm->lock);
1269 r = set_msr_hyperv_pw(vcpu, msr, data);
1270 mutex_unlock(&vcpu->kvm->lock);
1273 return set_msr_hyperv(vcpu, msr, data);
1276 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1277 return xen_hvm_config(vcpu, data);
1279 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1283 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1290 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1294 * Reads an msr value (of 'msr_index') into 'pdata'.
1295 * Returns 0 on success, non-0 otherwise.
1296 * Assumes vcpu_load() was already called.
1298 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1300 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1303 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1305 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1307 if (!msr_mtrr_valid(msr))
1310 if (msr == MSR_MTRRdefType)
1311 *pdata = vcpu->arch.mtrr_state.def_type +
1312 (vcpu->arch.mtrr_state.enabled << 10);
1313 else if (msr == MSR_MTRRfix64K_00000)
1315 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1316 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1317 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1318 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1319 else if (msr == MSR_IA32_CR_PAT)
1320 *pdata = vcpu->arch.pat;
1321 else { /* Variable MTRRs */
1322 int idx, is_mtrr_mask;
1325 idx = (msr - 0x200) / 2;
1326 is_mtrr_mask = msr - 0x200 - 2 * idx;
1329 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1332 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1339 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1342 u64 mcg_cap = vcpu->arch.mcg_cap;
1343 unsigned bank_num = mcg_cap & 0xff;
1346 case MSR_IA32_P5_MC_ADDR:
1347 case MSR_IA32_P5_MC_TYPE:
1350 case MSR_IA32_MCG_CAP:
1351 data = vcpu->arch.mcg_cap;
1353 case MSR_IA32_MCG_CTL:
1354 if (!(mcg_cap & MCG_CTL_P))
1356 data = vcpu->arch.mcg_ctl;
1358 case MSR_IA32_MCG_STATUS:
1359 data = vcpu->arch.mcg_status;
1362 if (msr >= MSR_IA32_MC0_CTL &&
1363 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1364 u32 offset = msr - MSR_IA32_MC0_CTL;
1365 data = vcpu->arch.mce_banks[offset];
1374 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1377 struct kvm *kvm = vcpu->kvm;
1380 case HV_X64_MSR_GUEST_OS_ID:
1381 data = kvm->arch.hv_guest_os_id;
1383 case HV_X64_MSR_HYPERCALL:
1384 data = kvm->arch.hv_hypercall;
1387 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1395 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1400 case HV_X64_MSR_VP_INDEX: {
1403 kvm_for_each_vcpu(r, v, vcpu->kvm)
1408 case HV_X64_MSR_EOI:
1409 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1410 case HV_X64_MSR_ICR:
1411 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1412 case HV_X64_MSR_TPR:
1413 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1415 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1422 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1427 case MSR_IA32_PLATFORM_ID:
1428 case MSR_IA32_UCODE_REV:
1429 case MSR_IA32_EBL_CR_POWERON:
1430 case MSR_IA32_DEBUGCTLMSR:
1431 case MSR_IA32_LASTBRANCHFROMIP:
1432 case MSR_IA32_LASTBRANCHTOIP:
1433 case MSR_IA32_LASTINTFROMIP:
1434 case MSR_IA32_LASTINTTOIP:
1437 case MSR_VM_HSAVE_PA:
1438 case MSR_P6_PERFCTR0:
1439 case MSR_P6_PERFCTR1:
1440 case MSR_P6_EVNTSEL0:
1441 case MSR_P6_EVNTSEL1:
1442 case MSR_K7_EVNTSEL0:
1443 case MSR_K7_PERFCTR0:
1444 case MSR_K8_INT_PENDING_MSG:
1445 case MSR_AMD64_NB_CFG:
1446 case MSR_FAM10H_MMIO_CONF_BASE:
1450 data = 0x500 | KVM_NR_VAR_MTRR;
1452 case 0x200 ... 0x2ff:
1453 return get_msr_mtrr(vcpu, msr, pdata);
1454 case 0xcd: /* fsb frequency */
1457 case MSR_IA32_APICBASE:
1458 data = kvm_get_apic_base(vcpu);
1460 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1461 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1463 case MSR_IA32_MISC_ENABLE:
1464 data = vcpu->arch.ia32_misc_enable_msr;
1466 case MSR_IA32_PERF_STATUS:
1467 /* TSC increment by tick */
1469 /* CPU multiplier */
1470 data |= (((uint64_t)4ULL) << 40);
1473 data = vcpu->arch.efer;
1475 case MSR_KVM_WALL_CLOCK:
1476 case MSR_KVM_WALL_CLOCK_NEW:
1477 data = vcpu->kvm->arch.wall_clock;
1479 case MSR_KVM_SYSTEM_TIME:
1480 case MSR_KVM_SYSTEM_TIME_NEW:
1481 data = vcpu->arch.time;
1483 case MSR_IA32_P5_MC_ADDR:
1484 case MSR_IA32_P5_MC_TYPE:
1485 case MSR_IA32_MCG_CAP:
1486 case MSR_IA32_MCG_CTL:
1487 case MSR_IA32_MCG_STATUS:
1488 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1489 return get_msr_mce(vcpu, msr, pdata);
1490 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1491 if (kvm_hv_msr_partition_wide(msr)) {
1493 mutex_lock(&vcpu->kvm->lock);
1494 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1495 mutex_unlock(&vcpu->kvm->lock);
1498 return get_msr_hyperv(vcpu, msr, pdata);
1502 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1505 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1513 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1516 * Read or write a bunch of msrs. All parameters are kernel addresses.
1518 * @return number of msrs set successfully.
1520 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1521 struct kvm_msr_entry *entries,
1522 int (*do_msr)(struct kvm_vcpu *vcpu,
1523 unsigned index, u64 *data))
1529 idx = srcu_read_lock(&vcpu->kvm->srcu);
1530 for (i = 0; i < msrs->nmsrs; ++i)
1531 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1533 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1541 * Read or write a bunch of msrs. Parameters are user addresses.
1543 * @return number of msrs set successfully.
1545 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1546 int (*do_msr)(struct kvm_vcpu *vcpu,
1547 unsigned index, u64 *data),
1550 struct kvm_msrs msrs;
1551 struct kvm_msr_entry *entries;
1556 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1560 if (msrs.nmsrs >= MAX_IO_MSRS)
1564 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1565 entries = vmalloc(size);
1570 if (copy_from_user(entries, user_msrs->entries, size))
1573 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1578 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1589 int kvm_dev_ioctl_check_extension(long ext)
1594 case KVM_CAP_IRQCHIP:
1596 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1597 case KVM_CAP_SET_TSS_ADDR:
1598 case KVM_CAP_EXT_CPUID:
1599 case KVM_CAP_CLOCKSOURCE:
1601 case KVM_CAP_NOP_IO_DELAY:
1602 case KVM_CAP_MP_STATE:
1603 case KVM_CAP_SYNC_MMU:
1604 case KVM_CAP_REINJECT_CONTROL:
1605 case KVM_CAP_IRQ_INJECT_STATUS:
1606 case KVM_CAP_ASSIGN_DEV_IRQ:
1608 case KVM_CAP_IOEVENTFD:
1610 case KVM_CAP_PIT_STATE2:
1611 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1612 case KVM_CAP_XEN_HVM:
1613 case KVM_CAP_ADJUST_CLOCK:
1614 case KVM_CAP_VCPU_EVENTS:
1615 case KVM_CAP_HYPERV:
1616 case KVM_CAP_HYPERV_VAPIC:
1617 case KVM_CAP_HYPERV_SPIN:
1618 case KVM_CAP_PCI_SEGMENT:
1619 case KVM_CAP_DEBUGREGS:
1620 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1623 case KVM_CAP_COALESCED_MMIO:
1624 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1627 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1629 case KVM_CAP_NR_VCPUS:
1632 case KVM_CAP_NR_MEMSLOTS:
1633 r = KVM_MEMORY_SLOTS;
1635 case KVM_CAP_PV_MMU: /* obsolete */
1642 r = KVM_MAX_MCE_BANKS;
1652 long kvm_arch_dev_ioctl(struct file *filp,
1653 unsigned int ioctl, unsigned long arg)
1655 void __user *argp = (void __user *)arg;
1659 case KVM_GET_MSR_INDEX_LIST: {
1660 struct kvm_msr_list __user *user_msr_list = argp;
1661 struct kvm_msr_list msr_list;
1665 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1668 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1669 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1672 if (n < msr_list.nmsrs)
1675 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1676 num_msrs_to_save * sizeof(u32)))
1678 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1680 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1685 case KVM_GET_SUPPORTED_CPUID: {
1686 struct kvm_cpuid2 __user *cpuid_arg = argp;
1687 struct kvm_cpuid2 cpuid;
1690 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1692 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1693 cpuid_arg->entries);
1698 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1703 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1706 mce_cap = KVM_MCE_CAP_SUPPORTED;
1708 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1720 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1722 kvm_x86_ops->vcpu_load(vcpu, cpu);
1723 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1724 unsigned long khz = cpufreq_quick_get(cpu);
1727 per_cpu(cpu_tsc_khz, cpu) = khz;
1729 kvm_request_guest_time_update(vcpu);
1732 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1734 kvm_put_guest_fpu(vcpu);
1735 kvm_x86_ops->vcpu_put(vcpu);
1738 static int is_efer_nx(void)
1740 unsigned long long efer = 0;
1742 rdmsrl_safe(MSR_EFER, &efer);
1743 return efer & EFER_NX;
1746 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1749 struct kvm_cpuid_entry2 *e, *entry;
1752 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1753 e = &vcpu->arch.cpuid_entries[i];
1754 if (e->function == 0x80000001) {
1759 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1760 entry->edx &= ~(1 << 20);
1761 printk(KERN_INFO "kvm: guest NX capability removed\n");
1765 /* when an old userspace process fills a new kernel module */
1766 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1767 struct kvm_cpuid *cpuid,
1768 struct kvm_cpuid_entry __user *entries)
1771 struct kvm_cpuid_entry *cpuid_entries;
1774 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1777 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1781 if (copy_from_user(cpuid_entries, entries,
1782 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1784 for (i = 0; i < cpuid->nent; i++) {
1785 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1786 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1787 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1788 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1789 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1790 vcpu->arch.cpuid_entries[i].index = 0;
1791 vcpu->arch.cpuid_entries[i].flags = 0;
1792 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1793 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1794 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1796 vcpu->arch.cpuid_nent = cpuid->nent;
1797 cpuid_fix_nx_cap(vcpu);
1799 kvm_apic_set_version(vcpu);
1800 kvm_x86_ops->cpuid_update(vcpu);
1803 vfree(cpuid_entries);
1808 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1809 struct kvm_cpuid2 *cpuid,
1810 struct kvm_cpuid_entry2 __user *entries)
1815 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1818 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1819 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1821 vcpu->arch.cpuid_nent = cpuid->nent;
1822 kvm_apic_set_version(vcpu);
1823 kvm_x86_ops->cpuid_update(vcpu);
1830 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1831 struct kvm_cpuid2 *cpuid,
1832 struct kvm_cpuid_entry2 __user *entries)
1837 if (cpuid->nent < vcpu->arch.cpuid_nent)
1840 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1841 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1846 cpuid->nent = vcpu->arch.cpuid_nent;
1850 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1853 entry->function = function;
1854 entry->index = index;
1855 cpuid_count(entry->function, entry->index,
1856 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1860 #define F(x) bit(X86_FEATURE_##x)
1862 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1863 u32 index, int *nent, int maxnent)
1865 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1866 #ifdef CONFIG_X86_64
1867 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1869 unsigned f_lm = F(LM);
1871 unsigned f_gbpages = 0;
1874 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1877 const u32 kvm_supported_word0_x86_features =
1878 F(FPU) | F(VME) | F(DE) | F(PSE) |
1879 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1880 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1881 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1882 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1883 0 /* Reserved, DS, ACPI */ | F(MMX) |
1884 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1885 0 /* HTT, TM, Reserved, PBE */;
1886 /* cpuid 0x80000001.edx */
1887 const u32 kvm_supported_word1_x86_features =
1888 F(FPU) | F(VME) | F(DE) | F(PSE) |
1889 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1890 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1891 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1892 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1893 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1894 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1895 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1897 const u32 kvm_supported_word4_x86_features =
1898 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1899 0 /* DS-CPL, VMX, SMX, EST */ |
1900 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1901 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1902 0 /* Reserved, DCA */ | F(XMM4_1) |
1903 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1904 0 /* Reserved, XSAVE, OSXSAVE */;
1905 /* cpuid 0x80000001.ecx */
1906 const u32 kvm_supported_word6_x86_features =
1907 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1908 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1909 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1910 0 /* SKINIT */ | 0 /* WDT */;
1912 /* all calls to cpuid_count() should be made on the same cpu */
1914 do_cpuid_1_ent(entry, function, index);
1919 entry->eax = min(entry->eax, (u32)0xb);
1922 entry->edx &= kvm_supported_word0_x86_features;
1923 entry->ecx &= kvm_supported_word4_x86_features;
1924 /* we support x2apic emulation even if host does not support
1925 * it since we emulate x2apic in software */
1926 entry->ecx |= F(X2APIC);
1928 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1929 * may return different values. This forces us to get_cpu() before
1930 * issuing the first command, and also to emulate this annoying behavior
1931 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1933 int t, times = entry->eax & 0xff;
1935 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1936 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1937 for (t = 1; t < times && *nent < maxnent; ++t) {
1938 do_cpuid_1_ent(&entry[t], function, 0);
1939 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1944 /* function 4 and 0xb have additional index. */
1948 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1949 /* read more entries until cache_type is zero */
1950 for (i = 1; *nent < maxnent; ++i) {
1951 cache_type = entry[i - 1].eax & 0x1f;
1954 do_cpuid_1_ent(&entry[i], function, i);
1956 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1964 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1965 /* read more entries until level_type is zero */
1966 for (i = 1; *nent < maxnent; ++i) {
1967 level_type = entry[i - 1].ecx & 0xff00;
1970 do_cpuid_1_ent(&entry[i], function, i);
1972 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1977 case KVM_CPUID_SIGNATURE: {
1978 char signature[12] = "KVMKVMKVM\0\0";
1979 u32 *sigptr = (u32 *)signature;
1981 entry->ebx = sigptr[0];
1982 entry->ecx = sigptr[1];
1983 entry->edx = sigptr[2];
1986 case KVM_CPUID_FEATURES:
1987 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
1988 (1 << KVM_FEATURE_NOP_IO_DELAY) |
1989 (1 << KVM_FEATURE_CLOCKSOURCE2) |
1990 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
1996 entry->eax = min(entry->eax, 0x8000001a);
1999 entry->edx &= kvm_supported_word1_x86_features;
2000 entry->ecx &= kvm_supported_word6_x86_features;
2004 kvm_x86_ops->set_supported_cpuid(function, entry);
2011 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2012 struct kvm_cpuid_entry2 __user *entries)
2014 struct kvm_cpuid_entry2 *cpuid_entries;
2015 int limit, nent = 0, r = -E2BIG;
2018 if (cpuid->nent < 1)
2020 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2021 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2023 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2027 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2028 limit = cpuid_entries[0].eax;
2029 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2030 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2031 &nent, cpuid->nent);
2033 if (nent >= cpuid->nent)
2036 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2037 limit = cpuid_entries[nent - 1].eax;
2038 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2039 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2040 &nent, cpuid->nent);
2045 if (nent >= cpuid->nent)
2048 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2052 if (nent >= cpuid->nent)
2055 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2059 if (nent >= cpuid->nent)
2063 if (copy_to_user(entries, cpuid_entries,
2064 nent * sizeof(struct kvm_cpuid_entry2)))
2070 vfree(cpuid_entries);
2075 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2076 struct kvm_lapic_state *s)
2079 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2085 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2086 struct kvm_lapic_state *s)
2089 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2090 kvm_apic_post_state_restore(vcpu);
2091 update_cr8_intercept(vcpu);
2097 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2098 struct kvm_interrupt *irq)
2100 if (irq->irq < 0 || irq->irq >= 256)
2102 if (irqchip_in_kernel(vcpu->kvm))
2106 kvm_queue_interrupt(vcpu, irq->irq, false);
2113 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2116 kvm_inject_nmi(vcpu);
2122 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2123 struct kvm_tpr_access_ctl *tac)
2127 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2131 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2135 unsigned bank_num = mcg_cap & 0xff, bank;
2138 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2140 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2143 vcpu->arch.mcg_cap = mcg_cap;
2144 /* Init IA32_MCG_CTL to all 1s */
2145 if (mcg_cap & MCG_CTL_P)
2146 vcpu->arch.mcg_ctl = ~(u64)0;
2147 /* Init IA32_MCi_CTL to all 1s */
2148 for (bank = 0; bank < bank_num; bank++)
2149 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2154 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2155 struct kvm_x86_mce *mce)
2157 u64 mcg_cap = vcpu->arch.mcg_cap;
2158 unsigned bank_num = mcg_cap & 0xff;
2159 u64 *banks = vcpu->arch.mce_banks;
2161 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2164 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2165 * reporting is disabled
2167 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2168 vcpu->arch.mcg_ctl != ~(u64)0)
2170 banks += 4 * mce->bank;
2172 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2173 * reporting is disabled for the bank
2175 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2177 if (mce->status & MCI_STATUS_UC) {
2178 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2179 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2180 printk(KERN_DEBUG "kvm: set_mce: "
2181 "injects mce exception while "
2182 "previous one is in progress!\n");
2183 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2186 if (banks[1] & MCI_STATUS_VAL)
2187 mce->status |= MCI_STATUS_OVER;
2188 banks[2] = mce->addr;
2189 banks[3] = mce->misc;
2190 vcpu->arch.mcg_status = mce->mcg_status;
2191 banks[1] = mce->status;
2192 kvm_queue_exception(vcpu, MC_VECTOR);
2193 } else if (!(banks[1] & MCI_STATUS_VAL)
2194 || !(banks[1] & MCI_STATUS_UC)) {
2195 if (banks[1] & MCI_STATUS_VAL)
2196 mce->status |= MCI_STATUS_OVER;
2197 banks[2] = mce->addr;
2198 banks[3] = mce->misc;
2199 banks[1] = mce->status;
2201 banks[1] |= MCI_STATUS_OVER;
2205 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2206 struct kvm_vcpu_events *events)
2210 events->exception.injected =
2211 vcpu->arch.exception.pending &&
2212 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2213 events->exception.nr = vcpu->arch.exception.nr;
2214 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2215 events->exception.error_code = vcpu->arch.exception.error_code;
2217 events->interrupt.injected =
2218 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2219 events->interrupt.nr = vcpu->arch.interrupt.nr;
2220 events->interrupt.soft = 0;
2221 events->interrupt.shadow =
2222 kvm_x86_ops->get_interrupt_shadow(vcpu,
2223 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2225 events->nmi.injected = vcpu->arch.nmi_injected;
2226 events->nmi.pending = vcpu->arch.nmi_pending;
2227 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2229 events->sipi_vector = vcpu->arch.sipi_vector;
2231 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2232 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2233 | KVM_VCPUEVENT_VALID_SHADOW);
2238 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2239 struct kvm_vcpu_events *events)
2241 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2242 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2243 | KVM_VCPUEVENT_VALID_SHADOW))
2248 vcpu->arch.exception.pending = events->exception.injected;
2249 vcpu->arch.exception.nr = events->exception.nr;
2250 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2251 vcpu->arch.exception.error_code = events->exception.error_code;
2253 vcpu->arch.interrupt.pending = events->interrupt.injected;
2254 vcpu->arch.interrupt.nr = events->interrupt.nr;
2255 vcpu->arch.interrupt.soft = events->interrupt.soft;
2256 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2257 kvm_pic_clear_isr_ack(vcpu->kvm);
2258 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2259 kvm_x86_ops->set_interrupt_shadow(vcpu,
2260 events->interrupt.shadow);
2262 vcpu->arch.nmi_injected = events->nmi.injected;
2263 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2264 vcpu->arch.nmi_pending = events->nmi.pending;
2265 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2267 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2268 vcpu->arch.sipi_vector = events->sipi_vector;
2275 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2276 struct kvm_debugregs *dbgregs)
2280 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2281 dbgregs->dr6 = vcpu->arch.dr6;
2282 dbgregs->dr7 = vcpu->arch.dr7;
2288 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2289 struct kvm_debugregs *dbgregs)
2296 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2297 vcpu->arch.dr6 = dbgregs->dr6;
2298 vcpu->arch.dr7 = dbgregs->dr7;
2305 long kvm_arch_vcpu_ioctl(struct file *filp,
2306 unsigned int ioctl, unsigned long arg)
2308 struct kvm_vcpu *vcpu = filp->private_data;
2309 void __user *argp = (void __user *)arg;
2311 struct kvm_lapic_state *lapic = NULL;
2314 case KVM_GET_LAPIC: {
2316 if (!vcpu->arch.apic)
2318 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2323 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2327 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2332 case KVM_SET_LAPIC: {
2334 if (!vcpu->arch.apic)
2336 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2341 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2343 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2349 case KVM_INTERRUPT: {
2350 struct kvm_interrupt irq;
2353 if (copy_from_user(&irq, argp, sizeof irq))
2355 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2362 r = kvm_vcpu_ioctl_nmi(vcpu);
2368 case KVM_SET_CPUID: {
2369 struct kvm_cpuid __user *cpuid_arg = argp;
2370 struct kvm_cpuid cpuid;
2373 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2375 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2380 case KVM_SET_CPUID2: {
2381 struct kvm_cpuid2 __user *cpuid_arg = argp;
2382 struct kvm_cpuid2 cpuid;
2385 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2387 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2388 cpuid_arg->entries);
2393 case KVM_GET_CPUID2: {
2394 struct kvm_cpuid2 __user *cpuid_arg = argp;
2395 struct kvm_cpuid2 cpuid;
2398 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2400 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2401 cpuid_arg->entries);
2405 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2411 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2414 r = msr_io(vcpu, argp, do_set_msr, 0);
2416 case KVM_TPR_ACCESS_REPORTING: {
2417 struct kvm_tpr_access_ctl tac;
2420 if (copy_from_user(&tac, argp, sizeof tac))
2422 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2426 if (copy_to_user(argp, &tac, sizeof tac))
2431 case KVM_SET_VAPIC_ADDR: {
2432 struct kvm_vapic_addr va;
2435 if (!irqchip_in_kernel(vcpu->kvm))
2438 if (copy_from_user(&va, argp, sizeof va))
2441 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2444 case KVM_X86_SETUP_MCE: {
2448 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2450 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2453 case KVM_X86_SET_MCE: {
2454 struct kvm_x86_mce mce;
2457 if (copy_from_user(&mce, argp, sizeof mce))
2459 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2462 case KVM_GET_VCPU_EVENTS: {
2463 struct kvm_vcpu_events events;
2465 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2468 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2473 case KVM_SET_VCPU_EVENTS: {
2474 struct kvm_vcpu_events events;
2477 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2480 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2483 case KVM_GET_DEBUGREGS: {
2484 struct kvm_debugregs dbgregs;
2486 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2489 if (copy_to_user(argp, &dbgregs,
2490 sizeof(struct kvm_debugregs)))
2495 case KVM_SET_DEBUGREGS: {
2496 struct kvm_debugregs dbgregs;
2499 if (copy_from_user(&dbgregs, argp,
2500 sizeof(struct kvm_debugregs)))
2503 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2514 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2518 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2520 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2524 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2527 kvm->arch.ept_identity_map_addr = ident_addr;
2531 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2532 u32 kvm_nr_mmu_pages)
2534 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2537 mutex_lock(&kvm->slots_lock);
2538 spin_lock(&kvm->mmu_lock);
2540 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2541 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2543 spin_unlock(&kvm->mmu_lock);
2544 mutex_unlock(&kvm->slots_lock);
2548 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2550 return kvm->arch.n_alloc_mmu_pages;
2553 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2556 struct kvm_mem_alias *alias;
2557 struct kvm_mem_aliases *aliases;
2559 aliases = kvm_aliases(kvm);
2561 for (i = 0; i < aliases->naliases; ++i) {
2562 alias = &aliases->aliases[i];
2563 if (alias->flags & KVM_ALIAS_INVALID)
2565 if (gfn >= alias->base_gfn
2566 && gfn < alias->base_gfn + alias->npages)
2567 return alias->target_gfn + gfn - alias->base_gfn;
2572 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2575 struct kvm_mem_alias *alias;
2576 struct kvm_mem_aliases *aliases;
2578 aliases = kvm_aliases(kvm);
2580 for (i = 0; i < aliases->naliases; ++i) {
2581 alias = &aliases->aliases[i];
2582 if (gfn >= alias->base_gfn
2583 && gfn < alias->base_gfn + alias->npages)
2584 return alias->target_gfn + gfn - alias->base_gfn;
2590 * Set a new alias region. Aliases map a portion of physical memory into
2591 * another portion. This is useful for memory windows, for example the PC
2594 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2595 struct kvm_memory_alias *alias)
2598 struct kvm_mem_alias *p;
2599 struct kvm_mem_aliases *aliases, *old_aliases;
2602 /* General sanity checks */
2603 if (alias->memory_size & (PAGE_SIZE - 1))
2605 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2607 if (alias->slot >= KVM_ALIAS_SLOTS)
2609 if (alias->guest_phys_addr + alias->memory_size
2610 < alias->guest_phys_addr)
2612 if (alias->target_phys_addr + alias->memory_size
2613 < alias->target_phys_addr)
2617 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2621 mutex_lock(&kvm->slots_lock);
2623 /* invalidate any gfn reference in case of deletion/shrinking */
2624 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2625 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2626 old_aliases = kvm->arch.aliases;
2627 rcu_assign_pointer(kvm->arch.aliases, aliases);
2628 synchronize_srcu_expedited(&kvm->srcu);
2629 kvm_mmu_zap_all(kvm);
2633 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2637 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2639 p = &aliases->aliases[alias->slot];
2640 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2641 p->npages = alias->memory_size >> PAGE_SHIFT;
2642 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2643 p->flags &= ~(KVM_ALIAS_INVALID);
2645 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2646 if (aliases->aliases[n - 1].npages)
2648 aliases->naliases = n;
2650 old_aliases = kvm->arch.aliases;
2651 rcu_assign_pointer(kvm->arch.aliases, aliases);
2652 synchronize_srcu_expedited(&kvm->srcu);
2657 mutex_unlock(&kvm->slots_lock);
2662 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2667 switch (chip->chip_id) {
2668 case KVM_IRQCHIP_PIC_MASTER:
2669 memcpy(&chip->chip.pic,
2670 &pic_irqchip(kvm)->pics[0],
2671 sizeof(struct kvm_pic_state));
2673 case KVM_IRQCHIP_PIC_SLAVE:
2674 memcpy(&chip->chip.pic,
2675 &pic_irqchip(kvm)->pics[1],
2676 sizeof(struct kvm_pic_state));
2678 case KVM_IRQCHIP_IOAPIC:
2679 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2688 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2693 switch (chip->chip_id) {
2694 case KVM_IRQCHIP_PIC_MASTER:
2695 raw_spin_lock(&pic_irqchip(kvm)->lock);
2696 memcpy(&pic_irqchip(kvm)->pics[0],
2698 sizeof(struct kvm_pic_state));
2699 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2701 case KVM_IRQCHIP_PIC_SLAVE:
2702 raw_spin_lock(&pic_irqchip(kvm)->lock);
2703 memcpy(&pic_irqchip(kvm)->pics[1],
2705 sizeof(struct kvm_pic_state));
2706 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2708 case KVM_IRQCHIP_IOAPIC:
2709 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2715 kvm_pic_update_irq(pic_irqchip(kvm));
2719 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2723 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2724 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2725 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2729 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2733 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2734 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2735 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2736 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2740 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2744 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2745 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2746 sizeof(ps->channels));
2747 ps->flags = kvm->arch.vpit->pit_state.flags;
2748 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2752 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2754 int r = 0, start = 0;
2755 u32 prev_legacy, cur_legacy;
2756 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2757 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2758 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2759 if (!prev_legacy && cur_legacy)
2761 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2762 sizeof(kvm->arch.vpit->pit_state.channels));
2763 kvm->arch.vpit->pit_state.flags = ps->flags;
2764 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2765 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2769 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2770 struct kvm_reinject_control *control)
2772 if (!kvm->arch.vpit)
2774 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2775 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2776 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2781 * Get (and clear) the dirty memory log for a memory slot.
2783 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2784 struct kvm_dirty_log *log)
2787 struct kvm_memory_slot *memslot;
2789 unsigned long is_dirty = 0;
2790 unsigned long *dirty_bitmap = NULL;
2792 mutex_lock(&kvm->slots_lock);
2795 if (log->slot >= KVM_MEMORY_SLOTS)
2798 memslot = &kvm->memslots->memslots[log->slot];
2800 if (!memslot->dirty_bitmap)
2803 n = kvm_dirty_bitmap_bytes(memslot);
2806 dirty_bitmap = vmalloc(n);
2809 memset(dirty_bitmap, 0, n);
2811 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2812 is_dirty = memslot->dirty_bitmap[i];
2814 /* If nothing is dirty, don't bother messing with page tables. */
2816 struct kvm_memslots *slots, *old_slots;
2818 spin_lock(&kvm->mmu_lock);
2819 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2820 spin_unlock(&kvm->mmu_lock);
2822 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2826 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2827 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2829 old_slots = kvm->memslots;
2830 rcu_assign_pointer(kvm->memslots, slots);
2831 synchronize_srcu_expedited(&kvm->srcu);
2832 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2837 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2840 vfree(dirty_bitmap);
2842 mutex_unlock(&kvm->slots_lock);
2846 long kvm_arch_vm_ioctl(struct file *filp,
2847 unsigned int ioctl, unsigned long arg)
2849 struct kvm *kvm = filp->private_data;
2850 void __user *argp = (void __user *)arg;
2853 * This union makes it completely explicit to gcc-3.x
2854 * that these two variables' stack usage should be
2855 * combined, not added together.
2858 struct kvm_pit_state ps;
2859 struct kvm_pit_state2 ps2;
2860 struct kvm_memory_alias alias;
2861 struct kvm_pit_config pit_config;
2865 case KVM_SET_TSS_ADDR:
2866 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2870 case KVM_SET_IDENTITY_MAP_ADDR: {
2874 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2876 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2881 case KVM_SET_MEMORY_REGION: {
2882 struct kvm_memory_region kvm_mem;
2883 struct kvm_userspace_memory_region kvm_userspace_mem;
2886 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2888 kvm_userspace_mem.slot = kvm_mem.slot;
2889 kvm_userspace_mem.flags = kvm_mem.flags;
2890 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2891 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2892 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2897 case KVM_SET_NR_MMU_PAGES:
2898 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2902 case KVM_GET_NR_MMU_PAGES:
2903 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2905 case KVM_SET_MEMORY_ALIAS:
2907 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2909 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2913 case KVM_CREATE_IRQCHIP: {
2914 struct kvm_pic *vpic;
2916 mutex_lock(&kvm->lock);
2919 goto create_irqchip_unlock;
2921 vpic = kvm_create_pic(kvm);
2923 r = kvm_ioapic_init(kvm);
2925 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2928 goto create_irqchip_unlock;
2931 goto create_irqchip_unlock;
2933 kvm->arch.vpic = vpic;
2935 r = kvm_setup_default_irq_routing(kvm);
2937 mutex_lock(&kvm->irq_lock);
2938 kvm_ioapic_destroy(kvm);
2939 kvm_destroy_pic(kvm);
2940 mutex_unlock(&kvm->irq_lock);
2942 create_irqchip_unlock:
2943 mutex_unlock(&kvm->lock);
2946 case KVM_CREATE_PIT:
2947 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2949 case KVM_CREATE_PIT2:
2951 if (copy_from_user(&u.pit_config, argp,
2952 sizeof(struct kvm_pit_config)))
2955 mutex_lock(&kvm->slots_lock);
2958 goto create_pit_unlock;
2960 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2964 mutex_unlock(&kvm->slots_lock);
2966 case KVM_IRQ_LINE_STATUS:
2967 case KVM_IRQ_LINE: {
2968 struct kvm_irq_level irq_event;
2971 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2974 if (irqchip_in_kernel(kvm)) {
2976 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2977 irq_event.irq, irq_event.level);
2978 if (ioctl == KVM_IRQ_LINE_STATUS) {
2980 irq_event.status = status;
2981 if (copy_to_user(argp, &irq_event,
2989 case KVM_GET_IRQCHIP: {
2990 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2991 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2997 if (copy_from_user(chip, argp, sizeof *chip))
2998 goto get_irqchip_out;
3000 if (!irqchip_in_kernel(kvm))
3001 goto get_irqchip_out;
3002 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3004 goto get_irqchip_out;
3006 if (copy_to_user(argp, chip, sizeof *chip))
3007 goto get_irqchip_out;
3015 case KVM_SET_IRQCHIP: {
3016 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3017 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3023 if (copy_from_user(chip, argp, sizeof *chip))
3024 goto set_irqchip_out;
3026 if (!irqchip_in_kernel(kvm))
3027 goto set_irqchip_out;
3028 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3030 goto set_irqchip_out;
3040 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3043 if (!kvm->arch.vpit)
3045 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3049 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3056 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3059 if (!kvm->arch.vpit)
3061 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3067 case KVM_GET_PIT2: {
3069 if (!kvm->arch.vpit)
3071 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3075 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3080 case KVM_SET_PIT2: {
3082 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3085 if (!kvm->arch.vpit)
3087 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3093 case KVM_REINJECT_CONTROL: {
3094 struct kvm_reinject_control control;
3096 if (copy_from_user(&control, argp, sizeof(control)))
3098 r = kvm_vm_ioctl_reinject(kvm, &control);
3104 case KVM_XEN_HVM_CONFIG: {
3106 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3107 sizeof(struct kvm_xen_hvm_config)))
3110 if (kvm->arch.xen_hvm_config.flags)
3115 case KVM_SET_CLOCK: {
3116 struct timespec now;
3117 struct kvm_clock_data user_ns;
3122 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3131 now_ns = timespec_to_ns(&now);
3132 delta = user_ns.clock - now_ns;
3133 kvm->arch.kvmclock_offset = delta;
3136 case KVM_GET_CLOCK: {
3137 struct timespec now;
3138 struct kvm_clock_data user_ns;
3142 now_ns = timespec_to_ns(&now);
3143 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3147 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3160 static void kvm_init_msr_list(void)
3165 /* skip the first msrs in the list. KVM-specific */
3166 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3167 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3170 msrs_to_save[j] = msrs_to_save[i];
3173 num_msrs_to_save = j;
3176 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3179 if (vcpu->arch.apic &&
3180 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3183 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3186 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3188 if (vcpu->arch.apic &&
3189 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3192 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3195 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3196 struct kvm_segment *var, int seg)
3198 kvm_x86_ops->set_segment(vcpu, var, seg);
3201 void kvm_get_segment(struct kvm_vcpu *vcpu,
3202 struct kvm_segment *var, int seg)
3204 kvm_x86_ops->get_segment(vcpu, var, seg);
3207 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3209 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3210 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3213 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3215 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3216 access |= PFERR_FETCH_MASK;
3217 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3220 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3222 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3223 access |= PFERR_WRITE_MASK;
3224 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3227 /* uses this to access any guest's mapped memory without checking CPL */
3228 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3230 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3233 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3234 struct kvm_vcpu *vcpu, u32 access,
3238 int r = X86EMUL_CONTINUE;
3241 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3242 unsigned offset = addr & (PAGE_SIZE-1);
3243 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3246 if (gpa == UNMAPPED_GVA) {
3247 r = X86EMUL_PROPAGATE_FAULT;
3250 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3252 r = X86EMUL_UNHANDLEABLE;
3264 /* used for instruction fetching */
3265 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3266 struct kvm_vcpu *vcpu, u32 *error)
3268 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3269 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3270 access | PFERR_FETCH_MASK, error);
3273 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3274 struct kvm_vcpu *vcpu, u32 *error)
3276 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3277 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3281 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3282 struct kvm_vcpu *vcpu, u32 *error)
3284 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3287 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3289 struct kvm_vcpu *vcpu,
3293 int r = X86EMUL_CONTINUE;
3296 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3297 PFERR_WRITE_MASK, error);
3298 unsigned offset = addr & (PAGE_SIZE-1);
3299 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3302 if (gpa == UNMAPPED_GVA) {
3303 r = X86EMUL_PROPAGATE_FAULT;
3306 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3308 r = X86EMUL_UNHANDLEABLE;
3320 static int emulator_read_emulated(unsigned long addr,
3323 struct kvm_vcpu *vcpu)
3328 if (vcpu->mmio_read_completed) {
3329 memcpy(val, vcpu->mmio_data, bytes);
3330 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3331 vcpu->mmio_phys_addr, *(u64 *)val);
3332 vcpu->mmio_read_completed = 0;
3333 return X86EMUL_CONTINUE;
3336 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3338 if (gpa == UNMAPPED_GVA) {
3339 kvm_inject_page_fault(vcpu, addr, error_code);
3340 return X86EMUL_PROPAGATE_FAULT;
3343 /* For APIC access vmexit */
3344 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3347 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3348 == X86EMUL_CONTINUE)
3349 return X86EMUL_CONTINUE;
3353 * Is this MMIO handled locally?
3355 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3356 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3357 return X86EMUL_CONTINUE;
3360 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3362 vcpu->mmio_needed = 1;
3363 vcpu->mmio_phys_addr = gpa;
3364 vcpu->mmio_size = bytes;
3365 vcpu->mmio_is_write = 0;
3367 return X86EMUL_UNHANDLEABLE;
3370 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3371 const void *val, int bytes)
3375 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3378 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3382 static int emulator_write_emulated_onepage(unsigned long addr,
3385 struct kvm_vcpu *vcpu)
3390 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3392 if (gpa == UNMAPPED_GVA) {
3393 kvm_inject_page_fault(vcpu, addr, error_code);
3394 return X86EMUL_PROPAGATE_FAULT;
3397 /* For APIC access vmexit */
3398 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3401 if (emulator_write_phys(vcpu, gpa, val, bytes))
3402 return X86EMUL_CONTINUE;
3405 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3407 * Is this MMIO handled locally?
3409 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3410 return X86EMUL_CONTINUE;
3412 vcpu->mmio_needed = 1;
3413 vcpu->mmio_phys_addr = gpa;
3414 vcpu->mmio_size = bytes;
3415 vcpu->mmio_is_write = 1;
3416 memcpy(vcpu->mmio_data, val, bytes);
3418 return X86EMUL_CONTINUE;
3421 int emulator_write_emulated(unsigned long addr,
3424 struct kvm_vcpu *vcpu)
3426 /* Crossing a page boundary? */
3427 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3430 now = -addr & ~PAGE_MASK;
3431 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3432 if (rc != X86EMUL_CONTINUE)
3438 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3440 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3442 #define CMPXCHG_TYPE(t, ptr, old, new) \
3443 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3445 #ifdef CONFIG_X86_64
3446 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3448 # define CMPXCHG64(ptr, old, new) \
3449 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3452 static int emulator_cmpxchg_emulated(unsigned long addr,
3456 struct kvm_vcpu *vcpu)
3463 /* guests cmpxchg8b have to be emulated atomically */
3464 if (bytes > 8 || (bytes & (bytes - 1)))
3467 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3469 if (gpa == UNMAPPED_GVA ||
3470 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3473 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3476 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3478 kaddr = kmap_atomic(page, KM_USER0);
3479 kaddr += offset_in_page(gpa);
3482 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3485 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3488 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3491 exchanged = CMPXCHG64(kaddr, old, new);
3496 kunmap_atomic(kaddr, KM_USER0);
3497 kvm_release_page_dirty(page);
3500 return X86EMUL_CMPXCHG_FAILED;
3502 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3504 return X86EMUL_CONTINUE;
3507 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3509 return emulator_write_emulated(addr, new, bytes, vcpu);
3512 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3514 /* TODO: String I/O for in kernel device */
3517 if (vcpu->arch.pio.in)
3518 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3519 vcpu->arch.pio.size, pd);
3521 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3522 vcpu->arch.pio.port, vcpu->arch.pio.size,
3528 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3529 unsigned int count, struct kvm_vcpu *vcpu)
3531 if (vcpu->arch.pio.count)
3534 trace_kvm_pio(1, port, size, 1);
3536 vcpu->arch.pio.port = port;
3537 vcpu->arch.pio.in = 1;
3538 vcpu->arch.pio.count = count;
3539 vcpu->arch.pio.size = size;
3541 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3543 memcpy(val, vcpu->arch.pio_data, size * count);
3544 vcpu->arch.pio.count = 0;
3548 vcpu->run->exit_reason = KVM_EXIT_IO;
3549 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3550 vcpu->run->io.size = size;
3551 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3552 vcpu->run->io.count = count;
3553 vcpu->run->io.port = port;
3558 static int emulator_pio_out_emulated(int size, unsigned short port,
3559 const void *val, unsigned int count,
3560 struct kvm_vcpu *vcpu)
3562 trace_kvm_pio(0, port, size, 1);
3564 vcpu->arch.pio.port = port;
3565 vcpu->arch.pio.in = 0;
3566 vcpu->arch.pio.count = count;
3567 vcpu->arch.pio.size = size;
3569 memcpy(vcpu->arch.pio_data, val, size * count);
3571 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3572 vcpu->arch.pio.count = 0;
3576 vcpu->run->exit_reason = KVM_EXIT_IO;
3577 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3578 vcpu->run->io.size = size;
3579 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3580 vcpu->run->io.count = count;
3581 vcpu->run->io.port = port;
3586 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3588 return kvm_x86_ops->get_segment_base(vcpu, seg);
3591 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3593 kvm_mmu_invlpg(vcpu, address);
3594 return X86EMUL_CONTINUE;
3597 int emulate_clts(struct kvm_vcpu *vcpu)
3599 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3600 kvm_x86_ops->fpu_activate(vcpu);
3601 return X86EMUL_CONTINUE;
3604 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3606 return kvm_get_dr(ctxt->vcpu, dr, dest);
3609 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3611 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3613 return kvm_set_dr(ctxt->vcpu, dr, value & mask);
3616 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3619 unsigned long rip = kvm_rip_read(vcpu);
3620 unsigned long rip_linear;
3622 if (!printk_ratelimit())
3625 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3627 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3629 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3630 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3632 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3634 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3636 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3639 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3641 unsigned long value;
3645 value = kvm_read_cr0(vcpu);
3648 value = vcpu->arch.cr2;
3651 value = vcpu->arch.cr3;
3654 value = kvm_read_cr4(vcpu);
3657 value = kvm_get_cr8(vcpu);
3660 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3667 static void emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3671 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3674 vcpu->arch.cr2 = val;
3677 kvm_set_cr3(vcpu, val);
3680 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3683 kvm_set_cr8(vcpu, val & 0xfUL);
3686 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3690 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3692 return kvm_x86_ops->get_cpl(vcpu);
3695 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3697 kvm_x86_ops->get_gdt(vcpu, dt);
3700 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3701 struct kvm_vcpu *vcpu)
3703 struct kvm_segment var;
3705 kvm_get_segment(vcpu, &var, seg);
3712 set_desc_limit(desc, var.limit);
3713 set_desc_base(desc, (unsigned long)var.base);
3714 desc->type = var.type;
3716 desc->dpl = var.dpl;
3717 desc->p = var.present;
3718 desc->avl = var.avl;
3726 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3727 struct kvm_vcpu *vcpu)
3729 struct kvm_segment var;
3731 /* needed to preserve selector */
3732 kvm_get_segment(vcpu, &var, seg);
3734 var.base = get_desc_base(desc);
3735 var.limit = get_desc_limit(desc);
3737 var.limit = (var.limit << 12) | 0xfff;
3738 var.type = desc->type;
3739 var.present = desc->p;
3740 var.dpl = desc->dpl;
3745 var.avl = desc->avl;
3746 var.present = desc->p;
3747 var.unusable = !var.present;
3750 kvm_set_segment(vcpu, &var, seg);
3754 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3756 struct kvm_segment kvm_seg;
3758 kvm_get_segment(vcpu, &kvm_seg, seg);
3759 return kvm_seg.selector;
3762 static void emulator_set_segment_selector(u16 sel, int seg,
3763 struct kvm_vcpu *vcpu)
3765 struct kvm_segment kvm_seg;
3767 kvm_get_segment(vcpu, &kvm_seg, seg);
3768 kvm_seg.selector = sel;
3769 kvm_set_segment(vcpu, &kvm_seg, seg);
3772 static void emulator_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
3774 kvm_x86_ops->set_rflags(vcpu, rflags);
3777 static struct x86_emulate_ops emulate_ops = {
3778 .read_std = kvm_read_guest_virt_system,
3779 .write_std = kvm_write_guest_virt_system,
3780 .fetch = kvm_fetch_guest_virt,
3781 .read_emulated = emulator_read_emulated,
3782 .write_emulated = emulator_write_emulated,
3783 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3784 .pio_in_emulated = emulator_pio_in_emulated,
3785 .pio_out_emulated = emulator_pio_out_emulated,
3786 .get_cached_descriptor = emulator_get_cached_descriptor,
3787 .set_cached_descriptor = emulator_set_cached_descriptor,
3788 .get_segment_selector = emulator_get_segment_selector,
3789 .set_segment_selector = emulator_set_segment_selector,
3790 .get_gdt = emulator_get_gdt,
3791 .get_cr = emulator_get_cr,
3792 .set_cr = emulator_set_cr,
3793 .cpl = emulator_get_cpl,
3794 .set_rflags = emulator_set_rflags,
3797 static void cache_all_regs(struct kvm_vcpu *vcpu)
3799 kvm_register_read(vcpu, VCPU_REGS_RAX);
3800 kvm_register_read(vcpu, VCPU_REGS_RSP);
3801 kvm_register_read(vcpu, VCPU_REGS_RIP);
3802 vcpu->arch.regs_dirty = ~0;
3805 int emulate_instruction(struct kvm_vcpu *vcpu,
3811 struct decode_cache *c;
3812 struct kvm_run *run = vcpu->run;
3814 kvm_clear_exception_queue(vcpu);
3815 vcpu->arch.mmio_fault_cr2 = cr2;
3817 * TODO: fix emulate.c to use guest_read/write_register
3818 * instead of direct ->regs accesses, can save hundred cycles
3819 * on Intel for instructions that don't read/change RSP, for
3822 cache_all_regs(vcpu);
3824 vcpu->mmio_is_write = 0;
3826 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3828 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3830 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3831 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3832 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3833 vcpu->arch.emulate_ctxt.mode =
3834 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3835 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3836 ? X86EMUL_MODE_VM86 : cs_l
3837 ? X86EMUL_MODE_PROT64 : cs_db
3838 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3840 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3841 trace_kvm_emulate_insn_start(vcpu);
3843 /* Only allow emulation of specific instructions on #UD
3844 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3845 c = &vcpu->arch.emulate_ctxt.decode;
3846 if (emulation_type & EMULTYPE_TRAP_UD) {
3848 return EMULATE_FAIL;
3850 case 0x01: /* VMMCALL */
3851 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3852 return EMULATE_FAIL;
3854 case 0x34: /* sysenter */
3855 case 0x35: /* sysexit */
3856 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3857 return EMULATE_FAIL;
3859 case 0x05: /* syscall */
3860 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3861 return EMULATE_FAIL;
3864 return EMULATE_FAIL;
3867 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3868 return EMULATE_FAIL;
3871 ++vcpu->stat.insn_emulation;
3873 ++vcpu->stat.insn_emulation_fail;
3874 trace_kvm_emulate_insn_failed(vcpu);
3875 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3876 return EMULATE_DONE;
3877 return EMULATE_FAIL;
3881 if (emulation_type & EMULTYPE_SKIP) {
3882 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3883 return EMULATE_DONE;
3887 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3888 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3891 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3893 if (vcpu->arch.pio.count) {
3894 if (!vcpu->arch.pio.in)
3895 vcpu->arch.pio.count = 0;
3896 return EMULATE_DO_MMIO;
3899 if (r || vcpu->mmio_is_write) {
3900 run->exit_reason = KVM_EXIT_MMIO;
3901 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3902 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3903 run->mmio.len = vcpu->mmio_size;
3904 run->mmio.is_write = vcpu->mmio_is_write;
3908 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3910 if (!vcpu->mmio_needed) {
3911 ++vcpu->stat.insn_emulation_fail;
3912 trace_kvm_emulate_insn_failed(vcpu);
3913 kvm_report_emulation_failure(vcpu, "mmio");
3914 return EMULATE_FAIL;
3916 return EMULATE_DO_MMIO;
3919 if (vcpu->mmio_is_write) {
3920 vcpu->mmio_needed = 0;
3921 return EMULATE_DO_MMIO;
3925 if (vcpu->arch.exception.pending)
3926 vcpu->arch.emulate_ctxt.restart = false;
3928 if (vcpu->arch.emulate_ctxt.restart)
3931 return EMULATE_DONE;
3933 EXPORT_SYMBOL_GPL(emulate_instruction);
3935 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
3937 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3938 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
3939 /* do not return to emulator after return from userspace */
3940 vcpu->arch.pio.count = 0;
3943 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
3945 static void bounce_off(void *info)
3950 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3953 struct cpufreq_freqs *freq = data;
3955 struct kvm_vcpu *vcpu;
3956 int i, send_ipi = 0;
3958 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3960 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3962 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3964 spin_lock(&kvm_lock);
3965 list_for_each_entry(kvm, &vm_list, vm_list) {
3966 kvm_for_each_vcpu(i, vcpu, kvm) {
3967 if (vcpu->cpu != freq->cpu)
3969 if (!kvm_request_guest_time_update(vcpu))
3971 if (vcpu->cpu != smp_processor_id())
3975 spin_unlock(&kvm_lock);
3977 if (freq->old < freq->new && send_ipi) {
3979 * We upscale the frequency. Must make the guest
3980 * doesn't see old kvmclock values while running with
3981 * the new frequency, otherwise we risk the guest sees
3982 * time go backwards.
3984 * In case we update the frequency for another cpu
3985 * (which might be in guest context) send an interrupt
3986 * to kick the cpu out of guest context. Next time
3987 * guest context is entered kvmclock will be updated,
3988 * so the guest will not see stale values.
3990 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3995 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3996 .notifier_call = kvmclock_cpufreq_notifier
3999 static void kvm_timer_init(void)
4003 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4004 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4005 CPUFREQ_TRANSITION_NOTIFIER);
4006 for_each_online_cpu(cpu) {
4007 unsigned long khz = cpufreq_get(cpu);
4010 per_cpu(cpu_tsc_khz, cpu) = khz;
4013 for_each_possible_cpu(cpu)
4014 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4018 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4020 static int kvm_is_in_guest(void)
4022 return percpu_read(current_vcpu) != NULL;
4025 static int kvm_is_user_mode(void)
4029 if (percpu_read(current_vcpu))
4030 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4032 return user_mode != 0;
4035 static unsigned long kvm_get_guest_ip(void)
4037 unsigned long ip = 0;
4039 if (percpu_read(current_vcpu))
4040 ip = kvm_rip_read(percpu_read(current_vcpu));
4045 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4046 .is_in_guest = kvm_is_in_guest,
4047 .is_user_mode = kvm_is_user_mode,
4048 .get_guest_ip = kvm_get_guest_ip,
4051 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4053 percpu_write(current_vcpu, vcpu);
4055 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4057 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4059 percpu_write(current_vcpu, NULL);
4061 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4063 int kvm_arch_init(void *opaque)
4066 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4069 printk(KERN_ERR "kvm: already loaded the other module\n");
4074 if (!ops->cpu_has_kvm_support()) {
4075 printk(KERN_ERR "kvm: no hardware support\n");
4079 if (ops->disabled_by_bios()) {
4080 printk(KERN_ERR "kvm: disabled by bios\n");
4085 r = kvm_mmu_module_init();
4089 kvm_init_msr_list();
4092 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4093 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4094 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4095 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4099 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4107 void kvm_arch_exit(void)
4109 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4111 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4112 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4113 CPUFREQ_TRANSITION_NOTIFIER);
4115 kvm_mmu_module_exit();
4118 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4120 ++vcpu->stat.halt_exits;
4121 if (irqchip_in_kernel(vcpu->kvm)) {
4122 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4125 vcpu->run->exit_reason = KVM_EXIT_HLT;
4129 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4131 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4134 if (is_long_mode(vcpu))
4137 return a0 | ((gpa_t)a1 << 32);
4140 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4142 u64 param, ingpa, outgpa, ret;
4143 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4144 bool fast, longmode;
4148 * hypercall generates UD from non zero cpl and real mode
4151 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4152 kvm_queue_exception(vcpu, UD_VECTOR);
4156 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4157 longmode = is_long_mode(vcpu) && cs_l == 1;
4160 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4161 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4162 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4163 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4164 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4165 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4167 #ifdef CONFIG_X86_64
4169 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4170 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4171 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4175 code = param & 0xffff;
4176 fast = (param >> 16) & 0x1;
4177 rep_cnt = (param >> 32) & 0xfff;
4178 rep_idx = (param >> 48) & 0xfff;
4180 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4183 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4184 kvm_vcpu_on_spin(vcpu);
4187 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4191 ret = res | (((u64)rep_done & 0xfff) << 32);
4193 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4195 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4196 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4202 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4204 unsigned long nr, a0, a1, a2, a3, ret;
4207 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4208 return kvm_hv_hypercall(vcpu);
4210 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4211 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4212 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4213 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4214 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4216 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4218 if (!is_long_mode(vcpu)) {
4226 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4232 case KVM_HC_VAPIC_POLL_IRQ:
4236 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4243 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4244 ++vcpu->stat.hypercalls;
4247 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4249 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4251 char instruction[3];
4252 unsigned long rip = kvm_rip_read(vcpu);
4255 * Blow out the MMU to ensure that no other VCPU has an active mapping
4256 * to ensure that the updated hypercall appears atomically across all
4259 kvm_mmu_zap_all(vcpu->kvm);
4261 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4263 return emulator_write_emulated(rip, instruction, 3, vcpu);
4266 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4268 struct desc_ptr dt = { limit, base };
4270 kvm_x86_ops->set_gdt(vcpu, &dt);
4273 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4275 struct desc_ptr dt = { limit, base };
4277 kvm_x86_ops->set_idt(vcpu, &dt);
4280 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4282 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4283 int j, nent = vcpu->arch.cpuid_nent;
4285 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4286 /* when no next entry is found, the current entry[i] is reselected */
4287 for (j = i + 1; ; j = (j + 1) % nent) {
4288 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4289 if (ej->function == e->function) {
4290 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4294 return 0; /* silence gcc, even though control never reaches here */
4297 /* find an entry with matching function, matching index (if needed), and that
4298 * should be read next (if it's stateful) */
4299 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4300 u32 function, u32 index)
4302 if (e->function != function)
4304 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4306 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4307 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4312 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4313 u32 function, u32 index)
4316 struct kvm_cpuid_entry2 *best = NULL;
4318 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4319 struct kvm_cpuid_entry2 *e;
4321 e = &vcpu->arch.cpuid_entries[i];
4322 if (is_matching_cpuid_entry(e, function, index)) {
4323 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4324 move_to_next_stateful_cpuid_entry(vcpu, i);
4329 * Both basic or both extended?
4331 if (((e->function ^ function) & 0x80000000) == 0)
4332 if (!best || e->function > best->function)
4337 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4339 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4341 struct kvm_cpuid_entry2 *best;
4343 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4344 if (!best || best->eax < 0x80000008)
4346 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4348 return best->eax & 0xff;
4353 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4355 u32 function, index;
4356 struct kvm_cpuid_entry2 *best;
4358 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4359 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4360 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4361 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4362 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4363 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4364 best = kvm_find_cpuid_entry(vcpu, function, index);
4366 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4367 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4368 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4369 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4371 kvm_x86_ops->skip_emulated_instruction(vcpu);
4372 trace_kvm_cpuid(function,
4373 kvm_register_read(vcpu, VCPU_REGS_RAX),
4374 kvm_register_read(vcpu, VCPU_REGS_RBX),
4375 kvm_register_read(vcpu, VCPU_REGS_RCX),
4376 kvm_register_read(vcpu, VCPU_REGS_RDX));
4378 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4381 * Check if userspace requested an interrupt window, and that the
4382 * interrupt window is open.
4384 * No need to exit to userspace if we already have an interrupt queued.
4386 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4388 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4389 vcpu->run->request_interrupt_window &&
4390 kvm_arch_interrupt_allowed(vcpu));
4393 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4395 struct kvm_run *kvm_run = vcpu->run;
4397 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4398 kvm_run->cr8 = kvm_get_cr8(vcpu);
4399 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4400 if (irqchip_in_kernel(vcpu->kvm))
4401 kvm_run->ready_for_interrupt_injection = 1;
4403 kvm_run->ready_for_interrupt_injection =
4404 kvm_arch_interrupt_allowed(vcpu) &&
4405 !kvm_cpu_has_interrupt(vcpu) &&
4406 !kvm_event_needs_reinjection(vcpu);
4409 static void vapic_enter(struct kvm_vcpu *vcpu)
4411 struct kvm_lapic *apic = vcpu->arch.apic;
4414 if (!apic || !apic->vapic_addr)
4417 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4419 vcpu->arch.apic->vapic_page = page;
4422 static void vapic_exit(struct kvm_vcpu *vcpu)
4424 struct kvm_lapic *apic = vcpu->arch.apic;
4427 if (!apic || !apic->vapic_addr)
4430 idx = srcu_read_lock(&vcpu->kvm->srcu);
4431 kvm_release_page_dirty(apic->vapic_page);
4432 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4433 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4436 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4440 if (!kvm_x86_ops->update_cr8_intercept)
4443 if (!vcpu->arch.apic)
4446 if (!vcpu->arch.apic->vapic_addr)
4447 max_irr = kvm_lapic_find_highest_irr(vcpu);
4454 tpr = kvm_lapic_get_cr8(vcpu);
4456 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4459 static void inject_pending_event(struct kvm_vcpu *vcpu)
4461 /* try to reinject previous events if any */
4462 if (vcpu->arch.exception.pending) {
4463 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4464 vcpu->arch.exception.has_error_code,
4465 vcpu->arch.exception.error_code);
4466 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4467 vcpu->arch.exception.has_error_code,
4468 vcpu->arch.exception.error_code,
4469 vcpu->arch.exception.reinject);
4473 if (vcpu->arch.nmi_injected) {
4474 kvm_x86_ops->set_nmi(vcpu);
4478 if (vcpu->arch.interrupt.pending) {
4479 kvm_x86_ops->set_irq(vcpu);
4483 /* try to inject new event if pending */
4484 if (vcpu->arch.nmi_pending) {
4485 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4486 vcpu->arch.nmi_pending = false;
4487 vcpu->arch.nmi_injected = true;
4488 kvm_x86_ops->set_nmi(vcpu);
4490 } else if (kvm_cpu_has_interrupt(vcpu)) {
4491 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4492 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4494 kvm_x86_ops->set_irq(vcpu);
4499 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4502 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4503 vcpu->run->request_interrupt_window;
4506 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4507 kvm_mmu_unload(vcpu);
4509 r = kvm_mmu_reload(vcpu);
4513 if (vcpu->requests) {
4514 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4515 __kvm_migrate_timers(vcpu);
4516 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4517 kvm_write_guest_time(vcpu);
4518 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4519 kvm_mmu_sync_roots(vcpu);
4520 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4521 kvm_x86_ops->tlb_flush(vcpu);
4522 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4524 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4528 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4529 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4533 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4534 vcpu->fpu_active = 0;
4535 kvm_x86_ops->fpu_deactivate(vcpu);
4541 kvm_x86_ops->prepare_guest_switch(vcpu);
4542 if (vcpu->fpu_active)
4543 kvm_load_guest_fpu(vcpu);
4545 local_irq_disable();
4547 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4548 smp_mb__after_clear_bit();
4550 if (vcpu->requests || need_resched() || signal_pending(current)) {
4551 set_bit(KVM_REQ_KICK, &vcpu->requests);
4558 inject_pending_event(vcpu);
4560 /* enable NMI/IRQ window open exits if needed */
4561 if (vcpu->arch.nmi_pending)
4562 kvm_x86_ops->enable_nmi_window(vcpu);
4563 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4564 kvm_x86_ops->enable_irq_window(vcpu);
4566 if (kvm_lapic_enabled(vcpu)) {
4567 update_cr8_intercept(vcpu);
4568 kvm_lapic_sync_to_vapic(vcpu);
4571 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4575 if (unlikely(vcpu->arch.switch_db_regs)) {
4577 set_debugreg(vcpu->arch.eff_db[0], 0);
4578 set_debugreg(vcpu->arch.eff_db[1], 1);
4579 set_debugreg(vcpu->arch.eff_db[2], 2);
4580 set_debugreg(vcpu->arch.eff_db[3], 3);
4583 trace_kvm_entry(vcpu->vcpu_id);
4584 kvm_x86_ops->run(vcpu);
4587 * If the guest has used debug registers, at least dr7
4588 * will be disabled while returning to the host.
4589 * If we don't have active breakpoints in the host, we don't
4590 * care about the messed up debug address registers. But if
4591 * we have some of them active, restore the old state.
4593 if (hw_breakpoint_active())
4594 hw_breakpoint_restore();
4596 set_bit(KVM_REQ_KICK, &vcpu->requests);
4602 * We must have an instruction between local_irq_enable() and
4603 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4604 * the interrupt shadow. The stat.exits increment will do nicely.
4605 * But we need to prevent reordering, hence this barrier():
4613 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4616 * Profile KVM exit RIPs:
4618 if (unlikely(prof_on == KVM_PROFILING)) {
4619 unsigned long rip = kvm_rip_read(vcpu);
4620 profile_hit(KVM_PROFILING, (void *)rip);
4624 kvm_lapic_sync_from_vapic(vcpu);
4626 r = kvm_x86_ops->handle_exit(vcpu);
4632 static int __vcpu_run(struct kvm_vcpu *vcpu)
4635 struct kvm *kvm = vcpu->kvm;
4637 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4638 pr_debug("vcpu %d received sipi with vector # %x\n",
4639 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4640 kvm_lapic_reset(vcpu);
4641 r = kvm_arch_vcpu_reset(vcpu);
4644 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4647 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4652 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4653 r = vcpu_enter_guest(vcpu);
4655 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4656 kvm_vcpu_block(vcpu);
4657 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4658 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4660 switch(vcpu->arch.mp_state) {
4661 case KVM_MP_STATE_HALTED:
4662 vcpu->arch.mp_state =
4663 KVM_MP_STATE_RUNNABLE;
4664 case KVM_MP_STATE_RUNNABLE:
4666 case KVM_MP_STATE_SIPI_RECEIVED:
4677 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4678 if (kvm_cpu_has_pending_timer(vcpu))
4679 kvm_inject_pending_timer_irqs(vcpu);
4681 if (dm_request_for_irq_injection(vcpu)) {
4683 vcpu->run->exit_reason = KVM_EXIT_INTR;
4684 ++vcpu->stat.request_irq_exits;
4686 if (signal_pending(current)) {
4688 vcpu->run->exit_reason = KVM_EXIT_INTR;
4689 ++vcpu->stat.signal_exits;
4691 if (need_resched()) {
4692 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4694 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4698 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4705 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4712 if (vcpu->sigset_active)
4713 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4715 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4716 kvm_vcpu_block(vcpu);
4717 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4722 /* re-sync apic's tpr */
4723 if (!irqchip_in_kernel(vcpu->kvm))
4724 kvm_set_cr8(vcpu, kvm_run->cr8);
4726 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4727 vcpu->arch.emulate_ctxt.restart) {
4728 if (vcpu->mmio_needed) {
4729 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4730 vcpu->mmio_read_completed = 1;
4731 vcpu->mmio_needed = 0;
4733 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4734 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4735 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4736 if (r == EMULATE_DO_MMIO) {
4741 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4742 kvm_register_write(vcpu, VCPU_REGS_RAX,
4743 kvm_run->hypercall.ret);
4745 r = __vcpu_run(vcpu);
4748 post_kvm_run_save(vcpu);
4749 if (vcpu->sigset_active)
4750 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4756 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4760 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4761 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4762 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4763 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4764 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4765 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4766 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4767 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4768 #ifdef CONFIG_X86_64
4769 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4770 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4771 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4772 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4773 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4774 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4775 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4776 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4779 regs->rip = kvm_rip_read(vcpu);
4780 regs->rflags = kvm_get_rflags(vcpu);
4787 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4791 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4792 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4793 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4794 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4795 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4796 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4797 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4798 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4799 #ifdef CONFIG_X86_64
4800 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4801 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4802 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4803 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4804 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4805 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4806 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4807 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4810 kvm_rip_write(vcpu, regs->rip);
4811 kvm_set_rflags(vcpu, regs->rflags);
4813 vcpu->arch.exception.pending = false;
4820 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4822 struct kvm_segment cs;
4824 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4828 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4830 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4831 struct kvm_sregs *sregs)
4837 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4838 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4839 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4840 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4841 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4842 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4844 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4845 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4847 kvm_x86_ops->get_idt(vcpu, &dt);
4848 sregs->idt.limit = dt.size;
4849 sregs->idt.base = dt.address;
4850 kvm_x86_ops->get_gdt(vcpu, &dt);
4851 sregs->gdt.limit = dt.size;
4852 sregs->gdt.base = dt.address;
4854 sregs->cr0 = kvm_read_cr0(vcpu);
4855 sregs->cr2 = vcpu->arch.cr2;
4856 sregs->cr3 = vcpu->arch.cr3;
4857 sregs->cr4 = kvm_read_cr4(vcpu);
4858 sregs->cr8 = kvm_get_cr8(vcpu);
4859 sregs->efer = vcpu->arch.efer;
4860 sregs->apic_base = kvm_get_apic_base(vcpu);
4862 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4864 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4865 set_bit(vcpu->arch.interrupt.nr,
4866 (unsigned long *)sregs->interrupt_bitmap);
4873 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4874 struct kvm_mp_state *mp_state)
4877 mp_state->mp_state = vcpu->arch.mp_state;
4882 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4883 struct kvm_mp_state *mp_state)
4886 vcpu->arch.mp_state = mp_state->mp_state;
4891 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4892 bool has_error_code, u32 error_code)
4894 int cs_db, cs_l, ret;
4895 cache_all_regs(vcpu);
4897 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4899 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4900 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4901 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4902 vcpu->arch.emulate_ctxt.mode =
4903 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4904 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4905 ? X86EMUL_MODE_VM86 : cs_l
4906 ? X86EMUL_MODE_PROT64 : cs_db
4907 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4909 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
4910 tss_selector, reason, has_error_code,
4914 return EMULATE_FAIL;
4916 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4917 return EMULATE_DONE;
4919 EXPORT_SYMBOL_GPL(kvm_task_switch);
4921 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4922 struct kvm_sregs *sregs)
4924 int mmu_reset_needed = 0;
4925 int pending_vec, max_bits;
4930 dt.size = sregs->idt.limit;
4931 dt.address = sregs->idt.base;
4932 kvm_x86_ops->set_idt(vcpu, &dt);
4933 dt.size = sregs->gdt.limit;
4934 dt.address = sregs->gdt.base;
4935 kvm_x86_ops->set_gdt(vcpu, &dt);
4937 vcpu->arch.cr2 = sregs->cr2;
4938 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4939 vcpu->arch.cr3 = sregs->cr3;
4941 kvm_set_cr8(vcpu, sregs->cr8);
4943 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
4944 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4945 kvm_set_apic_base(vcpu, sregs->apic_base);
4947 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
4948 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4949 vcpu->arch.cr0 = sregs->cr0;
4951 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4952 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4953 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4954 load_pdptrs(vcpu, vcpu->arch.cr3);
4955 mmu_reset_needed = 1;
4958 if (mmu_reset_needed)
4959 kvm_mmu_reset_context(vcpu);
4961 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4962 pending_vec = find_first_bit(
4963 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4964 if (pending_vec < max_bits) {
4965 kvm_queue_interrupt(vcpu, pending_vec, false);
4966 pr_debug("Set back pending irq %d\n", pending_vec);
4967 if (irqchip_in_kernel(vcpu->kvm))
4968 kvm_pic_clear_isr_ack(vcpu->kvm);
4971 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4972 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4973 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4974 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4975 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4976 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4978 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4979 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4981 update_cr8_intercept(vcpu);
4983 /* Older userspace won't unhalt the vcpu on reset. */
4984 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4985 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4987 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4994 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4995 struct kvm_guest_debug *dbg)
4997 unsigned long rflags;
5002 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5004 if (vcpu->arch.exception.pending)
5006 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5007 kvm_queue_exception(vcpu, DB_VECTOR);
5009 kvm_queue_exception(vcpu, BP_VECTOR);
5013 * Read rflags as long as potentially injected trace flags are still
5016 rflags = kvm_get_rflags(vcpu);
5018 vcpu->guest_debug = dbg->control;
5019 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5020 vcpu->guest_debug = 0;
5022 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5023 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5024 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5025 vcpu->arch.switch_db_regs =
5026 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5028 for (i = 0; i < KVM_NR_DB_REGS; i++)
5029 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5030 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5033 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5034 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5035 get_segment_base(vcpu, VCPU_SREG_CS);
5038 * Trigger an rflags update that will inject or remove the trace
5041 kvm_set_rflags(vcpu, rflags);
5043 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5054 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5055 * we have asm/x86/processor.h
5066 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5067 #ifdef CONFIG_X86_64
5068 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5070 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5075 * Translate a guest virtual address to a guest physical address.
5077 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5078 struct kvm_translation *tr)
5080 unsigned long vaddr = tr->linear_address;
5085 idx = srcu_read_lock(&vcpu->kvm->srcu);
5086 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5087 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5088 tr->physical_address = gpa;
5089 tr->valid = gpa != UNMAPPED_GVA;
5097 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5099 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5103 memcpy(fpu->fpr, fxsave->st_space, 128);
5104 fpu->fcw = fxsave->cwd;
5105 fpu->fsw = fxsave->swd;
5106 fpu->ftwx = fxsave->twd;
5107 fpu->last_opcode = fxsave->fop;
5108 fpu->last_ip = fxsave->rip;
5109 fpu->last_dp = fxsave->rdp;
5110 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5117 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5119 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5123 memcpy(fxsave->st_space, fpu->fpr, 128);
5124 fxsave->cwd = fpu->fcw;
5125 fxsave->swd = fpu->fsw;
5126 fxsave->twd = fpu->ftwx;
5127 fxsave->fop = fpu->last_opcode;
5128 fxsave->rip = fpu->last_ip;
5129 fxsave->rdp = fpu->last_dp;
5130 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5137 void fx_init(struct kvm_vcpu *vcpu)
5139 unsigned after_mxcsr_mask;
5142 * Touch the fpu the first time in non atomic context as if
5143 * this is the first fpu instruction the exception handler
5144 * will fire before the instruction returns and it'll have to
5145 * allocate ram with GFP_KERNEL.
5148 kvm_fx_save(&vcpu->arch.host_fx_image);
5150 /* Initialize guest FPU by resetting ours and saving into guest's */
5152 kvm_fx_save(&vcpu->arch.host_fx_image);
5154 kvm_fx_save(&vcpu->arch.guest_fx_image);
5155 kvm_fx_restore(&vcpu->arch.host_fx_image);
5158 vcpu->arch.cr0 |= X86_CR0_ET;
5159 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5160 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5161 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5162 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5164 EXPORT_SYMBOL_GPL(fx_init);
5166 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5168 if (vcpu->guest_fpu_loaded)
5171 vcpu->guest_fpu_loaded = 1;
5172 kvm_fx_save(&vcpu->arch.host_fx_image);
5173 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5177 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5179 if (!vcpu->guest_fpu_loaded)
5182 vcpu->guest_fpu_loaded = 0;
5183 kvm_fx_save(&vcpu->arch.guest_fx_image);
5184 kvm_fx_restore(&vcpu->arch.host_fx_image);
5185 ++vcpu->stat.fpu_reload;
5186 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5190 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5192 if (vcpu->arch.time_page) {
5193 kvm_release_page_dirty(vcpu->arch.time_page);
5194 vcpu->arch.time_page = NULL;
5197 kvm_x86_ops->vcpu_free(vcpu);
5200 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5203 return kvm_x86_ops->vcpu_create(kvm, id);
5206 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5210 /* We do fxsave: this must be aligned. */
5211 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5213 vcpu->arch.mtrr_state.have_fixed = 1;
5215 r = kvm_arch_vcpu_reset(vcpu);
5217 r = kvm_mmu_setup(vcpu);
5224 kvm_x86_ops->vcpu_free(vcpu);
5228 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5231 kvm_mmu_unload(vcpu);
5234 kvm_x86_ops->vcpu_free(vcpu);
5237 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5239 vcpu->arch.nmi_pending = false;
5240 vcpu->arch.nmi_injected = false;
5242 vcpu->arch.switch_db_regs = 0;
5243 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5244 vcpu->arch.dr6 = DR6_FIXED_1;
5245 vcpu->arch.dr7 = DR7_FIXED_1;
5247 return kvm_x86_ops->vcpu_reset(vcpu);
5250 int kvm_arch_hardware_enable(void *garbage)
5253 * Since this may be called from a hotplug notifcation,
5254 * we can't get the CPU frequency directly.
5256 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5257 int cpu = raw_smp_processor_id();
5258 per_cpu(cpu_tsc_khz, cpu) = 0;
5261 kvm_shared_msr_cpu_online();
5263 return kvm_x86_ops->hardware_enable(garbage);
5266 void kvm_arch_hardware_disable(void *garbage)
5268 kvm_x86_ops->hardware_disable(garbage);
5269 drop_user_return_notifiers(garbage);
5272 int kvm_arch_hardware_setup(void)
5274 return kvm_x86_ops->hardware_setup();
5277 void kvm_arch_hardware_unsetup(void)
5279 kvm_x86_ops->hardware_unsetup();
5282 void kvm_arch_check_processor_compat(void *rtn)
5284 kvm_x86_ops->check_processor_compatibility(rtn);
5287 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5293 BUG_ON(vcpu->kvm == NULL);
5296 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5297 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5298 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5300 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5302 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5307 vcpu->arch.pio_data = page_address(page);
5309 r = kvm_mmu_create(vcpu);
5311 goto fail_free_pio_data;
5313 if (irqchip_in_kernel(kvm)) {
5314 r = kvm_create_lapic(vcpu);
5316 goto fail_mmu_destroy;
5319 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5321 if (!vcpu->arch.mce_banks) {
5323 goto fail_free_lapic;
5325 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5329 kvm_free_lapic(vcpu);
5331 kvm_mmu_destroy(vcpu);
5333 free_page((unsigned long)vcpu->arch.pio_data);
5338 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5342 kfree(vcpu->arch.mce_banks);
5343 kvm_free_lapic(vcpu);
5344 idx = srcu_read_lock(&vcpu->kvm->srcu);
5345 kvm_mmu_destroy(vcpu);
5346 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5347 free_page((unsigned long)vcpu->arch.pio_data);
5350 struct kvm *kvm_arch_create_vm(void)
5352 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5355 return ERR_PTR(-ENOMEM);
5357 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5358 if (!kvm->arch.aliases) {
5360 return ERR_PTR(-ENOMEM);
5363 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5364 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5366 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5367 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5369 rdtscll(kvm->arch.vm_init_tsc);
5374 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5377 kvm_mmu_unload(vcpu);
5381 static void kvm_free_vcpus(struct kvm *kvm)
5384 struct kvm_vcpu *vcpu;
5387 * Unpin any mmu pages first.
5389 kvm_for_each_vcpu(i, vcpu, kvm)
5390 kvm_unload_vcpu_mmu(vcpu);
5391 kvm_for_each_vcpu(i, vcpu, kvm)
5392 kvm_arch_vcpu_free(vcpu);
5394 mutex_lock(&kvm->lock);
5395 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5396 kvm->vcpus[i] = NULL;
5398 atomic_set(&kvm->online_vcpus, 0);
5399 mutex_unlock(&kvm->lock);
5402 void kvm_arch_sync_events(struct kvm *kvm)
5404 kvm_free_all_assigned_devices(kvm);
5407 void kvm_arch_destroy_vm(struct kvm *kvm)
5409 kvm_iommu_unmap_guest(kvm);
5411 kfree(kvm->arch.vpic);
5412 kfree(kvm->arch.vioapic);
5413 kvm_free_vcpus(kvm);
5414 kvm_free_physmem(kvm);
5415 if (kvm->arch.apic_access_page)
5416 put_page(kvm->arch.apic_access_page);
5417 if (kvm->arch.ept_identity_pagetable)
5418 put_page(kvm->arch.ept_identity_pagetable);
5419 cleanup_srcu_struct(&kvm->srcu);
5420 kfree(kvm->arch.aliases);
5424 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5425 struct kvm_memory_slot *memslot,
5426 struct kvm_memory_slot old,
5427 struct kvm_userspace_memory_region *mem,
5430 int npages = memslot->npages;
5432 /*To keep backward compatibility with older userspace,
5433 *x86 needs to hanlde !user_alloc case.
5436 if (npages && !old.rmap) {
5437 unsigned long userspace_addr;
5439 down_write(¤t->mm->mmap_sem);
5440 userspace_addr = do_mmap(NULL, 0,
5442 PROT_READ | PROT_WRITE,
5443 MAP_PRIVATE | MAP_ANONYMOUS,
5445 up_write(¤t->mm->mmap_sem);
5447 if (IS_ERR((void *)userspace_addr))
5448 return PTR_ERR((void *)userspace_addr);
5450 memslot->userspace_addr = userspace_addr;
5458 void kvm_arch_commit_memory_region(struct kvm *kvm,
5459 struct kvm_userspace_memory_region *mem,
5460 struct kvm_memory_slot old,
5464 int npages = mem->memory_size >> PAGE_SHIFT;
5466 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5469 down_write(¤t->mm->mmap_sem);
5470 ret = do_munmap(current->mm, old.userspace_addr,
5471 old.npages * PAGE_SIZE);
5472 up_write(¤t->mm->mmap_sem);
5475 "kvm_vm_ioctl_set_memory_region: "
5476 "failed to munmap memory\n");
5479 spin_lock(&kvm->mmu_lock);
5480 if (!kvm->arch.n_requested_mmu_pages) {
5481 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5482 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5485 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5486 spin_unlock(&kvm->mmu_lock);
5489 void kvm_arch_flush_shadow(struct kvm *kvm)
5491 kvm_mmu_zap_all(kvm);
5492 kvm_reload_remote_mmus(kvm);
5495 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5497 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5498 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5499 || vcpu->arch.nmi_pending ||
5500 (kvm_arch_interrupt_allowed(vcpu) &&
5501 kvm_cpu_has_interrupt(vcpu));
5504 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5507 int cpu = vcpu->cpu;
5509 if (waitqueue_active(&vcpu->wq)) {
5510 wake_up_interruptible(&vcpu->wq);
5511 ++vcpu->stat.halt_wakeup;
5515 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5516 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5517 smp_send_reschedule(cpu);
5521 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5523 return kvm_x86_ops->interrupt_allowed(vcpu);
5526 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5528 unsigned long current_rip = kvm_rip_read(vcpu) +
5529 get_segment_base(vcpu, VCPU_SREG_CS);
5531 return current_rip == linear_rip;
5533 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5535 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5537 unsigned long rflags;
5539 rflags = kvm_x86_ops->get_rflags(vcpu);
5540 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5541 rflags &= ~X86_EFLAGS_TF;
5544 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5546 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5548 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5549 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5550 rflags |= X86_EFLAGS_TF;
5551 kvm_x86_ops->set_rflags(vcpu, rflags);
5553 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5555 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5556 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5557 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5558 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5559 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5560 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5561 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5562 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5563 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5564 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5565 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);