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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <linux/user-return-notifier.h>
  41 #include <linux/srcu.h>
  42 #include <linux/slab.h>
  43 #include <trace/events/kvm.h>
  44
  45 #define CREATE_TRACE_POINTS
  46 #include "trace.h"
  47
  48 #include <asm/debugreg.h>
  49 #include <asm/uaccess.h>
  50 #include <asm/msr.h>
  51 #include <asm/desc.h>
  52 #include <asm/mtrr.h>
  53 #include <asm/mce.h>
  54
  55 #define MAX_IO_MSRS 256
  56 #define CR0_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  58                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  59                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  60 #define CR4_RESERVED_BITS                                               \
  61         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  62                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  63                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  64                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  65
  66 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  67
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 int ignore_msrs = 0;
  92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 #define KVM_NR_SHARED_MSRS 16
  95
  96 struct kvm_shared_msrs_global {
  97         int nr;
  98         u32 msrs[KVM_NR_SHARED_MSRS];
  99 };
 100
 101 struct kvm_shared_msrs {
 102         struct user_return_notifier urn;
 103         bool registered;
 104         struct kvm_shared_msr_values {
 105                 u64 host;
 106                 u64 curr;
 107         } values[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 111 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 112
 113 struct kvm_stats_debugfs_item debugfs_entries[] = {
 114         { "pf_fixed", VCPU_STAT(pf_fixed) },
 115         { "pf_guest", VCPU_STAT(pf_guest) },
 116         { "tlb_flush", VCPU_STAT(tlb_flush) },
 117         { "invlpg", VCPU_STAT(invlpg) },
 118         { "exits", VCPU_STAT(exits) },
 119         { "io_exits", VCPU_STAT(io_exits) },
 120         { "mmio_exits", VCPU_STAT(mmio_exits) },
 121         { "signal_exits", VCPU_STAT(signal_exits) },
 122         { "irq_window", VCPU_STAT(irq_window_exits) },
 123         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 124         { "halt_exits", VCPU_STAT(halt_exits) },
 125         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 126         { "hypercalls", VCPU_STAT(hypercalls) },
 127         { "request_irq", VCPU_STAT(request_irq_exits) },
 128         { "irq_exits", VCPU_STAT(irq_exits) },
 129         { "host_state_reload", VCPU_STAT(host_state_reload) },
 130         { "efer_reload", VCPU_STAT(efer_reload) },
 131         { "fpu_reload", VCPU_STAT(fpu_reload) },
 132         { "insn_emulation", VCPU_STAT(insn_emulation) },
 133         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 134         { "irq_injections", VCPU_STAT(irq_injections) },
 135         { "nmi_injections", VCPU_STAT(nmi_injections) },
 136         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 137         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 138         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 139         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 140         { "mmu_flooded", VM_STAT(mmu_flooded) },
 141         { "mmu_recycled", VM_STAT(mmu_recycled) },
 142         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 143         { "mmu_unsync", VM_STAT(mmu_unsync) },
 144         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 145         { "largepages", VM_STAT(lpages) },
 146         { NULL }
 147 };
 148
 149 static void kvm_on_user_return(struct user_return_notifier *urn)
 150 {
 151         unsigned slot;
 152         struct kvm_shared_msrs *locals
 153                 = container_of(urn, struct kvm_shared_msrs, urn);
 154         struct kvm_shared_msr_values *values;
 155
 156         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 157                 values = &locals->values[slot];
 158                 if (values->host != values->curr) {
 159                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 160                         values->curr = values->host;
 161                 }
 162         }
 163         locals->registered = false;
 164         user_return_notifier_unregister(urn);
 165 }
 166
 167 static void shared_msr_update(unsigned slot, u32 msr)
 168 {
 169         struct kvm_shared_msrs *smsr;
 170         u64 value;
 171
 172         smsr = &__get_cpu_var(shared_msrs);
 173         /* only read, and nobody should modify it at this time,
 174          * so don't need lock */
 175         if (slot >= shared_msrs_global.nr) {
 176                 printk(KERN_ERR "kvm: invalid MSR slot!");
 177                 return;
 178         }
 179         rdmsrl_safe(msr, &value);
 180         smsr->values[slot].host = value;
 181         smsr->values[slot].curr = value;
 182 }
 183
 184 void kvm_define_shared_msr(unsigned slot, u32 msr)
 185 {
 186         if (slot >= shared_msrs_global.nr)
 187                 shared_msrs_global.nr = slot + 1;
 188         shared_msrs_global.msrs[slot] = msr;
 189         /* we need ensured the shared_msr_global have been updated */
 190         smp_wmb();
 191 }
 192 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 193
 194 static void kvm_shared_msr_cpu_online(void)
 195 {
 196         unsigned i;
 197
 198         for (i = 0; i < shared_msrs_global.nr; ++i)
 199                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 200 }
 201
 202 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 203 {
 204         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 205
 206         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 207                 return;
 208         smsr->values[slot].curr = value;
 209         wrmsrl(shared_msrs_global.msrs[slot], value);
 210         if (!smsr->registered) {
 211                 smsr->urn.on_user_return = kvm_on_user_return;
 212                 user_return_notifier_register(&smsr->urn);
 213                 smsr->registered = true;
 214         }
 215 }
 216 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 217
 218 static void drop_user_return_notifiers(void *ignore)
 219 {
 220         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 221
 222         if (smsr->registered)
 223                 kvm_on_user_return(&smsr->urn);
 224 }
 225
 226 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 227 {
 228         if (irqchip_in_kernel(vcpu->kvm))
 229                 return vcpu->arch.apic_base;
 230         else
 231                 return vcpu->arch.apic_base;
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 234
 235 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 236 {
 237         /* TODO: reserve bits check */
 238         if (irqchip_in_kernel(vcpu->kvm))
 239                 kvm_lapic_set_base(vcpu, data);
 240         else
 241                 vcpu->arch.apic_base = data;
 242 }
 243 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 244
 245 #define EXCPT_BENIGN            0
 246 #define EXCPT_CONTRIBUTORY      1
 247 #define EXCPT_PF                2
 248
 249 static int exception_class(int vector)
 250 {
 251         switch (vector) {
 252         case PF_VECTOR:
 253                 return EXCPT_PF;
 254         case DE_VECTOR:
 255         case TS_VECTOR:
 256         case NP_VECTOR:
 257         case SS_VECTOR:
 258         case GP_VECTOR:
 259                 return EXCPT_CONTRIBUTORY;
 260         default:
 261                 break;
 262         }
 263         return EXCPT_BENIGN;
 264 }
 265
 266 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 267                 unsigned nr, bool has_error, u32 error_code)
 268 {
 269         u32 prev_nr;
 270         int class1, class2;
 271
 272         if (!vcpu->arch.exception.pending) {
 273         queue:
 274                 vcpu->arch.exception.pending = true;
 275                 vcpu->arch.exception.has_error_code = has_error;
 276                 vcpu->arch.exception.nr = nr;
 277                 vcpu->arch.exception.error_code = error_code;
 278                 return;
 279         }
 280
 281         /* to check exception */
 282         prev_nr = vcpu->arch.exception.nr;
 283         if (prev_nr == DF_VECTOR) {
 284                 /* triple fault -> shutdown */
 285                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 286                 return;
 287         }
 288         class1 = exception_class(prev_nr);
 289         class2 = exception_class(nr);
 290         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 291                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 292                 /* generate double fault per SDM Table 5-5 */
 293                 vcpu->arch.exception.pending = true;
 294                 vcpu->arch.exception.has_error_code = true;
 295                 vcpu->arch.exception.nr = DF_VECTOR;
 296                 vcpu->arch.exception.error_code = 0;
 297         } else
 298                 /* replace previous exception with a new one in a hope
 299                    that instruction re-execution will regenerate lost
 300                    exception */
 301                 goto queue;
 302 }
 303
 304 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 305 {
 306         kvm_multiple_exception(vcpu, nr, false, 0);
 307 }
 308 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 309
 310 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 311                            u32 error_code)
 312 {
 313         ++vcpu->stat.pf_guest;
 314         vcpu->arch.cr2 = addr;
 315         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 316 }
 317
 318 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 319 {
 320         vcpu->arch.nmi_pending = 1;
 321 }
 322 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 323
 324 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 325 {
 326         kvm_multiple_exception(vcpu, nr, true, error_code);
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 329
 330 /*
 331  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 332  * a #GP and return false.
 333  */
 334 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 335 {
 336         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 337                 return true;
 338         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 339         return false;
 340 }
 341 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 342
 343 /*
 344  * Load the pae pdptrs.  Return true is they are all valid.
 345  */
 346 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 347 {
 348         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 349         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 350         int i;
 351         int ret;
 352         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 353
 354         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 355                                   offset * sizeof(u64), sizeof(pdpte));
 356         if (ret < 0) {
 357                 ret = 0;
 358                 goto out;
 359         }
 360         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 361                 if (is_present_gpte(pdpte[i]) &&
 362                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 363                         ret = 0;
 364                         goto out;
 365                 }
 366         }
 367         ret = 1;
 368
 369         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 370         __set_bit(VCPU_EXREG_PDPTR,
 371                   (unsigned long *)&vcpu->arch.regs_avail);
 372         __set_bit(VCPU_EXREG_PDPTR,
 373                   (unsigned long *)&vcpu->arch.regs_dirty);
 374 out:
 375
 376         return ret;
 377 }
 378 EXPORT_SYMBOL_GPL(load_pdptrs);
 379
 380 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 381 {
 382         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 383         bool changed = true;
 384         int r;
 385
 386         if (is_long_mode(vcpu) || !is_pae(vcpu))
 387                 return false;
 388
 389         if (!test_bit(VCPU_EXREG_PDPTR,
 390                       (unsigned long *)&vcpu->arch.regs_avail))
 391                 return true;
 392
 393         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 394         if (r < 0)
 395                 goto out;
 396         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 397 out:
 398
 399         return changed;
 400 }
 401
 402 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 403 {
 404         cr0 |= X86_CR0_ET;
 405
 406 #ifdef CONFIG_X86_64
 407         if (cr0 & 0xffffffff00000000UL) {
 408                 kvm_inject_gp(vcpu, 0);
 409                 return;
 410         }
 411 #endif
 412
 413         cr0 &= ~CR0_RESERVED_BITS;
 414
 415         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 416                 kvm_inject_gp(vcpu, 0);
 417                 return;
 418         }
 419
 420         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 421                 kvm_inject_gp(vcpu, 0);
 422                 return;
 423         }
 424
 425         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 426 #ifdef CONFIG_X86_64
 427                 if ((vcpu->arch.efer & EFER_LME)) {
 428                         int cs_db, cs_l;
 429
 430                         if (!is_pae(vcpu)) {
 431                                 kvm_inject_gp(vcpu, 0);
 432                                 return;
 433                         }
 434                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 435                         if (cs_l) {
 436                                 kvm_inject_gp(vcpu, 0);
 437                                 return;
 438
 439                         }
 440                 } else
 441 #endif
 442                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 443                         kvm_inject_gp(vcpu, 0);
 444                         return;
 445                 }
 446
 447         }
 448
 449         kvm_x86_ops->set_cr0(vcpu, cr0);
 450
 451         kvm_mmu_reset_context(vcpu);
 452         return;
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 455
 456 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 457 {
 458         kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
 459 }
 460 EXPORT_SYMBOL_GPL(kvm_lmsw);
 461
 462 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 463 {
 464         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 465         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 466
 467         if (cr4 & CR4_RESERVED_BITS) {
 468                 kvm_inject_gp(vcpu, 0);
 469                 return;
 470         }
 471
 472         if (is_long_mode(vcpu)) {
 473                 if (!(cr4 & X86_CR4_PAE)) {
 474                         kvm_inject_gp(vcpu, 0);
 475                         return;
 476                 }
 477         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 478                    && ((cr4 ^ old_cr4) & pdptr_bits)
 479                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 480                 kvm_inject_gp(vcpu, 0);
 481                 return;
 482         }
 483
 484         if (cr4 & X86_CR4_VMXE) {
 485                 kvm_inject_gp(vcpu, 0);
 486                 return;
 487         }
 488         kvm_x86_ops->set_cr4(vcpu, cr4);
 489         vcpu->arch.cr4 = cr4;
 490         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 491         kvm_mmu_reset_context(vcpu);
 492 }
 493 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 494
 495 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 496 {
 497         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 498                 kvm_mmu_sync_roots(vcpu);
 499                 kvm_mmu_flush_tlb(vcpu);
 500                 return;
 501         }
 502
 503         if (is_long_mode(vcpu)) {
 504                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 505                         kvm_inject_gp(vcpu, 0);
 506                         return;
 507                 }
 508         } else {
 509                 if (is_pae(vcpu)) {
 510                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 511                                 kvm_inject_gp(vcpu, 0);
 512                                 return;
 513                         }
 514                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 515                                 kvm_inject_gp(vcpu, 0);
 516                                 return;
 517                         }
 518                 }
 519                 /*
 520                  * We don't check reserved bits in nonpae mode, because
 521                  * this isn't enforced, and VMware depends on this.
 522                  */
 523         }
 524
 525         /*
 526          * Does the new cr3 value map to physical memory? (Note, we
 527          * catch an invalid cr3 even in real-mode, because it would
 528          * cause trouble later on when we turn on paging anyway.)
 529          *
 530          * A real CPU would silently accept an invalid cr3 and would
 531          * attempt to use it - with largely undefined (and often hard
 532          * to debug) behavior on the guest side.
 533          */
 534         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 535                 kvm_inject_gp(vcpu, 0);
 536         else {
 537                 vcpu->arch.cr3 = cr3;
 538                 vcpu->arch.mmu.new_cr3(vcpu);
 539         }
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 542
 543 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 544 {
 545         if (cr8 & CR8_RESERVED_BITS) {
 546                 kvm_inject_gp(vcpu, 0);
 547                 return;
 548         }
 549         if (irqchip_in_kernel(vcpu->kvm))
 550                 kvm_lapic_set_tpr(vcpu, cr8);
 551         else
 552                 vcpu->arch.cr8 = cr8;
 553 }
 554 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 555
 556 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 557 {
 558         if (irqchip_in_kernel(vcpu->kvm))
 559                 return kvm_lapic_get_cr8(vcpu);
 560         else
 561                 return vcpu->arch.cr8;
 562 }
 563 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 564
 565 static inline u32 bit(int bitno)
 566 {
 567         return 1 << (bitno & 31);
 568 }
 569
 570 /*
 571  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 572  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 573  *
 574  * This list is modified at module load time to reflect the
 575  * capabilities of the host cpu. This capabilities test skips MSRs that are
 576  * kvm-specific. Those are put in the beginning of the list.
 577  */
 578
 579 #define KVM_SAVE_MSRS_BEGIN     5
 580 static u32 msrs_to_save[] = {
 581         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 582         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 583         HV_X64_MSR_APIC_ASSIST_PAGE,
 584         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 585         MSR_K6_STAR,
 586 #ifdef CONFIG_X86_64
 587         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 588 #endif
 589         MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 590 };
 591
 592 static unsigned num_msrs_to_save;
 593
 594 static u32 emulated_msrs[] = {
 595         MSR_IA32_MISC_ENABLE,
 596 };
 597
 598 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 599 {
 600         if (efer & efer_reserved_bits) {
 601                 kvm_inject_gp(vcpu, 0);
 602                 return;
 603         }
 604
 605         if (is_paging(vcpu)
 606             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
 607                 kvm_inject_gp(vcpu, 0);
 608                 return;
 609         }
 610
 611         if (efer & EFER_FFXSR) {
 612                 struct kvm_cpuid_entry2 *feat;
 613
 614                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 615                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 616                         kvm_inject_gp(vcpu, 0);
 617                         return;
 618                 }
 619         }
 620
 621         if (efer & EFER_SVME) {
 622                 struct kvm_cpuid_entry2 *feat;
 623
 624                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 625                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 626                         kvm_inject_gp(vcpu, 0);
 627                         return;
 628                 }
 629         }
 630
 631         kvm_x86_ops->set_efer(vcpu, efer);
 632
 633         efer &= ~EFER_LMA;
 634         efer |= vcpu->arch.efer & EFER_LMA;
 635
 636         vcpu->arch.efer = efer;
 637
 638         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 639         kvm_mmu_reset_context(vcpu);
 640 }
 641
 642 void kvm_enable_efer_bits(u64 mask)
 643 {
 644        efer_reserved_bits &= ~mask;
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 647
 648
 649 /*
 650  * Writes msr value into into the appropriate "register".
 651  * Returns 0 on success, non-0 otherwise.
 652  * Assumes vcpu_load() was already called.
 653  */
 654 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 655 {
 656         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 657 }
 658
 659 /*
 660  * Adapt set_msr() to msr_io()'s calling convention
 661  */
 662 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 663 {
 664         return kvm_set_msr(vcpu, index, *data);
 665 }
 666
 667 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 668 {
 669         static int version;
 670         struct pvclock_wall_clock wc;
 671         struct timespec boot;
 672
 673         if (!wall_clock)
 674                 return;
 675
 676         version++;
 677
 678         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 679
 680         /*
 681          * The guest calculates current wall clock time by adding
 682          * system time (updated by kvm_write_guest_time below) to the
 683          * wall clock specified here.  guest system time equals host
 684          * system time for us, thus we must fill in host boot time here.
 685          */
 686         getboottime(&boot);
 687
 688         wc.sec = boot.tv_sec;
 689         wc.nsec = boot.tv_nsec;
 690         wc.version = version;
 691
 692         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 693
 694         version++;
 695         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 696 }
 697
 698 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 699 {
 700         uint32_t quotient, remainder;
 701
 702         /* Don't try to replace with do_div(), this one calculates
 703          * "(dividend << 32) / divisor" */
 704         __asm__ ( "divl %4"
 705                   : "=a" (quotient), "=d" (remainder)
 706                   : "0" (0), "1" (dividend), "r" (divisor) );
 707         return quotient;
 708 }
 709
 710 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 711 {
 712         uint64_t nsecs = 1000000000LL;
 713         int32_t  shift = 0;
 714         uint64_t tps64;
 715         uint32_t tps32;
 716
 717         tps64 = tsc_khz * 1000LL;
 718         while (tps64 > nsecs*2) {
 719                 tps64 >>= 1;
 720                 shift--;
 721         }
 722
 723         tps32 = (uint32_t)tps64;
 724         while (tps32 <= (uint32_t)nsecs) {
 725                 tps32 <<= 1;
 726                 shift++;
 727         }
 728
 729         hv_clock->tsc_shift = shift;
 730         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 731
 732         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 733                  __func__, tsc_khz, hv_clock->tsc_shift,
 734                  hv_clock->tsc_to_system_mul);
 735 }
 736
 737 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 738
 739 static void kvm_write_guest_time(struct kvm_vcpu *v)
 740 {
 741         struct timespec ts;
 742         unsigned long flags;
 743         struct kvm_vcpu_arch *vcpu = &v->arch;
 744         void *shared_kaddr;
 745         unsigned long this_tsc_khz;
 746
 747         if ((!vcpu->time_page))
 748                 return;
 749
 750         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 751         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 752                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 753                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 754         }
 755         put_cpu_var(cpu_tsc_khz);
 756
 757         /* Keep irq disabled to prevent changes to the clock */
 758         local_irq_save(flags);
 759         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 760         ktime_get_ts(&ts);
 761         monotonic_to_bootbased(&ts);
 762         local_irq_restore(flags);
 763
 764         /* With all the info we got, fill in the values */
 765
 766         vcpu->hv_clock.system_time = ts.tv_nsec +
 767                                      (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
 768
 769         /*
 770          * The interface expects us to write an even number signaling that the
 771          * update is finished. Since the guest won't see the intermediate
 772          * state, we just increase by 2 at the end.
 773          */
 774         vcpu->hv_clock.version += 2;
 775
 776         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 777
 778         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 779                sizeof(vcpu->hv_clock));
 780
 781         kunmap_atomic(shared_kaddr, KM_USER0);
 782
 783         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 784 }
 785
 786 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 787 {
 788         struct kvm_vcpu_arch *vcpu = &v->arch;
 789
 790         if (!vcpu->time_page)
 791                 return 0;
 792         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 793         return 1;
 794 }
 795
 796 static bool msr_mtrr_valid(unsigned msr)
 797 {
 798         switch (msr) {
 799         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 800         case MSR_MTRRfix64K_00000:
 801         case MSR_MTRRfix16K_80000:
 802         case MSR_MTRRfix16K_A0000:
 803         case MSR_MTRRfix4K_C0000:
 804         case MSR_MTRRfix4K_C8000:
 805         case MSR_MTRRfix4K_D0000:
 806         case MSR_MTRRfix4K_D8000:
 807         case MSR_MTRRfix4K_E0000:
 808         case MSR_MTRRfix4K_E8000:
 809         case MSR_MTRRfix4K_F0000:
 810         case MSR_MTRRfix4K_F8000:
 811         case MSR_MTRRdefType:
 812         case MSR_IA32_CR_PAT:
 813                 return true;
 814         case 0x2f8:
 815                 return true;
 816         }
 817         return false;
 818 }
 819
 820 static bool valid_pat_type(unsigned t)
 821 {
 822         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 823 }
 824
 825 static bool valid_mtrr_type(unsigned t)
 826 {
 827         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 828 }
 829
 830 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 831 {
 832         int i;
 833
 834         if (!msr_mtrr_valid(msr))
 835                 return false;
 836
 837         if (msr == MSR_IA32_CR_PAT) {
 838                 for (i = 0; i < 8; i++)
 839                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 840                                 return false;
 841                 return true;
 842         } else if (msr == MSR_MTRRdefType) {
 843                 if (data & ~0xcff)
 844                         return false;
 845                 return valid_mtrr_type(data & 0xff);
 846         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 847                 for (i = 0; i < 8 ; i++)
 848                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 849                                 return false;
 850                 return true;
 851         }
 852
 853         /* variable MTRRs */
 854         return valid_mtrr_type(data & 0xff);
 855 }
 856
 857 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 858 {
 859         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 860
 861         if (!mtrr_valid(vcpu, msr, data))
 862                 return 1;
 863
 864         if (msr == MSR_MTRRdefType) {
 865                 vcpu->arch.mtrr_state.def_type = data;
 866                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 867         } else if (msr == MSR_MTRRfix64K_00000)
 868                 p[0] = data;
 869         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 870                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 871         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 872                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 873         else if (msr == MSR_IA32_CR_PAT)
 874                 vcpu->arch.pat = data;
 875         else {  /* Variable MTRRs */
 876                 int idx, is_mtrr_mask;
 877                 u64 *pt;
 878
 879                 idx = (msr - 0x200) / 2;
 880                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 881                 if (!is_mtrr_mask)
 882                         pt =
 883                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 884                 else
 885                         pt =
 886                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 887                 *pt = data;
 888         }
 889
 890         kvm_mmu_reset_context(vcpu);
 891         return 0;
 892 }
 893
 894 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 895 {
 896         u64 mcg_cap = vcpu->arch.mcg_cap;
 897         unsigned bank_num = mcg_cap & 0xff;
 898
 899         switch (msr) {
 900         case MSR_IA32_MCG_STATUS:
 901                 vcpu->arch.mcg_status = data;
 902                 break;
 903         case MSR_IA32_MCG_CTL:
 904                 if (!(mcg_cap & MCG_CTL_P))
 905                         return 1;
 906                 if (data != 0 && data != ~(u64)0)
 907                         return -1;
 908                 vcpu->arch.mcg_ctl = data;
 909                 break;
 910         default:
 911                 if (msr >= MSR_IA32_MC0_CTL &&
 912                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 913                         u32 offset = msr - MSR_IA32_MC0_CTL;
 914                         /* only 0 or all 1s can be written to IA32_MCi_CTL
 915                          * some Linux kernels though clear bit 10 in bank 4 to
 916                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
 917                          * this to avoid an uncatched #GP in the guest
 918                          */
 919                         if ((offset & 0x3) == 0 &&
 920                             data != 0 && (data | (1 << 10)) != ~(u64)0)
 921                                 return -1;
 922                         vcpu->arch.mce_banks[offset] = data;
 923                         break;
 924                 }
 925                 return 1;
 926         }
 927         return 0;
 928 }
 929
 930 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
 931 {
 932         struct kvm *kvm = vcpu->kvm;
 933         int lm = is_long_mode(vcpu);
 934         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
 935                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
 936         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
 937                 : kvm->arch.xen_hvm_config.blob_size_32;
 938         u32 page_num = data & ~PAGE_MASK;
 939         u64 page_addr = data & PAGE_MASK;
 940         u8 *page;
 941         int r;
 942
 943         r = -E2BIG;
 944         if (page_num >= blob_size)
 945                 goto out;
 946         r = -ENOMEM;
 947         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
 948         if (!page)
 949                 goto out;
 950         r = -EFAULT;
 951         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
 952                 goto out_free;
 953         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
 954                 goto out_free;
 955         r = 0;
 956 out_free:
 957         kfree(page);
 958 out:
 959         return r;
 960 }
 961
 962 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
 963 {
 964         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
 965 }
 966
 967 static bool kvm_hv_msr_partition_wide(u32 msr)
 968 {
 969         bool r = false;
 970         switch (msr) {
 971         case HV_X64_MSR_GUEST_OS_ID:
 972         case HV_X64_MSR_HYPERCALL:
 973                 r = true;
 974                 break;
 975         }
 976
 977         return r;
 978 }
 979
 980 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 981 {
 982         struct kvm *kvm = vcpu->kvm;
 983
 984         switch (msr) {
 985         case HV_X64_MSR_GUEST_OS_ID:
 986                 kvm->arch.hv_guest_os_id = data;
 987                 /* setting guest os id to zero disables hypercall page */
 988                 if (!kvm->arch.hv_guest_os_id)
 989                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
 990                 break;
 991         case HV_X64_MSR_HYPERCALL: {
 992                 u64 gfn;
 993                 unsigned long addr;
 994                 u8 instructions[4];
 995
 996                 /* if guest os id is not set hypercall should remain disabled */
 997                 if (!kvm->arch.hv_guest_os_id)
 998                         break;
 999                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1000                         kvm->arch.hv_hypercall = data;
1001                         break;
1002                 }
1003                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1004                 addr = gfn_to_hva(kvm, gfn);
1005                 if (kvm_is_error_hva(addr))
1006                         return 1;
1007                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1008                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1009                 if (copy_to_user((void __user *)addr, instructions, 4))
1010                         return 1;
1011                 kvm->arch.hv_hypercall = data;
1012                 break;
1013         }
1014         default:
1015                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1016                           "data 0x%llx\n", msr, data);
1017                 return 1;
1018         }
1019         return 0;
1020 }
1021
1022 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1023 {
1024         switch (msr) {
1025         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1026                 unsigned long addr;
1027
1028                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1029                         vcpu->arch.hv_vapic = data;
1030                         break;
1031                 }
1032                 addr = gfn_to_hva(vcpu->kvm, data >>
1033                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1034                 if (kvm_is_error_hva(addr))
1035                         return 1;
1036                 if (clear_user((void __user *)addr, PAGE_SIZE))
1037                         return 1;
1038                 vcpu->arch.hv_vapic = data;
1039                 break;
1040         }
1041         case HV_X64_MSR_EOI:
1042                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1043         case HV_X64_MSR_ICR:
1044                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1045         case HV_X64_MSR_TPR:
1046                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1047         default:
1048                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1049                           "data 0x%llx\n", msr, data);
1050                 return 1;
1051         }
1052
1053         return 0;
1054 }
1055
1056 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1057 {
1058         switch (msr) {
1059         case MSR_EFER:
1060                 set_efer(vcpu, data);
1061                 break;
1062         case MSR_K7_HWCR:
1063                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1064                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1065                 if (data != 0) {
1066                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1067                                 data);
1068                         return 1;
1069                 }
1070                 break;
1071         case MSR_FAM10H_MMIO_CONF_BASE:
1072                 if (data != 0) {
1073                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1074                                 "0x%llx\n", data);
1075                         return 1;
1076                 }
1077                 break;
1078         case MSR_AMD64_NB_CFG:
1079                 break;
1080         case MSR_IA32_DEBUGCTLMSR:
1081                 if (!data) {
1082                         /* We support the non-activated case already */
1083                         break;
1084                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1085                         /* Values other than LBR and BTF are vendor-specific,
1086                            thus reserved and should throw a #GP */
1087                         return 1;
1088                 }
1089                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1090                         __func__, data);
1091                 break;
1092         case MSR_IA32_UCODE_REV:
1093         case MSR_IA32_UCODE_WRITE:
1094         case MSR_VM_HSAVE_PA:
1095         case MSR_AMD64_PATCH_LOADER:
1096                 break;
1097         case 0x200 ... 0x2ff:
1098                 return set_msr_mtrr(vcpu, msr, data);
1099         case MSR_IA32_APICBASE:
1100                 kvm_set_apic_base(vcpu, data);
1101                 break;
1102         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1103                 return kvm_x2apic_msr_write(vcpu, msr, data);
1104         case MSR_IA32_MISC_ENABLE:
1105                 vcpu->arch.ia32_misc_enable_msr = data;
1106                 break;
1107         case MSR_KVM_WALL_CLOCK:
1108                 vcpu->kvm->arch.wall_clock = data;
1109                 kvm_write_wall_clock(vcpu->kvm, data);
1110                 break;
1111         case MSR_KVM_SYSTEM_TIME: {
1112                 if (vcpu->arch.time_page) {
1113                         kvm_release_page_dirty(vcpu->arch.time_page);
1114                         vcpu->arch.time_page = NULL;
1115                 }
1116
1117                 vcpu->arch.time = data;
1118
1119                 /* we verify if the enable bit is set... */
1120                 if (!(data & 1))
1121                         break;
1122
1123                 /* ...but clean it before doing the actual write */
1124                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1125
1126                 vcpu->arch.time_page =
1127                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1128
1129                 if (is_error_page(vcpu->arch.time_page)) {
1130                         kvm_release_page_clean(vcpu->arch.time_page);
1131                         vcpu->arch.time_page = NULL;
1132                 }
1133
1134                 kvm_request_guest_time_update(vcpu);
1135                 break;
1136         }
1137         case MSR_IA32_MCG_CTL:
1138         case MSR_IA32_MCG_STATUS:
1139         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1140                 return set_msr_mce(vcpu, msr, data);
1141
1142         /* Performance counters are not protected by a CPUID bit,
1143          * so we should check all of them in the generic path for the sake of
1144          * cross vendor migration.
1145          * Writing a zero into the event select MSRs disables them,
1146          * which we perfectly emulate ;-). Any other value should be at least
1147          * reported, some guests depend on them.
1148          */
1149         case MSR_P6_EVNTSEL0:
1150         case MSR_P6_EVNTSEL1:
1151         case MSR_K7_EVNTSEL0:
1152         case MSR_K7_EVNTSEL1:
1153         case MSR_K7_EVNTSEL2:
1154         case MSR_K7_EVNTSEL3:
1155                 if (data != 0)
1156                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1157                                 "0x%x data 0x%llx\n", msr, data);
1158                 break;
1159         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1160          * so we ignore writes to make it happy.
1161          */
1162         case MSR_P6_PERFCTR0:
1163         case MSR_P6_PERFCTR1:
1164         case MSR_K7_PERFCTR0:
1165         case MSR_K7_PERFCTR1:
1166         case MSR_K7_PERFCTR2:
1167         case MSR_K7_PERFCTR3:
1168                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1169                         "0x%x data 0x%llx\n", msr, data);
1170                 break;
1171         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1172                 if (kvm_hv_msr_partition_wide(msr)) {
1173                         int r;
1174                         mutex_lock(&vcpu->kvm->lock);
1175                         r = set_msr_hyperv_pw(vcpu, msr, data);
1176                         mutex_unlock(&vcpu->kvm->lock);
1177                         return r;
1178                 } else
1179                         return set_msr_hyperv(vcpu, msr, data);
1180                 break;
1181         default:
1182                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1183                         return xen_hvm_config(vcpu, data);
1184                 if (!ignore_msrs) {
1185                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1186                                 msr, data);
1187                         return 1;
1188                 } else {
1189                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1190                                 msr, data);
1191                         break;
1192                 }
1193         }
1194         return 0;
1195 }
1196 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1197
1198
1199 /*
1200  * Reads an msr value (of 'msr_index') into 'pdata'.
1201  * Returns 0 on success, non-0 otherwise.
1202  * Assumes vcpu_load() was already called.
1203  */
1204 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1205 {
1206         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1207 }
1208
1209 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1210 {
1211         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1212
1213         if (!msr_mtrr_valid(msr))
1214                 return 1;
1215
1216         if (msr == MSR_MTRRdefType)
1217                 *pdata = vcpu->arch.mtrr_state.def_type +
1218                          (vcpu->arch.mtrr_state.enabled << 10);
1219         else if (msr == MSR_MTRRfix64K_00000)
1220                 *pdata = p[0];
1221         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1222                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1223         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1224                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1225         else if (msr == MSR_IA32_CR_PAT)
1226                 *pdata = vcpu->arch.pat;
1227         else {  /* Variable MTRRs */
1228                 int idx, is_mtrr_mask;
1229                 u64 *pt;
1230
1231                 idx = (msr - 0x200) / 2;
1232                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1233                 if (!is_mtrr_mask)
1234                         pt =
1235                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1236                 else
1237                         pt =
1238                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1239                 *pdata = *pt;
1240         }
1241
1242         return 0;
1243 }
1244
1245 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1246 {
1247         u64 data;
1248         u64 mcg_cap = vcpu->arch.mcg_cap;
1249         unsigned bank_num = mcg_cap & 0xff;
1250
1251         switch (msr) {
1252         case MSR_IA32_P5_MC_ADDR:
1253         case MSR_IA32_P5_MC_TYPE:
1254                 data = 0;
1255                 break;
1256         case MSR_IA32_MCG_CAP:
1257                 data = vcpu->arch.mcg_cap;
1258                 break;
1259         case MSR_IA32_MCG_CTL:
1260                 if (!(mcg_cap & MCG_CTL_P))
1261                         return 1;
1262                 data = vcpu->arch.mcg_ctl;
1263                 break;
1264         case MSR_IA32_MCG_STATUS:
1265                 data = vcpu->arch.mcg_status;
1266                 break;
1267         default:
1268                 if (msr >= MSR_IA32_MC0_CTL &&
1269                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1270                         u32 offset = msr - MSR_IA32_MC0_CTL;
1271                         data = vcpu->arch.mce_banks[offset];
1272                         break;
1273                 }
1274                 return 1;
1275         }
1276         *pdata = data;
1277         return 0;
1278 }
1279
1280 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1281 {
1282         u64 data = 0;
1283         struct kvm *kvm = vcpu->kvm;
1284
1285         switch (msr) {
1286         case HV_X64_MSR_GUEST_OS_ID:
1287                 data = kvm->arch.hv_guest_os_id;
1288                 break;
1289         case HV_X64_MSR_HYPERCALL:
1290                 data = kvm->arch.hv_hypercall;
1291                 break;
1292         default:
1293                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1294                 return 1;
1295         }
1296
1297         *pdata = data;
1298         return 0;
1299 }
1300
1301 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1302 {
1303         u64 data = 0;
1304
1305         switch (msr) {
1306         case HV_X64_MSR_VP_INDEX: {
1307                 int r;
1308                 struct kvm_vcpu *v;
1309                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1310                         if (v == vcpu)
1311                                 data = r;
1312                 break;
1313         }
1314         case HV_X64_MSR_EOI:
1315                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1316         case HV_X64_MSR_ICR:
1317                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1318         case HV_X64_MSR_TPR:
1319                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1320         default:
1321                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1322                 return 1;
1323         }
1324         *pdata = data;
1325         return 0;
1326 }
1327
1328 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1329 {
1330         u64 data;
1331
1332         switch (msr) {
1333         case MSR_IA32_PLATFORM_ID:
1334         case MSR_IA32_UCODE_REV:
1335         case MSR_IA32_EBL_CR_POWERON:
1336         case MSR_IA32_DEBUGCTLMSR:
1337         case MSR_IA32_LASTBRANCHFROMIP:
1338         case MSR_IA32_LASTBRANCHTOIP:
1339         case MSR_IA32_LASTINTFROMIP:
1340         case MSR_IA32_LASTINTTOIP:
1341         case MSR_K8_SYSCFG:
1342         case MSR_K7_HWCR:
1343         case MSR_VM_HSAVE_PA:
1344         case MSR_P6_PERFCTR0:
1345         case MSR_P6_PERFCTR1:
1346         case MSR_P6_EVNTSEL0:
1347         case MSR_P6_EVNTSEL1:
1348         case MSR_K7_EVNTSEL0:
1349         case MSR_K7_PERFCTR0:
1350         case MSR_K8_INT_PENDING_MSG:
1351         case MSR_AMD64_NB_CFG:
1352         case MSR_FAM10H_MMIO_CONF_BASE:
1353                 data = 0;
1354                 break;
1355         case MSR_MTRRcap:
1356                 data = 0x500 | KVM_NR_VAR_MTRR;
1357                 break;
1358         case 0x200 ... 0x2ff:
1359                 return get_msr_mtrr(vcpu, msr, pdata);
1360         case 0xcd: /* fsb frequency */
1361                 data = 3;
1362                 break;
1363         case MSR_IA32_APICBASE:
1364                 data = kvm_get_apic_base(vcpu);
1365                 break;
1366         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1367                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1368                 break;
1369         case MSR_IA32_MISC_ENABLE:
1370                 data = vcpu->arch.ia32_misc_enable_msr;
1371                 break;
1372         case MSR_IA32_PERF_STATUS:
1373                 /* TSC increment by tick */
1374                 data = 1000ULL;
1375                 /* CPU multiplier */
1376                 data |= (((uint64_t)4ULL) << 40);
1377                 break;
1378         case MSR_EFER:
1379                 data = vcpu->arch.efer;
1380                 break;
1381         case MSR_KVM_WALL_CLOCK:
1382                 data = vcpu->kvm->arch.wall_clock;
1383                 break;
1384         case MSR_KVM_SYSTEM_TIME:
1385                 data = vcpu->arch.time;
1386                 break;
1387         case MSR_IA32_P5_MC_ADDR:
1388         case MSR_IA32_P5_MC_TYPE:
1389         case MSR_IA32_MCG_CAP:
1390         case MSR_IA32_MCG_CTL:
1391         case MSR_IA32_MCG_STATUS:
1392         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1393                 return get_msr_mce(vcpu, msr, pdata);
1394         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1395                 if (kvm_hv_msr_partition_wide(msr)) {
1396                         int r;
1397                         mutex_lock(&vcpu->kvm->lock);
1398                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1399                         mutex_unlock(&vcpu->kvm->lock);
1400                         return r;
1401                 } else
1402                         return get_msr_hyperv(vcpu, msr, pdata);
1403                 break;
1404         default:
1405                 if (!ignore_msrs) {
1406                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1407                         return 1;
1408                 } else {
1409                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1410                         data = 0;
1411                 }
1412                 break;
1413         }
1414         *pdata = data;
1415         return 0;
1416 }
1417 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1418
1419 /*
1420  * Read or write a bunch of msrs. All parameters are kernel addresses.
1421  *
1422  * @return number of msrs set successfully.
1423  */
1424 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1425                     struct kvm_msr_entry *entries,
1426                     int (*do_msr)(struct kvm_vcpu *vcpu,
1427                                   unsigned index, u64 *data))
1428 {
1429         int i, idx;
1430
1431         vcpu_load(vcpu);
1432
1433         idx = srcu_read_lock(&vcpu->kvm->srcu);
1434         for (i = 0; i < msrs->nmsrs; ++i)
1435                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1436                         break;
1437         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1438
1439         vcpu_put(vcpu);
1440
1441         return i;
1442 }
1443
1444 /*
1445  * Read or write a bunch of msrs. Parameters are user addresses.
1446  *
1447  * @return number of msrs set successfully.
1448  */
1449 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1450                   int (*do_msr)(struct kvm_vcpu *vcpu,
1451                                 unsigned index, u64 *data),
1452                   int writeback)
1453 {
1454         struct kvm_msrs msrs;
1455         struct kvm_msr_entry *entries;
1456         int r, n;
1457         unsigned size;
1458
1459         r = -EFAULT;
1460         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1461                 goto out;
1462
1463         r = -E2BIG;
1464         if (msrs.nmsrs >= MAX_IO_MSRS)
1465                 goto out;
1466
1467         r = -ENOMEM;
1468         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1469         entries = vmalloc(size);
1470         if (!entries)
1471                 goto out;
1472
1473         r = -EFAULT;
1474         if (copy_from_user(entries, user_msrs->entries, size))
1475                 goto out_free;
1476
1477         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1478         if (r < 0)
1479                 goto out_free;
1480
1481         r = -EFAULT;
1482         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1483                 goto out_free;
1484
1485         r = n;
1486
1487 out_free:
1488         vfree(entries);
1489 out:
1490         return r;
1491 }
1492
1493 int kvm_dev_ioctl_check_extension(long ext)
1494 {
1495         int r;
1496
1497         switch (ext) {
1498         case KVM_CAP_IRQCHIP:
1499         case KVM_CAP_HLT:
1500         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1501         case KVM_CAP_SET_TSS_ADDR:
1502         case KVM_CAP_EXT_CPUID:
1503         case KVM_CAP_CLOCKSOURCE:
1504         case KVM_CAP_PIT:
1505         case KVM_CAP_NOP_IO_DELAY:
1506         case KVM_CAP_MP_STATE:
1507         case KVM_CAP_SYNC_MMU:
1508         case KVM_CAP_REINJECT_CONTROL:
1509         case KVM_CAP_IRQ_INJECT_STATUS:
1510         case KVM_CAP_ASSIGN_DEV_IRQ:
1511         case KVM_CAP_IRQFD:
1512         case KVM_CAP_IOEVENTFD:
1513         case KVM_CAP_PIT2:
1514         case KVM_CAP_PIT_STATE2:
1515         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1516         case KVM_CAP_XEN_HVM:
1517         case KVM_CAP_ADJUST_CLOCK:
1518         case KVM_CAP_VCPU_EVENTS:
1519         case KVM_CAP_HYPERV:
1520         case KVM_CAP_HYPERV_VAPIC:
1521         case KVM_CAP_HYPERV_SPIN:
1522         case KVM_CAP_PCI_SEGMENT:
1523         case KVM_CAP_DEBUGREGS:
1524         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1525                 r = 1;
1526                 break;
1527         case KVM_CAP_COALESCED_MMIO:
1528                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1529                 break;
1530         case KVM_CAP_VAPIC:
1531                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1532                 break;
1533         case KVM_CAP_NR_VCPUS:
1534                 r = KVM_MAX_VCPUS;
1535                 break;
1536         case KVM_CAP_NR_MEMSLOTS:
1537                 r = KVM_MEMORY_SLOTS;
1538                 break;
1539         case KVM_CAP_PV_MMU:    /* obsolete */
1540                 r = 0;
1541                 break;
1542         case KVM_CAP_IOMMU:
1543                 r = iommu_found();
1544                 break;
1545         case KVM_CAP_MCE:
1546                 r = KVM_MAX_MCE_BANKS;
1547                 break;
1548         default:
1549                 r = 0;
1550                 break;
1551         }
1552         return r;
1553
1554 }
1555
1556 long kvm_arch_dev_ioctl(struct file *filp,
1557                         unsigned int ioctl, unsigned long arg)
1558 {
1559         void __user *argp = (void __user *)arg;
1560         long r;
1561
1562         switch (ioctl) {
1563         case KVM_GET_MSR_INDEX_LIST: {
1564                 struct kvm_msr_list __user *user_msr_list = argp;
1565                 struct kvm_msr_list msr_list;
1566                 unsigned n;
1567
1568                 r = -EFAULT;
1569                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1570                         goto out;
1571                 n = msr_list.nmsrs;
1572                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1573                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1574                         goto out;
1575                 r = -E2BIG;
1576                 if (n < msr_list.nmsrs)
1577                         goto out;
1578                 r = -EFAULT;
1579                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1580                                  num_msrs_to_save * sizeof(u32)))
1581                         goto out;
1582                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1583                                  &emulated_msrs,
1584                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1585                         goto out;
1586                 r = 0;
1587                 break;
1588         }
1589         case KVM_GET_SUPPORTED_CPUID: {
1590                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1591                 struct kvm_cpuid2 cpuid;
1592
1593                 r = -EFAULT;
1594                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1595                         goto out;
1596                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1597                                                       cpuid_arg->entries);
1598                 if (r)
1599                         goto out;
1600
1601                 r = -EFAULT;
1602                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1603                         goto out;
1604                 r = 0;
1605                 break;
1606         }
1607         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1608                 u64 mce_cap;
1609
1610                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1611                 r = -EFAULT;
1612                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1613                         goto out;
1614                 r = 0;
1615                 break;
1616         }
1617         default:
1618                 r = -EINVAL;
1619         }
1620 out:
1621         return r;
1622 }
1623
1624 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1625 {
1626         kvm_x86_ops->vcpu_load(vcpu, cpu);
1627         if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1628                 unsigned long khz = cpufreq_quick_get(cpu);
1629                 if (!khz)
1630                         khz = tsc_khz;
1631                 per_cpu(cpu_tsc_khz, cpu) = khz;
1632         }
1633         kvm_request_guest_time_update(vcpu);
1634 }
1635
1636 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1637 {
1638         kvm_put_guest_fpu(vcpu);
1639         kvm_x86_ops->vcpu_put(vcpu);
1640 }
1641
1642 static int is_efer_nx(void)
1643 {
1644         unsigned long long efer = 0;
1645
1646         rdmsrl_safe(MSR_EFER, &efer);
1647         return efer & EFER_NX;
1648 }
1649
1650 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1651 {
1652         int i;
1653         struct kvm_cpuid_entry2 *e, *entry;
1654
1655         entry = NULL;
1656         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1657                 e = &vcpu->arch.cpuid_entries[i];
1658                 if (e->function == 0x80000001) {
1659                         entry = e;
1660                         break;
1661                 }
1662         }
1663         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1664                 entry->edx &= ~(1 << 20);
1665                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1666         }
1667 }
1668
1669 /* when an old userspace process fills a new kernel module */
1670 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1671                                     struct kvm_cpuid *cpuid,
1672                                     struct kvm_cpuid_entry __user *entries)
1673 {
1674         int r, i;
1675         struct kvm_cpuid_entry *cpuid_entries;
1676
1677         r = -E2BIG;
1678         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1679                 goto out;
1680         r = -ENOMEM;
1681         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1682         if (!cpuid_entries)
1683                 goto out;
1684         r = -EFAULT;
1685         if (copy_from_user(cpuid_entries, entries,
1686                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1687                 goto out_free;
1688         for (i = 0; i < cpuid->nent; i++) {
1689                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1690                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1691                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1692                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1693                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1694                 vcpu->arch.cpuid_entries[i].index = 0;
1695                 vcpu->arch.cpuid_entries[i].flags = 0;
1696                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1697                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1698                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1699         }
1700         vcpu->arch.cpuid_nent = cpuid->nent;
1701         cpuid_fix_nx_cap(vcpu);
1702         r = 0;
1703         kvm_apic_set_version(vcpu);
1704         kvm_x86_ops->cpuid_update(vcpu);
1705
1706 out_free:
1707         vfree(cpuid_entries);
1708 out:
1709         return r;
1710 }
1711
1712 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1713                                      struct kvm_cpuid2 *cpuid,
1714                                      struct kvm_cpuid_entry2 __user *entries)
1715 {
1716         int r;
1717
1718         r = -E2BIG;
1719         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1720                 goto out;
1721         r = -EFAULT;
1722         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1723                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1724                 goto out;
1725         vcpu->arch.cpuid_nent = cpuid->nent;
1726         kvm_apic_set_version(vcpu);
1727         kvm_x86_ops->cpuid_update(vcpu);
1728         return 0;
1729
1730 out:
1731         return r;
1732 }
1733
1734 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1735                                      struct kvm_cpuid2 *cpuid,
1736                                      struct kvm_cpuid_entry2 __user *entries)
1737 {
1738         int r;
1739
1740         r = -E2BIG;
1741         if (cpuid->nent < vcpu->arch.cpuid_nent)
1742                 goto out;
1743         r = -EFAULT;
1744         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1745                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1746                 goto out;
1747         return 0;
1748
1749 out:
1750         cpuid->nent = vcpu->arch.cpuid_nent;
1751         return r;
1752 }
1753
1754 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1755                            u32 index)
1756 {
1757         entry->function = function;
1758         entry->index = index;
1759         cpuid_count(entry->function, entry->index,
1760                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1761         entry->flags = 0;
1762 }
1763
1764 #define F(x) bit(X86_FEATURE_##x)
1765
1766 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1767                          u32 index, int *nent, int maxnent)
1768 {
1769         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1770 #ifdef CONFIG_X86_64
1771         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1772                                 ? F(GBPAGES) : 0;
1773         unsigned f_lm = F(LM);
1774 #else
1775         unsigned f_gbpages = 0;
1776         unsigned f_lm = 0;
1777 #endif
1778         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1779
1780         /* cpuid 1.edx */
1781         const u32 kvm_supported_word0_x86_features =
1782                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1783                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1784                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1785                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1786                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1787                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1788                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1789                 0 /* HTT, TM, Reserved, PBE */;
1790         /* cpuid 0x80000001.edx */
1791         const u32 kvm_supported_word1_x86_features =
1792                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1793                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1794                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1795                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1796                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1797                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1798                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1799                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1800         /* cpuid 1.ecx */
1801         const u32 kvm_supported_word4_x86_features =
1802                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1803                 0 /* DS-CPL, VMX, SMX, EST */ |
1804                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1805                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1806                 0 /* Reserved, DCA */ | F(XMM4_1) |
1807                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1808                 0 /* Reserved, XSAVE, OSXSAVE */;
1809         /* cpuid 0x80000001.ecx */
1810         const u32 kvm_supported_word6_x86_features =
1811                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1812                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1813                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1814                 0 /* SKINIT */ | 0 /* WDT */;
1815
1816         /* all calls to cpuid_count() should be made on the same cpu */
1817         get_cpu();
1818         do_cpuid_1_ent(entry, function, index);
1819         ++*nent;
1820
1821         switch (function) {
1822         case 0:
1823                 entry->eax = min(entry->eax, (u32)0xb);
1824                 break;
1825         case 1:
1826                 entry->edx &= kvm_supported_word0_x86_features;
1827                 entry->ecx &= kvm_supported_word4_x86_features;
1828                 /* we support x2apic emulation even if host does not support
1829                  * it since we emulate x2apic in software */
1830                 entry->ecx |= F(X2APIC);
1831                 break;
1832         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1833          * may return different values. This forces us to get_cpu() before
1834          * issuing the first command, and also to emulate this annoying behavior
1835          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1836         case 2: {
1837                 int t, times = entry->eax & 0xff;
1838
1839                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1840                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1841                 for (t = 1; t < times && *nent < maxnent; ++t) {
1842                         do_cpuid_1_ent(&entry[t], function, 0);
1843                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1844                         ++*nent;
1845                 }
1846                 break;
1847         }
1848         /* function 4 and 0xb have additional index. */
1849         case 4: {
1850                 int i, cache_type;
1851
1852                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1853                 /* read more entries until cache_type is zero */
1854                 for (i = 1; *nent < maxnent; ++i) {
1855                         cache_type = entry[i - 1].eax & 0x1f;
1856                         if (!cache_type)
1857                                 break;
1858                         do_cpuid_1_ent(&entry[i], function, i);
1859                         entry[i].flags |=
1860                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1861                         ++*nent;
1862                 }
1863                 break;
1864         }
1865         case 0xb: {
1866                 int i, level_type;
1867
1868                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1869                 /* read more entries until level_type is zero */
1870                 for (i = 1; *nent < maxnent; ++i) {
1871                         level_type = entry[i - 1].ecx & 0xff00;
1872                         if (!level_type)
1873                                 break;
1874                         do_cpuid_1_ent(&entry[i], function, i);
1875                         entry[i].flags |=
1876                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1877                         ++*nent;
1878                 }
1879                 break;
1880         }
1881         case 0x80000000:
1882                 entry->eax = min(entry->eax, 0x8000001a);
1883                 break;
1884         case 0x80000001:
1885                 entry->edx &= kvm_supported_word1_x86_features;
1886                 entry->ecx &= kvm_supported_word6_x86_features;
1887                 break;
1888         }
1889         put_cpu();
1890 }
1891
1892 #undef F
1893
1894 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1895                                      struct kvm_cpuid_entry2 __user *entries)
1896 {
1897         struct kvm_cpuid_entry2 *cpuid_entries;
1898         int limit, nent = 0, r = -E2BIG;
1899         u32 func;
1900
1901         if (cpuid->nent < 1)
1902                 goto out;
1903         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1904                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1905         r = -ENOMEM;
1906         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1907         if (!cpuid_entries)
1908                 goto out;
1909
1910         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1911         limit = cpuid_entries[0].eax;
1912         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1913                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1914                              &nent, cpuid->nent);
1915         r = -E2BIG;
1916         if (nent >= cpuid->nent)
1917                 goto out_free;
1918
1919         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1920         limit = cpuid_entries[nent - 1].eax;
1921         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1922                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1923                              &nent, cpuid->nent);
1924         r = -E2BIG;
1925         if (nent >= cpuid->nent)
1926                 goto out_free;
1927
1928         r = -EFAULT;
1929         if (copy_to_user(entries, cpuid_entries,
1930                          nent * sizeof(struct kvm_cpuid_entry2)))
1931                 goto out_free;
1932         cpuid->nent = nent;
1933         r = 0;
1934
1935 out_free:
1936         vfree(cpuid_entries);
1937 out:
1938         return r;
1939 }
1940
1941 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1942                                     struct kvm_lapic_state *s)
1943 {
1944         vcpu_load(vcpu);
1945         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1946         vcpu_put(vcpu);
1947
1948         return 0;
1949 }
1950
1951 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1952                                     struct kvm_lapic_state *s)
1953 {
1954         vcpu_load(vcpu);
1955         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1956         kvm_apic_post_state_restore(vcpu);
1957         update_cr8_intercept(vcpu);
1958         vcpu_put(vcpu);
1959
1960         return 0;
1961 }
1962
1963 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1964                                     struct kvm_interrupt *irq)
1965 {
1966         if (irq->irq < 0 || irq->irq >= 256)
1967                 return -EINVAL;
1968         if (irqchip_in_kernel(vcpu->kvm))
1969                 return -ENXIO;
1970         vcpu_load(vcpu);
1971
1972         kvm_queue_interrupt(vcpu, irq->irq, false);
1973
1974         vcpu_put(vcpu);
1975
1976         return 0;
1977 }
1978
1979 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1980 {
1981         vcpu_load(vcpu);
1982         kvm_inject_nmi(vcpu);
1983         vcpu_put(vcpu);
1984
1985         return 0;
1986 }
1987
1988 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1989                                            struct kvm_tpr_access_ctl *tac)
1990 {
1991         if (tac->flags)
1992                 return -EINVAL;
1993         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1994         return 0;
1995 }
1996
1997 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1998                                         u64 mcg_cap)
1999 {
2000         int r;
2001         unsigned bank_num = mcg_cap & 0xff, bank;
2002
2003         r = -EINVAL;
2004         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2005                 goto out;
2006         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2007                 goto out;
2008         r = 0;
2009         vcpu->arch.mcg_cap = mcg_cap;
2010         /* Init IA32_MCG_CTL to all 1s */
2011         if (mcg_cap & MCG_CTL_P)
2012                 vcpu->arch.mcg_ctl = ~(u64)0;
2013         /* Init IA32_MCi_CTL to all 1s */
2014         for (bank = 0; bank < bank_num; bank++)
2015                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2016 out:
2017         return r;
2018 }
2019
2020 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2021                                       struct kvm_x86_mce *mce)
2022 {
2023         u64 mcg_cap = vcpu->arch.mcg_cap;
2024         unsigned bank_num = mcg_cap & 0xff;
2025         u64 *banks = vcpu->arch.mce_banks;
2026
2027         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2028                 return -EINVAL;
2029         /*
2030          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2031          * reporting is disabled
2032          */
2033         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2034             vcpu->arch.mcg_ctl != ~(u64)0)
2035                 return 0;
2036         banks += 4 * mce->bank;
2037         /*
2038          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2039          * reporting is disabled for the bank
2040          */
2041         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2042                 return 0;
2043         if (mce->status & MCI_STATUS_UC) {
2044                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2045                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2046                         printk(KERN_DEBUG "kvm: set_mce: "
2047                                "injects mce exception while "
2048                                "previous one is in progress!\n");
2049                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2050                         return 0;
2051                 }
2052                 if (banks[1] & MCI_STATUS_VAL)
2053                         mce->status |= MCI_STATUS_OVER;
2054                 banks[2] = mce->addr;
2055                 banks[3] = mce->misc;
2056                 vcpu->arch.mcg_status = mce->mcg_status;
2057                 banks[1] = mce->status;
2058                 kvm_queue_exception(vcpu, MC_VECTOR);
2059         } else if (!(banks[1] & MCI_STATUS_VAL)
2060                    || !(banks[1] & MCI_STATUS_UC)) {
2061                 if (banks[1] & MCI_STATUS_VAL)
2062                         mce->status |= MCI_STATUS_OVER;
2063                 banks[2] = mce->addr;
2064                 banks[3] = mce->misc;
2065                 banks[1] = mce->status;
2066         } else
2067                 banks[1] |= MCI_STATUS_OVER;
2068         return 0;
2069 }
2070
2071 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2072                                                struct kvm_vcpu_events *events)
2073 {
2074         vcpu_load(vcpu);
2075
2076         events->exception.injected =
2077                 vcpu->arch.exception.pending &&
2078                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2079         events->exception.nr = vcpu->arch.exception.nr;
2080         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2081         events->exception.error_code = vcpu->arch.exception.error_code;
2082
2083         events->interrupt.injected =
2084                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2085         events->interrupt.nr = vcpu->arch.interrupt.nr;
2086         events->interrupt.soft = 0;
2087         events->interrupt.shadow =
2088                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2089                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2090
2091         events->nmi.injected = vcpu->arch.nmi_injected;
2092         events->nmi.pending = vcpu->arch.nmi_pending;
2093         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2094
2095         events->sipi_vector = vcpu->arch.sipi_vector;
2096
2097         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2098                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2099                          | KVM_VCPUEVENT_VALID_SHADOW);
2100
2101         vcpu_put(vcpu);
2102 }
2103
2104 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2105                                               struct kvm_vcpu_events *events)
2106 {
2107         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2108                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2109                               | KVM_VCPUEVENT_VALID_SHADOW))
2110                 return -EINVAL;
2111
2112         vcpu_load(vcpu);
2113
2114         vcpu->arch.exception.pending = events->exception.injected;
2115         vcpu->arch.exception.nr = events->exception.nr;
2116         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2117         vcpu->arch.exception.error_code = events->exception.error_code;
2118
2119         vcpu->arch.interrupt.pending = events->interrupt.injected;
2120         vcpu->arch.interrupt.nr = events->interrupt.nr;
2121         vcpu->arch.interrupt.soft = events->interrupt.soft;
2122         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2123                 kvm_pic_clear_isr_ack(vcpu->kvm);
2124         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2125                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2126                                                   events->interrupt.shadow);
2127
2128         vcpu->arch.nmi_injected = events->nmi.injected;
2129         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2130                 vcpu->arch.nmi_pending = events->nmi.pending;
2131         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2132
2133         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2134                 vcpu->arch.sipi_vector = events->sipi_vector;
2135
2136         vcpu_put(vcpu);
2137
2138         return 0;
2139 }
2140
2141 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2142                                              struct kvm_debugregs *dbgregs)
2143 {
2144         vcpu_load(vcpu);
2145
2146         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2147         dbgregs->dr6 = vcpu->arch.dr6;
2148         dbgregs->dr7 = vcpu->arch.dr7;
2149         dbgregs->flags = 0;
2150
2151         vcpu_put(vcpu);
2152 }
2153
2154 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2155                                             struct kvm_debugregs *dbgregs)
2156 {
2157         if (dbgregs->flags)
2158                 return -EINVAL;
2159
2160         vcpu_load(vcpu);
2161
2162         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2163         vcpu->arch.dr6 = dbgregs->dr6;
2164         vcpu->arch.dr7 = dbgregs->dr7;
2165
2166         vcpu_put(vcpu);
2167
2168         return 0;
2169 }
2170
2171 long kvm_arch_vcpu_ioctl(struct file *filp,
2172                          unsigned int ioctl, unsigned long arg)
2173 {
2174         struct kvm_vcpu *vcpu = filp->private_data;
2175         void __user *argp = (void __user *)arg;
2176         int r;
2177         struct kvm_lapic_state *lapic = NULL;
2178
2179         switch (ioctl) {
2180         case KVM_GET_LAPIC: {
2181                 r = -EINVAL;
2182                 if (!vcpu->arch.apic)
2183                         goto out;
2184                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2185
2186                 r = -ENOMEM;
2187                 if (!lapic)
2188                         goto out;
2189                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2190                 if (r)
2191                         goto out;
2192                 r = -EFAULT;
2193                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2194                         goto out;
2195                 r = 0;
2196                 break;
2197         }
2198         case KVM_SET_LAPIC: {
2199                 r = -EINVAL;
2200                 if (!vcpu->arch.apic)
2201                         goto out;
2202                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2203                 r = -ENOMEM;
2204                 if (!lapic)
2205                         goto out;
2206                 r = -EFAULT;
2207                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2208                         goto out;
2209                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2210                 if (r)
2211                         goto out;
2212                 r = 0;
2213                 break;
2214         }
2215         case KVM_INTERRUPT: {
2216                 struct kvm_interrupt irq;
2217
2218                 r = -EFAULT;
2219                 if (copy_from_user(&irq, argp, sizeof irq))
2220                         goto out;
2221                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2222                 if (r)
2223                         goto out;
2224                 r = 0;
2225                 break;
2226         }
2227         case KVM_NMI: {
2228                 r = kvm_vcpu_ioctl_nmi(vcpu);
2229                 if (r)
2230                         goto out;
2231                 r = 0;
2232                 break;
2233         }
2234         case KVM_SET_CPUID: {
2235                 struct kvm_cpuid __user *cpuid_arg = argp;
2236                 struct kvm_cpuid cpuid;
2237
2238                 r = -EFAULT;
2239                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2240                         goto out;
2241                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2242                 if (r)
2243                         goto out;
2244                 break;
2245         }
2246         case KVM_SET_CPUID2: {
2247                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2248                 struct kvm_cpuid2 cpuid;
2249
2250                 r = -EFAULT;
2251                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2252                         goto out;
2253                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2254                                               cpuid_arg->entries);
2255                 if (r)
2256                         goto out;
2257                 break;
2258         }
2259         case KVM_GET_CPUID2: {
2260                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2261                 struct kvm_cpuid2 cpuid;
2262
2263                 r = -EFAULT;
2264                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2265                         goto out;
2266                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2267                                               cpuid_arg->entries);
2268                 if (r)
2269                         goto out;
2270                 r = -EFAULT;
2271                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2272                         goto out;
2273                 r = 0;
2274                 break;
2275         }
2276         case KVM_GET_MSRS:
2277                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2278                 break;
2279         case KVM_SET_MSRS:
2280                 r = msr_io(vcpu, argp, do_set_msr, 0);
2281                 break;
2282         case KVM_TPR_ACCESS_REPORTING: {
2283                 struct kvm_tpr_access_ctl tac;
2284
2285                 r = -EFAULT;
2286                 if (copy_from_user(&tac, argp, sizeof tac))
2287                         goto out;
2288                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2289                 if (r)
2290                         goto out;
2291                 r = -EFAULT;
2292                 if (copy_to_user(argp, &tac, sizeof tac))
2293                         goto out;
2294                 r = 0;
2295                 break;
2296         };
2297         case KVM_SET_VAPIC_ADDR: {
2298                 struct kvm_vapic_addr va;
2299
2300                 r = -EINVAL;
2301                 if (!irqchip_in_kernel(vcpu->kvm))
2302                         goto out;
2303                 r = -EFAULT;
2304                 if (copy_from_user(&va, argp, sizeof va))
2305                         goto out;
2306                 r = 0;
2307                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2308                 break;
2309         }
2310         case KVM_X86_SETUP_MCE: {
2311                 u64 mcg_cap;
2312
2313                 r = -EFAULT;
2314                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2315                         goto out;
2316                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2317                 break;
2318         }
2319         case KVM_X86_SET_MCE: {
2320                 struct kvm_x86_mce mce;
2321
2322                 r = -EFAULT;
2323                 if (copy_from_user(&mce, argp, sizeof mce))
2324                         goto out;
2325                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2326                 break;
2327         }
2328         case KVM_GET_VCPU_EVENTS: {
2329                 struct kvm_vcpu_events events;
2330
2331                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2332
2333                 r = -EFAULT;
2334                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2335                         break;
2336                 r = 0;
2337                 break;
2338         }
2339         case KVM_SET_VCPU_EVENTS: {
2340                 struct kvm_vcpu_events events;
2341
2342                 r = -EFAULT;
2343                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2344                         break;
2345
2346                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2347                 break;
2348         }
2349         case KVM_GET_DEBUGREGS: {
2350                 struct kvm_debugregs dbgregs;
2351
2352                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2353
2354                 r = -EFAULT;
2355                 if (copy_to_user(argp, &dbgregs,
2356                                  sizeof(struct kvm_debugregs)))
2357                         break;
2358                 r = 0;
2359                 break;
2360         }
2361         case KVM_SET_DEBUGREGS: {
2362                 struct kvm_debugregs dbgregs;
2363
2364                 r = -EFAULT;
2365                 if (copy_from_user(&dbgregs, argp,
2366                                    sizeof(struct kvm_debugregs)))
2367                         break;
2368
2369                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2370                 break;
2371         }
2372         default:
2373                 r = -EINVAL;
2374         }
2375 out:
2376         kfree(lapic);
2377         return r;
2378 }
2379
2380 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2381 {
2382         int ret;
2383
2384         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2385                 return -1;
2386         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2387         return ret;
2388 }
2389
2390 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2391                                               u64 ident_addr)
2392 {
2393         kvm->arch.ept_identity_map_addr = ident_addr;
2394         return 0;
2395 }
2396
2397 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2398                                           u32 kvm_nr_mmu_pages)
2399 {
2400         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2401                 return -EINVAL;
2402
2403         mutex_lock(&kvm->slots_lock);
2404         spin_lock(&kvm->mmu_lock);
2405
2406         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2407         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2408
2409         spin_unlock(&kvm->mmu_lock);
2410         mutex_unlock(&kvm->slots_lock);
2411         return 0;
2412 }
2413
2414 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2415 {
2416         return kvm->arch.n_alloc_mmu_pages;
2417 }
2418
2419 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2420 {
2421         int i;
2422         struct kvm_mem_alias *alias;
2423         struct kvm_mem_aliases *aliases;
2424
2425         aliases = rcu_dereference(kvm->arch.aliases);
2426
2427         for (i = 0; i < aliases->naliases; ++i) {
2428                 alias = &aliases->aliases[i];
2429                 if (alias->flags & KVM_ALIAS_INVALID)
2430                         continue;
2431                 if (gfn >= alias->base_gfn
2432                     && gfn < alias->base_gfn + alias->npages)
2433                         return alias->target_gfn + gfn - alias->base_gfn;
2434         }
2435         return gfn;
2436 }
2437
2438 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2439 {
2440         int i;
2441         struct kvm_mem_alias *alias;
2442         struct kvm_mem_aliases *aliases;
2443
2444         aliases = rcu_dereference(kvm->arch.aliases);
2445
2446         for (i = 0; i < aliases->naliases; ++i) {
2447                 alias = &aliases->aliases[i];
2448                 if (gfn >= alias->base_gfn
2449                     && gfn < alias->base_gfn + alias->npages)
2450                         return alias->target_gfn + gfn - alias->base_gfn;
2451         }
2452         return gfn;
2453 }
2454
2455 /*
2456  * Set a new alias region.  Aliases map a portion of physical memory into
2457  * another portion.  This is useful for memory windows, for example the PC
2458  * VGA region.
2459  */
2460 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2461                                          struct kvm_memory_alias *alias)
2462 {
2463         int r, n;
2464         struct kvm_mem_alias *p;
2465         struct kvm_mem_aliases *aliases, *old_aliases;
2466
2467         r = -EINVAL;
2468         /* General sanity checks */
2469         if (alias->memory_size & (PAGE_SIZE - 1))
2470                 goto out;
2471         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2472                 goto out;
2473         if (alias->slot >= KVM_ALIAS_SLOTS)
2474                 goto out;
2475         if (alias->guest_phys_addr + alias->memory_size
2476             < alias->guest_phys_addr)
2477                 goto out;
2478         if (alias->target_phys_addr + alias->memory_size
2479             < alias->target_phys_addr)
2480                 goto out;
2481
2482         r = -ENOMEM;
2483         aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2484         if (!aliases)
2485                 goto out;
2486
2487         mutex_lock(&kvm->slots_lock);
2488
2489         /* invalidate any gfn reference in case of deletion/shrinking */
2490         memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2491         aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2492         old_aliases = kvm->arch.aliases;
2493         rcu_assign_pointer(kvm->arch.aliases, aliases);
2494         synchronize_srcu_expedited(&kvm->srcu);
2495         kvm_mmu_zap_all(kvm);
2496         kfree(old_aliases);
2497
2498         r = -ENOMEM;
2499         aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2500         if (!aliases)
2501                 goto out_unlock;
2502
2503         memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2504
2505         p = &aliases->aliases[alias->slot];
2506         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2507         p->npages = alias->memory_size >> PAGE_SHIFT;
2508         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2509         p->flags &= ~(KVM_ALIAS_INVALID);
2510
2511         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2512                 if (aliases->aliases[n - 1].npages)
2513                         break;
2514         aliases->naliases = n;
2515
2516         old_aliases = kvm->arch.aliases;
2517         rcu_assign_pointer(kvm->arch.aliases, aliases);
2518         synchronize_srcu_expedited(&kvm->srcu);
2519         kfree(old_aliases);
2520         r = 0;
2521
2522 out_unlock:
2523         mutex_unlock(&kvm->slots_lock);
2524 out:
2525         return r;
2526 }
2527
2528 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2529 {
2530         int r;
2531
2532         r = 0;
2533         switch (chip->chip_id) {
2534         case KVM_IRQCHIP_PIC_MASTER:
2535                 memcpy(&chip->chip.pic,
2536                         &pic_irqchip(kvm)->pics[0],
2537                         sizeof(struct kvm_pic_state));
2538                 break;
2539         case KVM_IRQCHIP_PIC_SLAVE:
2540                 memcpy(&chip->chip.pic,
2541                         &pic_irqchip(kvm)->pics[1],
2542                         sizeof(struct kvm_pic_state));
2543                 break;
2544         case KVM_IRQCHIP_IOAPIC:
2545                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2546                 break;
2547         default:
2548                 r = -EINVAL;
2549                 break;
2550         }
2551         return r;
2552 }
2553
2554 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2555 {
2556         int r;
2557
2558         r = 0;
2559         switch (chip->chip_id) {
2560         case KVM_IRQCHIP_PIC_MASTER:
2561                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2562                 memcpy(&pic_irqchip(kvm)->pics[0],
2563                         &chip->chip.pic,
2564                         sizeof(struct kvm_pic_state));
2565                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2566                 break;
2567         case KVM_IRQCHIP_PIC_SLAVE:
2568                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2569                 memcpy(&pic_irqchip(kvm)->pics[1],
2570                         &chip->chip.pic,
2571                         sizeof(struct kvm_pic_state));
2572                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2573                 break;
2574         case KVM_IRQCHIP_IOAPIC:
2575                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2576                 break;
2577         default:
2578                 r = -EINVAL;
2579                 break;
2580         }
2581         kvm_pic_update_irq(pic_irqchip(kvm));
2582         return r;
2583 }
2584
2585 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2586 {
2587         int r = 0;
2588
2589         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2590         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2591         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2592         return r;
2593 }
2594
2595 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2596 {
2597         int r = 0;
2598
2599         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2600         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2601         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2602         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2603         return r;
2604 }
2605
2606 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2607 {
2608         int r = 0;
2609
2610         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2611         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2612                 sizeof(ps->channels));
2613         ps->flags = kvm->arch.vpit->pit_state.flags;
2614         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2615         return r;
2616 }
2617
2618 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2619 {
2620         int r = 0, start = 0;
2621         u32 prev_legacy, cur_legacy;
2622         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2623         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2624         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2625         if (!prev_legacy && cur_legacy)
2626                 start = 1;
2627         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2628                sizeof(kvm->arch.vpit->pit_state.channels));
2629         kvm->arch.vpit->pit_state.flags = ps->flags;
2630         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2631         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2632         return r;
2633 }
2634
2635 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2636                                  struct kvm_reinject_control *control)
2637 {
2638         if (!kvm->arch.vpit)
2639                 return -ENXIO;
2640         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2641         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2642         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2643         return 0;
2644 }
2645
2646 /*
2647  * Get (and clear) the dirty memory log for a memory slot.
2648  */
2649 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2650                                       struct kvm_dirty_log *log)
2651 {
2652         int r, i;
2653         struct kvm_memory_slot *memslot;
2654         unsigned long n;
2655         unsigned long is_dirty = 0;
2656         unsigned long *dirty_bitmap = NULL;
2657
2658         mutex_lock(&kvm->slots_lock);
2659
2660         r = -EINVAL;
2661         if (log->slot >= KVM_MEMORY_SLOTS)
2662                 goto out;
2663
2664         memslot = &kvm->memslots->memslots[log->slot];
2665         r = -ENOENT;
2666         if (!memslot->dirty_bitmap)
2667                 goto out;
2668
2669         n = kvm_dirty_bitmap_bytes(memslot);
2670
2671         r = -ENOMEM;
2672         dirty_bitmap = vmalloc(n);
2673         if (!dirty_bitmap)
2674                 goto out;
2675         memset(dirty_bitmap, 0, n);
2676
2677         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2678                 is_dirty = memslot->dirty_bitmap[i];
2679
2680         /* If nothing is dirty, don't bother messing with page tables. */
2681         if (is_dirty) {
2682                 struct kvm_memslots *slots, *old_slots;
2683
2684                 spin_lock(&kvm->mmu_lock);
2685                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2686                 spin_unlock(&kvm->mmu_lock);
2687
2688                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2689                 if (!slots)
2690                         goto out_free;
2691
2692                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2693                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2694
2695                 old_slots = kvm->memslots;
2696                 rcu_assign_pointer(kvm->memslots, slots);
2697                 synchronize_srcu_expedited(&kvm->srcu);
2698                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2699                 kfree(old_slots);
2700         }
2701
2702         r = 0;
2703         if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2704                 r = -EFAULT;
2705 out_free:
2706         vfree(dirty_bitmap);
2707 out:
2708         mutex_unlock(&kvm->slots_lock);
2709         return r;
2710 }
2711
2712 long kvm_arch_vm_ioctl(struct file *filp,
2713                        unsigned int ioctl, unsigned long arg)
2714 {
2715         struct kvm *kvm = filp->private_data;
2716         void __user *argp = (void __user *)arg;
2717         int r = -ENOTTY;
2718         /*
2719          * This union makes it completely explicit to gcc-3.x
2720          * that these two variables' stack usage should be
2721          * combined, not added together.
2722          */
2723         union {
2724                 struct kvm_pit_state ps;
2725                 struct kvm_pit_state2 ps2;
2726                 struct kvm_memory_alias alias;
2727                 struct kvm_pit_config pit_config;
2728         } u;
2729
2730         switch (ioctl) {
2731         case KVM_SET_TSS_ADDR:
2732                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2733                 if (r < 0)
2734                         goto out;
2735                 break;
2736         case KVM_SET_IDENTITY_MAP_ADDR: {
2737                 u64 ident_addr;
2738
2739                 r = -EFAULT;
2740                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2741                         goto out;
2742                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2743                 if (r < 0)
2744                         goto out;
2745                 break;
2746         }
2747         case KVM_SET_MEMORY_REGION: {
2748                 struct kvm_memory_region kvm_mem;
2749                 struct kvm_userspace_memory_region kvm_userspace_mem;
2750
2751                 r = -EFAULT;
2752                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2753                         goto out;
2754                 kvm_userspace_mem.slot = kvm_mem.slot;
2755                 kvm_userspace_mem.flags = kvm_mem.flags;
2756                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2757                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2758                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2759                 if (r)
2760                         goto out;
2761                 break;
2762         }
2763         case KVM_SET_NR_MMU_PAGES:
2764                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2765                 if (r)
2766                         goto out;
2767                 break;
2768         case KVM_GET_NR_MMU_PAGES:
2769                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2770                 break;
2771         case KVM_SET_MEMORY_ALIAS:
2772                 r = -EFAULT;
2773                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2774                         goto out;
2775                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2776                 if (r)
2777                         goto out;
2778                 break;
2779         case KVM_CREATE_IRQCHIP: {
2780                 struct kvm_pic *vpic;
2781
2782                 mutex_lock(&kvm->lock);
2783                 r = -EEXIST;
2784                 if (kvm->arch.vpic)
2785                         goto create_irqchip_unlock;
2786                 r = -ENOMEM;
2787                 vpic = kvm_create_pic(kvm);
2788                 if (vpic) {
2789                         r = kvm_ioapic_init(kvm);
2790                         if (r) {
2791                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2792                                                           &vpic->dev);
2793                                 kfree(vpic);
2794                                 goto create_irqchip_unlock;
2795                         }
2796                 } else
2797                         goto create_irqchip_unlock;
2798                 smp_wmb();
2799                 kvm->arch.vpic = vpic;
2800                 smp_wmb();
2801                 r = kvm_setup_default_irq_routing(kvm);
2802                 if (r) {
2803                         mutex_lock(&kvm->irq_lock);
2804                         kvm_ioapic_destroy(kvm);
2805                         kvm_destroy_pic(kvm);
2806                         mutex_unlock(&kvm->irq_lock);
2807                 }
2808         create_irqchip_unlock:
2809                 mutex_unlock(&kvm->lock);
2810                 break;
2811         }
2812         case KVM_CREATE_PIT:
2813                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2814                 goto create_pit;
2815         case KVM_CREATE_PIT2:
2816                 r = -EFAULT;
2817                 if (copy_from_user(&u.pit_config, argp,
2818                                    sizeof(struct kvm_pit_config)))
2819                         goto out;
2820         create_pit:
2821                 mutex_lock(&kvm->slots_lock);
2822                 r = -EEXIST;
2823                 if (kvm->arch.vpit)
2824                         goto create_pit_unlock;
2825                 r = -ENOMEM;
2826                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2827                 if (kvm->arch.vpit)
2828                         r = 0;
2829         create_pit_unlock:
2830                 mutex_unlock(&kvm->slots_lock);
2831                 break;
2832         case KVM_IRQ_LINE_STATUS:
2833         case KVM_IRQ_LINE: {
2834                 struct kvm_irq_level irq_event;
2835
2836                 r = -EFAULT;
2837                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2838                         goto out;
2839                 r = -ENXIO;
2840                 if (irqchip_in_kernel(kvm)) {
2841                         __s32 status;
2842                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2843                                         irq_event.irq, irq_event.level);
2844                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2845                                 r = -EFAULT;
2846                                 irq_event.status = status;
2847                                 if (copy_to_user(argp, &irq_event,
2848                                                         sizeof irq_event))
2849                                         goto out;
2850                         }
2851                         r = 0;
2852                 }
2853                 break;
2854         }
2855         case KVM_GET_IRQCHIP: {
2856                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2857                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2858
2859                 r = -ENOMEM;
2860                 if (!chip)
2861                         goto out;
2862                 r = -EFAULT;
2863                 if (copy_from_user(chip, argp, sizeof *chip))
2864                         goto get_irqchip_out;
2865                 r = -ENXIO;
2866                 if (!irqchip_in_kernel(kvm))
2867                         goto get_irqchip_out;
2868                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2869                 if (r)
2870                         goto get_irqchip_out;
2871                 r = -EFAULT;
2872                 if (copy_to_user(argp, chip, sizeof *chip))
2873                         goto get_irqchip_out;
2874                 r = 0;
2875         get_irqchip_out:
2876                 kfree(chip);
2877                 if (r)
2878                         goto out;
2879                 break;
2880         }
2881         case KVM_SET_IRQCHIP: {
2882                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2883                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2884
2885                 r = -ENOMEM;
2886                 if (!chip)
2887                         goto out;
2888                 r = -EFAULT;
2889                 if (copy_from_user(chip, argp, sizeof *chip))
2890                         goto set_irqchip_out;
2891                 r = -ENXIO;
2892                 if (!irqchip_in_kernel(kvm))
2893                         goto set_irqchip_out;
2894                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2895                 if (r)
2896                         goto set_irqchip_out;
2897                 r = 0;
2898         set_irqchip_out:
2899                 kfree(chip);
2900                 if (r)
2901                         goto out;
2902                 break;
2903         }
2904         case KVM_GET_PIT: {
2905                 r = -EFAULT;
2906                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2907                         goto out;
2908                 r = -ENXIO;
2909                 if (!kvm->arch.vpit)
2910                         goto out;
2911                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2912                 if (r)
2913                         goto out;
2914                 r = -EFAULT;
2915                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2916                         goto out;
2917                 r = 0;
2918                 break;
2919         }
2920         case KVM_SET_PIT: {
2921                 r = -EFAULT;
2922                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2923                         goto out;
2924                 r = -ENXIO;
2925                 if (!kvm->arch.vpit)
2926                         goto out;
2927                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2928                 if (r)
2929                         goto out;
2930                 r = 0;
2931                 break;
2932         }
2933         case KVM_GET_PIT2: {
2934                 r = -ENXIO;
2935                 if (!kvm->arch.vpit)
2936                         goto out;
2937                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2938                 if (r)
2939                         goto out;
2940                 r = -EFAULT;
2941                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2942                         goto out;
2943                 r = 0;
2944                 break;
2945         }
2946         case KVM_SET_PIT2: {
2947                 r = -EFAULT;
2948                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2949                         goto out;
2950                 r = -ENXIO;
2951                 if (!kvm->arch.vpit)
2952                         goto out;
2953                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2954                 if (r)
2955                         goto out;
2956                 r = 0;
2957                 break;
2958         }
2959         case KVM_REINJECT_CONTROL: {
2960                 struct kvm_reinject_control control;
2961                 r =  -EFAULT;
2962                 if (copy_from_user(&control, argp, sizeof(control)))
2963                         goto out;
2964                 r = kvm_vm_ioctl_reinject(kvm, &control);
2965                 if (r)
2966                         goto out;
2967                 r = 0;
2968                 break;
2969         }
2970         case KVM_XEN_HVM_CONFIG: {
2971                 r = -EFAULT;
2972                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2973                                    sizeof(struct kvm_xen_hvm_config)))
2974                         goto out;
2975                 r = -EINVAL;
2976                 if (kvm->arch.xen_hvm_config.flags)
2977                         goto out;
2978                 r = 0;
2979                 break;
2980         }
2981         case KVM_SET_CLOCK: {
2982                 struct timespec now;
2983                 struct kvm_clock_data user_ns;
2984                 u64 now_ns;
2985                 s64 delta;
2986
2987                 r = -EFAULT;
2988                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2989                         goto out;
2990
2991                 r = -EINVAL;
2992                 if (user_ns.flags)
2993                         goto out;
2994
2995                 r = 0;
2996                 ktime_get_ts(&now);
2997                 now_ns = timespec_to_ns(&now);
2998                 delta = user_ns.clock - now_ns;
2999                 kvm->arch.kvmclock_offset = delta;
3000                 break;
3001         }
3002         case KVM_GET_CLOCK: {
3003                 struct timespec now;
3004                 struct kvm_clock_data user_ns;
3005                 u64 now_ns;
3006
3007                 ktime_get_ts(&now);
3008                 now_ns = timespec_to_ns(&now);
3009                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3010                 user_ns.flags = 0;
3011
3012                 r = -EFAULT;
3013                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3014                         goto out;
3015                 r = 0;
3016                 break;
3017         }
3018
3019         default:
3020                 ;
3021         }
3022 out:
3023         return r;
3024 }
3025
3026 static void kvm_init_msr_list(void)
3027 {
3028         u32 dummy[2];
3029         unsigned i, j;
3030
3031         /* skip the first msrs in the list. KVM-specific */
3032         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3033                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3034                         continue;
3035                 if (j < i)
3036                         msrs_to_save[j] = msrs_to_save[i];
3037                 j++;
3038         }
3039         num_msrs_to_save = j;
3040 }
3041
3042 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3043                            const void *v)
3044 {
3045         if (vcpu->arch.apic &&
3046             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3047                 return 0;
3048
3049         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3050 }
3051
3052 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3053 {
3054         if (vcpu->arch.apic &&
3055             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3056                 return 0;
3057
3058         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3059 }
3060
3061 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3062 {
3063         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3064         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3065 }
3066
3067  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3068 {
3069         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3070         access |= PFERR_FETCH_MASK;
3071         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3072 }
3073
3074 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3075 {
3076         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3077         access |= PFERR_WRITE_MASK;
3078         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3079 }
3080
3081 /* uses this to access any guest's mapped memory without checking CPL */
3082 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3083 {
3084         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3085 }
3086
3087 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3088                                       struct kvm_vcpu *vcpu, u32 access,
3089                                       u32 *error)
3090 {
3091         void *data = val;
3092         int r = X86EMUL_CONTINUE;
3093
3094         while (bytes) {
3095                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3096                 unsigned offset = addr & (PAGE_SIZE-1);
3097                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3098                 int ret;
3099
3100                 if (gpa == UNMAPPED_GVA) {
3101                         r = X86EMUL_PROPAGATE_FAULT;
3102                         goto out;
3103                 }
3104                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3105                 if (ret < 0) {
3106                         r = X86EMUL_UNHANDLEABLE;
3107                         goto out;
3108                 }
3109
3110                 bytes -= toread;
3111                 data += toread;
3112                 addr += toread;
3113         }
3114 out:
3115         return r;
3116 }
3117
3118 /* used for instruction fetching */
3119 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3120                                 struct kvm_vcpu *vcpu, u32 *error)
3121 {
3122         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3123         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3124                                           access | PFERR_FETCH_MASK, error);
3125 }
3126
3127 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3128                                struct kvm_vcpu *vcpu, u32 *error)
3129 {
3130         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3131         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3132                                           error);
3133 }
3134
3135 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3136                                struct kvm_vcpu *vcpu, u32 *error)
3137 {
3138         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3139 }
3140
3141 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
3142                                 struct kvm_vcpu *vcpu, u32 *error)
3143 {
3144         void *data = val;
3145         int r = X86EMUL_CONTINUE;
3146
3147         while (bytes) {
3148                 gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error);
3149                 unsigned offset = addr & (PAGE_SIZE-1);
3150                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3151                 int ret;
3152
3153                 if (gpa == UNMAPPED_GVA) {
3154                         r = X86EMUL_PROPAGATE_FAULT;
3155                         goto out;
3156                 }
3157                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3158                 if (ret < 0) {
3159                         r = X86EMUL_UNHANDLEABLE;
3160                         goto out;
3161                 }
3162
3163                 bytes -= towrite;
3164                 data += towrite;
3165                 addr += towrite;
3166         }
3167 out:
3168         return r;
3169 }
3170
3171
3172 static int emulator_read_emulated(unsigned long addr,
3173                                   void *val,
3174                                   unsigned int bytes,
3175                                   struct kvm_vcpu *vcpu)
3176 {
3177         gpa_t                 gpa;
3178         u32 error_code;
3179
3180         if (vcpu->mmio_read_completed) {
3181                 memcpy(val, vcpu->mmio_data, bytes);
3182                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3183                                vcpu->mmio_phys_addr, *(u64 *)val);
3184                 vcpu->mmio_read_completed = 0;
3185                 return X86EMUL_CONTINUE;
3186         }
3187
3188         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3189
3190         if (gpa == UNMAPPED_GVA) {
3191                 kvm_inject_page_fault(vcpu, addr, error_code);
3192                 return X86EMUL_PROPAGATE_FAULT;
3193         }
3194
3195         /* For APIC access vmexit */
3196         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3197                 goto mmio;
3198
3199         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3200                                 == X86EMUL_CONTINUE)
3201                 return X86EMUL_CONTINUE;
3202
3203 mmio:
3204         /*
3205          * Is this MMIO handled locally?
3206          */
3207         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3208                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3209                 return X86EMUL_CONTINUE;
3210         }
3211
3212         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3213
3214         vcpu->mmio_needed = 1;
3215         vcpu->mmio_phys_addr = gpa;
3216         vcpu->mmio_size = bytes;
3217         vcpu->mmio_is_write = 0;
3218
3219         return X86EMUL_UNHANDLEABLE;
3220 }
3221
3222 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3223                           const void *val, int bytes)
3224 {
3225         int ret;
3226
3227         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3228         if (ret < 0)
3229                 return 0;
3230         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3231         return 1;
3232 }
3233
3234 static int emulator_write_emulated_onepage(unsigned long addr,
3235                                            const void *val,
3236                                            unsigned int bytes,
3237                                            struct kvm_vcpu *vcpu,
3238                                            bool mmu_only)
3239 {
3240         gpa_t                 gpa;
3241         u32 error_code;
3242
3243         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3244
3245         if (gpa == UNMAPPED_GVA) {
3246                 kvm_inject_page_fault(vcpu, addr, error_code);
3247                 return X86EMUL_PROPAGATE_FAULT;
3248         }
3249
3250         /* For APIC access vmexit */
3251         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3252                 goto mmio;
3253
3254         if (mmu_only) {
3255                 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3256                 return X86EMUL_CONTINUE;
3257         }
3258         if (emulator_write_phys(vcpu, gpa, val, bytes))
3259                 return X86EMUL_CONTINUE;
3260
3261 mmio:
3262         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3263         /*
3264          * Is this MMIO handled locally?
3265          */
3266         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3267                 return X86EMUL_CONTINUE;
3268
3269         vcpu->mmio_needed = 1;
3270         vcpu->mmio_phys_addr = gpa;
3271         vcpu->mmio_size = bytes;
3272         vcpu->mmio_is_write = 1;
3273         memcpy(vcpu->mmio_data, val, bytes);
3274
3275         return X86EMUL_CONTINUE;
3276 }
3277
3278 int __emulator_write_emulated(unsigned long addr,
3279                                    const void *val,
3280                                    unsigned int bytes,
3281                                    struct kvm_vcpu *vcpu,
3282                                    bool mmu_only)
3283 {
3284         /* Crossing a page boundary? */
3285         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3286                 int rc, now;
3287
3288                 now = -addr & ~PAGE_MASK;
3289                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu,
3290                                                      mmu_only);
3291                 if (rc != X86EMUL_CONTINUE)
3292                         return rc;
3293                 addr += now;
3294                 val += now;
3295                 bytes -= now;
3296         }
3297         return emulator_write_emulated_onepage(addr, val, bytes, vcpu,
3298                                                mmu_only);
3299 }
3300
3301 int emulator_write_emulated(unsigned long addr,
3302                                    const void *val,
3303                                    unsigned int bytes,
3304                                    struct kvm_vcpu *vcpu)
3305 {
3306         return __emulator_write_emulated(addr, val, bytes, vcpu, false);
3307 }
3308 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3309
3310 #define CMPXCHG_TYPE(t, ptr, old, new) \
3311         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3312
3313 #ifdef CONFIG_X86_64
3314 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3315 #else
3316 #  define CMPXCHG64(ptr, old, new) \
3317         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u *)(new)) == *(u64 *)(old))
3318 #endif
3319
3320 static int emulator_cmpxchg_emulated(unsigned long addr,
3321                                      const void *old,
3322                                      const void *new,
3323                                      unsigned int bytes,
3324                                      struct kvm_vcpu *vcpu)
3325 {
3326         gpa_t gpa;
3327         struct page *page;
3328         char *kaddr;
3329         bool exchanged;
3330
3331         /* guests cmpxchg8b have to be emulated atomically */
3332         if (bytes > 8 || (bytes & (bytes - 1)))
3333                 goto emul_write;
3334
3335         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3336
3337         if (gpa == UNMAPPED_GVA ||
3338             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3339                 goto emul_write;
3340
3341         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3342                 goto emul_write;
3343
3344         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3345
3346         kaddr = kmap_atomic(page, KM_USER0);
3347         kaddr += offset_in_page(gpa);
3348         switch (bytes) {
3349         case 1:
3350                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3351                 break;
3352         case 2:
3353                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3354                 break;
3355         case 4:
3356                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3357                 break;
3358         case 8:
3359                 exchanged = CMPXCHG64(kaddr, old, new);
3360                 break;
3361         default:
3362                 BUG();
3363         }
3364         kunmap_atomic(kaddr, KM_USER0);
3365         kvm_release_page_dirty(page);
3366
3367         if (!exchanged)
3368                 return X86EMUL_CMPXCHG_FAILED;
3369
3370         return __emulator_write_emulated(addr, new, bytes, vcpu, true);
3371
3372 emul_write:
3373         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3374
3375         return emulator_write_emulated(addr, new, bytes, vcpu);
3376 }
3377
3378 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3379 {
3380         return kvm_x86_ops->get_segment_base(vcpu, seg);
3381 }
3382
3383 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3384 {
3385         kvm_mmu_invlpg(vcpu, address);
3386         return X86EMUL_CONTINUE;
3387 }
3388
3389 int emulate_clts(struct kvm_vcpu *vcpu)
3390 {
3391         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3392         kvm_x86_ops->fpu_activate(vcpu);
3393         return X86EMUL_CONTINUE;
3394 }
3395
3396 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3397 {
3398         return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest);
3399 }
3400
3401 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3402 {
3403         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3404
3405         return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask);
3406 }
3407
3408 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3409 {
3410         u8 opcodes[4];
3411         unsigned long rip = kvm_rip_read(vcpu);
3412         unsigned long rip_linear;
3413
3414         if (!printk_ratelimit())
3415                 return;
3416
3417         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3418
3419         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3420
3421         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3422                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3423 }
3424 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3425
3426 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3427 {
3428         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3429 }
3430
3431 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3432 {
3433         unsigned long value;
3434
3435         switch (cr) {
3436         case 0:
3437                 value = kvm_read_cr0(vcpu);
3438                 break;
3439         case 2:
3440                 value = vcpu->arch.cr2;
3441                 break;
3442         case 3:
3443                 value = vcpu->arch.cr3;
3444                 break;
3445         case 4:
3446                 value = kvm_read_cr4(vcpu);
3447                 break;
3448         case 8:
3449                 value = kvm_get_cr8(vcpu);
3450                 break;
3451         default:
3452                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3453                 return 0;
3454         }
3455
3456         return value;
3457 }
3458
3459 static void emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3460 {
3461         switch (cr) {
3462         case 0:
3463                 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3464                 break;
3465         case 2:
3466                 vcpu->arch.cr2 = val;
3467                 break;
3468         case 3:
3469                 kvm_set_cr3(vcpu, val);
3470                 break;
3471         case 4:
3472                 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3473                 break;
3474         case 8:
3475                 kvm_set_cr8(vcpu, val & 0xfUL);
3476                 break;
3477         default:
3478                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3479         }
3480 }
3481
3482 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3483 {
3484         return kvm_x86_ops->get_cpl(vcpu);
3485 }
3486
3487 static struct x86_emulate_ops emulate_ops = {
3488         .read_std            = kvm_read_guest_virt_system,
3489         .fetch               = kvm_fetch_guest_virt,
3490         .read_emulated       = emulator_read_emulated,
3491         .write_emulated      = emulator_write_emulated,
3492         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
3493         .get_cr              = emulator_get_cr,
3494         .set_cr              = emulator_set_cr,
3495         .cpl                 = emulator_get_cpl,
3496 };
3497
3498 static void cache_all_regs(struct kvm_vcpu *vcpu)
3499 {
3500         kvm_register_read(vcpu, VCPU_REGS_RAX);
3501         kvm_register_read(vcpu, VCPU_REGS_RSP);
3502         kvm_register_read(vcpu, VCPU_REGS_RIP);
3503         vcpu->arch.regs_dirty = ~0;
3504 }
3505
3506 int emulate_instruction(struct kvm_vcpu *vcpu,
3507                         unsigned long cr2,
3508                         u16 error_code,
3509                         int emulation_type)
3510 {
3511         int r, shadow_mask;
3512         struct decode_cache *c;
3513         struct kvm_run *run = vcpu->run;
3514
3515         kvm_clear_exception_queue(vcpu);
3516         vcpu->arch.mmio_fault_cr2 = cr2;
3517         /*
3518          * TODO: fix emulate.c to use guest_read/write_register
3519          * instead of direct ->regs accesses, can save hundred cycles
3520          * on Intel for instructions that don't read/change RSP, for
3521          * for example.
3522          */
3523         cache_all_regs(vcpu);
3524
3525         vcpu->mmio_is_write = 0;
3526         vcpu->arch.pio.string = 0;
3527
3528         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3529                 int cs_db, cs_l;
3530                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3531
3532                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3533                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3534                 vcpu->arch.emulate_ctxt.mode =
3535                         (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3536                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3537                         ? X86EMUL_MODE_VM86 : cs_l
3538                         ? X86EMUL_MODE_PROT64 : cs_db
3539                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3540
3541                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3542
3543                 /* Only allow emulation of specific instructions on #UD
3544                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
3545                 c = &vcpu->arch.emulate_ctxt.decode;
3546                 if (emulation_type & EMULTYPE_TRAP_UD) {
3547                         if (!c->twobyte)
3548                                 return EMULATE_FAIL;
3549                         switch (c->b) {
3550                         case 0x01: /* VMMCALL */
3551                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3552                                         return EMULATE_FAIL;
3553                                 break;
3554                         case 0x34: /* sysenter */
3555                         case 0x35: /* sysexit */
3556                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3557                                         return EMULATE_FAIL;
3558                                 break;
3559                         case 0x05: /* syscall */
3560                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3561                                         return EMULATE_FAIL;
3562                                 break;
3563                         default:
3564                                 return EMULATE_FAIL;
3565                         }
3566
3567                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3568                                 return EMULATE_FAIL;
3569                 }
3570
3571                 ++vcpu->stat.insn_emulation;
3572                 if (r)  {
3573                         ++vcpu->stat.insn_emulation_fail;
3574                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3575                                 return EMULATE_DONE;
3576                         return EMULATE_FAIL;
3577                 }
3578         }
3579
3580         if (emulation_type & EMULTYPE_SKIP) {
3581                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3582                 return EMULATE_DONE;
3583         }
3584
3585         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3586         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3587
3588         if (r == 0)
3589                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3590
3591         if (vcpu->arch.pio.string)
3592                 return EMULATE_DO_MMIO;
3593
3594         if (r || vcpu->mmio_is_write) {
3595                 run->exit_reason = KVM_EXIT_MMIO;
3596                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3597                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3598                 run->mmio.len = vcpu->mmio_size;
3599                 run->mmio.is_write = vcpu->mmio_is_write;
3600         }
3601
3602         if (r) {
3603                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3604                         return EMULATE_DONE;
3605                 if (!vcpu->mmio_needed) {
3606                         kvm_report_emulation_failure(vcpu, "mmio");
3607                         return EMULATE_FAIL;
3608                 }
3609                 return EMULATE_DO_MMIO;
3610         }
3611
3612         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3613
3614         if (vcpu->mmio_is_write) {
3615                 vcpu->mmio_needed = 0;
3616                 return EMULATE_DO_MMIO;
3617         }
3618
3619         return EMULATE_DONE;
3620 }
3621 EXPORT_SYMBOL_GPL(emulate_instruction);
3622
3623 static int pio_copy_data(struct kvm_vcpu *vcpu)
3624 {
3625         void *p = vcpu->arch.pio_data;
3626         gva_t q = vcpu->arch.pio.guest_gva;
3627         unsigned bytes;
3628         int ret;
3629         u32 error_code;
3630
3631         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3632         if (vcpu->arch.pio.in)
3633                 ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code);
3634         else
3635                 ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code);
3636
3637         if (ret == X86EMUL_PROPAGATE_FAULT)
3638                 kvm_inject_page_fault(vcpu, q, error_code);
3639
3640         return ret;
3641 }
3642
3643 int complete_pio(struct kvm_vcpu *vcpu)
3644 {
3645         struct kvm_pio_request *io = &vcpu->arch.pio;
3646         long delta;
3647         int r;
3648         unsigned long val;
3649
3650         if (!io->string) {
3651                 if (io->in) {
3652                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3653                         memcpy(&val, vcpu->arch.pio_data, io->size);
3654                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3655                 }
3656         } else {
3657                 if (io->in) {
3658                         r = pio_copy_data(vcpu);
3659                         if (r)
3660                                 goto out;
3661                 }
3662
3663                 delta = 1;
3664                 if (io->rep) {
3665                         delta *= io->cur_count;
3666                         /*
3667                          * The size of the register should really depend on
3668                          * current address size.
3669                          */
3670                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3671                         val -= delta;
3672                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3673                 }
3674                 if (io->down)
3675                         delta = -delta;
3676                 delta *= io->size;
3677                 if (io->in) {
3678                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3679                         val += delta;
3680                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3681                 } else {
3682                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3683                         val += delta;
3684                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3685                 }
3686         }
3687 out:
3688         io->count -= io->cur_count;
3689         io->cur_count = 0;
3690
3691         return 0;
3692 }
3693
3694 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3695 {
3696         /* TODO: String I/O for in kernel device */
3697         int r;
3698
3699         if (vcpu->arch.pio.in)
3700                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3701                                     vcpu->arch.pio.size, pd);
3702         else
3703                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3704                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3705                                      pd);
3706         return r;
3707 }
3708
3709 static int pio_string_write(struct kvm_vcpu *vcpu)
3710 {
3711         struct kvm_pio_request *io = &vcpu->arch.pio;
3712         void *pd = vcpu->arch.pio_data;
3713         int i, r = 0;
3714
3715         for (i = 0; i < io->cur_count; i++) {
3716                 if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3717                                      io->port, io->size, pd)) {
3718                         r = -EOPNOTSUPP;
3719                         break;
3720                 }
3721                 pd += io->size;
3722         }
3723         return r;
3724 }
3725
3726 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3727 {
3728         unsigned long val;
3729
3730         trace_kvm_pio(!in, port, size, 1);
3731
3732         vcpu->run->exit_reason = KVM_EXIT_IO;
3733         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3734         vcpu->run->io.size = vcpu->arch.pio.size = size;
3735         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3736         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3737         vcpu->run->io.port = vcpu->arch.pio.port = port;
3738         vcpu->arch.pio.in = in;
3739         vcpu->arch.pio.string = 0;
3740         vcpu->arch.pio.down = 0;
3741         vcpu->arch.pio.rep = 0;
3742
3743         if (!vcpu->arch.pio.in) {
3744                 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3745                 memcpy(vcpu->arch.pio_data, &val, 4);
3746         }
3747
3748         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3749                 complete_pio(vcpu);
3750                 return 1;
3751         }
3752         return 0;
3753 }
3754 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3755
3756 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3757                   int size, unsigned long count, int down,
3758                   gva_t address, int rep, unsigned port)
3759 {
3760         unsigned now, in_page;
3761         int ret = 0;
3762
3763         trace_kvm_pio(!in, port, size, count);
3764
3765         vcpu->run->exit_reason = KVM_EXIT_IO;
3766         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3767         vcpu->run->io.size = vcpu->arch.pio.size = size;
3768         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3769         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3770         vcpu->run->io.port = vcpu->arch.pio.port = port;
3771         vcpu->arch.pio.in = in;
3772         vcpu->arch.pio.string = 1;
3773         vcpu->arch.pio.down = down;
3774         vcpu->arch.pio.rep = rep;
3775
3776         if (!count) {
3777                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3778                 return 1;
3779         }
3780
3781         if (!down)
3782                 in_page = PAGE_SIZE - offset_in_page(address);
3783         else
3784                 in_page = offset_in_page(address) + size;
3785         now = min(count, (unsigned long)in_page / size);
3786         if (!now)
3787                 now = 1;
3788         if (down) {
3789                 /*
3790                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3791                  */
3792                 pr_unimpl(vcpu, "guest string pio down\n");
3793                 kvm_inject_gp(vcpu, 0);
3794                 return 1;
3795         }
3796         vcpu->run->io.count = now;
3797         vcpu->arch.pio.cur_count = now;
3798
3799         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3800                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3801
3802         vcpu->arch.pio.guest_gva = address;
3803
3804         if (!vcpu->arch.pio.in) {
3805                 /* string PIO write */
3806                 ret = pio_copy_data(vcpu);
3807                 if (ret == X86EMUL_PROPAGATE_FAULT)
3808                         return 1;
3809                 if (ret == 0 && !pio_string_write(vcpu)) {
3810                         complete_pio(vcpu);
3811                         if (vcpu->arch.pio.count == 0)
3812                                 ret = 1;
3813                 }
3814         }
3815         /* no string PIO read support yet */
3816
3817         return ret;
3818 }
3819 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3820
3821 static void bounce_off(void *info)
3822 {
3823         /* nothing */
3824 }
3825
3826 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3827                                      void *data)
3828 {
3829         struct cpufreq_freqs *freq = data;
3830         struct kvm *kvm;
3831         struct kvm_vcpu *vcpu;
3832         int i, send_ipi = 0;
3833
3834         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3835                 return 0;
3836         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3837                 return 0;
3838         per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3839
3840         spin_lock(&kvm_lock);
3841         list_for_each_entry(kvm, &vm_list, vm_list) {
3842                 kvm_for_each_vcpu(i, vcpu, kvm) {
3843                         if (vcpu->cpu != freq->cpu)
3844                                 continue;
3845                         if (!kvm_request_guest_time_update(vcpu))
3846                                 continue;
3847                         if (vcpu->cpu != smp_processor_id())
3848                                 send_ipi++;
3849                 }
3850         }
3851         spin_unlock(&kvm_lock);
3852
3853         if (freq->old < freq->new && send_ipi) {
3854                 /*
3855                  * We upscale the frequency.  Must make the guest
3856                  * doesn't see old kvmclock values while running with
3857                  * the new frequency, otherwise we risk the guest sees
3858                  * time go backwards.
3859                  *
3860                  * In case we update the frequency for another cpu
3861                  * (which might be in guest context) send an interrupt
3862                  * to kick the cpu out of guest context.  Next time
3863                  * guest context is entered kvmclock will be updated,
3864                  * so the guest will not see stale values.
3865                  */
3866                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3867         }
3868         return 0;
3869 }
3870
3871 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3872         .notifier_call  = kvmclock_cpufreq_notifier
3873 };
3874
3875 static void kvm_timer_init(void)
3876 {
3877         int cpu;
3878
3879         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3880                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3881                                           CPUFREQ_TRANSITION_NOTIFIER);
3882                 for_each_online_cpu(cpu) {
3883                         unsigned long khz = cpufreq_get(cpu);
3884                         if (!khz)
3885                                 khz = tsc_khz;
3886                         per_cpu(cpu_tsc_khz, cpu) = khz;
3887                 }
3888         } else {
3889                 for_each_possible_cpu(cpu)
3890                         per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3891         }
3892 }
3893
3894 int kvm_arch_init(void *opaque)
3895 {
3896         int r;
3897         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3898
3899         if (kvm_x86_ops) {
3900                 printk(KERN_ERR "kvm: already loaded the other module\n");
3901                 r = -EEXIST;
3902                 goto out;
3903         }
3904
3905         if (!ops->cpu_has_kvm_support()) {
3906                 printk(KERN_ERR "kvm: no hardware support\n");
3907                 r = -EOPNOTSUPP;
3908                 goto out;
3909         }
3910         if (ops->disabled_by_bios()) {
3911                 printk(KERN_ERR "kvm: disabled by bios\n");
3912                 r = -EOPNOTSUPP;
3913                 goto out;
3914         }
3915
3916         r = kvm_mmu_module_init();
3917         if (r)
3918                 goto out;
3919
3920         kvm_init_msr_list();
3921
3922         kvm_x86_ops = ops;
3923         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3924         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3925         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3926                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3927
3928         kvm_timer_init();
3929
3930         return 0;
3931
3932 out:
3933         return r;
3934 }
3935
3936 void kvm_arch_exit(void)
3937 {
3938         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3939                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3940                                             CPUFREQ_TRANSITION_NOTIFIER);
3941         kvm_x86_ops = NULL;
3942         kvm_mmu_module_exit();
3943 }
3944
3945 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3946 {
3947         ++vcpu->stat.halt_exits;
3948         if (irqchip_in_kernel(vcpu->kvm)) {
3949                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3950                 return 1;
3951         } else {
3952                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3953                 return 0;
3954         }
3955 }
3956 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3957
3958 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3959                            unsigned long a1)
3960 {
3961         if (is_long_mode(vcpu))
3962                 return a0;
3963         else
3964                 return a0 | ((gpa_t)a1 << 32);
3965 }
3966
3967 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
3968 {
3969         u64 param, ingpa, outgpa, ret;
3970         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
3971         bool fast, longmode;
3972         int cs_db, cs_l;
3973
3974         /*
3975          * hypercall generates UD from non zero cpl and real mode
3976          * per HYPER-V spec
3977          */
3978         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
3979                 kvm_queue_exception(vcpu, UD_VECTOR);
3980                 return 0;
3981         }
3982
3983         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3984         longmode = is_long_mode(vcpu) && cs_l == 1;
3985
3986         if (!longmode) {
3987                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
3988                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
3989                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
3990                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
3991                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
3992                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
3993         }
3994 #ifdef CONFIG_X86_64
3995         else {
3996                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
3997                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
3998                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
3999         }
4000 #endif
4001
4002         code = param & 0xffff;
4003         fast = (param >> 16) & 0x1;
4004         rep_cnt = (param >> 32) & 0xfff;
4005         rep_idx = (param >> 48) & 0xfff;
4006
4007         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4008
4009         switch (code) {
4010         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4011                 kvm_vcpu_on_spin(vcpu);
4012                 break;
4013         default:
4014                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4015                 break;
4016         }
4017
4018         ret = res | (((u64)rep_done & 0xfff) << 32);
4019         if (longmode) {
4020                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4021         } else {
4022                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4023                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4024         }
4025
4026         return 1;
4027 }
4028
4029 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4030 {
4031         unsigned long nr, a0, a1, a2, a3, ret;
4032         int r = 1;
4033
4034         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4035                 return kvm_hv_hypercall(vcpu);
4036
4037         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4038         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4039         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4040         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4041         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4042
4043         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4044
4045         if (!is_long_mode(vcpu)) {
4046                 nr &= 0xFFFFFFFF;
4047                 a0 &= 0xFFFFFFFF;
4048                 a1 &= 0xFFFFFFFF;
4049                 a2 &= 0xFFFFFFFF;
4050                 a3 &= 0xFFFFFFFF;
4051         }
4052
4053         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4054                 ret = -KVM_EPERM;
4055                 goto out;
4056         }
4057
4058         switch (nr) {
4059         case KVM_HC_VAPIC_POLL_IRQ:
4060                 ret = 0;
4061                 break;
4062         case KVM_HC_MMU_OP:
4063                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4064                 break;
4065         default:
4066                 ret = -KVM_ENOSYS;
4067                 break;
4068         }
4069 out:
4070         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4071         ++vcpu->stat.hypercalls;
4072         return r;
4073 }
4074 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4075
4076 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4077 {
4078         char instruction[3];
4079         unsigned long rip = kvm_rip_read(vcpu);
4080
4081         /*
4082          * Blow out the MMU to ensure that no other VCPU has an active mapping
4083          * to ensure that the updated hypercall appears atomically across all
4084          * VCPUs.
4085          */
4086         kvm_mmu_zap_all(vcpu->kvm);
4087
4088         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4089
4090         return __emulator_write_emulated(rip, instruction, 3, vcpu, false);
4091 }
4092
4093 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4094 {
4095         struct desc_ptr dt = { limit, base };
4096
4097         kvm_x86_ops->set_gdt(vcpu, &dt);
4098 }
4099
4100 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4101 {
4102         struct desc_ptr dt = { limit, base };
4103
4104         kvm_x86_ops->set_idt(vcpu, &dt);
4105 }
4106
4107 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4108 {
4109         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4110         int j, nent = vcpu->arch.cpuid_nent;
4111
4112         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4113         /* when no next entry is found, the current entry[i] is reselected */
4114         for (j = i + 1; ; j = (j + 1) % nent) {
4115                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4116                 if (ej->function == e->function) {
4117                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4118                         return j;
4119                 }
4120         }
4121         return 0; /* silence gcc, even though control never reaches here */
4122 }
4123
4124 /* find an entry with matching function, matching index (if needed), and that
4125  * should be read next (if it's stateful) */
4126 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4127         u32 function, u32 index)
4128 {
4129         if (e->function != function)
4130                 return 0;
4131         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4132                 return 0;
4133         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4134             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4135                 return 0;
4136         return 1;
4137 }
4138
4139 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4140                                               u32 function, u32 index)
4141 {
4142         int i;
4143         struct kvm_cpuid_entry2 *best = NULL;
4144
4145         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4146                 struct kvm_cpuid_entry2 *e;
4147
4148                 e = &vcpu->arch.cpuid_entries[i];
4149                 if (is_matching_cpuid_entry(e, function, index)) {
4150                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4151                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4152                         best = e;
4153                         break;
4154                 }
4155                 /*
4156                  * Both basic or both extended?
4157                  */
4158                 if (((e->function ^ function) & 0x80000000) == 0)
4159                         if (!best || e->function > best->function)
4160                                 best = e;
4161         }
4162         return best;
4163 }
4164 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4165
4166 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4167 {
4168         struct kvm_cpuid_entry2 *best;
4169
4170         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4171         if (best)
4172                 return best->eax & 0xff;
4173         return 36;
4174 }
4175
4176 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4177 {
4178         u32 function, index;
4179         struct kvm_cpuid_entry2 *best;
4180
4181         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4182         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4183         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4184         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4185         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4186         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4187         best = kvm_find_cpuid_entry(vcpu, function, index);
4188         if (best) {
4189                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4190                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4191                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4192                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4193         }
4194         kvm_x86_ops->skip_emulated_instruction(vcpu);
4195         trace_kvm_cpuid(function,
4196                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4197                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4198                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4199                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4200 }
4201 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4202
4203 /*
4204  * Check if userspace requested an interrupt window, and that the
4205  * interrupt window is open.
4206  *
4207  * No need to exit to userspace if we already have an interrupt queued.
4208  */
4209 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4210 {
4211         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4212                 vcpu->run->request_interrupt_window &&
4213                 kvm_arch_interrupt_allowed(vcpu));
4214 }
4215
4216 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4217 {
4218         struct kvm_run *kvm_run = vcpu->run;
4219
4220         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4221         kvm_run->cr8 = kvm_get_cr8(vcpu);
4222         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4223         if (irqchip_in_kernel(vcpu->kvm))
4224                 kvm_run->ready_for_interrupt_injection = 1;
4225         else
4226                 kvm_run->ready_for_interrupt_injection =
4227                         kvm_arch_interrupt_allowed(vcpu) &&
4228                         !kvm_cpu_has_interrupt(vcpu) &&
4229                         !kvm_event_needs_reinjection(vcpu);
4230 }
4231
4232 static void vapic_enter(struct kvm_vcpu *vcpu)
4233 {
4234         struct kvm_lapic *apic = vcpu->arch.apic;
4235         struct page *page;
4236
4237         if (!apic || !apic->vapic_addr)
4238                 return;
4239
4240         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4241
4242         vcpu->arch.apic->vapic_page = page;
4243 }
4244
4245 static void vapic_exit(struct kvm_vcpu *vcpu)
4246 {
4247         struct kvm_lapic *apic = vcpu->arch.apic;
4248         int idx;
4249
4250         if (!apic || !apic->vapic_addr)
4251                 return;
4252
4253         idx = srcu_read_lock(&vcpu->kvm->srcu);
4254         kvm_release_page_dirty(apic->vapic_page);
4255         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4256         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4257 }
4258
4259 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4260 {
4261         int max_irr, tpr;
4262
4263         if (!kvm_x86_ops->update_cr8_intercept)
4264                 return;
4265
4266         if (!vcpu->arch.apic)
4267                 return;
4268
4269         if (!vcpu->arch.apic->vapic_addr)
4270                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4271         else
4272                 max_irr = -1;
4273
4274         if (max_irr != -1)
4275                 max_irr >>= 4;
4276
4277         tpr = kvm_lapic_get_cr8(vcpu);
4278
4279         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4280 }
4281
4282 static void inject_pending_event(struct kvm_vcpu *vcpu)
4283 {
4284         /* try to reinject previous events if any */
4285         if (vcpu->arch.exception.pending) {
4286                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4287                                         vcpu->arch.exception.has_error_code,
4288                                         vcpu->arch.exception.error_code);
4289                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4290                                           vcpu->arch.exception.has_error_code,
4291                                           vcpu->arch.exception.error_code);
4292                 return;
4293         }
4294
4295         if (vcpu->arch.nmi_injected) {
4296                 kvm_x86_ops->set_nmi(vcpu);
4297                 return;
4298         }
4299
4300         if (vcpu->arch.interrupt.pending) {
4301                 kvm_x86_ops->set_irq(vcpu);
4302                 return;
4303         }
4304
4305         /* try to inject new event if pending */
4306         if (vcpu->arch.nmi_pending) {
4307                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4308                         vcpu->arch.nmi_pending = false;
4309                         vcpu->arch.nmi_injected = true;
4310                         kvm_x86_ops->set_nmi(vcpu);
4311                 }
4312         } else if (kvm_cpu_has_interrupt(vcpu)) {
4313                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4314                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4315                                             false);
4316                         kvm_x86_ops->set_irq(vcpu);
4317                 }
4318         }
4319 }
4320
4321 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4322 {
4323         int r;
4324         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4325                 vcpu->run->request_interrupt_window;
4326
4327         if (vcpu->requests)
4328                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4329                         kvm_mmu_unload(vcpu);
4330
4331         r = kvm_mmu_reload(vcpu);
4332         if (unlikely(r))
4333                 goto out;
4334
4335         if (vcpu->requests) {
4336                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4337                         __kvm_migrate_timers(vcpu);
4338                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4339                         kvm_write_guest_time(vcpu);
4340                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4341                         kvm_mmu_sync_roots(vcpu);
4342                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4343                         kvm_x86_ops->tlb_flush(vcpu);
4344                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4345                                        &vcpu->requests)) {
4346                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4347                         r = 0;
4348                         goto out;
4349                 }
4350                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4351                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4352                         r = 0;
4353                         goto out;
4354                 }
4355                 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4356                         vcpu->fpu_active = 0;
4357                         kvm_x86_ops->fpu_deactivate(vcpu);
4358                 }
4359         }
4360
4361         preempt_disable();
4362
4363         kvm_x86_ops->prepare_guest_switch(vcpu);
4364         if (vcpu->fpu_active)
4365                 kvm_load_guest_fpu(vcpu);
4366
4367         local_irq_disable();
4368
4369         clear_bit(KVM_REQ_KICK, &vcpu->requests);
4370         smp_mb__after_clear_bit();
4371
4372         if (vcpu->requests || need_resched() || signal_pending(current)) {
4373                 set_bit(KVM_REQ_KICK, &vcpu->requests);
4374                 local_irq_enable();
4375                 preempt_enable();
4376                 r = 1;
4377                 goto out;
4378         }
4379
4380         inject_pending_event(vcpu);
4381
4382         /* enable NMI/IRQ window open exits if needed */
4383         if (vcpu->arch.nmi_pending)
4384                 kvm_x86_ops->enable_nmi_window(vcpu);
4385         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4386                 kvm_x86_ops->enable_irq_window(vcpu);
4387
4388         if (kvm_lapic_enabled(vcpu)) {
4389                 update_cr8_intercept(vcpu);
4390                 kvm_lapic_sync_to_vapic(vcpu);
4391         }
4392
4393         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4394
4395         kvm_guest_enter();
4396
4397         if (unlikely(vcpu->arch.switch_db_regs)) {
4398                 set_debugreg(0, 7);
4399                 set_debugreg(vcpu->arch.eff_db[0], 0);
4400                 set_debugreg(vcpu->arch.eff_db[1], 1);
4401                 set_debugreg(vcpu->arch.eff_db[2], 2);
4402                 set_debugreg(vcpu->arch.eff_db[3], 3);
4403         }
4404
4405         trace_kvm_entry(vcpu->vcpu_id);
4406         kvm_x86_ops->run(vcpu);
4407
4408         /*
4409          * If the guest has used debug registers, at least dr7
4410          * will be disabled while returning to the host.
4411          * If we don't have active breakpoints in the host, we don't
4412          * care about the messed up debug address registers. But if
4413          * we have some of them active, restore the old state.
4414          */
4415         if (hw_breakpoint_active())
4416                 hw_breakpoint_restore();
4417
4418         set_bit(KVM_REQ_KICK, &vcpu->requests);
4419         local_irq_enable();
4420
4421         ++vcpu->stat.exits;
4422
4423         /*
4424          * We must have an instruction between local_irq_enable() and
4425          * kvm_guest_exit(), so the timer interrupt isn't delayed by
4426          * the interrupt shadow.  The stat.exits increment will do nicely.
4427          * But we need to prevent reordering, hence this barrier():
4428          */
4429         barrier();
4430
4431         kvm_guest_exit();
4432
4433         preempt_enable();
4434
4435         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4436
4437         /*
4438          * Profile KVM exit RIPs:
4439          */
4440         if (unlikely(prof_on == KVM_PROFILING)) {
4441                 unsigned long rip = kvm_rip_read(vcpu);
4442                 profile_hit(KVM_PROFILING, (void *)rip);
4443         }
4444
4445
4446         kvm_lapic_sync_from_vapic(vcpu);
4447
4448         r = kvm_x86_ops->handle_exit(vcpu);
4449 out:
4450         return r;
4451 }
4452
4453
4454 static int __vcpu_run(struct kvm_vcpu *vcpu)
4455 {
4456         int r;
4457         struct kvm *kvm = vcpu->kvm;
4458
4459         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4460                 pr_debug("vcpu %d received sipi with vector # %x\n",
4461                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
4462                 kvm_lapic_reset(vcpu);
4463                 r = kvm_arch_vcpu_reset(vcpu);
4464                 if (r)
4465                         return r;
4466                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4467         }
4468
4469         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4470         vapic_enter(vcpu);
4471
4472         r = 1;
4473         while (r > 0) {
4474                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4475                         r = vcpu_enter_guest(vcpu);
4476                 else {
4477                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4478                         kvm_vcpu_block(vcpu);
4479                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4480                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4481                         {
4482                                 switch(vcpu->arch.mp_state) {
4483                                 case KVM_MP_STATE_HALTED:
4484                                         vcpu->arch.mp_state =
4485                                                 KVM_MP_STATE_RUNNABLE;
4486                                 case KVM_MP_STATE_RUNNABLE:
4487                                         break;
4488                                 case KVM_MP_STATE_SIPI_RECEIVED:
4489                                 default:
4490                                         r = -EINTR;
4491                                         break;
4492                                 }
4493                         }
4494                 }
4495
4496                 if (r <= 0)
4497                         break;
4498
4499                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4500                 if (kvm_cpu_has_pending_timer(vcpu))
4501                         kvm_inject_pending_timer_irqs(vcpu);
4502
4503                 if (dm_request_for_irq_injection(vcpu)) {
4504                         r = -EINTR;
4505                         vcpu->run->exit_reason = KVM_EXIT_INTR;
4506                         ++vcpu->stat.request_irq_exits;
4507                 }
4508                 if (signal_pending(current)) {
4509                         r = -EINTR;
4510                         vcpu->run->exit_reason = KVM_EXIT_INTR;
4511                         ++vcpu->stat.signal_exits;
4512                 }
4513                 if (need_resched()) {
4514                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4515                         kvm_resched(vcpu);
4516                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4517                 }
4518         }
4519
4520         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4521         post_kvm_run_save(vcpu);
4522
4523         vapic_exit(vcpu);
4524
4525         return r;
4526 }
4527
4528 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4529 {
4530         int r;
4531         sigset_t sigsaved;
4532
4533         vcpu_load(vcpu);
4534
4535         if (vcpu->sigset_active)
4536                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4537
4538         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4539                 kvm_vcpu_block(vcpu);
4540                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4541                 r = -EAGAIN;
4542                 goto out;
4543         }
4544
4545         /* re-sync apic's tpr */
4546         if (!irqchip_in_kernel(vcpu->kvm))
4547                 kvm_set_cr8(vcpu, kvm_run->cr8);
4548
4549         if (vcpu->arch.pio.cur_count) {
4550                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4551                 r = complete_pio(vcpu);
4552                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4553                 if (r)
4554                         goto out;
4555         }
4556         if (vcpu->mmio_needed) {
4557                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4558                 vcpu->mmio_read_completed = 1;
4559                 vcpu->mmio_needed = 0;
4560
4561                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4562                 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4563                                         EMULTYPE_NO_DECODE);
4564                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4565                 if (r == EMULATE_DO_MMIO) {
4566                         /*
4567                          * Read-modify-write.  Back to userspace.
4568                          */
4569                         r = 0;
4570                         goto out;
4571                 }
4572         }
4573         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4574                 kvm_register_write(vcpu, VCPU_REGS_RAX,
4575                                      kvm_run->hypercall.ret);
4576
4577         r = __vcpu_run(vcpu);
4578
4579 out:
4580         if (vcpu->sigset_active)
4581                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4582
4583         vcpu_put(vcpu);
4584         return r;
4585 }
4586
4587 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4588 {
4589         vcpu_load(vcpu);
4590
4591         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4592         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4593         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4594         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4595         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4596         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4597         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4598         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4599 #ifdef CONFIG_X86_64
4600         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4601         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4602         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4603         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4604         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4605         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4606         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4607         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4608 #endif
4609
4610         regs->rip = kvm_rip_read(vcpu);
4611         regs->rflags = kvm_get_rflags(vcpu);
4612
4613         vcpu_put(vcpu);
4614
4615         return 0;
4616 }
4617
4618 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4619 {
4620         vcpu_load(vcpu);
4621
4622         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4623         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4624         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4625         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4626         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4627         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4628         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4629         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4630 #ifdef CONFIG_X86_64
4631         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4632         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4633         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4634         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4635         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4636         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4637         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4638         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4639 #endif
4640
4641         kvm_rip_write(vcpu, regs->rip);
4642         kvm_set_rflags(vcpu, regs->rflags);
4643
4644         vcpu->arch.exception.pending = false;
4645
4646         vcpu_put(vcpu);
4647
4648         return 0;
4649 }
4650
4651 void kvm_get_segment(struct kvm_vcpu *vcpu,
4652                      struct kvm_segment *var, int seg)
4653 {
4654         kvm_x86_ops->get_segment(vcpu, var, seg);
4655 }
4656
4657 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4658 {
4659         struct kvm_segment cs;
4660
4661         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4662         *db = cs.db;
4663         *l = cs.l;
4664 }
4665 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4666
4667 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4668                                   struct kvm_sregs *sregs)
4669 {
4670         struct desc_ptr dt;
4671
4672         vcpu_load(vcpu);
4673
4674         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4675         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4676         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4677         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4678         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4679         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4680
4681         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4682         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4683
4684         kvm_x86_ops->get_idt(vcpu, &dt);
4685         sregs->idt.limit = dt.size;
4686         sregs->idt.base = dt.address;
4687         kvm_x86_ops->get_gdt(vcpu, &dt);
4688         sregs->gdt.limit = dt.size;
4689         sregs->gdt.base = dt.address;
4690
4691         sregs->cr0 = kvm_read_cr0(vcpu);
4692         sregs->cr2 = vcpu->arch.cr2;
4693         sregs->cr3 = vcpu->arch.cr3;
4694         sregs->cr4 = kvm_read_cr4(vcpu);
4695         sregs->cr8 = kvm_get_cr8(vcpu);
4696         sregs->efer = vcpu->arch.efer;
4697         sregs->apic_base = kvm_get_apic_base(vcpu);
4698
4699         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4700
4701         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4702                 set_bit(vcpu->arch.interrupt.nr,
4703                         (unsigned long *)sregs->interrupt_bitmap);
4704
4705         vcpu_put(vcpu);
4706
4707         return 0;
4708 }
4709
4710 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4711                                     struct kvm_mp_state *mp_state)
4712 {
4713         vcpu_load(vcpu);
4714         mp_state->mp_state = vcpu->arch.mp_state;
4715         vcpu_put(vcpu);
4716         return 0;
4717 }
4718
4719 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4720                                     struct kvm_mp_state *mp_state)
4721 {
4722         vcpu_load(vcpu);
4723         vcpu->arch.mp_state = mp_state->mp_state;
4724         vcpu_put(vcpu);
4725         return 0;
4726 }
4727
4728 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4729                         struct kvm_segment *var, int seg)
4730 {
4731         kvm_x86_ops->set_segment(vcpu, var, seg);
4732 }
4733
4734 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4735                                    struct kvm_segment *kvm_desct)
4736 {
4737         kvm_desct->base = get_desc_base(seg_desc);
4738         kvm_desct->limit = get_desc_limit(seg_desc);
4739         if (seg_desc->g) {
4740                 kvm_desct->limit <<= 12;
4741                 kvm_desct->limit |= 0xfff;
4742         }
4743         kvm_desct->selector = selector;
4744         kvm_desct->type = seg_desc->type;
4745         kvm_desct->present = seg_desc->p;
4746         kvm_desct->dpl = seg_desc->dpl;
4747         kvm_desct->db = seg_desc->d;
4748         kvm_desct->s = seg_desc->s;
4749         kvm_desct->l = seg_desc->l;
4750         kvm_desct->g = seg_desc->g;
4751         kvm_desct->avl = seg_desc->avl;
4752         if (!selector)
4753                 kvm_desct->unusable = 1;
4754         else
4755                 kvm_desct->unusable = 0;
4756         kvm_desct->padding = 0;
4757 }
4758
4759 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4760                                           u16 selector,
4761                                           struct desc_ptr *dtable)
4762 {
4763         if (selector & 1 << 2) {
4764                 struct kvm_segment kvm_seg;
4765
4766                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4767
4768                 if (kvm_seg.unusable)
4769                         dtable->size = 0;
4770                 else
4771                         dtable->size = kvm_seg.limit;
4772                 dtable->address = kvm_seg.base;
4773         }
4774         else
4775                 kvm_x86_ops->get_gdt(vcpu, dtable);
4776 }
4777
4778 /* allowed just for 8 bytes segments */
4779 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4780                                          struct desc_struct *seg_desc)
4781 {
4782         struct desc_ptr dtable;
4783         u16 index = selector >> 3;
4784         int ret;
4785         u32 err;
4786         gva_t addr;
4787
4788         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4789
4790         if (dtable.size < index * 8 + 7) {
4791                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4792                 return X86EMUL_PROPAGATE_FAULT;
4793         }
4794         addr = dtable.base + index * 8;
4795         ret = kvm_read_guest_virt_system(addr, seg_desc, sizeof(*seg_desc),
4796                                          vcpu,  &err);
4797         if (ret == X86EMUL_PROPAGATE_FAULT)
4798                 kvm_inject_page_fault(vcpu, addr, err);
4799
4800        return ret;
4801 }
4802
4803 /* allowed just for 8 bytes segments */
4804 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4805                                          struct desc_struct *seg_desc)
4806 {
4807         struct desc_ptr dtable;
4808         u16 index = selector >> 3;
4809
4810         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4811
4812         if (dtable.size < index * 8 + 7)
4813                 return 1;
4814         return kvm_write_guest_virt(dtable.address + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL);
4815 }
4816
4817 static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu,
4818                                struct desc_struct *seg_desc)
4819 {
4820         u32 base_addr = get_desc_base(seg_desc);
4821
4822         return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL);
4823 }
4824
4825 static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu,
4826                              struct desc_struct *seg_desc)
4827 {
4828         u32 base_addr = get_desc_base(seg_desc);
4829
4830         return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL);
4831 }
4832
4833 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4834 {
4835         struct kvm_segment kvm_seg;
4836
4837         kvm_get_segment(vcpu, &kvm_seg, seg);
4838         return kvm_seg.selector;
4839 }
4840
4841 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4842 {
4843         struct kvm_segment segvar = {
4844                 .base = selector << 4,
4845                 .limit = 0xffff,
4846                 .selector = selector,
4847                 .type = 3,
4848                 .present = 1,
4849                 .dpl = 3,
4850                 .db = 0,
4851                 .s = 1,
4852                 .l = 0,
4853                 .g = 0,
4854                 .avl = 0,
4855                 .unusable = 0,
4856         };
4857         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4858         return X86EMUL_CONTINUE;
4859 }
4860
4861 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4862 {
4863         return (seg != VCPU_SREG_LDTR) &&
4864                 (seg != VCPU_SREG_TR) &&
4865                 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4866 }
4867
4868 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg)
4869 {
4870         struct kvm_segment kvm_seg;
4871         struct desc_struct seg_desc;
4872         u8 dpl, rpl, cpl;
4873         unsigned err_vec = GP_VECTOR;
4874         u32 err_code = 0;
4875         bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
4876         int ret;
4877
4878         if (is_vm86_segment(vcpu, seg) || !is_protmode(vcpu))
4879                 return kvm_load_realmode_segment(vcpu, selector, seg);
4880
4881         /* NULL selector is not valid for TR, CS and SS */
4882         if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
4883             && null_selector)
4884                 goto exception;
4885
4886         /* TR should be in GDT only */
4887         if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
4888                 goto exception;
4889
4890         ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc);
4891         if (ret)
4892                 return ret;
4893
4894         seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg);
4895
4896         if (null_selector) { /* for NULL selector skip all following checks */
4897                 kvm_seg.unusable = 1;
4898                 goto load;
4899         }
4900
4901         err_code = selector & 0xfffc;
4902         err_vec = GP_VECTOR;
4903
4904         /* can't load system descriptor into segment selecor */
4905         if (seg <= VCPU_SREG_GS && !kvm_seg.s)
4906                 goto exception;
4907
4908         if (!kvm_seg.present) {
4909                 err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
4910                 goto exception;
4911         }
4912
4913         rpl = selector & 3;
4914         dpl = kvm_seg.dpl;
4915         cpl = kvm_x86_ops->get_cpl(vcpu);
4916
4917         switch (seg) {
4918         case VCPU_SREG_SS:
4919                 /*
4920                  * segment is not a writable data segment or segment
4921                  * selector's RPL != CPL or segment selector's RPL != CPL
4922                  */
4923                 if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl)
4924                         goto exception;
4925                 break;
4926         case VCPU_SREG_CS:
4927                 if (!(kvm_seg.type & 8))
4928                         goto exception;
4929
4930                 if (kvm_seg.type & 4) {
4931                         /* conforming */
4932                         if (dpl > cpl)
4933                                 goto exception;
4934                 } else {
4935                         /* nonconforming */
4936                         if (rpl > cpl || dpl != cpl)
4937                                 goto exception;
4938                 }
4939                 /* CS(RPL) <- CPL */
4940                 selector = (selector & 0xfffc) | cpl;
4941             break;
4942         case VCPU_SREG_TR:
4943                 if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9))
4944                         goto exception;
4945                 break;
4946         case VCPU_SREG_LDTR:
4947                 if (kvm_seg.s || kvm_seg.type != 2)
4948                         goto exception;
4949                 break;
4950         default: /*  DS, ES, FS, or GS */
4951                 /*
4952                  * segment is not a data or readable code segment or
4953                  * ((segment is a data or nonconforming code segment)
4954                  * and (both RPL and CPL > DPL))
4955                  */
4956                 if ((kvm_seg.type & 0xa) == 0x8 ||
4957                     (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl)))
4958                         goto exception;
4959                 break;
4960         }
4961
4962         if (!kvm_seg.unusable && kvm_seg.s) {
4963                 /* mark segment as accessed */
4964                 kvm_seg.type |= 1;
4965                 seg_desc.type |= 1;
4966                 save_guest_segment_descriptor(vcpu, selector, &seg_desc);
4967         }
4968 load:
4969         kvm_set_segment(vcpu, &kvm_seg, seg);
4970         return X86EMUL_CONTINUE;
4971 exception:
4972         kvm_queue_exception_e(vcpu, err_vec, err_code);
4973         return X86EMUL_PROPAGATE_FAULT;
4974 }
4975
4976 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4977                                 struct tss_segment_32 *tss)
4978 {
4979         tss->cr3 = vcpu->arch.cr3;
4980         tss->eip = kvm_rip_read(vcpu);
4981         tss->eflags = kvm_get_rflags(vcpu);
4982         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4983         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4984         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4985         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4986         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4987         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4988         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4989         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4990         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4991         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4992         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4993         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4994         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4995         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4996         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4997 }
4998
4999 static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg)
5000 {
5001         struct kvm_segment kvm_seg;
5002         kvm_get_segment(vcpu, &kvm_seg, seg);
5003         kvm_seg.selector = sel;
5004         kvm_set_segment(vcpu, &kvm_seg, seg);
5005 }
5006
5007 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
5008                                   struct tss_segment_32 *tss)
5009 {
5010         kvm_set_cr3(vcpu, tss->cr3);
5011
5012         kvm_rip_write(vcpu, tss->eip);
5013         kvm_set_rflags(vcpu, tss->eflags | 2);
5014
5015         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
5016         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
5017         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
5018         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
5019         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
5020         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
5021         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
5022         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
5023
5024         /*
5025          * SDM says that segment selectors are loaded before segment
5026          * descriptors
5027          */
5028         kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR);
5029         kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
5030         kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
5031         kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
5032         kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
5033         kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS);
5034         kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS);
5035
5036         /*
5037          * Now load segment descriptors. If fault happenes at this stage
5038          * it is handled in a context of new task
5039          */
5040         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR))
5041                 return 1;
5042
5043         if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
5044                 return 1;
5045
5046         if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
5047                 return 1;
5048
5049         if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
5050                 return 1;
5051
5052         if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
5053                 return 1;
5054
5055         if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS))
5056                 return 1;
5057
5058         if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS))
5059                 return 1;
5060         return 0;
5061 }
5062
5063 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
5064                                 struct tss_segment_16 *tss)
5065 {
5066         tss->ip = kvm_rip_read(vcpu);
5067         tss->flag = kvm_get_rflags(vcpu);
5068         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5069         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5070         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5071         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5072         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5073         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5074         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
5075         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
5076
5077         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
5078         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
5079         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
5080         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
5081         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
5082 }
5083
5084 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
5085                                  struct tss_segment_16 *tss)
5086 {
5087         kvm_rip_write(vcpu, tss->ip);
5088         kvm_set_rflags(vcpu, tss->flag | 2);
5089         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
5090         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
5091         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
5092         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
5093         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
5094         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
5095         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
5096         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
5097
5098         /*
5099          * SDM says that segment selectors are loaded before segment
5100          * descriptors
5101          */
5102         kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR);
5103         kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
5104         kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
5105         kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
5106         kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
5107
5108         /*
5109          * Now load segment descriptors. If fault happenes at this stage
5110          * it is handled in a context of new task
5111          */
5112         if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR))
5113                 return 1;
5114
5115         if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
5116                 return 1;
5117
5118         if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
5119                 return 1;
5120
5121         if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
5122                 return 1;
5123
5124         if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
5125                 return 1;
5126         return 0;
5127 }
5128
5129 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
5130                               u16 old_tss_sel, u32 old_tss_base,
5131                               struct desc_struct *nseg_desc)
5132 {
5133         struct tss_segment_16 tss_segment_16;
5134         int ret = 0;
5135
5136         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5137                            sizeof tss_segment_16))
5138                 goto out;
5139
5140         save_state_to_tss16(vcpu, &tss_segment_16);
5141
5142         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5143                             sizeof tss_segment_16))
5144                 goto out;
5145
5146         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5147                            &tss_segment_16, sizeof tss_segment_16))
5148                 goto out;
5149
5150         if (old_tss_sel != 0xffff) {
5151                 tss_segment_16.prev_task_link = old_tss_sel;
5152
5153                 if (kvm_write_guest(vcpu->kvm,
5154                                     get_tss_base_addr_write(vcpu, nseg_desc),
5155                                     &tss_segment_16.prev_task_link,
5156                                     sizeof tss_segment_16.prev_task_link))
5157                         goto out;
5158         }
5159
5160         if (load_state_from_tss16(vcpu, &tss_segment_16))
5161                 goto out;
5162
5163         ret = 1;
5164 out:
5165         return ret;
5166 }
5167
5168 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
5169                        u16 old_tss_sel, u32 old_tss_base,
5170                        struct desc_struct *nseg_desc)
5171 {
5172         struct tss_segment_32 tss_segment_32;
5173         int ret = 0;
5174
5175         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5176                            sizeof tss_segment_32))
5177                 goto out;
5178
5179         save_state_to_tss32(vcpu, &tss_segment_32);
5180
5181         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5182                             sizeof tss_segment_32))
5183                 goto out;
5184
5185         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5186                            &tss_segment_32, sizeof tss_segment_32))
5187                 goto out;
5188
5189         if (old_tss_sel != 0xffff) {
5190                 tss_segment_32.prev_task_link = old_tss_sel;
5191
5192                 if (kvm_write_guest(vcpu->kvm,
5193                                     get_tss_base_addr_write(vcpu, nseg_desc),
5194                                     &tss_segment_32.prev_task_link,
5195                                     sizeof tss_segment_32.prev_task_link))
5196                         goto out;
5197         }
5198
5199         if (load_state_from_tss32(vcpu, &tss_segment_32))
5200                 goto out;
5201
5202         ret = 1;
5203 out:
5204         return ret;
5205 }
5206
5207 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
5208 {
5209         struct kvm_segment tr_seg;
5210         struct desc_struct cseg_desc;
5211         struct desc_struct nseg_desc;
5212         int ret = 0;
5213         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
5214         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
5215         u32 desc_limit;
5216
5217         old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL);
5218
5219         /* FIXME: Handle errors. Failure to read either TSS or their
5220          * descriptors should generate a pagefault.
5221          */
5222         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
5223                 goto out;
5224
5225         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
5226                 goto out;
5227
5228         if (reason != TASK_SWITCH_IRET) {
5229                 int cpl;
5230
5231                 cpl = kvm_x86_ops->get_cpl(vcpu);
5232                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
5233                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
5234                         return 1;
5235                 }
5236         }
5237
5238         desc_limit = get_desc_limit(&nseg_desc);
5239         if (!nseg_desc.p ||
5240             ((desc_limit < 0x67 && (nseg_desc.type & 8)) ||
5241              desc_limit < 0x2b)) {
5242                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
5243                 return 1;
5244         }
5245
5246         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
5247                 cseg_desc.type &= ~(1 << 1); //clear the B flag
5248                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
5249         }
5250
5251         if (reason == TASK_SWITCH_IRET) {
5252                 u32 eflags = kvm_get_rflags(vcpu);
5253                 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
5254         }
5255
5256         /* set back link to prev task only if NT bit is set in eflags
5257            note that old_tss_sel is not used afetr this point */
5258         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
5259                 old_tss_sel = 0xffff;
5260
5261         if (nseg_desc.type & 8)
5262                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
5263                                          old_tss_base, &nseg_desc);
5264         else
5265                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
5266                                          old_tss_base, &nseg_desc);
5267
5268         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
5269                 u32 eflags = kvm_get_rflags(vcpu);
5270                 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
5271         }
5272
5273         if (reason != TASK_SWITCH_IRET) {
5274                 nseg_desc.type |= (1 << 1);
5275                 save_guest_segment_descriptor(vcpu, tss_selector,
5276                                               &nseg_desc);
5277         }
5278
5279         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS);
5280         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
5281         tr_seg.type = 11;
5282         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
5283 out:
5284         return ret;
5285 }
5286 EXPORT_SYMBOL_GPL(kvm_task_switch);
5287
5288 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5289                                   struct kvm_sregs *sregs)
5290 {
5291         int mmu_reset_needed = 0;
5292         int pending_vec, max_bits;
5293         struct desc_ptr dt;
5294
5295         vcpu_load(vcpu);
5296
5297         dt.size = sregs->idt.limit;
5298         dt.address = sregs->idt.base;
5299         kvm_x86_ops->set_idt(vcpu, &dt);
5300         dt.size = sregs->gdt.limit;
5301         dt.address = sregs->gdt.base;
5302         kvm_x86_ops->set_gdt(vcpu, &dt);
5303
5304         vcpu->arch.cr2 = sregs->cr2;
5305         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5306         vcpu->arch.cr3 = sregs->cr3;
5307
5308         kvm_set_cr8(vcpu, sregs->cr8);
5309
5310         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5311         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5312         kvm_set_apic_base(vcpu, sregs->apic_base);
5313
5314         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5315         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5316         vcpu->arch.cr0 = sregs->cr0;
5317
5318         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5319         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5320         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5321                 load_pdptrs(vcpu, vcpu->arch.cr3);
5322                 mmu_reset_needed = 1;
5323         }
5324
5325         if (mmu_reset_needed)
5326                 kvm_mmu_reset_context(vcpu);
5327
5328         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5329         pending_vec = find_first_bit(
5330                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5331         if (pending_vec < max_bits) {
5332                 kvm_queue_interrupt(vcpu, pending_vec, false);
5333                 pr_debug("Set back pending irq %d\n", pending_vec);
5334                 if (irqchip_in_kernel(vcpu->kvm))
5335                         kvm_pic_clear_isr_ack(vcpu->kvm);
5336         }
5337
5338         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5339         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5340         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5341         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5342         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5343         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5344
5345         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5346         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5347
5348         update_cr8_intercept(vcpu);
5349
5350         /* Older userspace won't unhalt the vcpu on reset. */
5351         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5352             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5353             !is_protmode(vcpu))
5354                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5355
5356         vcpu_put(vcpu);
5357
5358         return 0;
5359 }
5360
5361 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5362                                         struct kvm_guest_debug *dbg)
5363 {
5364         unsigned long rflags;
5365         int i, r;
5366
5367         vcpu_load(vcpu);
5368
5369         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5370                 r = -EBUSY;
5371                 if (vcpu->arch.exception.pending)
5372                         goto unlock_out;
5373                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5374                         kvm_queue_exception(vcpu, DB_VECTOR);
5375                 else
5376                         kvm_queue_exception(vcpu, BP_VECTOR);
5377         }
5378
5379         /*
5380          * Read rflags as long as potentially injected trace flags are still
5381          * filtered out.
5382          */
5383         rflags = kvm_get_rflags(vcpu);
5384
5385         vcpu->guest_debug = dbg->control;
5386         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5387                 vcpu->guest_debug = 0;
5388
5389         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5390                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5391                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5392                 vcpu->arch.switch_db_regs =
5393                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5394         } else {
5395                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5396                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5397                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5398         }
5399
5400         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5401                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5402                         get_segment_base(vcpu, VCPU_SREG_CS);
5403
5404         /*
5405          * Trigger an rflags update that will inject or remove the trace
5406          * flags.
5407          */
5408         kvm_set_rflags(vcpu, rflags);
5409
5410         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5411
5412         r = 0;
5413
5414 unlock_out:
5415         vcpu_put(vcpu);
5416
5417         return r;
5418 }
5419
5420 /*
5421  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
5422  * we have asm/x86/processor.h
5423  */
5424 struct fxsave {
5425         u16     cwd;
5426         u16     swd;
5427         u16     twd;
5428         u16     fop;
5429         u64     rip;
5430         u64     rdp;
5431         u32     mxcsr;
5432         u32     mxcsr_mask;
5433         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
5434 #ifdef CONFIG_X86_64
5435         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
5436 #else
5437         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
5438 #endif
5439 };
5440
5441 /*
5442  * Translate a guest virtual address to a guest physical address.
5443  */
5444 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5445                                     struct kvm_translation *tr)
5446 {
5447         unsigned long vaddr = tr->linear_address;
5448         gpa_t gpa;
5449         int idx;
5450
5451         vcpu_load(vcpu);
5452         idx = srcu_read_lock(&vcpu->kvm->srcu);
5453         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5454         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5455         tr->physical_address = gpa;
5456         tr->valid = gpa != UNMAPPED_GVA;
5457         tr->writeable = 1;
5458         tr->usermode = 0;
5459         vcpu_put(vcpu);
5460
5461         return 0;
5462 }
5463
5464 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5465 {
5466         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5467
5468         vcpu_load(vcpu);
5469
5470         memcpy(fpu->fpr, fxsave->st_space, 128);
5471         fpu->fcw = fxsave->cwd;
5472         fpu->fsw = fxsave->swd;
5473         fpu->ftwx = fxsave->twd;
5474         fpu->last_opcode = fxsave->fop;
5475         fpu->last_ip = fxsave->rip;
5476         fpu->last_dp = fxsave->rdp;
5477         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5478
5479         vcpu_put(vcpu);
5480
5481         return 0;
5482 }
5483
5484 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5485 {
5486         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5487
5488         vcpu_load(vcpu);
5489
5490         memcpy(fxsave->st_space, fpu->fpr, 128);
5491         fxsave->cwd = fpu->fcw;
5492         fxsave->swd = fpu->fsw;
5493         fxsave->twd = fpu->ftwx;
5494         fxsave->fop = fpu->last_opcode;
5495         fxsave->rip = fpu->last_ip;
5496         fxsave->rdp = fpu->last_dp;
5497         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5498
5499         vcpu_put(vcpu);
5500
5501         return 0;
5502 }
5503
5504 void fx_init(struct kvm_vcpu *vcpu)
5505 {
5506         unsigned after_mxcsr_mask;
5507
5508         /*
5509          * Touch the fpu the first time in non atomic context as if
5510          * this is the first fpu instruction the exception handler
5511          * will fire before the instruction returns and it'll have to
5512          * allocate ram with GFP_KERNEL.
5513          */
5514         if (!used_math())
5515                 kvm_fx_save(&vcpu->arch.host_fx_image);
5516
5517         /* Initialize guest FPU by resetting ours and saving into guest's */
5518         preempt_disable();
5519         kvm_fx_save(&vcpu->arch.host_fx_image);
5520         kvm_fx_finit();
5521         kvm_fx_save(&vcpu->arch.guest_fx_image);
5522         kvm_fx_restore(&vcpu->arch.host_fx_image);
5523         preempt_enable();
5524
5525         vcpu->arch.cr0 |= X86_CR0_ET;
5526         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5527         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5528         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5529                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5530 }
5531 EXPORT_SYMBOL_GPL(fx_init);
5532
5533 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5534 {
5535         if (vcpu->guest_fpu_loaded)
5536                 return;
5537
5538         vcpu->guest_fpu_loaded = 1;
5539         kvm_fx_save(&vcpu->arch.host_fx_image);
5540         kvm_fx_restore(&vcpu->arch.guest_fx_image);
5541         trace_kvm_fpu(1);
5542 }
5543
5544 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5545 {
5546         if (!vcpu->guest_fpu_loaded)
5547                 return;
5548
5549         vcpu->guest_fpu_loaded = 0;
5550         kvm_fx_save(&vcpu->arch.guest_fx_image);
5551         kvm_fx_restore(&vcpu->arch.host_fx_image);
5552         ++vcpu->stat.fpu_reload;
5553         set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5554         trace_kvm_fpu(0);
5555 }
5556
5557 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5558 {
5559         if (vcpu->arch.time_page) {
5560                 kvm_release_page_dirty(vcpu->arch.time_page);
5561                 vcpu->arch.time_page = NULL;
5562         }
5563
5564         kvm_x86_ops->vcpu_free(vcpu);
5565 }
5566
5567 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5568                                                 unsigned int id)
5569 {
5570         return kvm_x86_ops->vcpu_create(kvm, id);
5571 }
5572
5573 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5574 {
5575         int r;
5576
5577         /* We do fxsave: this must be aligned. */
5578         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5579
5580         vcpu->arch.mtrr_state.have_fixed = 1;
5581         vcpu_load(vcpu);
5582         r = kvm_arch_vcpu_reset(vcpu);
5583         if (r == 0)
5584                 r = kvm_mmu_setup(vcpu);
5585         vcpu_put(vcpu);
5586         if (r < 0)
5587                 goto free_vcpu;
5588
5589         return 0;
5590 free_vcpu:
5591         kvm_x86_ops->vcpu_free(vcpu);
5592         return r;
5593 }
5594
5595 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5596 {
5597         vcpu_load(vcpu);
5598         kvm_mmu_unload(vcpu);
5599         vcpu_put(vcpu);
5600
5601         kvm_x86_ops->vcpu_free(vcpu);
5602 }
5603
5604 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5605 {
5606         vcpu->arch.nmi_pending = false;
5607         vcpu->arch.nmi_injected = false;
5608
5609         vcpu->arch.switch_db_regs = 0;
5610         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5611         vcpu->arch.dr6 = DR6_FIXED_1;
5612         vcpu->arch.dr7 = DR7_FIXED_1;
5613
5614         return kvm_x86_ops->vcpu_reset(vcpu);
5615 }
5616
5617 int kvm_arch_hardware_enable(void *garbage)
5618 {
5619         /*
5620          * Since this may be called from a hotplug notifcation,
5621          * we can't get the CPU frequency directly.
5622          */
5623         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5624                 int cpu = raw_smp_processor_id();
5625                 per_cpu(cpu_tsc_khz, cpu) = 0;
5626         }
5627
5628         kvm_shared_msr_cpu_online();
5629
5630         return kvm_x86_ops->hardware_enable(garbage);
5631 }
5632
5633 void kvm_arch_hardware_disable(void *garbage)
5634 {
5635         kvm_x86_ops->hardware_disable(garbage);
5636         drop_user_return_notifiers(garbage);
5637 }
5638
5639 int kvm_arch_hardware_setup(void)
5640 {
5641         return kvm_x86_ops->hardware_setup();
5642 }
5643
5644 void kvm_arch_hardware_unsetup(void)
5645 {
5646         kvm_x86_ops->hardware_unsetup();
5647 }
5648
5649 void kvm_arch_check_processor_compat(void *rtn)
5650 {
5651         kvm_x86_ops->check_processor_compatibility(rtn);
5652 }
5653
5654 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5655 {
5656         struct page *page;
5657         struct kvm *kvm;
5658         int r;
5659
5660         BUG_ON(vcpu->kvm == NULL);
5661         kvm = vcpu->kvm;
5662
5663         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5664         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5665                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5666         else
5667                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5668
5669         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5670         if (!page) {
5671                 r = -ENOMEM;
5672                 goto fail;
5673         }
5674         vcpu->arch.pio_data = page_address(page);
5675
5676         r = kvm_mmu_create(vcpu);
5677         if (r < 0)
5678                 goto fail_free_pio_data;
5679
5680         if (irqchip_in_kernel(kvm)) {
5681                 r = kvm_create_lapic(vcpu);
5682                 if (r < 0)
5683                         goto fail_mmu_destroy;
5684         }
5685
5686         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5687                                        GFP_KERNEL);
5688         if (!vcpu->arch.mce_banks) {
5689                 r = -ENOMEM;
5690                 goto fail_free_lapic;
5691         }
5692         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5693
5694         return 0;
5695 fail_free_lapic:
5696         kvm_free_lapic(vcpu);
5697 fail_mmu_destroy:
5698         kvm_mmu_destroy(vcpu);
5699 fail_free_pio_data:
5700         free_page((unsigned long)vcpu->arch.pio_data);
5701 fail:
5702         return r;
5703 }
5704
5705 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5706 {
5707         int idx;
5708
5709         kfree(vcpu->arch.mce_banks);
5710         kvm_free_lapic(vcpu);
5711         idx = srcu_read_lock(&vcpu->kvm->srcu);
5712         kvm_mmu_destroy(vcpu);
5713         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5714         free_page((unsigned long)vcpu->arch.pio_data);
5715 }
5716
5717 struct  kvm *kvm_arch_create_vm(void)
5718 {
5719         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5720
5721         if (!kvm)
5722                 return ERR_PTR(-ENOMEM);
5723
5724         kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5725         if (!kvm->arch.aliases) {
5726                 kfree(kvm);
5727                 return ERR_PTR(-ENOMEM);
5728         }
5729
5730         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5731         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5732
5733         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5734         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5735
5736         rdtscll(kvm->arch.vm_init_tsc);
5737
5738         return kvm;
5739 }
5740
5741 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5742 {
5743         vcpu_load(vcpu);
5744         kvm_mmu_unload(vcpu);
5745         vcpu_put(vcpu);
5746 }
5747
5748 static void kvm_free_vcpus(struct kvm *kvm)
5749 {
5750         unsigned int i;
5751         struct kvm_vcpu *vcpu;
5752
5753         /*
5754          * Unpin any mmu pages first.
5755          */
5756         kvm_for_each_vcpu(i, vcpu, kvm)
5757                 kvm_unload_vcpu_mmu(vcpu);
5758         kvm_for_each_vcpu(i, vcpu, kvm)
5759                 kvm_arch_vcpu_free(vcpu);
5760
5761         mutex_lock(&kvm->lock);
5762         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5763                 kvm->vcpus[i] = NULL;
5764
5765         atomic_set(&kvm->online_vcpus, 0);
5766         mutex_unlock(&kvm->lock);
5767 }
5768
5769 void kvm_arch_sync_events(struct kvm *kvm)
5770 {
5771         kvm_free_all_assigned_devices(kvm);
5772 }
5773
5774 void kvm_arch_destroy_vm(struct kvm *kvm)
5775 {
5776         kvm_iommu_unmap_guest(kvm);
5777         kvm_free_pit(kvm);
5778         kfree(kvm->arch.vpic);
5779         kfree(kvm->arch.vioapic);
5780         kvm_free_vcpus(kvm);
5781         kvm_free_physmem(kvm);
5782         if (kvm->arch.apic_access_page)
5783                 put_page(kvm->arch.apic_access_page);
5784         if (kvm->arch.ept_identity_pagetable)
5785                 put_page(kvm->arch.ept_identity_pagetable);
5786         cleanup_srcu_struct(&kvm->srcu);
5787         kfree(kvm->arch.aliases);
5788         kfree(kvm);
5789 }
5790
5791 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5792                                 struct kvm_memory_slot *memslot,
5793                                 struct kvm_memory_slot old,
5794                                 struct kvm_userspace_memory_region *mem,
5795                                 int user_alloc)
5796 {
5797         int npages = memslot->npages;
5798
5799         /*To keep backward compatibility with older userspace,
5800          *x86 needs to hanlde !user_alloc case.
5801          */
5802         if (!user_alloc) {
5803                 if (npages && !old.rmap) {
5804                         unsigned long userspace_addr;
5805
5806                         down_write(&current->mm->mmap_sem);
5807                         userspace_addr = do_mmap(NULL, 0,
5808                                                  npages * PAGE_SIZE,
5809                                                  PROT_READ | PROT_WRITE,
5810                                                  MAP_PRIVATE | MAP_ANONYMOUS,
5811                                                  0);
5812                         up_write(&current->mm->mmap_sem);
5813
5814                         if (IS_ERR((void *)userspace_addr))
5815                                 return PTR_ERR((void *)userspace_addr);
5816
5817                         memslot->userspace_addr = userspace_addr;
5818                 }
5819         }
5820
5821
5822         return 0;
5823 }
5824
5825 void kvm_arch_commit_memory_region(struct kvm *kvm,
5826                                 struct kvm_userspace_memory_region *mem,
5827                                 struct kvm_memory_slot old,
5828                                 int user_alloc)
5829 {
5830
5831         int npages = mem->memory_size >> PAGE_SHIFT;
5832
5833         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5834                 int ret;
5835
5836                 down_write(&current->mm->mmap_sem);
5837                 ret = do_munmap(current->mm, old.userspace_addr,
5838                                 old.npages * PAGE_SIZE);
5839                 up_write(&current->mm->mmap_sem);
5840                 if (ret < 0)
5841                         printk(KERN_WARNING
5842                                "kvm_vm_ioctl_set_memory_region: "
5843                                "failed to munmap memory\n");
5844         }
5845
5846         spin_lock(&kvm->mmu_lock);
5847         if (!kvm->arch.n_requested_mmu_pages) {
5848                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5849                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5850         }
5851
5852         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5853         spin_unlock(&kvm->mmu_lock);
5854 }
5855
5856 void kvm_arch_flush_shadow(struct kvm *kvm)
5857 {
5858         kvm_mmu_zap_all(kvm);
5859         kvm_reload_remote_mmus(kvm);
5860 }
5861
5862 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5863 {
5864         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5865                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5866                 || vcpu->arch.nmi_pending ||
5867                 (kvm_arch_interrupt_allowed(vcpu) &&
5868                  kvm_cpu_has_interrupt(vcpu));
5869 }
5870
5871 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5872 {
5873         int me;
5874         int cpu = vcpu->cpu;
5875
5876         if (waitqueue_active(&vcpu->wq)) {
5877                 wake_up_interruptible(&vcpu->wq);
5878                 ++vcpu->stat.halt_wakeup;
5879         }
5880
5881         me = get_cpu();
5882         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5883                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5884                         smp_send_reschedule(cpu);
5885         put_cpu();
5886 }
5887
5888 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5889 {
5890         return kvm_x86_ops->interrupt_allowed(vcpu);
5891 }
5892
5893 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5894 {
5895         unsigned long current_rip = kvm_rip_read(vcpu) +
5896                 get_segment_base(vcpu, VCPU_SREG_CS);
5897
5898         return current_rip == linear_rip;
5899 }
5900 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5901
5902 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5903 {
5904         unsigned long rflags;
5905
5906         rflags = kvm_x86_ops->get_rflags(vcpu);
5907         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5908                 rflags &= ~X86_EFLAGS_TF;
5909         return rflags;
5910 }
5911 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5912
5913 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5914 {
5915         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5916             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5917                 rflags |= X86_EFLAGS_TF;
5918         kvm_x86_ops->set_rflags(vcpu, rflags);
5919 }
5920 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5921
5922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5925 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5926 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5927 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5928 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5929 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5930 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5931 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5932 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5933 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);