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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  81                                     struct kvm_cpuid_entry2 __user *entries);
  82
  83 struct kvm_x86_ops *kvm_x86_ops;
  84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  85
  86 int ignore_msrs = 0;
  87 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  88
  89 struct kvm_stats_debugfs_item debugfs_entries[] = {
  90         { "pf_fixed", VCPU_STAT(pf_fixed) },
  91         { "pf_guest", VCPU_STAT(pf_guest) },
  92         { "tlb_flush", VCPU_STAT(tlb_flush) },
  93         { "invlpg", VCPU_STAT(invlpg) },
  94         { "exits", VCPU_STAT(exits) },
  95         { "io_exits", VCPU_STAT(io_exits) },
  96         { "mmio_exits", VCPU_STAT(mmio_exits) },
  97         { "signal_exits", VCPU_STAT(signal_exits) },
  98         { "irq_window", VCPU_STAT(irq_window_exits) },
  99         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 100         { "halt_exits", VCPU_STAT(halt_exits) },
 101         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 102         { "hypercalls", VCPU_STAT(hypercalls) },
 103         { "request_irq", VCPU_STAT(request_irq_exits) },
 104         { "irq_exits", VCPU_STAT(irq_exits) },
 105         { "host_state_reload", VCPU_STAT(host_state_reload) },
 106         { "efer_reload", VCPU_STAT(efer_reload) },
 107         { "fpu_reload", VCPU_STAT(fpu_reload) },
 108         { "insn_emulation", VCPU_STAT(insn_emulation) },
 109         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 110         { "irq_injections", VCPU_STAT(irq_injections) },
 111         { "nmi_injections", VCPU_STAT(nmi_injections) },
 112         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 113         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 114         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 115         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 116         { "mmu_flooded", VM_STAT(mmu_flooded) },
 117         { "mmu_recycled", VM_STAT(mmu_recycled) },
 118         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 119         { "mmu_unsync", VM_STAT(mmu_unsync) },
 120         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 121         { "largepages", VM_STAT(lpages) },
 122         { NULL }
 123 };
 124
 125 unsigned long segment_base(u16 selector)
 126 {
 127         struct descriptor_table gdt;
 128         struct desc_struct *d;
 129         unsigned long table_base;
 130         unsigned long v;
 131
 132         if (selector == 0)
 133                 return 0;
 134
 135         asm("sgdt %0" : "=m"(gdt));
 136         table_base = gdt.base;
 137
 138         if (selector & 4) {           /* from ldt */
 139                 u16 ldt_selector;
 140
 141                 asm("sldt %0" : "=g"(ldt_selector));
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = d->base0 | ((unsigned long)d->base1 << 16) |
 146                 ((unsigned long)d->base2 << 24);
 147 #ifdef CONFIG_X86_64
 148         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 149                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 150 #endif
 151         return v;
 152 }
 153 EXPORT_SYMBOL_GPL(segment_base);
 154
 155 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 156 {
 157         if (irqchip_in_kernel(vcpu->kvm))
 158                 return vcpu->arch.apic_base;
 159         else
 160                 return vcpu->arch.apic_base;
 161 }
 162 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 163
 164 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 165 {
 166         /* TODO: reserve bits check */
 167         if (irqchip_in_kernel(vcpu->kvm))
 168                 kvm_lapic_set_base(vcpu, data);
 169         else
 170                 vcpu->arch.apic_base = data;
 171 }
 172 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 173
 174 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 175 {
 176         WARN_ON(vcpu->arch.exception.pending);
 177         vcpu->arch.exception.pending = true;
 178         vcpu->arch.exception.has_error_code = false;
 179         vcpu->arch.exception.nr = nr;
 180 }
 181 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 182
 183 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 184                            u32 error_code)
 185 {
 186         ++vcpu->stat.pf_guest;
 187
 188         if (vcpu->arch.exception.pending) {
 189                 switch(vcpu->arch.exception.nr) {
 190                 case DF_VECTOR:
 191                         /* triple fault -> shutdown */
 192                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 193                         return;
 194                 case PF_VECTOR:
 195                         vcpu->arch.exception.nr = DF_VECTOR;
 196                         vcpu->arch.exception.error_code = 0;
 197                         return;
 198                 default:
 199                         /* replace previous exception with a new one in a hope
 200                            that instruction re-execution will regenerate lost
 201                            exception */
 202                         vcpu->arch.exception.pending = false;
 203                         break;
 204                 }
 205         }
 206         vcpu->arch.cr2 = addr;
 207         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 208 }
 209
 210 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 211 {
 212         vcpu->arch.nmi_pending = 1;
 213 }
 214 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 215
 216 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 217 {
 218         WARN_ON(vcpu->arch.exception.pending);
 219         vcpu->arch.exception.pending = true;
 220         vcpu->arch.exception.has_error_code = true;
 221         vcpu->arch.exception.nr = nr;
 222         vcpu->arch.exception.error_code = error_code;
 223 }
 224 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 225
 226 static void __queue_exception(struct kvm_vcpu *vcpu)
 227 {
 228         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
 229                                      vcpu->arch.exception.has_error_code,
 230                                      vcpu->arch.exception.error_code);
 231 }
 232
 233 /*
 234  * Load the pae pdptrs.  Return true is they are all valid.
 235  */
 236 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 237 {
 238         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 239         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 240         int i;
 241         int ret;
 242         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 243
 244         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 245                                   offset * sizeof(u64), sizeof(pdpte));
 246         if (ret < 0) {
 247                 ret = 0;
 248                 goto out;
 249         }
 250         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 251                 if (is_present_gpte(pdpte[i]) &&
 252                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 253                         ret = 0;
 254                         goto out;
 255                 }
 256         }
 257         ret = 1;
 258
 259         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 260         __set_bit(VCPU_EXREG_PDPTR,
 261                   (unsigned long *)&vcpu->arch.regs_avail);
 262         __set_bit(VCPU_EXREG_PDPTR,
 263                   (unsigned long *)&vcpu->arch.regs_dirty);
 264 out:
 265
 266         return ret;
 267 }
 268 EXPORT_SYMBOL_GPL(load_pdptrs);
 269
 270 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 271 {
 272         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 273         bool changed = true;
 274         int r;
 275
 276         if (is_long_mode(vcpu) || !is_pae(vcpu))
 277                 return false;
 278
 279         if (!test_bit(VCPU_EXREG_PDPTR,
 280                       (unsigned long *)&vcpu->arch.regs_avail))
 281                 return true;
 282
 283         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 284         if (r < 0)
 285                 goto out;
 286         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 287 out:
 288
 289         return changed;
 290 }
 291
 292 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 293 {
 294         if (cr0 & CR0_RESERVED_BITS) {
 295                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 296                        cr0, vcpu->arch.cr0);
 297                 kvm_inject_gp(vcpu, 0);
 298                 return;
 299         }
 300
 301         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 302                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 303                 kvm_inject_gp(vcpu, 0);
 304                 return;
 305         }
 306
 307         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 308                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 309                        "and a clear PE flag\n");
 310                 kvm_inject_gp(vcpu, 0);
 311                 return;
 312         }
 313
 314         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 315 #ifdef CONFIG_X86_64
 316                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 317                         int cs_db, cs_l;
 318
 319                         if (!is_pae(vcpu)) {
 320                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 321                                        "in long mode while PAE is disabled\n");
 322                                 kvm_inject_gp(vcpu, 0);
 323                                 return;
 324                         }
 325                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 326                         if (cs_l) {
 327                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 328                                        "in long mode while CS.L == 1\n");
 329                                 kvm_inject_gp(vcpu, 0);
 330                                 return;
 331
 332                         }
 333                 } else
 334 #endif
 335                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 336                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 337                                "reserved bits\n");
 338                         kvm_inject_gp(vcpu, 0);
 339                         return;
 340                 }
 341
 342         }
 343
 344         kvm_x86_ops->set_cr0(vcpu, cr0);
 345         vcpu->arch.cr0 = cr0;
 346
 347         kvm_mmu_reset_context(vcpu);
 348         return;
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 351
 352 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 353 {
 354         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_lmsw);
 357
 358 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 359 {
 360         unsigned long old_cr4 = vcpu->arch.cr4;
 361         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 362
 363         if (cr4 & CR4_RESERVED_BITS) {
 364                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 365                 kvm_inject_gp(vcpu, 0);
 366                 return;
 367         }
 368
 369         if (is_long_mode(vcpu)) {
 370                 if (!(cr4 & X86_CR4_PAE)) {
 371                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 372                                "in long mode\n");
 373                         kvm_inject_gp(vcpu, 0);
 374                         return;
 375                 }
 376         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 377                    && ((cr4 ^ old_cr4) & pdptr_bits)
 378                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 379                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 380                 kvm_inject_gp(vcpu, 0);
 381                 return;
 382         }
 383
 384         if (cr4 & X86_CR4_VMXE) {
 385                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 386                 kvm_inject_gp(vcpu, 0);
 387                 return;
 388         }
 389         kvm_x86_ops->set_cr4(vcpu, cr4);
 390         vcpu->arch.cr4 = cr4;
 391         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 392         kvm_mmu_reset_context(vcpu);
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 395
 396 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 397 {
 398         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 399                 kvm_mmu_sync_roots(vcpu);
 400                 kvm_mmu_flush_tlb(vcpu);
 401                 return;
 402         }
 403
 404         if (is_long_mode(vcpu)) {
 405                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 406                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 407                         kvm_inject_gp(vcpu, 0);
 408                         return;
 409                 }
 410         } else {
 411                 if (is_pae(vcpu)) {
 412                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 413                                 printk(KERN_DEBUG
 414                                        "set_cr3: #GP, reserved bits\n");
 415                                 kvm_inject_gp(vcpu, 0);
 416                                 return;
 417                         }
 418                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 419                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 420                                        "reserved bits\n");
 421                                 kvm_inject_gp(vcpu, 0);
 422                                 return;
 423                         }
 424                 }
 425                 /*
 426                  * We don't check reserved bits in nonpae mode, because
 427                  * this isn't enforced, and VMware depends on this.
 428                  */
 429         }
 430
 431         /*
 432          * Does the new cr3 value map to physical memory? (Note, we
 433          * catch an invalid cr3 even in real-mode, because it would
 434          * cause trouble later on when we turn on paging anyway.)
 435          *
 436          * A real CPU would silently accept an invalid cr3 and would
 437          * attempt to use it - with largely undefined (and often hard
 438          * to debug) behavior on the guest side.
 439          */
 440         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 441                 kvm_inject_gp(vcpu, 0);
 442         else {
 443                 vcpu->arch.cr3 = cr3;
 444                 vcpu->arch.mmu.new_cr3(vcpu);
 445         }
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 448
 449 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 450 {
 451         if (cr8 & CR8_RESERVED_BITS) {
 452                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 453                 kvm_inject_gp(vcpu, 0);
 454                 return;
 455         }
 456         if (irqchip_in_kernel(vcpu->kvm))
 457                 kvm_lapic_set_tpr(vcpu, cr8);
 458         else
 459                 vcpu->arch.cr8 = cr8;
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 462
 463 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 464 {
 465         if (irqchip_in_kernel(vcpu->kvm))
 466                 return kvm_lapic_get_cr8(vcpu);
 467         else
 468                 return vcpu->arch.cr8;
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 471
 472 static inline u32 bit(int bitno)
 473 {
 474         return 1 << (bitno & 31);
 475 }
 476
 477 /*
 478  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 479  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 480  *
 481  * This list is modified at module load time to reflect the
 482  * capabilities of the host cpu.
 483  */
 484 static u32 msrs_to_save[] = {
 485         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 486         MSR_K6_STAR,
 487 #ifdef CONFIG_X86_64
 488         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 489 #endif
 490         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 491         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 492 };
 493
 494 static unsigned num_msrs_to_save;
 495
 496 static u32 emulated_msrs[] = {
 497         MSR_IA32_MISC_ENABLE,
 498 };
 499
 500 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 501 {
 502         if (efer & efer_reserved_bits) {
 503                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 504                        efer);
 505                 kvm_inject_gp(vcpu, 0);
 506                 return;
 507         }
 508
 509         if (is_paging(vcpu)
 510             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 511                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 512                 kvm_inject_gp(vcpu, 0);
 513                 return;
 514         }
 515
 516         if (efer & EFER_FFXSR) {
 517                 struct kvm_cpuid_entry2 *feat;
 518
 519                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 520                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 521                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 522                         kvm_inject_gp(vcpu, 0);
 523                         return;
 524                 }
 525         }
 526
 527         if (efer & EFER_SVME) {
 528                 struct kvm_cpuid_entry2 *feat;
 529
 530                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 531                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 532                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 533                         kvm_inject_gp(vcpu, 0);
 534                         return;
 535                 }
 536         }
 537
 538         kvm_x86_ops->set_efer(vcpu, efer);
 539
 540         efer &= ~EFER_LMA;
 541         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 542
 543         vcpu->arch.shadow_efer = efer;
 544
 545         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 546         kvm_mmu_reset_context(vcpu);
 547 }
 548
 549 void kvm_enable_efer_bits(u64 mask)
 550 {
 551        efer_reserved_bits &= ~mask;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 554
 555
 556 /*
 557  * Writes msr value into into the appropriate "register".
 558  * Returns 0 on success, non-0 otherwise.
 559  * Assumes vcpu_load() was already called.
 560  */
 561 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 562 {
 563         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 564 }
 565
 566 /*
 567  * Adapt set_msr() to msr_io()'s calling convention
 568  */
 569 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 570 {
 571         return kvm_set_msr(vcpu, index, *data);
 572 }
 573
 574 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 575 {
 576         static int version;
 577         struct pvclock_wall_clock wc;
 578         struct timespec now, sys, boot;
 579
 580         if (!wall_clock)
 581                 return;
 582
 583         version++;
 584
 585         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 586
 587         /*
 588          * The guest calculates current wall clock time by adding
 589          * system time (updated by kvm_write_guest_time below) to the
 590          * wall clock specified here.  guest system time equals host
 591          * system time for us, thus we must fill in host boot time here.
 592          */
 593         now = current_kernel_time();
 594         ktime_get_ts(&sys);
 595         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 596
 597         wc.sec = boot.tv_sec;
 598         wc.nsec = boot.tv_nsec;
 599         wc.version = version;
 600
 601         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 602
 603         version++;
 604         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 605 }
 606
 607 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 608 {
 609         uint32_t quotient, remainder;
 610
 611         /* Don't try to replace with do_div(), this one calculates
 612          * "(dividend << 32) / divisor" */
 613         __asm__ ( "divl %4"
 614                   : "=a" (quotient), "=d" (remainder)
 615                   : "0" (0), "1" (dividend), "r" (divisor) );
 616         return quotient;
 617 }
 618
 619 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 620 {
 621         uint64_t nsecs = 1000000000LL;
 622         int32_t  shift = 0;
 623         uint64_t tps64;
 624         uint32_t tps32;
 625
 626         tps64 = tsc_khz * 1000LL;
 627         while (tps64 > nsecs*2) {
 628                 tps64 >>= 1;
 629                 shift--;
 630         }
 631
 632         tps32 = (uint32_t)tps64;
 633         while (tps32 <= (uint32_t)nsecs) {
 634                 tps32 <<= 1;
 635                 shift++;
 636         }
 637
 638         hv_clock->tsc_shift = shift;
 639         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 640
 641         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 642                  __func__, tsc_khz, hv_clock->tsc_shift,
 643                  hv_clock->tsc_to_system_mul);
 644 }
 645
 646 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 647
 648 static void kvm_write_guest_time(struct kvm_vcpu *v)
 649 {
 650         struct timespec ts;
 651         unsigned long flags;
 652         struct kvm_vcpu_arch *vcpu = &v->arch;
 653         void *shared_kaddr;
 654         unsigned long this_tsc_khz;
 655
 656         if ((!vcpu->time_page))
 657                 return;
 658
 659         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 660         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 661                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 662                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 663         }
 664         put_cpu_var(cpu_tsc_khz);
 665
 666         /* Keep irq disabled to prevent changes to the clock */
 667         local_irq_save(flags);
 668         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 669         ktime_get_ts(&ts);
 670         local_irq_restore(flags);
 671
 672         /* With all the info we got, fill in the values */
 673
 674         vcpu->hv_clock.system_time = ts.tv_nsec +
 675                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 676         /*
 677          * The interface expects us to write an even number signaling that the
 678          * update is finished. Since the guest won't see the intermediate
 679          * state, we just increase by 2 at the end.
 680          */
 681         vcpu->hv_clock.version += 2;
 682
 683         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 684
 685         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 686                sizeof(vcpu->hv_clock));
 687
 688         kunmap_atomic(shared_kaddr, KM_USER0);
 689
 690         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 691 }
 692
 693 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 694 {
 695         struct kvm_vcpu_arch *vcpu = &v->arch;
 696
 697         if (!vcpu->time_page)
 698                 return 0;
 699         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 700         return 1;
 701 }
 702
 703 static bool msr_mtrr_valid(unsigned msr)
 704 {
 705         switch (msr) {
 706         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 707         case MSR_MTRRfix64K_00000:
 708         case MSR_MTRRfix16K_80000:
 709         case MSR_MTRRfix16K_A0000:
 710         case MSR_MTRRfix4K_C0000:
 711         case MSR_MTRRfix4K_C8000:
 712         case MSR_MTRRfix4K_D0000:
 713         case MSR_MTRRfix4K_D8000:
 714         case MSR_MTRRfix4K_E0000:
 715         case MSR_MTRRfix4K_E8000:
 716         case MSR_MTRRfix4K_F0000:
 717         case MSR_MTRRfix4K_F8000:
 718         case MSR_MTRRdefType:
 719         case MSR_IA32_CR_PAT:
 720                 return true;
 721         case 0x2f8:
 722                 return true;
 723         }
 724         return false;
 725 }
 726
 727 static bool valid_pat_type(unsigned t)
 728 {
 729         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 730 }
 731
 732 static bool valid_mtrr_type(unsigned t)
 733 {
 734         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 735 }
 736
 737 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 738 {
 739         int i;
 740
 741         if (!msr_mtrr_valid(msr))
 742                 return false;
 743
 744         if (msr == MSR_IA32_CR_PAT) {
 745                 for (i = 0; i < 8; i++)
 746                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 747                                 return false;
 748                 return true;
 749         } else if (msr == MSR_MTRRdefType) {
 750                 if (data & ~0xcff)
 751                         return false;
 752                 return valid_mtrr_type(data & 0xff);
 753         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 754                 for (i = 0; i < 8 ; i++)
 755                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 756                                 return false;
 757                 return true;
 758         }
 759
 760         /* variable MTRRs */
 761         return valid_mtrr_type(data & 0xff);
 762 }
 763
 764 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 765 {
 766         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 767
 768         if (!mtrr_valid(vcpu, msr, data))
 769                 return 1;
 770
 771         if (msr == MSR_MTRRdefType) {
 772                 vcpu->arch.mtrr_state.def_type = data;
 773                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 774         } else if (msr == MSR_MTRRfix64K_00000)
 775                 p[0] = data;
 776         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 777                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 778         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 779                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 780         else if (msr == MSR_IA32_CR_PAT)
 781                 vcpu->arch.pat = data;
 782         else {  /* Variable MTRRs */
 783                 int idx, is_mtrr_mask;
 784                 u64 *pt;
 785
 786                 idx = (msr - 0x200) / 2;
 787                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 788                 if (!is_mtrr_mask)
 789                         pt =
 790                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 791                 else
 792                         pt =
 793                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 794                 *pt = data;
 795         }
 796
 797         kvm_mmu_reset_context(vcpu);
 798         return 0;
 799 }
 800
 801 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 802 {
 803         u64 mcg_cap = vcpu->arch.mcg_cap;
 804         unsigned bank_num = mcg_cap & 0xff;
 805
 806         switch (msr) {
 807         case MSR_IA32_MCG_STATUS:
 808                 vcpu->arch.mcg_status = data;
 809                 break;
 810         case MSR_IA32_MCG_CTL:
 811                 if (!(mcg_cap & MCG_CTL_P))
 812                         return 1;
 813                 if (data != 0 && data != ~(u64)0)
 814                         return -1;
 815                 vcpu->arch.mcg_ctl = data;
 816                 break;
 817         default:
 818                 if (msr >= MSR_IA32_MC0_CTL &&
 819                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 820                         u32 offset = msr - MSR_IA32_MC0_CTL;
 821                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 822                         if ((offset & 0x3) == 0 &&
 823                             data != 0 && data != ~(u64)0)
 824                                 return -1;
 825                         vcpu->arch.mce_banks[offset] = data;
 826                         break;
 827                 }
 828                 return 1;
 829         }
 830         return 0;
 831 }
 832
 833 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 834 {
 835         switch (msr) {
 836         case MSR_EFER:
 837                 set_efer(vcpu, data);
 838                 break;
 839         case MSR_K7_HWCR:
 840                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 841                 if (data != 0) {
 842                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 843                                 data);
 844                         return 1;
 845                 }
 846                 break;
 847         case MSR_FAM10H_MMIO_CONF_BASE:
 848                 if (data != 0) {
 849                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 850                                 "0x%llx\n", data);
 851                         return 1;
 852                 }
 853                 break;
 854         case MSR_AMD64_NB_CFG:
 855                 break;
 856         case MSR_IA32_DEBUGCTLMSR:
 857                 if (!data) {
 858                         /* We support the non-activated case already */
 859                         break;
 860                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 861                         /* Values other than LBR and BTF are vendor-specific,
 862                            thus reserved and should throw a #GP */
 863                         return 1;
 864                 }
 865                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 866                         __func__, data);
 867                 break;
 868         case MSR_IA32_UCODE_REV:
 869         case MSR_IA32_UCODE_WRITE:
 870         case MSR_VM_HSAVE_PA:
 871         case MSR_AMD64_PATCH_LOADER:
 872                 break;
 873         case 0x200 ... 0x2ff:
 874                 return set_msr_mtrr(vcpu, msr, data);
 875         case MSR_IA32_APICBASE:
 876                 kvm_set_apic_base(vcpu, data);
 877                 break;
 878         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 879                 return kvm_x2apic_msr_write(vcpu, msr, data);
 880         case MSR_IA32_MISC_ENABLE:
 881                 vcpu->arch.ia32_misc_enable_msr = data;
 882                 break;
 883         case MSR_KVM_WALL_CLOCK:
 884                 vcpu->kvm->arch.wall_clock = data;
 885                 kvm_write_wall_clock(vcpu->kvm, data);
 886                 break;
 887         case MSR_KVM_SYSTEM_TIME: {
 888                 if (vcpu->arch.time_page) {
 889                         kvm_release_page_dirty(vcpu->arch.time_page);
 890                         vcpu->arch.time_page = NULL;
 891                 }
 892
 893                 vcpu->arch.time = data;
 894
 895                 /* we verify if the enable bit is set... */
 896                 if (!(data & 1))
 897                         break;
 898
 899                 /* ...but clean it before doing the actual write */
 900                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 901
 902                 vcpu->arch.time_page =
 903                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 904
 905                 if (is_error_page(vcpu->arch.time_page)) {
 906                         kvm_release_page_clean(vcpu->arch.time_page);
 907                         vcpu->arch.time_page = NULL;
 908                 }
 909
 910                 kvm_request_guest_time_update(vcpu);
 911                 break;
 912         }
 913         case MSR_IA32_MCG_CTL:
 914         case MSR_IA32_MCG_STATUS:
 915         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 916                 return set_msr_mce(vcpu, msr, data);
 917
 918         /* Performance counters are not protected by a CPUID bit,
 919          * so we should check all of them in the generic path for the sake of
 920          * cross vendor migration.
 921          * Writing a zero into the event select MSRs disables them,
 922          * which we perfectly emulate ;-). Any other value should be at least
 923          * reported, some guests depend on them.
 924          */
 925         case MSR_P6_EVNTSEL0:
 926         case MSR_P6_EVNTSEL1:
 927         case MSR_K7_EVNTSEL0:
 928         case MSR_K7_EVNTSEL1:
 929         case MSR_K7_EVNTSEL2:
 930         case MSR_K7_EVNTSEL3:
 931                 if (data != 0)
 932                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 933                                 "0x%x data 0x%llx\n", msr, data);
 934                 break;
 935         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 936          * so we ignore writes to make it happy.
 937          */
 938         case MSR_P6_PERFCTR0:
 939         case MSR_P6_PERFCTR1:
 940         case MSR_K7_PERFCTR0:
 941         case MSR_K7_PERFCTR1:
 942         case MSR_K7_PERFCTR2:
 943         case MSR_K7_PERFCTR3:
 944                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 945                         "0x%x data 0x%llx\n", msr, data);
 946                 break;
 947         default:
 948                 if (!ignore_msrs) {
 949                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 950                                 msr, data);
 951                         return 1;
 952                 } else {
 953                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 954                                 msr, data);
 955                         break;
 956                 }
 957         }
 958         return 0;
 959 }
 960 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 961
 962
 963 /*
 964  * Reads an msr value (of 'msr_index') into 'pdata'.
 965  * Returns 0 on success, non-0 otherwise.
 966  * Assumes vcpu_load() was already called.
 967  */
 968 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 969 {
 970         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 971 }
 972
 973 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 974 {
 975         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 976
 977         if (!msr_mtrr_valid(msr))
 978                 return 1;
 979
 980         if (msr == MSR_MTRRdefType)
 981                 *pdata = vcpu->arch.mtrr_state.def_type +
 982                          (vcpu->arch.mtrr_state.enabled << 10);
 983         else if (msr == MSR_MTRRfix64K_00000)
 984                 *pdata = p[0];
 985         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 986                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 987         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 988                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 989         else if (msr == MSR_IA32_CR_PAT)
 990                 *pdata = vcpu->arch.pat;
 991         else {  /* Variable MTRRs */
 992                 int idx, is_mtrr_mask;
 993                 u64 *pt;
 994
 995                 idx = (msr - 0x200) / 2;
 996                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 997                 if (!is_mtrr_mask)
 998                         pt =
 999                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1000                 else
1001                         pt =
1002                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1003                 *pdata = *pt;
1004         }
1005
1006         return 0;
1007 }
1008
1009 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1010 {
1011         u64 data;
1012         u64 mcg_cap = vcpu->arch.mcg_cap;
1013         unsigned bank_num = mcg_cap & 0xff;
1014
1015         switch (msr) {
1016         case MSR_IA32_P5_MC_ADDR:
1017         case MSR_IA32_P5_MC_TYPE:
1018                 data = 0;
1019                 break;
1020         case MSR_IA32_MCG_CAP:
1021                 data = vcpu->arch.mcg_cap;
1022                 break;
1023         case MSR_IA32_MCG_CTL:
1024                 if (!(mcg_cap & MCG_CTL_P))
1025                         return 1;
1026                 data = vcpu->arch.mcg_ctl;
1027                 break;
1028         case MSR_IA32_MCG_STATUS:
1029                 data = vcpu->arch.mcg_status;
1030                 break;
1031         default:
1032                 if (msr >= MSR_IA32_MC0_CTL &&
1033                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1034                         u32 offset = msr - MSR_IA32_MC0_CTL;
1035                         data = vcpu->arch.mce_banks[offset];
1036                         break;
1037                 }
1038                 return 1;
1039         }
1040         *pdata = data;
1041         return 0;
1042 }
1043
1044 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1045 {
1046         u64 data;
1047
1048         switch (msr) {
1049         case MSR_IA32_PLATFORM_ID:
1050         case MSR_IA32_UCODE_REV:
1051         case MSR_IA32_EBL_CR_POWERON:
1052         case MSR_IA32_DEBUGCTLMSR:
1053         case MSR_IA32_LASTBRANCHFROMIP:
1054         case MSR_IA32_LASTBRANCHTOIP:
1055         case MSR_IA32_LASTINTFROMIP:
1056         case MSR_IA32_LASTINTTOIP:
1057         case MSR_K8_SYSCFG:
1058         case MSR_K7_HWCR:
1059         case MSR_VM_HSAVE_PA:
1060         case MSR_P6_EVNTSEL0:
1061         case MSR_P6_EVNTSEL1:
1062         case MSR_K7_EVNTSEL0:
1063         case MSR_K8_INT_PENDING_MSG:
1064         case MSR_AMD64_NB_CFG:
1065         case MSR_FAM10H_MMIO_CONF_BASE:
1066                 data = 0;
1067                 break;
1068         case MSR_MTRRcap:
1069                 data = 0x500 | KVM_NR_VAR_MTRR;
1070                 break;
1071         case 0x200 ... 0x2ff:
1072                 return get_msr_mtrr(vcpu, msr, pdata);
1073         case 0xcd: /* fsb frequency */
1074                 data = 3;
1075                 break;
1076         case MSR_IA32_APICBASE:
1077                 data = kvm_get_apic_base(vcpu);
1078                 break;
1079         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1080                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1081                 break;
1082         case MSR_IA32_MISC_ENABLE:
1083                 data = vcpu->arch.ia32_misc_enable_msr;
1084                 break;
1085         case MSR_IA32_PERF_STATUS:
1086                 /* TSC increment by tick */
1087                 data = 1000ULL;
1088                 /* CPU multiplier */
1089                 data |= (((uint64_t)4ULL) << 40);
1090                 break;
1091         case MSR_EFER:
1092                 data = vcpu->arch.shadow_efer;
1093                 break;
1094         case MSR_KVM_WALL_CLOCK:
1095                 data = vcpu->kvm->arch.wall_clock;
1096                 break;
1097         case MSR_KVM_SYSTEM_TIME:
1098                 data = vcpu->arch.time;
1099                 break;
1100         case MSR_IA32_P5_MC_ADDR:
1101         case MSR_IA32_P5_MC_TYPE:
1102         case MSR_IA32_MCG_CAP:
1103         case MSR_IA32_MCG_CTL:
1104         case MSR_IA32_MCG_STATUS:
1105         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1106                 return get_msr_mce(vcpu, msr, pdata);
1107         default:
1108                 if (!ignore_msrs) {
1109                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1110                         return 1;
1111                 } else {
1112                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1113                         data = 0;
1114                 }
1115                 break;
1116         }
1117         *pdata = data;
1118         return 0;
1119 }
1120 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1121
1122 /*
1123  * Read or write a bunch of msrs. All parameters are kernel addresses.
1124  *
1125  * @return number of msrs set successfully.
1126  */
1127 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1128                     struct kvm_msr_entry *entries,
1129                     int (*do_msr)(struct kvm_vcpu *vcpu,
1130                                   unsigned index, u64 *data))
1131 {
1132         int i;
1133
1134         vcpu_load(vcpu);
1135
1136         down_read(&vcpu->kvm->slots_lock);
1137         for (i = 0; i < msrs->nmsrs; ++i)
1138                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1139                         break;
1140         up_read(&vcpu->kvm->slots_lock);
1141
1142         vcpu_put(vcpu);
1143
1144         return i;
1145 }
1146
1147 /*
1148  * Read or write a bunch of msrs. Parameters are user addresses.
1149  *
1150  * @return number of msrs set successfully.
1151  */
1152 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1153                   int (*do_msr)(struct kvm_vcpu *vcpu,
1154                                 unsigned index, u64 *data),
1155                   int writeback)
1156 {
1157         struct kvm_msrs msrs;
1158         struct kvm_msr_entry *entries;
1159         int r, n;
1160         unsigned size;
1161
1162         r = -EFAULT;
1163         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1164                 goto out;
1165
1166         r = -E2BIG;
1167         if (msrs.nmsrs >= MAX_IO_MSRS)
1168                 goto out;
1169
1170         r = -ENOMEM;
1171         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1172         entries = vmalloc(size);
1173         if (!entries)
1174                 goto out;
1175
1176         r = -EFAULT;
1177         if (copy_from_user(entries, user_msrs->entries, size))
1178                 goto out_free;
1179
1180         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1181         if (r < 0)
1182                 goto out_free;
1183
1184         r = -EFAULT;
1185         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1186                 goto out_free;
1187
1188         r = n;
1189
1190 out_free:
1191         vfree(entries);
1192 out:
1193         return r;
1194 }
1195
1196 int kvm_dev_ioctl_check_extension(long ext)
1197 {
1198         int r;
1199
1200         switch (ext) {
1201         case KVM_CAP_IRQCHIP:
1202         case KVM_CAP_HLT:
1203         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1204         case KVM_CAP_SET_TSS_ADDR:
1205         case KVM_CAP_EXT_CPUID:
1206         case KVM_CAP_CLOCKSOURCE:
1207         case KVM_CAP_PIT:
1208         case KVM_CAP_NOP_IO_DELAY:
1209         case KVM_CAP_MP_STATE:
1210         case KVM_CAP_SYNC_MMU:
1211         case KVM_CAP_REINJECT_CONTROL:
1212         case KVM_CAP_IRQ_INJECT_STATUS:
1213         case KVM_CAP_ASSIGN_DEV_IRQ:
1214         case KVM_CAP_IRQFD:
1215         case KVM_CAP_PIT2:
1216                 r = 1;
1217                 break;
1218         case KVM_CAP_COALESCED_MMIO:
1219                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1220                 break;
1221         case KVM_CAP_VAPIC:
1222                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1223                 break;
1224         case KVM_CAP_NR_VCPUS:
1225                 r = KVM_MAX_VCPUS;
1226                 break;
1227         case KVM_CAP_NR_MEMSLOTS:
1228                 r = KVM_MEMORY_SLOTS;
1229                 break;
1230         case KVM_CAP_PV_MMU:
1231                 r = !tdp_enabled;
1232                 break;
1233         case KVM_CAP_IOMMU:
1234                 r = iommu_found();
1235                 break;
1236         case KVM_CAP_MCE:
1237                 r = KVM_MAX_MCE_BANKS;
1238                 break;
1239         default:
1240                 r = 0;
1241                 break;
1242         }
1243         return r;
1244
1245 }
1246
1247 long kvm_arch_dev_ioctl(struct file *filp,
1248                         unsigned int ioctl, unsigned long arg)
1249 {
1250         void __user *argp = (void __user *)arg;
1251         long r;
1252
1253         switch (ioctl) {
1254         case KVM_GET_MSR_INDEX_LIST: {
1255                 struct kvm_msr_list __user *user_msr_list = argp;
1256                 struct kvm_msr_list msr_list;
1257                 unsigned n;
1258
1259                 r = -EFAULT;
1260                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1261                         goto out;
1262                 n = msr_list.nmsrs;
1263                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1264                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1265                         goto out;
1266                 r = -E2BIG;
1267                 if (n < msr_list.nmsrs)
1268                         goto out;
1269                 r = -EFAULT;
1270                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1271                                  num_msrs_to_save * sizeof(u32)))
1272                         goto out;
1273                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1274                                  &emulated_msrs,
1275                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1276                         goto out;
1277                 r = 0;
1278                 break;
1279         }
1280         case KVM_GET_SUPPORTED_CPUID: {
1281                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1282                 struct kvm_cpuid2 cpuid;
1283
1284                 r = -EFAULT;
1285                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1286                         goto out;
1287                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1288                                                       cpuid_arg->entries);
1289                 if (r)
1290                         goto out;
1291
1292                 r = -EFAULT;
1293                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1294                         goto out;
1295                 r = 0;
1296                 break;
1297         }
1298         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1299                 u64 mce_cap;
1300
1301                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1302                 r = -EFAULT;
1303                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1304                         goto out;
1305                 r = 0;
1306                 break;
1307         }
1308         default:
1309                 r = -EINVAL;
1310         }
1311 out:
1312         return r;
1313 }
1314
1315 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1316 {
1317         kvm_x86_ops->vcpu_load(vcpu, cpu);
1318         kvm_request_guest_time_update(vcpu);
1319 }
1320
1321 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1322 {
1323         kvm_x86_ops->vcpu_put(vcpu);
1324         kvm_put_guest_fpu(vcpu);
1325 }
1326
1327 static int is_efer_nx(void)
1328 {
1329         unsigned long long efer = 0;
1330
1331         rdmsrl_safe(MSR_EFER, &efer);
1332         return efer & EFER_NX;
1333 }
1334
1335 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1336 {
1337         int i;
1338         struct kvm_cpuid_entry2 *e, *entry;
1339
1340         entry = NULL;
1341         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1342                 e = &vcpu->arch.cpuid_entries[i];
1343                 if (e->function == 0x80000001) {
1344                         entry = e;
1345                         break;
1346                 }
1347         }
1348         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1349                 entry->edx &= ~(1 << 20);
1350                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1351         }
1352 }
1353
1354 /* when an old userspace process fills a new kernel module */
1355 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1356                                     struct kvm_cpuid *cpuid,
1357                                     struct kvm_cpuid_entry __user *entries)
1358 {
1359         int r, i;
1360         struct kvm_cpuid_entry *cpuid_entries;
1361
1362         r = -E2BIG;
1363         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1364                 goto out;
1365         r = -ENOMEM;
1366         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1367         if (!cpuid_entries)
1368                 goto out;
1369         r = -EFAULT;
1370         if (copy_from_user(cpuid_entries, entries,
1371                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1372                 goto out_free;
1373         for (i = 0; i < cpuid->nent; i++) {
1374                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1375                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1376                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1377                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1378                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1379                 vcpu->arch.cpuid_entries[i].index = 0;
1380                 vcpu->arch.cpuid_entries[i].flags = 0;
1381                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1382                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1383                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1384         }
1385         vcpu->arch.cpuid_nent = cpuid->nent;
1386         cpuid_fix_nx_cap(vcpu);
1387         r = 0;
1388         kvm_apic_set_version(vcpu);
1389
1390 out_free:
1391         vfree(cpuid_entries);
1392 out:
1393         return r;
1394 }
1395
1396 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1397                                      struct kvm_cpuid2 *cpuid,
1398                                      struct kvm_cpuid_entry2 __user *entries)
1399 {
1400         int r;
1401
1402         r = -E2BIG;
1403         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1404                 goto out;
1405         r = -EFAULT;
1406         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1407                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1408                 goto out;
1409         vcpu->arch.cpuid_nent = cpuid->nent;
1410         kvm_apic_set_version(vcpu);
1411         return 0;
1412
1413 out:
1414         return r;
1415 }
1416
1417 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1418                                      struct kvm_cpuid2 *cpuid,
1419                                      struct kvm_cpuid_entry2 __user *entries)
1420 {
1421         int r;
1422
1423         r = -E2BIG;
1424         if (cpuid->nent < vcpu->arch.cpuid_nent)
1425                 goto out;
1426         r = -EFAULT;
1427         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1428                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1429                 goto out;
1430         return 0;
1431
1432 out:
1433         cpuid->nent = vcpu->arch.cpuid_nent;
1434         return r;
1435 }
1436
1437 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1438                            u32 index)
1439 {
1440         entry->function = function;
1441         entry->index = index;
1442         cpuid_count(entry->function, entry->index,
1443                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1444         entry->flags = 0;
1445 }
1446
1447 #define F(x) bit(X86_FEATURE_##x)
1448
1449 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1450                          u32 index, int *nent, int maxnent)
1451 {
1452         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1453 #ifdef CONFIG_X86_64
1454         unsigned f_lm = F(LM);
1455 #else
1456         unsigned f_lm = 0;
1457 #endif
1458
1459         /* cpuid 1.edx */
1460         const u32 kvm_supported_word0_x86_features =
1461                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1462                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1463                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1464                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1465                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1466                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1467                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1468                 0 /* HTT, TM, Reserved, PBE */;
1469         /* cpuid 0x80000001.edx */
1470         const u32 kvm_supported_word1_x86_features =
1471                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1472                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1473                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1474                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1475                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1476                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1477                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1478                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1479         /* cpuid 1.ecx */
1480         const u32 kvm_supported_word4_x86_features =
1481                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1482                 0 /* DS-CPL, VMX, SMX, EST */ |
1483                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1484                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1485                 0 /* Reserved, DCA */ | F(XMM4_1) |
1486                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1487                 0 /* Reserved, XSAVE, OSXSAVE */;
1488         /* cpuid 0x80000001.ecx */
1489         const u32 kvm_supported_word6_x86_features =
1490                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1491                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1492                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1493                 0 /* SKINIT */ | 0 /* WDT */;
1494
1495         /* all calls to cpuid_count() should be made on the same cpu */
1496         get_cpu();
1497         do_cpuid_1_ent(entry, function, index);
1498         ++*nent;
1499
1500         switch (function) {
1501         case 0:
1502                 entry->eax = min(entry->eax, (u32)0xb);
1503                 break;
1504         case 1:
1505                 entry->edx &= kvm_supported_word0_x86_features;
1506                 entry->ecx &= kvm_supported_word4_x86_features;
1507                 break;
1508         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1509          * may return different values. This forces us to get_cpu() before
1510          * issuing the first command, and also to emulate this annoying behavior
1511          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1512         case 2: {
1513                 int t, times = entry->eax & 0xff;
1514
1515                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1516                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1517                 for (t = 1; t < times && *nent < maxnent; ++t) {
1518                         do_cpuid_1_ent(&entry[t], function, 0);
1519                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1520                         ++*nent;
1521                 }
1522                 break;
1523         }
1524         /* function 4 and 0xb have additional index. */
1525         case 4: {
1526                 int i, cache_type;
1527
1528                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1529                 /* read more entries until cache_type is zero */
1530                 for (i = 1; *nent < maxnent; ++i) {
1531                         cache_type = entry[i - 1].eax & 0x1f;
1532                         if (!cache_type)
1533                                 break;
1534                         do_cpuid_1_ent(&entry[i], function, i);
1535                         entry[i].flags |=
1536                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1537                         ++*nent;
1538                 }
1539                 break;
1540         }
1541         case 0xb: {
1542                 int i, level_type;
1543
1544                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1545                 /* read more entries until level_type is zero */
1546                 for (i = 1; *nent < maxnent; ++i) {
1547                         level_type = entry[i - 1].ecx & 0xff00;
1548                         if (!level_type)
1549                                 break;
1550                         do_cpuid_1_ent(&entry[i], function, i);
1551                         entry[i].flags |=
1552                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1553                         ++*nent;
1554                 }
1555                 break;
1556         }
1557         case 0x80000000:
1558                 entry->eax = min(entry->eax, 0x8000001a);
1559                 break;
1560         case 0x80000001:
1561                 entry->edx &= kvm_supported_word1_x86_features;
1562                 entry->ecx &= kvm_supported_word6_x86_features;
1563                 break;
1564         }
1565         put_cpu();
1566 }
1567
1568 #undef F
1569
1570 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1571                                      struct kvm_cpuid_entry2 __user *entries)
1572 {
1573         struct kvm_cpuid_entry2 *cpuid_entries;
1574         int limit, nent = 0, r = -E2BIG;
1575         u32 func;
1576
1577         if (cpuid->nent < 1)
1578                 goto out;
1579         r = -ENOMEM;
1580         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1581         if (!cpuid_entries)
1582                 goto out;
1583
1584         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1585         limit = cpuid_entries[0].eax;
1586         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1587                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1588                              &nent, cpuid->nent);
1589         r = -E2BIG;
1590         if (nent >= cpuid->nent)
1591                 goto out_free;
1592
1593         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1594         limit = cpuid_entries[nent - 1].eax;
1595         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1596                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1597                              &nent, cpuid->nent);
1598         r = -E2BIG;
1599         if (nent >= cpuid->nent)
1600                 goto out_free;
1601
1602         r = -EFAULT;
1603         if (copy_to_user(entries, cpuid_entries,
1604                          nent * sizeof(struct kvm_cpuid_entry2)))
1605                 goto out_free;
1606         cpuid->nent = nent;
1607         r = 0;
1608
1609 out_free:
1610         vfree(cpuid_entries);
1611 out:
1612         return r;
1613 }
1614
1615 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1616                                     struct kvm_lapic_state *s)
1617 {
1618         vcpu_load(vcpu);
1619         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1620         vcpu_put(vcpu);
1621
1622         return 0;
1623 }
1624
1625 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1626                                     struct kvm_lapic_state *s)
1627 {
1628         vcpu_load(vcpu);
1629         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1630         kvm_apic_post_state_restore(vcpu);
1631         vcpu_put(vcpu);
1632
1633         return 0;
1634 }
1635
1636 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1637                                     struct kvm_interrupt *irq)
1638 {
1639         if (irq->irq < 0 || irq->irq >= 256)
1640                 return -EINVAL;
1641         if (irqchip_in_kernel(vcpu->kvm))
1642                 return -ENXIO;
1643         vcpu_load(vcpu);
1644
1645         kvm_queue_interrupt(vcpu, irq->irq, false);
1646
1647         vcpu_put(vcpu);
1648
1649         return 0;
1650 }
1651
1652 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1653 {
1654         vcpu_load(vcpu);
1655         kvm_inject_nmi(vcpu);
1656         vcpu_put(vcpu);
1657
1658         return 0;
1659 }
1660
1661 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1662                                            struct kvm_tpr_access_ctl *tac)
1663 {
1664         if (tac->flags)
1665                 return -EINVAL;
1666         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1667         return 0;
1668 }
1669
1670 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1671                                         u64 mcg_cap)
1672 {
1673         int r;
1674         unsigned bank_num = mcg_cap & 0xff, bank;
1675
1676         r = -EINVAL;
1677         if (!bank_num)
1678                 goto out;
1679         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1680                 goto out;
1681         r = 0;
1682         vcpu->arch.mcg_cap = mcg_cap;
1683         /* Init IA32_MCG_CTL to all 1s */
1684         if (mcg_cap & MCG_CTL_P)
1685                 vcpu->arch.mcg_ctl = ~(u64)0;
1686         /* Init IA32_MCi_CTL to all 1s */
1687         for (bank = 0; bank < bank_num; bank++)
1688                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1689 out:
1690         return r;
1691 }
1692
1693 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1694                                       struct kvm_x86_mce *mce)
1695 {
1696         u64 mcg_cap = vcpu->arch.mcg_cap;
1697         unsigned bank_num = mcg_cap & 0xff;
1698         u64 *banks = vcpu->arch.mce_banks;
1699
1700         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1701                 return -EINVAL;
1702         /*
1703          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1704          * reporting is disabled
1705          */
1706         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1707             vcpu->arch.mcg_ctl != ~(u64)0)
1708                 return 0;
1709         banks += 4 * mce->bank;
1710         /*
1711          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1712          * reporting is disabled for the bank
1713          */
1714         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1715                 return 0;
1716         if (mce->status & MCI_STATUS_UC) {
1717                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1718                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1719                         printk(KERN_DEBUG "kvm: set_mce: "
1720                                "injects mce exception while "
1721                                "previous one is in progress!\n");
1722                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1723                         return 0;
1724                 }
1725                 if (banks[1] & MCI_STATUS_VAL)
1726                         mce->status |= MCI_STATUS_OVER;
1727                 banks[2] = mce->addr;
1728                 banks[3] = mce->misc;
1729                 vcpu->arch.mcg_status = mce->mcg_status;
1730                 banks[1] = mce->status;
1731                 kvm_queue_exception(vcpu, MC_VECTOR);
1732         } else if (!(banks[1] & MCI_STATUS_VAL)
1733                    || !(banks[1] & MCI_STATUS_UC)) {
1734                 if (banks[1] & MCI_STATUS_VAL)
1735                         mce->status |= MCI_STATUS_OVER;
1736                 banks[2] = mce->addr;
1737                 banks[3] = mce->misc;
1738                 banks[1] = mce->status;
1739         } else
1740                 banks[1] |= MCI_STATUS_OVER;
1741         return 0;
1742 }
1743
1744 long kvm_arch_vcpu_ioctl(struct file *filp,
1745                          unsigned int ioctl, unsigned long arg)
1746 {
1747         struct kvm_vcpu *vcpu = filp->private_data;
1748         void __user *argp = (void __user *)arg;
1749         int r;
1750         struct kvm_lapic_state *lapic = NULL;
1751
1752         switch (ioctl) {
1753         case KVM_GET_LAPIC: {
1754                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1755
1756                 r = -ENOMEM;
1757                 if (!lapic)
1758                         goto out;
1759                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1760                 if (r)
1761                         goto out;
1762                 r = -EFAULT;
1763                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1764                         goto out;
1765                 r = 0;
1766                 break;
1767         }
1768         case KVM_SET_LAPIC: {
1769                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1770                 r = -ENOMEM;
1771                 if (!lapic)
1772                         goto out;
1773                 r = -EFAULT;
1774                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1775                         goto out;
1776                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1777                 if (r)
1778                         goto out;
1779                 r = 0;
1780                 break;
1781         }
1782         case KVM_INTERRUPT: {
1783                 struct kvm_interrupt irq;
1784
1785                 r = -EFAULT;
1786                 if (copy_from_user(&irq, argp, sizeof irq))
1787                         goto out;
1788                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1789                 if (r)
1790                         goto out;
1791                 r = 0;
1792                 break;
1793         }
1794         case KVM_NMI: {
1795                 r = kvm_vcpu_ioctl_nmi(vcpu);
1796                 if (r)
1797                         goto out;
1798                 r = 0;
1799                 break;
1800         }
1801         case KVM_SET_CPUID: {
1802                 struct kvm_cpuid __user *cpuid_arg = argp;
1803                 struct kvm_cpuid cpuid;
1804
1805                 r = -EFAULT;
1806                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1807                         goto out;
1808                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1809                 if (r)
1810                         goto out;
1811                 break;
1812         }
1813         case KVM_SET_CPUID2: {
1814                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1815                 struct kvm_cpuid2 cpuid;
1816
1817                 r = -EFAULT;
1818                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1819                         goto out;
1820                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1821                                               cpuid_arg->entries);
1822                 if (r)
1823                         goto out;
1824                 break;
1825         }
1826         case KVM_GET_CPUID2: {
1827                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1828                 struct kvm_cpuid2 cpuid;
1829
1830                 r = -EFAULT;
1831                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1832                         goto out;
1833                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1834                                               cpuid_arg->entries);
1835                 if (r)
1836                         goto out;
1837                 r = -EFAULT;
1838                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1839                         goto out;
1840                 r = 0;
1841                 break;
1842         }
1843         case KVM_GET_MSRS:
1844                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1845                 break;
1846         case KVM_SET_MSRS:
1847                 r = msr_io(vcpu, argp, do_set_msr, 0);
1848                 break;
1849         case KVM_TPR_ACCESS_REPORTING: {
1850                 struct kvm_tpr_access_ctl tac;
1851
1852                 r = -EFAULT;
1853                 if (copy_from_user(&tac, argp, sizeof tac))
1854                         goto out;
1855                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1856                 if (r)
1857                         goto out;
1858                 r = -EFAULT;
1859                 if (copy_to_user(argp, &tac, sizeof tac))
1860                         goto out;
1861                 r = 0;
1862                 break;
1863         };
1864         case KVM_SET_VAPIC_ADDR: {
1865                 struct kvm_vapic_addr va;
1866
1867                 r = -EINVAL;
1868                 if (!irqchip_in_kernel(vcpu->kvm))
1869                         goto out;
1870                 r = -EFAULT;
1871                 if (copy_from_user(&va, argp, sizeof va))
1872                         goto out;
1873                 r = 0;
1874                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1875                 break;
1876         }
1877         case KVM_X86_SETUP_MCE: {
1878                 u64 mcg_cap;
1879
1880                 r = -EFAULT;
1881                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1882                         goto out;
1883                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1884                 break;
1885         }
1886         case KVM_X86_SET_MCE: {
1887                 struct kvm_x86_mce mce;
1888
1889                 r = -EFAULT;
1890                 if (copy_from_user(&mce, argp, sizeof mce))
1891                         goto out;
1892                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1893                 break;
1894         }
1895         default:
1896                 r = -EINVAL;
1897         }
1898 out:
1899         kfree(lapic);
1900         return r;
1901 }
1902
1903 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1904 {
1905         int ret;
1906
1907         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1908                 return -1;
1909         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1910         return ret;
1911 }
1912
1913 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1914                                           u32 kvm_nr_mmu_pages)
1915 {
1916         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1917                 return -EINVAL;
1918
1919         down_write(&kvm->slots_lock);
1920         spin_lock(&kvm->mmu_lock);
1921
1922         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1923         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1924
1925         spin_unlock(&kvm->mmu_lock);
1926         up_write(&kvm->slots_lock);
1927         return 0;
1928 }
1929
1930 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1931 {
1932         return kvm->arch.n_alloc_mmu_pages;
1933 }
1934
1935 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1936 {
1937         int i;
1938         struct kvm_mem_alias *alias;
1939
1940         for (i = 0; i < kvm->arch.naliases; ++i) {
1941                 alias = &kvm->arch.aliases[i];
1942                 if (gfn >= alias->base_gfn
1943                     && gfn < alias->base_gfn + alias->npages)
1944                         return alias->target_gfn + gfn - alias->base_gfn;
1945         }
1946         return gfn;
1947 }
1948
1949 /*
1950  * Set a new alias region.  Aliases map a portion of physical memory into
1951  * another portion.  This is useful for memory windows, for example the PC
1952  * VGA region.
1953  */
1954 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1955                                          struct kvm_memory_alias *alias)
1956 {
1957         int r, n;
1958         struct kvm_mem_alias *p;
1959
1960         r = -EINVAL;
1961         /* General sanity checks */
1962         if (alias->memory_size & (PAGE_SIZE - 1))
1963                 goto out;
1964         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1965                 goto out;
1966         if (alias->slot >= KVM_ALIAS_SLOTS)
1967                 goto out;
1968         if (alias->guest_phys_addr + alias->memory_size
1969             < alias->guest_phys_addr)
1970                 goto out;
1971         if (alias->target_phys_addr + alias->memory_size
1972             < alias->target_phys_addr)
1973                 goto out;
1974
1975         down_write(&kvm->slots_lock);
1976         spin_lock(&kvm->mmu_lock);
1977
1978         p = &kvm->arch.aliases[alias->slot];
1979         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1980         p->npages = alias->memory_size >> PAGE_SHIFT;
1981         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1982
1983         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1984                 if (kvm->arch.aliases[n - 1].npages)
1985                         break;
1986         kvm->arch.naliases = n;
1987
1988         spin_unlock(&kvm->mmu_lock);
1989         kvm_mmu_zap_all(kvm);
1990
1991         up_write(&kvm->slots_lock);
1992
1993         return 0;
1994
1995 out:
1996         return r;
1997 }
1998
1999 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2000 {
2001         int r;
2002
2003         r = 0;
2004         switch (chip->chip_id) {
2005         case KVM_IRQCHIP_PIC_MASTER:
2006                 memcpy(&chip->chip.pic,
2007                         &pic_irqchip(kvm)->pics[0],
2008                         sizeof(struct kvm_pic_state));
2009                 break;
2010         case KVM_IRQCHIP_PIC_SLAVE:
2011                 memcpy(&chip->chip.pic,
2012                         &pic_irqchip(kvm)->pics[1],
2013                         sizeof(struct kvm_pic_state));
2014                 break;
2015         case KVM_IRQCHIP_IOAPIC:
2016                 memcpy(&chip->chip.ioapic,
2017                         ioapic_irqchip(kvm),
2018                         sizeof(struct kvm_ioapic_state));
2019                 break;
2020         default:
2021                 r = -EINVAL;
2022                 break;
2023         }
2024         return r;
2025 }
2026
2027 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2028 {
2029         int r;
2030
2031         r = 0;
2032         switch (chip->chip_id) {
2033         case KVM_IRQCHIP_PIC_MASTER:
2034                 spin_lock(&pic_irqchip(kvm)->lock);
2035                 memcpy(&pic_irqchip(kvm)->pics[0],
2036                         &chip->chip.pic,
2037                         sizeof(struct kvm_pic_state));
2038                 spin_unlock(&pic_irqchip(kvm)->lock);
2039                 break;
2040         case KVM_IRQCHIP_PIC_SLAVE:
2041                 spin_lock(&pic_irqchip(kvm)->lock);
2042                 memcpy(&pic_irqchip(kvm)->pics[1],
2043                         &chip->chip.pic,
2044                         sizeof(struct kvm_pic_state));
2045                 spin_unlock(&pic_irqchip(kvm)->lock);
2046                 break;
2047         case KVM_IRQCHIP_IOAPIC:
2048                 mutex_lock(&kvm->irq_lock);
2049                 memcpy(ioapic_irqchip(kvm),
2050                         &chip->chip.ioapic,
2051                         sizeof(struct kvm_ioapic_state));
2052                 mutex_unlock(&kvm->irq_lock);
2053                 break;
2054         default:
2055                 r = -EINVAL;
2056                 break;
2057         }
2058         kvm_pic_update_irq(pic_irqchip(kvm));
2059         return r;
2060 }
2061
2062 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2063 {
2064         int r = 0;
2065
2066         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2067         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2068         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2069         return r;
2070 }
2071
2072 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2073 {
2074         int r = 0;
2075
2076         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2077         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2078         kvm_pit_load_count(kvm, 0, ps->channels[0].count);
2079         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2080         return r;
2081 }
2082
2083 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2084                                  struct kvm_reinject_control *control)
2085 {
2086         if (!kvm->arch.vpit)
2087                 return -ENXIO;
2088         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2089         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2090         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2091         return 0;
2092 }
2093
2094 /*
2095  * Get (and clear) the dirty memory log for a memory slot.
2096  */
2097 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2098                                       struct kvm_dirty_log *log)
2099 {
2100         int r;
2101         int n;
2102         struct kvm_memory_slot *memslot;
2103         int is_dirty = 0;
2104
2105         down_write(&kvm->slots_lock);
2106
2107         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2108         if (r)
2109                 goto out;
2110
2111         /* If nothing is dirty, don't bother messing with page tables. */
2112         if (is_dirty) {
2113                 spin_lock(&kvm->mmu_lock);
2114                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2115                 spin_unlock(&kvm->mmu_lock);
2116                 kvm_flush_remote_tlbs(kvm);
2117                 memslot = &kvm->memslots[log->slot];
2118                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2119                 memset(memslot->dirty_bitmap, 0, n);
2120         }
2121         r = 0;
2122 out:
2123         up_write(&kvm->slots_lock);
2124         return r;
2125 }
2126
2127 long kvm_arch_vm_ioctl(struct file *filp,
2128                        unsigned int ioctl, unsigned long arg)
2129 {
2130         struct kvm *kvm = filp->private_data;
2131         void __user *argp = (void __user *)arg;
2132         int r = -EINVAL;
2133         /*
2134          * This union makes it completely explicit to gcc-3.x
2135          * that these two variables' stack usage should be
2136          * combined, not added together.
2137          */
2138         union {
2139                 struct kvm_pit_state ps;
2140                 struct kvm_memory_alias alias;
2141                 struct kvm_pit_config pit_config;
2142         } u;
2143
2144         switch (ioctl) {
2145         case KVM_SET_TSS_ADDR:
2146                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2147                 if (r < 0)
2148                         goto out;
2149                 break;
2150         case KVM_SET_MEMORY_REGION: {
2151                 struct kvm_memory_region kvm_mem;
2152                 struct kvm_userspace_memory_region kvm_userspace_mem;
2153
2154                 r = -EFAULT;
2155                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2156                         goto out;
2157                 kvm_userspace_mem.slot = kvm_mem.slot;
2158                 kvm_userspace_mem.flags = kvm_mem.flags;
2159                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2160                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2161                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2162                 if (r)
2163                         goto out;
2164                 break;
2165         }
2166         case KVM_SET_NR_MMU_PAGES:
2167                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2168                 if (r)
2169                         goto out;
2170                 break;
2171         case KVM_GET_NR_MMU_PAGES:
2172                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2173                 break;
2174         case KVM_SET_MEMORY_ALIAS:
2175                 r = -EFAULT;
2176                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2177                         goto out;
2178                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2179                 if (r)
2180                         goto out;
2181                 break;
2182         case KVM_CREATE_IRQCHIP:
2183                 r = -ENOMEM;
2184                 kvm->arch.vpic = kvm_create_pic(kvm);
2185                 if (kvm->arch.vpic) {
2186                         r = kvm_ioapic_init(kvm);
2187                         if (r) {
2188                                 kfree(kvm->arch.vpic);
2189                                 kvm->arch.vpic = NULL;
2190                                 goto out;
2191                         }
2192                 } else
2193                         goto out;
2194                 r = kvm_setup_default_irq_routing(kvm);
2195                 if (r) {
2196                         kfree(kvm->arch.vpic);
2197                         kfree(kvm->arch.vioapic);
2198                         goto out;
2199                 }
2200                 break;
2201         case KVM_CREATE_PIT:
2202                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2203                 goto create_pit;
2204         case KVM_CREATE_PIT2:
2205                 r = -EFAULT;
2206                 if (copy_from_user(&u.pit_config, argp,
2207                                    sizeof(struct kvm_pit_config)))
2208                         goto out;
2209         create_pit:
2210                 down_write(&kvm->slots_lock);
2211                 r = -EEXIST;
2212                 if (kvm->arch.vpit)
2213                         goto create_pit_unlock;
2214                 r = -ENOMEM;
2215                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2216                 if (kvm->arch.vpit)
2217                         r = 0;
2218         create_pit_unlock:
2219                 up_write(&kvm->slots_lock);
2220                 break;
2221         case KVM_IRQ_LINE_STATUS:
2222         case KVM_IRQ_LINE: {
2223                 struct kvm_irq_level irq_event;
2224
2225                 r = -EFAULT;
2226                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2227                         goto out;
2228                 if (irqchip_in_kernel(kvm)) {
2229                         __s32 status;
2230                         mutex_lock(&kvm->irq_lock);
2231                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2232                                         irq_event.irq, irq_event.level);
2233                         mutex_unlock(&kvm->irq_lock);
2234                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2235                                 irq_event.status = status;
2236                                 if (copy_to_user(argp, &irq_event,
2237                                                         sizeof irq_event))
2238                                         goto out;
2239                         }
2240                         r = 0;
2241                 }
2242                 break;
2243         }
2244         case KVM_GET_IRQCHIP: {
2245                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2246                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2247
2248                 r = -ENOMEM;
2249                 if (!chip)
2250                         goto out;
2251                 r = -EFAULT;
2252                 if (copy_from_user(chip, argp, sizeof *chip))
2253                         goto get_irqchip_out;
2254                 r = -ENXIO;
2255                 if (!irqchip_in_kernel(kvm))
2256                         goto get_irqchip_out;
2257                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2258                 if (r)
2259                         goto get_irqchip_out;
2260                 r = -EFAULT;
2261                 if (copy_to_user(argp, chip, sizeof *chip))
2262                         goto get_irqchip_out;
2263                 r = 0;
2264         get_irqchip_out:
2265                 kfree(chip);
2266                 if (r)
2267                         goto out;
2268                 break;
2269         }
2270         case KVM_SET_IRQCHIP: {
2271                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2272                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2273
2274                 r = -ENOMEM;
2275                 if (!chip)
2276                         goto out;
2277                 r = -EFAULT;
2278                 if (copy_from_user(chip, argp, sizeof *chip))
2279                         goto set_irqchip_out;
2280                 r = -ENXIO;
2281                 if (!irqchip_in_kernel(kvm))
2282                         goto set_irqchip_out;
2283                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2284                 if (r)
2285                         goto set_irqchip_out;
2286                 r = 0;
2287         set_irqchip_out:
2288                 kfree(chip);
2289                 if (r)
2290                         goto out;
2291                 break;
2292         }
2293         case KVM_GET_PIT: {
2294                 r = -EFAULT;
2295                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2296                         goto out;
2297                 r = -ENXIO;
2298                 if (!kvm->arch.vpit)
2299                         goto out;
2300                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2301                 if (r)
2302                         goto out;
2303                 r = -EFAULT;
2304                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2305                         goto out;
2306                 r = 0;
2307                 break;
2308         }
2309         case KVM_SET_PIT: {
2310                 r = -EFAULT;
2311                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2312                         goto out;
2313                 r = -ENXIO;
2314                 if (!kvm->arch.vpit)
2315                         goto out;
2316                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2317                 if (r)
2318                         goto out;
2319                 r = 0;
2320                 break;
2321         }
2322         case KVM_REINJECT_CONTROL: {
2323                 struct kvm_reinject_control control;
2324                 r =  -EFAULT;
2325                 if (copy_from_user(&control, argp, sizeof(control)))
2326                         goto out;
2327                 r = kvm_vm_ioctl_reinject(kvm, &control);
2328                 if (r)
2329                         goto out;
2330                 r = 0;
2331                 break;
2332         }
2333         default:
2334                 ;
2335         }
2336 out:
2337         return r;
2338 }
2339
2340 static void kvm_init_msr_list(void)
2341 {
2342         u32 dummy[2];
2343         unsigned i, j;
2344
2345         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2346                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2347                         continue;
2348                 if (j < i)
2349                         msrs_to_save[j] = msrs_to_save[i];
2350                 j++;
2351         }
2352         num_msrs_to_save = j;
2353 }
2354
2355 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2356                            const void *v)
2357 {
2358         if (vcpu->arch.apic &&
2359             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2360                 return 0;
2361
2362         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2363 }
2364
2365 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2366 {
2367         if (vcpu->arch.apic &&
2368             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2369                 return 0;
2370
2371         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2372 }
2373
2374 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2375                                struct kvm_vcpu *vcpu)
2376 {
2377         void *data = val;
2378         int r = X86EMUL_CONTINUE;
2379
2380         while (bytes) {
2381                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2382                 unsigned offset = addr & (PAGE_SIZE-1);
2383                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2384                 int ret;
2385
2386                 if (gpa == UNMAPPED_GVA) {
2387                         r = X86EMUL_PROPAGATE_FAULT;
2388                         goto out;
2389                 }
2390                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2391                 if (ret < 0) {
2392                         r = X86EMUL_UNHANDLEABLE;
2393                         goto out;
2394                 }
2395
2396                 bytes -= toread;
2397                 data += toread;
2398                 addr += toread;
2399         }
2400 out:
2401         return r;
2402 }
2403
2404 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2405                                 struct kvm_vcpu *vcpu)
2406 {
2407         void *data = val;
2408         int r = X86EMUL_CONTINUE;
2409
2410         while (bytes) {
2411                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2412                 unsigned offset = addr & (PAGE_SIZE-1);
2413                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2414                 int ret;
2415
2416                 if (gpa == UNMAPPED_GVA) {
2417                         r = X86EMUL_PROPAGATE_FAULT;
2418                         goto out;
2419                 }
2420                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2421                 if (ret < 0) {
2422                         r = X86EMUL_UNHANDLEABLE;
2423                         goto out;
2424                 }
2425
2426                 bytes -= towrite;
2427                 data += towrite;
2428                 addr += towrite;
2429         }
2430 out:
2431         return r;
2432 }
2433
2434
2435 static int emulator_read_emulated(unsigned long addr,
2436                                   void *val,
2437                                   unsigned int bytes,
2438                                   struct kvm_vcpu *vcpu)
2439 {
2440         gpa_t                 gpa;
2441
2442         if (vcpu->mmio_read_completed) {
2443                 memcpy(val, vcpu->mmio_data, bytes);
2444                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2445                                vcpu->mmio_phys_addr, *(u64 *)val);
2446                 vcpu->mmio_read_completed = 0;
2447                 return X86EMUL_CONTINUE;
2448         }
2449
2450         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2451
2452         /* For APIC access vmexit */
2453         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2454                 goto mmio;
2455
2456         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2457                                 == X86EMUL_CONTINUE)
2458                 return X86EMUL_CONTINUE;
2459         if (gpa == UNMAPPED_GVA)
2460                 return X86EMUL_PROPAGATE_FAULT;
2461
2462 mmio:
2463         /*
2464          * Is this MMIO handled locally?
2465          */
2466         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2467                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2468                 return X86EMUL_CONTINUE;
2469         }
2470
2471         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2472
2473         vcpu->mmio_needed = 1;
2474         vcpu->mmio_phys_addr = gpa;
2475         vcpu->mmio_size = bytes;
2476         vcpu->mmio_is_write = 0;
2477
2478         return X86EMUL_UNHANDLEABLE;
2479 }
2480
2481 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2482                           const void *val, int bytes)
2483 {
2484         int ret;
2485
2486         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2487         if (ret < 0)
2488                 return 0;
2489         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2490         return 1;
2491 }
2492
2493 static int emulator_write_emulated_onepage(unsigned long addr,
2494                                            const void *val,
2495                                            unsigned int bytes,
2496                                            struct kvm_vcpu *vcpu)
2497 {
2498         gpa_t                 gpa;
2499
2500         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2501
2502         if (gpa == UNMAPPED_GVA) {
2503                 kvm_inject_page_fault(vcpu, addr, 2);
2504                 return X86EMUL_PROPAGATE_FAULT;
2505         }
2506
2507         /* For APIC access vmexit */
2508         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2509                 goto mmio;
2510
2511         if (emulator_write_phys(vcpu, gpa, val, bytes))
2512                 return X86EMUL_CONTINUE;
2513
2514 mmio:
2515         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2516         /*
2517          * Is this MMIO handled locally?
2518          */
2519         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2520                 return X86EMUL_CONTINUE;
2521
2522         vcpu->mmio_needed = 1;
2523         vcpu->mmio_phys_addr = gpa;
2524         vcpu->mmio_size = bytes;
2525         vcpu->mmio_is_write = 1;
2526         memcpy(vcpu->mmio_data, val, bytes);
2527
2528         return X86EMUL_CONTINUE;
2529 }
2530
2531 int emulator_write_emulated(unsigned long addr,
2532                                    const void *val,
2533                                    unsigned int bytes,
2534                                    struct kvm_vcpu *vcpu)
2535 {
2536         /* Crossing a page boundary? */
2537         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2538                 int rc, now;
2539
2540                 now = -addr & ~PAGE_MASK;
2541                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2542                 if (rc != X86EMUL_CONTINUE)
2543                         return rc;
2544                 addr += now;
2545                 val += now;
2546                 bytes -= now;
2547         }
2548         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2549 }
2550 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2551
2552 static int emulator_cmpxchg_emulated(unsigned long addr,
2553                                      const void *old,
2554                                      const void *new,
2555                                      unsigned int bytes,
2556                                      struct kvm_vcpu *vcpu)
2557 {
2558         static int reported;
2559
2560         if (!reported) {
2561                 reported = 1;
2562                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2563         }
2564 #ifndef CONFIG_X86_64
2565         /* guests cmpxchg8b have to be emulated atomically */
2566         if (bytes == 8) {
2567                 gpa_t gpa;
2568                 struct page *page;
2569                 char *kaddr;
2570                 u64 val;
2571
2572                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2573
2574                 if (gpa == UNMAPPED_GVA ||
2575                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2576                         goto emul_write;
2577
2578                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2579                         goto emul_write;
2580
2581                 val = *(u64 *)new;
2582
2583                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2584
2585                 kaddr = kmap_atomic(page, KM_USER0);
2586                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2587                 kunmap_atomic(kaddr, KM_USER0);
2588                 kvm_release_page_dirty(page);
2589         }
2590 emul_write:
2591 #endif
2592
2593         return emulator_write_emulated(addr, new, bytes, vcpu);
2594 }
2595
2596 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2597 {
2598         return kvm_x86_ops->get_segment_base(vcpu, seg);
2599 }
2600
2601 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2602 {
2603         kvm_mmu_invlpg(vcpu, address);
2604         return X86EMUL_CONTINUE;
2605 }
2606
2607 int emulate_clts(struct kvm_vcpu *vcpu)
2608 {
2609         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2610         return X86EMUL_CONTINUE;
2611 }
2612
2613 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2614 {
2615         struct kvm_vcpu *vcpu = ctxt->vcpu;
2616
2617         switch (dr) {
2618         case 0 ... 3:
2619                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2620                 return X86EMUL_CONTINUE;
2621         default:
2622                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2623                 return X86EMUL_UNHANDLEABLE;
2624         }
2625 }
2626
2627 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2628 {
2629         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2630         int exception;
2631
2632         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2633         if (exception) {
2634                 /* FIXME: better handling */
2635                 return X86EMUL_UNHANDLEABLE;
2636         }
2637         return X86EMUL_CONTINUE;
2638 }
2639
2640 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2641 {
2642         u8 opcodes[4];
2643         unsigned long rip = kvm_rip_read(vcpu);
2644         unsigned long rip_linear;
2645
2646         if (!printk_ratelimit())
2647                 return;
2648
2649         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2650
2651         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2652
2653         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2654                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2655 }
2656 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2657
2658 static struct x86_emulate_ops emulate_ops = {
2659         .read_std            = kvm_read_guest_virt,
2660         .read_emulated       = emulator_read_emulated,
2661         .write_emulated      = emulator_write_emulated,
2662         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2663 };
2664
2665 static void cache_all_regs(struct kvm_vcpu *vcpu)
2666 {
2667         kvm_register_read(vcpu, VCPU_REGS_RAX);
2668         kvm_register_read(vcpu, VCPU_REGS_RSP);
2669         kvm_register_read(vcpu, VCPU_REGS_RIP);
2670         vcpu->arch.regs_dirty = ~0;
2671 }
2672
2673 int emulate_instruction(struct kvm_vcpu *vcpu,
2674                         struct kvm_run *run,
2675                         unsigned long cr2,
2676                         u16 error_code,
2677                         int emulation_type)
2678 {
2679         int r, shadow_mask;
2680         struct decode_cache *c;
2681
2682         kvm_clear_exception_queue(vcpu);
2683         vcpu->arch.mmio_fault_cr2 = cr2;
2684         /*
2685          * TODO: fix x86_emulate.c to use guest_read/write_register
2686          * instead of direct ->regs accesses, can save hundred cycles
2687          * on Intel for instructions that don't read/change RSP, for
2688          * for example.
2689          */
2690         cache_all_regs(vcpu);
2691
2692         vcpu->mmio_is_write = 0;
2693         vcpu->arch.pio.string = 0;
2694
2695         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2696                 int cs_db, cs_l;
2697                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2698
2699                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2700                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2701                 vcpu->arch.emulate_ctxt.mode =
2702                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2703                         ? X86EMUL_MODE_REAL : cs_l
2704                         ? X86EMUL_MODE_PROT64 : cs_db
2705                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2706
2707                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2708
2709                 /* Only allow emulation of specific instructions on #UD
2710                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2711                 c = &vcpu->arch.emulate_ctxt.decode;
2712                 if (emulation_type & EMULTYPE_TRAP_UD) {
2713                         if (!c->twobyte)
2714                                 return EMULATE_FAIL;
2715                         switch (c->b) {
2716                         case 0x01: /* VMMCALL */
2717                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2718                                         return EMULATE_FAIL;
2719                                 break;
2720                         case 0x34: /* sysenter */
2721                         case 0x35: /* sysexit */
2722                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2723                                         return EMULATE_FAIL;
2724                                 break;
2725                         case 0x05: /* syscall */
2726                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2727                                         return EMULATE_FAIL;
2728                                 break;
2729                         default:
2730                                 return EMULATE_FAIL;
2731                         }
2732
2733                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2734                                 return EMULATE_FAIL;
2735                 }
2736
2737                 ++vcpu->stat.insn_emulation;
2738                 if (r)  {
2739                         ++vcpu->stat.insn_emulation_fail;
2740                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2741                                 return EMULATE_DONE;
2742                         return EMULATE_FAIL;
2743                 }
2744         }
2745
2746         if (emulation_type & EMULTYPE_SKIP) {
2747                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2748                 return EMULATE_DONE;
2749         }
2750
2751         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2752         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2753
2754         if (r == 0)
2755                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2756
2757         if (vcpu->arch.pio.string)
2758                 return EMULATE_DO_MMIO;
2759
2760         if ((r || vcpu->mmio_is_write) && run) {
2761                 run->exit_reason = KVM_EXIT_MMIO;
2762                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2763                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2764                 run->mmio.len = vcpu->mmio_size;
2765                 run->mmio.is_write = vcpu->mmio_is_write;
2766         }
2767
2768         if (r) {
2769                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2770                         return EMULATE_DONE;
2771                 if (!vcpu->mmio_needed) {
2772                         kvm_report_emulation_failure(vcpu, "mmio");
2773                         return EMULATE_FAIL;
2774                 }
2775                 return EMULATE_DO_MMIO;
2776         }
2777
2778         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2779
2780         if (vcpu->mmio_is_write) {
2781                 vcpu->mmio_needed = 0;
2782                 return EMULATE_DO_MMIO;
2783         }
2784
2785         return EMULATE_DONE;
2786 }
2787 EXPORT_SYMBOL_GPL(emulate_instruction);
2788
2789 static int pio_copy_data(struct kvm_vcpu *vcpu)
2790 {
2791         void *p = vcpu->arch.pio_data;
2792         gva_t q = vcpu->arch.pio.guest_gva;
2793         unsigned bytes;
2794         int ret;
2795
2796         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2797         if (vcpu->arch.pio.in)
2798                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2799         else
2800                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2801         return ret;
2802 }
2803
2804 int complete_pio(struct kvm_vcpu *vcpu)
2805 {
2806         struct kvm_pio_request *io = &vcpu->arch.pio;
2807         long delta;
2808         int r;
2809         unsigned long val;
2810
2811         if (!io->string) {
2812                 if (io->in) {
2813                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2814                         memcpy(&val, vcpu->arch.pio_data, io->size);
2815                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2816                 }
2817         } else {
2818                 if (io->in) {
2819                         r = pio_copy_data(vcpu);
2820                         if (r)
2821                                 return r;
2822                 }
2823
2824                 delta = 1;
2825                 if (io->rep) {
2826                         delta *= io->cur_count;
2827                         /*
2828                          * The size of the register should really depend on
2829                          * current address size.
2830                          */
2831                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2832                         val -= delta;
2833                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2834                 }
2835                 if (io->down)
2836                         delta = -delta;
2837                 delta *= io->size;
2838                 if (io->in) {
2839                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2840                         val += delta;
2841                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2842                 } else {
2843                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2844                         val += delta;
2845                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2846                 }
2847         }
2848
2849         io->count -= io->cur_count;
2850         io->cur_count = 0;
2851
2852         return 0;
2853 }
2854
2855 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2856 {
2857         /* TODO: String I/O for in kernel device */
2858         int r;
2859
2860         if (vcpu->arch.pio.in)
2861                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2862                                     vcpu->arch.pio.size, pd);
2863         else
2864                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2865                                      vcpu->arch.pio.size, pd);
2866         return r;
2867 }
2868
2869 static int pio_string_write(struct kvm_vcpu *vcpu)
2870 {
2871         struct kvm_pio_request *io = &vcpu->arch.pio;
2872         void *pd = vcpu->arch.pio_data;
2873         int i, r = 0;
2874
2875         for (i = 0; i < io->cur_count; i++) {
2876                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2877                                      io->port, io->size, pd)) {
2878                         r = -EOPNOTSUPP;
2879                         break;
2880                 }
2881                 pd += io->size;
2882         }
2883         return r;
2884 }
2885
2886 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2887                   int size, unsigned port)
2888 {
2889         unsigned long val;
2890
2891         vcpu->run->exit_reason = KVM_EXIT_IO;
2892         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2893         vcpu->run->io.size = vcpu->arch.pio.size = size;
2894         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2895         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2896         vcpu->run->io.port = vcpu->arch.pio.port = port;
2897         vcpu->arch.pio.in = in;
2898         vcpu->arch.pio.string = 0;
2899         vcpu->arch.pio.down = 0;
2900         vcpu->arch.pio.rep = 0;
2901
2902         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2903                       size, 1);
2904
2905         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2906         memcpy(vcpu->arch.pio_data, &val, 4);
2907
2908         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2909                 complete_pio(vcpu);
2910                 return 1;
2911         }
2912         return 0;
2913 }
2914 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2915
2916 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2917                   int size, unsigned long count, int down,
2918                   gva_t address, int rep, unsigned port)
2919 {
2920         unsigned now, in_page;
2921         int ret = 0;
2922
2923         vcpu->run->exit_reason = KVM_EXIT_IO;
2924         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2925         vcpu->run->io.size = vcpu->arch.pio.size = size;
2926         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2927         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2928         vcpu->run->io.port = vcpu->arch.pio.port = port;
2929         vcpu->arch.pio.in = in;
2930         vcpu->arch.pio.string = 1;
2931         vcpu->arch.pio.down = down;
2932         vcpu->arch.pio.rep = rep;
2933
2934         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2935                       size, count);
2936
2937         if (!count) {
2938                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2939                 return 1;
2940         }
2941
2942         if (!down)
2943                 in_page = PAGE_SIZE - offset_in_page(address);
2944         else
2945                 in_page = offset_in_page(address) + size;
2946         now = min(count, (unsigned long)in_page / size);
2947         if (!now)
2948                 now = 1;
2949         if (down) {
2950                 /*
2951                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
2952                  */
2953                 pr_unimpl(vcpu, "guest string pio down\n");
2954                 kvm_inject_gp(vcpu, 0);
2955                 return 1;
2956         }
2957         vcpu->run->io.count = now;
2958         vcpu->arch.pio.cur_count = now;
2959
2960         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2961                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2962
2963         vcpu->arch.pio.guest_gva = address;
2964
2965         if (!vcpu->arch.pio.in) {
2966                 /* string PIO write */
2967                 ret = pio_copy_data(vcpu);
2968                 if (ret == X86EMUL_PROPAGATE_FAULT) {
2969                         kvm_inject_gp(vcpu, 0);
2970                         return 1;
2971                 }
2972                 if (ret == 0 && !pio_string_write(vcpu)) {
2973                         complete_pio(vcpu);
2974                         if (vcpu->arch.pio.count == 0)
2975                                 ret = 1;
2976                 }
2977         }
2978         /* no string PIO read support yet */
2979
2980         return ret;
2981 }
2982 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2983
2984 static void bounce_off(void *info)
2985 {
2986         /* nothing */
2987 }
2988
2989 static unsigned int  ref_freq;
2990 static unsigned long tsc_khz_ref;
2991
2992 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2993                                      void *data)
2994 {
2995         struct cpufreq_freqs *freq = data;
2996         struct kvm *kvm;
2997         struct kvm_vcpu *vcpu;
2998         int i, send_ipi = 0;
2999
3000         if (!ref_freq)
3001                 ref_freq = freq->old;
3002
3003         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3004                 return 0;
3005         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3006                 return 0;
3007         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3008
3009         spin_lock(&kvm_lock);
3010         list_for_each_entry(kvm, &vm_list, vm_list) {
3011                 kvm_for_each_vcpu(i, vcpu, kvm) {
3012                         if (vcpu->cpu != freq->cpu)
3013                                 continue;
3014                         if (!kvm_request_guest_time_update(vcpu))
3015                                 continue;
3016                         if (vcpu->cpu != smp_processor_id())
3017                                 send_ipi++;
3018                 }
3019         }
3020         spin_unlock(&kvm_lock);
3021
3022         if (freq->old < freq->new && send_ipi) {
3023                 /*
3024                  * We upscale the frequency.  Must make the guest
3025                  * doesn't see old kvmclock values while running with
3026                  * the new frequency, otherwise we risk the guest sees
3027                  * time go backwards.
3028                  *
3029                  * In case we update the frequency for another cpu
3030                  * (which might be in guest context) send an interrupt
3031                  * to kick the cpu out of guest context.  Next time
3032                  * guest context is entered kvmclock will be updated,
3033                  * so the guest will not see stale values.
3034                  */
3035                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3036         }
3037         return 0;
3038 }
3039
3040 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3041         .notifier_call  = kvmclock_cpufreq_notifier
3042 };
3043
3044 int kvm_arch_init(void *opaque)
3045 {
3046         int r, cpu;
3047         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3048
3049         if (kvm_x86_ops) {
3050                 printk(KERN_ERR "kvm: already loaded the other module\n");
3051                 r = -EEXIST;
3052                 goto out;
3053         }
3054
3055         if (!ops->cpu_has_kvm_support()) {
3056                 printk(KERN_ERR "kvm: no hardware support\n");
3057                 r = -EOPNOTSUPP;
3058                 goto out;
3059         }
3060         if (ops->disabled_by_bios()) {
3061                 printk(KERN_ERR "kvm: disabled by bios\n");
3062                 r = -EOPNOTSUPP;
3063                 goto out;
3064         }
3065
3066         r = kvm_mmu_module_init();
3067         if (r)
3068                 goto out;
3069
3070         kvm_init_msr_list();
3071
3072         kvm_x86_ops = ops;
3073         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3074         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3075         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3076                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3077
3078         for_each_possible_cpu(cpu)
3079                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3080         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3081                 tsc_khz_ref = tsc_khz;
3082                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3083                                           CPUFREQ_TRANSITION_NOTIFIER);
3084         }
3085
3086         return 0;
3087
3088 out:
3089         return r;
3090 }
3091
3092 void kvm_arch_exit(void)
3093 {
3094         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3095                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3096                                             CPUFREQ_TRANSITION_NOTIFIER);
3097         kvm_x86_ops = NULL;
3098         kvm_mmu_module_exit();
3099 }
3100
3101 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3102 {
3103         ++vcpu->stat.halt_exits;
3104         if (irqchip_in_kernel(vcpu->kvm)) {
3105                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3106                 return 1;
3107         } else {
3108                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3109                 return 0;
3110         }
3111 }
3112 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3113
3114 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3115                            unsigned long a1)
3116 {
3117         if (is_long_mode(vcpu))
3118                 return a0;
3119         else
3120                 return a0 | ((gpa_t)a1 << 32);
3121 }
3122
3123 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3124 {
3125         unsigned long nr, a0, a1, a2, a3, ret;
3126         int r = 1;
3127
3128         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3129         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3130         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3131         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3132         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3133
3134         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3135
3136         if (!is_long_mode(vcpu)) {
3137                 nr &= 0xFFFFFFFF;
3138                 a0 &= 0xFFFFFFFF;
3139                 a1 &= 0xFFFFFFFF;
3140                 a2 &= 0xFFFFFFFF;
3141                 a3 &= 0xFFFFFFFF;
3142         }
3143
3144         switch (nr) {
3145         case KVM_HC_VAPIC_POLL_IRQ:
3146                 ret = 0;
3147                 break;
3148         case KVM_HC_MMU_OP:
3149                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3150                 break;
3151         default:
3152                 ret = -KVM_ENOSYS;
3153                 break;
3154         }
3155         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3156         ++vcpu->stat.hypercalls;
3157         return r;
3158 }
3159 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3160
3161 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3162 {
3163         char instruction[3];
3164         int ret = 0;
3165         unsigned long rip = kvm_rip_read(vcpu);
3166
3167
3168         /*
3169          * Blow out the MMU to ensure that no other VCPU has an active mapping
3170          * to ensure that the updated hypercall appears atomically across all
3171          * VCPUs.
3172          */
3173         kvm_mmu_zap_all(vcpu->kvm);
3174
3175         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3176         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3177             != X86EMUL_CONTINUE)
3178                 ret = -EFAULT;
3179
3180         return ret;
3181 }
3182
3183 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3184 {
3185         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3186 }
3187
3188 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3189 {
3190         struct descriptor_table dt = { limit, base };
3191
3192         kvm_x86_ops->set_gdt(vcpu, &dt);
3193 }
3194
3195 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3196 {
3197         struct descriptor_table dt = { limit, base };
3198
3199         kvm_x86_ops->set_idt(vcpu, &dt);
3200 }
3201
3202 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3203                    unsigned long *rflags)
3204 {
3205         kvm_lmsw(vcpu, msw);
3206         *rflags = kvm_x86_ops->get_rflags(vcpu);
3207 }
3208
3209 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3210 {
3211         unsigned long value;
3212
3213         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3214         switch (cr) {
3215         case 0:
3216                 value = vcpu->arch.cr0;
3217                 break;
3218         case 2:
3219                 value = vcpu->arch.cr2;
3220                 break;
3221         case 3:
3222                 value = vcpu->arch.cr3;
3223                 break;
3224         case 4:
3225                 value = vcpu->arch.cr4;
3226                 break;
3227         case 8:
3228                 value = kvm_get_cr8(vcpu);
3229                 break;
3230         default:
3231                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3232                 return 0;
3233         }
3234
3235         return value;
3236 }
3237
3238 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3239                      unsigned long *rflags)
3240 {
3241         switch (cr) {
3242         case 0:
3243                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3244                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3245                 break;
3246         case 2:
3247                 vcpu->arch.cr2 = val;
3248                 break;
3249         case 3:
3250                 kvm_set_cr3(vcpu, val);
3251                 break;
3252         case 4:
3253                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3254                 break;
3255         case 8:
3256                 kvm_set_cr8(vcpu, val & 0xfUL);
3257                 break;
3258         default:
3259                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3260         }
3261 }
3262
3263 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3264 {
3265         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3266         int j, nent = vcpu->arch.cpuid_nent;
3267
3268         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3269         /* when no next entry is found, the current entry[i] is reselected */
3270         for (j = i + 1; ; j = (j + 1) % nent) {
3271                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3272                 if (ej->function == e->function) {
3273                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3274                         return j;
3275                 }
3276         }
3277         return 0; /* silence gcc, even though control never reaches here */
3278 }
3279
3280 /* find an entry with matching function, matching index (if needed), and that
3281  * should be read next (if it's stateful) */
3282 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3283         u32 function, u32 index)
3284 {
3285         if (e->function != function)
3286                 return 0;
3287         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3288                 return 0;
3289         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3290             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3291                 return 0;
3292         return 1;
3293 }
3294
3295 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3296                                               u32 function, u32 index)
3297 {
3298         int i;
3299         struct kvm_cpuid_entry2 *best = NULL;
3300
3301         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3302                 struct kvm_cpuid_entry2 *e;
3303
3304                 e = &vcpu->arch.cpuid_entries[i];
3305                 if (is_matching_cpuid_entry(e, function, index)) {
3306                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3307                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3308                         best = e;
3309                         break;
3310                 }
3311                 /*
3312                  * Both basic or both extended?
3313                  */
3314                 if (((e->function ^ function) & 0x80000000) == 0)
3315                         if (!best || e->function > best->function)
3316                                 best = e;
3317         }
3318         return best;
3319 }
3320
3321 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3322 {
3323         struct kvm_cpuid_entry2 *best;
3324
3325         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3326         if (best)
3327                 return best->eax & 0xff;
3328         return 36;
3329 }
3330
3331 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3332 {
3333         u32 function, index;
3334         struct kvm_cpuid_entry2 *best;
3335
3336         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3337         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3338         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3339         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3340         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3341         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3342         best = kvm_find_cpuid_entry(vcpu, function, index);
3343         if (best) {
3344                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3345                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3346                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3347                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3348         }
3349         kvm_x86_ops->skip_emulated_instruction(vcpu);
3350         trace_kvm_cpuid(function,
3351                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3352                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3353                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3354                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3355 }
3356 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3357
3358 /*
3359  * Check if userspace requested an interrupt window, and that the
3360  * interrupt window is open.
3361  *
3362  * No need to exit to userspace if we already have an interrupt queued.
3363  */
3364 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3365                                           struct kvm_run *kvm_run)
3366 {
3367         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3368                 kvm_run->request_interrupt_window &&
3369                 kvm_arch_interrupt_allowed(vcpu));
3370 }
3371
3372 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3373                               struct kvm_run *kvm_run)
3374 {
3375         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3376         kvm_run->cr8 = kvm_get_cr8(vcpu);
3377         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3378         if (irqchip_in_kernel(vcpu->kvm))
3379                 kvm_run->ready_for_interrupt_injection = 1;
3380         else
3381                 kvm_run->ready_for_interrupt_injection =
3382                         kvm_arch_interrupt_allowed(vcpu) &&
3383                         !kvm_cpu_has_interrupt(vcpu) &&
3384                         !kvm_event_needs_reinjection(vcpu);
3385 }
3386
3387 static void vapic_enter(struct kvm_vcpu *vcpu)
3388 {
3389         struct kvm_lapic *apic = vcpu->arch.apic;
3390         struct page *page;
3391
3392         if (!apic || !apic->vapic_addr)
3393                 return;
3394
3395         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3396
3397         vcpu->arch.apic->vapic_page = page;
3398 }
3399
3400 static void vapic_exit(struct kvm_vcpu *vcpu)
3401 {
3402         struct kvm_lapic *apic = vcpu->arch.apic;
3403
3404         if (!apic || !apic->vapic_addr)
3405                 return;
3406
3407         down_read(&vcpu->kvm->slots_lock);
3408         kvm_release_page_dirty(apic->vapic_page);
3409         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3410         up_read(&vcpu->kvm->slots_lock);
3411 }
3412
3413 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3414 {
3415         int max_irr, tpr;
3416
3417         if (!kvm_x86_ops->update_cr8_intercept)
3418                 return;
3419
3420         if (!vcpu->arch.apic->vapic_addr)
3421                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3422         else
3423                 max_irr = -1;
3424
3425         if (max_irr != -1)
3426                 max_irr >>= 4;
3427
3428         tpr = kvm_lapic_get_cr8(vcpu);
3429
3430         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3431 }
3432
3433 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3434 {
3435         /* try to reinject previous events if any */
3436         if (vcpu->arch.nmi_injected) {
3437                 kvm_x86_ops->set_nmi(vcpu);
3438                 return;
3439         }
3440
3441         if (vcpu->arch.interrupt.pending) {
3442                 kvm_x86_ops->set_irq(vcpu);
3443                 return;
3444         }
3445
3446         /* try to inject new event if pending */
3447         if (vcpu->arch.nmi_pending) {
3448                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3449                         vcpu->arch.nmi_pending = false;
3450                         vcpu->arch.nmi_injected = true;
3451                         kvm_x86_ops->set_nmi(vcpu);
3452                 }
3453         } else if (kvm_cpu_has_interrupt(vcpu)) {
3454                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3455                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3456                                             false);
3457                         kvm_x86_ops->set_irq(vcpu);
3458                 }
3459         }
3460 }
3461
3462 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3463 {
3464         int r;
3465         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3466                 kvm_run->request_interrupt_window;
3467
3468         if (vcpu->requests)
3469                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3470                         kvm_mmu_unload(vcpu);
3471
3472         r = kvm_mmu_reload(vcpu);
3473         if (unlikely(r))
3474                 goto out;
3475
3476         if (vcpu->requests) {
3477                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3478                         __kvm_migrate_timers(vcpu);
3479                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3480                         kvm_write_guest_time(vcpu);
3481                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3482                         kvm_mmu_sync_roots(vcpu);
3483                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3484                         kvm_x86_ops->tlb_flush(vcpu);
3485                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3486                                        &vcpu->requests)) {
3487                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3488                         r = 0;
3489                         goto out;
3490                 }
3491                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3492                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3493                         r = 0;
3494                         goto out;
3495                 }
3496         }
3497
3498         preempt_disable();
3499
3500         kvm_x86_ops->prepare_guest_switch(vcpu);
3501         kvm_load_guest_fpu(vcpu);
3502
3503         local_irq_disable();
3504
3505         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3506         smp_mb__after_clear_bit();
3507
3508         if (vcpu->requests || need_resched() || signal_pending(current)) {
3509                 local_irq_enable();
3510                 preempt_enable();
3511                 r = 1;
3512                 goto out;
3513         }
3514
3515         if (vcpu->arch.exception.pending)
3516                 __queue_exception(vcpu);
3517         else
3518                 inject_pending_irq(vcpu, kvm_run);
3519
3520         /* enable NMI/IRQ window open exits if needed */
3521         if (vcpu->arch.nmi_pending)
3522                 kvm_x86_ops->enable_nmi_window(vcpu);
3523         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3524                 kvm_x86_ops->enable_irq_window(vcpu);
3525
3526         if (kvm_lapic_enabled(vcpu)) {
3527                 update_cr8_intercept(vcpu);
3528                 kvm_lapic_sync_to_vapic(vcpu);
3529         }
3530
3531         up_read(&vcpu->kvm->slots_lock);
3532
3533         kvm_guest_enter();
3534
3535         get_debugreg(vcpu->arch.host_dr6, 6);
3536         get_debugreg(vcpu->arch.host_dr7, 7);
3537         if (unlikely(vcpu->arch.switch_db_regs)) {
3538                 get_debugreg(vcpu->arch.host_db[0], 0);
3539                 get_debugreg(vcpu->arch.host_db[1], 1);
3540                 get_debugreg(vcpu->arch.host_db[2], 2);
3541                 get_debugreg(vcpu->arch.host_db[3], 3);
3542
3543                 set_debugreg(0, 7);
3544                 set_debugreg(vcpu->arch.eff_db[0], 0);
3545                 set_debugreg(vcpu->arch.eff_db[1], 1);
3546                 set_debugreg(vcpu->arch.eff_db[2], 2);
3547                 set_debugreg(vcpu->arch.eff_db[3], 3);
3548         }
3549
3550         trace_kvm_entry(vcpu->vcpu_id);
3551         kvm_x86_ops->run(vcpu, kvm_run);
3552
3553         if (unlikely(vcpu->arch.switch_db_regs)) {
3554                 set_debugreg(0, 7);
3555                 set_debugreg(vcpu->arch.host_db[0], 0);
3556                 set_debugreg(vcpu->arch.host_db[1], 1);
3557                 set_debugreg(vcpu->arch.host_db[2], 2);
3558                 set_debugreg(vcpu->arch.host_db[3], 3);
3559         }
3560         set_debugreg(vcpu->arch.host_dr6, 6);
3561         set_debugreg(vcpu->arch.host_dr7, 7);
3562
3563         set_bit(KVM_REQ_KICK, &vcpu->requests);
3564         local_irq_enable();
3565
3566         ++vcpu->stat.exits;
3567
3568         /*
3569          * We must have an instruction between local_irq_enable() and
3570          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3571          * the interrupt shadow.  The stat.exits increment will do nicely.
3572          * But we need to prevent reordering, hence this barrier():
3573          */
3574         barrier();
3575
3576         kvm_guest_exit();
3577
3578         preempt_enable();
3579
3580         down_read(&vcpu->kvm->slots_lock);
3581
3582         /*
3583          * Profile KVM exit RIPs:
3584          */
3585         if (unlikely(prof_on == KVM_PROFILING)) {
3586                 unsigned long rip = kvm_rip_read(vcpu);
3587                 profile_hit(KVM_PROFILING, (void *)rip);
3588         }
3589
3590
3591         kvm_lapic_sync_from_vapic(vcpu);
3592
3593         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3594 out:
3595         return r;
3596 }
3597
3598
3599 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3600 {
3601         int r;
3602
3603         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3604                 pr_debug("vcpu %d received sipi with vector # %x\n",
3605                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3606                 kvm_lapic_reset(vcpu);
3607                 r = kvm_arch_vcpu_reset(vcpu);
3608                 if (r)
3609                         return r;
3610                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3611         }
3612
3613         down_read(&vcpu->kvm->slots_lock);
3614         vapic_enter(vcpu);
3615
3616         r = 1;
3617         while (r > 0) {
3618                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3619                         r = vcpu_enter_guest(vcpu, kvm_run);
3620                 else {
3621                         up_read(&vcpu->kvm->slots_lock);
3622                         kvm_vcpu_block(vcpu);
3623                         down_read(&vcpu->kvm->slots_lock);
3624                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3625                         {
3626                                 switch(vcpu->arch.mp_state) {
3627                                 case KVM_MP_STATE_HALTED:
3628                                         vcpu->arch.mp_state =
3629                                                 KVM_MP_STATE_RUNNABLE;
3630                                 case KVM_MP_STATE_RUNNABLE:
3631                                         break;
3632                                 case KVM_MP_STATE_SIPI_RECEIVED:
3633                                 default:
3634                                         r = -EINTR;
3635                                         break;
3636                                 }
3637                         }
3638                 }
3639
3640                 if (r <= 0)
3641                         break;
3642
3643                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3644                 if (kvm_cpu_has_pending_timer(vcpu))
3645                         kvm_inject_pending_timer_irqs(vcpu);
3646
3647                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3648                         r = -EINTR;
3649                         kvm_run->exit_reason = KVM_EXIT_INTR;
3650                         ++vcpu->stat.request_irq_exits;
3651                 }
3652                 if (signal_pending(current)) {
3653                         r = -EINTR;
3654                         kvm_run->exit_reason = KVM_EXIT_INTR;
3655                         ++vcpu->stat.signal_exits;
3656                 }
3657                 if (need_resched()) {
3658                         up_read(&vcpu->kvm->slots_lock);
3659                         kvm_resched(vcpu);
3660                         down_read(&vcpu->kvm->slots_lock);
3661                 }
3662         }
3663
3664         up_read(&vcpu->kvm->slots_lock);
3665         post_kvm_run_save(vcpu, kvm_run);
3666
3667         vapic_exit(vcpu);
3668
3669         return r;
3670 }
3671
3672 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3673 {
3674         int r;
3675         sigset_t sigsaved;
3676
3677         vcpu_load(vcpu);
3678
3679         if (vcpu->sigset_active)
3680                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3681
3682         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3683                 kvm_vcpu_block(vcpu);
3684                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3685                 r = -EAGAIN;
3686                 goto out;
3687         }
3688
3689         /* re-sync apic's tpr */
3690         if (!irqchip_in_kernel(vcpu->kvm))
3691                 kvm_set_cr8(vcpu, kvm_run->cr8);
3692
3693         if (vcpu->arch.pio.cur_count) {
3694                 r = complete_pio(vcpu);
3695                 if (r)
3696                         goto out;
3697         }
3698 #if CONFIG_HAS_IOMEM
3699         if (vcpu->mmio_needed) {
3700                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3701                 vcpu->mmio_read_completed = 1;
3702                 vcpu->mmio_needed = 0;
3703
3704                 down_read(&vcpu->kvm->slots_lock);
3705                 r = emulate_instruction(vcpu, kvm_run,
3706                                         vcpu->arch.mmio_fault_cr2, 0,
3707                                         EMULTYPE_NO_DECODE);
3708                 up_read(&vcpu->kvm->slots_lock);
3709                 if (r == EMULATE_DO_MMIO) {
3710                         /*
3711                          * Read-modify-write.  Back to userspace.
3712                          */
3713                         r = 0;
3714                         goto out;
3715                 }
3716         }
3717 #endif
3718         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3719                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3720                                      kvm_run->hypercall.ret);
3721
3722         r = __vcpu_run(vcpu, kvm_run);
3723
3724 out:
3725         if (vcpu->sigset_active)
3726                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3727
3728         vcpu_put(vcpu);
3729         return r;
3730 }
3731
3732 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3733 {
3734         vcpu_load(vcpu);
3735
3736         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3737         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3738         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3739         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3740         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3741         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3742         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3743         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3744 #ifdef CONFIG_X86_64
3745         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3746         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3747         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3748         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3749         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3750         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3751         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3752         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3753 #endif
3754
3755         regs->rip = kvm_rip_read(vcpu);
3756         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3757
3758         /*
3759          * Don't leak debug flags in case they were set for guest debugging
3760          */
3761         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3762                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3763
3764         vcpu_put(vcpu);
3765
3766         return 0;
3767 }
3768
3769 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3770 {
3771         vcpu_load(vcpu);
3772
3773         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3774         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3775         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3776         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3777         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3778         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3779         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3780         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3781 #ifdef CONFIG_X86_64
3782         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3783         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3784         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3785         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3786         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3787         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3788         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3789         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3790
3791 #endif
3792
3793         kvm_rip_write(vcpu, regs->rip);
3794         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3795
3796
3797         vcpu->arch.exception.pending = false;
3798
3799         vcpu_put(vcpu);
3800
3801         return 0;
3802 }
3803
3804 void kvm_get_segment(struct kvm_vcpu *vcpu,
3805                      struct kvm_segment *var, int seg)
3806 {
3807         kvm_x86_ops->get_segment(vcpu, var, seg);
3808 }
3809
3810 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3811 {
3812         struct kvm_segment cs;
3813
3814         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3815         *db = cs.db;
3816         *l = cs.l;
3817 }
3818 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3819
3820 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3821                                   struct kvm_sregs *sregs)
3822 {
3823         struct descriptor_table dt;
3824
3825         vcpu_load(vcpu);
3826
3827         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3828         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3829         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3830         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3831         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3832         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3833
3834         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3835         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3836
3837         kvm_x86_ops->get_idt(vcpu, &dt);
3838         sregs->idt.limit = dt.limit;
3839         sregs->idt.base = dt.base;
3840         kvm_x86_ops->get_gdt(vcpu, &dt);
3841         sregs->gdt.limit = dt.limit;
3842         sregs->gdt.base = dt.base;
3843
3844         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3845         sregs->cr0 = vcpu->arch.cr0;
3846         sregs->cr2 = vcpu->arch.cr2;
3847         sregs->cr3 = vcpu->arch.cr3;
3848         sregs->cr4 = vcpu->arch.cr4;
3849         sregs->cr8 = kvm_get_cr8(vcpu);
3850         sregs->efer = vcpu->arch.shadow_efer;
3851         sregs->apic_base = kvm_get_apic_base(vcpu);
3852
3853         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3854
3855         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3856                 set_bit(vcpu->arch.interrupt.nr,
3857                         (unsigned long *)sregs->interrupt_bitmap);
3858
3859         vcpu_put(vcpu);
3860
3861         return 0;
3862 }
3863
3864 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3865                                     struct kvm_mp_state *mp_state)
3866 {
3867         vcpu_load(vcpu);
3868         mp_state->mp_state = vcpu->arch.mp_state;
3869         vcpu_put(vcpu);
3870         return 0;
3871 }
3872
3873 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3874                                     struct kvm_mp_state *mp_state)
3875 {
3876         vcpu_load(vcpu);
3877         vcpu->arch.mp_state = mp_state->mp_state;
3878         vcpu_put(vcpu);
3879         return 0;
3880 }
3881
3882 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3883                         struct kvm_segment *var, int seg)
3884 {
3885         kvm_x86_ops->set_segment(vcpu, var, seg);
3886 }
3887
3888 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3889                                    struct kvm_segment *kvm_desct)
3890 {
3891         kvm_desct->base = seg_desc->base0;
3892         kvm_desct->base |= seg_desc->base1 << 16;
3893         kvm_desct->base |= seg_desc->base2 << 24;
3894         kvm_desct->limit = seg_desc->limit0;
3895         kvm_desct->limit |= seg_desc->limit << 16;
3896         if (seg_desc->g) {
3897                 kvm_desct->limit <<= 12;
3898                 kvm_desct->limit |= 0xfff;
3899         }
3900         kvm_desct->selector = selector;
3901         kvm_desct->type = seg_desc->type;
3902         kvm_desct->present = seg_desc->p;
3903         kvm_desct->dpl = seg_desc->dpl;
3904         kvm_desct->db = seg_desc->d;
3905         kvm_desct->s = seg_desc->s;
3906         kvm_desct->l = seg_desc->l;
3907         kvm_desct->g = seg_desc->g;
3908         kvm_desct->avl = seg_desc->avl;
3909         if (!selector)
3910                 kvm_desct->unusable = 1;
3911         else
3912                 kvm_desct->unusable = 0;
3913         kvm_desct->padding = 0;
3914 }
3915
3916 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3917                                           u16 selector,
3918                                           struct descriptor_table *dtable)
3919 {
3920         if (selector & 1 << 2) {
3921                 struct kvm_segment kvm_seg;
3922
3923                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3924
3925                 if (kvm_seg.unusable)
3926                         dtable->limit = 0;
3927                 else
3928                         dtable->limit = kvm_seg.limit;
3929                 dtable->base = kvm_seg.base;
3930         }
3931         else
3932                 kvm_x86_ops->get_gdt(vcpu, dtable);
3933 }
3934
3935 /* allowed just for 8 bytes segments */
3936 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3937                                          struct desc_struct *seg_desc)
3938 {
3939         gpa_t gpa;
3940         struct descriptor_table dtable;
3941         u16 index = selector >> 3;
3942
3943         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3944
3945         if (dtable.limit < index * 8 + 7) {
3946                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3947                 return 1;
3948         }
3949         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3950         gpa += index * 8;
3951         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3952 }
3953
3954 /* allowed just for 8 bytes segments */
3955 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3956                                          struct desc_struct *seg_desc)
3957 {
3958         gpa_t gpa;
3959         struct descriptor_table dtable;
3960         u16 index = selector >> 3;
3961
3962         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3963
3964         if (dtable.limit < index * 8 + 7)
3965                 return 1;
3966         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3967         gpa += index * 8;
3968         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3969 }
3970
3971 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3972                              struct desc_struct *seg_desc)
3973 {
3974         u32 base_addr;
3975
3976         base_addr = seg_desc->base0;
3977         base_addr |= (seg_desc->base1 << 16);
3978         base_addr |= (seg_desc->base2 << 24);
3979
3980         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3981 }
3982
3983 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3984 {
3985         struct kvm_segment kvm_seg;
3986
3987         kvm_get_segment(vcpu, &kvm_seg, seg);
3988         return kvm_seg.selector;
3989 }
3990
3991 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3992                                                 u16 selector,
3993                                                 struct kvm_segment *kvm_seg)
3994 {
3995         struct desc_struct seg_desc;
3996
3997         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3998                 return 1;
3999         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4000         return 0;
4001 }
4002
4003 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4004 {
4005         struct kvm_segment segvar = {
4006                 .base = selector << 4,
4007                 .limit = 0xffff,
4008                 .selector = selector,
4009                 .type = 3,
4010                 .present = 1,
4011                 .dpl = 3,
4012                 .db = 0,
4013                 .s = 1,
4014                 .l = 0,
4015                 .g = 0,
4016                 .avl = 0,
4017                 .unusable = 0,
4018         };
4019         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4020         return 0;
4021 }
4022
4023 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4024                                 int type_bits, int seg)
4025 {
4026         struct kvm_segment kvm_seg;
4027
4028         if (!(vcpu->arch.cr0 & X86_CR0_PE))
4029                 return kvm_load_realmode_segment(vcpu, selector, seg);
4030         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4031                 return 1;
4032         kvm_seg.type |= type_bits;
4033
4034         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4035             seg != VCPU_SREG_LDTR)
4036                 if (!kvm_seg.s)
4037                         kvm_seg.unusable = 1;
4038
4039         kvm_set_segment(vcpu, &kvm_seg, seg);
4040         return 0;
4041 }
4042
4043 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4044                                 struct tss_segment_32 *tss)
4045 {
4046         tss->cr3 = vcpu->arch.cr3;
4047         tss->eip = kvm_rip_read(vcpu);
4048         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4049         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4050         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4051         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4052         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4053         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4054         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4055         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4056         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4057         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4058         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4059         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4060         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4061         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4062         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4063         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4064 }
4065
4066 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4067                                   struct tss_segment_32 *tss)
4068 {
4069         kvm_set_cr3(vcpu, tss->cr3);
4070
4071         kvm_rip_write(vcpu, tss->eip);
4072         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4073
4074         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4075         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4076         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4077         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4078         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4079         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4080         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4081         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4082
4083         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4084                 return 1;
4085
4086         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4087                 return 1;
4088
4089         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4090                 return 1;
4091
4092         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4093                 return 1;
4094
4095         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4096                 return 1;
4097
4098         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4099                 return 1;
4100
4101         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4102                 return 1;
4103         return 0;
4104 }
4105
4106 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4107                                 struct tss_segment_16 *tss)
4108 {
4109         tss->ip = kvm_rip_read(vcpu);
4110         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4111         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4112         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4113         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4114         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4115         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4116         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4117         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4118         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4119
4120         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4121         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4122         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4123         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4124         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4125         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4126 }
4127
4128 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4129                                  struct tss_segment_16 *tss)
4130 {
4131         kvm_rip_write(vcpu, tss->ip);
4132         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4133         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4134         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4135         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4136         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4137         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4138         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4139         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4140         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4141
4142         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4143                 return 1;
4144
4145         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4146                 return 1;
4147
4148         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4149                 return 1;
4150
4151         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4152                 return 1;
4153
4154         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4155                 return 1;
4156         return 0;
4157 }
4158
4159 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4160                               u16 old_tss_sel, u32 old_tss_base,
4161                               struct desc_struct *nseg_desc)
4162 {
4163         struct tss_segment_16 tss_segment_16;
4164         int ret = 0;
4165
4166         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4167                            sizeof tss_segment_16))
4168                 goto out;
4169
4170         save_state_to_tss16(vcpu, &tss_segment_16);
4171
4172         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4173                             sizeof tss_segment_16))
4174                 goto out;
4175
4176         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4177                            &tss_segment_16, sizeof tss_segment_16))
4178                 goto out;
4179
4180         if (old_tss_sel != 0xffff) {
4181                 tss_segment_16.prev_task_link = old_tss_sel;
4182
4183                 if (kvm_write_guest(vcpu->kvm,
4184                                     get_tss_base_addr(vcpu, nseg_desc),
4185                                     &tss_segment_16.prev_task_link,
4186                                     sizeof tss_segment_16.prev_task_link))
4187                         goto out;
4188         }
4189
4190         if (load_state_from_tss16(vcpu, &tss_segment_16))
4191                 goto out;
4192
4193         ret = 1;
4194 out:
4195         return ret;
4196 }
4197
4198 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4199                        u16 old_tss_sel, u32 old_tss_base,
4200                        struct desc_struct *nseg_desc)
4201 {
4202         struct tss_segment_32 tss_segment_32;
4203         int ret = 0;
4204
4205         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4206                            sizeof tss_segment_32))
4207                 goto out;
4208
4209         save_state_to_tss32(vcpu, &tss_segment_32);
4210
4211         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4212                             sizeof tss_segment_32))
4213                 goto out;
4214
4215         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4216                            &tss_segment_32, sizeof tss_segment_32))
4217                 goto out;
4218
4219         if (old_tss_sel != 0xffff) {
4220                 tss_segment_32.prev_task_link = old_tss_sel;
4221
4222                 if (kvm_write_guest(vcpu->kvm,
4223                                     get_tss_base_addr(vcpu, nseg_desc),
4224                                     &tss_segment_32.prev_task_link,
4225                                     sizeof tss_segment_32.prev_task_link))
4226                         goto out;
4227         }
4228
4229         if (load_state_from_tss32(vcpu, &tss_segment_32))
4230                 goto out;
4231
4232         ret = 1;
4233 out:
4234         return ret;
4235 }
4236
4237 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4238 {
4239         struct kvm_segment tr_seg;
4240         struct desc_struct cseg_desc;
4241         struct desc_struct nseg_desc;
4242         int ret = 0;
4243         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4244         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4245
4246         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4247
4248         /* FIXME: Handle errors. Failure to read either TSS or their
4249          * descriptors should generate a pagefault.
4250          */
4251         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4252                 goto out;
4253
4254         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4255                 goto out;
4256
4257         if (reason != TASK_SWITCH_IRET) {
4258                 int cpl;
4259
4260                 cpl = kvm_x86_ops->get_cpl(vcpu);
4261                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4262                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4263                         return 1;
4264                 }
4265         }
4266
4267         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4268                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4269                 return 1;
4270         }
4271
4272         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4273                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4274                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4275         }
4276
4277         if (reason == TASK_SWITCH_IRET) {
4278                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4279                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4280         }
4281
4282         /* set back link to prev task only if NT bit is set in eflags
4283            note that old_tss_sel is not used afetr this point */
4284         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4285                 old_tss_sel = 0xffff;
4286
4287         /* set back link to prev task only if NT bit is set in eflags
4288            note that old_tss_sel is not used afetr this point */
4289         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4290                 old_tss_sel = 0xffff;
4291
4292         if (nseg_desc.type & 8)
4293                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4294                                          old_tss_base, &nseg_desc);
4295         else
4296                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4297                                          old_tss_base, &nseg_desc);
4298
4299         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4300                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4301                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4302         }
4303
4304         if (reason != TASK_SWITCH_IRET) {
4305                 nseg_desc.type |= (1 << 1);
4306                 save_guest_segment_descriptor(vcpu, tss_selector,
4307                                               &nseg_desc);
4308         }
4309
4310         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4311         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4312         tr_seg.type = 11;
4313         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4314 out:
4315         return ret;
4316 }
4317 EXPORT_SYMBOL_GPL(kvm_task_switch);
4318
4319 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4320                                   struct kvm_sregs *sregs)
4321 {
4322         int mmu_reset_needed = 0;
4323         int pending_vec, max_bits;
4324         struct descriptor_table dt;
4325
4326         vcpu_load(vcpu);
4327
4328         dt.limit = sregs->idt.limit;
4329         dt.base = sregs->idt.base;
4330         kvm_x86_ops->set_idt(vcpu, &dt);
4331         dt.limit = sregs->gdt.limit;
4332         dt.base = sregs->gdt.base;
4333         kvm_x86_ops->set_gdt(vcpu, &dt);
4334
4335         vcpu->arch.cr2 = sregs->cr2;
4336         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4337         vcpu->arch.cr3 = sregs->cr3;
4338
4339         kvm_set_cr8(vcpu, sregs->cr8);
4340
4341         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4342         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4343         kvm_set_apic_base(vcpu, sregs->apic_base);
4344
4345         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4346
4347         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4348         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4349         vcpu->arch.cr0 = sregs->cr0;
4350
4351         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4352         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4353         if (!is_long_mode(vcpu) && is_pae(vcpu))
4354                 load_pdptrs(vcpu, vcpu->arch.cr3);
4355
4356         if (mmu_reset_needed)
4357                 kvm_mmu_reset_context(vcpu);
4358
4359         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4360         pending_vec = find_first_bit(
4361                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4362         if (pending_vec < max_bits) {
4363                 kvm_queue_interrupt(vcpu, pending_vec, false);
4364                 pr_debug("Set back pending irq %d\n", pending_vec);
4365                 if (irqchip_in_kernel(vcpu->kvm))
4366                         kvm_pic_clear_isr_ack(vcpu->kvm);
4367         }
4368
4369         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4370         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4371         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4372         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4373         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4374         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4375
4376         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4377         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4378
4379         /* Older userspace won't unhalt the vcpu on reset. */
4380         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4381             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4382             !(vcpu->arch.cr0 & X86_CR0_PE))
4383                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4384
4385         vcpu_put(vcpu);
4386
4387         return 0;
4388 }
4389
4390 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4391                                         struct kvm_guest_debug *dbg)
4392 {
4393         int i, r;
4394
4395         vcpu_load(vcpu);
4396
4397         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4398             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4399                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4400                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4401                 vcpu->arch.switch_db_regs =
4402                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4403         } else {
4404                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4405                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4406                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4407         }
4408
4409         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4410
4411         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4412                 kvm_queue_exception(vcpu, DB_VECTOR);
4413         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4414                 kvm_queue_exception(vcpu, BP_VECTOR);
4415
4416         vcpu_put(vcpu);
4417
4418         return r;
4419 }
4420
4421 /*
4422  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4423  * we have asm/x86/processor.h
4424  */
4425 struct fxsave {
4426         u16     cwd;
4427         u16     swd;
4428         u16     twd;
4429         u16     fop;
4430         u64     rip;
4431         u64     rdp;
4432         u32     mxcsr;
4433         u32     mxcsr_mask;
4434         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4435 #ifdef CONFIG_X86_64
4436         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4437 #else
4438         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4439 #endif
4440 };
4441
4442 /*
4443  * Translate a guest virtual address to a guest physical address.
4444  */
4445 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4446                                     struct kvm_translation *tr)
4447 {
4448         unsigned long vaddr = tr->linear_address;
4449         gpa_t gpa;
4450
4451         vcpu_load(vcpu);
4452         down_read(&vcpu->kvm->slots_lock);
4453         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4454         up_read(&vcpu->kvm->slots_lock);
4455         tr->physical_address = gpa;
4456         tr->valid = gpa != UNMAPPED_GVA;
4457         tr->writeable = 1;
4458         tr->usermode = 0;
4459         vcpu_put(vcpu);
4460
4461         return 0;
4462 }
4463
4464 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4465 {
4466         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4467
4468         vcpu_load(vcpu);
4469
4470         memcpy(fpu->fpr, fxsave->st_space, 128);
4471         fpu->fcw = fxsave->cwd;
4472         fpu->fsw = fxsave->swd;
4473         fpu->ftwx = fxsave->twd;
4474         fpu->last_opcode = fxsave->fop;
4475         fpu->last_ip = fxsave->rip;
4476         fpu->last_dp = fxsave->rdp;
4477         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4478
4479         vcpu_put(vcpu);
4480
4481         return 0;
4482 }
4483
4484 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4485 {
4486         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4487
4488         vcpu_load(vcpu);
4489
4490         memcpy(fxsave->st_space, fpu->fpr, 128);
4491         fxsave->cwd = fpu->fcw;
4492         fxsave->swd = fpu->fsw;
4493         fxsave->twd = fpu->ftwx;
4494         fxsave->fop = fpu->last_opcode;
4495         fxsave->rip = fpu->last_ip;
4496         fxsave->rdp = fpu->last_dp;
4497         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4498
4499         vcpu_put(vcpu);
4500
4501         return 0;
4502 }
4503
4504 void fx_init(struct kvm_vcpu *vcpu)
4505 {
4506         unsigned after_mxcsr_mask;
4507
4508         /*
4509          * Touch the fpu the first time in non atomic context as if
4510          * this is the first fpu instruction the exception handler
4511          * will fire before the instruction returns and it'll have to
4512          * allocate ram with GFP_KERNEL.
4513          */
4514         if (!used_math())
4515                 kvm_fx_save(&vcpu->arch.host_fx_image);
4516
4517         /* Initialize guest FPU by resetting ours and saving into guest's */
4518         preempt_disable();
4519         kvm_fx_save(&vcpu->arch.host_fx_image);
4520         kvm_fx_finit();
4521         kvm_fx_save(&vcpu->arch.guest_fx_image);
4522         kvm_fx_restore(&vcpu->arch.host_fx_image);
4523         preempt_enable();
4524
4525         vcpu->arch.cr0 |= X86_CR0_ET;
4526         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4527         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4528         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4529                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4530 }
4531 EXPORT_SYMBOL_GPL(fx_init);
4532
4533 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4534 {
4535         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4536                 return;
4537
4538         vcpu->guest_fpu_loaded = 1;
4539         kvm_fx_save(&vcpu->arch.host_fx_image);
4540         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4541 }
4542 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4543
4544 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4545 {
4546         if (!vcpu->guest_fpu_loaded)
4547                 return;
4548
4549         vcpu->guest_fpu_loaded = 0;
4550         kvm_fx_save(&vcpu->arch.guest_fx_image);
4551         kvm_fx_restore(&vcpu->arch.host_fx_image);
4552         ++vcpu->stat.fpu_reload;
4553 }
4554 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4555
4556 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4557 {
4558         if (vcpu->arch.time_page) {
4559                 kvm_release_page_dirty(vcpu->arch.time_page);
4560                 vcpu->arch.time_page = NULL;
4561         }
4562
4563         kvm_x86_ops->vcpu_free(vcpu);
4564 }
4565
4566 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4567                                                 unsigned int id)
4568 {
4569         return kvm_x86_ops->vcpu_create(kvm, id);
4570 }
4571
4572 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4573 {
4574         int r;
4575
4576         /* We do fxsave: this must be aligned. */
4577         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4578
4579         vcpu->arch.mtrr_state.have_fixed = 1;
4580         vcpu_load(vcpu);
4581         r = kvm_arch_vcpu_reset(vcpu);
4582         if (r == 0)
4583                 r = kvm_mmu_setup(vcpu);
4584         vcpu_put(vcpu);
4585         if (r < 0)
4586                 goto free_vcpu;
4587
4588         return 0;
4589 free_vcpu:
4590         kvm_x86_ops->vcpu_free(vcpu);
4591         return r;
4592 }
4593
4594 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4595 {
4596         vcpu_load(vcpu);
4597         kvm_mmu_unload(vcpu);
4598         vcpu_put(vcpu);
4599
4600         kvm_x86_ops->vcpu_free(vcpu);
4601 }
4602
4603 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4604 {
4605         vcpu->arch.nmi_pending = false;
4606         vcpu->arch.nmi_injected = false;
4607
4608         vcpu->arch.switch_db_regs = 0;
4609         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4610         vcpu->arch.dr6 = DR6_FIXED_1;
4611         vcpu->arch.dr7 = DR7_FIXED_1;
4612
4613         return kvm_x86_ops->vcpu_reset(vcpu);
4614 }
4615
4616 void kvm_arch_hardware_enable(void *garbage)
4617 {
4618         kvm_x86_ops->hardware_enable(garbage);
4619 }
4620
4621 void kvm_arch_hardware_disable(void *garbage)
4622 {
4623         kvm_x86_ops->hardware_disable(garbage);
4624 }
4625
4626 int kvm_arch_hardware_setup(void)
4627 {
4628         return kvm_x86_ops->hardware_setup();
4629 }
4630
4631 void kvm_arch_hardware_unsetup(void)
4632 {
4633         kvm_x86_ops->hardware_unsetup();
4634 }
4635
4636 void kvm_arch_check_processor_compat(void *rtn)
4637 {
4638         kvm_x86_ops->check_processor_compatibility(rtn);
4639 }
4640
4641 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4642 {
4643         struct page *page;
4644         struct kvm *kvm;
4645         int r;
4646
4647         BUG_ON(vcpu->kvm == NULL);
4648         kvm = vcpu->kvm;
4649
4650         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4651         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4652                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4653         else
4654                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4655
4656         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4657         if (!page) {
4658                 r = -ENOMEM;
4659                 goto fail;
4660         }
4661         vcpu->arch.pio_data = page_address(page);
4662
4663         r = kvm_mmu_create(vcpu);
4664         if (r < 0)
4665                 goto fail_free_pio_data;
4666
4667         if (irqchip_in_kernel(kvm)) {
4668                 r = kvm_create_lapic(vcpu);
4669                 if (r < 0)
4670                         goto fail_mmu_destroy;
4671         }
4672
4673         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4674                                        GFP_KERNEL);
4675         if (!vcpu->arch.mce_banks) {
4676                 r = -ENOMEM;
4677                 goto fail_mmu_destroy;
4678         }
4679         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4680
4681         return 0;
4682
4683 fail_mmu_destroy:
4684         kvm_mmu_destroy(vcpu);
4685 fail_free_pio_data:
4686         free_page((unsigned long)vcpu->arch.pio_data);
4687 fail:
4688         return r;
4689 }
4690
4691 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4692 {
4693         kvm_free_lapic(vcpu);
4694         down_read(&vcpu->kvm->slots_lock);
4695         kvm_mmu_destroy(vcpu);
4696         up_read(&vcpu->kvm->slots_lock);
4697         free_page((unsigned long)vcpu->arch.pio_data);
4698 }
4699
4700 struct  kvm *kvm_arch_create_vm(void)
4701 {
4702         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4703
4704         if (!kvm)
4705                 return ERR_PTR(-ENOMEM);
4706
4707         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4708         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4709
4710         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4711         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4712
4713         rdtscll(kvm->arch.vm_init_tsc);
4714
4715         return kvm;
4716 }
4717
4718 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4719 {
4720         vcpu_load(vcpu);
4721         kvm_mmu_unload(vcpu);
4722         vcpu_put(vcpu);
4723 }
4724
4725 static void kvm_free_vcpus(struct kvm *kvm)
4726 {
4727         unsigned int i;
4728         struct kvm_vcpu *vcpu;
4729
4730         /*
4731          * Unpin any mmu pages first.
4732          */
4733         kvm_for_each_vcpu(i, vcpu, kvm)
4734                 kvm_unload_vcpu_mmu(vcpu);
4735         kvm_for_each_vcpu(i, vcpu, kvm)
4736                 kvm_arch_vcpu_free(vcpu);
4737
4738         mutex_lock(&kvm->lock);
4739         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4740                 kvm->vcpus[i] = NULL;
4741
4742         atomic_set(&kvm->online_vcpus, 0);
4743         mutex_unlock(&kvm->lock);
4744 }
4745
4746 void kvm_arch_sync_events(struct kvm *kvm)
4747 {
4748         kvm_free_all_assigned_devices(kvm);
4749 }
4750
4751 void kvm_arch_destroy_vm(struct kvm *kvm)
4752 {
4753         kvm_iommu_unmap_guest(kvm);
4754         kvm_free_pit(kvm);
4755         kfree(kvm->arch.vpic);
4756         kfree(kvm->arch.vioapic);
4757         kvm_free_vcpus(kvm);
4758         kvm_free_physmem(kvm);
4759         if (kvm->arch.apic_access_page)
4760                 put_page(kvm->arch.apic_access_page);
4761         if (kvm->arch.ept_identity_pagetable)
4762                 put_page(kvm->arch.ept_identity_pagetable);
4763         kfree(kvm);
4764 }
4765
4766 int kvm_arch_set_memory_region(struct kvm *kvm,
4767                                 struct kvm_userspace_memory_region *mem,
4768                                 struct kvm_memory_slot old,
4769                                 int user_alloc)
4770 {
4771         int npages = mem->memory_size >> PAGE_SHIFT;
4772         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4773
4774         /*To keep backward compatibility with older userspace,
4775          *x86 needs to hanlde !user_alloc case.
4776          */
4777         if (!user_alloc) {
4778                 if (npages && !old.rmap) {
4779                         unsigned long userspace_addr;
4780
4781                         down_write(&current->mm->mmap_sem);
4782                         userspace_addr = do_mmap(NULL, 0,
4783                                                  npages * PAGE_SIZE,
4784                                                  PROT_READ | PROT_WRITE,
4785                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4786                                                  0);
4787                         up_write(&current->mm->mmap_sem);
4788
4789                         if (IS_ERR((void *)userspace_addr))
4790                                 return PTR_ERR((void *)userspace_addr);
4791
4792                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4793                         spin_lock(&kvm->mmu_lock);
4794                         memslot->userspace_addr = userspace_addr;
4795                         spin_unlock(&kvm->mmu_lock);
4796                 } else {
4797                         if (!old.user_alloc && old.rmap) {
4798                                 int ret;
4799
4800                                 down_write(&current->mm->mmap_sem);
4801                                 ret = do_munmap(current->mm, old.userspace_addr,
4802                                                 old.npages * PAGE_SIZE);
4803                                 up_write(&current->mm->mmap_sem);
4804                                 if (ret < 0)
4805                                         printk(KERN_WARNING
4806                                        "kvm_vm_ioctl_set_memory_region: "
4807                                        "failed to munmap memory\n");
4808                         }
4809                 }
4810         }
4811
4812         spin_lock(&kvm->mmu_lock);
4813         if (!kvm->arch.n_requested_mmu_pages) {
4814                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4815                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4816         }
4817
4818         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4819         spin_unlock(&kvm->mmu_lock);
4820         kvm_flush_remote_tlbs(kvm);
4821
4822         return 0;
4823 }
4824
4825 void kvm_arch_flush_shadow(struct kvm *kvm)
4826 {
4827         kvm_mmu_zap_all(kvm);
4828         kvm_reload_remote_mmus(kvm);
4829 }
4830
4831 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4832 {
4833         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4834                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4835                || vcpu->arch.nmi_pending;
4836 }
4837
4838 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4839 {
4840         int me;
4841         int cpu = vcpu->cpu;
4842
4843         if (waitqueue_active(&vcpu->wq)) {
4844                 wake_up_interruptible(&vcpu->wq);
4845                 ++vcpu->stat.halt_wakeup;
4846         }
4847
4848         me = get_cpu();
4849         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4850                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4851                         smp_send_reschedule(cpu);
4852         put_cpu();
4853 }
4854
4855 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4856 {
4857         return kvm_x86_ops->interrupt_allowed(vcpu);
4858 }
4859
4860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);