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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  81                                     struct kvm_cpuid_entry2 __user *entries);
  82
  83 struct kvm_x86_ops *kvm_x86_ops;
  84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  85
  86 int ignore_msrs = 0;
  87 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  88
  89 struct kvm_stats_debugfs_item debugfs_entries[] = {
  90         { "pf_fixed", VCPU_STAT(pf_fixed) },
  91         { "pf_guest", VCPU_STAT(pf_guest) },
  92         { "tlb_flush", VCPU_STAT(tlb_flush) },
  93         { "invlpg", VCPU_STAT(invlpg) },
  94         { "exits", VCPU_STAT(exits) },
  95         { "io_exits", VCPU_STAT(io_exits) },
  96         { "mmio_exits", VCPU_STAT(mmio_exits) },
  97         { "signal_exits", VCPU_STAT(signal_exits) },
  98         { "irq_window", VCPU_STAT(irq_window_exits) },
  99         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 100         { "halt_exits", VCPU_STAT(halt_exits) },
 101         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 102         { "hypercalls", VCPU_STAT(hypercalls) },
 103         { "request_irq", VCPU_STAT(request_irq_exits) },
 104         { "irq_exits", VCPU_STAT(irq_exits) },
 105         { "host_state_reload", VCPU_STAT(host_state_reload) },
 106         { "efer_reload", VCPU_STAT(efer_reload) },
 107         { "fpu_reload", VCPU_STAT(fpu_reload) },
 108         { "insn_emulation", VCPU_STAT(insn_emulation) },
 109         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 110         { "irq_injections", VCPU_STAT(irq_injections) },
 111         { "nmi_injections", VCPU_STAT(nmi_injections) },
 112         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 113         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 114         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 115         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 116         { "mmu_flooded", VM_STAT(mmu_flooded) },
 117         { "mmu_recycled", VM_STAT(mmu_recycled) },
 118         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 119         { "mmu_unsync", VM_STAT(mmu_unsync) },
 120         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 121         { "largepages", VM_STAT(lpages) },
 122         { NULL }
 123 };
 124
 125 unsigned long segment_base(u16 selector)
 126 {
 127         struct descriptor_table gdt;
 128         struct desc_struct *d;
 129         unsigned long table_base;
 130         unsigned long v;
 131
 132         if (selector == 0)
 133                 return 0;
 134
 135         kvm_get_gdt(&gdt);
 136         table_base = gdt.base;
 137
 138         if (selector & 4) {           /* from ldt */
 139                 u16 ldt_selector = kvm_read_ldt();
 140
 141                 table_base = segment_base(ldt_selector);
 142         }
 143         d = (struct desc_struct *)(table_base + (selector & ~7));
 144         v = get_desc_base(d);
 145 #ifdef CONFIG_X86_64
 146         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 147                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 148 #endif
 149         return v;
 150 }
 151 EXPORT_SYMBOL_GPL(segment_base);
 152
 153 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 154 {
 155         if (irqchip_in_kernel(vcpu->kvm))
 156                 return vcpu->arch.apic_base;
 157         else
 158                 return vcpu->arch.apic_base;
 159 }
 160 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 161
 162 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 163 {
 164         /* TODO: reserve bits check */
 165         if (irqchip_in_kernel(vcpu->kvm))
 166                 kvm_lapic_set_base(vcpu, data);
 167         else
 168                 vcpu->arch.apic_base = data;
 169 }
 170 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 171
 172 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 173 {
 174         WARN_ON(vcpu->arch.exception.pending);
 175         vcpu->arch.exception.pending = true;
 176         vcpu->arch.exception.has_error_code = false;
 177         vcpu->arch.exception.nr = nr;
 178 }
 179 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 180
 181 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 182                            u32 error_code)
 183 {
 184         ++vcpu->stat.pf_guest;
 185
 186         if (vcpu->arch.exception.pending) {
 187                 switch(vcpu->arch.exception.nr) {
 188                 case DF_VECTOR:
 189                         /* triple fault -> shutdown */
 190                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 191                         return;
 192                 case PF_VECTOR:
 193                         vcpu->arch.exception.nr = DF_VECTOR;
 194                         vcpu->arch.exception.error_code = 0;
 195                         return;
 196                 default:
 197                         /* replace previous exception with a new one in a hope
 198                            that instruction re-execution will regenerate lost
 199                            exception */
 200                         vcpu->arch.exception.pending = false;
 201                         break;
 202                 }
 203         }
 204         vcpu->arch.cr2 = addr;
 205         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 206 }
 207
 208 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 209 {
 210         vcpu->arch.nmi_pending = 1;
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 213
 214 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 215 {
 216         WARN_ON(vcpu->arch.exception.pending);
 217         vcpu->arch.exception.pending = true;
 218         vcpu->arch.exception.has_error_code = true;
 219         vcpu->arch.exception.nr = nr;
 220         vcpu->arch.exception.error_code = error_code;
 221 }
 222 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 223
 224 /*
 225  * Load the pae pdptrs.  Return true is they are all valid.
 226  */
 227 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 228 {
 229         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 230         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 231         int i;
 232         int ret;
 233         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 234
 235         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 236                                   offset * sizeof(u64), sizeof(pdpte));
 237         if (ret < 0) {
 238                 ret = 0;
 239                 goto out;
 240         }
 241         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 242                 if (is_present_gpte(pdpte[i]) &&
 243                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 244                         ret = 0;
 245                         goto out;
 246                 }
 247         }
 248         ret = 1;
 249
 250         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 251         __set_bit(VCPU_EXREG_PDPTR,
 252                   (unsigned long *)&vcpu->arch.regs_avail);
 253         __set_bit(VCPU_EXREG_PDPTR,
 254                   (unsigned long *)&vcpu->arch.regs_dirty);
 255 out:
 256
 257         return ret;
 258 }
 259 EXPORT_SYMBOL_GPL(load_pdptrs);
 260
 261 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 262 {
 263         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 264         bool changed = true;
 265         int r;
 266
 267         if (is_long_mode(vcpu) || !is_pae(vcpu))
 268                 return false;
 269
 270         if (!test_bit(VCPU_EXREG_PDPTR,
 271                       (unsigned long *)&vcpu->arch.regs_avail))
 272                 return true;
 273
 274         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 275         if (r < 0)
 276                 goto out;
 277         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 278 out:
 279
 280         return changed;
 281 }
 282
 283 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 284 {
 285         if (cr0 & CR0_RESERVED_BITS) {
 286                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 287                        cr0, vcpu->arch.cr0);
 288                 kvm_inject_gp(vcpu, 0);
 289                 return;
 290         }
 291
 292         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 293                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 294                 kvm_inject_gp(vcpu, 0);
 295                 return;
 296         }
 297
 298         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 299                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 300                        "and a clear PE flag\n");
 301                 kvm_inject_gp(vcpu, 0);
 302                 return;
 303         }
 304
 305         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 306 #ifdef CONFIG_X86_64
 307                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 308                         int cs_db, cs_l;
 309
 310                         if (!is_pae(vcpu)) {
 311                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 312                                        "in long mode while PAE is disabled\n");
 313                                 kvm_inject_gp(vcpu, 0);
 314                                 return;
 315                         }
 316                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 317                         if (cs_l) {
 318                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 319                                        "in long mode while CS.L == 1\n");
 320                                 kvm_inject_gp(vcpu, 0);
 321                                 return;
 322
 323                         }
 324                 } else
 325 #endif
 326                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 327                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 328                                "reserved bits\n");
 329                         kvm_inject_gp(vcpu, 0);
 330                         return;
 331                 }
 332
 333         }
 334
 335         kvm_x86_ops->set_cr0(vcpu, cr0);
 336         vcpu->arch.cr0 = cr0;
 337
 338         kvm_mmu_reset_context(vcpu);
 339         return;
 340 }
 341 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 342
 343 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 344 {
 345         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_lmsw);
 348
 349 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 350 {
 351         unsigned long old_cr4 = vcpu->arch.cr4;
 352         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 353
 354         if (cr4 & CR4_RESERVED_BITS) {
 355                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 356                 kvm_inject_gp(vcpu, 0);
 357                 return;
 358         }
 359
 360         if (is_long_mode(vcpu)) {
 361                 if (!(cr4 & X86_CR4_PAE)) {
 362                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 363                                "in long mode\n");
 364                         kvm_inject_gp(vcpu, 0);
 365                         return;
 366                 }
 367         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 368                    && ((cr4 ^ old_cr4) & pdptr_bits)
 369                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 370                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 371                 kvm_inject_gp(vcpu, 0);
 372                 return;
 373         }
 374
 375         if (cr4 & X86_CR4_VMXE) {
 376                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 377                 kvm_inject_gp(vcpu, 0);
 378                 return;
 379         }
 380         kvm_x86_ops->set_cr4(vcpu, cr4);
 381         vcpu->arch.cr4 = cr4;
 382         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 383         kvm_mmu_reset_context(vcpu);
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 386
 387 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 388 {
 389         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 390                 kvm_mmu_sync_roots(vcpu);
 391                 kvm_mmu_flush_tlb(vcpu);
 392                 return;
 393         }
 394
 395         if (is_long_mode(vcpu)) {
 396                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 397                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 398                         kvm_inject_gp(vcpu, 0);
 399                         return;
 400                 }
 401         } else {
 402                 if (is_pae(vcpu)) {
 403                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 404                                 printk(KERN_DEBUG
 405                                        "set_cr3: #GP, reserved bits\n");
 406                                 kvm_inject_gp(vcpu, 0);
 407                                 return;
 408                         }
 409                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 410                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 411                                        "reserved bits\n");
 412                                 kvm_inject_gp(vcpu, 0);
 413                                 return;
 414                         }
 415                 }
 416                 /*
 417                  * We don't check reserved bits in nonpae mode, because
 418                  * this isn't enforced, and VMware depends on this.
 419                  */
 420         }
 421
 422         /*
 423          * Does the new cr3 value map to physical memory? (Note, we
 424          * catch an invalid cr3 even in real-mode, because it would
 425          * cause trouble later on when we turn on paging anyway.)
 426          *
 427          * A real CPU would silently accept an invalid cr3 and would
 428          * attempt to use it - with largely undefined (and often hard
 429          * to debug) behavior on the guest side.
 430          */
 431         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 432                 kvm_inject_gp(vcpu, 0);
 433         else {
 434                 vcpu->arch.cr3 = cr3;
 435                 vcpu->arch.mmu.new_cr3(vcpu);
 436         }
 437 }
 438 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 439
 440 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 441 {
 442         if (cr8 & CR8_RESERVED_BITS) {
 443                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 444                 kvm_inject_gp(vcpu, 0);
 445                 return;
 446         }
 447         if (irqchip_in_kernel(vcpu->kvm))
 448                 kvm_lapic_set_tpr(vcpu, cr8);
 449         else
 450                 vcpu->arch.cr8 = cr8;
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 453
 454 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 455 {
 456         if (irqchip_in_kernel(vcpu->kvm))
 457                 return kvm_lapic_get_cr8(vcpu);
 458         else
 459                 return vcpu->arch.cr8;
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 462
 463 static inline u32 bit(int bitno)
 464 {
 465         return 1 << (bitno & 31);
 466 }
 467
 468 /*
 469  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 470  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 471  *
 472  * This list is modified at module load time to reflect the
 473  * capabilities of the host cpu.
 474  */
 475 static u32 msrs_to_save[] = {
 476         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 477         MSR_K6_STAR,
 478 #ifdef CONFIG_X86_64
 479         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 480 #endif
 481         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 482         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 483 };
 484
 485 static unsigned num_msrs_to_save;
 486
 487 static u32 emulated_msrs[] = {
 488         MSR_IA32_MISC_ENABLE,
 489 };
 490
 491 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 492 {
 493         if (efer & efer_reserved_bits) {
 494                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 495                        efer);
 496                 kvm_inject_gp(vcpu, 0);
 497                 return;
 498         }
 499
 500         if (is_paging(vcpu)
 501             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 502                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 503                 kvm_inject_gp(vcpu, 0);
 504                 return;
 505         }
 506
 507         if (efer & EFER_FFXSR) {
 508                 struct kvm_cpuid_entry2 *feat;
 509
 510                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 511                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 512                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 513                         kvm_inject_gp(vcpu, 0);
 514                         return;
 515                 }
 516         }
 517
 518         if (efer & EFER_SVME) {
 519                 struct kvm_cpuid_entry2 *feat;
 520
 521                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 522                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 523                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 524                         kvm_inject_gp(vcpu, 0);
 525                         return;
 526                 }
 527         }
 528
 529         kvm_x86_ops->set_efer(vcpu, efer);
 530
 531         efer &= ~EFER_LMA;
 532         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 533
 534         vcpu->arch.shadow_efer = efer;
 535
 536         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 537         kvm_mmu_reset_context(vcpu);
 538 }
 539
 540 void kvm_enable_efer_bits(u64 mask)
 541 {
 542        efer_reserved_bits &= ~mask;
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 545
 546
 547 /*
 548  * Writes msr value into into the appropriate "register".
 549  * Returns 0 on success, non-0 otherwise.
 550  * Assumes vcpu_load() was already called.
 551  */
 552 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 553 {
 554         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 555 }
 556
 557 /*
 558  * Adapt set_msr() to msr_io()'s calling convention
 559  */
 560 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 561 {
 562         return kvm_set_msr(vcpu, index, *data);
 563 }
 564
 565 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 566 {
 567         static int version;
 568         struct pvclock_wall_clock wc;
 569         struct timespec now, sys, boot;
 570
 571         if (!wall_clock)
 572                 return;
 573
 574         version++;
 575
 576         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 577
 578         /*
 579          * The guest calculates current wall clock time by adding
 580          * system time (updated by kvm_write_guest_time below) to the
 581          * wall clock specified here.  guest system time equals host
 582          * system time for us, thus we must fill in host boot time here.
 583          */
 584         now = current_kernel_time();
 585         ktime_get_ts(&sys);
 586         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 587
 588         wc.sec = boot.tv_sec;
 589         wc.nsec = boot.tv_nsec;
 590         wc.version = version;
 591
 592         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 593
 594         version++;
 595         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 596 }
 597
 598 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 599 {
 600         uint32_t quotient, remainder;
 601
 602         /* Don't try to replace with do_div(), this one calculates
 603          * "(dividend << 32) / divisor" */
 604         __asm__ ( "divl %4"
 605                   : "=a" (quotient), "=d" (remainder)
 606                   : "0" (0), "1" (dividend), "r" (divisor) );
 607         return quotient;
 608 }
 609
 610 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 611 {
 612         uint64_t nsecs = 1000000000LL;
 613         int32_t  shift = 0;
 614         uint64_t tps64;
 615         uint32_t tps32;
 616
 617         tps64 = tsc_khz * 1000LL;
 618         while (tps64 > nsecs*2) {
 619                 tps64 >>= 1;
 620                 shift--;
 621         }
 622
 623         tps32 = (uint32_t)tps64;
 624         while (tps32 <= (uint32_t)nsecs) {
 625                 tps32 <<= 1;
 626                 shift++;
 627         }
 628
 629         hv_clock->tsc_shift = shift;
 630         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 631
 632         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 633                  __func__, tsc_khz, hv_clock->tsc_shift,
 634                  hv_clock->tsc_to_system_mul);
 635 }
 636
 637 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 638
 639 static void kvm_write_guest_time(struct kvm_vcpu *v)
 640 {
 641         struct timespec ts;
 642         unsigned long flags;
 643         struct kvm_vcpu_arch *vcpu = &v->arch;
 644         void *shared_kaddr;
 645         unsigned long this_tsc_khz;
 646
 647         if ((!vcpu->time_page))
 648                 return;
 649
 650         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 651         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 652                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 653                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 654         }
 655         put_cpu_var(cpu_tsc_khz);
 656
 657         /* Keep irq disabled to prevent changes to the clock */
 658         local_irq_save(flags);
 659         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 660         ktime_get_ts(&ts);
 661         local_irq_restore(flags);
 662
 663         /* With all the info we got, fill in the values */
 664
 665         vcpu->hv_clock.system_time = ts.tv_nsec +
 666                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 667         /*
 668          * The interface expects us to write an even number signaling that the
 669          * update is finished. Since the guest won't see the intermediate
 670          * state, we just increase by 2 at the end.
 671          */
 672         vcpu->hv_clock.version += 2;
 673
 674         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 675
 676         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 677                sizeof(vcpu->hv_clock));
 678
 679         kunmap_atomic(shared_kaddr, KM_USER0);
 680
 681         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 682 }
 683
 684 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 685 {
 686         struct kvm_vcpu_arch *vcpu = &v->arch;
 687
 688         if (!vcpu->time_page)
 689                 return 0;
 690         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 691         return 1;
 692 }
 693
 694 static bool msr_mtrr_valid(unsigned msr)
 695 {
 696         switch (msr) {
 697         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 698         case MSR_MTRRfix64K_00000:
 699         case MSR_MTRRfix16K_80000:
 700         case MSR_MTRRfix16K_A0000:
 701         case MSR_MTRRfix4K_C0000:
 702         case MSR_MTRRfix4K_C8000:
 703         case MSR_MTRRfix4K_D0000:
 704         case MSR_MTRRfix4K_D8000:
 705         case MSR_MTRRfix4K_E0000:
 706         case MSR_MTRRfix4K_E8000:
 707         case MSR_MTRRfix4K_F0000:
 708         case MSR_MTRRfix4K_F8000:
 709         case MSR_MTRRdefType:
 710         case MSR_IA32_CR_PAT:
 711                 return true;
 712         case 0x2f8:
 713                 return true;
 714         }
 715         return false;
 716 }
 717
 718 static bool valid_pat_type(unsigned t)
 719 {
 720         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 721 }
 722
 723 static bool valid_mtrr_type(unsigned t)
 724 {
 725         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 726 }
 727
 728 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 729 {
 730         int i;
 731
 732         if (!msr_mtrr_valid(msr))
 733                 return false;
 734
 735         if (msr == MSR_IA32_CR_PAT) {
 736                 for (i = 0; i < 8; i++)
 737                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 738                                 return false;
 739                 return true;
 740         } else if (msr == MSR_MTRRdefType) {
 741                 if (data & ~0xcff)
 742                         return false;
 743                 return valid_mtrr_type(data & 0xff);
 744         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 745                 for (i = 0; i < 8 ; i++)
 746                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 747                                 return false;
 748                 return true;
 749         }
 750
 751         /* variable MTRRs */
 752         return valid_mtrr_type(data & 0xff);
 753 }
 754
 755 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 756 {
 757         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 758
 759         if (!mtrr_valid(vcpu, msr, data))
 760                 return 1;
 761
 762         if (msr == MSR_MTRRdefType) {
 763                 vcpu->arch.mtrr_state.def_type = data;
 764                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 765         } else if (msr == MSR_MTRRfix64K_00000)
 766                 p[0] = data;
 767         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 768                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 769         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 770                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 771         else if (msr == MSR_IA32_CR_PAT)
 772                 vcpu->arch.pat = data;
 773         else {  /* Variable MTRRs */
 774                 int idx, is_mtrr_mask;
 775                 u64 *pt;
 776
 777                 idx = (msr - 0x200) / 2;
 778                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 779                 if (!is_mtrr_mask)
 780                         pt =
 781                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 782                 else
 783                         pt =
 784                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 785                 *pt = data;
 786         }
 787
 788         kvm_mmu_reset_context(vcpu);
 789         return 0;
 790 }
 791
 792 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 793 {
 794         u64 mcg_cap = vcpu->arch.mcg_cap;
 795         unsigned bank_num = mcg_cap & 0xff;
 796
 797         switch (msr) {
 798         case MSR_IA32_MCG_STATUS:
 799                 vcpu->arch.mcg_status = data;
 800                 break;
 801         case MSR_IA32_MCG_CTL:
 802                 if (!(mcg_cap & MCG_CTL_P))
 803                         return 1;
 804                 if (data != 0 && data != ~(u64)0)
 805                         return -1;
 806                 vcpu->arch.mcg_ctl = data;
 807                 break;
 808         default:
 809                 if (msr >= MSR_IA32_MC0_CTL &&
 810                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 811                         u32 offset = msr - MSR_IA32_MC0_CTL;
 812                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 813                         if ((offset & 0x3) == 0 &&
 814                             data != 0 && data != ~(u64)0)
 815                                 return -1;
 816                         vcpu->arch.mce_banks[offset] = data;
 817                         break;
 818                 }
 819                 return 1;
 820         }
 821         return 0;
 822 }
 823
 824 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 825 {
 826         switch (msr) {
 827         case MSR_EFER:
 828                 set_efer(vcpu, data);
 829                 break;
 830         case MSR_K7_HWCR:
 831                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 832                 if (data != 0) {
 833                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 834                                 data);
 835                         return 1;
 836                 }
 837                 break;
 838         case MSR_FAM10H_MMIO_CONF_BASE:
 839                 if (data != 0) {
 840                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 841                                 "0x%llx\n", data);
 842                         return 1;
 843                 }
 844                 break;
 845         case MSR_AMD64_NB_CFG:
 846                 break;
 847         case MSR_IA32_DEBUGCTLMSR:
 848                 if (!data) {
 849                         /* We support the non-activated case already */
 850                         break;
 851                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 852                         /* Values other than LBR and BTF are vendor-specific,
 853                            thus reserved and should throw a #GP */
 854                         return 1;
 855                 }
 856                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 857                         __func__, data);
 858                 break;
 859         case MSR_IA32_UCODE_REV:
 860         case MSR_IA32_UCODE_WRITE:
 861         case MSR_VM_HSAVE_PA:
 862         case MSR_AMD64_PATCH_LOADER:
 863                 break;
 864         case 0x200 ... 0x2ff:
 865                 return set_msr_mtrr(vcpu, msr, data);
 866         case MSR_IA32_APICBASE:
 867                 kvm_set_apic_base(vcpu, data);
 868                 break;
 869         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 870                 return kvm_x2apic_msr_write(vcpu, msr, data);
 871         case MSR_IA32_MISC_ENABLE:
 872                 vcpu->arch.ia32_misc_enable_msr = data;
 873                 break;
 874         case MSR_KVM_WALL_CLOCK:
 875                 vcpu->kvm->arch.wall_clock = data;
 876                 kvm_write_wall_clock(vcpu->kvm, data);
 877                 break;
 878         case MSR_KVM_SYSTEM_TIME: {
 879                 if (vcpu->arch.time_page) {
 880                         kvm_release_page_dirty(vcpu->arch.time_page);
 881                         vcpu->arch.time_page = NULL;
 882                 }
 883
 884                 vcpu->arch.time = data;
 885
 886                 /* we verify if the enable bit is set... */
 887                 if (!(data & 1))
 888                         break;
 889
 890                 /* ...but clean it before doing the actual write */
 891                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 892
 893                 vcpu->arch.time_page =
 894                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 895
 896                 if (is_error_page(vcpu->arch.time_page)) {
 897                         kvm_release_page_clean(vcpu->arch.time_page);
 898                         vcpu->arch.time_page = NULL;
 899                 }
 900
 901                 kvm_request_guest_time_update(vcpu);
 902                 break;
 903         }
 904         case MSR_IA32_MCG_CTL:
 905         case MSR_IA32_MCG_STATUS:
 906         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 907                 return set_msr_mce(vcpu, msr, data);
 908
 909         /* Performance counters are not protected by a CPUID bit,
 910          * so we should check all of them in the generic path for the sake of
 911          * cross vendor migration.
 912          * Writing a zero into the event select MSRs disables them,
 913          * which we perfectly emulate ;-). Any other value should be at least
 914          * reported, some guests depend on them.
 915          */
 916         case MSR_P6_EVNTSEL0:
 917         case MSR_P6_EVNTSEL1:
 918         case MSR_K7_EVNTSEL0:
 919         case MSR_K7_EVNTSEL1:
 920         case MSR_K7_EVNTSEL2:
 921         case MSR_K7_EVNTSEL3:
 922                 if (data != 0)
 923                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 924                                 "0x%x data 0x%llx\n", msr, data);
 925                 break;
 926         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 927          * so we ignore writes to make it happy.
 928          */
 929         case MSR_P6_PERFCTR0:
 930         case MSR_P6_PERFCTR1:
 931         case MSR_K7_PERFCTR0:
 932         case MSR_K7_PERFCTR1:
 933         case MSR_K7_PERFCTR2:
 934         case MSR_K7_PERFCTR3:
 935                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 936                         "0x%x data 0x%llx\n", msr, data);
 937                 break;
 938         default:
 939                 if (!ignore_msrs) {
 940                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 941                                 msr, data);
 942                         return 1;
 943                 } else {
 944                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 945                                 msr, data);
 946                         break;
 947                 }
 948         }
 949         return 0;
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 952
 953
 954 /*
 955  * Reads an msr value (of 'msr_index') into 'pdata'.
 956  * Returns 0 on success, non-0 otherwise.
 957  * Assumes vcpu_load() was already called.
 958  */
 959 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 960 {
 961         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 962 }
 963
 964 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 965 {
 966         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 967
 968         if (!msr_mtrr_valid(msr))
 969                 return 1;
 970
 971         if (msr == MSR_MTRRdefType)
 972                 *pdata = vcpu->arch.mtrr_state.def_type +
 973                          (vcpu->arch.mtrr_state.enabled << 10);
 974         else if (msr == MSR_MTRRfix64K_00000)
 975                 *pdata = p[0];
 976         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 977                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 978         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 979                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 980         else if (msr == MSR_IA32_CR_PAT)
 981                 *pdata = vcpu->arch.pat;
 982         else {  /* Variable MTRRs */
 983                 int idx, is_mtrr_mask;
 984                 u64 *pt;
 985
 986                 idx = (msr - 0x200) / 2;
 987                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 988                 if (!is_mtrr_mask)
 989                         pt =
 990                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 991                 else
 992                         pt =
 993                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 994                 *pdata = *pt;
 995         }
 996
 997         return 0;
 998 }
 999
1000 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1001 {
1002         u64 data;
1003         u64 mcg_cap = vcpu->arch.mcg_cap;
1004         unsigned bank_num = mcg_cap & 0xff;
1005
1006         switch (msr) {
1007         case MSR_IA32_P5_MC_ADDR:
1008         case MSR_IA32_P5_MC_TYPE:
1009                 data = 0;
1010                 break;
1011         case MSR_IA32_MCG_CAP:
1012                 data = vcpu->arch.mcg_cap;
1013                 break;
1014         case MSR_IA32_MCG_CTL:
1015                 if (!(mcg_cap & MCG_CTL_P))
1016                         return 1;
1017                 data = vcpu->arch.mcg_ctl;
1018                 break;
1019         case MSR_IA32_MCG_STATUS:
1020                 data = vcpu->arch.mcg_status;
1021                 break;
1022         default:
1023                 if (msr >= MSR_IA32_MC0_CTL &&
1024                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1025                         u32 offset = msr - MSR_IA32_MC0_CTL;
1026                         data = vcpu->arch.mce_banks[offset];
1027                         break;
1028                 }
1029                 return 1;
1030         }
1031         *pdata = data;
1032         return 0;
1033 }
1034
1035 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1036 {
1037         u64 data;
1038
1039         switch (msr) {
1040         case MSR_IA32_PLATFORM_ID:
1041         case MSR_IA32_UCODE_REV:
1042         case MSR_IA32_EBL_CR_POWERON:
1043         case MSR_IA32_DEBUGCTLMSR:
1044         case MSR_IA32_LASTBRANCHFROMIP:
1045         case MSR_IA32_LASTBRANCHTOIP:
1046         case MSR_IA32_LASTINTFROMIP:
1047         case MSR_IA32_LASTINTTOIP:
1048         case MSR_K8_SYSCFG:
1049         case MSR_K7_HWCR:
1050         case MSR_VM_HSAVE_PA:
1051         case MSR_P6_EVNTSEL0:
1052         case MSR_P6_EVNTSEL1:
1053         case MSR_K7_EVNTSEL0:
1054         case MSR_K8_INT_PENDING_MSG:
1055         case MSR_AMD64_NB_CFG:
1056         case MSR_FAM10H_MMIO_CONF_BASE:
1057                 data = 0;
1058                 break;
1059         case MSR_MTRRcap:
1060                 data = 0x500 | KVM_NR_VAR_MTRR;
1061                 break;
1062         case 0x200 ... 0x2ff:
1063                 return get_msr_mtrr(vcpu, msr, pdata);
1064         case 0xcd: /* fsb frequency */
1065                 data = 3;
1066                 break;
1067         case MSR_IA32_APICBASE:
1068                 data = kvm_get_apic_base(vcpu);
1069                 break;
1070         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1071                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1072                 break;
1073         case MSR_IA32_MISC_ENABLE:
1074                 data = vcpu->arch.ia32_misc_enable_msr;
1075                 break;
1076         case MSR_IA32_PERF_STATUS:
1077                 /* TSC increment by tick */
1078                 data = 1000ULL;
1079                 /* CPU multiplier */
1080                 data |= (((uint64_t)4ULL) << 40);
1081                 break;
1082         case MSR_EFER:
1083                 data = vcpu->arch.shadow_efer;
1084                 break;
1085         case MSR_KVM_WALL_CLOCK:
1086                 data = vcpu->kvm->arch.wall_clock;
1087                 break;
1088         case MSR_KVM_SYSTEM_TIME:
1089                 data = vcpu->arch.time;
1090                 break;
1091         case MSR_IA32_P5_MC_ADDR:
1092         case MSR_IA32_P5_MC_TYPE:
1093         case MSR_IA32_MCG_CAP:
1094         case MSR_IA32_MCG_CTL:
1095         case MSR_IA32_MCG_STATUS:
1096         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1097                 return get_msr_mce(vcpu, msr, pdata);
1098         default:
1099                 if (!ignore_msrs) {
1100                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1101                         return 1;
1102                 } else {
1103                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1104                         data = 0;
1105                 }
1106                 break;
1107         }
1108         *pdata = data;
1109         return 0;
1110 }
1111 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1112
1113 /*
1114  * Read or write a bunch of msrs. All parameters are kernel addresses.
1115  *
1116  * @return number of msrs set successfully.
1117  */
1118 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1119                     struct kvm_msr_entry *entries,
1120                     int (*do_msr)(struct kvm_vcpu *vcpu,
1121                                   unsigned index, u64 *data))
1122 {
1123         int i;
1124
1125         vcpu_load(vcpu);
1126
1127         down_read(&vcpu->kvm->slots_lock);
1128         for (i = 0; i < msrs->nmsrs; ++i)
1129                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1130                         break;
1131         up_read(&vcpu->kvm->slots_lock);
1132
1133         vcpu_put(vcpu);
1134
1135         return i;
1136 }
1137
1138 /*
1139  * Read or write a bunch of msrs. Parameters are user addresses.
1140  *
1141  * @return number of msrs set successfully.
1142  */
1143 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1144                   int (*do_msr)(struct kvm_vcpu *vcpu,
1145                                 unsigned index, u64 *data),
1146                   int writeback)
1147 {
1148         struct kvm_msrs msrs;
1149         struct kvm_msr_entry *entries;
1150         int r, n;
1151         unsigned size;
1152
1153         r = -EFAULT;
1154         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1155                 goto out;
1156
1157         r = -E2BIG;
1158         if (msrs.nmsrs >= MAX_IO_MSRS)
1159                 goto out;
1160
1161         r = -ENOMEM;
1162         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1163         entries = vmalloc(size);
1164         if (!entries)
1165                 goto out;
1166
1167         r = -EFAULT;
1168         if (copy_from_user(entries, user_msrs->entries, size))
1169                 goto out_free;
1170
1171         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1172         if (r < 0)
1173                 goto out_free;
1174
1175         r = -EFAULT;
1176         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1177                 goto out_free;
1178
1179         r = n;
1180
1181 out_free:
1182         vfree(entries);
1183 out:
1184         return r;
1185 }
1186
1187 int kvm_dev_ioctl_check_extension(long ext)
1188 {
1189         int r;
1190
1191         switch (ext) {
1192         case KVM_CAP_IRQCHIP:
1193         case KVM_CAP_HLT:
1194         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1195         case KVM_CAP_SET_TSS_ADDR:
1196         case KVM_CAP_EXT_CPUID:
1197         case KVM_CAP_CLOCKSOURCE:
1198         case KVM_CAP_PIT:
1199         case KVM_CAP_NOP_IO_DELAY:
1200         case KVM_CAP_MP_STATE:
1201         case KVM_CAP_SYNC_MMU:
1202         case KVM_CAP_REINJECT_CONTROL:
1203         case KVM_CAP_IRQ_INJECT_STATUS:
1204         case KVM_CAP_ASSIGN_DEV_IRQ:
1205         case KVM_CAP_IRQFD:
1206         case KVM_CAP_IOEVENTFD:
1207         case KVM_CAP_PIT2:
1208         case KVM_CAP_PIT_STATE2:
1209         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1210                 r = 1;
1211                 break;
1212         case KVM_CAP_COALESCED_MMIO:
1213                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1214                 break;
1215         case KVM_CAP_VAPIC:
1216                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1217                 break;
1218         case KVM_CAP_NR_VCPUS:
1219                 r = KVM_MAX_VCPUS;
1220                 break;
1221         case KVM_CAP_NR_MEMSLOTS:
1222                 r = KVM_MEMORY_SLOTS;
1223                 break;
1224         case KVM_CAP_PV_MMU:
1225                 r = !tdp_enabled;
1226                 break;
1227         case KVM_CAP_IOMMU:
1228                 r = iommu_found();
1229                 break;
1230         case KVM_CAP_MCE:
1231                 r = KVM_MAX_MCE_BANKS;
1232                 break;
1233         default:
1234                 r = 0;
1235                 break;
1236         }
1237         return r;
1238
1239 }
1240
1241 long kvm_arch_dev_ioctl(struct file *filp,
1242                         unsigned int ioctl, unsigned long arg)
1243 {
1244         void __user *argp = (void __user *)arg;
1245         long r;
1246
1247         switch (ioctl) {
1248         case KVM_GET_MSR_INDEX_LIST: {
1249                 struct kvm_msr_list __user *user_msr_list = argp;
1250                 struct kvm_msr_list msr_list;
1251                 unsigned n;
1252
1253                 r = -EFAULT;
1254                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1255                         goto out;
1256                 n = msr_list.nmsrs;
1257                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1258                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1259                         goto out;
1260                 r = -E2BIG;
1261                 if (n < msr_list.nmsrs)
1262                         goto out;
1263                 r = -EFAULT;
1264                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1265                                  num_msrs_to_save * sizeof(u32)))
1266                         goto out;
1267                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1268                                  &emulated_msrs,
1269                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1270                         goto out;
1271                 r = 0;
1272                 break;
1273         }
1274         case KVM_GET_SUPPORTED_CPUID: {
1275                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1276                 struct kvm_cpuid2 cpuid;
1277
1278                 r = -EFAULT;
1279                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1280                         goto out;
1281                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1282                                                       cpuid_arg->entries);
1283                 if (r)
1284                         goto out;
1285
1286                 r = -EFAULT;
1287                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1288                         goto out;
1289                 r = 0;
1290                 break;
1291         }
1292         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1293                 u64 mce_cap;
1294
1295                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1296                 r = -EFAULT;
1297                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1298                         goto out;
1299                 r = 0;
1300                 break;
1301         }
1302         default:
1303                 r = -EINVAL;
1304         }
1305 out:
1306         return r;
1307 }
1308
1309 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1310 {
1311         kvm_x86_ops->vcpu_load(vcpu, cpu);
1312         kvm_request_guest_time_update(vcpu);
1313 }
1314
1315 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1316 {
1317         kvm_x86_ops->vcpu_put(vcpu);
1318         kvm_put_guest_fpu(vcpu);
1319 }
1320
1321 static int is_efer_nx(void)
1322 {
1323         unsigned long long efer = 0;
1324
1325         rdmsrl_safe(MSR_EFER, &efer);
1326         return efer & EFER_NX;
1327 }
1328
1329 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1330 {
1331         int i;
1332         struct kvm_cpuid_entry2 *e, *entry;
1333
1334         entry = NULL;
1335         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1336                 e = &vcpu->arch.cpuid_entries[i];
1337                 if (e->function == 0x80000001) {
1338                         entry = e;
1339                         break;
1340                 }
1341         }
1342         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1343                 entry->edx &= ~(1 << 20);
1344                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1345         }
1346 }
1347
1348 /* when an old userspace process fills a new kernel module */
1349 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1350                                     struct kvm_cpuid *cpuid,
1351                                     struct kvm_cpuid_entry __user *entries)
1352 {
1353         int r, i;
1354         struct kvm_cpuid_entry *cpuid_entries;
1355
1356         r = -E2BIG;
1357         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1358                 goto out;
1359         r = -ENOMEM;
1360         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1361         if (!cpuid_entries)
1362                 goto out;
1363         r = -EFAULT;
1364         if (copy_from_user(cpuid_entries, entries,
1365                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1366                 goto out_free;
1367         for (i = 0; i < cpuid->nent; i++) {
1368                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1369                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1370                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1371                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1372                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1373                 vcpu->arch.cpuid_entries[i].index = 0;
1374                 vcpu->arch.cpuid_entries[i].flags = 0;
1375                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1376                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1377                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1378         }
1379         vcpu->arch.cpuid_nent = cpuid->nent;
1380         cpuid_fix_nx_cap(vcpu);
1381         r = 0;
1382         kvm_apic_set_version(vcpu);
1383
1384 out_free:
1385         vfree(cpuid_entries);
1386 out:
1387         return r;
1388 }
1389
1390 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1391                                      struct kvm_cpuid2 *cpuid,
1392                                      struct kvm_cpuid_entry2 __user *entries)
1393 {
1394         int r;
1395
1396         r = -E2BIG;
1397         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1398                 goto out;
1399         r = -EFAULT;
1400         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1401                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1402                 goto out;
1403         vcpu->arch.cpuid_nent = cpuid->nent;
1404         kvm_apic_set_version(vcpu);
1405         return 0;
1406
1407 out:
1408         return r;
1409 }
1410
1411 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1412                                      struct kvm_cpuid2 *cpuid,
1413                                      struct kvm_cpuid_entry2 __user *entries)
1414 {
1415         int r;
1416
1417         r = -E2BIG;
1418         if (cpuid->nent < vcpu->arch.cpuid_nent)
1419                 goto out;
1420         r = -EFAULT;
1421         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1422                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1423                 goto out;
1424         return 0;
1425
1426 out:
1427         cpuid->nent = vcpu->arch.cpuid_nent;
1428         return r;
1429 }
1430
1431 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1432                            u32 index)
1433 {
1434         entry->function = function;
1435         entry->index = index;
1436         cpuid_count(entry->function, entry->index,
1437                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1438         entry->flags = 0;
1439 }
1440
1441 #define F(x) bit(X86_FEATURE_##x)
1442
1443 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1444                          u32 index, int *nent, int maxnent)
1445 {
1446         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1447         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1448 #ifdef CONFIG_X86_64
1449         unsigned f_lm = F(LM);
1450 #else
1451         unsigned f_lm = 0;
1452 #endif
1453
1454         /* cpuid 1.edx */
1455         const u32 kvm_supported_word0_x86_features =
1456                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1457                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1458                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1459                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1460                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1461                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1462                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1463                 0 /* HTT, TM, Reserved, PBE */;
1464         /* cpuid 0x80000001.edx */
1465         const u32 kvm_supported_word1_x86_features =
1466                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1467                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1468                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1469                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1470                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1471                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1472                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1473                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1474         /* cpuid 1.ecx */
1475         const u32 kvm_supported_word4_x86_features =
1476                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1477                 0 /* DS-CPL, VMX, SMX, EST */ |
1478                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1479                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1480                 0 /* Reserved, DCA */ | F(XMM4_1) |
1481                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1482                 0 /* Reserved, XSAVE, OSXSAVE */;
1483         /* cpuid 0x80000001.ecx */
1484         const u32 kvm_supported_word6_x86_features =
1485                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1486                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1487                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1488                 0 /* SKINIT */ | 0 /* WDT */;
1489
1490         /* all calls to cpuid_count() should be made on the same cpu */
1491         get_cpu();
1492         do_cpuid_1_ent(entry, function, index);
1493         ++*nent;
1494
1495         switch (function) {
1496         case 0:
1497                 entry->eax = min(entry->eax, (u32)0xb);
1498                 break;
1499         case 1:
1500                 entry->edx &= kvm_supported_word0_x86_features;
1501                 entry->ecx &= kvm_supported_word4_x86_features;
1502                 /* we support x2apic emulation even if host does not support
1503                  * it since we emulate x2apic in software */
1504                 entry->ecx |= F(X2APIC);
1505                 break;
1506         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1507          * may return different values. This forces us to get_cpu() before
1508          * issuing the first command, and also to emulate this annoying behavior
1509          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1510         case 2: {
1511                 int t, times = entry->eax & 0xff;
1512
1513                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1514                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1515                 for (t = 1; t < times && *nent < maxnent; ++t) {
1516                         do_cpuid_1_ent(&entry[t], function, 0);
1517                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1518                         ++*nent;
1519                 }
1520                 break;
1521         }
1522         /* function 4 and 0xb have additional index. */
1523         case 4: {
1524                 int i, cache_type;
1525
1526                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1527                 /* read more entries until cache_type is zero */
1528                 for (i = 1; *nent < maxnent; ++i) {
1529                         cache_type = entry[i - 1].eax & 0x1f;
1530                         if (!cache_type)
1531                                 break;
1532                         do_cpuid_1_ent(&entry[i], function, i);
1533                         entry[i].flags |=
1534                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1535                         ++*nent;
1536                 }
1537                 break;
1538         }
1539         case 0xb: {
1540                 int i, level_type;
1541
1542                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1543                 /* read more entries until level_type is zero */
1544                 for (i = 1; *nent < maxnent; ++i) {
1545                         level_type = entry[i - 1].ecx & 0xff00;
1546                         if (!level_type)
1547                                 break;
1548                         do_cpuid_1_ent(&entry[i], function, i);
1549                         entry[i].flags |=
1550                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1551                         ++*nent;
1552                 }
1553                 break;
1554         }
1555         case 0x80000000:
1556                 entry->eax = min(entry->eax, 0x8000001a);
1557                 break;
1558         case 0x80000001:
1559                 entry->edx &= kvm_supported_word1_x86_features;
1560                 entry->ecx &= kvm_supported_word6_x86_features;
1561                 break;
1562         }
1563         put_cpu();
1564 }
1565
1566 #undef F
1567
1568 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1569                                      struct kvm_cpuid_entry2 __user *entries)
1570 {
1571         struct kvm_cpuid_entry2 *cpuid_entries;
1572         int limit, nent = 0, r = -E2BIG;
1573         u32 func;
1574
1575         if (cpuid->nent < 1)
1576                 goto out;
1577         r = -ENOMEM;
1578         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1579         if (!cpuid_entries)
1580                 goto out;
1581
1582         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1583         limit = cpuid_entries[0].eax;
1584         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1585                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1586                              &nent, cpuid->nent);
1587         r = -E2BIG;
1588         if (nent >= cpuid->nent)
1589                 goto out_free;
1590
1591         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1592         limit = cpuid_entries[nent - 1].eax;
1593         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1594                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1595                              &nent, cpuid->nent);
1596         r = -E2BIG;
1597         if (nent >= cpuid->nent)
1598                 goto out_free;
1599
1600         r = -EFAULT;
1601         if (copy_to_user(entries, cpuid_entries,
1602                          nent * sizeof(struct kvm_cpuid_entry2)))
1603                 goto out_free;
1604         cpuid->nent = nent;
1605         r = 0;
1606
1607 out_free:
1608         vfree(cpuid_entries);
1609 out:
1610         return r;
1611 }
1612
1613 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1614                                     struct kvm_lapic_state *s)
1615 {
1616         vcpu_load(vcpu);
1617         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1618         vcpu_put(vcpu);
1619
1620         return 0;
1621 }
1622
1623 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1624                                     struct kvm_lapic_state *s)
1625 {
1626         vcpu_load(vcpu);
1627         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1628         kvm_apic_post_state_restore(vcpu);
1629         vcpu_put(vcpu);
1630
1631         return 0;
1632 }
1633
1634 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1635                                     struct kvm_interrupt *irq)
1636 {
1637         if (irq->irq < 0 || irq->irq >= 256)
1638                 return -EINVAL;
1639         if (irqchip_in_kernel(vcpu->kvm))
1640                 return -ENXIO;
1641         vcpu_load(vcpu);
1642
1643         kvm_queue_interrupt(vcpu, irq->irq, false);
1644
1645         vcpu_put(vcpu);
1646
1647         return 0;
1648 }
1649
1650 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1651 {
1652         vcpu_load(vcpu);
1653         kvm_inject_nmi(vcpu);
1654         vcpu_put(vcpu);
1655
1656         return 0;
1657 }
1658
1659 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1660                                            struct kvm_tpr_access_ctl *tac)
1661 {
1662         if (tac->flags)
1663                 return -EINVAL;
1664         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1665         return 0;
1666 }
1667
1668 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1669                                         u64 mcg_cap)
1670 {
1671         int r;
1672         unsigned bank_num = mcg_cap & 0xff, bank;
1673
1674         r = -EINVAL;
1675         if (!bank_num)
1676                 goto out;
1677         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1678                 goto out;
1679         r = 0;
1680         vcpu->arch.mcg_cap = mcg_cap;
1681         /* Init IA32_MCG_CTL to all 1s */
1682         if (mcg_cap & MCG_CTL_P)
1683                 vcpu->arch.mcg_ctl = ~(u64)0;
1684         /* Init IA32_MCi_CTL to all 1s */
1685         for (bank = 0; bank < bank_num; bank++)
1686                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1687 out:
1688         return r;
1689 }
1690
1691 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1692                                       struct kvm_x86_mce *mce)
1693 {
1694         u64 mcg_cap = vcpu->arch.mcg_cap;
1695         unsigned bank_num = mcg_cap & 0xff;
1696         u64 *banks = vcpu->arch.mce_banks;
1697
1698         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1699                 return -EINVAL;
1700         /*
1701          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1702          * reporting is disabled
1703          */
1704         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1705             vcpu->arch.mcg_ctl != ~(u64)0)
1706                 return 0;
1707         banks += 4 * mce->bank;
1708         /*
1709          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1710          * reporting is disabled for the bank
1711          */
1712         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1713                 return 0;
1714         if (mce->status & MCI_STATUS_UC) {
1715                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1716                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1717                         printk(KERN_DEBUG "kvm: set_mce: "
1718                                "injects mce exception while "
1719                                "previous one is in progress!\n");
1720                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1721                         return 0;
1722                 }
1723                 if (banks[1] & MCI_STATUS_VAL)
1724                         mce->status |= MCI_STATUS_OVER;
1725                 banks[2] = mce->addr;
1726                 banks[3] = mce->misc;
1727                 vcpu->arch.mcg_status = mce->mcg_status;
1728                 banks[1] = mce->status;
1729                 kvm_queue_exception(vcpu, MC_VECTOR);
1730         } else if (!(banks[1] & MCI_STATUS_VAL)
1731                    || !(banks[1] & MCI_STATUS_UC)) {
1732                 if (banks[1] & MCI_STATUS_VAL)
1733                         mce->status |= MCI_STATUS_OVER;
1734                 banks[2] = mce->addr;
1735                 banks[3] = mce->misc;
1736                 banks[1] = mce->status;
1737         } else
1738                 banks[1] |= MCI_STATUS_OVER;
1739         return 0;
1740 }
1741
1742 long kvm_arch_vcpu_ioctl(struct file *filp,
1743                          unsigned int ioctl, unsigned long arg)
1744 {
1745         struct kvm_vcpu *vcpu = filp->private_data;
1746         void __user *argp = (void __user *)arg;
1747         int r;
1748         struct kvm_lapic_state *lapic = NULL;
1749
1750         switch (ioctl) {
1751         case KVM_GET_LAPIC: {
1752                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1753
1754                 r = -ENOMEM;
1755                 if (!lapic)
1756                         goto out;
1757                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1758                 if (r)
1759                         goto out;
1760                 r = -EFAULT;
1761                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1762                         goto out;
1763                 r = 0;
1764                 break;
1765         }
1766         case KVM_SET_LAPIC: {
1767                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1768                 r = -ENOMEM;
1769                 if (!lapic)
1770                         goto out;
1771                 r = -EFAULT;
1772                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1773                         goto out;
1774                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1775                 if (r)
1776                         goto out;
1777                 r = 0;
1778                 break;
1779         }
1780         case KVM_INTERRUPT: {
1781                 struct kvm_interrupt irq;
1782
1783                 r = -EFAULT;
1784                 if (copy_from_user(&irq, argp, sizeof irq))
1785                         goto out;
1786                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1787                 if (r)
1788                         goto out;
1789                 r = 0;
1790                 break;
1791         }
1792         case KVM_NMI: {
1793                 r = kvm_vcpu_ioctl_nmi(vcpu);
1794                 if (r)
1795                         goto out;
1796                 r = 0;
1797                 break;
1798         }
1799         case KVM_SET_CPUID: {
1800                 struct kvm_cpuid __user *cpuid_arg = argp;
1801                 struct kvm_cpuid cpuid;
1802
1803                 r = -EFAULT;
1804                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1805                         goto out;
1806                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1807                 if (r)
1808                         goto out;
1809                 break;
1810         }
1811         case KVM_SET_CPUID2: {
1812                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1813                 struct kvm_cpuid2 cpuid;
1814
1815                 r = -EFAULT;
1816                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1817                         goto out;
1818                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1819                                               cpuid_arg->entries);
1820                 if (r)
1821                         goto out;
1822                 break;
1823         }
1824         case KVM_GET_CPUID2: {
1825                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1826                 struct kvm_cpuid2 cpuid;
1827
1828                 r = -EFAULT;
1829                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1830                         goto out;
1831                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1832                                               cpuid_arg->entries);
1833                 if (r)
1834                         goto out;
1835                 r = -EFAULT;
1836                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1837                         goto out;
1838                 r = 0;
1839                 break;
1840         }
1841         case KVM_GET_MSRS:
1842                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1843                 break;
1844         case KVM_SET_MSRS:
1845                 r = msr_io(vcpu, argp, do_set_msr, 0);
1846                 break;
1847         case KVM_TPR_ACCESS_REPORTING: {
1848                 struct kvm_tpr_access_ctl tac;
1849
1850                 r = -EFAULT;
1851                 if (copy_from_user(&tac, argp, sizeof tac))
1852                         goto out;
1853                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1854                 if (r)
1855                         goto out;
1856                 r = -EFAULT;
1857                 if (copy_to_user(argp, &tac, sizeof tac))
1858                         goto out;
1859                 r = 0;
1860                 break;
1861         };
1862         case KVM_SET_VAPIC_ADDR: {
1863                 struct kvm_vapic_addr va;
1864
1865                 r = -EINVAL;
1866                 if (!irqchip_in_kernel(vcpu->kvm))
1867                         goto out;
1868                 r = -EFAULT;
1869                 if (copy_from_user(&va, argp, sizeof va))
1870                         goto out;
1871                 r = 0;
1872                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1873                 break;
1874         }
1875         case KVM_X86_SETUP_MCE: {
1876                 u64 mcg_cap;
1877
1878                 r = -EFAULT;
1879                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1880                         goto out;
1881                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1882                 break;
1883         }
1884         case KVM_X86_SET_MCE: {
1885                 struct kvm_x86_mce mce;
1886
1887                 r = -EFAULT;
1888                 if (copy_from_user(&mce, argp, sizeof mce))
1889                         goto out;
1890                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1891                 break;
1892         }
1893         default:
1894                 r = -EINVAL;
1895         }
1896 out:
1897         kfree(lapic);
1898         return r;
1899 }
1900
1901 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1902 {
1903         int ret;
1904
1905         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1906                 return -1;
1907         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1908         return ret;
1909 }
1910
1911 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1912                                               u64 ident_addr)
1913 {
1914         kvm->arch.ept_identity_map_addr = ident_addr;
1915         return 0;
1916 }
1917
1918 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1919                                           u32 kvm_nr_mmu_pages)
1920 {
1921         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1922                 return -EINVAL;
1923
1924         down_write(&kvm->slots_lock);
1925         spin_lock(&kvm->mmu_lock);
1926
1927         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1928         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1929
1930         spin_unlock(&kvm->mmu_lock);
1931         up_write(&kvm->slots_lock);
1932         return 0;
1933 }
1934
1935 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1936 {
1937         return kvm->arch.n_alloc_mmu_pages;
1938 }
1939
1940 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1941 {
1942         int i;
1943         struct kvm_mem_alias *alias;
1944
1945         for (i = 0; i < kvm->arch.naliases; ++i) {
1946                 alias = &kvm->arch.aliases[i];
1947                 if (gfn >= alias->base_gfn
1948                     && gfn < alias->base_gfn + alias->npages)
1949                         return alias->target_gfn + gfn - alias->base_gfn;
1950         }
1951         return gfn;
1952 }
1953
1954 /*
1955  * Set a new alias region.  Aliases map a portion of physical memory into
1956  * another portion.  This is useful for memory windows, for example the PC
1957  * VGA region.
1958  */
1959 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1960                                          struct kvm_memory_alias *alias)
1961 {
1962         int r, n;
1963         struct kvm_mem_alias *p;
1964
1965         r = -EINVAL;
1966         /* General sanity checks */
1967         if (alias->memory_size & (PAGE_SIZE - 1))
1968                 goto out;
1969         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1970                 goto out;
1971         if (alias->slot >= KVM_ALIAS_SLOTS)
1972                 goto out;
1973         if (alias->guest_phys_addr + alias->memory_size
1974             < alias->guest_phys_addr)
1975                 goto out;
1976         if (alias->target_phys_addr + alias->memory_size
1977             < alias->target_phys_addr)
1978                 goto out;
1979
1980         down_write(&kvm->slots_lock);
1981         spin_lock(&kvm->mmu_lock);
1982
1983         p = &kvm->arch.aliases[alias->slot];
1984         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1985         p->npages = alias->memory_size >> PAGE_SHIFT;
1986         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1987
1988         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1989                 if (kvm->arch.aliases[n - 1].npages)
1990                         break;
1991         kvm->arch.naliases = n;
1992
1993         spin_unlock(&kvm->mmu_lock);
1994         kvm_mmu_zap_all(kvm);
1995
1996         up_write(&kvm->slots_lock);
1997
1998         return 0;
1999
2000 out:
2001         return r;
2002 }
2003
2004 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2005 {
2006         int r;
2007
2008         r = 0;
2009         switch (chip->chip_id) {
2010         case KVM_IRQCHIP_PIC_MASTER:
2011                 memcpy(&chip->chip.pic,
2012                         &pic_irqchip(kvm)->pics[0],
2013                         sizeof(struct kvm_pic_state));
2014                 break;
2015         case KVM_IRQCHIP_PIC_SLAVE:
2016                 memcpy(&chip->chip.pic,
2017                         &pic_irqchip(kvm)->pics[1],
2018                         sizeof(struct kvm_pic_state));
2019                 break;
2020         case KVM_IRQCHIP_IOAPIC:
2021                 memcpy(&chip->chip.ioapic,
2022                         ioapic_irqchip(kvm),
2023                         sizeof(struct kvm_ioapic_state));
2024                 break;
2025         default:
2026                 r = -EINVAL;
2027                 break;
2028         }
2029         return r;
2030 }
2031
2032 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2033 {
2034         int r;
2035
2036         r = 0;
2037         switch (chip->chip_id) {
2038         case KVM_IRQCHIP_PIC_MASTER:
2039                 spin_lock(&pic_irqchip(kvm)->lock);
2040                 memcpy(&pic_irqchip(kvm)->pics[0],
2041                         &chip->chip.pic,
2042                         sizeof(struct kvm_pic_state));
2043                 spin_unlock(&pic_irqchip(kvm)->lock);
2044                 break;
2045         case KVM_IRQCHIP_PIC_SLAVE:
2046                 spin_lock(&pic_irqchip(kvm)->lock);
2047                 memcpy(&pic_irqchip(kvm)->pics[1],
2048                         &chip->chip.pic,
2049                         sizeof(struct kvm_pic_state));
2050                 spin_unlock(&pic_irqchip(kvm)->lock);
2051                 break;
2052         case KVM_IRQCHIP_IOAPIC:
2053                 mutex_lock(&kvm->irq_lock);
2054                 memcpy(ioapic_irqchip(kvm),
2055                         &chip->chip.ioapic,
2056                         sizeof(struct kvm_ioapic_state));
2057                 mutex_unlock(&kvm->irq_lock);
2058                 break;
2059         default:
2060                 r = -EINVAL;
2061                 break;
2062         }
2063         kvm_pic_update_irq(pic_irqchip(kvm));
2064         return r;
2065 }
2066
2067 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2068 {
2069         int r = 0;
2070
2071         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2072         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2073         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2074         return r;
2075 }
2076
2077 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2078 {
2079         int r = 0;
2080
2081         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2082         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2083         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2084         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2085         return r;
2086 }
2087
2088 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2089 {
2090         int r = 0;
2091
2092         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2093         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2094                 sizeof(ps->channels));
2095         ps->flags = kvm->arch.vpit->pit_state.flags;
2096         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2097         return r;
2098 }
2099
2100 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2101 {
2102         int r = 0, start = 0;
2103         u32 prev_legacy, cur_legacy;
2104         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2105         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2106         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2107         if (!prev_legacy && cur_legacy)
2108                 start = 1;
2109         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2110                sizeof(kvm->arch.vpit->pit_state.channels));
2111         kvm->arch.vpit->pit_state.flags = ps->flags;
2112         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2113         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2114         return r;
2115 }
2116
2117 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2118                                  struct kvm_reinject_control *control)
2119 {
2120         if (!kvm->arch.vpit)
2121                 return -ENXIO;
2122         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2123         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2124         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2125         return 0;
2126 }
2127
2128 /*
2129  * Get (and clear) the dirty memory log for a memory slot.
2130  */
2131 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2132                                       struct kvm_dirty_log *log)
2133 {
2134         int r;
2135         int n;
2136         struct kvm_memory_slot *memslot;
2137         int is_dirty = 0;
2138
2139         down_write(&kvm->slots_lock);
2140
2141         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2142         if (r)
2143                 goto out;
2144
2145         /* If nothing is dirty, don't bother messing with page tables. */
2146         if (is_dirty) {
2147                 spin_lock(&kvm->mmu_lock);
2148                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2149                 spin_unlock(&kvm->mmu_lock);
2150                 kvm_flush_remote_tlbs(kvm);
2151                 memslot = &kvm->memslots[log->slot];
2152                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2153                 memset(memslot->dirty_bitmap, 0, n);
2154         }
2155         r = 0;
2156 out:
2157         up_write(&kvm->slots_lock);
2158         return r;
2159 }
2160
2161 long kvm_arch_vm_ioctl(struct file *filp,
2162                        unsigned int ioctl, unsigned long arg)
2163 {
2164         struct kvm *kvm = filp->private_data;
2165         void __user *argp = (void __user *)arg;
2166         int r = -EINVAL;
2167         /*
2168          * This union makes it completely explicit to gcc-3.x
2169          * that these two variables' stack usage should be
2170          * combined, not added together.
2171          */
2172         union {
2173                 struct kvm_pit_state ps;
2174                 struct kvm_pit_state2 ps2;
2175                 struct kvm_memory_alias alias;
2176                 struct kvm_pit_config pit_config;
2177         } u;
2178
2179         switch (ioctl) {
2180         case KVM_SET_TSS_ADDR:
2181                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2182                 if (r < 0)
2183                         goto out;
2184                 break;
2185         case KVM_SET_IDENTITY_MAP_ADDR: {
2186                 u64 ident_addr;
2187
2188                 r = -EFAULT;
2189                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2190                         goto out;
2191                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2192                 if (r < 0)
2193                         goto out;
2194                 break;
2195         }
2196         case KVM_SET_MEMORY_REGION: {
2197                 struct kvm_memory_region kvm_mem;
2198                 struct kvm_userspace_memory_region kvm_userspace_mem;
2199
2200                 r = -EFAULT;
2201                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2202                         goto out;
2203                 kvm_userspace_mem.slot = kvm_mem.slot;
2204                 kvm_userspace_mem.flags = kvm_mem.flags;
2205                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2206                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2207                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2208                 if (r)
2209                         goto out;
2210                 break;
2211         }
2212         case KVM_SET_NR_MMU_PAGES:
2213                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2214                 if (r)
2215                         goto out;
2216                 break;
2217         case KVM_GET_NR_MMU_PAGES:
2218                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2219                 break;
2220         case KVM_SET_MEMORY_ALIAS:
2221                 r = -EFAULT;
2222                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2223                         goto out;
2224                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2225                 if (r)
2226                         goto out;
2227                 break;
2228         case KVM_CREATE_IRQCHIP:
2229                 r = -ENOMEM;
2230                 kvm->arch.vpic = kvm_create_pic(kvm);
2231                 if (kvm->arch.vpic) {
2232                         r = kvm_ioapic_init(kvm);
2233                         if (r) {
2234                                 kfree(kvm->arch.vpic);
2235                                 kvm->arch.vpic = NULL;
2236                                 goto out;
2237                         }
2238                 } else
2239                         goto out;
2240                 r = kvm_setup_default_irq_routing(kvm);
2241                 if (r) {
2242                         kfree(kvm->arch.vpic);
2243                         kfree(kvm->arch.vioapic);
2244                         goto out;
2245                 }
2246                 break;
2247         case KVM_CREATE_PIT:
2248                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2249                 goto create_pit;
2250         case KVM_CREATE_PIT2:
2251                 r = -EFAULT;
2252                 if (copy_from_user(&u.pit_config, argp,
2253                                    sizeof(struct kvm_pit_config)))
2254                         goto out;
2255         create_pit:
2256                 down_write(&kvm->slots_lock);
2257                 r = -EEXIST;
2258                 if (kvm->arch.vpit)
2259                         goto create_pit_unlock;
2260                 r = -ENOMEM;
2261                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2262                 if (kvm->arch.vpit)
2263                         r = 0;
2264         create_pit_unlock:
2265                 up_write(&kvm->slots_lock);
2266                 break;
2267         case KVM_IRQ_LINE_STATUS:
2268         case KVM_IRQ_LINE: {
2269                 struct kvm_irq_level irq_event;
2270
2271                 r = -EFAULT;
2272                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2273                         goto out;
2274                 if (irqchip_in_kernel(kvm)) {
2275                         __s32 status;
2276                         mutex_lock(&kvm->irq_lock);
2277                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2278                                         irq_event.irq, irq_event.level);
2279                         mutex_unlock(&kvm->irq_lock);
2280                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2281                                 irq_event.status = status;
2282                                 if (copy_to_user(argp, &irq_event,
2283                                                         sizeof irq_event))
2284                                         goto out;
2285                         }
2286                         r = 0;
2287                 }
2288                 break;
2289         }
2290         case KVM_GET_IRQCHIP: {
2291                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2292                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2293
2294                 r = -ENOMEM;
2295                 if (!chip)
2296                         goto out;
2297                 r = -EFAULT;
2298                 if (copy_from_user(chip, argp, sizeof *chip))
2299                         goto get_irqchip_out;
2300                 r = -ENXIO;
2301                 if (!irqchip_in_kernel(kvm))
2302                         goto get_irqchip_out;
2303                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2304                 if (r)
2305                         goto get_irqchip_out;
2306                 r = -EFAULT;
2307                 if (copy_to_user(argp, chip, sizeof *chip))
2308                         goto get_irqchip_out;
2309                 r = 0;
2310         get_irqchip_out:
2311                 kfree(chip);
2312                 if (r)
2313                         goto out;
2314                 break;
2315         }
2316         case KVM_SET_IRQCHIP: {
2317                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2318                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2319
2320                 r = -ENOMEM;
2321                 if (!chip)
2322                         goto out;
2323                 r = -EFAULT;
2324                 if (copy_from_user(chip, argp, sizeof *chip))
2325                         goto set_irqchip_out;
2326                 r = -ENXIO;
2327                 if (!irqchip_in_kernel(kvm))
2328                         goto set_irqchip_out;
2329                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2330                 if (r)
2331                         goto set_irqchip_out;
2332                 r = 0;
2333         set_irqchip_out:
2334                 kfree(chip);
2335                 if (r)
2336                         goto out;
2337                 break;
2338         }
2339         case KVM_GET_PIT: {
2340                 r = -EFAULT;
2341                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2342                         goto out;
2343                 r = -ENXIO;
2344                 if (!kvm->arch.vpit)
2345                         goto out;
2346                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2347                 if (r)
2348                         goto out;
2349                 r = -EFAULT;
2350                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2351                         goto out;
2352                 r = 0;
2353                 break;
2354         }
2355         case KVM_SET_PIT: {
2356                 r = -EFAULT;
2357                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2358                         goto out;
2359                 r = -ENXIO;
2360                 if (!kvm->arch.vpit)
2361                         goto out;
2362                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2363                 if (r)
2364                         goto out;
2365                 r = 0;
2366                 break;
2367         }
2368         case KVM_GET_PIT2: {
2369                 r = -ENXIO;
2370                 if (!kvm->arch.vpit)
2371                         goto out;
2372                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2373                 if (r)
2374                         goto out;
2375                 r = -EFAULT;
2376                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2377                         goto out;
2378                 r = 0;
2379                 break;
2380         }
2381         case KVM_SET_PIT2: {
2382                 r = -EFAULT;
2383                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2384                         goto out;
2385                 r = -ENXIO;
2386                 if (!kvm->arch.vpit)
2387                         goto out;
2388                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2389                 if (r)
2390                         goto out;
2391                 r = 0;
2392                 break;
2393         }
2394         case KVM_REINJECT_CONTROL: {
2395                 struct kvm_reinject_control control;
2396                 r =  -EFAULT;
2397                 if (copy_from_user(&control, argp, sizeof(control)))
2398                         goto out;
2399                 r = kvm_vm_ioctl_reinject(kvm, &control);
2400                 if (r)
2401                         goto out;
2402                 r = 0;
2403                 break;
2404         }
2405         default:
2406                 ;
2407         }
2408 out:
2409         return r;
2410 }
2411
2412 static void kvm_init_msr_list(void)
2413 {
2414         u32 dummy[2];
2415         unsigned i, j;
2416
2417         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2418                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2419                         continue;
2420                 if (j < i)
2421                         msrs_to_save[j] = msrs_to_save[i];
2422                 j++;
2423         }
2424         num_msrs_to_save = j;
2425 }
2426
2427 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2428                            const void *v)
2429 {
2430         if (vcpu->arch.apic &&
2431             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2432                 return 0;
2433
2434         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2435 }
2436
2437 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2438 {
2439         if (vcpu->arch.apic &&
2440             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2441                 return 0;
2442
2443         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2444 }
2445
2446 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2447                                struct kvm_vcpu *vcpu)
2448 {
2449         void *data = val;
2450         int r = X86EMUL_CONTINUE;
2451
2452         while (bytes) {
2453                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2454                 unsigned offset = addr & (PAGE_SIZE-1);
2455                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2456                 int ret;
2457
2458                 if (gpa == UNMAPPED_GVA) {
2459                         r = X86EMUL_PROPAGATE_FAULT;
2460                         goto out;
2461                 }
2462                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2463                 if (ret < 0) {
2464                         r = X86EMUL_UNHANDLEABLE;
2465                         goto out;
2466                 }
2467
2468                 bytes -= toread;
2469                 data += toread;
2470                 addr += toread;
2471         }
2472 out:
2473         return r;
2474 }
2475
2476 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2477                                 struct kvm_vcpu *vcpu)
2478 {
2479         void *data = val;
2480         int r = X86EMUL_CONTINUE;
2481
2482         while (bytes) {
2483                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2484                 unsigned offset = addr & (PAGE_SIZE-1);
2485                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2486                 int ret;
2487
2488                 if (gpa == UNMAPPED_GVA) {
2489                         r = X86EMUL_PROPAGATE_FAULT;
2490                         goto out;
2491                 }
2492                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2493                 if (ret < 0) {
2494                         r = X86EMUL_UNHANDLEABLE;
2495                         goto out;
2496                 }
2497
2498                 bytes -= towrite;
2499                 data += towrite;
2500                 addr += towrite;
2501         }
2502 out:
2503         return r;
2504 }
2505
2506
2507 static int emulator_read_emulated(unsigned long addr,
2508                                   void *val,
2509                                   unsigned int bytes,
2510                                   struct kvm_vcpu *vcpu)
2511 {
2512         gpa_t                 gpa;
2513
2514         if (vcpu->mmio_read_completed) {
2515                 memcpy(val, vcpu->mmio_data, bytes);
2516                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2517                                vcpu->mmio_phys_addr, *(u64 *)val);
2518                 vcpu->mmio_read_completed = 0;
2519                 return X86EMUL_CONTINUE;
2520         }
2521
2522         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2523
2524         /* For APIC access vmexit */
2525         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2526                 goto mmio;
2527
2528         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2529                                 == X86EMUL_CONTINUE)
2530                 return X86EMUL_CONTINUE;
2531         if (gpa == UNMAPPED_GVA)
2532                 return X86EMUL_PROPAGATE_FAULT;
2533
2534 mmio:
2535         /*
2536          * Is this MMIO handled locally?
2537          */
2538         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2539                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2540                 return X86EMUL_CONTINUE;
2541         }
2542
2543         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2544
2545         vcpu->mmio_needed = 1;
2546         vcpu->mmio_phys_addr = gpa;
2547         vcpu->mmio_size = bytes;
2548         vcpu->mmio_is_write = 0;
2549
2550         return X86EMUL_UNHANDLEABLE;
2551 }
2552
2553 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2554                           const void *val, int bytes)
2555 {
2556         int ret;
2557
2558         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2559         if (ret < 0)
2560                 return 0;
2561         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2562         return 1;
2563 }
2564
2565 static int emulator_write_emulated_onepage(unsigned long addr,
2566                                            const void *val,
2567                                            unsigned int bytes,
2568                                            struct kvm_vcpu *vcpu)
2569 {
2570         gpa_t                 gpa;
2571
2572         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2573
2574         if (gpa == UNMAPPED_GVA) {
2575                 kvm_inject_page_fault(vcpu, addr, 2);
2576                 return X86EMUL_PROPAGATE_FAULT;
2577         }
2578
2579         /* For APIC access vmexit */
2580         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2581                 goto mmio;
2582
2583         if (emulator_write_phys(vcpu, gpa, val, bytes))
2584                 return X86EMUL_CONTINUE;
2585
2586 mmio:
2587         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2588         /*
2589          * Is this MMIO handled locally?
2590          */
2591         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2592                 return X86EMUL_CONTINUE;
2593
2594         vcpu->mmio_needed = 1;
2595         vcpu->mmio_phys_addr = gpa;
2596         vcpu->mmio_size = bytes;
2597         vcpu->mmio_is_write = 1;
2598         memcpy(vcpu->mmio_data, val, bytes);
2599
2600         return X86EMUL_CONTINUE;
2601 }
2602
2603 int emulator_write_emulated(unsigned long addr,
2604                                    const void *val,
2605                                    unsigned int bytes,
2606                                    struct kvm_vcpu *vcpu)
2607 {
2608         /* Crossing a page boundary? */
2609         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2610                 int rc, now;
2611
2612                 now = -addr & ~PAGE_MASK;
2613                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2614                 if (rc != X86EMUL_CONTINUE)
2615                         return rc;
2616                 addr += now;
2617                 val += now;
2618                 bytes -= now;
2619         }
2620         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2621 }
2622 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2623
2624 static int emulator_cmpxchg_emulated(unsigned long addr,
2625                                      const void *old,
2626                                      const void *new,
2627                                      unsigned int bytes,
2628                                      struct kvm_vcpu *vcpu)
2629 {
2630         static int reported;
2631
2632         if (!reported) {
2633                 reported = 1;
2634                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2635         }
2636 #ifndef CONFIG_X86_64
2637         /* guests cmpxchg8b have to be emulated atomically */
2638         if (bytes == 8) {
2639                 gpa_t gpa;
2640                 struct page *page;
2641                 char *kaddr;
2642                 u64 val;
2643
2644                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2645
2646                 if (gpa == UNMAPPED_GVA ||
2647                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2648                         goto emul_write;
2649
2650                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2651                         goto emul_write;
2652
2653                 val = *(u64 *)new;
2654
2655                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2656
2657                 kaddr = kmap_atomic(page, KM_USER0);
2658                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2659                 kunmap_atomic(kaddr, KM_USER0);
2660                 kvm_release_page_dirty(page);
2661         }
2662 emul_write:
2663 #endif
2664
2665         return emulator_write_emulated(addr, new, bytes, vcpu);
2666 }
2667
2668 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2669 {
2670         return kvm_x86_ops->get_segment_base(vcpu, seg);
2671 }
2672
2673 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2674 {
2675         kvm_mmu_invlpg(vcpu, address);
2676         return X86EMUL_CONTINUE;
2677 }
2678
2679 int emulate_clts(struct kvm_vcpu *vcpu)
2680 {
2681         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2682         return X86EMUL_CONTINUE;
2683 }
2684
2685 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2686 {
2687         struct kvm_vcpu *vcpu = ctxt->vcpu;
2688
2689         switch (dr) {
2690         case 0 ... 3:
2691                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2692                 return X86EMUL_CONTINUE;
2693         default:
2694                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2695                 return X86EMUL_UNHANDLEABLE;
2696         }
2697 }
2698
2699 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2700 {
2701         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2702         int exception;
2703
2704         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2705         if (exception) {
2706                 /* FIXME: better handling */
2707                 return X86EMUL_UNHANDLEABLE;
2708         }
2709         return X86EMUL_CONTINUE;
2710 }
2711
2712 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2713 {
2714         u8 opcodes[4];
2715         unsigned long rip = kvm_rip_read(vcpu);
2716         unsigned long rip_linear;
2717
2718         if (!printk_ratelimit())
2719                 return;
2720
2721         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2722
2723         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2724
2725         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2726                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2727 }
2728 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2729
2730 static struct x86_emulate_ops emulate_ops = {
2731         .read_std            = kvm_read_guest_virt,
2732         .read_emulated       = emulator_read_emulated,
2733         .write_emulated      = emulator_write_emulated,
2734         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2735 };
2736
2737 static void cache_all_regs(struct kvm_vcpu *vcpu)
2738 {
2739         kvm_register_read(vcpu, VCPU_REGS_RAX);
2740         kvm_register_read(vcpu, VCPU_REGS_RSP);
2741         kvm_register_read(vcpu, VCPU_REGS_RIP);
2742         vcpu->arch.regs_dirty = ~0;
2743 }
2744
2745 int emulate_instruction(struct kvm_vcpu *vcpu,
2746                         struct kvm_run *run,
2747                         unsigned long cr2,
2748                         u16 error_code,
2749                         int emulation_type)
2750 {
2751         int r, shadow_mask;
2752         struct decode_cache *c;
2753
2754         kvm_clear_exception_queue(vcpu);
2755         vcpu->arch.mmio_fault_cr2 = cr2;
2756         /*
2757          * TODO: fix x86_emulate.c to use guest_read/write_register
2758          * instead of direct ->regs accesses, can save hundred cycles
2759          * on Intel for instructions that don't read/change RSP, for
2760          * for example.
2761          */
2762         cache_all_regs(vcpu);
2763
2764         vcpu->mmio_is_write = 0;
2765         vcpu->arch.pio.string = 0;
2766
2767         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2768                 int cs_db, cs_l;
2769                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2770
2771                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2772                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2773                 vcpu->arch.emulate_ctxt.mode =
2774                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2775                         ? X86EMUL_MODE_REAL : cs_l
2776                         ? X86EMUL_MODE_PROT64 : cs_db
2777                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2778
2779                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2780
2781                 /* Only allow emulation of specific instructions on #UD
2782                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2783                 c = &vcpu->arch.emulate_ctxt.decode;
2784                 if (emulation_type & EMULTYPE_TRAP_UD) {
2785                         if (!c->twobyte)
2786                                 return EMULATE_FAIL;
2787                         switch (c->b) {
2788                         case 0x01: /* VMMCALL */
2789                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2790                                         return EMULATE_FAIL;
2791                                 break;
2792                         case 0x34: /* sysenter */
2793                         case 0x35: /* sysexit */
2794                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2795                                         return EMULATE_FAIL;
2796                                 break;
2797                         case 0x05: /* syscall */
2798                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2799                                         return EMULATE_FAIL;
2800                                 break;
2801                         default:
2802                                 return EMULATE_FAIL;
2803                         }
2804
2805                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2806                                 return EMULATE_FAIL;
2807                 }
2808
2809                 ++vcpu->stat.insn_emulation;
2810                 if (r)  {
2811                         ++vcpu->stat.insn_emulation_fail;
2812                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2813                                 return EMULATE_DONE;
2814                         return EMULATE_FAIL;
2815                 }
2816         }
2817
2818         if (emulation_type & EMULTYPE_SKIP) {
2819                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2820                 return EMULATE_DONE;
2821         }
2822
2823         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2824         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2825
2826         if (r == 0)
2827                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2828
2829         if (vcpu->arch.pio.string)
2830                 return EMULATE_DO_MMIO;
2831
2832         if ((r || vcpu->mmio_is_write) && run) {
2833                 run->exit_reason = KVM_EXIT_MMIO;
2834                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2835                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2836                 run->mmio.len = vcpu->mmio_size;
2837                 run->mmio.is_write = vcpu->mmio_is_write;
2838         }
2839
2840         if (r) {
2841                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2842                         return EMULATE_DONE;
2843                 if (!vcpu->mmio_needed) {
2844                         kvm_report_emulation_failure(vcpu, "mmio");
2845                         return EMULATE_FAIL;
2846                 }
2847                 return EMULATE_DO_MMIO;
2848         }
2849
2850         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2851
2852         if (vcpu->mmio_is_write) {
2853                 vcpu->mmio_needed = 0;
2854                 return EMULATE_DO_MMIO;
2855         }
2856
2857         return EMULATE_DONE;
2858 }
2859 EXPORT_SYMBOL_GPL(emulate_instruction);
2860
2861 static int pio_copy_data(struct kvm_vcpu *vcpu)
2862 {
2863         void *p = vcpu->arch.pio_data;
2864         gva_t q = vcpu->arch.pio.guest_gva;
2865         unsigned bytes;
2866         int ret;
2867
2868         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2869         if (vcpu->arch.pio.in)
2870                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2871         else
2872                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2873         return ret;
2874 }
2875
2876 int complete_pio(struct kvm_vcpu *vcpu)
2877 {
2878         struct kvm_pio_request *io = &vcpu->arch.pio;
2879         long delta;
2880         int r;
2881         unsigned long val;
2882
2883         if (!io->string) {
2884                 if (io->in) {
2885                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2886                         memcpy(&val, vcpu->arch.pio_data, io->size);
2887                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2888                 }
2889         } else {
2890                 if (io->in) {
2891                         r = pio_copy_data(vcpu);
2892                         if (r)
2893                                 return r;
2894                 }
2895
2896                 delta = 1;
2897                 if (io->rep) {
2898                         delta *= io->cur_count;
2899                         /*
2900                          * The size of the register should really depend on
2901                          * current address size.
2902                          */
2903                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2904                         val -= delta;
2905                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2906                 }
2907                 if (io->down)
2908                         delta = -delta;
2909                 delta *= io->size;
2910                 if (io->in) {
2911                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2912                         val += delta;
2913                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2914                 } else {
2915                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2916                         val += delta;
2917                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2918                 }
2919         }
2920
2921         io->count -= io->cur_count;
2922         io->cur_count = 0;
2923
2924         return 0;
2925 }
2926
2927 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2928 {
2929         /* TODO: String I/O for in kernel device */
2930         int r;
2931
2932         if (vcpu->arch.pio.in)
2933                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2934                                     vcpu->arch.pio.size, pd);
2935         else
2936                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2937                                      vcpu->arch.pio.size, pd);
2938         return r;
2939 }
2940
2941 static int pio_string_write(struct kvm_vcpu *vcpu)
2942 {
2943         struct kvm_pio_request *io = &vcpu->arch.pio;
2944         void *pd = vcpu->arch.pio_data;
2945         int i, r = 0;
2946
2947         for (i = 0; i < io->cur_count; i++) {
2948                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2949                                      io->port, io->size, pd)) {
2950                         r = -EOPNOTSUPP;
2951                         break;
2952                 }
2953                 pd += io->size;
2954         }
2955         return r;
2956 }
2957
2958 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2959                   int size, unsigned port)
2960 {
2961         unsigned long val;
2962
2963         vcpu->run->exit_reason = KVM_EXIT_IO;
2964         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2965         vcpu->run->io.size = vcpu->arch.pio.size = size;
2966         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2967         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2968         vcpu->run->io.port = vcpu->arch.pio.port = port;
2969         vcpu->arch.pio.in = in;
2970         vcpu->arch.pio.string = 0;
2971         vcpu->arch.pio.down = 0;
2972         vcpu->arch.pio.rep = 0;
2973
2974         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2975                       size, 1);
2976
2977         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2978         memcpy(vcpu->arch.pio_data, &val, 4);
2979
2980         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2981                 complete_pio(vcpu);
2982                 return 1;
2983         }
2984         return 0;
2985 }
2986 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2987
2988 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2989                   int size, unsigned long count, int down,
2990                   gva_t address, int rep, unsigned port)
2991 {
2992         unsigned now, in_page;
2993         int ret = 0;
2994
2995         vcpu->run->exit_reason = KVM_EXIT_IO;
2996         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2997         vcpu->run->io.size = vcpu->arch.pio.size = size;
2998         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2999         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3000         vcpu->run->io.port = vcpu->arch.pio.port = port;
3001         vcpu->arch.pio.in = in;
3002         vcpu->arch.pio.string = 1;
3003         vcpu->arch.pio.down = down;
3004         vcpu->arch.pio.rep = rep;
3005
3006         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3007                       size, count);
3008
3009         if (!count) {
3010                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3011                 return 1;
3012         }
3013
3014         if (!down)
3015                 in_page = PAGE_SIZE - offset_in_page(address);
3016         else
3017                 in_page = offset_in_page(address) + size;
3018         now = min(count, (unsigned long)in_page / size);
3019         if (!now)
3020                 now = 1;
3021         if (down) {
3022                 /*
3023                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3024                  */
3025                 pr_unimpl(vcpu, "guest string pio down\n");
3026                 kvm_inject_gp(vcpu, 0);
3027                 return 1;
3028         }
3029         vcpu->run->io.count = now;
3030         vcpu->arch.pio.cur_count = now;
3031
3032         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3033                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3034
3035         vcpu->arch.pio.guest_gva = address;
3036
3037         if (!vcpu->arch.pio.in) {
3038                 /* string PIO write */
3039                 ret = pio_copy_data(vcpu);
3040                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3041                         kvm_inject_gp(vcpu, 0);
3042                         return 1;
3043                 }
3044                 if (ret == 0 && !pio_string_write(vcpu)) {
3045                         complete_pio(vcpu);
3046                         if (vcpu->arch.pio.count == 0)
3047                                 ret = 1;
3048                 }
3049         }
3050         /* no string PIO read support yet */
3051
3052         return ret;
3053 }
3054 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3055
3056 static void bounce_off(void *info)
3057 {
3058         /* nothing */
3059 }
3060
3061 static unsigned int  ref_freq;
3062 static unsigned long tsc_khz_ref;
3063
3064 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3065                                      void *data)
3066 {
3067         struct cpufreq_freqs *freq = data;
3068         struct kvm *kvm;
3069         struct kvm_vcpu *vcpu;
3070         int i, send_ipi = 0;
3071
3072         if (!ref_freq)
3073                 ref_freq = freq->old;
3074
3075         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3076                 return 0;
3077         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3078                 return 0;
3079         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3080
3081         spin_lock(&kvm_lock);
3082         list_for_each_entry(kvm, &vm_list, vm_list) {
3083                 kvm_for_each_vcpu(i, vcpu, kvm) {
3084                         if (vcpu->cpu != freq->cpu)
3085                                 continue;
3086                         if (!kvm_request_guest_time_update(vcpu))
3087                                 continue;
3088                         if (vcpu->cpu != smp_processor_id())
3089                                 send_ipi++;
3090                 }
3091         }
3092         spin_unlock(&kvm_lock);
3093
3094         if (freq->old < freq->new && send_ipi) {
3095                 /*
3096                  * We upscale the frequency.  Must make the guest
3097                  * doesn't see old kvmclock values while running with
3098                  * the new frequency, otherwise we risk the guest sees
3099                  * time go backwards.
3100                  *
3101                  * In case we update the frequency for another cpu
3102                  * (which might be in guest context) send an interrupt
3103                  * to kick the cpu out of guest context.  Next time
3104                  * guest context is entered kvmclock will be updated,
3105                  * so the guest will not see stale values.
3106                  */
3107                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3108         }
3109         return 0;
3110 }
3111
3112 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3113         .notifier_call  = kvmclock_cpufreq_notifier
3114 };
3115
3116 int kvm_arch_init(void *opaque)
3117 {
3118         int r, cpu;
3119         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3120
3121         if (kvm_x86_ops) {
3122                 printk(KERN_ERR "kvm: already loaded the other module\n");
3123                 r = -EEXIST;
3124                 goto out;
3125         }
3126
3127         if (!ops->cpu_has_kvm_support()) {
3128                 printk(KERN_ERR "kvm: no hardware support\n");
3129                 r = -EOPNOTSUPP;
3130                 goto out;
3131         }
3132         if (ops->disabled_by_bios()) {
3133                 printk(KERN_ERR "kvm: disabled by bios\n");
3134                 r = -EOPNOTSUPP;
3135                 goto out;
3136         }
3137
3138         r = kvm_mmu_module_init();
3139         if (r)
3140                 goto out;
3141
3142         kvm_init_msr_list();
3143
3144         kvm_x86_ops = ops;
3145         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3146         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3147         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3148                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3149
3150         for_each_possible_cpu(cpu)
3151                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3152         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3153                 tsc_khz_ref = tsc_khz;
3154                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3155                                           CPUFREQ_TRANSITION_NOTIFIER);
3156         }
3157
3158         return 0;
3159
3160 out:
3161         return r;
3162 }
3163
3164 void kvm_arch_exit(void)
3165 {
3166         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3167                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3168                                             CPUFREQ_TRANSITION_NOTIFIER);
3169         kvm_x86_ops = NULL;
3170         kvm_mmu_module_exit();
3171 }
3172
3173 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3174 {
3175         ++vcpu->stat.halt_exits;
3176         if (irqchip_in_kernel(vcpu->kvm)) {
3177                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3178                 return 1;
3179         } else {
3180                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3181                 return 0;
3182         }
3183 }
3184 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3185
3186 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3187                            unsigned long a1)
3188 {
3189         if (is_long_mode(vcpu))
3190                 return a0;
3191         else
3192                 return a0 | ((gpa_t)a1 << 32);
3193 }
3194
3195 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3196 {
3197         unsigned long nr, a0, a1, a2, a3, ret;
3198         int r = 1;
3199
3200         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3201         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3202         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3203         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3204         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3205
3206         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3207
3208         if (!is_long_mode(vcpu)) {
3209                 nr &= 0xFFFFFFFF;
3210                 a0 &= 0xFFFFFFFF;
3211                 a1 &= 0xFFFFFFFF;
3212                 a2 &= 0xFFFFFFFF;
3213                 a3 &= 0xFFFFFFFF;
3214         }
3215
3216         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3217                 ret = -KVM_EPERM;
3218                 goto out;
3219         }
3220
3221         switch (nr) {
3222         case KVM_HC_VAPIC_POLL_IRQ:
3223                 ret = 0;
3224                 break;
3225         case KVM_HC_MMU_OP:
3226                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3227                 break;
3228         default:
3229                 ret = -KVM_ENOSYS;
3230                 break;
3231         }
3232 out:
3233         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3234         ++vcpu->stat.hypercalls;
3235         return r;
3236 }
3237 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3238
3239 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3240 {
3241         char instruction[3];
3242         int ret = 0;
3243         unsigned long rip = kvm_rip_read(vcpu);
3244
3245
3246         /*
3247          * Blow out the MMU to ensure that no other VCPU has an active mapping
3248          * to ensure that the updated hypercall appears atomically across all
3249          * VCPUs.
3250          */
3251         kvm_mmu_zap_all(vcpu->kvm);
3252
3253         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3254         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3255             != X86EMUL_CONTINUE)
3256                 ret = -EFAULT;
3257
3258         return ret;
3259 }
3260
3261 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3262 {
3263         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3264 }
3265
3266 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3267 {
3268         struct descriptor_table dt = { limit, base };
3269
3270         kvm_x86_ops->set_gdt(vcpu, &dt);
3271 }
3272
3273 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3274 {
3275         struct descriptor_table dt = { limit, base };
3276
3277         kvm_x86_ops->set_idt(vcpu, &dt);
3278 }
3279
3280 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3281                    unsigned long *rflags)
3282 {
3283         kvm_lmsw(vcpu, msw);
3284         *rflags = kvm_x86_ops->get_rflags(vcpu);
3285 }
3286
3287 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3288 {
3289         unsigned long value;
3290
3291         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3292         switch (cr) {
3293         case 0:
3294                 value = vcpu->arch.cr0;
3295                 break;
3296         case 2:
3297                 value = vcpu->arch.cr2;
3298                 break;
3299         case 3:
3300                 value = vcpu->arch.cr3;
3301                 break;
3302         case 4:
3303                 value = vcpu->arch.cr4;
3304                 break;
3305         case 8:
3306                 value = kvm_get_cr8(vcpu);
3307                 break;
3308         default:
3309                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3310                 return 0;
3311         }
3312
3313         return value;
3314 }
3315
3316 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3317                      unsigned long *rflags)
3318 {
3319         switch (cr) {
3320         case 0:
3321                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3322                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3323                 break;
3324         case 2:
3325                 vcpu->arch.cr2 = val;
3326                 break;
3327         case 3:
3328                 kvm_set_cr3(vcpu, val);
3329                 break;
3330         case 4:
3331                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3332                 break;
3333         case 8:
3334                 kvm_set_cr8(vcpu, val & 0xfUL);
3335                 break;
3336         default:
3337                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3338         }
3339 }
3340
3341 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3342 {
3343         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3344         int j, nent = vcpu->arch.cpuid_nent;
3345
3346         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3347         /* when no next entry is found, the current entry[i] is reselected */
3348         for (j = i + 1; ; j = (j + 1) % nent) {
3349                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3350                 if (ej->function == e->function) {
3351                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3352                         return j;
3353                 }
3354         }
3355         return 0; /* silence gcc, even though control never reaches here */
3356 }
3357
3358 /* find an entry with matching function, matching index (if needed), and that
3359  * should be read next (if it's stateful) */
3360 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3361         u32 function, u32 index)
3362 {
3363         if (e->function != function)
3364                 return 0;
3365         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3366                 return 0;
3367         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3368             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3369                 return 0;
3370         return 1;
3371 }
3372
3373 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3374                                               u32 function, u32 index)
3375 {
3376         int i;
3377         struct kvm_cpuid_entry2 *best = NULL;
3378
3379         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3380                 struct kvm_cpuid_entry2 *e;
3381
3382                 e = &vcpu->arch.cpuid_entries[i];
3383                 if (is_matching_cpuid_entry(e, function, index)) {
3384                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3385                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3386                         best = e;
3387                         break;
3388                 }
3389                 /*
3390                  * Both basic or both extended?
3391                  */
3392                 if (((e->function ^ function) & 0x80000000) == 0)
3393                         if (!best || e->function > best->function)
3394                                 best = e;
3395         }
3396         return best;
3397 }
3398
3399 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3400 {
3401         struct kvm_cpuid_entry2 *best;
3402
3403         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3404         if (best)
3405                 return best->eax & 0xff;
3406         return 36;
3407 }
3408
3409 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3410 {
3411         u32 function, index;
3412         struct kvm_cpuid_entry2 *best;
3413
3414         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3415         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3416         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3417         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3418         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3419         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3420         best = kvm_find_cpuid_entry(vcpu, function, index);
3421         if (best) {
3422                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3423                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3424                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3425                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3426         }
3427         kvm_x86_ops->skip_emulated_instruction(vcpu);
3428         trace_kvm_cpuid(function,
3429                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3430                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3431                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3432                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3433 }
3434 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3435
3436 /*
3437  * Check if userspace requested an interrupt window, and that the
3438  * interrupt window is open.
3439  *
3440  * No need to exit to userspace if we already have an interrupt queued.
3441  */
3442 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3443                                           struct kvm_run *kvm_run)
3444 {
3445         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3446                 kvm_run->request_interrupt_window &&
3447                 kvm_arch_interrupt_allowed(vcpu));
3448 }
3449
3450 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3451                               struct kvm_run *kvm_run)
3452 {
3453         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3454         kvm_run->cr8 = kvm_get_cr8(vcpu);
3455         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3456         if (irqchip_in_kernel(vcpu->kvm))
3457                 kvm_run->ready_for_interrupt_injection = 1;
3458         else
3459                 kvm_run->ready_for_interrupt_injection =
3460                         kvm_arch_interrupt_allowed(vcpu) &&
3461                         !kvm_cpu_has_interrupt(vcpu) &&
3462                         !kvm_event_needs_reinjection(vcpu);
3463 }
3464
3465 static void vapic_enter(struct kvm_vcpu *vcpu)
3466 {
3467         struct kvm_lapic *apic = vcpu->arch.apic;
3468         struct page *page;
3469
3470         if (!apic || !apic->vapic_addr)
3471                 return;
3472
3473         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3474
3475         vcpu->arch.apic->vapic_page = page;
3476 }
3477
3478 static void vapic_exit(struct kvm_vcpu *vcpu)
3479 {
3480         struct kvm_lapic *apic = vcpu->arch.apic;
3481
3482         if (!apic || !apic->vapic_addr)
3483                 return;
3484
3485         down_read(&vcpu->kvm->slots_lock);
3486         kvm_release_page_dirty(apic->vapic_page);
3487         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3488         up_read(&vcpu->kvm->slots_lock);
3489 }
3490
3491 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3492 {
3493         int max_irr, tpr;
3494
3495         if (!kvm_x86_ops->update_cr8_intercept)
3496                 return;
3497
3498         if (!vcpu->arch.apic->vapic_addr)
3499                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3500         else
3501                 max_irr = -1;
3502
3503         if (max_irr != -1)
3504                 max_irr >>= 4;
3505
3506         tpr = kvm_lapic_get_cr8(vcpu);
3507
3508         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3509 }
3510
3511 static void inject_pending_event(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3512 {
3513         /* try to reinject previous events if any */
3514         if (vcpu->arch.exception.pending) {
3515                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3516                                           vcpu->arch.exception.has_error_code,
3517                                           vcpu->arch.exception.error_code);
3518                 return;
3519         }
3520
3521         if (vcpu->arch.nmi_injected) {
3522                 kvm_x86_ops->set_nmi(vcpu);
3523                 return;
3524         }
3525
3526         if (vcpu->arch.interrupt.pending) {
3527                 kvm_x86_ops->set_irq(vcpu);
3528                 return;
3529         }
3530
3531         /* try to inject new event if pending */
3532         if (vcpu->arch.nmi_pending) {
3533                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3534                         vcpu->arch.nmi_pending = false;
3535                         vcpu->arch.nmi_injected = true;
3536                         kvm_x86_ops->set_nmi(vcpu);
3537                 }
3538         } else if (kvm_cpu_has_interrupt(vcpu)) {
3539                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3540                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3541                                             false);
3542                         kvm_x86_ops->set_irq(vcpu);
3543                 }
3544         }
3545 }
3546
3547 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3548 {
3549         int r;
3550         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3551                 kvm_run->request_interrupt_window;
3552
3553         if (vcpu->requests)
3554                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3555                         kvm_mmu_unload(vcpu);
3556
3557         r = kvm_mmu_reload(vcpu);
3558         if (unlikely(r))
3559                 goto out;
3560
3561         if (vcpu->requests) {
3562                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3563                         __kvm_migrate_timers(vcpu);
3564                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3565                         kvm_write_guest_time(vcpu);
3566                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3567                         kvm_mmu_sync_roots(vcpu);
3568                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3569                         kvm_x86_ops->tlb_flush(vcpu);
3570                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3571                                        &vcpu->requests)) {
3572                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3573                         r = 0;
3574                         goto out;
3575                 }
3576                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3577                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3578                         r = 0;
3579                         goto out;
3580                 }
3581         }
3582
3583         preempt_disable();
3584
3585         kvm_x86_ops->prepare_guest_switch(vcpu);
3586         kvm_load_guest_fpu(vcpu);
3587
3588         local_irq_disable();
3589
3590         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3591         smp_mb__after_clear_bit();
3592
3593         if (vcpu->requests || need_resched() || signal_pending(current)) {
3594                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3595                 local_irq_enable();
3596                 preempt_enable();
3597                 r = 1;
3598                 goto out;
3599         }
3600
3601         inject_pending_event(vcpu, kvm_run);
3602
3603         /* enable NMI/IRQ window open exits if needed */
3604         if (vcpu->arch.nmi_pending)
3605                 kvm_x86_ops->enable_nmi_window(vcpu);
3606         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3607                 kvm_x86_ops->enable_irq_window(vcpu);
3608
3609         if (kvm_lapic_enabled(vcpu)) {
3610                 update_cr8_intercept(vcpu);
3611                 kvm_lapic_sync_to_vapic(vcpu);
3612         }
3613
3614         up_read(&vcpu->kvm->slots_lock);
3615
3616         kvm_guest_enter();
3617
3618         get_debugreg(vcpu->arch.host_dr6, 6);
3619         get_debugreg(vcpu->arch.host_dr7, 7);
3620         if (unlikely(vcpu->arch.switch_db_regs)) {
3621                 get_debugreg(vcpu->arch.host_db[0], 0);
3622                 get_debugreg(vcpu->arch.host_db[1], 1);
3623                 get_debugreg(vcpu->arch.host_db[2], 2);
3624                 get_debugreg(vcpu->arch.host_db[3], 3);
3625
3626                 set_debugreg(0, 7);
3627                 set_debugreg(vcpu->arch.eff_db[0], 0);
3628                 set_debugreg(vcpu->arch.eff_db[1], 1);
3629                 set_debugreg(vcpu->arch.eff_db[2], 2);
3630                 set_debugreg(vcpu->arch.eff_db[3], 3);
3631         }
3632
3633         trace_kvm_entry(vcpu->vcpu_id);
3634         kvm_x86_ops->run(vcpu, kvm_run);
3635
3636         if (unlikely(vcpu->arch.switch_db_regs)) {
3637                 set_debugreg(0, 7);
3638                 set_debugreg(vcpu->arch.host_db[0], 0);
3639                 set_debugreg(vcpu->arch.host_db[1], 1);
3640                 set_debugreg(vcpu->arch.host_db[2], 2);
3641                 set_debugreg(vcpu->arch.host_db[3], 3);
3642         }
3643         set_debugreg(vcpu->arch.host_dr6, 6);
3644         set_debugreg(vcpu->arch.host_dr7, 7);
3645
3646         set_bit(KVM_REQ_KICK, &vcpu->requests);
3647         local_irq_enable();
3648
3649         ++vcpu->stat.exits;
3650
3651         /*
3652          * We must have an instruction between local_irq_enable() and
3653          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3654          * the interrupt shadow.  The stat.exits increment will do nicely.
3655          * But we need to prevent reordering, hence this barrier():
3656          */
3657         barrier();
3658
3659         kvm_guest_exit();
3660
3661         preempt_enable();
3662
3663         down_read(&vcpu->kvm->slots_lock);
3664
3665         /*
3666          * Profile KVM exit RIPs:
3667          */
3668         if (unlikely(prof_on == KVM_PROFILING)) {
3669                 unsigned long rip = kvm_rip_read(vcpu);
3670                 profile_hit(KVM_PROFILING, (void *)rip);
3671         }
3672
3673
3674         kvm_lapic_sync_from_vapic(vcpu);
3675
3676         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3677 out:
3678         return r;
3679 }
3680
3681
3682 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3683 {
3684         int r;
3685
3686         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3687                 pr_debug("vcpu %d received sipi with vector # %x\n",
3688                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3689                 kvm_lapic_reset(vcpu);
3690                 r = kvm_arch_vcpu_reset(vcpu);
3691                 if (r)
3692                         return r;
3693                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3694         }
3695
3696         down_read(&vcpu->kvm->slots_lock);
3697         vapic_enter(vcpu);
3698
3699         r = 1;
3700         while (r > 0) {
3701                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3702                         r = vcpu_enter_guest(vcpu, kvm_run);
3703                 else {
3704                         up_read(&vcpu->kvm->slots_lock);
3705                         kvm_vcpu_block(vcpu);
3706                         down_read(&vcpu->kvm->slots_lock);
3707                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3708                         {
3709                                 switch(vcpu->arch.mp_state) {
3710                                 case KVM_MP_STATE_HALTED:
3711                                         vcpu->arch.mp_state =
3712                                                 KVM_MP_STATE_RUNNABLE;
3713                                 case KVM_MP_STATE_RUNNABLE:
3714                                         break;
3715                                 case KVM_MP_STATE_SIPI_RECEIVED:
3716                                 default:
3717                                         r = -EINTR;
3718                                         break;
3719                                 }
3720                         }
3721                 }
3722
3723                 if (r <= 0)
3724                         break;
3725
3726                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3727                 if (kvm_cpu_has_pending_timer(vcpu))
3728                         kvm_inject_pending_timer_irqs(vcpu);
3729
3730                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3731                         r = -EINTR;
3732                         kvm_run->exit_reason = KVM_EXIT_INTR;
3733                         ++vcpu->stat.request_irq_exits;
3734                 }
3735                 if (signal_pending(current)) {
3736                         r = -EINTR;
3737                         kvm_run->exit_reason = KVM_EXIT_INTR;
3738                         ++vcpu->stat.signal_exits;
3739                 }
3740                 if (need_resched()) {
3741                         up_read(&vcpu->kvm->slots_lock);
3742                         kvm_resched(vcpu);
3743                         down_read(&vcpu->kvm->slots_lock);
3744                 }
3745         }
3746
3747         up_read(&vcpu->kvm->slots_lock);
3748         post_kvm_run_save(vcpu, kvm_run);
3749
3750         vapic_exit(vcpu);
3751
3752         return r;
3753 }
3754
3755 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3756 {
3757         int r;
3758         sigset_t sigsaved;
3759
3760         vcpu_load(vcpu);
3761
3762         if (vcpu->sigset_active)
3763                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3764
3765         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3766                 kvm_vcpu_block(vcpu);
3767                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3768                 r = -EAGAIN;
3769                 goto out;
3770         }
3771
3772         /* re-sync apic's tpr */
3773         if (!irqchip_in_kernel(vcpu->kvm))
3774                 kvm_set_cr8(vcpu, kvm_run->cr8);
3775
3776         if (vcpu->arch.pio.cur_count) {
3777                 r = complete_pio(vcpu);
3778                 if (r)
3779                         goto out;
3780         }
3781 #if CONFIG_HAS_IOMEM
3782         if (vcpu->mmio_needed) {
3783                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3784                 vcpu->mmio_read_completed = 1;
3785                 vcpu->mmio_needed = 0;
3786
3787                 down_read(&vcpu->kvm->slots_lock);
3788                 r = emulate_instruction(vcpu, kvm_run,
3789                                         vcpu->arch.mmio_fault_cr2, 0,
3790                                         EMULTYPE_NO_DECODE);
3791                 up_read(&vcpu->kvm->slots_lock);
3792                 if (r == EMULATE_DO_MMIO) {
3793                         /*
3794                          * Read-modify-write.  Back to userspace.
3795                          */
3796                         r = 0;
3797                         goto out;
3798                 }
3799         }
3800 #endif
3801         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3802                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3803                                      kvm_run->hypercall.ret);
3804
3805         r = __vcpu_run(vcpu, kvm_run);
3806
3807 out:
3808         if (vcpu->sigset_active)
3809                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3810
3811         vcpu_put(vcpu);
3812         return r;
3813 }
3814
3815 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3816 {
3817         vcpu_load(vcpu);
3818
3819         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3820         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3821         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3822         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3823         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3824         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3825         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3826         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3827 #ifdef CONFIG_X86_64
3828         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3829         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3830         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3831         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3832         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3833         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3834         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3835         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3836 #endif
3837
3838         regs->rip = kvm_rip_read(vcpu);
3839         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3840
3841         /*
3842          * Don't leak debug flags in case they were set for guest debugging
3843          */
3844         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3845                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3846
3847         vcpu_put(vcpu);
3848
3849         return 0;
3850 }
3851
3852 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3853 {
3854         vcpu_load(vcpu);
3855
3856         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3857         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3858         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3859         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3860         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3861         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3862         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3863         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3864 #ifdef CONFIG_X86_64
3865         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3866         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3867         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3868         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3869         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3870         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3871         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3872         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3873
3874 #endif
3875
3876         kvm_rip_write(vcpu, regs->rip);
3877         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3878
3879
3880         vcpu->arch.exception.pending = false;
3881
3882         vcpu_put(vcpu);
3883
3884         return 0;
3885 }
3886
3887 void kvm_get_segment(struct kvm_vcpu *vcpu,
3888                      struct kvm_segment *var, int seg)
3889 {
3890         kvm_x86_ops->get_segment(vcpu, var, seg);
3891 }
3892
3893 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3894 {
3895         struct kvm_segment cs;
3896
3897         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3898         *db = cs.db;
3899         *l = cs.l;
3900 }
3901 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3902
3903 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3904                                   struct kvm_sregs *sregs)
3905 {
3906         struct descriptor_table dt;
3907
3908         vcpu_load(vcpu);
3909
3910         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3911         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3912         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3913         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3914         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3915         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3916
3917         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3918         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3919
3920         kvm_x86_ops->get_idt(vcpu, &dt);
3921         sregs->idt.limit = dt.limit;
3922         sregs->idt.base = dt.base;
3923         kvm_x86_ops->get_gdt(vcpu, &dt);
3924         sregs->gdt.limit = dt.limit;
3925         sregs->gdt.base = dt.base;
3926
3927         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3928         sregs->cr0 = vcpu->arch.cr0;
3929         sregs->cr2 = vcpu->arch.cr2;
3930         sregs->cr3 = vcpu->arch.cr3;
3931         sregs->cr4 = vcpu->arch.cr4;
3932         sregs->cr8 = kvm_get_cr8(vcpu);
3933         sregs->efer = vcpu->arch.shadow_efer;
3934         sregs->apic_base = kvm_get_apic_base(vcpu);
3935
3936         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3937
3938         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3939                 set_bit(vcpu->arch.interrupt.nr,
3940                         (unsigned long *)sregs->interrupt_bitmap);
3941
3942         vcpu_put(vcpu);
3943
3944         return 0;
3945 }
3946
3947 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3948                                     struct kvm_mp_state *mp_state)
3949 {
3950         vcpu_load(vcpu);
3951         mp_state->mp_state = vcpu->arch.mp_state;
3952         vcpu_put(vcpu);
3953         return 0;
3954 }
3955
3956 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3957                                     struct kvm_mp_state *mp_state)
3958 {
3959         vcpu_load(vcpu);
3960         vcpu->arch.mp_state = mp_state->mp_state;
3961         vcpu_put(vcpu);
3962         return 0;
3963 }
3964
3965 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3966                         struct kvm_segment *var, int seg)
3967 {
3968         kvm_x86_ops->set_segment(vcpu, var, seg);
3969 }
3970
3971 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3972                                    struct kvm_segment *kvm_desct)
3973 {
3974         kvm_desct->base = get_desc_base(seg_desc);
3975         kvm_desct->limit = get_desc_limit(seg_desc);
3976         if (seg_desc->g) {
3977                 kvm_desct->limit <<= 12;
3978                 kvm_desct->limit |= 0xfff;
3979         }
3980         kvm_desct->selector = selector;
3981         kvm_desct->type = seg_desc->type;
3982         kvm_desct->present = seg_desc->p;
3983         kvm_desct->dpl = seg_desc->dpl;
3984         kvm_desct->db = seg_desc->d;
3985         kvm_desct->s = seg_desc->s;
3986         kvm_desct->l = seg_desc->l;
3987         kvm_desct->g = seg_desc->g;
3988         kvm_desct->avl = seg_desc->avl;
3989         if (!selector)
3990                 kvm_desct->unusable = 1;
3991         else
3992                 kvm_desct->unusable = 0;
3993         kvm_desct->padding = 0;
3994 }
3995
3996 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3997                                           u16 selector,
3998                                           struct descriptor_table *dtable)
3999 {
4000         if (selector & 1 << 2) {
4001                 struct kvm_segment kvm_seg;
4002
4003                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4004
4005                 if (kvm_seg.unusable)
4006                         dtable->limit = 0;
4007                 else
4008                         dtable->limit = kvm_seg.limit;
4009                 dtable->base = kvm_seg.base;
4010         }
4011         else
4012                 kvm_x86_ops->get_gdt(vcpu, dtable);
4013 }
4014
4015 /* allowed just for 8 bytes segments */
4016 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4017                                          struct desc_struct *seg_desc)
4018 {
4019         gpa_t gpa;
4020         struct descriptor_table dtable;
4021         u16 index = selector >> 3;
4022
4023         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4024
4025         if (dtable.limit < index * 8 + 7) {
4026                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4027                 return 1;
4028         }
4029         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
4030         gpa += index * 8;
4031         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
4032 }
4033
4034 /* allowed just for 8 bytes segments */
4035 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4036                                          struct desc_struct *seg_desc)
4037 {
4038         gpa_t gpa;
4039         struct descriptor_table dtable;
4040         u16 index = selector >> 3;
4041
4042         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4043
4044         if (dtable.limit < index * 8 + 7)
4045                 return 1;
4046         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
4047         gpa += index * 8;
4048         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
4049 }
4050
4051 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
4052                              struct desc_struct *seg_desc)
4053 {
4054         u32 base_addr = get_desc_base(seg_desc);
4055
4056         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4057 }
4058
4059 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4060 {
4061         struct kvm_segment kvm_seg;
4062
4063         kvm_get_segment(vcpu, &kvm_seg, seg);
4064         return kvm_seg.selector;
4065 }
4066
4067 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4068                                                 u16 selector,
4069                                                 struct kvm_segment *kvm_seg)
4070 {
4071         struct desc_struct seg_desc;
4072
4073         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4074                 return 1;
4075         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4076         return 0;
4077 }
4078
4079 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4080 {
4081         struct kvm_segment segvar = {
4082                 .base = selector << 4,
4083                 .limit = 0xffff,
4084                 .selector = selector,
4085                 .type = 3,
4086                 .present = 1,
4087                 .dpl = 3,
4088                 .db = 0,
4089                 .s = 1,
4090                 .l = 0,
4091                 .g = 0,
4092                 .avl = 0,
4093                 .unusable = 0,
4094         };
4095         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4096         return 0;
4097 }
4098
4099 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4100                                 int type_bits, int seg)
4101 {
4102         struct kvm_segment kvm_seg;
4103
4104         if (!(vcpu->arch.cr0 & X86_CR0_PE))
4105                 return kvm_load_realmode_segment(vcpu, selector, seg);
4106         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4107                 return 1;
4108         kvm_seg.type |= type_bits;
4109
4110         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4111             seg != VCPU_SREG_LDTR)
4112                 if (!kvm_seg.s)
4113                         kvm_seg.unusable = 1;
4114
4115         kvm_set_segment(vcpu, &kvm_seg, seg);
4116         return 0;
4117 }
4118
4119 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4120                                 struct tss_segment_32 *tss)
4121 {
4122         tss->cr3 = vcpu->arch.cr3;
4123         tss->eip = kvm_rip_read(vcpu);
4124         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4125         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4126         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4127         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4128         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4129         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4130         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4131         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4132         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4133         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4134         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4135         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4136         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4137         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4138         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4139         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4140 }
4141
4142 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4143                                   struct tss_segment_32 *tss)
4144 {
4145         kvm_set_cr3(vcpu, tss->cr3);
4146
4147         kvm_rip_write(vcpu, tss->eip);
4148         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4149
4150         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4151         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4152         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4153         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4154         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4155         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4156         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4157         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4158
4159         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4160                 return 1;
4161
4162         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4163                 return 1;
4164
4165         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4166                 return 1;
4167
4168         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4169                 return 1;
4170
4171         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4172                 return 1;
4173
4174         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4175                 return 1;
4176
4177         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4178                 return 1;
4179         return 0;
4180 }
4181
4182 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4183                                 struct tss_segment_16 *tss)
4184 {
4185         tss->ip = kvm_rip_read(vcpu);
4186         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4187         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4188         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4189         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4190         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4191         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4192         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4193         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4194         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4195
4196         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4197         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4198         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4199         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4200         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4201         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4202 }
4203
4204 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4205                                  struct tss_segment_16 *tss)
4206 {
4207         kvm_rip_write(vcpu, tss->ip);
4208         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4209         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4210         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4211         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4212         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4213         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4214         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4215         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4216         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4217
4218         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4219                 return 1;
4220
4221         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4222                 return 1;
4223
4224         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4225                 return 1;
4226
4227         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4228                 return 1;
4229
4230         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4231                 return 1;
4232         return 0;
4233 }
4234
4235 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4236                               u16 old_tss_sel, u32 old_tss_base,
4237                               struct desc_struct *nseg_desc)
4238 {
4239         struct tss_segment_16 tss_segment_16;
4240         int ret = 0;
4241
4242         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4243                            sizeof tss_segment_16))
4244                 goto out;
4245
4246         save_state_to_tss16(vcpu, &tss_segment_16);
4247
4248         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4249                             sizeof tss_segment_16))
4250                 goto out;
4251
4252         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4253                            &tss_segment_16, sizeof tss_segment_16))
4254                 goto out;
4255
4256         if (old_tss_sel != 0xffff) {
4257                 tss_segment_16.prev_task_link = old_tss_sel;
4258
4259                 if (kvm_write_guest(vcpu->kvm,
4260                                     get_tss_base_addr(vcpu, nseg_desc),
4261                                     &tss_segment_16.prev_task_link,
4262                                     sizeof tss_segment_16.prev_task_link))
4263                         goto out;
4264         }
4265
4266         if (load_state_from_tss16(vcpu, &tss_segment_16))
4267                 goto out;
4268
4269         ret = 1;
4270 out:
4271         return ret;
4272 }
4273
4274 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4275                        u16 old_tss_sel, u32 old_tss_base,
4276                        struct desc_struct *nseg_desc)
4277 {
4278         struct tss_segment_32 tss_segment_32;
4279         int ret = 0;
4280
4281         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4282                            sizeof tss_segment_32))
4283                 goto out;
4284
4285         save_state_to_tss32(vcpu, &tss_segment_32);
4286
4287         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4288                             sizeof tss_segment_32))
4289                 goto out;
4290
4291         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4292                            &tss_segment_32, sizeof tss_segment_32))
4293                 goto out;
4294
4295         if (old_tss_sel != 0xffff) {
4296                 tss_segment_32.prev_task_link = old_tss_sel;
4297
4298                 if (kvm_write_guest(vcpu->kvm,
4299                                     get_tss_base_addr(vcpu, nseg_desc),
4300                                     &tss_segment_32.prev_task_link,
4301                                     sizeof tss_segment_32.prev_task_link))
4302                         goto out;
4303         }
4304
4305         if (load_state_from_tss32(vcpu, &tss_segment_32))
4306                 goto out;
4307
4308         ret = 1;
4309 out:
4310         return ret;
4311 }
4312
4313 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4314 {
4315         struct kvm_segment tr_seg;
4316         struct desc_struct cseg_desc;
4317         struct desc_struct nseg_desc;
4318         int ret = 0;
4319         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4320         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4321
4322         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4323
4324         /* FIXME: Handle errors. Failure to read either TSS or their
4325          * descriptors should generate a pagefault.
4326          */
4327         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4328                 goto out;
4329
4330         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4331                 goto out;
4332
4333         if (reason != TASK_SWITCH_IRET) {
4334                 int cpl;
4335
4336                 cpl = kvm_x86_ops->get_cpl(vcpu);
4337                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4338                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4339                         return 1;
4340                 }
4341         }
4342
4343         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4344                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4345                 return 1;
4346         }
4347
4348         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4349                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4350                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4351         }
4352
4353         if (reason == TASK_SWITCH_IRET) {
4354                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4355                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4356         }
4357
4358         /* set back link to prev task only if NT bit is set in eflags
4359            note that old_tss_sel is not used afetr this point */
4360         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4361                 old_tss_sel = 0xffff;
4362
4363         /* set back link to prev task only if NT bit is set in eflags
4364            note that old_tss_sel is not used afetr this point */
4365         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4366                 old_tss_sel = 0xffff;
4367
4368         if (nseg_desc.type & 8)
4369                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4370                                          old_tss_base, &nseg_desc);
4371         else
4372                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4373                                          old_tss_base, &nseg_desc);
4374
4375         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4376                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4377                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4378         }
4379
4380         if (reason != TASK_SWITCH_IRET) {
4381                 nseg_desc.type |= (1 << 1);
4382                 save_guest_segment_descriptor(vcpu, tss_selector,
4383                                               &nseg_desc);
4384         }
4385
4386         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4387         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4388         tr_seg.type = 11;
4389         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4390 out:
4391         return ret;
4392 }
4393 EXPORT_SYMBOL_GPL(kvm_task_switch);
4394
4395 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4396                                   struct kvm_sregs *sregs)
4397 {
4398         int mmu_reset_needed = 0;
4399         int pending_vec, max_bits;
4400         struct descriptor_table dt;
4401
4402         vcpu_load(vcpu);
4403
4404         dt.limit = sregs->idt.limit;
4405         dt.base = sregs->idt.base;
4406         kvm_x86_ops->set_idt(vcpu, &dt);
4407         dt.limit = sregs->gdt.limit;
4408         dt.base = sregs->gdt.base;
4409         kvm_x86_ops->set_gdt(vcpu, &dt);
4410
4411         vcpu->arch.cr2 = sregs->cr2;
4412         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4413         vcpu->arch.cr3 = sregs->cr3;
4414
4415         kvm_set_cr8(vcpu, sregs->cr8);
4416
4417         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4418         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4419         kvm_set_apic_base(vcpu, sregs->apic_base);
4420
4421         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4422
4423         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4424         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4425         vcpu->arch.cr0 = sregs->cr0;
4426
4427         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4428         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4429         if (!is_long_mode(vcpu) && is_pae(vcpu))
4430                 load_pdptrs(vcpu, vcpu->arch.cr3);
4431
4432         if (mmu_reset_needed)
4433                 kvm_mmu_reset_context(vcpu);
4434
4435         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4436         pending_vec = find_first_bit(
4437                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4438         if (pending_vec < max_bits) {
4439                 kvm_queue_interrupt(vcpu, pending_vec, false);
4440                 pr_debug("Set back pending irq %d\n", pending_vec);
4441                 if (irqchip_in_kernel(vcpu->kvm))
4442                         kvm_pic_clear_isr_ack(vcpu->kvm);
4443         }
4444
4445         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4446         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4447         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4448         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4449         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4450         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4451
4452         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4453         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4454
4455         update_cr8_intercept(vcpu);
4456
4457         /* Older userspace won't unhalt the vcpu on reset. */
4458         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4459             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4460             !(vcpu->arch.cr0 & X86_CR0_PE))
4461                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4462
4463         vcpu_put(vcpu);
4464
4465         return 0;
4466 }
4467
4468 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4469                                         struct kvm_guest_debug *dbg)
4470 {
4471         int i, r;
4472
4473         vcpu_load(vcpu);
4474
4475         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4476             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4477                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4478                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4479                 vcpu->arch.switch_db_regs =
4480                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4481         } else {
4482                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4483                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4484                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4485         }
4486
4487         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4488
4489         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4490                 kvm_queue_exception(vcpu, DB_VECTOR);
4491         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4492                 kvm_queue_exception(vcpu, BP_VECTOR);
4493
4494         vcpu_put(vcpu);
4495
4496         return r;
4497 }
4498
4499 /*
4500  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4501  * we have asm/x86/processor.h
4502  */
4503 struct fxsave {
4504         u16     cwd;
4505         u16     swd;
4506         u16     twd;
4507         u16     fop;
4508         u64     rip;
4509         u64     rdp;
4510         u32     mxcsr;
4511         u32     mxcsr_mask;
4512         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4513 #ifdef CONFIG_X86_64
4514         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4515 #else
4516         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4517 #endif
4518 };
4519
4520 /*
4521  * Translate a guest virtual address to a guest physical address.
4522  */
4523 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4524                                     struct kvm_translation *tr)
4525 {
4526         unsigned long vaddr = tr->linear_address;
4527         gpa_t gpa;
4528
4529         vcpu_load(vcpu);
4530         down_read(&vcpu->kvm->slots_lock);
4531         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4532         up_read(&vcpu->kvm->slots_lock);
4533         tr->physical_address = gpa;
4534         tr->valid = gpa != UNMAPPED_GVA;
4535         tr->writeable = 1;
4536         tr->usermode = 0;
4537         vcpu_put(vcpu);
4538
4539         return 0;
4540 }
4541
4542 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4543 {
4544         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4545
4546         vcpu_load(vcpu);
4547
4548         memcpy(fpu->fpr, fxsave->st_space, 128);
4549         fpu->fcw = fxsave->cwd;
4550         fpu->fsw = fxsave->swd;
4551         fpu->ftwx = fxsave->twd;
4552         fpu->last_opcode = fxsave->fop;
4553         fpu->last_ip = fxsave->rip;
4554         fpu->last_dp = fxsave->rdp;
4555         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4556
4557         vcpu_put(vcpu);
4558
4559         return 0;
4560 }
4561
4562 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4563 {
4564         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4565
4566         vcpu_load(vcpu);
4567
4568         memcpy(fxsave->st_space, fpu->fpr, 128);
4569         fxsave->cwd = fpu->fcw;
4570         fxsave->swd = fpu->fsw;
4571         fxsave->twd = fpu->ftwx;
4572         fxsave->fop = fpu->last_opcode;
4573         fxsave->rip = fpu->last_ip;
4574         fxsave->rdp = fpu->last_dp;
4575         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4576
4577         vcpu_put(vcpu);
4578
4579         return 0;
4580 }
4581
4582 void fx_init(struct kvm_vcpu *vcpu)
4583 {
4584         unsigned after_mxcsr_mask;
4585
4586         /*
4587          * Touch the fpu the first time in non atomic context as if
4588          * this is the first fpu instruction the exception handler
4589          * will fire before the instruction returns and it'll have to
4590          * allocate ram with GFP_KERNEL.
4591          */
4592         if (!used_math())
4593                 kvm_fx_save(&vcpu->arch.host_fx_image);
4594
4595         /* Initialize guest FPU by resetting ours and saving into guest's */
4596         preempt_disable();
4597         kvm_fx_save(&vcpu->arch.host_fx_image);
4598         kvm_fx_finit();
4599         kvm_fx_save(&vcpu->arch.guest_fx_image);
4600         kvm_fx_restore(&vcpu->arch.host_fx_image);
4601         preempt_enable();
4602
4603         vcpu->arch.cr0 |= X86_CR0_ET;
4604         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4605         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4606         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4607                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4608 }
4609 EXPORT_SYMBOL_GPL(fx_init);
4610
4611 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4612 {
4613         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4614                 return;
4615
4616         vcpu->guest_fpu_loaded = 1;
4617         kvm_fx_save(&vcpu->arch.host_fx_image);
4618         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4619 }
4620 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4621
4622 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4623 {
4624         if (!vcpu->guest_fpu_loaded)
4625                 return;
4626
4627         vcpu->guest_fpu_loaded = 0;
4628         kvm_fx_save(&vcpu->arch.guest_fx_image);
4629         kvm_fx_restore(&vcpu->arch.host_fx_image);
4630         ++vcpu->stat.fpu_reload;
4631 }
4632 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4633
4634 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4635 {
4636         if (vcpu->arch.time_page) {
4637                 kvm_release_page_dirty(vcpu->arch.time_page);
4638                 vcpu->arch.time_page = NULL;
4639         }
4640
4641         kvm_x86_ops->vcpu_free(vcpu);
4642 }
4643
4644 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4645                                                 unsigned int id)
4646 {
4647         return kvm_x86_ops->vcpu_create(kvm, id);
4648 }
4649
4650 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4651 {
4652         int r;
4653
4654         /* We do fxsave: this must be aligned. */
4655         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4656
4657         vcpu->arch.mtrr_state.have_fixed = 1;
4658         vcpu_load(vcpu);
4659         r = kvm_arch_vcpu_reset(vcpu);
4660         if (r == 0)
4661                 r = kvm_mmu_setup(vcpu);
4662         vcpu_put(vcpu);
4663         if (r < 0)
4664                 goto free_vcpu;
4665
4666         return 0;
4667 free_vcpu:
4668         kvm_x86_ops->vcpu_free(vcpu);
4669         return r;
4670 }
4671
4672 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4673 {
4674         vcpu_load(vcpu);
4675         kvm_mmu_unload(vcpu);
4676         vcpu_put(vcpu);
4677
4678         kvm_x86_ops->vcpu_free(vcpu);
4679 }
4680
4681 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4682 {
4683         vcpu->arch.nmi_pending = false;
4684         vcpu->arch.nmi_injected = false;
4685
4686         vcpu->arch.switch_db_regs = 0;
4687         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4688         vcpu->arch.dr6 = DR6_FIXED_1;
4689         vcpu->arch.dr7 = DR7_FIXED_1;
4690
4691         return kvm_x86_ops->vcpu_reset(vcpu);
4692 }
4693
4694 void kvm_arch_hardware_enable(void *garbage)
4695 {
4696         kvm_x86_ops->hardware_enable(garbage);
4697 }
4698
4699 void kvm_arch_hardware_disable(void *garbage)
4700 {
4701         kvm_x86_ops->hardware_disable(garbage);
4702 }
4703
4704 int kvm_arch_hardware_setup(void)
4705 {
4706         return kvm_x86_ops->hardware_setup();
4707 }
4708
4709 void kvm_arch_hardware_unsetup(void)
4710 {
4711         kvm_x86_ops->hardware_unsetup();
4712 }
4713
4714 void kvm_arch_check_processor_compat(void *rtn)
4715 {
4716         kvm_x86_ops->check_processor_compatibility(rtn);
4717 }
4718
4719 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4720 {
4721         struct page *page;
4722         struct kvm *kvm;
4723         int r;
4724
4725         BUG_ON(vcpu->kvm == NULL);
4726         kvm = vcpu->kvm;
4727
4728         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4729         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4730                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4731         else
4732                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4733
4734         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4735         if (!page) {
4736                 r = -ENOMEM;
4737                 goto fail;
4738         }
4739         vcpu->arch.pio_data = page_address(page);
4740
4741         r = kvm_mmu_create(vcpu);
4742         if (r < 0)
4743                 goto fail_free_pio_data;
4744
4745         if (irqchip_in_kernel(kvm)) {
4746                 r = kvm_create_lapic(vcpu);
4747                 if (r < 0)
4748                         goto fail_mmu_destroy;
4749         }
4750
4751         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4752                                        GFP_KERNEL);
4753         if (!vcpu->arch.mce_banks) {
4754                 r = -ENOMEM;
4755                 goto fail_mmu_destroy;
4756         }
4757         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4758
4759         return 0;
4760
4761 fail_mmu_destroy:
4762         kvm_mmu_destroy(vcpu);
4763 fail_free_pio_data:
4764         free_page((unsigned long)vcpu->arch.pio_data);
4765 fail:
4766         return r;
4767 }
4768
4769 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4770 {
4771         kvm_free_lapic(vcpu);
4772         down_read(&vcpu->kvm->slots_lock);
4773         kvm_mmu_destroy(vcpu);
4774         up_read(&vcpu->kvm->slots_lock);
4775         free_page((unsigned long)vcpu->arch.pio_data);
4776 }
4777
4778 struct  kvm *kvm_arch_create_vm(void)
4779 {
4780         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4781
4782         if (!kvm)
4783                 return ERR_PTR(-ENOMEM);
4784
4785         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4786         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4787
4788         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4789         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4790
4791         rdtscll(kvm->arch.vm_init_tsc);
4792
4793         return kvm;
4794 }
4795
4796 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4797 {
4798         vcpu_load(vcpu);
4799         kvm_mmu_unload(vcpu);
4800         vcpu_put(vcpu);
4801 }
4802
4803 static void kvm_free_vcpus(struct kvm *kvm)
4804 {
4805         unsigned int i;
4806         struct kvm_vcpu *vcpu;
4807
4808         /*
4809          * Unpin any mmu pages first.
4810          */
4811         kvm_for_each_vcpu(i, vcpu, kvm)
4812                 kvm_unload_vcpu_mmu(vcpu);
4813         kvm_for_each_vcpu(i, vcpu, kvm)
4814                 kvm_arch_vcpu_free(vcpu);
4815
4816         mutex_lock(&kvm->lock);
4817         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4818                 kvm->vcpus[i] = NULL;
4819
4820         atomic_set(&kvm->online_vcpus, 0);
4821         mutex_unlock(&kvm->lock);
4822 }
4823
4824 void kvm_arch_sync_events(struct kvm *kvm)
4825 {
4826         kvm_free_all_assigned_devices(kvm);
4827 }
4828
4829 void kvm_arch_destroy_vm(struct kvm *kvm)
4830 {
4831         kvm_iommu_unmap_guest(kvm);
4832         kvm_free_pit(kvm);
4833         kfree(kvm->arch.vpic);
4834         kfree(kvm->arch.vioapic);
4835         kvm_free_vcpus(kvm);
4836         kvm_free_physmem(kvm);
4837         if (kvm->arch.apic_access_page)
4838                 put_page(kvm->arch.apic_access_page);
4839         if (kvm->arch.ept_identity_pagetable)
4840                 put_page(kvm->arch.ept_identity_pagetable);
4841         kfree(kvm);
4842 }
4843
4844 int kvm_arch_set_memory_region(struct kvm *kvm,
4845                                 struct kvm_userspace_memory_region *mem,
4846                                 struct kvm_memory_slot old,
4847                                 int user_alloc)
4848 {
4849         int npages = mem->memory_size >> PAGE_SHIFT;
4850         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4851
4852         /*To keep backward compatibility with older userspace,
4853          *x86 needs to hanlde !user_alloc case.
4854          */
4855         if (!user_alloc) {
4856                 if (npages && !old.rmap) {
4857                         unsigned long userspace_addr;
4858
4859                         down_write(&current->mm->mmap_sem);
4860                         userspace_addr = do_mmap(NULL, 0,
4861                                                  npages * PAGE_SIZE,
4862                                                  PROT_READ | PROT_WRITE,
4863                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4864                                                  0);
4865                         up_write(&current->mm->mmap_sem);
4866
4867                         if (IS_ERR((void *)userspace_addr))
4868                                 return PTR_ERR((void *)userspace_addr);
4869
4870                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4871                         spin_lock(&kvm->mmu_lock);
4872                         memslot->userspace_addr = userspace_addr;
4873                         spin_unlock(&kvm->mmu_lock);
4874                 } else {
4875                         if (!old.user_alloc && old.rmap) {
4876                                 int ret;
4877
4878                                 down_write(&current->mm->mmap_sem);
4879                                 ret = do_munmap(current->mm, old.userspace_addr,
4880                                                 old.npages * PAGE_SIZE);
4881                                 up_write(&current->mm->mmap_sem);
4882                                 if (ret < 0)
4883                                         printk(KERN_WARNING
4884                                        "kvm_vm_ioctl_set_memory_region: "
4885                                        "failed to munmap memory\n");
4886                         }
4887                 }
4888         }
4889
4890         spin_lock(&kvm->mmu_lock);
4891         if (!kvm->arch.n_requested_mmu_pages) {
4892                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4893                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4894         }
4895
4896         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4897         spin_unlock(&kvm->mmu_lock);
4898         kvm_flush_remote_tlbs(kvm);
4899
4900         return 0;
4901 }
4902
4903 void kvm_arch_flush_shadow(struct kvm *kvm)
4904 {
4905         kvm_mmu_zap_all(kvm);
4906         kvm_reload_remote_mmus(kvm);
4907 }
4908
4909 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4910 {
4911         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4912                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4913                 || vcpu->arch.nmi_pending ||
4914                 (kvm_arch_interrupt_allowed(vcpu) &&
4915                  kvm_cpu_has_interrupt(vcpu));
4916 }
4917
4918 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4919 {
4920         int me;
4921         int cpu = vcpu->cpu;
4922
4923         if (waitqueue_active(&vcpu->wq)) {
4924                 wake_up_interruptible(&vcpu->wq);
4925                 ++vcpu->stat.halt_wakeup;
4926         }
4927
4928         me = get_cpu();
4929         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4930                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4931                         smp_send_reschedule(cpu);
4932         put_cpu();
4933 }
4934
4935 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4936 {
4937         return kvm_x86_ops->interrupt_allowed(vcpu);
4938 }
4939
4940 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4941 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4942 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4943 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4944 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);