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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #define CREATE_TRACE_POINTS
  41 #include "trace.h"
  42
  43 #include <asm/uaccess.h>
  44 #include <asm/msr.h>
  45 #include <asm/desc.h>
  46 #include <asm/mtrr.h>
  47 #include <asm/mce.h>
  48
  49 #define MAX_IO_MSRS 256
  50 #define CR0_RESERVED_BITS                                               \
  51         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  52                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  53                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  54 #define CR4_RESERVED_BITS                                               \
  55         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  56                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  57                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  58                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  59
  60 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  61
  62 #define KVM_MAX_MCE_BANKS 32
  63 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  64
  65 /* EFER defaults:
  66  * - enable syscall per default because its emulated by KVM
  67  * - enable LME and LMA per default on 64 bit KVM
  68  */
  69 #ifdef CONFIG_X86_64
  70 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  71 #else
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  73 #endif
  74
  75 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  76 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  77
  78 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  79                                     struct kvm_cpuid_entry2 __user *entries);
  80 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
  81                                               u32 function, u32 index);
  82
  83 struct kvm_x86_ops *kvm_x86_ops;
  84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  85
  86 struct kvm_stats_debugfs_item debugfs_entries[] = {
  87         { "pf_fixed", VCPU_STAT(pf_fixed) },
  88         { "pf_guest", VCPU_STAT(pf_guest) },
  89         { "tlb_flush", VCPU_STAT(tlb_flush) },
  90         { "invlpg", VCPU_STAT(invlpg) },
  91         { "exits", VCPU_STAT(exits) },
  92         { "io_exits", VCPU_STAT(io_exits) },
  93         { "mmio_exits", VCPU_STAT(mmio_exits) },
  94         { "signal_exits", VCPU_STAT(signal_exits) },
  95         { "irq_window", VCPU_STAT(irq_window_exits) },
  96         { "nmi_window", VCPU_STAT(nmi_window_exits) },
  97         { "halt_exits", VCPU_STAT(halt_exits) },
  98         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  99         { "hypercalls", VCPU_STAT(hypercalls) },
 100         { "request_irq", VCPU_STAT(request_irq_exits) },
 101         { "irq_exits", VCPU_STAT(irq_exits) },
 102         { "host_state_reload", VCPU_STAT(host_state_reload) },
 103         { "efer_reload", VCPU_STAT(efer_reload) },
 104         { "fpu_reload", VCPU_STAT(fpu_reload) },
 105         { "insn_emulation", VCPU_STAT(insn_emulation) },
 106         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 107         { "irq_injections", VCPU_STAT(irq_injections) },
 108         { "nmi_injections", VCPU_STAT(nmi_injections) },
 109         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 110         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 111         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 112         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 113         { "mmu_flooded", VM_STAT(mmu_flooded) },
 114         { "mmu_recycled", VM_STAT(mmu_recycled) },
 115         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 116         { "mmu_unsync", VM_STAT(mmu_unsync) },
 117         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 118         { "largepages", VM_STAT(lpages) },
 119         { NULL }
 120 };
 121
 122 unsigned long segment_base(u16 selector)
 123 {
 124         struct descriptor_table gdt;
 125         struct desc_struct *d;
 126         unsigned long table_base;
 127         unsigned long v;
 128
 129         if (selector == 0)
 130                 return 0;
 131
 132         asm("sgdt %0" : "=m"(gdt));
 133         table_base = gdt.base;
 134
 135         if (selector & 4) {           /* from ldt */
 136                 u16 ldt_selector;
 137
 138                 asm("sldt %0" : "=g"(ldt_selector));
 139                 table_base = segment_base(ldt_selector);
 140         }
 141         d = (struct desc_struct *)(table_base + (selector & ~7));
 142         v = d->base0 | ((unsigned long)d->base1 << 16) |
 143                 ((unsigned long)d->base2 << 24);
 144 #ifdef CONFIG_X86_64
 145         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 146                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 147 #endif
 148         return v;
 149 }
 150 EXPORT_SYMBOL_GPL(segment_base);
 151
 152 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 153 {
 154         if (irqchip_in_kernel(vcpu->kvm))
 155                 return vcpu->arch.apic_base;
 156         else
 157                 return vcpu->arch.apic_base;
 158 }
 159 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 160
 161 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 162 {
 163         /* TODO: reserve bits check */
 164         if (irqchip_in_kernel(vcpu->kvm))
 165                 kvm_lapic_set_base(vcpu, data);
 166         else
 167                 vcpu->arch.apic_base = data;
 168 }
 169 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 170
 171 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 172 {
 173         WARN_ON(vcpu->arch.exception.pending);
 174         vcpu->arch.exception.pending = true;
 175         vcpu->arch.exception.has_error_code = false;
 176         vcpu->arch.exception.nr = nr;
 177 }
 178 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 179
 180 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 181                            u32 error_code)
 182 {
 183         ++vcpu->stat.pf_guest;
 184
 185         if (vcpu->arch.exception.pending) {
 186                 switch(vcpu->arch.exception.nr) {
 187                 case DF_VECTOR:
 188                         /* triple fault -> shutdown */
 189                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 190                         return;
 191                 case PF_VECTOR:
 192                         vcpu->arch.exception.nr = DF_VECTOR;
 193                         vcpu->arch.exception.error_code = 0;
 194                         return;
 195                 default:
 196                         /* replace previous exception with a new one in a hope
 197                            that instruction re-execution will regenerate lost
 198                            exception */
 199                         vcpu->arch.exception.pending = false;
 200                         break;
 201                 }
 202         }
 203         vcpu->arch.cr2 = addr;
 204         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 205 }
 206
 207 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 208 {
 209         vcpu->arch.nmi_pending = 1;
 210 }
 211 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 212
 213 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 214 {
 215         WARN_ON(vcpu->arch.exception.pending);
 216         vcpu->arch.exception.pending = true;
 217         vcpu->arch.exception.has_error_code = true;
 218         vcpu->arch.exception.nr = nr;
 219         vcpu->arch.exception.error_code = error_code;
 220 }
 221 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 222
 223 static void __queue_exception(struct kvm_vcpu *vcpu)
 224 {
 225         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
 226                                      vcpu->arch.exception.has_error_code,
 227                                      vcpu->arch.exception.error_code);
 228 }
 229
 230 /*
 231  * Load the pae pdptrs.  Return true is they are all valid.
 232  */
 233 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 234 {
 235         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 236         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 237         int i;
 238         int ret;
 239         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 240
 241         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 242                                   offset * sizeof(u64), sizeof(pdpte));
 243         if (ret < 0) {
 244                 ret = 0;
 245                 goto out;
 246         }
 247         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 248                 if (is_present_gpte(pdpte[i]) &&
 249                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 250                         ret = 0;
 251                         goto out;
 252                 }
 253         }
 254         ret = 1;
 255
 256         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 257         __set_bit(VCPU_EXREG_PDPTR,
 258                   (unsigned long *)&vcpu->arch.regs_avail);
 259         __set_bit(VCPU_EXREG_PDPTR,
 260                   (unsigned long *)&vcpu->arch.regs_dirty);
 261 out:
 262
 263         return ret;
 264 }
 265 EXPORT_SYMBOL_GPL(load_pdptrs);
 266
 267 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 268 {
 269         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 270         bool changed = true;
 271         int r;
 272
 273         if (is_long_mode(vcpu) || !is_pae(vcpu))
 274                 return false;
 275
 276         if (!test_bit(VCPU_EXREG_PDPTR,
 277                       (unsigned long *)&vcpu->arch.regs_avail))
 278                 return true;
 279
 280         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 281         if (r < 0)
 282                 goto out;
 283         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 284 out:
 285
 286         return changed;
 287 }
 288
 289 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 290 {
 291         if (cr0 & CR0_RESERVED_BITS) {
 292                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 293                        cr0, vcpu->arch.cr0);
 294                 kvm_inject_gp(vcpu, 0);
 295                 return;
 296         }
 297
 298         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 299                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 300                 kvm_inject_gp(vcpu, 0);
 301                 return;
 302         }
 303
 304         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 305                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 306                        "and a clear PE flag\n");
 307                 kvm_inject_gp(vcpu, 0);
 308                 return;
 309         }
 310
 311         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 312 #ifdef CONFIG_X86_64
 313                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 314                         int cs_db, cs_l;
 315
 316                         if (!is_pae(vcpu)) {
 317                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 318                                        "in long mode while PAE is disabled\n");
 319                                 kvm_inject_gp(vcpu, 0);
 320                                 return;
 321                         }
 322                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 323                         if (cs_l) {
 324                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 325                                        "in long mode while CS.L == 1\n");
 326                                 kvm_inject_gp(vcpu, 0);
 327                                 return;
 328
 329                         }
 330                 } else
 331 #endif
 332                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 333                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 334                                "reserved bits\n");
 335                         kvm_inject_gp(vcpu, 0);
 336                         return;
 337                 }
 338
 339         }
 340
 341         kvm_x86_ops->set_cr0(vcpu, cr0);
 342         vcpu->arch.cr0 = cr0;
 343
 344         kvm_mmu_reset_context(vcpu);
 345         return;
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 348
 349 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 350 {
 351         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 352 }
 353 EXPORT_SYMBOL_GPL(kvm_lmsw);
 354
 355 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 356 {
 357         unsigned long old_cr4 = vcpu->arch.cr4;
 358         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 359
 360         if (cr4 & CR4_RESERVED_BITS) {
 361                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 362                 kvm_inject_gp(vcpu, 0);
 363                 return;
 364         }
 365
 366         if (is_long_mode(vcpu)) {
 367                 if (!(cr4 & X86_CR4_PAE)) {
 368                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 369                                "in long mode\n");
 370                         kvm_inject_gp(vcpu, 0);
 371                         return;
 372                 }
 373         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 374                    && ((cr4 ^ old_cr4) & pdptr_bits)
 375                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 376                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 377                 kvm_inject_gp(vcpu, 0);
 378                 return;
 379         }
 380
 381         if (cr4 & X86_CR4_VMXE) {
 382                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 383                 kvm_inject_gp(vcpu, 0);
 384                 return;
 385         }
 386         kvm_x86_ops->set_cr4(vcpu, cr4);
 387         vcpu->arch.cr4 = cr4;
 388         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 389         kvm_mmu_reset_context(vcpu);
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 392
 393 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 394 {
 395         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 396                 kvm_mmu_sync_roots(vcpu);
 397                 kvm_mmu_flush_tlb(vcpu);
 398                 return;
 399         }
 400
 401         if (is_long_mode(vcpu)) {
 402                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 403                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 404                         kvm_inject_gp(vcpu, 0);
 405                         return;
 406                 }
 407         } else {
 408                 if (is_pae(vcpu)) {
 409                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 410                                 printk(KERN_DEBUG
 411                                        "set_cr3: #GP, reserved bits\n");
 412                                 kvm_inject_gp(vcpu, 0);
 413                                 return;
 414                         }
 415                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 416                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 417                                        "reserved bits\n");
 418                                 kvm_inject_gp(vcpu, 0);
 419                                 return;
 420                         }
 421                 }
 422                 /*
 423                  * We don't check reserved bits in nonpae mode, because
 424                  * this isn't enforced, and VMware depends on this.
 425                  */
 426         }
 427
 428         /*
 429          * Does the new cr3 value map to physical memory? (Note, we
 430          * catch an invalid cr3 even in real-mode, because it would
 431          * cause trouble later on when we turn on paging anyway.)
 432          *
 433          * A real CPU would silently accept an invalid cr3 and would
 434          * attempt to use it - with largely undefined (and often hard
 435          * to debug) behavior on the guest side.
 436          */
 437         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 438                 kvm_inject_gp(vcpu, 0);
 439         else {
 440                 vcpu->arch.cr3 = cr3;
 441                 vcpu->arch.mmu.new_cr3(vcpu);
 442         }
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 445
 446 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 447 {
 448         if (cr8 & CR8_RESERVED_BITS) {
 449                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 450                 kvm_inject_gp(vcpu, 0);
 451                 return;
 452         }
 453         if (irqchip_in_kernel(vcpu->kvm))
 454                 kvm_lapic_set_tpr(vcpu, cr8);
 455         else
 456                 vcpu->arch.cr8 = cr8;
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 459
 460 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 461 {
 462         if (irqchip_in_kernel(vcpu->kvm))
 463                 return kvm_lapic_get_cr8(vcpu);
 464         else
 465                 return vcpu->arch.cr8;
 466 }
 467 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 468
 469 static inline u32 bit(int bitno)
 470 {
 471         return 1 << (bitno & 31);
 472 }
 473
 474 /*
 475  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 476  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 477  *
 478  * This list is modified at module load time to reflect the
 479  * capabilities of the host cpu.
 480  */
 481 static u32 msrs_to_save[] = {
 482         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 483         MSR_K6_STAR,
 484 #ifdef CONFIG_X86_64
 485         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 486 #endif
 487         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 488         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 489 };
 490
 491 static unsigned num_msrs_to_save;
 492
 493 static u32 emulated_msrs[] = {
 494         MSR_IA32_MISC_ENABLE,
 495 };
 496
 497 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 498 {
 499         if (efer & efer_reserved_bits) {
 500                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 501                        efer);
 502                 kvm_inject_gp(vcpu, 0);
 503                 return;
 504         }
 505
 506         if (is_paging(vcpu)
 507             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 508                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 509                 kvm_inject_gp(vcpu, 0);
 510                 return;
 511         }
 512
 513         if (efer & EFER_FFXSR) {
 514                 struct kvm_cpuid_entry2 *feat;
 515
 516                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 517                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 518                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 519                         kvm_inject_gp(vcpu, 0);
 520                         return;
 521                 }
 522         }
 523
 524         if (efer & EFER_SVME) {
 525                 struct kvm_cpuid_entry2 *feat;
 526
 527                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 528                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 529                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 530                         kvm_inject_gp(vcpu, 0);
 531                         return;
 532                 }
 533         }
 534
 535         kvm_x86_ops->set_efer(vcpu, efer);
 536
 537         efer &= ~EFER_LMA;
 538         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 539
 540         vcpu->arch.shadow_efer = efer;
 541
 542         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 543         kvm_mmu_reset_context(vcpu);
 544 }
 545
 546 void kvm_enable_efer_bits(u64 mask)
 547 {
 548        efer_reserved_bits &= ~mask;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 551
 552
 553 /*
 554  * Writes msr value into into the appropriate "register".
 555  * Returns 0 on success, non-0 otherwise.
 556  * Assumes vcpu_load() was already called.
 557  */
 558 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 559 {
 560         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 561 }
 562
 563 /*
 564  * Adapt set_msr() to msr_io()'s calling convention
 565  */
 566 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 567 {
 568         return kvm_set_msr(vcpu, index, *data);
 569 }
 570
 571 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 572 {
 573         static int version;
 574         struct pvclock_wall_clock wc;
 575         struct timespec now, sys, boot;
 576
 577         if (!wall_clock)
 578                 return;
 579
 580         version++;
 581
 582         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 583
 584         /*
 585          * The guest calculates current wall clock time by adding
 586          * system time (updated by kvm_write_guest_time below) to the
 587          * wall clock specified here.  guest system time equals host
 588          * system time for us, thus we must fill in host boot time here.
 589          */
 590         now = current_kernel_time();
 591         ktime_get_ts(&sys);
 592         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 593
 594         wc.sec = boot.tv_sec;
 595         wc.nsec = boot.tv_nsec;
 596         wc.version = version;
 597
 598         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 599
 600         version++;
 601         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 602 }
 603
 604 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 605 {
 606         uint32_t quotient, remainder;
 607
 608         /* Don't try to replace with do_div(), this one calculates
 609          * "(dividend << 32) / divisor" */
 610         __asm__ ( "divl %4"
 611                   : "=a" (quotient), "=d" (remainder)
 612                   : "0" (0), "1" (dividend), "r" (divisor) );
 613         return quotient;
 614 }
 615
 616 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 617 {
 618         uint64_t nsecs = 1000000000LL;
 619         int32_t  shift = 0;
 620         uint64_t tps64;
 621         uint32_t tps32;
 622
 623         tps64 = tsc_khz * 1000LL;
 624         while (tps64 > nsecs*2) {
 625                 tps64 >>= 1;
 626                 shift--;
 627         }
 628
 629         tps32 = (uint32_t)tps64;
 630         while (tps32 <= (uint32_t)nsecs) {
 631                 tps32 <<= 1;
 632                 shift++;
 633         }
 634
 635         hv_clock->tsc_shift = shift;
 636         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 637
 638         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 639                  __func__, tsc_khz, hv_clock->tsc_shift,
 640                  hv_clock->tsc_to_system_mul);
 641 }
 642
 643 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 644
 645 static void kvm_write_guest_time(struct kvm_vcpu *v)
 646 {
 647         struct timespec ts;
 648         unsigned long flags;
 649         struct kvm_vcpu_arch *vcpu = &v->arch;
 650         void *shared_kaddr;
 651         unsigned long this_tsc_khz;
 652
 653         if ((!vcpu->time_page))
 654                 return;
 655
 656         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 657         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 658                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 659                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 660         }
 661         put_cpu_var(cpu_tsc_khz);
 662
 663         /* Keep irq disabled to prevent changes to the clock */
 664         local_irq_save(flags);
 665         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 666         ktime_get_ts(&ts);
 667         local_irq_restore(flags);
 668
 669         /* With all the info we got, fill in the values */
 670
 671         vcpu->hv_clock.system_time = ts.tv_nsec +
 672                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 673         /*
 674          * The interface expects us to write an even number signaling that the
 675          * update is finished. Since the guest won't see the intermediate
 676          * state, we just increase by 2 at the end.
 677          */
 678         vcpu->hv_clock.version += 2;
 679
 680         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 681
 682         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 683                sizeof(vcpu->hv_clock));
 684
 685         kunmap_atomic(shared_kaddr, KM_USER0);
 686
 687         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 688 }
 689
 690 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 691 {
 692         struct kvm_vcpu_arch *vcpu = &v->arch;
 693
 694         if (!vcpu->time_page)
 695                 return 0;
 696         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 697         return 1;
 698 }
 699
 700 static bool msr_mtrr_valid(unsigned msr)
 701 {
 702         switch (msr) {
 703         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 704         case MSR_MTRRfix64K_00000:
 705         case MSR_MTRRfix16K_80000:
 706         case MSR_MTRRfix16K_A0000:
 707         case MSR_MTRRfix4K_C0000:
 708         case MSR_MTRRfix4K_C8000:
 709         case MSR_MTRRfix4K_D0000:
 710         case MSR_MTRRfix4K_D8000:
 711         case MSR_MTRRfix4K_E0000:
 712         case MSR_MTRRfix4K_E8000:
 713         case MSR_MTRRfix4K_F0000:
 714         case MSR_MTRRfix4K_F8000:
 715         case MSR_MTRRdefType:
 716         case MSR_IA32_CR_PAT:
 717                 return true;
 718         case 0x2f8:
 719                 return true;
 720         }
 721         return false;
 722 }
 723
 724 static bool valid_pat_type(unsigned t)
 725 {
 726         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 727 }
 728
 729 static bool valid_mtrr_type(unsigned t)
 730 {
 731         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 732 }
 733
 734 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 735 {
 736         int i;
 737
 738         if (!msr_mtrr_valid(msr))
 739                 return false;
 740
 741         if (msr == MSR_IA32_CR_PAT) {
 742                 for (i = 0; i < 8; i++)
 743                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 744                                 return false;
 745                 return true;
 746         } else if (msr == MSR_MTRRdefType) {
 747                 if (data & ~0xcff)
 748                         return false;
 749                 return valid_mtrr_type(data & 0xff);
 750         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 751                 for (i = 0; i < 8 ; i++)
 752                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 753                                 return false;
 754                 return true;
 755         }
 756
 757         /* variable MTRRs */
 758         return valid_mtrr_type(data & 0xff);
 759 }
 760
 761 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 762 {
 763         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 764
 765         if (!mtrr_valid(vcpu, msr, data))
 766                 return 1;
 767
 768         if (msr == MSR_MTRRdefType) {
 769                 vcpu->arch.mtrr_state.def_type = data;
 770                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 771         } else if (msr == MSR_MTRRfix64K_00000)
 772                 p[0] = data;
 773         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 774                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 775         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 776                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 777         else if (msr == MSR_IA32_CR_PAT)
 778                 vcpu->arch.pat = data;
 779         else {  /* Variable MTRRs */
 780                 int idx, is_mtrr_mask;
 781                 u64 *pt;
 782
 783                 idx = (msr - 0x200) / 2;
 784                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 785                 if (!is_mtrr_mask)
 786                         pt =
 787                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 788                 else
 789                         pt =
 790                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 791                 *pt = data;
 792         }
 793
 794         kvm_mmu_reset_context(vcpu);
 795         return 0;
 796 }
 797
 798 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 799 {
 800         u64 mcg_cap = vcpu->arch.mcg_cap;
 801         unsigned bank_num = mcg_cap & 0xff;
 802
 803         switch (msr) {
 804         case MSR_IA32_MCG_STATUS:
 805                 vcpu->arch.mcg_status = data;
 806                 break;
 807         case MSR_IA32_MCG_CTL:
 808                 if (!(mcg_cap & MCG_CTL_P))
 809                         return 1;
 810                 if (data != 0 && data != ~(u64)0)
 811                         return -1;
 812                 vcpu->arch.mcg_ctl = data;
 813                 break;
 814         default:
 815                 if (msr >= MSR_IA32_MC0_CTL &&
 816                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 817                         u32 offset = msr - MSR_IA32_MC0_CTL;
 818                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 819                         if ((offset & 0x3) == 0 &&
 820                             data != 0 && data != ~(u64)0)
 821                                 return -1;
 822                         vcpu->arch.mce_banks[offset] = data;
 823                         break;
 824                 }
 825                 return 1;
 826         }
 827         return 0;
 828 }
 829
 830 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 831 {
 832         switch (msr) {
 833         case MSR_EFER:
 834                 set_efer(vcpu, data);
 835                 break;
 836         case MSR_IA32_DEBUGCTLMSR:
 837                 if (!data) {
 838                         /* We support the non-activated case already */
 839                         break;
 840                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 841                         /* Values other than LBR and BTF are vendor-specific,
 842                            thus reserved and should throw a #GP */
 843                         return 1;
 844                 }
 845                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 846                         __func__, data);
 847                 break;
 848         case MSR_IA32_UCODE_REV:
 849         case MSR_IA32_UCODE_WRITE:
 850         case MSR_VM_HSAVE_PA:
 851                 break;
 852         case 0x200 ... 0x2ff:
 853                 return set_msr_mtrr(vcpu, msr, data);
 854         case MSR_IA32_APICBASE:
 855                 kvm_set_apic_base(vcpu, data);
 856                 break;
 857         case MSR_IA32_MISC_ENABLE:
 858                 vcpu->arch.ia32_misc_enable_msr = data;
 859                 break;
 860         case MSR_KVM_WALL_CLOCK:
 861                 vcpu->kvm->arch.wall_clock = data;
 862                 kvm_write_wall_clock(vcpu->kvm, data);
 863                 break;
 864         case MSR_KVM_SYSTEM_TIME: {
 865                 if (vcpu->arch.time_page) {
 866                         kvm_release_page_dirty(vcpu->arch.time_page);
 867                         vcpu->arch.time_page = NULL;
 868                 }
 869
 870                 vcpu->arch.time = data;
 871
 872                 /* we verify if the enable bit is set... */
 873                 if (!(data & 1))
 874                         break;
 875
 876                 /* ...but clean it before doing the actual write */
 877                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 878
 879                 vcpu->arch.time_page =
 880                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 881
 882                 if (is_error_page(vcpu->arch.time_page)) {
 883                         kvm_release_page_clean(vcpu->arch.time_page);
 884                         vcpu->arch.time_page = NULL;
 885                 }
 886
 887                 kvm_request_guest_time_update(vcpu);
 888                 break;
 889         }
 890         case MSR_IA32_MCG_CTL:
 891         case MSR_IA32_MCG_STATUS:
 892         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 893                 return set_msr_mce(vcpu, msr, data);
 894
 895         /* Performance counters are not protected by a CPUID bit,
 896          * so we should check all of them in the generic path for the sake of
 897          * cross vendor migration.
 898          * Writing a zero into the event select MSRs disables them,
 899          * which we perfectly emulate ;-). Any other value should be at least
 900          * reported, some guests depend on them.
 901          */
 902         case MSR_P6_EVNTSEL0:
 903         case MSR_P6_EVNTSEL1:
 904         case MSR_K7_EVNTSEL0:
 905         case MSR_K7_EVNTSEL1:
 906         case MSR_K7_EVNTSEL2:
 907         case MSR_K7_EVNTSEL3:
 908                 if (data != 0)
 909                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 910                                 "0x%x data 0x%llx\n", msr, data);
 911                 break;
 912         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 913          * so we ignore writes to make it happy.
 914          */
 915         case MSR_P6_PERFCTR0:
 916         case MSR_P6_PERFCTR1:
 917         case MSR_K7_PERFCTR0:
 918         case MSR_K7_PERFCTR1:
 919         case MSR_K7_PERFCTR2:
 920         case MSR_K7_PERFCTR3:
 921                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 922                         "0x%x data 0x%llx\n", msr, data);
 923                 break;
 924         default:
 925                 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
 926                 return 1;
 927         }
 928         return 0;
 929 }
 930 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 931
 932
 933 /*
 934  * Reads an msr value (of 'msr_index') into 'pdata'.
 935  * Returns 0 on success, non-0 otherwise.
 936  * Assumes vcpu_load() was already called.
 937  */
 938 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 939 {
 940         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 941 }
 942
 943 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 944 {
 945         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 946
 947         if (!msr_mtrr_valid(msr))
 948                 return 1;
 949
 950         if (msr == MSR_MTRRdefType)
 951                 *pdata = vcpu->arch.mtrr_state.def_type +
 952                          (vcpu->arch.mtrr_state.enabled << 10);
 953         else if (msr == MSR_MTRRfix64K_00000)
 954                 *pdata = p[0];
 955         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 956                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 957         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 958                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 959         else if (msr == MSR_IA32_CR_PAT)
 960                 *pdata = vcpu->arch.pat;
 961         else {  /* Variable MTRRs */
 962                 int idx, is_mtrr_mask;
 963                 u64 *pt;
 964
 965                 idx = (msr - 0x200) / 2;
 966                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 967                 if (!is_mtrr_mask)
 968                         pt =
 969                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 970                 else
 971                         pt =
 972                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 973                 *pdata = *pt;
 974         }
 975
 976         return 0;
 977 }
 978
 979 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 980 {
 981         u64 data;
 982         u64 mcg_cap = vcpu->arch.mcg_cap;
 983         unsigned bank_num = mcg_cap & 0xff;
 984
 985         switch (msr) {
 986         case MSR_IA32_P5_MC_ADDR:
 987         case MSR_IA32_P5_MC_TYPE:
 988                 data = 0;
 989                 break;
 990         case MSR_IA32_MCG_CAP:
 991                 data = vcpu->arch.mcg_cap;
 992                 break;
 993         case MSR_IA32_MCG_CTL:
 994                 if (!(mcg_cap & MCG_CTL_P))
 995                         return 1;
 996                 data = vcpu->arch.mcg_ctl;
 997                 break;
 998         case MSR_IA32_MCG_STATUS:
 999                 data = vcpu->arch.mcg_status;
1000                 break;
1001         default:
1002                 if (msr >= MSR_IA32_MC0_CTL &&
1003                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1004                         u32 offset = msr - MSR_IA32_MC0_CTL;
1005                         data = vcpu->arch.mce_banks[offset];
1006                         break;
1007                 }
1008                 return 1;
1009         }
1010         *pdata = data;
1011         return 0;
1012 }
1013
1014 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1015 {
1016         u64 data;
1017
1018         switch (msr) {
1019         case MSR_IA32_PLATFORM_ID:
1020         case MSR_IA32_UCODE_REV:
1021         case MSR_IA32_EBL_CR_POWERON:
1022         case MSR_IA32_DEBUGCTLMSR:
1023         case MSR_IA32_LASTBRANCHFROMIP:
1024         case MSR_IA32_LASTBRANCHTOIP:
1025         case MSR_IA32_LASTINTFROMIP:
1026         case MSR_IA32_LASTINTTOIP:
1027         case MSR_K8_SYSCFG:
1028         case MSR_K7_HWCR:
1029         case MSR_VM_HSAVE_PA:
1030         case MSR_P6_EVNTSEL0:
1031         case MSR_P6_EVNTSEL1:
1032         case MSR_K7_EVNTSEL0:
1033                 data = 0;
1034                 break;
1035         case MSR_MTRRcap:
1036                 data = 0x500 | KVM_NR_VAR_MTRR;
1037                 break;
1038         case 0x200 ... 0x2ff:
1039                 return get_msr_mtrr(vcpu, msr, pdata);
1040         case 0xcd: /* fsb frequency */
1041                 data = 3;
1042                 break;
1043         case MSR_IA32_APICBASE:
1044                 data = kvm_get_apic_base(vcpu);
1045                 break;
1046         case MSR_IA32_MISC_ENABLE:
1047                 data = vcpu->arch.ia32_misc_enable_msr;
1048                 break;
1049         case MSR_IA32_PERF_STATUS:
1050                 /* TSC increment by tick */
1051                 data = 1000ULL;
1052                 /* CPU multiplier */
1053                 data |= (((uint64_t)4ULL) << 40);
1054                 break;
1055         case MSR_EFER:
1056                 data = vcpu->arch.shadow_efer;
1057                 break;
1058         case MSR_KVM_WALL_CLOCK:
1059                 data = vcpu->kvm->arch.wall_clock;
1060                 break;
1061         case MSR_KVM_SYSTEM_TIME:
1062                 data = vcpu->arch.time;
1063                 break;
1064         case MSR_IA32_P5_MC_ADDR:
1065         case MSR_IA32_P5_MC_TYPE:
1066         case MSR_IA32_MCG_CAP:
1067         case MSR_IA32_MCG_CTL:
1068         case MSR_IA32_MCG_STATUS:
1069         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1070                 return get_msr_mce(vcpu, msr, pdata);
1071         default:
1072                 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1073                 return 1;
1074         }
1075         *pdata = data;
1076         return 0;
1077 }
1078 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1079
1080 /*
1081  * Read or write a bunch of msrs. All parameters are kernel addresses.
1082  *
1083  * @return number of msrs set successfully.
1084  */
1085 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1086                     struct kvm_msr_entry *entries,
1087                     int (*do_msr)(struct kvm_vcpu *vcpu,
1088                                   unsigned index, u64 *data))
1089 {
1090         int i;
1091
1092         vcpu_load(vcpu);
1093
1094         down_read(&vcpu->kvm->slots_lock);
1095         for (i = 0; i < msrs->nmsrs; ++i)
1096                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1097                         break;
1098         up_read(&vcpu->kvm->slots_lock);
1099
1100         vcpu_put(vcpu);
1101
1102         return i;
1103 }
1104
1105 /*
1106  * Read or write a bunch of msrs. Parameters are user addresses.
1107  *
1108  * @return number of msrs set successfully.
1109  */
1110 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1111                   int (*do_msr)(struct kvm_vcpu *vcpu,
1112                                 unsigned index, u64 *data),
1113                   int writeback)
1114 {
1115         struct kvm_msrs msrs;
1116         struct kvm_msr_entry *entries;
1117         int r, n;
1118         unsigned size;
1119
1120         r = -EFAULT;
1121         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1122                 goto out;
1123
1124         r = -E2BIG;
1125         if (msrs.nmsrs >= MAX_IO_MSRS)
1126                 goto out;
1127
1128         r = -ENOMEM;
1129         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1130         entries = vmalloc(size);
1131         if (!entries)
1132                 goto out;
1133
1134         r = -EFAULT;
1135         if (copy_from_user(entries, user_msrs->entries, size))
1136                 goto out_free;
1137
1138         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1139         if (r < 0)
1140                 goto out_free;
1141
1142         r = -EFAULT;
1143         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1144                 goto out_free;
1145
1146         r = n;
1147
1148 out_free:
1149         vfree(entries);
1150 out:
1151         return r;
1152 }
1153
1154 int kvm_dev_ioctl_check_extension(long ext)
1155 {
1156         int r;
1157
1158         switch (ext) {
1159         case KVM_CAP_IRQCHIP:
1160         case KVM_CAP_HLT:
1161         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1162         case KVM_CAP_SET_TSS_ADDR:
1163         case KVM_CAP_EXT_CPUID:
1164         case KVM_CAP_CLOCKSOURCE:
1165         case KVM_CAP_PIT:
1166         case KVM_CAP_NOP_IO_DELAY:
1167         case KVM_CAP_MP_STATE:
1168         case KVM_CAP_SYNC_MMU:
1169         case KVM_CAP_REINJECT_CONTROL:
1170         case KVM_CAP_IRQ_INJECT_STATUS:
1171         case KVM_CAP_ASSIGN_DEV_IRQ:
1172         case KVM_CAP_IRQFD:
1173         case KVM_CAP_PIT2:
1174                 r = 1;
1175                 break;
1176         case KVM_CAP_COALESCED_MMIO:
1177                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1178                 break;
1179         case KVM_CAP_VAPIC:
1180                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1181                 break;
1182         case KVM_CAP_NR_VCPUS:
1183                 r = KVM_MAX_VCPUS;
1184                 break;
1185         case KVM_CAP_NR_MEMSLOTS:
1186                 r = KVM_MEMORY_SLOTS;
1187                 break;
1188         case KVM_CAP_PV_MMU:
1189                 r = !tdp_enabled;
1190                 break;
1191         case KVM_CAP_IOMMU:
1192                 r = iommu_found();
1193                 break;
1194         case KVM_CAP_MCE:
1195                 r = KVM_MAX_MCE_BANKS;
1196                 break;
1197         default:
1198                 r = 0;
1199                 break;
1200         }
1201         return r;
1202
1203 }
1204
1205 long kvm_arch_dev_ioctl(struct file *filp,
1206                         unsigned int ioctl, unsigned long arg)
1207 {
1208         void __user *argp = (void __user *)arg;
1209         long r;
1210
1211         switch (ioctl) {
1212         case KVM_GET_MSR_INDEX_LIST: {
1213                 struct kvm_msr_list __user *user_msr_list = argp;
1214                 struct kvm_msr_list msr_list;
1215                 unsigned n;
1216
1217                 r = -EFAULT;
1218                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1219                         goto out;
1220                 n = msr_list.nmsrs;
1221                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1222                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1223                         goto out;
1224                 r = -E2BIG;
1225                 if (n < msr_list.nmsrs)
1226                         goto out;
1227                 r = -EFAULT;
1228                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1229                                  num_msrs_to_save * sizeof(u32)))
1230                         goto out;
1231                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1232                                  &emulated_msrs,
1233                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1234                         goto out;
1235                 r = 0;
1236                 break;
1237         }
1238         case KVM_GET_SUPPORTED_CPUID: {
1239                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1240                 struct kvm_cpuid2 cpuid;
1241
1242                 r = -EFAULT;
1243                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1244                         goto out;
1245                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1246                                                       cpuid_arg->entries);
1247                 if (r)
1248                         goto out;
1249
1250                 r = -EFAULT;
1251                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1252                         goto out;
1253                 r = 0;
1254                 break;
1255         }
1256         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1257                 u64 mce_cap;
1258
1259                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1260                 r = -EFAULT;
1261                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1262                         goto out;
1263                 r = 0;
1264                 break;
1265         }
1266         default:
1267                 r = -EINVAL;
1268         }
1269 out:
1270         return r;
1271 }
1272
1273 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1274 {
1275         kvm_x86_ops->vcpu_load(vcpu, cpu);
1276         kvm_request_guest_time_update(vcpu);
1277 }
1278
1279 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1280 {
1281         kvm_x86_ops->vcpu_put(vcpu);
1282         kvm_put_guest_fpu(vcpu);
1283 }
1284
1285 static int is_efer_nx(void)
1286 {
1287         unsigned long long efer = 0;
1288
1289         rdmsrl_safe(MSR_EFER, &efer);
1290         return efer & EFER_NX;
1291 }
1292
1293 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1294 {
1295         int i;
1296         struct kvm_cpuid_entry2 *e, *entry;
1297
1298         entry = NULL;
1299         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1300                 e = &vcpu->arch.cpuid_entries[i];
1301                 if (e->function == 0x80000001) {
1302                         entry = e;
1303                         break;
1304                 }
1305         }
1306         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1307                 entry->edx &= ~(1 << 20);
1308                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1309         }
1310 }
1311
1312 /* when an old userspace process fills a new kernel module */
1313 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1314                                     struct kvm_cpuid *cpuid,
1315                                     struct kvm_cpuid_entry __user *entries)
1316 {
1317         int r, i;
1318         struct kvm_cpuid_entry *cpuid_entries;
1319
1320         r = -E2BIG;
1321         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1322                 goto out;
1323         r = -ENOMEM;
1324         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1325         if (!cpuid_entries)
1326                 goto out;
1327         r = -EFAULT;
1328         if (copy_from_user(cpuid_entries, entries,
1329                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1330                 goto out_free;
1331         for (i = 0; i < cpuid->nent; i++) {
1332                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1333                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1334                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1335                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1336                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1337                 vcpu->arch.cpuid_entries[i].index = 0;
1338                 vcpu->arch.cpuid_entries[i].flags = 0;
1339                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1340                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1341                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1342         }
1343         vcpu->arch.cpuid_nent = cpuid->nent;
1344         cpuid_fix_nx_cap(vcpu);
1345         r = 0;
1346
1347 out_free:
1348         vfree(cpuid_entries);
1349 out:
1350         return r;
1351 }
1352
1353 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1354                                      struct kvm_cpuid2 *cpuid,
1355                                      struct kvm_cpuid_entry2 __user *entries)
1356 {
1357         int r;
1358
1359         r = -E2BIG;
1360         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1361                 goto out;
1362         r = -EFAULT;
1363         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1364                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1365                 goto out;
1366         vcpu->arch.cpuid_nent = cpuid->nent;
1367         return 0;
1368
1369 out:
1370         return r;
1371 }
1372
1373 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1374                                      struct kvm_cpuid2 *cpuid,
1375                                      struct kvm_cpuid_entry2 __user *entries)
1376 {
1377         int r;
1378
1379         r = -E2BIG;
1380         if (cpuid->nent < vcpu->arch.cpuid_nent)
1381                 goto out;
1382         r = -EFAULT;
1383         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1384                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1385                 goto out;
1386         return 0;
1387
1388 out:
1389         cpuid->nent = vcpu->arch.cpuid_nent;
1390         return r;
1391 }
1392
1393 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1394                            u32 index)
1395 {
1396         entry->function = function;
1397         entry->index = index;
1398         cpuid_count(entry->function, entry->index,
1399                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1400         entry->flags = 0;
1401 }
1402
1403 #define F(x) bit(X86_FEATURE_##x)
1404
1405 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1406                          u32 index, int *nent, int maxnent)
1407 {
1408         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1409 #ifdef CONFIG_X86_64
1410         unsigned f_lm = F(LM);
1411 #else
1412         unsigned f_lm = 0;
1413 #endif
1414
1415         /* cpuid 1.edx */
1416         const u32 kvm_supported_word0_x86_features =
1417                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1418                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1419                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1420                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1421                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1422                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1423                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1424                 0 /* HTT, TM, Reserved, PBE */;
1425         /* cpuid 0x80000001.edx */
1426         const u32 kvm_supported_word1_x86_features =
1427                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1428                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1429                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1430                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1431                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1432                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1433                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1434                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1435         /* cpuid 1.ecx */
1436         const u32 kvm_supported_word4_x86_features =
1437                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1438                 0 /* DS-CPL, VMX, SMX, EST */ |
1439                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1440                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1441                 0 /* Reserved, DCA */ | F(XMM4_1) |
1442                 F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
1443                 0 /* Reserved, XSAVE, OSXSAVE */;
1444         /* cpuid 0x80000001.ecx */
1445         const u32 kvm_supported_word6_x86_features =
1446                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1447                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1448                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1449                 0 /* SKINIT */ | 0 /* WDT */;
1450
1451         /* all calls to cpuid_count() should be made on the same cpu */
1452         get_cpu();
1453         do_cpuid_1_ent(entry, function, index);
1454         ++*nent;
1455
1456         switch (function) {
1457         case 0:
1458                 entry->eax = min(entry->eax, (u32)0xb);
1459                 break;
1460         case 1:
1461                 entry->edx &= kvm_supported_word0_x86_features;
1462                 entry->ecx &= kvm_supported_word4_x86_features;
1463                 break;
1464         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1465          * may return different values. This forces us to get_cpu() before
1466          * issuing the first command, and also to emulate this annoying behavior
1467          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1468         case 2: {
1469                 int t, times = entry->eax & 0xff;
1470
1471                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1472                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1473                 for (t = 1; t < times && *nent < maxnent; ++t) {
1474                         do_cpuid_1_ent(&entry[t], function, 0);
1475                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1476                         ++*nent;
1477                 }
1478                 break;
1479         }
1480         /* function 4 and 0xb have additional index. */
1481         case 4: {
1482                 int i, cache_type;
1483
1484                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1485                 /* read more entries until cache_type is zero */
1486                 for (i = 1; *nent < maxnent; ++i) {
1487                         cache_type = entry[i - 1].eax & 0x1f;
1488                         if (!cache_type)
1489                                 break;
1490                         do_cpuid_1_ent(&entry[i], function, i);
1491                         entry[i].flags |=
1492                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1493                         ++*nent;
1494                 }
1495                 break;
1496         }
1497         case 0xb: {
1498                 int i, level_type;
1499
1500                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1501                 /* read more entries until level_type is zero */
1502                 for (i = 1; *nent < maxnent; ++i) {
1503                         level_type = entry[i - 1].ecx & 0xff00;
1504                         if (!level_type)
1505                                 break;
1506                         do_cpuid_1_ent(&entry[i], function, i);
1507                         entry[i].flags |=
1508                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1509                         ++*nent;
1510                 }
1511                 break;
1512         }
1513         case 0x80000000:
1514                 entry->eax = min(entry->eax, 0x8000001a);
1515                 break;
1516         case 0x80000001:
1517                 entry->edx &= kvm_supported_word1_x86_features;
1518                 entry->ecx &= kvm_supported_word6_x86_features;
1519                 break;
1520         }
1521         put_cpu();
1522 }
1523
1524 #undef F
1525
1526 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1527                                      struct kvm_cpuid_entry2 __user *entries)
1528 {
1529         struct kvm_cpuid_entry2 *cpuid_entries;
1530         int limit, nent = 0, r = -E2BIG;
1531         u32 func;
1532
1533         if (cpuid->nent < 1)
1534                 goto out;
1535         r = -ENOMEM;
1536         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1537         if (!cpuid_entries)
1538                 goto out;
1539
1540         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1541         limit = cpuid_entries[0].eax;
1542         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1543                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1544                              &nent, cpuid->nent);
1545         r = -E2BIG;
1546         if (nent >= cpuid->nent)
1547                 goto out_free;
1548
1549         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1550         limit = cpuid_entries[nent - 1].eax;
1551         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1552                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1553                              &nent, cpuid->nent);
1554         r = -E2BIG;
1555         if (nent >= cpuid->nent)
1556                 goto out_free;
1557
1558         r = -EFAULT;
1559         if (copy_to_user(entries, cpuid_entries,
1560                          nent * sizeof(struct kvm_cpuid_entry2)))
1561                 goto out_free;
1562         cpuid->nent = nent;
1563         r = 0;
1564
1565 out_free:
1566         vfree(cpuid_entries);
1567 out:
1568         return r;
1569 }
1570
1571 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1572                                     struct kvm_lapic_state *s)
1573 {
1574         vcpu_load(vcpu);
1575         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1576         vcpu_put(vcpu);
1577
1578         return 0;
1579 }
1580
1581 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1582                                     struct kvm_lapic_state *s)
1583 {
1584         vcpu_load(vcpu);
1585         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1586         kvm_apic_post_state_restore(vcpu);
1587         vcpu_put(vcpu);
1588
1589         return 0;
1590 }
1591
1592 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1593                                     struct kvm_interrupt *irq)
1594 {
1595         if (irq->irq < 0 || irq->irq >= 256)
1596                 return -EINVAL;
1597         if (irqchip_in_kernel(vcpu->kvm))
1598                 return -ENXIO;
1599         vcpu_load(vcpu);
1600
1601         kvm_queue_interrupt(vcpu, irq->irq, false);
1602
1603         vcpu_put(vcpu);
1604
1605         return 0;
1606 }
1607
1608 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1609 {
1610         vcpu_load(vcpu);
1611         kvm_inject_nmi(vcpu);
1612         vcpu_put(vcpu);
1613
1614         return 0;
1615 }
1616
1617 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1618                                            struct kvm_tpr_access_ctl *tac)
1619 {
1620         if (tac->flags)
1621                 return -EINVAL;
1622         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1623         return 0;
1624 }
1625
1626 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1627                                         u64 mcg_cap)
1628 {
1629         int r;
1630         unsigned bank_num = mcg_cap & 0xff, bank;
1631
1632         r = -EINVAL;
1633         if (!bank_num)
1634                 goto out;
1635         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1636                 goto out;
1637         r = 0;
1638         vcpu->arch.mcg_cap = mcg_cap;
1639         /* Init IA32_MCG_CTL to all 1s */
1640         if (mcg_cap & MCG_CTL_P)
1641                 vcpu->arch.mcg_ctl = ~(u64)0;
1642         /* Init IA32_MCi_CTL to all 1s */
1643         for (bank = 0; bank < bank_num; bank++)
1644                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1645 out:
1646         return r;
1647 }
1648
1649 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1650                                       struct kvm_x86_mce *mce)
1651 {
1652         u64 mcg_cap = vcpu->arch.mcg_cap;
1653         unsigned bank_num = mcg_cap & 0xff;
1654         u64 *banks = vcpu->arch.mce_banks;
1655
1656         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1657                 return -EINVAL;
1658         /*
1659          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1660          * reporting is disabled
1661          */
1662         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1663             vcpu->arch.mcg_ctl != ~(u64)0)
1664                 return 0;
1665         banks += 4 * mce->bank;
1666         /*
1667          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1668          * reporting is disabled for the bank
1669          */
1670         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1671                 return 0;
1672         if (mce->status & MCI_STATUS_UC) {
1673                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1674                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1675                         printk(KERN_DEBUG "kvm: set_mce: "
1676                                "injects mce exception while "
1677                                "previous one is in progress!\n");
1678                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1679                         return 0;
1680                 }
1681                 if (banks[1] & MCI_STATUS_VAL)
1682                         mce->status |= MCI_STATUS_OVER;
1683                 banks[2] = mce->addr;
1684                 banks[3] = mce->misc;
1685                 vcpu->arch.mcg_status = mce->mcg_status;
1686                 banks[1] = mce->status;
1687                 kvm_queue_exception(vcpu, MC_VECTOR);
1688         } else if (!(banks[1] & MCI_STATUS_VAL)
1689                    || !(banks[1] & MCI_STATUS_UC)) {
1690                 if (banks[1] & MCI_STATUS_VAL)
1691                         mce->status |= MCI_STATUS_OVER;
1692                 banks[2] = mce->addr;
1693                 banks[3] = mce->misc;
1694                 banks[1] = mce->status;
1695         } else
1696                 banks[1] |= MCI_STATUS_OVER;
1697         return 0;
1698 }
1699
1700 long kvm_arch_vcpu_ioctl(struct file *filp,
1701                          unsigned int ioctl, unsigned long arg)
1702 {
1703         struct kvm_vcpu *vcpu = filp->private_data;
1704         void __user *argp = (void __user *)arg;
1705         int r;
1706         struct kvm_lapic_state *lapic = NULL;
1707
1708         switch (ioctl) {
1709         case KVM_GET_LAPIC: {
1710                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1711
1712                 r = -ENOMEM;
1713                 if (!lapic)
1714                         goto out;
1715                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1716                 if (r)
1717                         goto out;
1718                 r = -EFAULT;
1719                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1720                         goto out;
1721                 r = 0;
1722                 break;
1723         }
1724         case KVM_SET_LAPIC: {
1725                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1726                 r = -ENOMEM;
1727                 if (!lapic)
1728                         goto out;
1729                 r = -EFAULT;
1730                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1731                         goto out;
1732                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1733                 if (r)
1734                         goto out;
1735                 r = 0;
1736                 break;
1737         }
1738         case KVM_INTERRUPT: {
1739                 struct kvm_interrupt irq;
1740
1741                 r = -EFAULT;
1742                 if (copy_from_user(&irq, argp, sizeof irq))
1743                         goto out;
1744                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1745                 if (r)
1746                         goto out;
1747                 r = 0;
1748                 break;
1749         }
1750         case KVM_NMI: {
1751                 r = kvm_vcpu_ioctl_nmi(vcpu);
1752                 if (r)
1753                         goto out;
1754                 r = 0;
1755                 break;
1756         }
1757         case KVM_SET_CPUID: {
1758                 struct kvm_cpuid __user *cpuid_arg = argp;
1759                 struct kvm_cpuid cpuid;
1760
1761                 r = -EFAULT;
1762                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1763                         goto out;
1764                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1765                 if (r)
1766                         goto out;
1767                 break;
1768         }
1769         case KVM_SET_CPUID2: {
1770                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1771                 struct kvm_cpuid2 cpuid;
1772
1773                 r = -EFAULT;
1774                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1775                         goto out;
1776                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1777                                               cpuid_arg->entries);
1778                 if (r)
1779                         goto out;
1780                 break;
1781         }
1782         case KVM_GET_CPUID2: {
1783                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1784                 struct kvm_cpuid2 cpuid;
1785
1786                 r = -EFAULT;
1787                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1788                         goto out;
1789                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1790                                               cpuid_arg->entries);
1791                 if (r)
1792                         goto out;
1793                 r = -EFAULT;
1794                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1795                         goto out;
1796                 r = 0;
1797                 break;
1798         }
1799         case KVM_GET_MSRS:
1800                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1801                 break;
1802         case KVM_SET_MSRS:
1803                 r = msr_io(vcpu, argp, do_set_msr, 0);
1804                 break;
1805         case KVM_TPR_ACCESS_REPORTING: {
1806                 struct kvm_tpr_access_ctl tac;
1807
1808                 r = -EFAULT;
1809                 if (copy_from_user(&tac, argp, sizeof tac))
1810                         goto out;
1811                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1812                 if (r)
1813                         goto out;
1814                 r = -EFAULT;
1815                 if (copy_to_user(argp, &tac, sizeof tac))
1816                         goto out;
1817                 r = 0;
1818                 break;
1819         };
1820         case KVM_SET_VAPIC_ADDR: {
1821                 struct kvm_vapic_addr va;
1822
1823                 r = -EINVAL;
1824                 if (!irqchip_in_kernel(vcpu->kvm))
1825                         goto out;
1826                 r = -EFAULT;
1827                 if (copy_from_user(&va, argp, sizeof va))
1828                         goto out;
1829                 r = 0;
1830                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1831                 break;
1832         }
1833         case KVM_X86_SETUP_MCE: {
1834                 u64 mcg_cap;
1835
1836                 r = -EFAULT;
1837                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1838                         goto out;
1839                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1840                 break;
1841         }
1842         case KVM_X86_SET_MCE: {
1843                 struct kvm_x86_mce mce;
1844
1845                 r = -EFAULT;
1846                 if (copy_from_user(&mce, argp, sizeof mce))
1847                         goto out;
1848                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1849                 break;
1850         }
1851         default:
1852                 r = -EINVAL;
1853         }
1854 out:
1855         kfree(lapic);
1856         return r;
1857 }
1858
1859 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1860 {
1861         int ret;
1862
1863         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1864                 return -1;
1865         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1866         return ret;
1867 }
1868
1869 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1870                                           u32 kvm_nr_mmu_pages)
1871 {
1872         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1873                 return -EINVAL;
1874
1875         down_write(&kvm->slots_lock);
1876         spin_lock(&kvm->mmu_lock);
1877
1878         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1879         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1880
1881         spin_unlock(&kvm->mmu_lock);
1882         up_write(&kvm->slots_lock);
1883         return 0;
1884 }
1885
1886 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1887 {
1888         return kvm->arch.n_alloc_mmu_pages;
1889 }
1890
1891 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1892 {
1893         int i;
1894         struct kvm_mem_alias *alias;
1895
1896         for (i = 0; i < kvm->arch.naliases; ++i) {
1897                 alias = &kvm->arch.aliases[i];
1898                 if (gfn >= alias->base_gfn
1899                     && gfn < alias->base_gfn + alias->npages)
1900                         return alias->target_gfn + gfn - alias->base_gfn;
1901         }
1902         return gfn;
1903 }
1904
1905 /*
1906  * Set a new alias region.  Aliases map a portion of physical memory into
1907  * another portion.  This is useful for memory windows, for example the PC
1908  * VGA region.
1909  */
1910 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1911                                          struct kvm_memory_alias *alias)
1912 {
1913         int r, n;
1914         struct kvm_mem_alias *p;
1915
1916         r = -EINVAL;
1917         /* General sanity checks */
1918         if (alias->memory_size & (PAGE_SIZE - 1))
1919                 goto out;
1920         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1921                 goto out;
1922         if (alias->slot >= KVM_ALIAS_SLOTS)
1923                 goto out;
1924         if (alias->guest_phys_addr + alias->memory_size
1925             < alias->guest_phys_addr)
1926                 goto out;
1927         if (alias->target_phys_addr + alias->memory_size
1928             < alias->target_phys_addr)
1929                 goto out;
1930
1931         down_write(&kvm->slots_lock);
1932         spin_lock(&kvm->mmu_lock);
1933
1934         p = &kvm->arch.aliases[alias->slot];
1935         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1936         p->npages = alias->memory_size >> PAGE_SHIFT;
1937         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1938
1939         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1940                 if (kvm->arch.aliases[n - 1].npages)
1941                         break;
1942         kvm->arch.naliases = n;
1943
1944         spin_unlock(&kvm->mmu_lock);
1945         kvm_mmu_zap_all(kvm);
1946
1947         up_write(&kvm->slots_lock);
1948
1949         return 0;
1950
1951 out:
1952         return r;
1953 }
1954
1955 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1956 {
1957         int r;
1958
1959         r = 0;
1960         switch (chip->chip_id) {
1961         case KVM_IRQCHIP_PIC_MASTER:
1962                 memcpy(&chip->chip.pic,
1963                         &pic_irqchip(kvm)->pics[0],
1964                         sizeof(struct kvm_pic_state));
1965                 break;
1966         case KVM_IRQCHIP_PIC_SLAVE:
1967                 memcpy(&chip->chip.pic,
1968                         &pic_irqchip(kvm)->pics[1],
1969                         sizeof(struct kvm_pic_state));
1970                 break;
1971         case KVM_IRQCHIP_IOAPIC:
1972                 memcpy(&chip->chip.ioapic,
1973                         ioapic_irqchip(kvm),
1974                         sizeof(struct kvm_ioapic_state));
1975                 break;
1976         default:
1977                 r = -EINVAL;
1978                 break;
1979         }
1980         return r;
1981 }
1982
1983 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1984 {
1985         int r;
1986
1987         r = 0;
1988         switch (chip->chip_id) {
1989         case KVM_IRQCHIP_PIC_MASTER:
1990                 memcpy(&pic_irqchip(kvm)->pics[0],
1991                         &chip->chip.pic,
1992                         sizeof(struct kvm_pic_state));
1993                 break;
1994         case KVM_IRQCHIP_PIC_SLAVE:
1995                 memcpy(&pic_irqchip(kvm)->pics[1],
1996                         &chip->chip.pic,
1997                         sizeof(struct kvm_pic_state));
1998                 break;
1999         case KVM_IRQCHIP_IOAPIC:
2000                 memcpy(ioapic_irqchip(kvm),
2001                         &chip->chip.ioapic,
2002                         sizeof(struct kvm_ioapic_state));
2003                 break;
2004         default:
2005                 r = -EINVAL;
2006                 break;
2007         }
2008         kvm_pic_update_irq(pic_irqchip(kvm));
2009         return r;
2010 }
2011
2012 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2013 {
2014         int r = 0;
2015
2016         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2017         return r;
2018 }
2019
2020 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2021 {
2022         int r = 0;
2023
2024         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2025         kvm_pit_load_count(kvm, 0, ps->channels[0].count);
2026         return r;
2027 }
2028
2029 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2030                                  struct kvm_reinject_control *control)
2031 {
2032         if (!kvm->arch.vpit)
2033                 return -ENXIO;
2034         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2035         return 0;
2036 }
2037
2038 /*
2039  * Get (and clear) the dirty memory log for a memory slot.
2040  */
2041 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2042                                       struct kvm_dirty_log *log)
2043 {
2044         int r;
2045         int n;
2046         struct kvm_memory_slot *memslot;
2047         int is_dirty = 0;
2048
2049         down_write(&kvm->slots_lock);
2050
2051         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2052         if (r)
2053                 goto out;
2054
2055         /* If nothing is dirty, don't bother messing with page tables. */
2056         if (is_dirty) {
2057                 spin_lock(&kvm->mmu_lock);
2058                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2059                 spin_unlock(&kvm->mmu_lock);
2060                 kvm_flush_remote_tlbs(kvm);
2061                 memslot = &kvm->memslots[log->slot];
2062                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2063                 memset(memslot->dirty_bitmap, 0, n);
2064         }
2065         r = 0;
2066 out:
2067         up_write(&kvm->slots_lock);
2068         return r;
2069 }
2070
2071 long kvm_arch_vm_ioctl(struct file *filp,
2072                        unsigned int ioctl, unsigned long arg)
2073 {
2074         struct kvm *kvm = filp->private_data;
2075         void __user *argp = (void __user *)arg;
2076         int r = -EINVAL;
2077         /*
2078          * This union makes it completely explicit to gcc-3.x
2079          * that these two variables' stack usage should be
2080          * combined, not added together.
2081          */
2082         union {
2083                 struct kvm_pit_state ps;
2084                 struct kvm_memory_alias alias;
2085                 struct kvm_pit_config pit_config;
2086         } u;
2087
2088         switch (ioctl) {
2089         case KVM_SET_TSS_ADDR:
2090                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2091                 if (r < 0)
2092                         goto out;
2093                 break;
2094         case KVM_SET_MEMORY_REGION: {
2095                 struct kvm_memory_region kvm_mem;
2096                 struct kvm_userspace_memory_region kvm_userspace_mem;
2097
2098                 r = -EFAULT;
2099                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2100                         goto out;
2101                 kvm_userspace_mem.slot = kvm_mem.slot;
2102                 kvm_userspace_mem.flags = kvm_mem.flags;
2103                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2104                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2105                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2106                 if (r)
2107                         goto out;
2108                 break;
2109         }
2110         case KVM_SET_NR_MMU_PAGES:
2111                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2112                 if (r)
2113                         goto out;
2114                 break;
2115         case KVM_GET_NR_MMU_PAGES:
2116                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2117                 break;
2118         case KVM_SET_MEMORY_ALIAS:
2119                 r = -EFAULT;
2120                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2121                         goto out;
2122                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2123                 if (r)
2124                         goto out;
2125                 break;
2126         case KVM_CREATE_IRQCHIP:
2127                 r = -ENOMEM;
2128                 kvm->arch.vpic = kvm_create_pic(kvm);
2129                 if (kvm->arch.vpic) {
2130                         r = kvm_ioapic_init(kvm);
2131                         if (r) {
2132                                 kfree(kvm->arch.vpic);
2133                                 kvm->arch.vpic = NULL;
2134                                 goto out;
2135                         }
2136                 } else
2137                         goto out;
2138                 r = kvm_setup_default_irq_routing(kvm);
2139                 if (r) {
2140                         kfree(kvm->arch.vpic);
2141                         kfree(kvm->arch.vioapic);
2142                         goto out;
2143                 }
2144                 break;
2145         case KVM_CREATE_PIT:
2146                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2147                 goto create_pit;
2148         case KVM_CREATE_PIT2:
2149                 r = -EFAULT;
2150                 if (copy_from_user(&u.pit_config, argp,
2151                                    sizeof(struct kvm_pit_config)))
2152                         goto out;
2153         create_pit:
2154                 mutex_lock(&kvm->lock);
2155                 r = -EEXIST;
2156                 if (kvm->arch.vpit)
2157                         goto create_pit_unlock;
2158                 r = -ENOMEM;
2159                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2160                 if (kvm->arch.vpit)
2161                         r = 0;
2162         create_pit_unlock:
2163                 mutex_unlock(&kvm->lock);
2164                 break;
2165         case KVM_IRQ_LINE_STATUS:
2166         case KVM_IRQ_LINE: {
2167                 struct kvm_irq_level irq_event;
2168
2169                 r = -EFAULT;
2170                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2171                         goto out;
2172                 if (irqchip_in_kernel(kvm)) {
2173                         __s32 status;
2174                         mutex_lock(&kvm->irq_lock);
2175                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2176                                         irq_event.irq, irq_event.level);
2177                         mutex_unlock(&kvm->irq_lock);
2178                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2179                                 irq_event.status = status;
2180                                 if (copy_to_user(argp, &irq_event,
2181                                                         sizeof irq_event))
2182                                         goto out;
2183                         }
2184                         r = 0;
2185                 }
2186                 break;
2187         }
2188         case KVM_GET_IRQCHIP: {
2189                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2190                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2191
2192                 r = -ENOMEM;
2193                 if (!chip)
2194                         goto out;
2195                 r = -EFAULT;
2196                 if (copy_from_user(chip, argp, sizeof *chip))
2197                         goto get_irqchip_out;
2198                 r = -ENXIO;
2199                 if (!irqchip_in_kernel(kvm))
2200                         goto get_irqchip_out;
2201                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2202                 if (r)
2203                         goto get_irqchip_out;
2204                 r = -EFAULT;
2205                 if (copy_to_user(argp, chip, sizeof *chip))
2206                         goto get_irqchip_out;
2207                 r = 0;
2208         get_irqchip_out:
2209                 kfree(chip);
2210                 if (r)
2211                         goto out;
2212                 break;
2213         }
2214         case KVM_SET_IRQCHIP: {
2215                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2216                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2217
2218                 r = -ENOMEM;
2219                 if (!chip)
2220                         goto out;
2221                 r = -EFAULT;
2222                 if (copy_from_user(chip, argp, sizeof *chip))
2223                         goto set_irqchip_out;
2224                 r = -ENXIO;
2225                 if (!irqchip_in_kernel(kvm))
2226                         goto set_irqchip_out;
2227                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2228                 if (r)
2229                         goto set_irqchip_out;
2230                 r = 0;
2231         set_irqchip_out:
2232                 kfree(chip);
2233                 if (r)
2234                         goto out;
2235                 break;
2236         }
2237         case KVM_GET_PIT: {
2238                 r = -EFAULT;
2239                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2240                         goto out;
2241                 r = -ENXIO;
2242                 if (!kvm->arch.vpit)
2243                         goto out;
2244                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2245                 if (r)
2246                         goto out;
2247                 r = -EFAULT;
2248                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2249                         goto out;
2250                 r = 0;
2251                 break;
2252         }
2253         case KVM_SET_PIT: {
2254                 r = -EFAULT;
2255                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2256                         goto out;
2257                 r = -ENXIO;
2258                 if (!kvm->arch.vpit)
2259                         goto out;
2260                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2261                 if (r)
2262                         goto out;
2263                 r = 0;
2264                 break;
2265         }
2266         case KVM_REINJECT_CONTROL: {
2267                 struct kvm_reinject_control control;
2268                 r =  -EFAULT;
2269                 if (copy_from_user(&control, argp, sizeof(control)))
2270                         goto out;
2271                 r = kvm_vm_ioctl_reinject(kvm, &control);
2272                 if (r)
2273                         goto out;
2274                 r = 0;
2275                 break;
2276         }
2277         default:
2278                 ;
2279         }
2280 out:
2281         return r;
2282 }
2283
2284 static void kvm_init_msr_list(void)
2285 {
2286         u32 dummy[2];
2287         unsigned i, j;
2288
2289         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2290                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2291                         continue;
2292                 if (j < i)
2293                         msrs_to_save[j] = msrs_to_save[i];
2294                 j++;
2295         }
2296         num_msrs_to_save = j;
2297 }
2298
2299 /*
2300  * Only apic need an MMIO device hook, so shortcut now..
2301  */
2302 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2303                                                 gpa_t addr, int len,
2304                                                 int is_write)
2305 {
2306         struct kvm_io_device *dev;
2307
2308         if (vcpu->arch.apic) {
2309                 dev = &vcpu->arch.apic->dev;
2310                 if (kvm_iodevice_in_range(dev, addr, len, is_write))
2311                         return dev;
2312         }
2313         return NULL;
2314 }
2315
2316
2317 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2318                                                 gpa_t addr, int len,
2319                                                 int is_write)
2320 {
2321         struct kvm_io_device *dev;
2322
2323         dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2324         if (dev == NULL)
2325                 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2326                                           is_write);
2327         return dev;
2328 }
2329
2330 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2331                                struct kvm_vcpu *vcpu)
2332 {
2333         void *data = val;
2334         int r = X86EMUL_CONTINUE;
2335
2336         while (bytes) {
2337                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2338                 unsigned offset = addr & (PAGE_SIZE-1);
2339                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2340                 int ret;
2341
2342                 if (gpa == UNMAPPED_GVA) {
2343                         r = X86EMUL_PROPAGATE_FAULT;
2344                         goto out;
2345                 }
2346                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2347                 if (ret < 0) {
2348                         r = X86EMUL_UNHANDLEABLE;
2349                         goto out;
2350                 }
2351
2352                 bytes -= toread;
2353                 data += toread;
2354                 addr += toread;
2355         }
2356 out:
2357         return r;
2358 }
2359
2360 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2361                                 struct kvm_vcpu *vcpu)
2362 {
2363         void *data = val;
2364         int r = X86EMUL_CONTINUE;
2365
2366         while (bytes) {
2367                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2368                 unsigned offset = addr & (PAGE_SIZE-1);
2369                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2370                 int ret;
2371
2372                 if (gpa == UNMAPPED_GVA) {
2373                         r = X86EMUL_PROPAGATE_FAULT;
2374                         goto out;
2375                 }
2376                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2377                 if (ret < 0) {
2378                         r = X86EMUL_UNHANDLEABLE;
2379                         goto out;
2380                 }
2381
2382                 bytes -= towrite;
2383                 data += towrite;
2384                 addr += towrite;
2385         }
2386 out:
2387         return r;
2388 }
2389
2390
2391 static int emulator_read_emulated(unsigned long addr,
2392                                   void *val,
2393                                   unsigned int bytes,
2394                                   struct kvm_vcpu *vcpu)
2395 {
2396         struct kvm_io_device *mmio_dev;
2397         gpa_t                 gpa;
2398
2399         if (vcpu->mmio_read_completed) {
2400                 memcpy(val, vcpu->mmio_data, bytes);
2401                 vcpu->mmio_read_completed = 0;
2402                 return X86EMUL_CONTINUE;
2403         }
2404
2405         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2406
2407         /* For APIC access vmexit */
2408         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2409                 goto mmio;
2410
2411         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2412                                 == X86EMUL_CONTINUE)
2413                 return X86EMUL_CONTINUE;
2414         if (gpa == UNMAPPED_GVA)
2415                 return X86EMUL_PROPAGATE_FAULT;
2416
2417 mmio:
2418         /*
2419          * Is this MMIO handled locally?
2420          */
2421         mutex_lock(&vcpu->kvm->lock);
2422         mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2423         mutex_unlock(&vcpu->kvm->lock);
2424         if (mmio_dev) {
2425                 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2426                 return X86EMUL_CONTINUE;
2427         }
2428
2429         vcpu->mmio_needed = 1;
2430         vcpu->mmio_phys_addr = gpa;
2431         vcpu->mmio_size = bytes;
2432         vcpu->mmio_is_write = 0;
2433
2434         return X86EMUL_UNHANDLEABLE;
2435 }
2436
2437 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2438                           const void *val, int bytes)
2439 {
2440         int ret;
2441
2442         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2443         if (ret < 0)
2444                 return 0;
2445         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2446         return 1;
2447 }
2448
2449 static int emulator_write_emulated_onepage(unsigned long addr,
2450                                            const void *val,
2451                                            unsigned int bytes,
2452                                            struct kvm_vcpu *vcpu)
2453 {
2454         struct kvm_io_device *mmio_dev;
2455         gpa_t                 gpa;
2456
2457         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2458
2459         if (gpa == UNMAPPED_GVA) {
2460                 kvm_inject_page_fault(vcpu, addr, 2);
2461                 return X86EMUL_PROPAGATE_FAULT;
2462         }
2463
2464         /* For APIC access vmexit */
2465         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2466                 goto mmio;
2467
2468         if (emulator_write_phys(vcpu, gpa, val, bytes))
2469                 return X86EMUL_CONTINUE;
2470
2471 mmio:
2472         /*
2473          * Is this MMIO handled locally?
2474          */
2475         mutex_lock(&vcpu->kvm->lock);
2476         mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2477         mutex_unlock(&vcpu->kvm->lock);
2478         if (mmio_dev) {
2479                 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2480                 return X86EMUL_CONTINUE;
2481         }
2482
2483         vcpu->mmio_needed = 1;
2484         vcpu->mmio_phys_addr = gpa;
2485         vcpu->mmio_size = bytes;
2486         vcpu->mmio_is_write = 1;
2487         memcpy(vcpu->mmio_data, val, bytes);
2488
2489         return X86EMUL_CONTINUE;
2490 }
2491
2492 int emulator_write_emulated(unsigned long addr,
2493                                    const void *val,
2494                                    unsigned int bytes,
2495                                    struct kvm_vcpu *vcpu)
2496 {
2497         /* Crossing a page boundary? */
2498         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2499                 int rc, now;
2500
2501                 now = -addr & ~PAGE_MASK;
2502                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2503                 if (rc != X86EMUL_CONTINUE)
2504                         return rc;
2505                 addr += now;
2506                 val += now;
2507                 bytes -= now;
2508         }
2509         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2510 }
2511 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2512
2513 static int emulator_cmpxchg_emulated(unsigned long addr,
2514                                      const void *old,
2515                                      const void *new,
2516                                      unsigned int bytes,
2517                                      struct kvm_vcpu *vcpu)
2518 {
2519         static int reported;
2520
2521         if (!reported) {
2522                 reported = 1;
2523                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2524         }
2525 #ifndef CONFIG_X86_64
2526         /* guests cmpxchg8b have to be emulated atomically */
2527         if (bytes == 8) {
2528                 gpa_t gpa;
2529                 struct page *page;
2530                 char *kaddr;
2531                 u64 val;
2532
2533                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2534
2535                 if (gpa == UNMAPPED_GVA ||
2536                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2537                         goto emul_write;
2538
2539                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2540                         goto emul_write;
2541
2542                 val = *(u64 *)new;
2543
2544                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2545
2546                 kaddr = kmap_atomic(page, KM_USER0);
2547                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2548                 kunmap_atomic(kaddr, KM_USER0);
2549                 kvm_release_page_dirty(page);
2550         }
2551 emul_write:
2552 #endif
2553
2554         return emulator_write_emulated(addr, new, bytes, vcpu);
2555 }
2556
2557 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2558 {
2559         return kvm_x86_ops->get_segment_base(vcpu, seg);
2560 }
2561
2562 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2563 {
2564         kvm_mmu_invlpg(vcpu, address);
2565         return X86EMUL_CONTINUE;
2566 }
2567
2568 int emulate_clts(struct kvm_vcpu *vcpu)
2569 {
2570         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2571         return X86EMUL_CONTINUE;
2572 }
2573
2574 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2575 {
2576         struct kvm_vcpu *vcpu = ctxt->vcpu;
2577
2578         switch (dr) {
2579         case 0 ... 3:
2580                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2581                 return X86EMUL_CONTINUE;
2582         default:
2583                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2584                 return X86EMUL_UNHANDLEABLE;
2585         }
2586 }
2587
2588 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2589 {
2590         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2591         int exception;
2592
2593         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2594         if (exception) {
2595                 /* FIXME: better handling */
2596                 return X86EMUL_UNHANDLEABLE;
2597         }
2598         return X86EMUL_CONTINUE;
2599 }
2600
2601 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2602 {
2603         u8 opcodes[4];
2604         unsigned long rip = kvm_rip_read(vcpu);
2605         unsigned long rip_linear;
2606
2607         if (!printk_ratelimit())
2608                 return;
2609
2610         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2611
2612         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2613
2614         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2615                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2616 }
2617 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2618
2619 static struct x86_emulate_ops emulate_ops = {
2620         .read_std            = kvm_read_guest_virt,
2621         .read_emulated       = emulator_read_emulated,
2622         .write_emulated      = emulator_write_emulated,
2623         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2624 };
2625
2626 static void cache_all_regs(struct kvm_vcpu *vcpu)
2627 {
2628         kvm_register_read(vcpu, VCPU_REGS_RAX);
2629         kvm_register_read(vcpu, VCPU_REGS_RSP);
2630         kvm_register_read(vcpu, VCPU_REGS_RIP);
2631         vcpu->arch.regs_dirty = ~0;
2632 }
2633
2634 int emulate_instruction(struct kvm_vcpu *vcpu,
2635                         struct kvm_run *run,
2636                         unsigned long cr2,
2637                         u16 error_code,
2638                         int emulation_type)
2639 {
2640         int r, shadow_mask;
2641         struct decode_cache *c;
2642
2643         kvm_clear_exception_queue(vcpu);
2644         vcpu->arch.mmio_fault_cr2 = cr2;
2645         /*
2646          * TODO: fix x86_emulate.c to use guest_read/write_register
2647          * instead of direct ->regs accesses, can save hundred cycles
2648          * on Intel for instructions that don't read/change RSP, for
2649          * for example.
2650          */
2651         cache_all_regs(vcpu);
2652
2653         vcpu->mmio_is_write = 0;
2654         vcpu->arch.pio.string = 0;
2655
2656         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2657                 int cs_db, cs_l;
2658                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2659
2660                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2661                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2662                 vcpu->arch.emulate_ctxt.mode =
2663                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2664                         ? X86EMUL_MODE_REAL : cs_l
2665                         ? X86EMUL_MODE_PROT64 : cs_db
2666                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2667
2668                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2669
2670                 /* Reject the instructions other than VMCALL/VMMCALL when
2671                  * try to emulate invalid opcode */
2672                 c = &vcpu->arch.emulate_ctxt.decode;
2673                 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2674                     (!(c->twobyte && c->b == 0x01 &&
2675                       (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2676                        c->modrm_mod == 3 && c->modrm_rm == 1)))
2677                         return EMULATE_FAIL;
2678
2679                 ++vcpu->stat.insn_emulation;
2680                 if (r)  {
2681                         ++vcpu->stat.insn_emulation_fail;
2682                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2683                                 return EMULATE_DONE;
2684                         return EMULATE_FAIL;
2685                 }
2686         }
2687
2688         if (emulation_type & EMULTYPE_SKIP) {
2689                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2690                 return EMULATE_DONE;
2691         }
2692
2693         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2694         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2695
2696         if (r == 0)
2697                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2698
2699         if (vcpu->arch.pio.string)
2700                 return EMULATE_DO_MMIO;
2701
2702         if ((r || vcpu->mmio_is_write) && run) {
2703                 run->exit_reason = KVM_EXIT_MMIO;
2704                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2705                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2706                 run->mmio.len = vcpu->mmio_size;
2707                 run->mmio.is_write = vcpu->mmio_is_write;
2708         }
2709
2710         if (r) {
2711                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2712                         return EMULATE_DONE;
2713                 if (!vcpu->mmio_needed) {
2714                         kvm_report_emulation_failure(vcpu, "mmio");
2715                         return EMULATE_FAIL;
2716                 }
2717                 return EMULATE_DO_MMIO;
2718         }
2719
2720         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2721
2722         if (vcpu->mmio_is_write) {
2723                 vcpu->mmio_needed = 0;
2724                 return EMULATE_DO_MMIO;
2725         }
2726
2727         return EMULATE_DONE;
2728 }
2729 EXPORT_SYMBOL_GPL(emulate_instruction);
2730
2731 static int pio_copy_data(struct kvm_vcpu *vcpu)
2732 {
2733         void *p = vcpu->arch.pio_data;
2734         gva_t q = vcpu->arch.pio.guest_gva;
2735         unsigned bytes;
2736         int ret;
2737
2738         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2739         if (vcpu->arch.pio.in)
2740                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2741         else
2742                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2743         return ret;
2744 }
2745
2746 int complete_pio(struct kvm_vcpu *vcpu)
2747 {
2748         struct kvm_pio_request *io = &vcpu->arch.pio;
2749         long delta;
2750         int r;
2751         unsigned long val;
2752
2753         if (!io->string) {
2754                 if (io->in) {
2755                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2756                         memcpy(&val, vcpu->arch.pio_data, io->size);
2757                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2758                 }
2759         } else {
2760                 if (io->in) {
2761                         r = pio_copy_data(vcpu);
2762                         if (r)
2763                                 return r;
2764                 }
2765
2766                 delta = 1;
2767                 if (io->rep) {
2768                         delta *= io->cur_count;
2769                         /*
2770                          * The size of the register should really depend on
2771                          * current address size.
2772                          */
2773                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2774                         val -= delta;
2775                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2776                 }
2777                 if (io->down)
2778                         delta = -delta;
2779                 delta *= io->size;
2780                 if (io->in) {
2781                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2782                         val += delta;
2783                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2784                 } else {
2785                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2786                         val += delta;
2787                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2788                 }
2789         }
2790
2791         io->count -= io->cur_count;
2792         io->cur_count = 0;
2793
2794         return 0;
2795 }
2796
2797 static void kernel_pio(struct kvm_io_device *pio_dev,
2798                        struct kvm_vcpu *vcpu,
2799                        void *pd)
2800 {
2801         /* TODO: String I/O for in kernel device */
2802
2803         if (vcpu->arch.pio.in)
2804                 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2805                                   vcpu->arch.pio.size,
2806                                   pd);
2807         else
2808                 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2809                                    vcpu->arch.pio.size,
2810                                    pd);
2811 }
2812
2813 static void pio_string_write(struct kvm_io_device *pio_dev,
2814                              struct kvm_vcpu *vcpu)
2815 {
2816         struct kvm_pio_request *io = &vcpu->arch.pio;
2817         void *pd = vcpu->arch.pio_data;
2818         int i;
2819
2820         for (i = 0; i < io->cur_count; i++) {
2821                 kvm_iodevice_write(pio_dev, io->port,
2822                                    io->size,
2823                                    pd);
2824                 pd += io->size;
2825         }
2826 }
2827
2828 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2829                                                gpa_t addr, int len,
2830                                                int is_write)
2831 {
2832         return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2833 }
2834
2835 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2836                   int size, unsigned port)
2837 {
2838         struct kvm_io_device *pio_dev;
2839         unsigned long val;
2840
2841         vcpu->run->exit_reason = KVM_EXIT_IO;
2842         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2843         vcpu->run->io.size = vcpu->arch.pio.size = size;
2844         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2845         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2846         vcpu->run->io.port = vcpu->arch.pio.port = port;
2847         vcpu->arch.pio.in = in;
2848         vcpu->arch.pio.string = 0;
2849         vcpu->arch.pio.down = 0;
2850         vcpu->arch.pio.rep = 0;
2851
2852         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2853                       size, 1);
2854
2855         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2856         memcpy(vcpu->arch.pio_data, &val, 4);
2857
2858         mutex_lock(&vcpu->kvm->lock);
2859         pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2860         mutex_unlock(&vcpu->kvm->lock);
2861         if (pio_dev) {
2862                 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2863                 complete_pio(vcpu);
2864                 return 1;
2865         }
2866         return 0;
2867 }
2868 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2869
2870 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2871                   int size, unsigned long count, int down,
2872                   gva_t address, int rep, unsigned port)
2873 {
2874         unsigned now, in_page;
2875         int ret = 0;
2876         struct kvm_io_device *pio_dev;
2877
2878         vcpu->run->exit_reason = KVM_EXIT_IO;
2879         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2880         vcpu->run->io.size = vcpu->arch.pio.size = size;
2881         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2882         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2883         vcpu->run->io.port = vcpu->arch.pio.port = port;
2884         vcpu->arch.pio.in = in;
2885         vcpu->arch.pio.string = 1;
2886         vcpu->arch.pio.down = down;
2887         vcpu->arch.pio.rep = rep;
2888
2889         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2890                       size, count);
2891
2892         if (!count) {
2893                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2894                 return 1;
2895         }
2896
2897         if (!down)
2898                 in_page = PAGE_SIZE - offset_in_page(address);
2899         else
2900                 in_page = offset_in_page(address) + size;
2901         now = min(count, (unsigned long)in_page / size);
2902         if (!now)
2903                 now = 1;
2904         if (down) {
2905                 /*
2906                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
2907                  */
2908                 pr_unimpl(vcpu, "guest string pio down\n");
2909                 kvm_inject_gp(vcpu, 0);
2910                 return 1;
2911         }
2912         vcpu->run->io.count = now;
2913         vcpu->arch.pio.cur_count = now;
2914
2915         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2916                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2917
2918         vcpu->arch.pio.guest_gva = address;
2919
2920         mutex_lock(&vcpu->kvm->lock);
2921         pio_dev = vcpu_find_pio_dev(vcpu, port,
2922                                     vcpu->arch.pio.cur_count,
2923                                     !vcpu->arch.pio.in);
2924         mutex_unlock(&vcpu->kvm->lock);
2925
2926         if (!vcpu->arch.pio.in) {
2927                 /* string PIO write */
2928                 ret = pio_copy_data(vcpu);
2929                 if (ret == X86EMUL_PROPAGATE_FAULT) {
2930                         kvm_inject_gp(vcpu, 0);
2931                         return 1;
2932                 }
2933                 if (ret == 0 && pio_dev) {
2934                         pio_string_write(pio_dev, vcpu);
2935                         complete_pio(vcpu);
2936                         if (vcpu->arch.pio.count == 0)
2937                                 ret = 1;
2938                 }
2939         } else if (pio_dev)
2940                 pr_unimpl(vcpu, "no string pio read support yet, "
2941                        "port %x size %d count %ld\n",
2942                         port, size, count);
2943
2944         return ret;
2945 }
2946 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2947
2948 static void bounce_off(void *info)
2949 {
2950         /* nothing */
2951 }
2952
2953 static unsigned int  ref_freq;
2954 static unsigned long tsc_khz_ref;
2955
2956 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2957                                      void *data)
2958 {
2959         struct cpufreq_freqs *freq = data;
2960         struct kvm *kvm;
2961         struct kvm_vcpu *vcpu;
2962         int i, send_ipi = 0;
2963
2964         if (!ref_freq)
2965                 ref_freq = freq->old;
2966
2967         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2968                 return 0;
2969         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2970                 return 0;
2971         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2972
2973         spin_lock(&kvm_lock);
2974         list_for_each_entry(kvm, &vm_list, vm_list) {
2975                 kvm_for_each_vcpu(i, vcpu, kvm) {
2976                         if (vcpu->cpu != freq->cpu)
2977                                 continue;
2978                         if (!kvm_request_guest_time_update(vcpu))
2979                                 continue;
2980                         if (vcpu->cpu != smp_processor_id())
2981                                 send_ipi++;
2982                 }
2983         }
2984         spin_unlock(&kvm_lock);
2985
2986         if (freq->old < freq->new && send_ipi) {
2987                 /*
2988                  * We upscale the frequency.  Must make the guest
2989                  * doesn't see old kvmclock values while running with
2990                  * the new frequency, otherwise we risk the guest sees
2991                  * time go backwards.
2992                  *
2993                  * In case we update the frequency for another cpu
2994                  * (which might be in guest context) send an interrupt
2995                  * to kick the cpu out of guest context.  Next time
2996                  * guest context is entered kvmclock will be updated,
2997                  * so the guest will not see stale values.
2998                  */
2999                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3000         }
3001         return 0;
3002 }
3003
3004 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3005         .notifier_call  = kvmclock_cpufreq_notifier
3006 };
3007
3008 int kvm_arch_init(void *opaque)
3009 {
3010         int r, cpu;
3011         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3012
3013         if (kvm_x86_ops) {
3014                 printk(KERN_ERR "kvm: already loaded the other module\n");
3015                 r = -EEXIST;
3016                 goto out;
3017         }
3018
3019         if (!ops->cpu_has_kvm_support()) {
3020                 printk(KERN_ERR "kvm: no hardware support\n");
3021                 r = -EOPNOTSUPP;
3022                 goto out;
3023         }
3024         if (ops->disabled_by_bios()) {
3025                 printk(KERN_ERR "kvm: disabled by bios\n");
3026                 r = -EOPNOTSUPP;
3027                 goto out;
3028         }
3029
3030         r = kvm_mmu_module_init();
3031         if (r)
3032                 goto out;
3033
3034         kvm_init_msr_list();
3035
3036         kvm_x86_ops = ops;
3037         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3038         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3039         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3040                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3041
3042         for_each_possible_cpu(cpu)
3043                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3044         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3045                 tsc_khz_ref = tsc_khz;
3046                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3047                                           CPUFREQ_TRANSITION_NOTIFIER);
3048         }
3049
3050         return 0;
3051
3052 out:
3053         return r;
3054 }
3055
3056 void kvm_arch_exit(void)
3057 {
3058         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3059                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3060                                             CPUFREQ_TRANSITION_NOTIFIER);
3061         kvm_x86_ops = NULL;
3062         kvm_mmu_module_exit();
3063 }
3064
3065 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3066 {
3067         ++vcpu->stat.halt_exits;
3068         if (irqchip_in_kernel(vcpu->kvm)) {
3069                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3070                 return 1;
3071         } else {
3072                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3073                 return 0;
3074         }
3075 }
3076 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3077
3078 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3079                            unsigned long a1)
3080 {
3081         if (is_long_mode(vcpu))
3082                 return a0;
3083         else
3084                 return a0 | ((gpa_t)a1 << 32);
3085 }
3086
3087 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3088 {
3089         unsigned long nr, a0, a1, a2, a3, ret;
3090         int r = 1;
3091
3092         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3093         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3094         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3095         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3096         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3097
3098         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3099
3100         if (!is_long_mode(vcpu)) {
3101                 nr &= 0xFFFFFFFF;
3102                 a0 &= 0xFFFFFFFF;
3103                 a1 &= 0xFFFFFFFF;
3104                 a2 &= 0xFFFFFFFF;
3105                 a3 &= 0xFFFFFFFF;
3106         }
3107
3108         switch (nr) {
3109         case KVM_HC_VAPIC_POLL_IRQ:
3110                 ret = 0;
3111                 break;
3112         case KVM_HC_MMU_OP:
3113                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3114                 break;
3115         default:
3116                 ret = -KVM_ENOSYS;
3117                 break;
3118         }
3119         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3120         ++vcpu->stat.hypercalls;
3121         return r;
3122 }
3123 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3124
3125 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3126 {
3127         char instruction[3];
3128         int ret = 0;
3129         unsigned long rip = kvm_rip_read(vcpu);
3130
3131
3132         /*
3133          * Blow out the MMU to ensure that no other VCPU has an active mapping
3134          * to ensure that the updated hypercall appears atomically across all
3135          * VCPUs.
3136          */
3137         kvm_mmu_zap_all(vcpu->kvm);
3138
3139         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3140         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3141             != X86EMUL_CONTINUE)
3142                 ret = -EFAULT;
3143
3144         return ret;
3145 }
3146
3147 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3148 {
3149         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3150 }
3151
3152 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3153 {
3154         struct descriptor_table dt = { limit, base };
3155
3156         kvm_x86_ops->set_gdt(vcpu, &dt);
3157 }
3158
3159 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3160 {
3161         struct descriptor_table dt = { limit, base };
3162
3163         kvm_x86_ops->set_idt(vcpu, &dt);
3164 }
3165
3166 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3167                    unsigned long *rflags)
3168 {
3169         kvm_lmsw(vcpu, msw);
3170         *rflags = kvm_x86_ops->get_rflags(vcpu);
3171 }
3172
3173 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3174 {
3175         unsigned long value;
3176
3177         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3178         switch (cr) {
3179         case 0:
3180                 value = vcpu->arch.cr0;
3181                 break;
3182         case 2:
3183                 value = vcpu->arch.cr2;
3184                 break;
3185         case 3:
3186                 value = vcpu->arch.cr3;
3187                 break;
3188         case 4:
3189                 value = vcpu->arch.cr4;
3190                 break;
3191         case 8:
3192                 value = kvm_get_cr8(vcpu);
3193                 break;
3194         default:
3195                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3196                 return 0;
3197         }
3198
3199         return value;
3200 }
3201
3202 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3203                      unsigned long *rflags)
3204 {
3205         switch (cr) {
3206         case 0:
3207                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3208                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3209                 break;
3210         case 2:
3211                 vcpu->arch.cr2 = val;
3212                 break;
3213         case 3:
3214                 kvm_set_cr3(vcpu, val);
3215                 break;
3216         case 4:
3217                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3218                 break;
3219         case 8:
3220                 kvm_set_cr8(vcpu, val & 0xfUL);
3221                 break;
3222         default:
3223                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3224         }
3225 }
3226
3227 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3228 {
3229         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3230         int j, nent = vcpu->arch.cpuid_nent;
3231
3232         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3233         /* when no next entry is found, the current entry[i] is reselected */
3234         for (j = i + 1; ; j = (j + 1) % nent) {
3235                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3236                 if (ej->function == e->function) {
3237                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3238                         return j;
3239                 }
3240         }
3241         return 0; /* silence gcc, even though control never reaches here */
3242 }
3243
3244 /* find an entry with matching function, matching index (if needed), and that
3245  * should be read next (if it's stateful) */
3246 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3247         u32 function, u32 index)
3248 {
3249         if (e->function != function)
3250                 return 0;
3251         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3252                 return 0;
3253         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3254             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3255                 return 0;
3256         return 1;
3257 }
3258
3259 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3260                                               u32 function, u32 index)
3261 {
3262         int i;
3263         struct kvm_cpuid_entry2 *best = NULL;
3264
3265         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3266                 struct kvm_cpuid_entry2 *e;
3267
3268                 e = &vcpu->arch.cpuid_entries[i];
3269                 if (is_matching_cpuid_entry(e, function, index)) {
3270                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3271                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3272                         best = e;
3273                         break;
3274                 }
3275                 /*
3276                  * Both basic or both extended?
3277                  */
3278                 if (((e->function ^ function) & 0x80000000) == 0)
3279                         if (!best || e->function > best->function)
3280                                 best = e;
3281         }
3282         return best;
3283 }
3284
3285 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3286 {
3287         struct kvm_cpuid_entry2 *best;
3288
3289         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3290         if (best)
3291                 return best->eax & 0xff;
3292         return 36;
3293 }
3294
3295 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3296 {
3297         u32 function, index;
3298         struct kvm_cpuid_entry2 *best;
3299
3300         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3301         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3302         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3303         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3304         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3305         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3306         best = kvm_find_cpuid_entry(vcpu, function, index);
3307         if (best) {
3308                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3309                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3310                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3311                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3312         }
3313         kvm_x86_ops->skip_emulated_instruction(vcpu);
3314         trace_kvm_cpuid(function,
3315                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3316                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3317                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3318                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3319 }
3320 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3321
3322 /*
3323  * Check if userspace requested an interrupt window, and that the
3324  * interrupt window is open.
3325  *
3326  * No need to exit to userspace if we already have an interrupt queued.
3327  */
3328 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3329                                           struct kvm_run *kvm_run)
3330 {
3331         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3332                 kvm_run->request_interrupt_window &&
3333                 kvm_arch_interrupt_allowed(vcpu));
3334 }
3335
3336 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3337                               struct kvm_run *kvm_run)
3338 {
3339         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3340         kvm_run->cr8 = kvm_get_cr8(vcpu);
3341         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3342         if (irqchip_in_kernel(vcpu->kvm))
3343                 kvm_run->ready_for_interrupt_injection = 1;
3344         else
3345                 kvm_run->ready_for_interrupt_injection =
3346                         kvm_arch_interrupt_allowed(vcpu) &&
3347                         !kvm_cpu_has_interrupt(vcpu) &&
3348                         !kvm_event_needs_reinjection(vcpu);
3349 }
3350
3351 static void vapic_enter(struct kvm_vcpu *vcpu)
3352 {
3353         struct kvm_lapic *apic = vcpu->arch.apic;
3354         struct page *page;
3355
3356         if (!apic || !apic->vapic_addr)
3357                 return;
3358
3359         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3360
3361         vcpu->arch.apic->vapic_page = page;
3362 }
3363
3364 static void vapic_exit(struct kvm_vcpu *vcpu)
3365 {
3366         struct kvm_lapic *apic = vcpu->arch.apic;
3367
3368         if (!apic || !apic->vapic_addr)
3369                 return;
3370
3371         down_read(&vcpu->kvm->slots_lock);
3372         kvm_release_page_dirty(apic->vapic_page);
3373         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3374         up_read(&vcpu->kvm->slots_lock);
3375 }
3376
3377 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3378 {
3379         int max_irr, tpr;
3380
3381         if (!kvm_x86_ops->update_cr8_intercept)
3382                 return;
3383
3384         if (!vcpu->arch.apic->vapic_addr)
3385                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3386         else
3387                 max_irr = -1;
3388
3389         if (max_irr != -1)
3390                 max_irr >>= 4;
3391
3392         tpr = kvm_lapic_get_cr8(vcpu);
3393
3394         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3395 }
3396
3397 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3398 {
3399         /* try to reinject previous events if any */
3400         if (vcpu->arch.nmi_injected) {
3401                 kvm_x86_ops->set_nmi(vcpu);
3402                 return;
3403         }
3404
3405         if (vcpu->arch.interrupt.pending) {
3406                 kvm_x86_ops->set_irq(vcpu);
3407                 return;
3408         }
3409
3410         /* try to inject new event if pending */
3411         if (vcpu->arch.nmi_pending) {
3412                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3413                         vcpu->arch.nmi_pending = false;
3414                         vcpu->arch.nmi_injected = true;
3415                         kvm_x86_ops->set_nmi(vcpu);
3416                 }
3417         } else if (kvm_cpu_has_interrupt(vcpu)) {
3418                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3419                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3420                                             false);
3421                         kvm_x86_ops->set_irq(vcpu);
3422                 }
3423         }
3424 }
3425
3426 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3427 {
3428         int r;
3429         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3430                 kvm_run->request_interrupt_window;
3431
3432         if (vcpu->requests)
3433                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3434                         kvm_mmu_unload(vcpu);
3435
3436         r = kvm_mmu_reload(vcpu);
3437         if (unlikely(r))
3438                 goto out;
3439
3440         if (vcpu->requests) {
3441                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3442                         __kvm_migrate_timers(vcpu);
3443                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3444                         kvm_write_guest_time(vcpu);
3445                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3446                         kvm_mmu_sync_roots(vcpu);
3447                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3448                         kvm_x86_ops->tlb_flush(vcpu);
3449                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3450                                        &vcpu->requests)) {
3451                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3452                         r = 0;
3453                         goto out;
3454                 }
3455                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3456                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3457                         r = 0;
3458                         goto out;
3459                 }
3460         }
3461
3462         preempt_disable();
3463
3464         kvm_x86_ops->prepare_guest_switch(vcpu);
3465         kvm_load_guest_fpu(vcpu);
3466
3467         local_irq_disable();
3468
3469         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3470         smp_mb__after_clear_bit();
3471
3472         if (vcpu->requests || need_resched() || signal_pending(current)) {
3473                 local_irq_enable();
3474                 preempt_enable();
3475                 r = 1;
3476                 goto out;
3477         }
3478
3479         if (vcpu->arch.exception.pending)
3480                 __queue_exception(vcpu);
3481         else
3482                 inject_pending_irq(vcpu, kvm_run);
3483
3484         /* enable NMI/IRQ window open exits if needed */
3485         if (vcpu->arch.nmi_pending)
3486                 kvm_x86_ops->enable_nmi_window(vcpu);
3487         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3488                 kvm_x86_ops->enable_irq_window(vcpu);
3489
3490         if (kvm_lapic_enabled(vcpu)) {
3491                 update_cr8_intercept(vcpu);
3492                 kvm_lapic_sync_to_vapic(vcpu);
3493         }
3494
3495         up_read(&vcpu->kvm->slots_lock);
3496
3497         kvm_guest_enter();
3498
3499         get_debugreg(vcpu->arch.host_dr6, 6);
3500         get_debugreg(vcpu->arch.host_dr7, 7);
3501         if (unlikely(vcpu->arch.switch_db_regs)) {
3502                 get_debugreg(vcpu->arch.host_db[0], 0);
3503                 get_debugreg(vcpu->arch.host_db[1], 1);
3504                 get_debugreg(vcpu->arch.host_db[2], 2);
3505                 get_debugreg(vcpu->arch.host_db[3], 3);
3506
3507                 set_debugreg(0, 7);
3508                 set_debugreg(vcpu->arch.eff_db[0], 0);
3509                 set_debugreg(vcpu->arch.eff_db[1], 1);
3510                 set_debugreg(vcpu->arch.eff_db[2], 2);
3511                 set_debugreg(vcpu->arch.eff_db[3], 3);
3512         }
3513
3514         trace_kvm_entry(vcpu->vcpu_id);
3515         kvm_x86_ops->run(vcpu, kvm_run);
3516
3517         if (unlikely(vcpu->arch.switch_db_regs)) {
3518                 set_debugreg(0, 7);
3519                 set_debugreg(vcpu->arch.host_db[0], 0);
3520                 set_debugreg(vcpu->arch.host_db[1], 1);
3521                 set_debugreg(vcpu->arch.host_db[2], 2);
3522                 set_debugreg(vcpu->arch.host_db[3], 3);
3523         }
3524         set_debugreg(vcpu->arch.host_dr6, 6);
3525         set_debugreg(vcpu->arch.host_dr7, 7);
3526
3527         set_bit(KVM_REQ_KICK, &vcpu->requests);
3528         local_irq_enable();
3529
3530         ++vcpu->stat.exits;
3531
3532         /*
3533          * We must have an instruction between local_irq_enable() and
3534          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3535          * the interrupt shadow.  The stat.exits increment will do nicely.
3536          * But we need to prevent reordering, hence this barrier():
3537          */
3538         barrier();
3539
3540         kvm_guest_exit();
3541
3542         preempt_enable();
3543
3544         down_read(&vcpu->kvm->slots_lock);
3545
3546         /*
3547          * Profile KVM exit RIPs:
3548          */
3549         if (unlikely(prof_on == KVM_PROFILING)) {
3550                 unsigned long rip = kvm_rip_read(vcpu);
3551                 profile_hit(KVM_PROFILING, (void *)rip);
3552         }
3553
3554
3555         kvm_lapic_sync_from_vapic(vcpu);
3556
3557         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3558 out:
3559         return r;
3560 }
3561
3562
3563 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3564 {
3565         int r;
3566
3567         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3568                 pr_debug("vcpu %d received sipi with vector # %x\n",
3569                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3570                 kvm_lapic_reset(vcpu);
3571                 r = kvm_arch_vcpu_reset(vcpu);
3572                 if (r)
3573                         return r;
3574                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3575         }
3576
3577         down_read(&vcpu->kvm->slots_lock);
3578         vapic_enter(vcpu);
3579
3580         r = 1;
3581         while (r > 0) {
3582                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3583                         r = vcpu_enter_guest(vcpu, kvm_run);
3584                 else {
3585                         up_read(&vcpu->kvm->slots_lock);
3586                         kvm_vcpu_block(vcpu);
3587                         down_read(&vcpu->kvm->slots_lock);
3588                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3589                         {
3590                                 switch(vcpu->arch.mp_state) {
3591                                 case KVM_MP_STATE_HALTED:
3592                                         vcpu->arch.mp_state =
3593                                                 KVM_MP_STATE_RUNNABLE;
3594                                 case KVM_MP_STATE_RUNNABLE:
3595                                         break;
3596                                 case KVM_MP_STATE_SIPI_RECEIVED:
3597                                 default:
3598                                         r = -EINTR;
3599                                         break;
3600                                 }
3601                         }
3602                 }
3603
3604                 if (r <= 0)
3605                         break;
3606
3607                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3608                 if (kvm_cpu_has_pending_timer(vcpu))
3609                         kvm_inject_pending_timer_irqs(vcpu);
3610
3611                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3612                         r = -EINTR;
3613                         kvm_run->exit_reason = KVM_EXIT_INTR;
3614                         ++vcpu->stat.request_irq_exits;
3615                 }
3616                 if (signal_pending(current)) {
3617                         r = -EINTR;
3618                         kvm_run->exit_reason = KVM_EXIT_INTR;
3619                         ++vcpu->stat.signal_exits;
3620                 }
3621                 if (need_resched()) {
3622                         up_read(&vcpu->kvm->slots_lock);
3623                         kvm_resched(vcpu);
3624                         down_read(&vcpu->kvm->slots_lock);
3625                 }
3626         }
3627
3628         up_read(&vcpu->kvm->slots_lock);
3629         post_kvm_run_save(vcpu, kvm_run);
3630
3631         vapic_exit(vcpu);
3632
3633         return r;
3634 }
3635
3636 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3637 {
3638         int r;
3639         sigset_t sigsaved;
3640
3641         vcpu_load(vcpu);
3642
3643         if (vcpu->sigset_active)
3644                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3645
3646         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3647                 kvm_vcpu_block(vcpu);
3648                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3649                 r = -EAGAIN;
3650                 goto out;
3651         }
3652
3653         /* re-sync apic's tpr */
3654         if (!irqchip_in_kernel(vcpu->kvm))
3655                 kvm_set_cr8(vcpu, kvm_run->cr8);
3656
3657         if (vcpu->arch.pio.cur_count) {
3658                 r = complete_pio(vcpu);
3659                 if (r)
3660                         goto out;
3661         }
3662 #if CONFIG_HAS_IOMEM
3663         if (vcpu->mmio_needed) {
3664                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3665                 vcpu->mmio_read_completed = 1;
3666                 vcpu->mmio_needed = 0;
3667
3668                 down_read(&vcpu->kvm->slots_lock);
3669                 r = emulate_instruction(vcpu, kvm_run,
3670                                         vcpu->arch.mmio_fault_cr2, 0,
3671                                         EMULTYPE_NO_DECODE);
3672                 up_read(&vcpu->kvm->slots_lock);
3673                 if (r == EMULATE_DO_MMIO) {
3674                         /*
3675                          * Read-modify-write.  Back to userspace.
3676                          */
3677                         r = 0;
3678                         goto out;
3679                 }
3680         }
3681 #endif
3682         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3683                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3684                                      kvm_run->hypercall.ret);
3685
3686         r = __vcpu_run(vcpu, kvm_run);
3687
3688 out:
3689         if (vcpu->sigset_active)
3690                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3691
3692         vcpu_put(vcpu);
3693         return r;
3694 }
3695
3696 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3697 {
3698         vcpu_load(vcpu);
3699
3700         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3701         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3702         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3703         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3704         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3705         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3706         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3707         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3708 #ifdef CONFIG_X86_64
3709         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3710         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3711         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3712         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3713         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3714         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3715         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3716         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3717 #endif
3718
3719         regs->rip = kvm_rip_read(vcpu);
3720         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3721
3722         /*
3723          * Don't leak debug flags in case they were set for guest debugging
3724          */
3725         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3726                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3727
3728         vcpu_put(vcpu);
3729
3730         return 0;
3731 }
3732
3733 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3734 {
3735         vcpu_load(vcpu);
3736
3737         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3738         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3739         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3740         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3741         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3742         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3743         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3744         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3745 #ifdef CONFIG_X86_64
3746         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3747         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3748         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3749         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3750         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3751         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3752         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3753         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3754
3755 #endif
3756
3757         kvm_rip_write(vcpu, regs->rip);
3758         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3759
3760
3761         vcpu->arch.exception.pending = false;
3762
3763         vcpu_put(vcpu);
3764
3765         return 0;
3766 }
3767
3768 void kvm_get_segment(struct kvm_vcpu *vcpu,
3769                      struct kvm_segment *var, int seg)
3770 {
3771         kvm_x86_ops->get_segment(vcpu, var, seg);
3772 }
3773
3774 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3775 {
3776         struct kvm_segment cs;
3777
3778         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3779         *db = cs.db;
3780         *l = cs.l;
3781 }
3782 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3783
3784 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3785                                   struct kvm_sregs *sregs)
3786 {
3787         struct descriptor_table dt;
3788
3789         vcpu_load(vcpu);
3790
3791         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3792         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3793         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3794         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3795         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3796         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3797
3798         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3799         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3800
3801         kvm_x86_ops->get_idt(vcpu, &dt);
3802         sregs->idt.limit = dt.limit;
3803         sregs->idt.base = dt.base;
3804         kvm_x86_ops->get_gdt(vcpu, &dt);
3805         sregs->gdt.limit = dt.limit;
3806         sregs->gdt.base = dt.base;
3807
3808         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3809         sregs->cr0 = vcpu->arch.cr0;
3810         sregs->cr2 = vcpu->arch.cr2;
3811         sregs->cr3 = vcpu->arch.cr3;
3812         sregs->cr4 = vcpu->arch.cr4;
3813         sregs->cr8 = kvm_get_cr8(vcpu);
3814         sregs->efer = vcpu->arch.shadow_efer;
3815         sregs->apic_base = kvm_get_apic_base(vcpu);
3816
3817         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3818
3819         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3820                 set_bit(vcpu->arch.interrupt.nr,
3821                         (unsigned long *)sregs->interrupt_bitmap);
3822
3823         vcpu_put(vcpu);
3824
3825         return 0;
3826 }
3827
3828 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3829                                     struct kvm_mp_state *mp_state)
3830 {
3831         vcpu_load(vcpu);
3832         mp_state->mp_state = vcpu->arch.mp_state;
3833         vcpu_put(vcpu);
3834         return 0;
3835 }
3836
3837 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3838                                     struct kvm_mp_state *mp_state)
3839 {
3840         vcpu_load(vcpu);
3841         vcpu->arch.mp_state = mp_state->mp_state;
3842         vcpu_put(vcpu);
3843         return 0;
3844 }
3845
3846 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3847                         struct kvm_segment *var, int seg)
3848 {
3849         kvm_x86_ops->set_segment(vcpu, var, seg);
3850 }
3851
3852 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3853                                    struct kvm_segment *kvm_desct)
3854 {
3855         kvm_desct->base = seg_desc->base0;
3856         kvm_desct->base |= seg_desc->base1 << 16;
3857         kvm_desct->base |= seg_desc->base2 << 24;
3858         kvm_desct->limit = seg_desc->limit0;
3859         kvm_desct->limit |= seg_desc->limit << 16;
3860         if (seg_desc->g) {
3861                 kvm_desct->limit <<= 12;
3862                 kvm_desct->limit |= 0xfff;
3863         }
3864         kvm_desct->selector = selector;
3865         kvm_desct->type = seg_desc->type;
3866         kvm_desct->present = seg_desc->p;
3867         kvm_desct->dpl = seg_desc->dpl;
3868         kvm_desct->db = seg_desc->d;
3869         kvm_desct->s = seg_desc->s;
3870         kvm_desct->l = seg_desc->l;
3871         kvm_desct->g = seg_desc->g;
3872         kvm_desct->avl = seg_desc->avl;
3873         if (!selector)
3874                 kvm_desct->unusable = 1;
3875         else
3876                 kvm_desct->unusable = 0;
3877         kvm_desct->padding = 0;
3878 }
3879
3880 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3881                                           u16 selector,
3882                                           struct descriptor_table *dtable)
3883 {
3884         if (selector & 1 << 2) {
3885                 struct kvm_segment kvm_seg;
3886
3887                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3888
3889                 if (kvm_seg.unusable)
3890                         dtable->limit = 0;
3891                 else
3892                         dtable->limit = kvm_seg.limit;
3893                 dtable->base = kvm_seg.base;
3894         }
3895         else
3896                 kvm_x86_ops->get_gdt(vcpu, dtable);
3897 }
3898
3899 /* allowed just for 8 bytes segments */
3900 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3901                                          struct desc_struct *seg_desc)
3902 {
3903         gpa_t gpa;
3904         struct descriptor_table dtable;
3905         u16 index = selector >> 3;
3906
3907         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3908
3909         if (dtable.limit < index * 8 + 7) {
3910                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3911                 return 1;
3912         }
3913         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3914         gpa += index * 8;
3915         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3916 }
3917
3918 /* allowed just for 8 bytes segments */
3919 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3920                                          struct desc_struct *seg_desc)
3921 {
3922         gpa_t gpa;
3923         struct descriptor_table dtable;
3924         u16 index = selector >> 3;
3925
3926         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3927
3928         if (dtable.limit < index * 8 + 7)
3929                 return 1;
3930         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3931         gpa += index * 8;
3932         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3933 }
3934
3935 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3936                              struct desc_struct *seg_desc)
3937 {
3938         u32 base_addr;
3939
3940         base_addr = seg_desc->base0;
3941         base_addr |= (seg_desc->base1 << 16);
3942         base_addr |= (seg_desc->base2 << 24);
3943
3944         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3945 }
3946
3947 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3948 {
3949         struct kvm_segment kvm_seg;
3950
3951         kvm_get_segment(vcpu, &kvm_seg, seg);
3952         return kvm_seg.selector;
3953 }
3954
3955 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3956                                                 u16 selector,
3957                                                 struct kvm_segment *kvm_seg)
3958 {
3959         struct desc_struct seg_desc;
3960
3961         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3962                 return 1;
3963         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3964         return 0;
3965 }
3966
3967 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3968 {
3969         struct kvm_segment segvar = {
3970                 .base = selector << 4,
3971                 .limit = 0xffff,
3972                 .selector = selector,
3973                 .type = 3,
3974                 .present = 1,
3975                 .dpl = 3,
3976                 .db = 0,
3977                 .s = 1,
3978                 .l = 0,
3979                 .g = 0,
3980                 .avl = 0,
3981                 .unusable = 0,
3982         };
3983         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3984         return 0;
3985 }
3986
3987 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3988                                 int type_bits, int seg)
3989 {
3990         struct kvm_segment kvm_seg;
3991
3992         if (!(vcpu->arch.cr0 & X86_CR0_PE))
3993                 return kvm_load_realmode_segment(vcpu, selector, seg);
3994         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3995                 return 1;
3996         kvm_seg.type |= type_bits;
3997
3998         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3999             seg != VCPU_SREG_LDTR)
4000                 if (!kvm_seg.s)
4001                         kvm_seg.unusable = 1;
4002
4003         kvm_set_segment(vcpu, &kvm_seg, seg);
4004         return 0;
4005 }
4006
4007 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4008                                 struct tss_segment_32 *tss)
4009 {
4010         tss->cr3 = vcpu->arch.cr3;
4011         tss->eip = kvm_rip_read(vcpu);
4012         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4013         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4014         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4015         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4016         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4017         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4018         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4019         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4020         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4021         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4022         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4023         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4024         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4025         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4026         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4027         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4028 }
4029
4030 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4031                                   struct tss_segment_32 *tss)
4032 {
4033         kvm_set_cr3(vcpu, tss->cr3);
4034
4035         kvm_rip_write(vcpu, tss->eip);
4036         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4037
4038         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4039         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4040         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4041         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4042         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4043         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4044         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4045         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4046
4047         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4048                 return 1;
4049
4050         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4051                 return 1;
4052
4053         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4054                 return 1;
4055
4056         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4057                 return 1;
4058
4059         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4060                 return 1;
4061
4062         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4063                 return 1;
4064
4065         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4066                 return 1;
4067         return 0;
4068 }
4069
4070 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4071                                 struct tss_segment_16 *tss)
4072 {
4073         tss->ip = kvm_rip_read(vcpu);
4074         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4075         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4076         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4077         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4078         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4079         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4080         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4081         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4082         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4083
4084         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4085         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4086         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4087         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4088         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4089         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4090 }
4091
4092 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4093                                  struct tss_segment_16 *tss)
4094 {
4095         kvm_rip_write(vcpu, tss->ip);
4096         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4097         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4098         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4099         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4100         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4101         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4102         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4103         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4104         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4105
4106         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4107                 return 1;
4108
4109         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4110                 return 1;
4111
4112         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4113                 return 1;
4114
4115         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4116                 return 1;
4117
4118         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4119                 return 1;
4120         return 0;
4121 }
4122
4123 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4124                               u16 old_tss_sel, u32 old_tss_base,
4125                               struct desc_struct *nseg_desc)
4126 {
4127         struct tss_segment_16 tss_segment_16;
4128         int ret = 0;
4129
4130         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4131                            sizeof tss_segment_16))
4132                 goto out;
4133
4134         save_state_to_tss16(vcpu, &tss_segment_16);
4135
4136         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4137                             sizeof tss_segment_16))
4138                 goto out;
4139
4140         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4141                            &tss_segment_16, sizeof tss_segment_16))
4142                 goto out;
4143
4144         if (old_tss_sel != 0xffff) {
4145                 tss_segment_16.prev_task_link = old_tss_sel;
4146
4147                 if (kvm_write_guest(vcpu->kvm,
4148                                     get_tss_base_addr(vcpu, nseg_desc),
4149                                     &tss_segment_16.prev_task_link,
4150                                     sizeof tss_segment_16.prev_task_link))
4151                         goto out;
4152         }
4153
4154         if (load_state_from_tss16(vcpu, &tss_segment_16))
4155                 goto out;
4156
4157         ret = 1;
4158 out:
4159         return ret;
4160 }
4161
4162 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4163                        u16 old_tss_sel, u32 old_tss_base,
4164                        struct desc_struct *nseg_desc)
4165 {
4166         struct tss_segment_32 tss_segment_32;
4167         int ret = 0;
4168
4169         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4170                            sizeof tss_segment_32))
4171                 goto out;
4172
4173         save_state_to_tss32(vcpu, &tss_segment_32);
4174
4175         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4176                             sizeof tss_segment_32))
4177                 goto out;
4178
4179         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4180                            &tss_segment_32, sizeof tss_segment_32))
4181                 goto out;
4182
4183         if (old_tss_sel != 0xffff) {
4184                 tss_segment_32.prev_task_link = old_tss_sel;
4185
4186                 if (kvm_write_guest(vcpu->kvm,
4187                                     get_tss_base_addr(vcpu, nseg_desc),
4188                                     &tss_segment_32.prev_task_link,
4189                                     sizeof tss_segment_32.prev_task_link))
4190                         goto out;
4191         }
4192
4193         if (load_state_from_tss32(vcpu, &tss_segment_32))
4194                 goto out;
4195
4196         ret = 1;
4197 out:
4198         return ret;
4199 }
4200
4201 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4202 {
4203         struct kvm_segment tr_seg;
4204         struct desc_struct cseg_desc;
4205         struct desc_struct nseg_desc;
4206         int ret = 0;
4207         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4208         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4209
4210         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4211
4212         /* FIXME: Handle errors. Failure to read either TSS or their
4213          * descriptors should generate a pagefault.
4214          */
4215         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4216                 goto out;
4217
4218         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4219                 goto out;
4220
4221         if (reason != TASK_SWITCH_IRET) {
4222                 int cpl;
4223
4224                 cpl = kvm_x86_ops->get_cpl(vcpu);
4225                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4226                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4227                         return 1;
4228                 }
4229         }
4230
4231         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4232                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4233                 return 1;
4234         }
4235
4236         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4237                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4238                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4239         }
4240
4241         if (reason == TASK_SWITCH_IRET) {
4242                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4243                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4244         }
4245
4246         /* set back link to prev task only if NT bit is set in eflags
4247            note that old_tss_sel is not used afetr this point */
4248         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4249                 old_tss_sel = 0xffff;
4250
4251         /* set back link to prev task only if NT bit is set in eflags
4252            note that old_tss_sel is not used afetr this point */
4253         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4254                 old_tss_sel = 0xffff;
4255
4256         if (nseg_desc.type & 8)
4257                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4258                                          old_tss_base, &nseg_desc);
4259         else
4260                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4261                                          old_tss_base, &nseg_desc);
4262
4263         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4264                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4265                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4266         }
4267
4268         if (reason != TASK_SWITCH_IRET) {
4269                 nseg_desc.type |= (1 << 1);
4270                 save_guest_segment_descriptor(vcpu, tss_selector,
4271                                               &nseg_desc);
4272         }
4273
4274         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4275         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4276         tr_seg.type = 11;
4277         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4278 out:
4279         return ret;
4280 }
4281 EXPORT_SYMBOL_GPL(kvm_task_switch);
4282
4283 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4284                                   struct kvm_sregs *sregs)
4285 {
4286         int mmu_reset_needed = 0;
4287         int pending_vec, max_bits;
4288         struct descriptor_table dt;
4289
4290         vcpu_load(vcpu);
4291
4292         dt.limit = sregs->idt.limit;
4293         dt.base = sregs->idt.base;
4294         kvm_x86_ops->set_idt(vcpu, &dt);
4295         dt.limit = sregs->gdt.limit;
4296         dt.base = sregs->gdt.base;
4297         kvm_x86_ops->set_gdt(vcpu, &dt);
4298
4299         vcpu->arch.cr2 = sregs->cr2;
4300         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4301
4302         down_read(&vcpu->kvm->slots_lock);
4303         if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4304                 vcpu->arch.cr3 = sregs->cr3;
4305         else
4306                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4307         up_read(&vcpu->kvm->slots_lock);
4308
4309         kvm_set_cr8(vcpu, sregs->cr8);
4310
4311         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4312         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4313         kvm_set_apic_base(vcpu, sregs->apic_base);
4314
4315         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4316
4317         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4318         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4319         vcpu->arch.cr0 = sregs->cr0;
4320
4321         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4322         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4323         if (!is_long_mode(vcpu) && is_pae(vcpu))
4324                 load_pdptrs(vcpu, vcpu->arch.cr3);
4325
4326         if (mmu_reset_needed)
4327                 kvm_mmu_reset_context(vcpu);
4328
4329         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4330         pending_vec = find_first_bit(
4331                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4332         if (pending_vec < max_bits) {
4333                 kvm_queue_interrupt(vcpu, pending_vec, false);
4334                 pr_debug("Set back pending irq %d\n", pending_vec);
4335                 if (irqchip_in_kernel(vcpu->kvm))
4336                         kvm_pic_clear_isr_ack(vcpu->kvm);
4337         }
4338
4339         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4340         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4341         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4342         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4343         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4344         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4345
4346         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4347         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4348
4349         /* Older userspace won't unhalt the vcpu on reset. */
4350         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4351             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4352             !(vcpu->arch.cr0 & X86_CR0_PE))
4353                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4354
4355         vcpu_put(vcpu);
4356
4357         return 0;
4358 }
4359
4360 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4361                                         struct kvm_guest_debug *dbg)
4362 {
4363         int i, r;
4364
4365         vcpu_load(vcpu);
4366
4367         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4368             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4369                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4370                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4371                 vcpu->arch.switch_db_regs =
4372                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4373         } else {
4374                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4375                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4376                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4377         }
4378
4379         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4380
4381         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4382                 kvm_queue_exception(vcpu, DB_VECTOR);
4383         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4384                 kvm_queue_exception(vcpu, BP_VECTOR);
4385
4386         vcpu_put(vcpu);
4387
4388         return r;
4389 }
4390
4391 /*
4392  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4393  * we have asm/x86/processor.h
4394  */
4395 struct fxsave {
4396         u16     cwd;
4397         u16     swd;
4398         u16     twd;
4399         u16     fop;
4400         u64     rip;
4401         u64     rdp;
4402         u32     mxcsr;
4403         u32     mxcsr_mask;
4404         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4405 #ifdef CONFIG_X86_64
4406         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4407 #else
4408         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4409 #endif
4410 };
4411
4412 /*
4413  * Translate a guest virtual address to a guest physical address.
4414  */
4415 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4416                                     struct kvm_translation *tr)
4417 {
4418         unsigned long vaddr = tr->linear_address;
4419         gpa_t gpa;
4420
4421         vcpu_load(vcpu);
4422         down_read(&vcpu->kvm->slots_lock);
4423         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4424         up_read(&vcpu->kvm->slots_lock);
4425         tr->physical_address = gpa;
4426         tr->valid = gpa != UNMAPPED_GVA;
4427         tr->writeable = 1;
4428         tr->usermode = 0;
4429         vcpu_put(vcpu);
4430
4431         return 0;
4432 }
4433
4434 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4435 {
4436         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4437
4438         vcpu_load(vcpu);
4439
4440         memcpy(fpu->fpr, fxsave->st_space, 128);
4441         fpu->fcw = fxsave->cwd;
4442         fpu->fsw = fxsave->swd;
4443         fpu->ftwx = fxsave->twd;
4444         fpu->last_opcode = fxsave->fop;
4445         fpu->last_ip = fxsave->rip;
4446         fpu->last_dp = fxsave->rdp;
4447         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4448
4449         vcpu_put(vcpu);
4450
4451         return 0;
4452 }
4453
4454 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4455 {
4456         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4457
4458         vcpu_load(vcpu);
4459
4460         memcpy(fxsave->st_space, fpu->fpr, 128);
4461         fxsave->cwd = fpu->fcw;
4462         fxsave->swd = fpu->fsw;
4463         fxsave->twd = fpu->ftwx;
4464         fxsave->fop = fpu->last_opcode;
4465         fxsave->rip = fpu->last_ip;
4466         fxsave->rdp = fpu->last_dp;
4467         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4468
4469         vcpu_put(vcpu);
4470
4471         return 0;
4472 }
4473
4474 void fx_init(struct kvm_vcpu *vcpu)
4475 {
4476         unsigned after_mxcsr_mask;
4477
4478         /*
4479          * Touch the fpu the first time in non atomic context as if
4480          * this is the first fpu instruction the exception handler
4481          * will fire before the instruction returns and it'll have to
4482          * allocate ram with GFP_KERNEL.
4483          */
4484         if (!used_math())
4485                 kvm_fx_save(&vcpu->arch.host_fx_image);
4486
4487         /* Initialize guest FPU by resetting ours and saving into guest's */
4488         preempt_disable();
4489         kvm_fx_save(&vcpu->arch.host_fx_image);
4490         kvm_fx_finit();
4491         kvm_fx_save(&vcpu->arch.guest_fx_image);
4492         kvm_fx_restore(&vcpu->arch.host_fx_image);
4493         preempt_enable();
4494
4495         vcpu->arch.cr0 |= X86_CR0_ET;
4496         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4497         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4498         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4499                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4500 }
4501 EXPORT_SYMBOL_GPL(fx_init);
4502
4503 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4504 {
4505         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4506                 return;
4507
4508         vcpu->guest_fpu_loaded = 1;
4509         kvm_fx_save(&vcpu->arch.host_fx_image);
4510         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4511 }
4512 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4513
4514 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4515 {
4516         if (!vcpu->guest_fpu_loaded)
4517                 return;
4518
4519         vcpu->guest_fpu_loaded = 0;
4520         kvm_fx_save(&vcpu->arch.guest_fx_image);
4521         kvm_fx_restore(&vcpu->arch.host_fx_image);
4522         ++vcpu->stat.fpu_reload;
4523 }
4524 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4525
4526 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4527 {
4528         if (vcpu->arch.time_page) {
4529                 kvm_release_page_dirty(vcpu->arch.time_page);
4530                 vcpu->arch.time_page = NULL;
4531         }
4532
4533         kvm_x86_ops->vcpu_free(vcpu);
4534 }
4535
4536 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4537                                                 unsigned int id)
4538 {
4539         return kvm_x86_ops->vcpu_create(kvm, id);
4540 }
4541
4542 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4543 {
4544         int r;
4545
4546         /* We do fxsave: this must be aligned. */
4547         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4548
4549         vcpu->arch.mtrr_state.have_fixed = 1;
4550         vcpu_load(vcpu);
4551         r = kvm_arch_vcpu_reset(vcpu);
4552         if (r == 0)
4553                 r = kvm_mmu_setup(vcpu);
4554         vcpu_put(vcpu);
4555         if (r < 0)
4556                 goto free_vcpu;
4557
4558         return 0;
4559 free_vcpu:
4560         kvm_x86_ops->vcpu_free(vcpu);
4561         return r;
4562 }
4563
4564 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4565 {
4566         vcpu_load(vcpu);
4567         kvm_mmu_unload(vcpu);
4568         vcpu_put(vcpu);
4569
4570         kvm_x86_ops->vcpu_free(vcpu);
4571 }
4572
4573 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4574 {
4575         vcpu->arch.nmi_pending = false;
4576         vcpu->arch.nmi_injected = false;
4577
4578         vcpu->arch.switch_db_regs = 0;
4579         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4580         vcpu->arch.dr6 = DR6_FIXED_1;
4581         vcpu->arch.dr7 = DR7_FIXED_1;
4582
4583         return kvm_x86_ops->vcpu_reset(vcpu);
4584 }
4585
4586 void kvm_arch_hardware_enable(void *garbage)
4587 {
4588         kvm_x86_ops->hardware_enable(garbage);
4589 }
4590
4591 void kvm_arch_hardware_disable(void *garbage)
4592 {
4593         kvm_x86_ops->hardware_disable(garbage);
4594 }
4595
4596 int kvm_arch_hardware_setup(void)
4597 {
4598         return kvm_x86_ops->hardware_setup();
4599 }
4600
4601 void kvm_arch_hardware_unsetup(void)
4602 {
4603         kvm_x86_ops->hardware_unsetup();
4604 }
4605
4606 void kvm_arch_check_processor_compat(void *rtn)
4607 {
4608         kvm_x86_ops->check_processor_compatibility(rtn);
4609 }
4610
4611 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4612 {
4613         struct page *page;
4614         struct kvm *kvm;
4615         int r;
4616
4617         BUG_ON(vcpu->kvm == NULL);
4618         kvm = vcpu->kvm;
4619
4620         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4621         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4622                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4623         else
4624                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4625
4626         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4627         if (!page) {
4628                 r = -ENOMEM;
4629                 goto fail;
4630         }
4631         vcpu->arch.pio_data = page_address(page);
4632
4633         r = kvm_mmu_create(vcpu);
4634         if (r < 0)
4635                 goto fail_free_pio_data;
4636
4637         if (irqchip_in_kernel(kvm)) {
4638                 r = kvm_create_lapic(vcpu);
4639                 if (r < 0)
4640                         goto fail_mmu_destroy;
4641         }
4642
4643         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4644                                        GFP_KERNEL);
4645         if (!vcpu->arch.mce_banks) {
4646                 r = -ENOMEM;
4647                 goto fail_mmu_destroy;
4648         }
4649         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4650
4651         return 0;
4652
4653 fail_mmu_destroy:
4654         kvm_mmu_destroy(vcpu);
4655 fail_free_pio_data:
4656         free_page((unsigned long)vcpu->arch.pio_data);
4657 fail:
4658         return r;
4659 }
4660
4661 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4662 {
4663         kvm_free_lapic(vcpu);
4664         down_read(&vcpu->kvm->slots_lock);
4665         kvm_mmu_destroy(vcpu);
4666         up_read(&vcpu->kvm->slots_lock);
4667         free_page((unsigned long)vcpu->arch.pio_data);
4668 }
4669
4670 struct  kvm *kvm_arch_create_vm(void)
4671 {
4672         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4673
4674         if (!kvm)
4675                 return ERR_PTR(-ENOMEM);
4676
4677         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4678         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4679
4680         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4681         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4682
4683         rdtscll(kvm->arch.vm_init_tsc);
4684
4685         return kvm;
4686 }
4687
4688 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4689 {
4690         vcpu_load(vcpu);
4691         kvm_mmu_unload(vcpu);
4692         vcpu_put(vcpu);
4693 }
4694
4695 static void kvm_free_vcpus(struct kvm *kvm)
4696 {
4697         unsigned int i;
4698         struct kvm_vcpu *vcpu;
4699
4700         /*
4701          * Unpin any mmu pages first.
4702          */
4703         kvm_for_each_vcpu(i, vcpu, kvm)
4704                 kvm_unload_vcpu_mmu(vcpu);
4705         kvm_for_each_vcpu(i, vcpu, kvm)
4706                 kvm_arch_vcpu_free(vcpu);
4707
4708         mutex_lock(&kvm->lock);
4709         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4710                 kvm->vcpus[i] = NULL;
4711
4712         atomic_set(&kvm->online_vcpus, 0);
4713         mutex_unlock(&kvm->lock);
4714 }
4715
4716 void kvm_arch_sync_events(struct kvm *kvm)
4717 {
4718         kvm_free_all_assigned_devices(kvm);
4719 }
4720
4721 void kvm_arch_destroy_vm(struct kvm *kvm)
4722 {
4723         kvm_iommu_unmap_guest(kvm);
4724         kvm_free_pit(kvm);
4725         kfree(kvm->arch.vpic);
4726         kfree(kvm->arch.vioapic);
4727         kvm_free_vcpus(kvm);
4728         kvm_free_physmem(kvm);
4729         if (kvm->arch.apic_access_page)
4730                 put_page(kvm->arch.apic_access_page);
4731         if (kvm->arch.ept_identity_pagetable)
4732                 put_page(kvm->arch.ept_identity_pagetable);
4733         kfree(kvm);
4734 }
4735
4736 int kvm_arch_set_memory_region(struct kvm *kvm,
4737                                 struct kvm_userspace_memory_region *mem,
4738                                 struct kvm_memory_slot old,
4739                                 int user_alloc)
4740 {
4741         int npages = mem->memory_size >> PAGE_SHIFT;
4742         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4743
4744         /*To keep backward compatibility with older userspace,
4745          *x86 needs to hanlde !user_alloc case.
4746          */
4747         if (!user_alloc) {
4748                 if (npages && !old.rmap) {
4749                         unsigned long userspace_addr;
4750
4751                         down_write(&current->mm->mmap_sem);
4752                         userspace_addr = do_mmap(NULL, 0,
4753                                                  npages * PAGE_SIZE,
4754                                                  PROT_READ | PROT_WRITE,
4755                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4756                                                  0);
4757                         up_write(&current->mm->mmap_sem);
4758
4759                         if (IS_ERR((void *)userspace_addr))
4760                                 return PTR_ERR((void *)userspace_addr);
4761
4762                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4763                         spin_lock(&kvm->mmu_lock);
4764                         memslot->userspace_addr = userspace_addr;
4765                         spin_unlock(&kvm->mmu_lock);
4766                 } else {
4767                         if (!old.user_alloc && old.rmap) {
4768                                 int ret;
4769
4770                                 down_write(&current->mm->mmap_sem);
4771                                 ret = do_munmap(current->mm, old.userspace_addr,
4772                                                 old.npages * PAGE_SIZE);
4773                                 up_write(&current->mm->mmap_sem);
4774                                 if (ret < 0)
4775                                         printk(KERN_WARNING
4776                                        "kvm_vm_ioctl_set_memory_region: "
4777                                        "failed to munmap memory\n");
4778                         }
4779                 }
4780         }
4781
4782         spin_lock(&kvm->mmu_lock);
4783         if (!kvm->arch.n_requested_mmu_pages) {
4784                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4785                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4786         }
4787
4788         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4789         spin_unlock(&kvm->mmu_lock);
4790         kvm_flush_remote_tlbs(kvm);
4791
4792         return 0;
4793 }
4794
4795 void kvm_arch_flush_shadow(struct kvm *kvm)
4796 {
4797         kvm_mmu_zap_all(kvm);
4798         kvm_reload_remote_mmus(kvm);
4799 }
4800
4801 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4802 {
4803         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4804                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4805                || vcpu->arch.nmi_pending;
4806 }
4807
4808 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4809 {
4810         int me;
4811         int cpu = vcpu->cpu;
4812
4813         if (waitqueue_active(&vcpu->wq)) {
4814                 wake_up_interruptible(&vcpu->wq);
4815                 ++vcpu->stat.halt_wakeup;
4816         }
4817
4818         me = get_cpu();
4819         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4820                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4821                         smp_send_reschedule(cpu);
4822         put_cpu();
4823 }
4824
4825 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4826 {
4827         return kvm_x86_ops->interrupt_allowed(vcpu);
4828 }
4829
4830 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);