2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <trace/events/kvm.h>
44 #undef TRACE_INCLUDE_FILE
45 #define CREATE_TRACE_POINTS
48 #include <asm/debugreg.h>
49 #include <asm/uaccess.h>
55 #define MAX_IO_MSRS 256
56 #define CR0_RESERVED_BITS \
57 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
58 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
59 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
60 #define CR4_RESERVED_BITS \
61 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
62 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
63 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
64 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
66 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
76 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
78 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
86 struct kvm_cpuid_entry2 __user *entries);
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94 #define KVM_NR_SHARED_MSRS 16
96 struct kvm_shared_msrs_global {
98 u32 msrs[KVM_NR_SHARED_MSRS];
101 struct kvm_shared_msrs {
102 struct user_return_notifier urn;
104 struct kvm_shared_msr_values {
107 } values[KVM_NR_SHARED_MSRS];
110 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
111 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
113 struct kvm_stats_debugfs_item debugfs_entries[] = {
114 { "pf_fixed", VCPU_STAT(pf_fixed) },
115 { "pf_guest", VCPU_STAT(pf_guest) },
116 { "tlb_flush", VCPU_STAT(tlb_flush) },
117 { "invlpg", VCPU_STAT(invlpg) },
118 { "exits", VCPU_STAT(exits) },
119 { "io_exits", VCPU_STAT(io_exits) },
120 { "mmio_exits", VCPU_STAT(mmio_exits) },
121 { "signal_exits", VCPU_STAT(signal_exits) },
122 { "irq_window", VCPU_STAT(irq_window_exits) },
123 { "nmi_window", VCPU_STAT(nmi_window_exits) },
124 { "halt_exits", VCPU_STAT(halt_exits) },
125 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
126 { "hypercalls", VCPU_STAT(hypercalls) },
127 { "request_irq", VCPU_STAT(request_irq_exits) },
128 { "irq_exits", VCPU_STAT(irq_exits) },
129 { "host_state_reload", VCPU_STAT(host_state_reload) },
130 { "efer_reload", VCPU_STAT(efer_reload) },
131 { "fpu_reload", VCPU_STAT(fpu_reload) },
132 { "insn_emulation", VCPU_STAT(insn_emulation) },
133 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
134 { "irq_injections", VCPU_STAT(irq_injections) },
135 { "nmi_injections", VCPU_STAT(nmi_injections) },
136 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
137 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
138 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
139 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
140 { "mmu_flooded", VM_STAT(mmu_flooded) },
141 { "mmu_recycled", VM_STAT(mmu_recycled) },
142 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
143 { "mmu_unsync", VM_STAT(mmu_unsync) },
144 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
145 { "largepages", VM_STAT(lpages) },
149 static void kvm_on_user_return(struct user_return_notifier *urn)
152 struct kvm_shared_msrs *locals
153 = container_of(urn, struct kvm_shared_msrs, urn);
154 struct kvm_shared_msr_values *values;
156 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
157 values = &locals->values[slot];
158 if (values->host != values->curr) {
159 wrmsrl(shared_msrs_global.msrs[slot], values->host);
160 values->curr = values->host;
163 locals->registered = false;
164 user_return_notifier_unregister(urn);
167 static void shared_msr_update(unsigned slot, u32 msr)
169 struct kvm_shared_msrs *smsr;
172 smsr = &__get_cpu_var(shared_msrs);
173 /* only read, and nobody should modify it at this time,
174 * so don't need lock */
175 if (slot >= shared_msrs_global.nr) {
176 printk(KERN_ERR "kvm: invalid MSR slot!");
179 rdmsrl_safe(msr, &value);
180 smsr->values[slot].host = value;
181 smsr->values[slot].curr = value;
184 void kvm_define_shared_msr(unsigned slot, u32 msr)
186 if (slot >= shared_msrs_global.nr)
187 shared_msrs_global.nr = slot + 1;
188 shared_msrs_global.msrs[slot] = msr;
189 /* we need ensured the shared_msr_global have been updated */
192 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
194 static void kvm_shared_msr_cpu_online(void)
198 for (i = 0; i < shared_msrs_global.nr; ++i)
199 shared_msr_update(i, shared_msrs_global.msrs[i]);
202 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
204 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
206 if (((value ^ smsr->values[slot].curr) & mask) == 0)
208 smsr->values[slot].curr = value;
209 wrmsrl(shared_msrs_global.msrs[slot], value);
210 if (!smsr->registered) {
211 smsr->urn.on_user_return = kvm_on_user_return;
212 user_return_notifier_register(&smsr->urn);
213 smsr->registered = true;
216 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
218 static void drop_user_return_notifiers(void *ignore)
220 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222 if (smsr->registered)
223 kvm_on_user_return(&smsr->urn);
226 unsigned long segment_base(u16 selector)
229 struct desc_struct *d;
230 unsigned long table_base;
233 if (!(selector & ~3))
236 native_store_gdt(&gdt);
237 table_base = gdt.address;
239 if (selector & 4) { /* from ldt */
240 u16 ldt_selector = kvm_read_ldt();
242 if (!(ldt_selector & ~3))
244 table_base = segment_base(ldt_selector);
246 d = (struct desc_struct *)(table_base + (selector & ~7));
247 v = get_desc_base(d);
249 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
250 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
254 EXPORT_SYMBOL_GPL(segment_base);
256 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
258 if (irqchip_in_kernel(vcpu->kvm))
259 return vcpu->arch.apic_base;
261 return vcpu->arch.apic_base;
263 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
265 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
267 /* TODO: reserve bits check */
268 if (irqchip_in_kernel(vcpu->kvm))
269 kvm_lapic_set_base(vcpu, data);
271 vcpu->arch.apic_base = data;
273 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
275 #define EXCPT_BENIGN 0
276 #define EXCPT_CONTRIBUTORY 1
279 static int exception_class(int vector)
289 return EXCPT_CONTRIBUTORY;
296 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
297 unsigned nr, bool has_error, u32 error_code)
302 if (!vcpu->arch.exception.pending) {
304 vcpu->arch.exception.pending = true;
305 vcpu->arch.exception.has_error_code = has_error;
306 vcpu->arch.exception.nr = nr;
307 vcpu->arch.exception.error_code = error_code;
311 /* to check exception */
312 prev_nr = vcpu->arch.exception.nr;
313 if (prev_nr == DF_VECTOR) {
314 /* triple fault -> shutdown */
315 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
318 class1 = exception_class(prev_nr);
319 class2 = exception_class(nr);
320 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
321 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
322 /* generate double fault per SDM Table 5-5 */
323 vcpu->arch.exception.pending = true;
324 vcpu->arch.exception.has_error_code = true;
325 vcpu->arch.exception.nr = DF_VECTOR;
326 vcpu->arch.exception.error_code = 0;
328 /* replace previous exception with a new one in a hope
329 that instruction re-execution will regenerate lost
334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
336 kvm_multiple_exception(vcpu, nr, false, 0);
338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
340 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
343 ++vcpu->stat.pf_guest;
344 vcpu->arch.cr2 = addr;
345 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
348 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
350 vcpu->arch.nmi_pending = 1;
352 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
354 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
356 kvm_multiple_exception(vcpu, nr, true, error_code);
358 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
361 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
362 * a #GP and return false.
364 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
366 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
368 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
371 EXPORT_SYMBOL_GPL(kvm_require_cpl);
374 * Load the pae pdptrs. Return true is they are all valid.
376 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
378 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
379 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
382 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
384 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
385 offset * sizeof(u64), sizeof(pdpte));
390 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
391 if (is_present_gpte(pdpte[i]) &&
392 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
399 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
400 __set_bit(VCPU_EXREG_PDPTR,
401 (unsigned long *)&vcpu->arch.regs_avail);
402 __set_bit(VCPU_EXREG_PDPTR,
403 (unsigned long *)&vcpu->arch.regs_dirty);
408 EXPORT_SYMBOL_GPL(load_pdptrs);
410 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
412 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
416 if (is_long_mode(vcpu) || !is_pae(vcpu))
419 if (!test_bit(VCPU_EXREG_PDPTR,
420 (unsigned long *)&vcpu->arch.regs_avail))
423 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
426 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
432 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
437 if (cr0 & 0xffffffff00000000UL) {
438 kvm_inject_gp(vcpu, 0);
443 cr0 &= ~CR0_RESERVED_BITS;
445 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
446 kvm_inject_gp(vcpu, 0);
450 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
451 kvm_inject_gp(vcpu, 0);
455 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
457 if ((vcpu->arch.efer & EFER_LME)) {
461 kvm_inject_gp(vcpu, 0);
464 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
466 kvm_inject_gp(vcpu, 0);
472 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
473 kvm_inject_gp(vcpu, 0);
479 kvm_x86_ops->set_cr0(vcpu, cr0);
481 kvm_mmu_reset_context(vcpu);
484 EXPORT_SYMBOL_GPL(kvm_set_cr0);
486 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
488 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
490 EXPORT_SYMBOL_GPL(kvm_lmsw);
492 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
494 unsigned long old_cr4 = kvm_read_cr4(vcpu);
495 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
497 if (cr4 & CR4_RESERVED_BITS) {
498 kvm_inject_gp(vcpu, 0);
502 if (is_long_mode(vcpu)) {
503 if (!(cr4 & X86_CR4_PAE)) {
504 kvm_inject_gp(vcpu, 0);
507 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
508 && ((cr4 ^ old_cr4) & pdptr_bits)
509 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
510 kvm_inject_gp(vcpu, 0);
514 if (cr4 & X86_CR4_VMXE) {
515 kvm_inject_gp(vcpu, 0);
518 kvm_x86_ops->set_cr4(vcpu, cr4);
519 vcpu->arch.cr4 = cr4;
520 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
521 kvm_mmu_reset_context(vcpu);
523 EXPORT_SYMBOL_GPL(kvm_set_cr4);
525 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
527 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
528 kvm_mmu_sync_roots(vcpu);
529 kvm_mmu_flush_tlb(vcpu);
533 if (is_long_mode(vcpu)) {
534 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
535 kvm_inject_gp(vcpu, 0);
540 if (cr3 & CR3_PAE_RESERVED_BITS) {
541 kvm_inject_gp(vcpu, 0);
544 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
545 kvm_inject_gp(vcpu, 0);
550 * We don't check reserved bits in nonpae mode, because
551 * this isn't enforced, and VMware depends on this.
556 * Does the new cr3 value map to physical memory? (Note, we
557 * catch an invalid cr3 even in real-mode, because it would
558 * cause trouble later on when we turn on paging anyway.)
560 * A real CPU would silently accept an invalid cr3 and would
561 * attempt to use it - with largely undefined (and often hard
562 * to debug) behavior on the guest side.
564 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
565 kvm_inject_gp(vcpu, 0);
567 vcpu->arch.cr3 = cr3;
568 vcpu->arch.mmu.new_cr3(vcpu);
571 EXPORT_SYMBOL_GPL(kvm_set_cr3);
573 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
575 if (cr8 & CR8_RESERVED_BITS) {
576 kvm_inject_gp(vcpu, 0);
579 if (irqchip_in_kernel(vcpu->kvm))
580 kvm_lapic_set_tpr(vcpu, cr8);
582 vcpu->arch.cr8 = cr8;
584 EXPORT_SYMBOL_GPL(kvm_set_cr8);
586 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
588 if (irqchip_in_kernel(vcpu->kvm))
589 return kvm_lapic_get_cr8(vcpu);
591 return vcpu->arch.cr8;
593 EXPORT_SYMBOL_GPL(kvm_get_cr8);
595 static inline u32 bit(int bitno)
597 return 1 << (bitno & 31);
601 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
602 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
604 * This list is modified at module load time to reflect the
605 * capabilities of the host cpu. This capabilities test skips MSRs that are
606 * kvm-specific. Those are put in the beginning of the list.
609 #define KVM_SAVE_MSRS_BEGIN 5
610 static u32 msrs_to_save[] = {
611 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
612 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
613 HV_X64_MSR_APIC_ASSIST_PAGE,
614 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
617 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
619 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
622 static unsigned num_msrs_to_save;
624 static u32 emulated_msrs[] = {
625 MSR_IA32_MISC_ENABLE,
628 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
630 if (efer & efer_reserved_bits) {
631 kvm_inject_gp(vcpu, 0);
636 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
637 kvm_inject_gp(vcpu, 0);
641 if (efer & EFER_FFXSR) {
642 struct kvm_cpuid_entry2 *feat;
644 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
645 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
646 kvm_inject_gp(vcpu, 0);
651 if (efer & EFER_SVME) {
652 struct kvm_cpuid_entry2 *feat;
654 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
655 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
656 kvm_inject_gp(vcpu, 0);
661 kvm_x86_ops->set_efer(vcpu, efer);
664 efer |= vcpu->arch.efer & EFER_LMA;
666 vcpu->arch.efer = efer;
668 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
669 kvm_mmu_reset_context(vcpu);
672 void kvm_enable_efer_bits(u64 mask)
674 efer_reserved_bits &= ~mask;
676 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
680 * Writes msr value into into the appropriate "register".
681 * Returns 0 on success, non-0 otherwise.
682 * Assumes vcpu_load() was already called.
684 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
686 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
690 * Adapt set_msr() to msr_io()'s calling convention
692 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
694 return kvm_set_msr(vcpu, index, *data);
697 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
700 struct pvclock_wall_clock wc;
701 struct timespec boot;
708 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
711 * The guest calculates current wall clock time by adding
712 * system time (updated by kvm_write_guest_time below) to the
713 * wall clock specified here. guest system time equals host
714 * system time for us, thus we must fill in host boot time here.
718 wc.sec = boot.tv_sec;
719 wc.nsec = boot.tv_nsec;
720 wc.version = version;
722 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
725 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
728 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
730 uint32_t quotient, remainder;
732 /* Don't try to replace with do_div(), this one calculates
733 * "(dividend << 32) / divisor" */
735 : "=a" (quotient), "=d" (remainder)
736 : "0" (0), "1" (dividend), "r" (divisor) );
740 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
742 uint64_t nsecs = 1000000000LL;
747 tps64 = tsc_khz * 1000LL;
748 while (tps64 > nsecs*2) {
753 tps32 = (uint32_t)tps64;
754 while (tps32 <= (uint32_t)nsecs) {
759 hv_clock->tsc_shift = shift;
760 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
762 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
763 __func__, tsc_khz, hv_clock->tsc_shift,
764 hv_clock->tsc_to_system_mul);
767 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
769 static void kvm_write_guest_time(struct kvm_vcpu *v)
773 struct kvm_vcpu_arch *vcpu = &v->arch;
775 unsigned long this_tsc_khz;
777 if ((!vcpu->time_page))
780 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
781 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
782 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
783 vcpu->hv_clock_tsc_khz = this_tsc_khz;
785 put_cpu_var(cpu_tsc_khz);
787 /* Keep irq disabled to prevent changes to the clock */
788 local_irq_save(flags);
789 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
791 monotonic_to_bootbased(&ts);
792 local_irq_restore(flags);
794 /* With all the info we got, fill in the values */
796 vcpu->hv_clock.system_time = ts.tv_nsec +
797 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
800 * The interface expects us to write an even number signaling that the
801 * update is finished. Since the guest won't see the intermediate
802 * state, we just increase by 2 at the end.
804 vcpu->hv_clock.version += 2;
806 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
808 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
809 sizeof(vcpu->hv_clock));
811 kunmap_atomic(shared_kaddr, KM_USER0);
813 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
816 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
818 struct kvm_vcpu_arch *vcpu = &v->arch;
820 if (!vcpu->time_page)
822 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
826 static bool msr_mtrr_valid(unsigned msr)
829 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
830 case MSR_MTRRfix64K_00000:
831 case MSR_MTRRfix16K_80000:
832 case MSR_MTRRfix16K_A0000:
833 case MSR_MTRRfix4K_C0000:
834 case MSR_MTRRfix4K_C8000:
835 case MSR_MTRRfix4K_D0000:
836 case MSR_MTRRfix4K_D8000:
837 case MSR_MTRRfix4K_E0000:
838 case MSR_MTRRfix4K_E8000:
839 case MSR_MTRRfix4K_F0000:
840 case MSR_MTRRfix4K_F8000:
841 case MSR_MTRRdefType:
842 case MSR_IA32_CR_PAT:
850 static bool valid_pat_type(unsigned t)
852 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
855 static bool valid_mtrr_type(unsigned t)
857 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
860 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
864 if (!msr_mtrr_valid(msr))
867 if (msr == MSR_IA32_CR_PAT) {
868 for (i = 0; i < 8; i++)
869 if (!valid_pat_type((data >> (i * 8)) & 0xff))
872 } else if (msr == MSR_MTRRdefType) {
875 return valid_mtrr_type(data & 0xff);
876 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
877 for (i = 0; i < 8 ; i++)
878 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
884 return valid_mtrr_type(data & 0xff);
887 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
889 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
891 if (!mtrr_valid(vcpu, msr, data))
894 if (msr == MSR_MTRRdefType) {
895 vcpu->arch.mtrr_state.def_type = data;
896 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
897 } else if (msr == MSR_MTRRfix64K_00000)
899 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
900 p[1 + msr - MSR_MTRRfix16K_80000] = data;
901 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
902 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
903 else if (msr == MSR_IA32_CR_PAT)
904 vcpu->arch.pat = data;
905 else { /* Variable MTRRs */
906 int idx, is_mtrr_mask;
909 idx = (msr - 0x200) / 2;
910 is_mtrr_mask = msr - 0x200 - 2 * idx;
913 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
916 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
920 kvm_mmu_reset_context(vcpu);
924 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
926 u64 mcg_cap = vcpu->arch.mcg_cap;
927 unsigned bank_num = mcg_cap & 0xff;
930 case MSR_IA32_MCG_STATUS:
931 vcpu->arch.mcg_status = data;
933 case MSR_IA32_MCG_CTL:
934 if (!(mcg_cap & MCG_CTL_P))
936 if (data != 0 && data != ~(u64)0)
938 vcpu->arch.mcg_ctl = data;
941 if (msr >= MSR_IA32_MC0_CTL &&
942 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
943 u32 offset = msr - MSR_IA32_MC0_CTL;
944 /* only 0 or all 1s can be written to IA32_MCi_CTL
945 * some Linux kernels though clear bit 10 in bank 4 to
946 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
947 * this to avoid an uncatched #GP in the guest
949 if ((offset & 0x3) == 0 &&
950 data != 0 && (data | (1 << 10)) != ~(u64)0)
952 vcpu->arch.mce_banks[offset] = data;
960 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
962 struct kvm *kvm = vcpu->kvm;
963 int lm = is_long_mode(vcpu);
964 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
965 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
966 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
967 : kvm->arch.xen_hvm_config.blob_size_32;
968 u32 page_num = data & ~PAGE_MASK;
969 u64 page_addr = data & PAGE_MASK;
974 if (page_num >= blob_size)
977 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
981 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
983 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
992 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
994 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
997 static bool kvm_hv_msr_partition_wide(u32 msr)
1001 case HV_X64_MSR_GUEST_OS_ID:
1002 case HV_X64_MSR_HYPERCALL:
1010 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1012 struct kvm *kvm = vcpu->kvm;
1015 case HV_X64_MSR_GUEST_OS_ID:
1016 kvm->arch.hv_guest_os_id = data;
1017 /* setting guest os id to zero disables hypercall page */
1018 if (!kvm->arch.hv_guest_os_id)
1019 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1021 case HV_X64_MSR_HYPERCALL: {
1026 /* if guest os id is not set hypercall should remain disabled */
1027 if (!kvm->arch.hv_guest_os_id)
1029 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1030 kvm->arch.hv_hypercall = data;
1033 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1034 addr = gfn_to_hva(kvm, gfn);
1035 if (kvm_is_error_hva(addr))
1037 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1038 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1039 if (copy_to_user((void __user *)addr, instructions, 4))
1041 kvm->arch.hv_hypercall = data;
1045 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1046 "data 0x%llx\n", msr, data);
1052 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1055 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1058 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1059 vcpu->arch.hv_vapic = data;
1062 addr = gfn_to_hva(vcpu->kvm, data >>
1063 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1064 if (kvm_is_error_hva(addr))
1066 if (clear_user((void __user *)addr, PAGE_SIZE))
1068 vcpu->arch.hv_vapic = data;
1071 case HV_X64_MSR_EOI:
1072 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1073 case HV_X64_MSR_ICR:
1074 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1075 case HV_X64_MSR_TPR:
1076 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1078 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1079 "data 0x%llx\n", msr, data);
1086 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1090 set_efer(vcpu, data);
1093 data &= ~(u64)0x40; /* ignore flush filter disable */
1094 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1096 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1101 case MSR_FAM10H_MMIO_CONF_BASE:
1103 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1108 case MSR_AMD64_NB_CFG:
1110 case MSR_IA32_DEBUGCTLMSR:
1112 /* We support the non-activated case already */
1114 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1115 /* Values other than LBR and BTF are vendor-specific,
1116 thus reserved and should throw a #GP */
1119 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1122 case MSR_IA32_UCODE_REV:
1123 case MSR_IA32_UCODE_WRITE:
1124 case MSR_VM_HSAVE_PA:
1125 case MSR_AMD64_PATCH_LOADER:
1127 case 0x200 ... 0x2ff:
1128 return set_msr_mtrr(vcpu, msr, data);
1129 case MSR_IA32_APICBASE:
1130 kvm_set_apic_base(vcpu, data);
1132 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1133 return kvm_x2apic_msr_write(vcpu, msr, data);
1134 case MSR_IA32_MISC_ENABLE:
1135 vcpu->arch.ia32_misc_enable_msr = data;
1137 case MSR_KVM_WALL_CLOCK:
1138 vcpu->kvm->arch.wall_clock = data;
1139 kvm_write_wall_clock(vcpu->kvm, data);
1141 case MSR_KVM_SYSTEM_TIME: {
1142 if (vcpu->arch.time_page) {
1143 kvm_release_page_dirty(vcpu->arch.time_page);
1144 vcpu->arch.time_page = NULL;
1147 vcpu->arch.time = data;
1149 /* we verify if the enable bit is set... */
1153 /* ...but clean it before doing the actual write */
1154 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1156 vcpu->arch.time_page =
1157 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1159 if (is_error_page(vcpu->arch.time_page)) {
1160 kvm_release_page_clean(vcpu->arch.time_page);
1161 vcpu->arch.time_page = NULL;
1164 kvm_request_guest_time_update(vcpu);
1167 case MSR_IA32_MCG_CTL:
1168 case MSR_IA32_MCG_STATUS:
1169 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1170 return set_msr_mce(vcpu, msr, data);
1172 /* Performance counters are not protected by a CPUID bit,
1173 * so we should check all of them in the generic path for the sake of
1174 * cross vendor migration.
1175 * Writing a zero into the event select MSRs disables them,
1176 * which we perfectly emulate ;-). Any other value should be at least
1177 * reported, some guests depend on them.
1179 case MSR_P6_EVNTSEL0:
1180 case MSR_P6_EVNTSEL1:
1181 case MSR_K7_EVNTSEL0:
1182 case MSR_K7_EVNTSEL1:
1183 case MSR_K7_EVNTSEL2:
1184 case MSR_K7_EVNTSEL3:
1186 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1187 "0x%x data 0x%llx\n", msr, data);
1189 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1190 * so we ignore writes to make it happy.
1192 case MSR_P6_PERFCTR0:
1193 case MSR_P6_PERFCTR1:
1194 case MSR_K7_PERFCTR0:
1195 case MSR_K7_PERFCTR1:
1196 case MSR_K7_PERFCTR2:
1197 case MSR_K7_PERFCTR3:
1198 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1199 "0x%x data 0x%llx\n", msr, data);
1201 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1202 if (kvm_hv_msr_partition_wide(msr)) {
1204 mutex_lock(&vcpu->kvm->lock);
1205 r = set_msr_hyperv_pw(vcpu, msr, data);
1206 mutex_unlock(&vcpu->kvm->lock);
1209 return set_msr_hyperv(vcpu, msr, data);
1212 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1213 return xen_hvm_config(vcpu, data);
1215 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1219 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1226 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1230 * Reads an msr value (of 'msr_index') into 'pdata'.
1231 * Returns 0 on success, non-0 otherwise.
1232 * Assumes vcpu_load() was already called.
1234 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1236 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1239 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1241 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1243 if (!msr_mtrr_valid(msr))
1246 if (msr == MSR_MTRRdefType)
1247 *pdata = vcpu->arch.mtrr_state.def_type +
1248 (vcpu->arch.mtrr_state.enabled << 10);
1249 else if (msr == MSR_MTRRfix64K_00000)
1251 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1252 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1253 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1254 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1255 else if (msr == MSR_IA32_CR_PAT)
1256 *pdata = vcpu->arch.pat;
1257 else { /* Variable MTRRs */
1258 int idx, is_mtrr_mask;
1261 idx = (msr - 0x200) / 2;
1262 is_mtrr_mask = msr - 0x200 - 2 * idx;
1265 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1268 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1275 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1278 u64 mcg_cap = vcpu->arch.mcg_cap;
1279 unsigned bank_num = mcg_cap & 0xff;
1282 case MSR_IA32_P5_MC_ADDR:
1283 case MSR_IA32_P5_MC_TYPE:
1286 case MSR_IA32_MCG_CAP:
1287 data = vcpu->arch.mcg_cap;
1289 case MSR_IA32_MCG_CTL:
1290 if (!(mcg_cap & MCG_CTL_P))
1292 data = vcpu->arch.mcg_ctl;
1294 case MSR_IA32_MCG_STATUS:
1295 data = vcpu->arch.mcg_status;
1298 if (msr >= MSR_IA32_MC0_CTL &&
1299 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1300 u32 offset = msr - MSR_IA32_MC0_CTL;
1301 data = vcpu->arch.mce_banks[offset];
1310 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1313 struct kvm *kvm = vcpu->kvm;
1316 case HV_X64_MSR_GUEST_OS_ID:
1317 data = kvm->arch.hv_guest_os_id;
1319 case HV_X64_MSR_HYPERCALL:
1320 data = kvm->arch.hv_hypercall;
1323 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1331 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1336 case HV_X64_MSR_VP_INDEX: {
1339 kvm_for_each_vcpu(r, v, vcpu->kvm)
1344 case HV_X64_MSR_EOI:
1345 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1346 case HV_X64_MSR_ICR:
1347 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1348 case HV_X64_MSR_TPR:
1349 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1351 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1358 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1363 case MSR_IA32_PLATFORM_ID:
1364 case MSR_IA32_UCODE_REV:
1365 case MSR_IA32_EBL_CR_POWERON:
1366 case MSR_IA32_DEBUGCTLMSR:
1367 case MSR_IA32_LASTBRANCHFROMIP:
1368 case MSR_IA32_LASTBRANCHTOIP:
1369 case MSR_IA32_LASTINTFROMIP:
1370 case MSR_IA32_LASTINTTOIP:
1373 case MSR_VM_HSAVE_PA:
1374 case MSR_P6_PERFCTR0:
1375 case MSR_P6_PERFCTR1:
1376 case MSR_P6_EVNTSEL0:
1377 case MSR_P6_EVNTSEL1:
1378 case MSR_K7_EVNTSEL0:
1379 case MSR_K7_PERFCTR0:
1380 case MSR_K8_INT_PENDING_MSG:
1381 case MSR_AMD64_NB_CFG:
1382 case MSR_FAM10H_MMIO_CONF_BASE:
1386 data = 0x500 | KVM_NR_VAR_MTRR;
1388 case 0x200 ... 0x2ff:
1389 return get_msr_mtrr(vcpu, msr, pdata);
1390 case 0xcd: /* fsb frequency */
1393 case MSR_IA32_APICBASE:
1394 data = kvm_get_apic_base(vcpu);
1396 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1397 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1399 case MSR_IA32_MISC_ENABLE:
1400 data = vcpu->arch.ia32_misc_enable_msr;
1402 case MSR_IA32_PERF_STATUS:
1403 /* TSC increment by tick */
1405 /* CPU multiplier */
1406 data |= (((uint64_t)4ULL) << 40);
1409 data = vcpu->arch.efer;
1411 case MSR_KVM_WALL_CLOCK:
1412 data = vcpu->kvm->arch.wall_clock;
1414 case MSR_KVM_SYSTEM_TIME:
1415 data = vcpu->arch.time;
1417 case MSR_IA32_P5_MC_ADDR:
1418 case MSR_IA32_P5_MC_TYPE:
1419 case MSR_IA32_MCG_CAP:
1420 case MSR_IA32_MCG_CTL:
1421 case MSR_IA32_MCG_STATUS:
1422 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1423 return get_msr_mce(vcpu, msr, pdata);
1424 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1425 if (kvm_hv_msr_partition_wide(msr)) {
1427 mutex_lock(&vcpu->kvm->lock);
1428 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1429 mutex_unlock(&vcpu->kvm->lock);
1432 return get_msr_hyperv(vcpu, msr, pdata);
1436 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1439 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1447 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1450 * Read or write a bunch of msrs. All parameters are kernel addresses.
1452 * @return number of msrs set successfully.
1454 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1455 struct kvm_msr_entry *entries,
1456 int (*do_msr)(struct kvm_vcpu *vcpu,
1457 unsigned index, u64 *data))
1463 idx = srcu_read_lock(&vcpu->kvm->srcu);
1464 for (i = 0; i < msrs->nmsrs; ++i)
1465 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1467 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1475 * Read or write a bunch of msrs. Parameters are user addresses.
1477 * @return number of msrs set successfully.
1479 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1480 int (*do_msr)(struct kvm_vcpu *vcpu,
1481 unsigned index, u64 *data),
1484 struct kvm_msrs msrs;
1485 struct kvm_msr_entry *entries;
1490 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1494 if (msrs.nmsrs >= MAX_IO_MSRS)
1498 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1499 entries = vmalloc(size);
1504 if (copy_from_user(entries, user_msrs->entries, size))
1507 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1512 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1523 int kvm_dev_ioctl_check_extension(long ext)
1528 case KVM_CAP_IRQCHIP:
1530 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1531 case KVM_CAP_SET_TSS_ADDR:
1532 case KVM_CAP_EXT_CPUID:
1533 case KVM_CAP_CLOCKSOURCE:
1535 case KVM_CAP_NOP_IO_DELAY:
1536 case KVM_CAP_MP_STATE:
1537 case KVM_CAP_SYNC_MMU:
1538 case KVM_CAP_REINJECT_CONTROL:
1539 case KVM_CAP_IRQ_INJECT_STATUS:
1540 case KVM_CAP_ASSIGN_DEV_IRQ:
1542 case KVM_CAP_IOEVENTFD:
1544 case KVM_CAP_PIT_STATE2:
1545 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1546 case KVM_CAP_XEN_HVM:
1547 case KVM_CAP_ADJUST_CLOCK:
1548 case KVM_CAP_VCPU_EVENTS:
1549 case KVM_CAP_HYPERV:
1550 case KVM_CAP_HYPERV_VAPIC:
1551 case KVM_CAP_HYPERV_SPIN:
1552 case KVM_CAP_PCI_SEGMENT:
1553 case KVM_CAP_DEBUGREGS:
1554 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1557 case KVM_CAP_COALESCED_MMIO:
1558 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1561 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1563 case KVM_CAP_NR_VCPUS:
1566 case KVM_CAP_NR_MEMSLOTS:
1567 r = KVM_MEMORY_SLOTS;
1569 case KVM_CAP_PV_MMU: /* obsolete */
1576 r = KVM_MAX_MCE_BANKS;
1586 long kvm_arch_dev_ioctl(struct file *filp,
1587 unsigned int ioctl, unsigned long arg)
1589 void __user *argp = (void __user *)arg;
1593 case KVM_GET_MSR_INDEX_LIST: {
1594 struct kvm_msr_list __user *user_msr_list = argp;
1595 struct kvm_msr_list msr_list;
1599 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1602 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1603 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1606 if (n < msr_list.nmsrs)
1609 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1610 num_msrs_to_save * sizeof(u32)))
1612 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1614 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1619 case KVM_GET_SUPPORTED_CPUID: {
1620 struct kvm_cpuid2 __user *cpuid_arg = argp;
1621 struct kvm_cpuid2 cpuid;
1624 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1626 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1627 cpuid_arg->entries);
1632 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1637 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1640 mce_cap = KVM_MCE_CAP_SUPPORTED;
1642 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1654 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1656 kvm_x86_ops->vcpu_load(vcpu, cpu);
1657 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1658 unsigned long khz = cpufreq_quick_get(cpu);
1661 per_cpu(cpu_tsc_khz, cpu) = khz;
1663 kvm_request_guest_time_update(vcpu);
1666 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1668 kvm_put_guest_fpu(vcpu);
1669 kvm_x86_ops->vcpu_put(vcpu);
1672 static int is_efer_nx(void)
1674 unsigned long long efer = 0;
1676 rdmsrl_safe(MSR_EFER, &efer);
1677 return efer & EFER_NX;
1680 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1683 struct kvm_cpuid_entry2 *e, *entry;
1686 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1687 e = &vcpu->arch.cpuid_entries[i];
1688 if (e->function == 0x80000001) {
1693 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1694 entry->edx &= ~(1 << 20);
1695 printk(KERN_INFO "kvm: guest NX capability removed\n");
1699 /* when an old userspace process fills a new kernel module */
1700 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1701 struct kvm_cpuid *cpuid,
1702 struct kvm_cpuid_entry __user *entries)
1705 struct kvm_cpuid_entry *cpuid_entries;
1708 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1711 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1715 if (copy_from_user(cpuid_entries, entries,
1716 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1718 for (i = 0; i < cpuid->nent; i++) {
1719 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1720 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1721 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1722 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1723 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1724 vcpu->arch.cpuid_entries[i].index = 0;
1725 vcpu->arch.cpuid_entries[i].flags = 0;
1726 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1727 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1728 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1730 vcpu->arch.cpuid_nent = cpuid->nent;
1731 cpuid_fix_nx_cap(vcpu);
1733 kvm_apic_set_version(vcpu);
1734 kvm_x86_ops->cpuid_update(vcpu);
1737 vfree(cpuid_entries);
1742 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1743 struct kvm_cpuid2 *cpuid,
1744 struct kvm_cpuid_entry2 __user *entries)
1749 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1752 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1753 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1755 vcpu->arch.cpuid_nent = cpuid->nent;
1756 kvm_apic_set_version(vcpu);
1757 kvm_x86_ops->cpuid_update(vcpu);
1764 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1765 struct kvm_cpuid2 *cpuid,
1766 struct kvm_cpuid_entry2 __user *entries)
1771 if (cpuid->nent < vcpu->arch.cpuid_nent)
1774 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1775 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1780 cpuid->nent = vcpu->arch.cpuid_nent;
1784 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1787 entry->function = function;
1788 entry->index = index;
1789 cpuid_count(entry->function, entry->index,
1790 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1794 #define F(x) bit(X86_FEATURE_##x)
1796 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1797 u32 index, int *nent, int maxnent)
1799 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1800 #ifdef CONFIG_X86_64
1801 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1803 unsigned f_lm = F(LM);
1805 unsigned f_gbpages = 0;
1808 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1811 const u32 kvm_supported_word0_x86_features =
1812 F(FPU) | F(VME) | F(DE) | F(PSE) |
1813 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1814 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1815 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1816 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1817 0 /* Reserved, DS, ACPI */ | F(MMX) |
1818 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1819 0 /* HTT, TM, Reserved, PBE */;
1820 /* cpuid 0x80000001.edx */
1821 const u32 kvm_supported_word1_x86_features =
1822 F(FPU) | F(VME) | F(DE) | F(PSE) |
1823 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1824 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1825 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1826 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1827 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1828 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1829 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1831 const u32 kvm_supported_word4_x86_features =
1832 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1833 0 /* DS-CPL, VMX, SMX, EST */ |
1834 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1835 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1836 0 /* Reserved, DCA */ | F(XMM4_1) |
1837 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1838 0 /* Reserved, XSAVE, OSXSAVE */;
1839 /* cpuid 0x80000001.ecx */
1840 const u32 kvm_supported_word6_x86_features =
1841 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1842 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1843 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1844 0 /* SKINIT */ | 0 /* WDT */;
1846 /* all calls to cpuid_count() should be made on the same cpu */
1848 do_cpuid_1_ent(entry, function, index);
1853 entry->eax = min(entry->eax, (u32)0xb);
1856 entry->edx &= kvm_supported_word0_x86_features;
1857 entry->ecx &= kvm_supported_word4_x86_features;
1858 /* we support x2apic emulation even if host does not support
1859 * it since we emulate x2apic in software */
1860 entry->ecx |= F(X2APIC);
1862 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1863 * may return different values. This forces us to get_cpu() before
1864 * issuing the first command, and also to emulate this annoying behavior
1865 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1867 int t, times = entry->eax & 0xff;
1869 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1870 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1871 for (t = 1; t < times && *nent < maxnent; ++t) {
1872 do_cpuid_1_ent(&entry[t], function, 0);
1873 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1878 /* function 4 and 0xb have additional index. */
1882 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1883 /* read more entries until cache_type is zero */
1884 for (i = 1; *nent < maxnent; ++i) {
1885 cache_type = entry[i - 1].eax & 0x1f;
1888 do_cpuid_1_ent(&entry[i], function, i);
1890 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1898 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1899 /* read more entries until level_type is zero */
1900 for (i = 1; *nent < maxnent; ++i) {
1901 level_type = entry[i - 1].ecx & 0xff00;
1904 do_cpuid_1_ent(&entry[i], function, i);
1906 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1912 entry->eax = min(entry->eax, 0x8000001a);
1915 entry->edx &= kvm_supported_word1_x86_features;
1916 entry->ecx &= kvm_supported_word6_x86_features;
1924 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1925 struct kvm_cpuid_entry2 __user *entries)
1927 struct kvm_cpuid_entry2 *cpuid_entries;
1928 int limit, nent = 0, r = -E2BIG;
1931 if (cpuid->nent < 1)
1933 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1934 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1936 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1940 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1941 limit = cpuid_entries[0].eax;
1942 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1943 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1944 &nent, cpuid->nent);
1946 if (nent >= cpuid->nent)
1949 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1950 limit = cpuid_entries[nent - 1].eax;
1951 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1952 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1953 &nent, cpuid->nent);
1955 if (nent >= cpuid->nent)
1959 if (copy_to_user(entries, cpuid_entries,
1960 nent * sizeof(struct kvm_cpuid_entry2)))
1966 vfree(cpuid_entries);
1971 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1972 struct kvm_lapic_state *s)
1975 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1981 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1982 struct kvm_lapic_state *s)
1985 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1986 kvm_apic_post_state_restore(vcpu);
1987 update_cr8_intercept(vcpu);
1993 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1994 struct kvm_interrupt *irq)
1996 if (irq->irq < 0 || irq->irq >= 256)
1998 if (irqchip_in_kernel(vcpu->kvm))
2002 kvm_queue_interrupt(vcpu, irq->irq, false);
2009 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2012 kvm_inject_nmi(vcpu);
2018 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2019 struct kvm_tpr_access_ctl *tac)
2023 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2027 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2031 unsigned bank_num = mcg_cap & 0xff, bank;
2034 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2036 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2039 vcpu->arch.mcg_cap = mcg_cap;
2040 /* Init IA32_MCG_CTL to all 1s */
2041 if (mcg_cap & MCG_CTL_P)
2042 vcpu->arch.mcg_ctl = ~(u64)0;
2043 /* Init IA32_MCi_CTL to all 1s */
2044 for (bank = 0; bank < bank_num; bank++)
2045 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2050 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2051 struct kvm_x86_mce *mce)
2053 u64 mcg_cap = vcpu->arch.mcg_cap;
2054 unsigned bank_num = mcg_cap & 0xff;
2055 u64 *banks = vcpu->arch.mce_banks;
2057 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2060 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2061 * reporting is disabled
2063 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2064 vcpu->arch.mcg_ctl != ~(u64)0)
2066 banks += 4 * mce->bank;
2068 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2069 * reporting is disabled for the bank
2071 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2073 if (mce->status & MCI_STATUS_UC) {
2074 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2075 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2076 printk(KERN_DEBUG "kvm: set_mce: "
2077 "injects mce exception while "
2078 "previous one is in progress!\n");
2079 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2082 if (banks[1] & MCI_STATUS_VAL)
2083 mce->status |= MCI_STATUS_OVER;
2084 banks[2] = mce->addr;
2085 banks[3] = mce->misc;
2086 vcpu->arch.mcg_status = mce->mcg_status;
2087 banks[1] = mce->status;
2088 kvm_queue_exception(vcpu, MC_VECTOR);
2089 } else if (!(banks[1] & MCI_STATUS_VAL)
2090 || !(banks[1] & MCI_STATUS_UC)) {
2091 if (banks[1] & MCI_STATUS_VAL)
2092 mce->status |= MCI_STATUS_OVER;
2093 banks[2] = mce->addr;
2094 banks[3] = mce->misc;
2095 banks[1] = mce->status;
2097 banks[1] |= MCI_STATUS_OVER;
2101 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2102 struct kvm_vcpu_events *events)
2106 events->exception.injected =
2107 vcpu->arch.exception.pending &&
2108 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2109 events->exception.nr = vcpu->arch.exception.nr;
2110 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2111 events->exception.error_code = vcpu->arch.exception.error_code;
2113 events->interrupt.injected =
2114 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2115 events->interrupt.nr = vcpu->arch.interrupt.nr;
2116 events->interrupt.soft = 0;
2117 events->interrupt.shadow =
2118 kvm_x86_ops->get_interrupt_shadow(vcpu,
2119 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2121 events->nmi.injected = vcpu->arch.nmi_injected;
2122 events->nmi.pending = vcpu->arch.nmi_pending;
2123 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2125 events->sipi_vector = vcpu->arch.sipi_vector;
2127 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2128 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2129 | KVM_VCPUEVENT_VALID_SHADOW);
2134 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2135 struct kvm_vcpu_events *events)
2137 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2138 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2139 | KVM_VCPUEVENT_VALID_SHADOW))
2144 vcpu->arch.exception.pending = events->exception.injected;
2145 vcpu->arch.exception.nr = events->exception.nr;
2146 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2147 vcpu->arch.exception.error_code = events->exception.error_code;
2149 vcpu->arch.interrupt.pending = events->interrupt.injected;
2150 vcpu->arch.interrupt.nr = events->interrupt.nr;
2151 vcpu->arch.interrupt.soft = events->interrupt.soft;
2152 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2153 kvm_pic_clear_isr_ack(vcpu->kvm);
2154 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2155 kvm_x86_ops->set_interrupt_shadow(vcpu,
2156 events->interrupt.shadow);
2158 vcpu->arch.nmi_injected = events->nmi.injected;
2159 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2160 vcpu->arch.nmi_pending = events->nmi.pending;
2161 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2163 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2164 vcpu->arch.sipi_vector = events->sipi_vector;
2171 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2172 struct kvm_debugregs *dbgregs)
2176 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2177 dbgregs->dr6 = vcpu->arch.dr6;
2178 dbgregs->dr7 = vcpu->arch.dr7;
2184 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2185 struct kvm_debugregs *dbgregs)
2192 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2193 vcpu->arch.dr6 = dbgregs->dr6;
2194 vcpu->arch.dr7 = dbgregs->dr7;
2201 long kvm_arch_vcpu_ioctl(struct file *filp,
2202 unsigned int ioctl, unsigned long arg)
2204 struct kvm_vcpu *vcpu = filp->private_data;
2205 void __user *argp = (void __user *)arg;
2207 struct kvm_lapic_state *lapic = NULL;
2210 case KVM_GET_LAPIC: {
2212 if (!vcpu->arch.apic)
2214 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2219 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2223 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2228 case KVM_SET_LAPIC: {
2230 if (!vcpu->arch.apic)
2232 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2237 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2239 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2245 case KVM_INTERRUPT: {
2246 struct kvm_interrupt irq;
2249 if (copy_from_user(&irq, argp, sizeof irq))
2251 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2258 r = kvm_vcpu_ioctl_nmi(vcpu);
2264 case KVM_SET_CPUID: {
2265 struct kvm_cpuid __user *cpuid_arg = argp;
2266 struct kvm_cpuid cpuid;
2269 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2271 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2276 case KVM_SET_CPUID2: {
2277 struct kvm_cpuid2 __user *cpuid_arg = argp;
2278 struct kvm_cpuid2 cpuid;
2281 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2283 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2284 cpuid_arg->entries);
2289 case KVM_GET_CPUID2: {
2290 struct kvm_cpuid2 __user *cpuid_arg = argp;
2291 struct kvm_cpuid2 cpuid;
2294 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2296 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2297 cpuid_arg->entries);
2301 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2307 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2310 r = msr_io(vcpu, argp, do_set_msr, 0);
2312 case KVM_TPR_ACCESS_REPORTING: {
2313 struct kvm_tpr_access_ctl tac;
2316 if (copy_from_user(&tac, argp, sizeof tac))
2318 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2322 if (copy_to_user(argp, &tac, sizeof tac))
2327 case KVM_SET_VAPIC_ADDR: {
2328 struct kvm_vapic_addr va;
2331 if (!irqchip_in_kernel(vcpu->kvm))
2334 if (copy_from_user(&va, argp, sizeof va))
2337 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2340 case KVM_X86_SETUP_MCE: {
2344 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2346 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2349 case KVM_X86_SET_MCE: {
2350 struct kvm_x86_mce mce;
2353 if (copy_from_user(&mce, argp, sizeof mce))
2355 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2358 case KVM_GET_VCPU_EVENTS: {
2359 struct kvm_vcpu_events events;
2361 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2364 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2369 case KVM_SET_VCPU_EVENTS: {
2370 struct kvm_vcpu_events events;
2373 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2376 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2379 case KVM_GET_DEBUGREGS: {
2380 struct kvm_debugregs dbgregs;
2382 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2385 if (copy_to_user(argp, &dbgregs,
2386 sizeof(struct kvm_debugregs)))
2391 case KVM_SET_DEBUGREGS: {
2392 struct kvm_debugregs dbgregs;
2395 if (copy_from_user(&dbgregs, argp,
2396 sizeof(struct kvm_debugregs)))
2399 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2410 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2414 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2416 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2420 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2423 kvm->arch.ept_identity_map_addr = ident_addr;
2427 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2428 u32 kvm_nr_mmu_pages)
2430 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2433 mutex_lock(&kvm->slots_lock);
2434 spin_lock(&kvm->mmu_lock);
2436 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2437 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2439 spin_unlock(&kvm->mmu_lock);
2440 mutex_unlock(&kvm->slots_lock);
2444 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2446 return kvm->arch.n_alloc_mmu_pages;
2449 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2452 struct kvm_mem_alias *alias;
2453 struct kvm_mem_aliases *aliases;
2455 aliases = rcu_dereference(kvm->arch.aliases);
2457 for (i = 0; i < aliases->naliases; ++i) {
2458 alias = &aliases->aliases[i];
2459 if (alias->flags & KVM_ALIAS_INVALID)
2461 if (gfn >= alias->base_gfn
2462 && gfn < alias->base_gfn + alias->npages)
2463 return alias->target_gfn + gfn - alias->base_gfn;
2468 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2471 struct kvm_mem_alias *alias;
2472 struct kvm_mem_aliases *aliases;
2474 aliases = rcu_dereference(kvm->arch.aliases);
2476 for (i = 0; i < aliases->naliases; ++i) {
2477 alias = &aliases->aliases[i];
2478 if (gfn >= alias->base_gfn
2479 && gfn < alias->base_gfn + alias->npages)
2480 return alias->target_gfn + gfn - alias->base_gfn;
2486 * Set a new alias region. Aliases map a portion of physical memory into
2487 * another portion. This is useful for memory windows, for example the PC
2490 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2491 struct kvm_memory_alias *alias)
2494 struct kvm_mem_alias *p;
2495 struct kvm_mem_aliases *aliases, *old_aliases;
2498 /* General sanity checks */
2499 if (alias->memory_size & (PAGE_SIZE - 1))
2501 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2503 if (alias->slot >= KVM_ALIAS_SLOTS)
2505 if (alias->guest_phys_addr + alias->memory_size
2506 < alias->guest_phys_addr)
2508 if (alias->target_phys_addr + alias->memory_size
2509 < alias->target_phys_addr)
2513 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2517 mutex_lock(&kvm->slots_lock);
2519 /* invalidate any gfn reference in case of deletion/shrinking */
2520 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2521 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2522 old_aliases = kvm->arch.aliases;
2523 rcu_assign_pointer(kvm->arch.aliases, aliases);
2524 synchronize_srcu_expedited(&kvm->srcu);
2525 kvm_mmu_zap_all(kvm);
2529 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2533 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2535 p = &aliases->aliases[alias->slot];
2536 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2537 p->npages = alias->memory_size >> PAGE_SHIFT;
2538 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2539 p->flags &= ~(KVM_ALIAS_INVALID);
2541 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2542 if (aliases->aliases[n - 1].npages)
2544 aliases->naliases = n;
2546 old_aliases = kvm->arch.aliases;
2547 rcu_assign_pointer(kvm->arch.aliases, aliases);
2548 synchronize_srcu_expedited(&kvm->srcu);
2553 mutex_unlock(&kvm->slots_lock);
2558 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2563 switch (chip->chip_id) {
2564 case KVM_IRQCHIP_PIC_MASTER:
2565 memcpy(&chip->chip.pic,
2566 &pic_irqchip(kvm)->pics[0],
2567 sizeof(struct kvm_pic_state));
2569 case KVM_IRQCHIP_PIC_SLAVE:
2570 memcpy(&chip->chip.pic,
2571 &pic_irqchip(kvm)->pics[1],
2572 sizeof(struct kvm_pic_state));
2574 case KVM_IRQCHIP_IOAPIC:
2575 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2584 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2589 switch (chip->chip_id) {
2590 case KVM_IRQCHIP_PIC_MASTER:
2591 raw_spin_lock(&pic_irqchip(kvm)->lock);
2592 memcpy(&pic_irqchip(kvm)->pics[0],
2594 sizeof(struct kvm_pic_state));
2595 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2597 case KVM_IRQCHIP_PIC_SLAVE:
2598 raw_spin_lock(&pic_irqchip(kvm)->lock);
2599 memcpy(&pic_irqchip(kvm)->pics[1],
2601 sizeof(struct kvm_pic_state));
2602 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2604 case KVM_IRQCHIP_IOAPIC:
2605 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2611 kvm_pic_update_irq(pic_irqchip(kvm));
2615 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2619 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2620 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2621 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2625 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2629 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2630 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2631 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2632 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2636 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2640 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2641 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2642 sizeof(ps->channels));
2643 ps->flags = kvm->arch.vpit->pit_state.flags;
2644 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2648 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2650 int r = 0, start = 0;
2651 u32 prev_legacy, cur_legacy;
2652 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2653 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2654 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2655 if (!prev_legacy && cur_legacy)
2657 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2658 sizeof(kvm->arch.vpit->pit_state.channels));
2659 kvm->arch.vpit->pit_state.flags = ps->flags;
2660 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2661 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2665 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2666 struct kvm_reinject_control *control)
2668 if (!kvm->arch.vpit)
2670 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2671 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2672 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2677 * Get (and clear) the dirty memory log for a memory slot.
2679 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2680 struct kvm_dirty_log *log)
2683 struct kvm_memory_slot *memslot;
2685 unsigned long is_dirty = 0;
2686 unsigned long *dirty_bitmap = NULL;
2688 mutex_lock(&kvm->slots_lock);
2691 if (log->slot >= KVM_MEMORY_SLOTS)
2694 memslot = &kvm->memslots->memslots[log->slot];
2696 if (!memslot->dirty_bitmap)
2699 n = kvm_dirty_bitmap_bytes(memslot);
2702 dirty_bitmap = vmalloc(n);
2705 memset(dirty_bitmap, 0, n);
2707 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2708 is_dirty = memslot->dirty_bitmap[i];
2710 /* If nothing is dirty, don't bother messing with page tables. */
2712 struct kvm_memslots *slots, *old_slots;
2714 spin_lock(&kvm->mmu_lock);
2715 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2716 spin_unlock(&kvm->mmu_lock);
2718 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2722 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2723 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2725 old_slots = kvm->memslots;
2726 rcu_assign_pointer(kvm->memslots, slots);
2727 synchronize_srcu_expedited(&kvm->srcu);
2728 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2733 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2736 vfree(dirty_bitmap);
2738 mutex_unlock(&kvm->slots_lock);
2742 long kvm_arch_vm_ioctl(struct file *filp,
2743 unsigned int ioctl, unsigned long arg)
2745 struct kvm *kvm = filp->private_data;
2746 void __user *argp = (void __user *)arg;
2749 * This union makes it completely explicit to gcc-3.x
2750 * that these two variables' stack usage should be
2751 * combined, not added together.
2754 struct kvm_pit_state ps;
2755 struct kvm_pit_state2 ps2;
2756 struct kvm_memory_alias alias;
2757 struct kvm_pit_config pit_config;
2761 case KVM_SET_TSS_ADDR:
2762 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2766 case KVM_SET_IDENTITY_MAP_ADDR: {
2770 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2772 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2777 case KVM_SET_MEMORY_REGION: {
2778 struct kvm_memory_region kvm_mem;
2779 struct kvm_userspace_memory_region kvm_userspace_mem;
2782 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2784 kvm_userspace_mem.slot = kvm_mem.slot;
2785 kvm_userspace_mem.flags = kvm_mem.flags;
2786 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2787 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2788 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2793 case KVM_SET_NR_MMU_PAGES:
2794 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2798 case KVM_GET_NR_MMU_PAGES:
2799 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2801 case KVM_SET_MEMORY_ALIAS:
2803 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2805 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2809 case KVM_CREATE_IRQCHIP: {
2810 struct kvm_pic *vpic;
2812 mutex_lock(&kvm->lock);
2815 goto create_irqchip_unlock;
2817 vpic = kvm_create_pic(kvm);
2819 r = kvm_ioapic_init(kvm);
2821 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2824 goto create_irqchip_unlock;
2827 goto create_irqchip_unlock;
2829 kvm->arch.vpic = vpic;
2831 r = kvm_setup_default_irq_routing(kvm);
2833 mutex_lock(&kvm->irq_lock);
2834 kvm_ioapic_destroy(kvm);
2835 kvm_destroy_pic(kvm);
2836 mutex_unlock(&kvm->irq_lock);
2838 create_irqchip_unlock:
2839 mutex_unlock(&kvm->lock);
2842 case KVM_CREATE_PIT:
2843 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2845 case KVM_CREATE_PIT2:
2847 if (copy_from_user(&u.pit_config, argp,
2848 sizeof(struct kvm_pit_config)))
2851 mutex_lock(&kvm->slots_lock);
2854 goto create_pit_unlock;
2856 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2860 mutex_unlock(&kvm->slots_lock);
2862 case KVM_IRQ_LINE_STATUS:
2863 case KVM_IRQ_LINE: {
2864 struct kvm_irq_level irq_event;
2867 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2869 if (irqchip_in_kernel(kvm)) {
2871 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2872 irq_event.irq, irq_event.level);
2873 if (ioctl == KVM_IRQ_LINE_STATUS) {
2874 irq_event.status = status;
2875 if (copy_to_user(argp, &irq_event,
2883 case KVM_GET_IRQCHIP: {
2884 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2885 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2891 if (copy_from_user(chip, argp, sizeof *chip))
2892 goto get_irqchip_out;
2894 if (!irqchip_in_kernel(kvm))
2895 goto get_irqchip_out;
2896 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2898 goto get_irqchip_out;
2900 if (copy_to_user(argp, chip, sizeof *chip))
2901 goto get_irqchip_out;
2909 case KVM_SET_IRQCHIP: {
2910 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2911 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2917 if (copy_from_user(chip, argp, sizeof *chip))
2918 goto set_irqchip_out;
2920 if (!irqchip_in_kernel(kvm))
2921 goto set_irqchip_out;
2922 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2924 goto set_irqchip_out;
2934 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2937 if (!kvm->arch.vpit)
2939 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2943 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2950 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2953 if (!kvm->arch.vpit)
2955 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2961 case KVM_GET_PIT2: {
2963 if (!kvm->arch.vpit)
2965 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2969 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2974 case KVM_SET_PIT2: {
2976 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2979 if (!kvm->arch.vpit)
2981 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2987 case KVM_REINJECT_CONTROL: {
2988 struct kvm_reinject_control control;
2990 if (copy_from_user(&control, argp, sizeof(control)))
2992 r = kvm_vm_ioctl_reinject(kvm, &control);
2998 case KVM_XEN_HVM_CONFIG: {
3000 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3001 sizeof(struct kvm_xen_hvm_config)))
3004 if (kvm->arch.xen_hvm_config.flags)
3009 case KVM_SET_CLOCK: {
3010 struct timespec now;
3011 struct kvm_clock_data user_ns;
3016 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3025 now_ns = timespec_to_ns(&now);
3026 delta = user_ns.clock - now_ns;
3027 kvm->arch.kvmclock_offset = delta;
3030 case KVM_GET_CLOCK: {
3031 struct timespec now;
3032 struct kvm_clock_data user_ns;
3036 now_ns = timespec_to_ns(&now);
3037 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3041 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3054 static void kvm_init_msr_list(void)
3059 /* skip the first msrs in the list. KVM-specific */
3060 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3061 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3064 msrs_to_save[j] = msrs_to_save[i];
3067 num_msrs_to_save = j;
3070 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3073 if (vcpu->arch.apic &&
3074 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3077 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3080 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3082 if (vcpu->arch.apic &&
3083 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3086 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3089 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3091 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3092 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3095 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3097 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3098 access |= PFERR_FETCH_MASK;
3099 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3102 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3104 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3105 access |= PFERR_WRITE_MASK;
3106 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3109 /* uses this to access any guest's mapped memory without checking CPL */
3110 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3112 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3115 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3116 struct kvm_vcpu *vcpu, u32 access,
3120 int r = X86EMUL_CONTINUE;
3123 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3124 unsigned offset = addr & (PAGE_SIZE-1);
3125 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3128 if (gpa == UNMAPPED_GVA) {
3129 r = X86EMUL_PROPAGATE_FAULT;
3132 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3134 r = X86EMUL_UNHANDLEABLE;
3146 /* used for instruction fetching */
3147 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3148 struct kvm_vcpu *vcpu, u32 *error)
3150 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3151 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3152 access | PFERR_FETCH_MASK, error);
3155 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3156 struct kvm_vcpu *vcpu, u32 *error)
3158 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3159 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3163 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3164 struct kvm_vcpu *vcpu, u32 *error)
3166 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3169 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
3170 struct kvm_vcpu *vcpu, u32 *error)
3173 int r = X86EMUL_CONTINUE;
3176 gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error);
3177 unsigned offset = addr & (PAGE_SIZE-1);
3178 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3181 if (gpa == UNMAPPED_GVA) {
3182 r = X86EMUL_PROPAGATE_FAULT;
3185 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3187 r = X86EMUL_UNHANDLEABLE;
3200 static int emulator_read_emulated(unsigned long addr,
3203 struct kvm_vcpu *vcpu)
3208 if (vcpu->mmio_read_completed) {
3209 memcpy(val, vcpu->mmio_data, bytes);
3210 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3211 vcpu->mmio_phys_addr, *(u64 *)val);
3212 vcpu->mmio_read_completed = 0;
3213 return X86EMUL_CONTINUE;
3216 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3218 if (gpa == UNMAPPED_GVA) {
3219 kvm_inject_page_fault(vcpu, addr, error_code);
3220 return X86EMUL_PROPAGATE_FAULT;
3223 /* For APIC access vmexit */
3224 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3227 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3228 == X86EMUL_CONTINUE)
3229 return X86EMUL_CONTINUE;
3233 * Is this MMIO handled locally?
3235 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3236 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3237 return X86EMUL_CONTINUE;
3240 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3242 vcpu->mmio_needed = 1;
3243 vcpu->mmio_phys_addr = gpa;
3244 vcpu->mmio_size = bytes;
3245 vcpu->mmio_is_write = 0;
3247 return X86EMUL_UNHANDLEABLE;
3250 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3251 const void *val, int bytes)
3255 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3258 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3262 static int emulator_write_emulated_onepage(unsigned long addr,
3265 struct kvm_vcpu *vcpu)
3270 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3272 if (gpa == UNMAPPED_GVA) {
3273 kvm_inject_page_fault(vcpu, addr, error_code);
3274 return X86EMUL_PROPAGATE_FAULT;
3277 /* For APIC access vmexit */
3278 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3281 if (emulator_write_phys(vcpu, gpa, val, bytes))
3282 return X86EMUL_CONTINUE;
3285 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3287 * Is this MMIO handled locally?
3289 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3290 return X86EMUL_CONTINUE;
3292 vcpu->mmio_needed = 1;
3293 vcpu->mmio_phys_addr = gpa;
3294 vcpu->mmio_size = bytes;
3295 vcpu->mmio_is_write = 1;
3296 memcpy(vcpu->mmio_data, val, bytes);
3298 return X86EMUL_CONTINUE;
3301 int emulator_write_emulated(unsigned long addr,
3304 struct kvm_vcpu *vcpu)
3306 /* Crossing a page boundary? */
3307 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3310 now = -addr & ~PAGE_MASK;
3311 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3312 if (rc != X86EMUL_CONTINUE)
3318 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3320 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3322 static int emulator_cmpxchg_emulated(unsigned long addr,
3326 struct kvm_vcpu *vcpu)
3328 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3329 #ifndef CONFIG_X86_64
3330 /* guests cmpxchg8b have to be emulated atomically */
3337 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3339 if (gpa == UNMAPPED_GVA ||
3340 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3343 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3348 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3350 kaddr = kmap_atomic(page, KM_USER0);
3351 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
3352 kunmap_atomic(kaddr, KM_USER0);
3353 kvm_release_page_dirty(page);
3358 return emulator_write_emulated(addr, new, bytes, vcpu);
3361 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3363 return kvm_x86_ops->get_segment_base(vcpu, seg);
3366 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3368 kvm_mmu_invlpg(vcpu, address);
3369 return X86EMUL_CONTINUE;
3372 int emulate_clts(struct kvm_vcpu *vcpu)
3374 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3375 kvm_x86_ops->fpu_activate(vcpu);
3376 return X86EMUL_CONTINUE;
3379 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3381 return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest);
3384 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3386 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3388 return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask);
3391 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3394 unsigned long rip = kvm_rip_read(vcpu);
3395 unsigned long rip_linear;
3397 if (!printk_ratelimit())
3400 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3402 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3404 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3405 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3407 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3409 static struct x86_emulate_ops emulate_ops = {
3410 .read_std = kvm_read_guest_virt_system,
3411 .fetch = kvm_fetch_guest_virt,
3412 .read_emulated = emulator_read_emulated,
3413 .write_emulated = emulator_write_emulated,
3414 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3417 static void cache_all_regs(struct kvm_vcpu *vcpu)
3419 kvm_register_read(vcpu, VCPU_REGS_RAX);
3420 kvm_register_read(vcpu, VCPU_REGS_RSP);
3421 kvm_register_read(vcpu, VCPU_REGS_RIP);
3422 vcpu->arch.regs_dirty = ~0;
3425 int emulate_instruction(struct kvm_vcpu *vcpu,
3431 struct decode_cache *c;
3432 struct kvm_run *run = vcpu->run;
3434 kvm_clear_exception_queue(vcpu);
3435 vcpu->arch.mmio_fault_cr2 = cr2;
3437 * TODO: fix emulate.c to use guest_read/write_register
3438 * instead of direct ->regs accesses, can save hundred cycles
3439 * on Intel for instructions that don't read/change RSP, for
3442 cache_all_regs(vcpu);
3444 vcpu->mmio_is_write = 0;
3445 vcpu->arch.pio.string = 0;
3447 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3449 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3451 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3452 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3453 vcpu->arch.emulate_ctxt.mode =
3454 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3455 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3456 ? X86EMUL_MODE_VM86 : cs_l
3457 ? X86EMUL_MODE_PROT64 : cs_db
3458 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3460 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3462 /* Only allow emulation of specific instructions on #UD
3463 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3464 c = &vcpu->arch.emulate_ctxt.decode;
3465 if (emulation_type & EMULTYPE_TRAP_UD) {
3467 return EMULATE_FAIL;
3469 case 0x01: /* VMMCALL */
3470 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3471 return EMULATE_FAIL;
3473 case 0x34: /* sysenter */
3474 case 0x35: /* sysexit */
3475 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3476 return EMULATE_FAIL;
3478 case 0x05: /* syscall */
3479 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3480 return EMULATE_FAIL;
3483 return EMULATE_FAIL;
3486 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3487 return EMULATE_FAIL;
3490 ++vcpu->stat.insn_emulation;
3492 ++vcpu->stat.insn_emulation_fail;
3493 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3494 return EMULATE_DONE;
3495 return EMULATE_FAIL;
3499 if (emulation_type & EMULTYPE_SKIP) {
3500 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3501 return EMULATE_DONE;
3504 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3505 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3508 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3510 if (vcpu->arch.pio.string)
3511 return EMULATE_DO_MMIO;
3513 if (r || vcpu->mmio_is_write) {
3514 run->exit_reason = KVM_EXIT_MMIO;
3515 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3516 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3517 run->mmio.len = vcpu->mmio_size;
3518 run->mmio.is_write = vcpu->mmio_is_write;
3522 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3523 return EMULATE_DONE;
3524 if (!vcpu->mmio_needed) {
3525 kvm_report_emulation_failure(vcpu, "mmio");
3526 return EMULATE_FAIL;
3528 return EMULATE_DO_MMIO;
3531 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3533 if (vcpu->mmio_is_write) {
3534 vcpu->mmio_needed = 0;
3535 return EMULATE_DO_MMIO;
3538 return EMULATE_DONE;
3540 EXPORT_SYMBOL_GPL(emulate_instruction);
3542 static int pio_copy_data(struct kvm_vcpu *vcpu)
3544 void *p = vcpu->arch.pio_data;
3545 gva_t q = vcpu->arch.pio.guest_gva;
3550 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3551 if (vcpu->arch.pio.in)
3552 ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code);
3554 ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code);
3556 if (ret == X86EMUL_PROPAGATE_FAULT)
3557 kvm_inject_page_fault(vcpu, q, error_code);
3562 int complete_pio(struct kvm_vcpu *vcpu)
3564 struct kvm_pio_request *io = &vcpu->arch.pio;
3571 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3572 memcpy(&val, vcpu->arch.pio_data, io->size);
3573 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3577 r = pio_copy_data(vcpu);
3584 delta *= io->cur_count;
3586 * The size of the register should really depend on
3587 * current address size.
3589 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3591 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3597 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3599 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3601 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3603 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3607 io->count -= io->cur_count;
3613 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3615 /* TODO: String I/O for in kernel device */
3618 if (vcpu->arch.pio.in)
3619 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3620 vcpu->arch.pio.size, pd);
3622 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3623 vcpu->arch.pio.port, vcpu->arch.pio.size,
3628 static int pio_string_write(struct kvm_vcpu *vcpu)
3630 struct kvm_pio_request *io = &vcpu->arch.pio;
3631 void *pd = vcpu->arch.pio_data;
3634 for (i = 0; i < io->cur_count; i++) {
3635 if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3636 io->port, io->size, pd)) {
3645 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3649 trace_kvm_pio(!in, port, size, 1);
3651 vcpu->run->exit_reason = KVM_EXIT_IO;
3652 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3653 vcpu->run->io.size = vcpu->arch.pio.size = size;
3654 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3655 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3656 vcpu->run->io.port = vcpu->arch.pio.port = port;
3657 vcpu->arch.pio.in = in;
3658 vcpu->arch.pio.string = 0;
3659 vcpu->arch.pio.down = 0;
3660 vcpu->arch.pio.rep = 0;
3662 if (!vcpu->arch.pio.in) {
3663 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3664 memcpy(vcpu->arch.pio_data, &val, 4);
3667 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3673 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3675 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3676 int size, unsigned long count, int down,
3677 gva_t address, int rep, unsigned port)
3679 unsigned now, in_page;
3682 trace_kvm_pio(!in, port, size, count);
3684 vcpu->run->exit_reason = KVM_EXIT_IO;
3685 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3686 vcpu->run->io.size = vcpu->arch.pio.size = size;
3687 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3688 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3689 vcpu->run->io.port = vcpu->arch.pio.port = port;
3690 vcpu->arch.pio.in = in;
3691 vcpu->arch.pio.string = 1;
3692 vcpu->arch.pio.down = down;
3693 vcpu->arch.pio.rep = rep;
3696 kvm_x86_ops->skip_emulated_instruction(vcpu);
3701 in_page = PAGE_SIZE - offset_in_page(address);
3703 in_page = offset_in_page(address) + size;
3704 now = min(count, (unsigned long)in_page / size);
3709 * String I/O in reverse. Yuck. Kill the guest, fix later.
3711 pr_unimpl(vcpu, "guest string pio down\n");
3712 kvm_inject_gp(vcpu, 0);
3715 vcpu->run->io.count = now;
3716 vcpu->arch.pio.cur_count = now;
3718 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3719 kvm_x86_ops->skip_emulated_instruction(vcpu);
3721 vcpu->arch.pio.guest_gva = address;
3723 if (!vcpu->arch.pio.in) {
3724 /* string PIO write */
3725 ret = pio_copy_data(vcpu);
3726 if (ret == X86EMUL_PROPAGATE_FAULT)
3728 if (ret == 0 && !pio_string_write(vcpu)) {
3730 if (vcpu->arch.pio.count == 0)
3734 /* no string PIO read support yet */
3738 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3740 static void bounce_off(void *info)
3745 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3748 struct cpufreq_freqs *freq = data;
3750 struct kvm_vcpu *vcpu;
3751 int i, send_ipi = 0;
3753 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3755 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3757 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3759 spin_lock(&kvm_lock);
3760 list_for_each_entry(kvm, &vm_list, vm_list) {
3761 kvm_for_each_vcpu(i, vcpu, kvm) {
3762 if (vcpu->cpu != freq->cpu)
3764 if (!kvm_request_guest_time_update(vcpu))
3766 if (vcpu->cpu != smp_processor_id())
3770 spin_unlock(&kvm_lock);
3772 if (freq->old < freq->new && send_ipi) {
3774 * We upscale the frequency. Must make the guest
3775 * doesn't see old kvmclock values while running with
3776 * the new frequency, otherwise we risk the guest sees
3777 * time go backwards.
3779 * In case we update the frequency for another cpu
3780 * (which might be in guest context) send an interrupt
3781 * to kick the cpu out of guest context. Next time
3782 * guest context is entered kvmclock will be updated,
3783 * so the guest will not see stale values.
3785 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3790 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3791 .notifier_call = kvmclock_cpufreq_notifier
3794 static void kvm_timer_init(void)
3798 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3799 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3800 CPUFREQ_TRANSITION_NOTIFIER);
3801 for_each_online_cpu(cpu) {
3802 unsigned long khz = cpufreq_get(cpu);
3805 per_cpu(cpu_tsc_khz, cpu) = khz;
3808 for_each_possible_cpu(cpu)
3809 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3813 int kvm_arch_init(void *opaque)
3816 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3819 printk(KERN_ERR "kvm: already loaded the other module\n");
3824 if (!ops->cpu_has_kvm_support()) {
3825 printk(KERN_ERR "kvm: no hardware support\n");
3829 if (ops->disabled_by_bios()) {
3830 printk(KERN_ERR "kvm: disabled by bios\n");
3835 r = kvm_mmu_module_init();
3839 kvm_init_msr_list();
3842 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3843 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3844 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3845 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3855 void kvm_arch_exit(void)
3857 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3858 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3859 CPUFREQ_TRANSITION_NOTIFIER);
3861 kvm_mmu_module_exit();
3864 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3866 ++vcpu->stat.halt_exits;
3867 if (irqchip_in_kernel(vcpu->kvm)) {
3868 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3871 vcpu->run->exit_reason = KVM_EXIT_HLT;
3875 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3877 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3880 if (is_long_mode(vcpu))
3883 return a0 | ((gpa_t)a1 << 32);
3886 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
3888 u64 param, ingpa, outgpa, ret;
3889 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
3890 bool fast, longmode;
3894 * hypercall generates UD from non zero cpl and real mode
3897 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
3898 kvm_queue_exception(vcpu, UD_VECTOR);
3902 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3903 longmode = is_long_mode(vcpu) && cs_l == 1;
3906 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
3907 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
3908 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
3909 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
3910 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
3911 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
3913 #ifdef CONFIG_X86_64
3915 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
3916 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
3917 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
3921 code = param & 0xffff;
3922 fast = (param >> 16) & 0x1;
3923 rep_cnt = (param >> 32) & 0xfff;
3924 rep_idx = (param >> 48) & 0xfff;
3926 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
3929 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
3930 kvm_vcpu_on_spin(vcpu);
3933 res = HV_STATUS_INVALID_HYPERCALL_CODE;
3937 ret = res | (((u64)rep_done & 0xfff) << 32);
3939 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3941 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
3942 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
3948 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3950 unsigned long nr, a0, a1, a2, a3, ret;
3953 if (kvm_hv_hypercall_enabled(vcpu->kvm))
3954 return kvm_hv_hypercall(vcpu);
3956 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3957 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3958 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3959 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3960 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3962 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3964 if (!is_long_mode(vcpu)) {
3972 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3978 case KVM_HC_VAPIC_POLL_IRQ:
3982 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3989 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3990 ++vcpu->stat.hypercalls;
3993 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3995 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3997 char instruction[3];
3998 unsigned long rip = kvm_rip_read(vcpu);
4001 * Blow out the MMU to ensure that no other VCPU has an active mapping
4002 * to ensure that the updated hypercall appears atomically across all
4005 kvm_mmu_zap_all(vcpu->kvm);
4007 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4009 return emulator_write_emulated(rip, instruction, 3, vcpu);
4012 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4014 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4017 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4019 struct desc_ptr dt = { limit, base };
4021 kvm_x86_ops->set_gdt(vcpu, &dt);
4024 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4026 struct desc_ptr dt = { limit, base };
4028 kvm_x86_ops->set_idt(vcpu, &dt);
4031 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
4032 unsigned long *rflags)
4034 kvm_lmsw(vcpu, msw);
4035 *rflags = kvm_get_rflags(vcpu);
4038 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
4040 unsigned long value;
4044 value = kvm_read_cr0(vcpu);
4047 value = vcpu->arch.cr2;
4050 value = vcpu->arch.cr3;
4053 value = kvm_read_cr4(vcpu);
4056 value = kvm_get_cr8(vcpu);
4059 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4066 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
4067 unsigned long *rflags)
4071 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4072 *rflags = kvm_get_rflags(vcpu);
4075 vcpu->arch.cr2 = val;
4078 kvm_set_cr3(vcpu, val);
4081 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4084 kvm_set_cr8(vcpu, val & 0xfUL);
4087 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4091 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4093 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4094 int j, nent = vcpu->arch.cpuid_nent;
4096 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4097 /* when no next entry is found, the current entry[i] is reselected */
4098 for (j = i + 1; ; j = (j + 1) % nent) {
4099 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4100 if (ej->function == e->function) {
4101 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4105 return 0; /* silence gcc, even though control never reaches here */
4108 /* find an entry with matching function, matching index (if needed), and that
4109 * should be read next (if it's stateful) */
4110 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4111 u32 function, u32 index)
4113 if (e->function != function)
4115 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4117 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4118 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4123 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4124 u32 function, u32 index)
4127 struct kvm_cpuid_entry2 *best = NULL;
4129 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4130 struct kvm_cpuid_entry2 *e;
4132 e = &vcpu->arch.cpuid_entries[i];
4133 if (is_matching_cpuid_entry(e, function, index)) {
4134 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4135 move_to_next_stateful_cpuid_entry(vcpu, i);
4140 * Both basic or both extended?
4142 if (((e->function ^ function) & 0x80000000) == 0)
4143 if (!best || e->function > best->function)
4148 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4150 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4152 struct kvm_cpuid_entry2 *best;
4154 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4156 return best->eax & 0xff;
4160 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4162 u32 function, index;
4163 struct kvm_cpuid_entry2 *best;
4165 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4166 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4167 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4168 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4169 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4170 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4171 best = kvm_find_cpuid_entry(vcpu, function, index);
4173 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4174 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4175 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4176 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4178 kvm_x86_ops->skip_emulated_instruction(vcpu);
4179 trace_kvm_cpuid(function,
4180 kvm_register_read(vcpu, VCPU_REGS_RAX),
4181 kvm_register_read(vcpu, VCPU_REGS_RBX),
4182 kvm_register_read(vcpu, VCPU_REGS_RCX),
4183 kvm_register_read(vcpu, VCPU_REGS_RDX));
4185 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4188 * Check if userspace requested an interrupt window, and that the
4189 * interrupt window is open.
4191 * No need to exit to userspace if we already have an interrupt queued.
4193 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4195 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4196 vcpu->run->request_interrupt_window &&
4197 kvm_arch_interrupt_allowed(vcpu));
4200 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4202 struct kvm_run *kvm_run = vcpu->run;
4204 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4205 kvm_run->cr8 = kvm_get_cr8(vcpu);
4206 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4207 if (irqchip_in_kernel(vcpu->kvm))
4208 kvm_run->ready_for_interrupt_injection = 1;
4210 kvm_run->ready_for_interrupt_injection =
4211 kvm_arch_interrupt_allowed(vcpu) &&
4212 !kvm_cpu_has_interrupt(vcpu) &&
4213 !kvm_event_needs_reinjection(vcpu);
4216 static void vapic_enter(struct kvm_vcpu *vcpu)
4218 struct kvm_lapic *apic = vcpu->arch.apic;
4221 if (!apic || !apic->vapic_addr)
4224 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4226 vcpu->arch.apic->vapic_page = page;
4229 static void vapic_exit(struct kvm_vcpu *vcpu)
4231 struct kvm_lapic *apic = vcpu->arch.apic;
4234 if (!apic || !apic->vapic_addr)
4237 idx = srcu_read_lock(&vcpu->kvm->srcu);
4238 kvm_release_page_dirty(apic->vapic_page);
4239 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4240 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4243 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4247 if (!kvm_x86_ops->update_cr8_intercept)
4250 if (!vcpu->arch.apic)
4253 if (!vcpu->arch.apic->vapic_addr)
4254 max_irr = kvm_lapic_find_highest_irr(vcpu);
4261 tpr = kvm_lapic_get_cr8(vcpu);
4263 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4266 static void inject_pending_event(struct kvm_vcpu *vcpu)
4268 /* try to reinject previous events if any */
4269 if (vcpu->arch.exception.pending) {
4270 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4271 vcpu->arch.exception.has_error_code,
4272 vcpu->arch.exception.error_code);
4276 if (vcpu->arch.nmi_injected) {
4277 kvm_x86_ops->set_nmi(vcpu);
4281 if (vcpu->arch.interrupt.pending) {
4282 kvm_x86_ops->set_irq(vcpu);
4286 /* try to inject new event if pending */
4287 if (vcpu->arch.nmi_pending) {
4288 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4289 vcpu->arch.nmi_pending = false;
4290 vcpu->arch.nmi_injected = true;
4291 kvm_x86_ops->set_nmi(vcpu);
4293 } else if (kvm_cpu_has_interrupt(vcpu)) {
4294 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4295 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4297 kvm_x86_ops->set_irq(vcpu);
4302 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4305 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4306 vcpu->run->request_interrupt_window;
4309 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4310 kvm_mmu_unload(vcpu);
4312 r = kvm_mmu_reload(vcpu);
4316 if (vcpu->requests) {
4317 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4318 __kvm_migrate_timers(vcpu);
4319 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4320 kvm_write_guest_time(vcpu);
4321 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4322 kvm_mmu_sync_roots(vcpu);
4323 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4324 kvm_x86_ops->tlb_flush(vcpu);
4325 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4327 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4331 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4332 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4336 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4337 vcpu->fpu_active = 0;
4338 kvm_x86_ops->fpu_deactivate(vcpu);
4344 kvm_x86_ops->prepare_guest_switch(vcpu);
4345 if (vcpu->fpu_active)
4346 kvm_load_guest_fpu(vcpu);
4348 local_irq_disable();
4350 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4351 smp_mb__after_clear_bit();
4353 if (vcpu->requests || need_resched() || signal_pending(current)) {
4354 set_bit(KVM_REQ_KICK, &vcpu->requests);
4361 inject_pending_event(vcpu);
4363 /* enable NMI/IRQ window open exits if needed */
4364 if (vcpu->arch.nmi_pending)
4365 kvm_x86_ops->enable_nmi_window(vcpu);
4366 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4367 kvm_x86_ops->enable_irq_window(vcpu);
4369 if (kvm_lapic_enabled(vcpu)) {
4370 update_cr8_intercept(vcpu);
4371 kvm_lapic_sync_to_vapic(vcpu);
4374 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4378 if (unlikely(vcpu->arch.switch_db_regs)) {
4380 set_debugreg(vcpu->arch.eff_db[0], 0);
4381 set_debugreg(vcpu->arch.eff_db[1], 1);
4382 set_debugreg(vcpu->arch.eff_db[2], 2);
4383 set_debugreg(vcpu->arch.eff_db[3], 3);
4386 trace_kvm_entry(vcpu->vcpu_id);
4387 kvm_x86_ops->run(vcpu);
4390 * If the guest has used debug registers, at least dr7
4391 * will be disabled while returning to the host.
4392 * If we don't have active breakpoints in the host, we don't
4393 * care about the messed up debug address registers. But if
4394 * we have some of them active, restore the old state.
4396 if (hw_breakpoint_active())
4397 hw_breakpoint_restore();
4399 set_bit(KVM_REQ_KICK, &vcpu->requests);
4405 * We must have an instruction between local_irq_enable() and
4406 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4407 * the interrupt shadow. The stat.exits increment will do nicely.
4408 * But we need to prevent reordering, hence this barrier():
4416 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4419 * Profile KVM exit RIPs:
4421 if (unlikely(prof_on == KVM_PROFILING)) {
4422 unsigned long rip = kvm_rip_read(vcpu);
4423 profile_hit(KVM_PROFILING, (void *)rip);
4427 kvm_lapic_sync_from_vapic(vcpu);
4429 r = kvm_x86_ops->handle_exit(vcpu);
4435 static int __vcpu_run(struct kvm_vcpu *vcpu)
4438 struct kvm *kvm = vcpu->kvm;
4440 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4441 pr_debug("vcpu %d received sipi with vector # %x\n",
4442 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4443 kvm_lapic_reset(vcpu);
4444 r = kvm_arch_vcpu_reset(vcpu);
4447 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4450 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4455 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4456 r = vcpu_enter_guest(vcpu);
4458 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4459 kvm_vcpu_block(vcpu);
4460 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4461 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4463 switch(vcpu->arch.mp_state) {
4464 case KVM_MP_STATE_HALTED:
4465 vcpu->arch.mp_state =
4466 KVM_MP_STATE_RUNNABLE;
4467 case KVM_MP_STATE_RUNNABLE:
4469 case KVM_MP_STATE_SIPI_RECEIVED:
4480 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4481 if (kvm_cpu_has_pending_timer(vcpu))
4482 kvm_inject_pending_timer_irqs(vcpu);
4484 if (dm_request_for_irq_injection(vcpu)) {
4486 vcpu->run->exit_reason = KVM_EXIT_INTR;
4487 ++vcpu->stat.request_irq_exits;
4489 if (signal_pending(current)) {
4491 vcpu->run->exit_reason = KVM_EXIT_INTR;
4492 ++vcpu->stat.signal_exits;
4494 if (need_resched()) {
4495 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4497 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4501 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4502 post_kvm_run_save(vcpu);
4509 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4516 if (vcpu->sigset_active)
4517 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4519 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4520 kvm_vcpu_block(vcpu);
4521 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4526 /* re-sync apic's tpr */
4527 if (!irqchip_in_kernel(vcpu->kvm))
4528 kvm_set_cr8(vcpu, kvm_run->cr8);
4530 if (vcpu->arch.pio.cur_count) {
4531 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4532 r = complete_pio(vcpu);
4533 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4537 if (vcpu->mmio_needed) {
4538 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4539 vcpu->mmio_read_completed = 1;
4540 vcpu->mmio_needed = 0;
4542 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4543 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4544 EMULTYPE_NO_DECODE);
4545 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4546 if (r == EMULATE_DO_MMIO) {
4548 * Read-modify-write. Back to userspace.
4554 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4555 kvm_register_write(vcpu, VCPU_REGS_RAX,
4556 kvm_run->hypercall.ret);
4558 r = __vcpu_run(vcpu);
4561 if (vcpu->sigset_active)
4562 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4568 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4572 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4573 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4574 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4575 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4576 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4577 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4578 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4579 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4580 #ifdef CONFIG_X86_64
4581 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4582 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4583 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4584 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4585 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4586 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4587 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4588 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4591 regs->rip = kvm_rip_read(vcpu);
4592 regs->rflags = kvm_get_rflags(vcpu);
4599 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4603 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4604 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4605 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4606 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4607 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4608 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4609 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4610 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4611 #ifdef CONFIG_X86_64
4612 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4613 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4614 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4615 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4616 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4617 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4618 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4619 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4622 kvm_rip_write(vcpu, regs->rip);
4623 kvm_set_rflags(vcpu, regs->rflags);
4625 vcpu->arch.exception.pending = false;
4632 void kvm_get_segment(struct kvm_vcpu *vcpu,
4633 struct kvm_segment *var, int seg)
4635 kvm_x86_ops->get_segment(vcpu, var, seg);
4638 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4640 struct kvm_segment cs;
4642 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4646 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4648 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4649 struct kvm_sregs *sregs)
4655 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4656 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4657 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4658 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4659 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4660 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4662 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4663 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4665 kvm_x86_ops->get_idt(vcpu, &dt);
4666 sregs->idt.limit = dt.size;
4667 sregs->idt.base = dt.address;
4668 kvm_x86_ops->get_gdt(vcpu, &dt);
4669 sregs->gdt.limit = dt.size;
4670 sregs->gdt.base = dt.address;
4672 sregs->cr0 = kvm_read_cr0(vcpu);
4673 sregs->cr2 = vcpu->arch.cr2;
4674 sregs->cr3 = vcpu->arch.cr3;
4675 sregs->cr4 = kvm_read_cr4(vcpu);
4676 sregs->cr8 = kvm_get_cr8(vcpu);
4677 sregs->efer = vcpu->arch.efer;
4678 sregs->apic_base = kvm_get_apic_base(vcpu);
4680 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4682 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4683 set_bit(vcpu->arch.interrupt.nr,
4684 (unsigned long *)sregs->interrupt_bitmap);
4691 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4692 struct kvm_mp_state *mp_state)
4695 mp_state->mp_state = vcpu->arch.mp_state;
4700 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4701 struct kvm_mp_state *mp_state)
4704 vcpu->arch.mp_state = mp_state->mp_state;
4709 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4710 struct kvm_segment *var, int seg)
4712 kvm_x86_ops->set_segment(vcpu, var, seg);
4715 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4716 struct kvm_segment *kvm_desct)
4718 kvm_desct->base = get_desc_base(seg_desc);
4719 kvm_desct->limit = get_desc_limit(seg_desc);
4721 kvm_desct->limit <<= 12;
4722 kvm_desct->limit |= 0xfff;
4724 kvm_desct->selector = selector;
4725 kvm_desct->type = seg_desc->type;
4726 kvm_desct->present = seg_desc->p;
4727 kvm_desct->dpl = seg_desc->dpl;
4728 kvm_desct->db = seg_desc->d;
4729 kvm_desct->s = seg_desc->s;
4730 kvm_desct->l = seg_desc->l;
4731 kvm_desct->g = seg_desc->g;
4732 kvm_desct->avl = seg_desc->avl;
4734 kvm_desct->unusable = 1;
4736 kvm_desct->unusable = 0;
4737 kvm_desct->padding = 0;
4740 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4742 struct desc_ptr *dtable)
4744 if (selector & 1 << 2) {
4745 struct kvm_segment kvm_seg;
4747 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4749 if (kvm_seg.unusable)
4752 dtable->size = kvm_seg.limit;
4753 dtable->address = kvm_seg.base;
4756 kvm_x86_ops->get_gdt(vcpu, dtable);
4759 /* allowed just for 8 bytes segments */
4760 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4761 struct desc_struct *seg_desc)
4763 struct desc_ptr dtable;
4764 u16 index = selector >> 3;
4769 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4771 if (dtable.size < index * 8 + 7) {
4772 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4773 return X86EMUL_PROPAGATE_FAULT;
4775 addr = dtable.base + index * 8;
4776 ret = kvm_read_guest_virt_system(addr, seg_desc, sizeof(*seg_desc),
4778 if (ret == X86EMUL_PROPAGATE_FAULT)
4779 kvm_inject_page_fault(vcpu, addr, err);
4784 /* allowed just for 8 bytes segments */
4785 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4786 struct desc_struct *seg_desc)
4788 struct desc_ptr dtable;
4789 u16 index = selector >> 3;
4791 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4793 if (dtable.size < index * 8 + 7)
4795 return kvm_write_guest_virt(dtable.address + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL);
4798 static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu,
4799 struct desc_struct *seg_desc)
4801 u32 base_addr = get_desc_base(seg_desc);
4803 return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL);
4806 static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu,
4807 struct desc_struct *seg_desc)
4809 u32 base_addr = get_desc_base(seg_desc);
4811 return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL);
4814 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4816 struct kvm_segment kvm_seg;
4818 kvm_get_segment(vcpu, &kvm_seg, seg);
4819 return kvm_seg.selector;
4822 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4824 struct kvm_segment segvar = {
4825 .base = selector << 4,
4827 .selector = selector,
4838 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4839 return X86EMUL_CONTINUE;
4842 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4844 return (seg != VCPU_SREG_LDTR) &&
4845 (seg != VCPU_SREG_TR) &&
4846 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4849 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg)
4851 struct kvm_segment kvm_seg;
4852 struct desc_struct seg_desc;
4854 unsigned err_vec = GP_VECTOR;
4856 bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
4859 if (is_vm86_segment(vcpu, seg) || !is_protmode(vcpu))
4860 return kvm_load_realmode_segment(vcpu, selector, seg);
4862 /* NULL selector is not valid for TR, CS and SS */
4863 if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
4867 /* TR should be in GDT only */
4868 if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
4871 ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc);
4875 seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg);
4877 if (null_selector) { /* for NULL selector skip all following checks */
4878 kvm_seg.unusable = 1;
4882 err_code = selector & 0xfffc;
4883 err_vec = GP_VECTOR;
4885 /* can't load system descriptor into segment selecor */
4886 if (seg <= VCPU_SREG_GS && !kvm_seg.s)
4889 if (!kvm_seg.present) {
4890 err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
4896 cpl = kvm_x86_ops->get_cpl(vcpu);
4901 * segment is not a writable data segment or segment
4902 * selector's RPL != CPL or segment selector's RPL != CPL
4904 if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl)
4908 if (!(kvm_seg.type & 8))
4911 if (kvm_seg.type & 4) {
4917 if (rpl > cpl || dpl != cpl)
4920 /* CS(RPL) <- CPL */
4921 selector = (selector & 0xfffc) | cpl;
4924 if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9))
4927 case VCPU_SREG_LDTR:
4928 if (kvm_seg.s || kvm_seg.type != 2)
4931 default: /* DS, ES, FS, or GS */
4933 * segment is not a data or readable code segment or
4934 * ((segment is a data or nonconforming code segment)
4935 * and (both RPL and CPL > DPL))
4937 if ((kvm_seg.type & 0xa) == 0x8 ||
4938 (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl)))
4943 if (!kvm_seg.unusable && kvm_seg.s) {
4944 /* mark segment as accessed */
4947 save_guest_segment_descriptor(vcpu, selector, &seg_desc);
4950 kvm_set_segment(vcpu, &kvm_seg, seg);
4951 return X86EMUL_CONTINUE;
4953 kvm_queue_exception_e(vcpu, err_vec, err_code);
4954 return X86EMUL_PROPAGATE_FAULT;
4957 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4958 struct tss_segment_32 *tss)
4960 tss->cr3 = vcpu->arch.cr3;
4961 tss->eip = kvm_rip_read(vcpu);
4962 tss->eflags = kvm_get_rflags(vcpu);
4963 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4964 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4965 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4966 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4967 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4968 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4969 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4970 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4971 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4972 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4973 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4974 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4975 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4976 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4977 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4980 static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg)
4982 struct kvm_segment kvm_seg;
4983 kvm_get_segment(vcpu, &kvm_seg, seg);
4984 kvm_seg.selector = sel;
4985 kvm_set_segment(vcpu, &kvm_seg, seg);
4988 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4989 struct tss_segment_32 *tss)
4991 kvm_set_cr3(vcpu, tss->cr3);
4993 kvm_rip_write(vcpu, tss->eip);
4994 kvm_set_rflags(vcpu, tss->eflags | 2);
4996 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4997 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4998 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4999 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
5000 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
5001 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
5002 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
5003 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
5006 * SDM says that segment selectors are loaded before segment
5009 kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR);
5010 kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
5011 kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
5012 kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
5013 kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
5014 kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS);
5015 kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS);
5018 * Now load segment descriptors. If fault happenes at this stage
5019 * it is handled in a context of new task
5021 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR))
5024 if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
5027 if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
5030 if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
5033 if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
5036 if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS))
5039 if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS))
5044 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
5045 struct tss_segment_16 *tss)
5047 tss->ip = kvm_rip_read(vcpu);
5048 tss->flag = kvm_get_rflags(vcpu);
5049 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5050 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5051 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5052 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5053 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5054 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5055 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
5056 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
5058 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
5059 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
5060 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
5061 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
5062 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
5065 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
5066 struct tss_segment_16 *tss)
5068 kvm_rip_write(vcpu, tss->ip);
5069 kvm_set_rflags(vcpu, tss->flag | 2);
5070 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
5071 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
5072 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
5073 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
5074 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
5075 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
5076 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
5077 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
5080 * SDM says that segment selectors are loaded before segment
5083 kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR);
5084 kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
5085 kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
5086 kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
5087 kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
5090 * Now load segment descriptors. If fault happenes at this stage
5091 * it is handled in a context of new task
5093 if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR))
5096 if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
5099 if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
5102 if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
5105 if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
5110 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
5111 u16 old_tss_sel, u32 old_tss_base,
5112 struct desc_struct *nseg_desc)
5114 struct tss_segment_16 tss_segment_16;
5117 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5118 sizeof tss_segment_16))
5121 save_state_to_tss16(vcpu, &tss_segment_16);
5123 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5124 sizeof tss_segment_16))
5127 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5128 &tss_segment_16, sizeof tss_segment_16))
5131 if (old_tss_sel != 0xffff) {
5132 tss_segment_16.prev_task_link = old_tss_sel;
5134 if (kvm_write_guest(vcpu->kvm,
5135 get_tss_base_addr_write(vcpu, nseg_desc),
5136 &tss_segment_16.prev_task_link,
5137 sizeof tss_segment_16.prev_task_link))
5141 if (load_state_from_tss16(vcpu, &tss_segment_16))
5149 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
5150 u16 old_tss_sel, u32 old_tss_base,
5151 struct desc_struct *nseg_desc)
5153 struct tss_segment_32 tss_segment_32;
5156 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5157 sizeof tss_segment_32))
5160 save_state_to_tss32(vcpu, &tss_segment_32);
5162 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5163 sizeof tss_segment_32))
5166 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5167 &tss_segment_32, sizeof tss_segment_32))
5170 if (old_tss_sel != 0xffff) {
5171 tss_segment_32.prev_task_link = old_tss_sel;
5173 if (kvm_write_guest(vcpu->kvm,
5174 get_tss_base_addr_write(vcpu, nseg_desc),
5175 &tss_segment_32.prev_task_link,
5176 sizeof tss_segment_32.prev_task_link))
5180 if (load_state_from_tss32(vcpu, &tss_segment_32))
5188 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
5190 struct kvm_segment tr_seg;
5191 struct desc_struct cseg_desc;
5192 struct desc_struct nseg_desc;
5194 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
5195 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
5198 old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL);
5200 /* FIXME: Handle errors. Failure to read either TSS or their
5201 * descriptors should generate a pagefault.
5203 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
5206 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
5209 if (reason != TASK_SWITCH_IRET) {
5212 cpl = kvm_x86_ops->get_cpl(vcpu);
5213 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
5214 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
5219 desc_limit = get_desc_limit(&nseg_desc);
5221 ((desc_limit < 0x67 && (nseg_desc.type & 8)) ||
5222 desc_limit < 0x2b)) {
5223 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
5227 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
5228 cseg_desc.type &= ~(1 << 1); //clear the B flag
5229 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
5232 if (reason == TASK_SWITCH_IRET) {
5233 u32 eflags = kvm_get_rflags(vcpu);
5234 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
5237 /* set back link to prev task only if NT bit is set in eflags
5238 note that old_tss_sel is not used afetr this point */
5239 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
5240 old_tss_sel = 0xffff;
5242 if (nseg_desc.type & 8)
5243 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
5244 old_tss_base, &nseg_desc);
5246 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
5247 old_tss_base, &nseg_desc);
5249 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
5250 u32 eflags = kvm_get_rflags(vcpu);
5251 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
5254 if (reason != TASK_SWITCH_IRET) {
5255 nseg_desc.type |= (1 << 1);
5256 save_guest_segment_descriptor(vcpu, tss_selector,
5260 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS);
5261 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
5263 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
5267 EXPORT_SYMBOL_GPL(kvm_task_switch);
5269 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5270 struct kvm_sregs *sregs)
5272 int mmu_reset_needed = 0;
5273 int pending_vec, max_bits;
5278 dt.size = sregs->idt.limit;
5279 dt.address = sregs->idt.base;
5280 kvm_x86_ops->set_idt(vcpu, &dt);
5281 dt.size = sregs->gdt.limit;
5282 dt.address = sregs->gdt.base;
5283 kvm_x86_ops->set_gdt(vcpu, &dt);
5285 vcpu->arch.cr2 = sregs->cr2;
5286 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5287 vcpu->arch.cr3 = sregs->cr3;
5289 kvm_set_cr8(vcpu, sregs->cr8);
5291 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5292 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5293 kvm_set_apic_base(vcpu, sregs->apic_base);
5295 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5296 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5297 vcpu->arch.cr0 = sregs->cr0;
5299 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5300 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5301 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5302 load_pdptrs(vcpu, vcpu->arch.cr3);
5303 mmu_reset_needed = 1;
5306 if (mmu_reset_needed)
5307 kvm_mmu_reset_context(vcpu);
5309 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5310 pending_vec = find_first_bit(
5311 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5312 if (pending_vec < max_bits) {
5313 kvm_queue_interrupt(vcpu, pending_vec, false);
5314 pr_debug("Set back pending irq %d\n", pending_vec);
5315 if (irqchip_in_kernel(vcpu->kvm))
5316 kvm_pic_clear_isr_ack(vcpu->kvm);
5319 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5320 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5321 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5322 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5323 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5324 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5326 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5327 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5329 update_cr8_intercept(vcpu);
5331 /* Older userspace won't unhalt the vcpu on reset. */
5332 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5333 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5335 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5342 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5343 struct kvm_guest_debug *dbg)
5345 unsigned long rflags;
5350 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5352 if (vcpu->arch.exception.pending)
5354 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5355 kvm_queue_exception(vcpu, DB_VECTOR);
5357 kvm_queue_exception(vcpu, BP_VECTOR);
5361 * Read rflags as long as potentially injected trace flags are still
5364 rflags = kvm_get_rflags(vcpu);
5366 vcpu->guest_debug = dbg->control;
5367 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5368 vcpu->guest_debug = 0;
5370 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5371 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5372 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5373 vcpu->arch.switch_db_regs =
5374 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5376 for (i = 0; i < KVM_NR_DB_REGS; i++)
5377 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5378 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5381 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5382 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5383 get_segment_base(vcpu, VCPU_SREG_CS);
5386 * Trigger an rflags update that will inject or remove the trace
5389 kvm_set_rflags(vcpu, rflags);
5391 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5402 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5403 * we have asm/x86/processor.h
5414 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5415 #ifdef CONFIG_X86_64
5416 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5418 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5423 * Translate a guest virtual address to a guest physical address.
5425 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5426 struct kvm_translation *tr)
5428 unsigned long vaddr = tr->linear_address;
5433 idx = srcu_read_lock(&vcpu->kvm->srcu);
5434 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5435 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5436 tr->physical_address = gpa;
5437 tr->valid = gpa != UNMAPPED_GVA;
5445 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5447 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5451 memcpy(fpu->fpr, fxsave->st_space, 128);
5452 fpu->fcw = fxsave->cwd;
5453 fpu->fsw = fxsave->swd;
5454 fpu->ftwx = fxsave->twd;
5455 fpu->last_opcode = fxsave->fop;
5456 fpu->last_ip = fxsave->rip;
5457 fpu->last_dp = fxsave->rdp;
5458 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5465 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5467 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5471 memcpy(fxsave->st_space, fpu->fpr, 128);
5472 fxsave->cwd = fpu->fcw;
5473 fxsave->swd = fpu->fsw;
5474 fxsave->twd = fpu->ftwx;
5475 fxsave->fop = fpu->last_opcode;
5476 fxsave->rip = fpu->last_ip;
5477 fxsave->rdp = fpu->last_dp;
5478 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5485 void fx_init(struct kvm_vcpu *vcpu)
5487 unsigned after_mxcsr_mask;
5490 * Touch the fpu the first time in non atomic context as if
5491 * this is the first fpu instruction the exception handler
5492 * will fire before the instruction returns and it'll have to
5493 * allocate ram with GFP_KERNEL.
5496 kvm_fx_save(&vcpu->arch.host_fx_image);
5498 /* Initialize guest FPU by resetting ours and saving into guest's */
5500 kvm_fx_save(&vcpu->arch.host_fx_image);
5502 kvm_fx_save(&vcpu->arch.guest_fx_image);
5503 kvm_fx_restore(&vcpu->arch.host_fx_image);
5506 vcpu->arch.cr0 |= X86_CR0_ET;
5507 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5508 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5509 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5510 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5512 EXPORT_SYMBOL_GPL(fx_init);
5514 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5516 if (vcpu->guest_fpu_loaded)
5519 vcpu->guest_fpu_loaded = 1;
5520 kvm_fx_save(&vcpu->arch.host_fx_image);
5521 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5525 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5527 if (!vcpu->guest_fpu_loaded)
5530 vcpu->guest_fpu_loaded = 0;
5531 kvm_fx_save(&vcpu->arch.guest_fx_image);
5532 kvm_fx_restore(&vcpu->arch.host_fx_image);
5533 ++vcpu->stat.fpu_reload;
5534 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5538 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5540 if (vcpu->arch.time_page) {
5541 kvm_release_page_dirty(vcpu->arch.time_page);
5542 vcpu->arch.time_page = NULL;
5545 kvm_x86_ops->vcpu_free(vcpu);
5548 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5551 return kvm_x86_ops->vcpu_create(kvm, id);
5554 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5558 /* We do fxsave: this must be aligned. */
5559 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5561 vcpu->arch.mtrr_state.have_fixed = 1;
5563 r = kvm_arch_vcpu_reset(vcpu);
5565 r = kvm_mmu_setup(vcpu);
5572 kvm_x86_ops->vcpu_free(vcpu);
5576 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5579 kvm_mmu_unload(vcpu);
5582 kvm_x86_ops->vcpu_free(vcpu);
5585 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5587 vcpu->arch.nmi_pending = false;
5588 vcpu->arch.nmi_injected = false;
5590 vcpu->arch.switch_db_regs = 0;
5591 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5592 vcpu->arch.dr6 = DR6_FIXED_1;
5593 vcpu->arch.dr7 = DR7_FIXED_1;
5595 return kvm_x86_ops->vcpu_reset(vcpu);
5598 int kvm_arch_hardware_enable(void *garbage)
5601 * Since this may be called from a hotplug notifcation,
5602 * we can't get the CPU frequency directly.
5604 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5605 int cpu = raw_smp_processor_id();
5606 per_cpu(cpu_tsc_khz, cpu) = 0;
5609 kvm_shared_msr_cpu_online();
5611 return kvm_x86_ops->hardware_enable(garbage);
5614 void kvm_arch_hardware_disable(void *garbage)
5616 kvm_x86_ops->hardware_disable(garbage);
5617 drop_user_return_notifiers(garbage);
5620 int kvm_arch_hardware_setup(void)
5622 return kvm_x86_ops->hardware_setup();
5625 void kvm_arch_hardware_unsetup(void)
5627 kvm_x86_ops->hardware_unsetup();
5630 void kvm_arch_check_processor_compat(void *rtn)
5632 kvm_x86_ops->check_processor_compatibility(rtn);
5635 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5641 BUG_ON(vcpu->kvm == NULL);
5644 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5645 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5646 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5648 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5650 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5655 vcpu->arch.pio_data = page_address(page);
5657 r = kvm_mmu_create(vcpu);
5659 goto fail_free_pio_data;
5661 if (irqchip_in_kernel(kvm)) {
5662 r = kvm_create_lapic(vcpu);
5664 goto fail_mmu_destroy;
5667 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5669 if (!vcpu->arch.mce_banks) {
5671 goto fail_free_lapic;
5673 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5677 kvm_free_lapic(vcpu);
5679 kvm_mmu_destroy(vcpu);
5681 free_page((unsigned long)vcpu->arch.pio_data);
5686 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5690 kfree(vcpu->arch.mce_banks);
5691 kvm_free_lapic(vcpu);
5692 idx = srcu_read_lock(&vcpu->kvm->srcu);
5693 kvm_mmu_destroy(vcpu);
5694 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5695 free_page((unsigned long)vcpu->arch.pio_data);
5698 struct kvm *kvm_arch_create_vm(void)
5700 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5703 return ERR_PTR(-ENOMEM);
5705 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5706 if (!kvm->arch.aliases) {
5708 return ERR_PTR(-ENOMEM);
5711 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5712 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5714 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5715 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5717 rdtscll(kvm->arch.vm_init_tsc);
5722 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5725 kvm_mmu_unload(vcpu);
5729 static void kvm_free_vcpus(struct kvm *kvm)
5732 struct kvm_vcpu *vcpu;
5735 * Unpin any mmu pages first.
5737 kvm_for_each_vcpu(i, vcpu, kvm)
5738 kvm_unload_vcpu_mmu(vcpu);
5739 kvm_for_each_vcpu(i, vcpu, kvm)
5740 kvm_arch_vcpu_free(vcpu);
5742 mutex_lock(&kvm->lock);
5743 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5744 kvm->vcpus[i] = NULL;
5746 atomic_set(&kvm->online_vcpus, 0);
5747 mutex_unlock(&kvm->lock);
5750 void kvm_arch_sync_events(struct kvm *kvm)
5752 kvm_free_all_assigned_devices(kvm);
5755 void kvm_arch_destroy_vm(struct kvm *kvm)
5757 kvm_iommu_unmap_guest(kvm);
5759 kfree(kvm->arch.vpic);
5760 kfree(kvm->arch.vioapic);
5761 kvm_free_vcpus(kvm);
5762 kvm_free_physmem(kvm);
5763 if (kvm->arch.apic_access_page)
5764 put_page(kvm->arch.apic_access_page);
5765 if (kvm->arch.ept_identity_pagetable)
5766 put_page(kvm->arch.ept_identity_pagetable);
5767 cleanup_srcu_struct(&kvm->srcu);
5768 kfree(kvm->arch.aliases);
5772 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5773 struct kvm_memory_slot *memslot,
5774 struct kvm_memory_slot old,
5775 struct kvm_userspace_memory_region *mem,
5778 int npages = memslot->npages;
5780 /*To keep backward compatibility with older userspace,
5781 *x86 needs to hanlde !user_alloc case.
5784 if (npages && !old.rmap) {
5785 unsigned long userspace_addr;
5787 down_write(¤t->mm->mmap_sem);
5788 userspace_addr = do_mmap(NULL, 0,
5790 PROT_READ | PROT_WRITE,
5791 MAP_PRIVATE | MAP_ANONYMOUS,
5793 up_write(¤t->mm->mmap_sem);
5795 if (IS_ERR((void *)userspace_addr))
5796 return PTR_ERR((void *)userspace_addr);
5798 memslot->userspace_addr = userspace_addr;
5806 void kvm_arch_commit_memory_region(struct kvm *kvm,
5807 struct kvm_userspace_memory_region *mem,
5808 struct kvm_memory_slot old,
5812 int npages = mem->memory_size >> PAGE_SHIFT;
5814 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5817 down_write(¤t->mm->mmap_sem);
5818 ret = do_munmap(current->mm, old.userspace_addr,
5819 old.npages * PAGE_SIZE);
5820 up_write(¤t->mm->mmap_sem);
5823 "kvm_vm_ioctl_set_memory_region: "
5824 "failed to munmap memory\n");
5827 spin_lock(&kvm->mmu_lock);
5828 if (!kvm->arch.n_requested_mmu_pages) {
5829 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5830 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5833 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5834 spin_unlock(&kvm->mmu_lock);
5837 void kvm_arch_flush_shadow(struct kvm *kvm)
5839 kvm_mmu_zap_all(kvm);
5840 kvm_reload_remote_mmus(kvm);
5843 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5845 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5846 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5847 || vcpu->arch.nmi_pending ||
5848 (kvm_arch_interrupt_allowed(vcpu) &&
5849 kvm_cpu_has_interrupt(vcpu));
5852 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5855 int cpu = vcpu->cpu;
5857 if (waitqueue_active(&vcpu->wq)) {
5858 wake_up_interruptible(&vcpu->wq);
5859 ++vcpu->stat.halt_wakeup;
5863 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5864 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5865 smp_send_reschedule(cpu);
5869 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5871 return kvm_x86_ops->interrupt_allowed(vcpu);
5874 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5876 unsigned long current_rip = kvm_rip_read(vcpu) +
5877 get_segment_base(vcpu, VCPU_SREG_CS);
5879 return current_rip == linear_rip;
5881 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5883 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5885 unsigned long rflags;
5887 rflags = kvm_x86_ops->get_rflags(vcpu);
5888 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5889 rflags &= ~X86_EFLAGS_TF;
5892 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5894 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5896 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5897 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5898 rflags |= X86_EFLAGS_TF;
5899 kvm_x86_ops->set_rflags(vcpu, rflags);
5901 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5903 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5904 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5905 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5906 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5907 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5908 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5909 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5910 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5911 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5912 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);