2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #define CREATE_TRACE_POINTS
43 #include <asm/uaccess.h>
49 #define MAX_IO_MSRS 256
50 #define CR0_RESERVED_BITS \
51 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
52 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
53 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
54 #define CR4_RESERVED_BITS \
55 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
56 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
57 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
58 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
60 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
62 #define KVM_MAX_MCE_BANKS 32
63 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
66 * - enable syscall per default because its emulated by KVM
67 * - enable LME and LMA per default on 64 bit KVM
70 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
75 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
76 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
78 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
79 struct kvm_cpuid_entry2 __user *entries);
80 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
81 u32 function, u32 index);
83 struct kvm_x86_ops *kvm_x86_ops;
84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
87 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
89 struct kvm_stats_debugfs_item debugfs_entries[] = {
90 { "pf_fixed", VCPU_STAT(pf_fixed) },
91 { "pf_guest", VCPU_STAT(pf_guest) },
92 { "tlb_flush", VCPU_STAT(tlb_flush) },
93 { "invlpg", VCPU_STAT(invlpg) },
94 { "exits", VCPU_STAT(exits) },
95 { "io_exits", VCPU_STAT(io_exits) },
96 { "mmio_exits", VCPU_STAT(mmio_exits) },
97 { "signal_exits", VCPU_STAT(signal_exits) },
98 { "irq_window", VCPU_STAT(irq_window_exits) },
99 { "nmi_window", VCPU_STAT(nmi_window_exits) },
100 { "halt_exits", VCPU_STAT(halt_exits) },
101 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
102 { "hypercalls", VCPU_STAT(hypercalls) },
103 { "request_irq", VCPU_STAT(request_irq_exits) },
104 { "irq_exits", VCPU_STAT(irq_exits) },
105 { "host_state_reload", VCPU_STAT(host_state_reload) },
106 { "efer_reload", VCPU_STAT(efer_reload) },
107 { "fpu_reload", VCPU_STAT(fpu_reload) },
108 { "insn_emulation", VCPU_STAT(insn_emulation) },
109 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
110 { "irq_injections", VCPU_STAT(irq_injections) },
111 { "nmi_injections", VCPU_STAT(nmi_injections) },
112 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
113 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
114 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
115 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
116 { "mmu_flooded", VM_STAT(mmu_flooded) },
117 { "mmu_recycled", VM_STAT(mmu_recycled) },
118 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
119 { "mmu_unsync", VM_STAT(mmu_unsync) },
120 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
121 { "largepages", VM_STAT(lpages) },
125 unsigned long segment_base(u16 selector)
127 struct descriptor_table gdt;
128 struct desc_struct *d;
129 unsigned long table_base;
135 asm("sgdt %0" : "=m"(gdt));
136 table_base = gdt.base;
138 if (selector & 4) { /* from ldt */
141 asm("sldt %0" : "=g"(ldt_selector));
142 table_base = segment_base(ldt_selector);
144 d = (struct desc_struct *)(table_base + (selector & ~7));
145 v = d->base0 | ((unsigned long)d->base1 << 16) |
146 ((unsigned long)d->base2 << 24);
148 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
149 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
153 EXPORT_SYMBOL_GPL(segment_base);
155 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
157 if (irqchip_in_kernel(vcpu->kvm))
158 return vcpu->arch.apic_base;
160 return vcpu->arch.apic_base;
162 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
164 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
166 /* TODO: reserve bits check */
167 if (irqchip_in_kernel(vcpu->kvm))
168 kvm_lapic_set_base(vcpu, data);
170 vcpu->arch.apic_base = data;
172 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
174 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
176 WARN_ON(vcpu->arch.exception.pending);
177 vcpu->arch.exception.pending = true;
178 vcpu->arch.exception.has_error_code = false;
179 vcpu->arch.exception.nr = nr;
181 EXPORT_SYMBOL_GPL(kvm_queue_exception);
183 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
186 ++vcpu->stat.pf_guest;
188 if (vcpu->arch.exception.pending) {
189 switch(vcpu->arch.exception.nr) {
191 /* triple fault -> shutdown */
192 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
195 vcpu->arch.exception.nr = DF_VECTOR;
196 vcpu->arch.exception.error_code = 0;
199 /* replace previous exception with a new one in a hope
200 that instruction re-execution will regenerate lost
202 vcpu->arch.exception.pending = false;
206 vcpu->arch.cr2 = addr;
207 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
210 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
212 vcpu->arch.nmi_pending = 1;
214 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
216 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
218 WARN_ON(vcpu->arch.exception.pending);
219 vcpu->arch.exception.pending = true;
220 vcpu->arch.exception.has_error_code = true;
221 vcpu->arch.exception.nr = nr;
222 vcpu->arch.exception.error_code = error_code;
224 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
226 static void __queue_exception(struct kvm_vcpu *vcpu)
228 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
229 vcpu->arch.exception.has_error_code,
230 vcpu->arch.exception.error_code);
234 * Load the pae pdptrs. Return true is they are all valid.
236 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
238 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
239 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
242 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
244 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
245 offset * sizeof(u64), sizeof(pdpte));
250 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
251 if (is_present_gpte(pdpte[i]) &&
252 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
259 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
260 __set_bit(VCPU_EXREG_PDPTR,
261 (unsigned long *)&vcpu->arch.regs_avail);
262 __set_bit(VCPU_EXREG_PDPTR,
263 (unsigned long *)&vcpu->arch.regs_dirty);
268 EXPORT_SYMBOL_GPL(load_pdptrs);
270 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
272 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
276 if (is_long_mode(vcpu) || !is_pae(vcpu))
279 if (!test_bit(VCPU_EXREG_PDPTR,
280 (unsigned long *)&vcpu->arch.regs_avail))
283 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
286 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
292 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
294 if (cr0 & CR0_RESERVED_BITS) {
295 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
296 cr0, vcpu->arch.cr0);
297 kvm_inject_gp(vcpu, 0);
301 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
302 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
303 kvm_inject_gp(vcpu, 0);
307 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
308 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
309 "and a clear PE flag\n");
310 kvm_inject_gp(vcpu, 0);
314 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
316 if ((vcpu->arch.shadow_efer & EFER_LME)) {
320 printk(KERN_DEBUG "set_cr0: #GP, start paging "
321 "in long mode while PAE is disabled\n");
322 kvm_inject_gp(vcpu, 0);
325 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
327 printk(KERN_DEBUG "set_cr0: #GP, start paging "
328 "in long mode while CS.L == 1\n");
329 kvm_inject_gp(vcpu, 0);
335 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
336 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
338 kvm_inject_gp(vcpu, 0);
344 kvm_x86_ops->set_cr0(vcpu, cr0);
345 vcpu->arch.cr0 = cr0;
347 kvm_mmu_reset_context(vcpu);
350 EXPORT_SYMBOL_GPL(kvm_set_cr0);
352 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
354 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
356 EXPORT_SYMBOL_GPL(kvm_lmsw);
358 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
360 unsigned long old_cr4 = vcpu->arch.cr4;
361 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
363 if (cr4 & CR4_RESERVED_BITS) {
364 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
365 kvm_inject_gp(vcpu, 0);
369 if (is_long_mode(vcpu)) {
370 if (!(cr4 & X86_CR4_PAE)) {
371 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
373 kvm_inject_gp(vcpu, 0);
376 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
377 && ((cr4 ^ old_cr4) & pdptr_bits)
378 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
379 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
380 kvm_inject_gp(vcpu, 0);
384 if (cr4 & X86_CR4_VMXE) {
385 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
386 kvm_inject_gp(vcpu, 0);
389 kvm_x86_ops->set_cr4(vcpu, cr4);
390 vcpu->arch.cr4 = cr4;
391 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
392 kvm_mmu_reset_context(vcpu);
394 EXPORT_SYMBOL_GPL(kvm_set_cr4);
396 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
398 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
399 kvm_mmu_sync_roots(vcpu);
400 kvm_mmu_flush_tlb(vcpu);
404 if (is_long_mode(vcpu)) {
405 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
406 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
407 kvm_inject_gp(vcpu, 0);
412 if (cr3 & CR3_PAE_RESERVED_BITS) {
414 "set_cr3: #GP, reserved bits\n");
415 kvm_inject_gp(vcpu, 0);
418 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
419 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
421 kvm_inject_gp(vcpu, 0);
426 * We don't check reserved bits in nonpae mode, because
427 * this isn't enforced, and VMware depends on this.
432 * Does the new cr3 value map to physical memory? (Note, we
433 * catch an invalid cr3 even in real-mode, because it would
434 * cause trouble later on when we turn on paging anyway.)
436 * A real CPU would silently accept an invalid cr3 and would
437 * attempt to use it - with largely undefined (and often hard
438 * to debug) behavior on the guest side.
440 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
441 kvm_inject_gp(vcpu, 0);
443 vcpu->arch.cr3 = cr3;
444 vcpu->arch.mmu.new_cr3(vcpu);
447 EXPORT_SYMBOL_GPL(kvm_set_cr3);
449 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
451 if (cr8 & CR8_RESERVED_BITS) {
452 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
453 kvm_inject_gp(vcpu, 0);
456 if (irqchip_in_kernel(vcpu->kvm))
457 kvm_lapic_set_tpr(vcpu, cr8);
459 vcpu->arch.cr8 = cr8;
461 EXPORT_SYMBOL_GPL(kvm_set_cr8);
463 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
465 if (irqchip_in_kernel(vcpu->kvm))
466 return kvm_lapic_get_cr8(vcpu);
468 return vcpu->arch.cr8;
470 EXPORT_SYMBOL_GPL(kvm_get_cr8);
472 static inline u32 bit(int bitno)
474 return 1 << (bitno & 31);
478 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
479 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
481 * This list is modified at module load time to reflect the
482 * capabilities of the host cpu.
484 static u32 msrs_to_save[] = {
485 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
488 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
490 MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
491 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
494 static unsigned num_msrs_to_save;
496 static u32 emulated_msrs[] = {
497 MSR_IA32_MISC_ENABLE,
500 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
502 if (efer & efer_reserved_bits) {
503 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
505 kvm_inject_gp(vcpu, 0);
510 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
511 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
512 kvm_inject_gp(vcpu, 0);
516 if (efer & EFER_FFXSR) {
517 struct kvm_cpuid_entry2 *feat;
519 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
520 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
521 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
522 kvm_inject_gp(vcpu, 0);
527 if (efer & EFER_SVME) {
528 struct kvm_cpuid_entry2 *feat;
530 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
531 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
532 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
533 kvm_inject_gp(vcpu, 0);
538 kvm_x86_ops->set_efer(vcpu, efer);
541 efer |= vcpu->arch.shadow_efer & EFER_LMA;
543 vcpu->arch.shadow_efer = efer;
545 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
546 kvm_mmu_reset_context(vcpu);
549 void kvm_enable_efer_bits(u64 mask)
551 efer_reserved_bits &= ~mask;
553 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
557 * Writes msr value into into the appropriate "register".
558 * Returns 0 on success, non-0 otherwise.
559 * Assumes vcpu_load() was already called.
561 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
563 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
567 * Adapt set_msr() to msr_io()'s calling convention
569 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
571 return kvm_set_msr(vcpu, index, *data);
574 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
577 struct pvclock_wall_clock wc;
578 struct timespec now, sys, boot;
585 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
588 * The guest calculates current wall clock time by adding
589 * system time (updated by kvm_write_guest_time below) to the
590 * wall clock specified here. guest system time equals host
591 * system time for us, thus we must fill in host boot time here.
593 now = current_kernel_time();
595 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
597 wc.sec = boot.tv_sec;
598 wc.nsec = boot.tv_nsec;
599 wc.version = version;
601 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
604 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
607 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
609 uint32_t quotient, remainder;
611 /* Don't try to replace with do_div(), this one calculates
612 * "(dividend << 32) / divisor" */
614 : "=a" (quotient), "=d" (remainder)
615 : "0" (0), "1" (dividend), "r" (divisor) );
619 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
621 uint64_t nsecs = 1000000000LL;
626 tps64 = tsc_khz * 1000LL;
627 while (tps64 > nsecs*2) {
632 tps32 = (uint32_t)tps64;
633 while (tps32 <= (uint32_t)nsecs) {
638 hv_clock->tsc_shift = shift;
639 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
641 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
642 __func__, tsc_khz, hv_clock->tsc_shift,
643 hv_clock->tsc_to_system_mul);
646 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
648 static void kvm_write_guest_time(struct kvm_vcpu *v)
652 struct kvm_vcpu_arch *vcpu = &v->arch;
654 unsigned long this_tsc_khz;
656 if ((!vcpu->time_page))
659 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
660 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
661 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
662 vcpu->hv_clock_tsc_khz = this_tsc_khz;
664 put_cpu_var(cpu_tsc_khz);
666 /* Keep irq disabled to prevent changes to the clock */
667 local_irq_save(flags);
668 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
670 local_irq_restore(flags);
672 /* With all the info we got, fill in the values */
674 vcpu->hv_clock.system_time = ts.tv_nsec +
675 (NSEC_PER_SEC * (u64)ts.tv_sec);
677 * The interface expects us to write an even number signaling that the
678 * update is finished. Since the guest won't see the intermediate
679 * state, we just increase by 2 at the end.
681 vcpu->hv_clock.version += 2;
683 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
685 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
686 sizeof(vcpu->hv_clock));
688 kunmap_atomic(shared_kaddr, KM_USER0);
690 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
693 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
695 struct kvm_vcpu_arch *vcpu = &v->arch;
697 if (!vcpu->time_page)
699 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
703 static bool msr_mtrr_valid(unsigned msr)
706 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
707 case MSR_MTRRfix64K_00000:
708 case MSR_MTRRfix16K_80000:
709 case MSR_MTRRfix16K_A0000:
710 case MSR_MTRRfix4K_C0000:
711 case MSR_MTRRfix4K_C8000:
712 case MSR_MTRRfix4K_D0000:
713 case MSR_MTRRfix4K_D8000:
714 case MSR_MTRRfix4K_E0000:
715 case MSR_MTRRfix4K_E8000:
716 case MSR_MTRRfix4K_F0000:
717 case MSR_MTRRfix4K_F8000:
718 case MSR_MTRRdefType:
719 case MSR_IA32_CR_PAT:
727 static bool valid_pat_type(unsigned t)
729 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
732 static bool valid_mtrr_type(unsigned t)
734 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
737 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
741 if (!msr_mtrr_valid(msr))
744 if (msr == MSR_IA32_CR_PAT) {
745 for (i = 0; i < 8; i++)
746 if (!valid_pat_type((data >> (i * 8)) & 0xff))
749 } else if (msr == MSR_MTRRdefType) {
752 return valid_mtrr_type(data & 0xff);
753 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
754 for (i = 0; i < 8 ; i++)
755 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
761 return valid_mtrr_type(data & 0xff);
764 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
766 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
768 if (!mtrr_valid(vcpu, msr, data))
771 if (msr == MSR_MTRRdefType) {
772 vcpu->arch.mtrr_state.def_type = data;
773 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
774 } else if (msr == MSR_MTRRfix64K_00000)
776 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
777 p[1 + msr - MSR_MTRRfix16K_80000] = data;
778 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
779 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
780 else if (msr == MSR_IA32_CR_PAT)
781 vcpu->arch.pat = data;
782 else { /* Variable MTRRs */
783 int idx, is_mtrr_mask;
786 idx = (msr - 0x200) / 2;
787 is_mtrr_mask = msr - 0x200 - 2 * idx;
790 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
793 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
797 kvm_mmu_reset_context(vcpu);
801 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
803 u64 mcg_cap = vcpu->arch.mcg_cap;
804 unsigned bank_num = mcg_cap & 0xff;
807 case MSR_IA32_MCG_STATUS:
808 vcpu->arch.mcg_status = data;
810 case MSR_IA32_MCG_CTL:
811 if (!(mcg_cap & MCG_CTL_P))
813 if (data != 0 && data != ~(u64)0)
815 vcpu->arch.mcg_ctl = data;
818 if (msr >= MSR_IA32_MC0_CTL &&
819 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
820 u32 offset = msr - MSR_IA32_MC0_CTL;
821 /* only 0 or all 1s can be written to IA32_MCi_CTL */
822 if ((offset & 0x3) == 0 &&
823 data != 0 && data != ~(u64)0)
825 vcpu->arch.mce_banks[offset] = data;
833 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
837 set_efer(vcpu, data);
840 data &= ~(u64)0x40; /* ignore flush filter disable */
842 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
847 case MSR_IA32_DEBUGCTLMSR:
849 /* We support the non-activated case already */
851 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
852 /* Values other than LBR and BTF are vendor-specific,
853 thus reserved and should throw a #GP */
856 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
859 case MSR_IA32_UCODE_REV:
860 case MSR_IA32_UCODE_WRITE:
861 case MSR_VM_HSAVE_PA:
863 case 0x200 ... 0x2ff:
864 return set_msr_mtrr(vcpu, msr, data);
865 case MSR_IA32_APICBASE:
866 kvm_set_apic_base(vcpu, data);
868 case MSR_IA32_MISC_ENABLE:
869 vcpu->arch.ia32_misc_enable_msr = data;
871 case MSR_KVM_WALL_CLOCK:
872 vcpu->kvm->arch.wall_clock = data;
873 kvm_write_wall_clock(vcpu->kvm, data);
875 case MSR_KVM_SYSTEM_TIME: {
876 if (vcpu->arch.time_page) {
877 kvm_release_page_dirty(vcpu->arch.time_page);
878 vcpu->arch.time_page = NULL;
881 vcpu->arch.time = data;
883 /* we verify if the enable bit is set... */
887 /* ...but clean it before doing the actual write */
888 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
890 vcpu->arch.time_page =
891 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
893 if (is_error_page(vcpu->arch.time_page)) {
894 kvm_release_page_clean(vcpu->arch.time_page);
895 vcpu->arch.time_page = NULL;
898 kvm_request_guest_time_update(vcpu);
901 case MSR_IA32_MCG_CTL:
902 case MSR_IA32_MCG_STATUS:
903 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
904 return set_msr_mce(vcpu, msr, data);
906 /* Performance counters are not protected by a CPUID bit,
907 * so we should check all of them in the generic path for the sake of
908 * cross vendor migration.
909 * Writing a zero into the event select MSRs disables them,
910 * which we perfectly emulate ;-). Any other value should be at least
911 * reported, some guests depend on them.
913 case MSR_P6_EVNTSEL0:
914 case MSR_P6_EVNTSEL1:
915 case MSR_K7_EVNTSEL0:
916 case MSR_K7_EVNTSEL1:
917 case MSR_K7_EVNTSEL2:
918 case MSR_K7_EVNTSEL3:
920 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
921 "0x%x data 0x%llx\n", msr, data);
923 /* at least RHEL 4 unconditionally writes to the perfctr registers,
924 * so we ignore writes to make it happy.
926 case MSR_P6_PERFCTR0:
927 case MSR_P6_PERFCTR1:
928 case MSR_K7_PERFCTR0:
929 case MSR_K7_PERFCTR1:
930 case MSR_K7_PERFCTR2:
931 case MSR_K7_PERFCTR3:
932 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
933 "0x%x data 0x%llx\n", msr, data);
937 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
941 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
948 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
952 * Reads an msr value (of 'msr_index') into 'pdata'.
953 * Returns 0 on success, non-0 otherwise.
954 * Assumes vcpu_load() was already called.
956 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
958 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
961 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
963 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
965 if (!msr_mtrr_valid(msr))
968 if (msr == MSR_MTRRdefType)
969 *pdata = vcpu->arch.mtrr_state.def_type +
970 (vcpu->arch.mtrr_state.enabled << 10);
971 else if (msr == MSR_MTRRfix64K_00000)
973 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
974 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
975 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
976 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
977 else if (msr == MSR_IA32_CR_PAT)
978 *pdata = vcpu->arch.pat;
979 else { /* Variable MTRRs */
980 int idx, is_mtrr_mask;
983 idx = (msr - 0x200) / 2;
984 is_mtrr_mask = msr - 0x200 - 2 * idx;
987 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
990 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
997 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1000 u64 mcg_cap = vcpu->arch.mcg_cap;
1001 unsigned bank_num = mcg_cap & 0xff;
1004 case MSR_IA32_P5_MC_ADDR:
1005 case MSR_IA32_P5_MC_TYPE:
1008 case MSR_IA32_MCG_CAP:
1009 data = vcpu->arch.mcg_cap;
1011 case MSR_IA32_MCG_CTL:
1012 if (!(mcg_cap & MCG_CTL_P))
1014 data = vcpu->arch.mcg_ctl;
1016 case MSR_IA32_MCG_STATUS:
1017 data = vcpu->arch.mcg_status;
1020 if (msr >= MSR_IA32_MC0_CTL &&
1021 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1022 u32 offset = msr - MSR_IA32_MC0_CTL;
1023 data = vcpu->arch.mce_banks[offset];
1032 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1037 case MSR_IA32_PLATFORM_ID:
1038 case MSR_IA32_UCODE_REV:
1039 case MSR_IA32_EBL_CR_POWERON:
1040 case MSR_IA32_DEBUGCTLMSR:
1041 case MSR_IA32_LASTBRANCHFROMIP:
1042 case MSR_IA32_LASTBRANCHTOIP:
1043 case MSR_IA32_LASTINTFROMIP:
1044 case MSR_IA32_LASTINTTOIP:
1047 case MSR_VM_HSAVE_PA:
1048 case MSR_P6_EVNTSEL0:
1049 case MSR_P6_EVNTSEL1:
1050 case MSR_K7_EVNTSEL0:
1051 case MSR_K8_INT_PENDING_MSG:
1055 data = 0x500 | KVM_NR_VAR_MTRR;
1057 case 0x200 ... 0x2ff:
1058 return get_msr_mtrr(vcpu, msr, pdata);
1059 case 0xcd: /* fsb frequency */
1062 case MSR_IA32_APICBASE:
1063 data = kvm_get_apic_base(vcpu);
1065 case MSR_IA32_MISC_ENABLE:
1066 data = vcpu->arch.ia32_misc_enable_msr;
1068 case MSR_IA32_PERF_STATUS:
1069 /* TSC increment by tick */
1071 /* CPU multiplier */
1072 data |= (((uint64_t)4ULL) << 40);
1075 data = vcpu->arch.shadow_efer;
1077 case MSR_KVM_WALL_CLOCK:
1078 data = vcpu->kvm->arch.wall_clock;
1080 case MSR_KVM_SYSTEM_TIME:
1081 data = vcpu->arch.time;
1083 case MSR_IA32_P5_MC_ADDR:
1084 case MSR_IA32_P5_MC_TYPE:
1085 case MSR_IA32_MCG_CAP:
1086 case MSR_IA32_MCG_CTL:
1087 case MSR_IA32_MCG_STATUS:
1088 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1089 return get_msr_mce(vcpu, msr, pdata);
1092 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1095 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1103 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1106 * Read or write a bunch of msrs. All parameters are kernel addresses.
1108 * @return number of msrs set successfully.
1110 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1111 struct kvm_msr_entry *entries,
1112 int (*do_msr)(struct kvm_vcpu *vcpu,
1113 unsigned index, u64 *data))
1119 down_read(&vcpu->kvm->slots_lock);
1120 for (i = 0; i < msrs->nmsrs; ++i)
1121 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1123 up_read(&vcpu->kvm->slots_lock);
1131 * Read or write a bunch of msrs. Parameters are user addresses.
1133 * @return number of msrs set successfully.
1135 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1136 int (*do_msr)(struct kvm_vcpu *vcpu,
1137 unsigned index, u64 *data),
1140 struct kvm_msrs msrs;
1141 struct kvm_msr_entry *entries;
1146 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1150 if (msrs.nmsrs >= MAX_IO_MSRS)
1154 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1155 entries = vmalloc(size);
1160 if (copy_from_user(entries, user_msrs->entries, size))
1163 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1168 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1179 int kvm_dev_ioctl_check_extension(long ext)
1184 case KVM_CAP_IRQCHIP:
1186 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1187 case KVM_CAP_SET_TSS_ADDR:
1188 case KVM_CAP_EXT_CPUID:
1189 case KVM_CAP_CLOCKSOURCE:
1191 case KVM_CAP_NOP_IO_DELAY:
1192 case KVM_CAP_MP_STATE:
1193 case KVM_CAP_SYNC_MMU:
1194 case KVM_CAP_REINJECT_CONTROL:
1195 case KVM_CAP_IRQ_INJECT_STATUS:
1196 case KVM_CAP_ASSIGN_DEV_IRQ:
1201 case KVM_CAP_COALESCED_MMIO:
1202 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1205 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1207 case KVM_CAP_NR_VCPUS:
1210 case KVM_CAP_NR_MEMSLOTS:
1211 r = KVM_MEMORY_SLOTS;
1213 case KVM_CAP_PV_MMU:
1220 r = KVM_MAX_MCE_BANKS;
1230 long kvm_arch_dev_ioctl(struct file *filp,
1231 unsigned int ioctl, unsigned long arg)
1233 void __user *argp = (void __user *)arg;
1237 case KVM_GET_MSR_INDEX_LIST: {
1238 struct kvm_msr_list __user *user_msr_list = argp;
1239 struct kvm_msr_list msr_list;
1243 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1246 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1247 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1250 if (n < msr_list.nmsrs)
1253 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1254 num_msrs_to_save * sizeof(u32)))
1256 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1258 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1263 case KVM_GET_SUPPORTED_CPUID: {
1264 struct kvm_cpuid2 __user *cpuid_arg = argp;
1265 struct kvm_cpuid2 cpuid;
1268 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1270 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1271 cpuid_arg->entries);
1276 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1281 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1284 mce_cap = KVM_MCE_CAP_SUPPORTED;
1286 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1298 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1300 kvm_x86_ops->vcpu_load(vcpu, cpu);
1301 kvm_request_guest_time_update(vcpu);
1304 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1306 kvm_x86_ops->vcpu_put(vcpu);
1307 kvm_put_guest_fpu(vcpu);
1310 static int is_efer_nx(void)
1312 unsigned long long efer = 0;
1314 rdmsrl_safe(MSR_EFER, &efer);
1315 return efer & EFER_NX;
1318 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1321 struct kvm_cpuid_entry2 *e, *entry;
1324 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1325 e = &vcpu->arch.cpuid_entries[i];
1326 if (e->function == 0x80000001) {
1331 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1332 entry->edx &= ~(1 << 20);
1333 printk(KERN_INFO "kvm: guest NX capability removed\n");
1337 /* when an old userspace process fills a new kernel module */
1338 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1339 struct kvm_cpuid *cpuid,
1340 struct kvm_cpuid_entry __user *entries)
1343 struct kvm_cpuid_entry *cpuid_entries;
1346 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1349 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1353 if (copy_from_user(cpuid_entries, entries,
1354 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1356 for (i = 0; i < cpuid->nent; i++) {
1357 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1358 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1359 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1360 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1361 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1362 vcpu->arch.cpuid_entries[i].index = 0;
1363 vcpu->arch.cpuid_entries[i].flags = 0;
1364 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1365 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1366 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1368 vcpu->arch.cpuid_nent = cpuid->nent;
1369 cpuid_fix_nx_cap(vcpu);
1373 vfree(cpuid_entries);
1378 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1379 struct kvm_cpuid2 *cpuid,
1380 struct kvm_cpuid_entry2 __user *entries)
1385 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1388 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1389 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1391 vcpu->arch.cpuid_nent = cpuid->nent;
1398 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1399 struct kvm_cpuid2 *cpuid,
1400 struct kvm_cpuid_entry2 __user *entries)
1405 if (cpuid->nent < vcpu->arch.cpuid_nent)
1408 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1409 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1414 cpuid->nent = vcpu->arch.cpuid_nent;
1418 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1421 entry->function = function;
1422 entry->index = index;
1423 cpuid_count(entry->function, entry->index,
1424 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1428 #define F(x) bit(X86_FEATURE_##x)
1430 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1431 u32 index, int *nent, int maxnent)
1433 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1434 #ifdef CONFIG_X86_64
1435 unsigned f_lm = F(LM);
1441 const u32 kvm_supported_word0_x86_features =
1442 F(FPU) | F(VME) | F(DE) | F(PSE) |
1443 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1444 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1445 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1446 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1447 0 /* Reserved, DS, ACPI */ | F(MMX) |
1448 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1449 0 /* HTT, TM, Reserved, PBE */;
1450 /* cpuid 0x80000001.edx */
1451 const u32 kvm_supported_word1_x86_features =
1452 F(FPU) | F(VME) | F(DE) | F(PSE) |
1453 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1454 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1455 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1456 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1457 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1458 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1459 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1461 const u32 kvm_supported_word4_x86_features =
1462 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1463 0 /* DS-CPL, VMX, SMX, EST */ |
1464 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1465 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1466 0 /* Reserved, DCA */ | F(XMM4_1) |
1467 F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
1468 0 /* Reserved, XSAVE, OSXSAVE */;
1469 /* cpuid 0x80000001.ecx */
1470 const u32 kvm_supported_word6_x86_features =
1471 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1472 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1473 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1474 0 /* SKINIT */ | 0 /* WDT */;
1476 /* all calls to cpuid_count() should be made on the same cpu */
1478 do_cpuid_1_ent(entry, function, index);
1483 entry->eax = min(entry->eax, (u32)0xb);
1486 entry->edx &= kvm_supported_word0_x86_features;
1487 entry->ecx &= kvm_supported_word4_x86_features;
1489 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1490 * may return different values. This forces us to get_cpu() before
1491 * issuing the first command, and also to emulate this annoying behavior
1492 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1494 int t, times = entry->eax & 0xff;
1496 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1497 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1498 for (t = 1; t < times && *nent < maxnent; ++t) {
1499 do_cpuid_1_ent(&entry[t], function, 0);
1500 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1505 /* function 4 and 0xb have additional index. */
1509 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1510 /* read more entries until cache_type is zero */
1511 for (i = 1; *nent < maxnent; ++i) {
1512 cache_type = entry[i - 1].eax & 0x1f;
1515 do_cpuid_1_ent(&entry[i], function, i);
1517 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1525 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1526 /* read more entries until level_type is zero */
1527 for (i = 1; *nent < maxnent; ++i) {
1528 level_type = entry[i - 1].ecx & 0xff00;
1531 do_cpuid_1_ent(&entry[i], function, i);
1533 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1539 entry->eax = min(entry->eax, 0x8000001a);
1542 entry->edx &= kvm_supported_word1_x86_features;
1543 entry->ecx &= kvm_supported_word6_x86_features;
1551 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1552 struct kvm_cpuid_entry2 __user *entries)
1554 struct kvm_cpuid_entry2 *cpuid_entries;
1555 int limit, nent = 0, r = -E2BIG;
1558 if (cpuid->nent < 1)
1561 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1565 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1566 limit = cpuid_entries[0].eax;
1567 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1568 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1569 &nent, cpuid->nent);
1571 if (nent >= cpuid->nent)
1574 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1575 limit = cpuid_entries[nent - 1].eax;
1576 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1577 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1578 &nent, cpuid->nent);
1580 if (nent >= cpuid->nent)
1584 if (copy_to_user(entries, cpuid_entries,
1585 nent * sizeof(struct kvm_cpuid_entry2)))
1591 vfree(cpuid_entries);
1596 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1597 struct kvm_lapic_state *s)
1600 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1606 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1607 struct kvm_lapic_state *s)
1610 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1611 kvm_apic_post_state_restore(vcpu);
1617 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1618 struct kvm_interrupt *irq)
1620 if (irq->irq < 0 || irq->irq >= 256)
1622 if (irqchip_in_kernel(vcpu->kvm))
1626 kvm_queue_interrupt(vcpu, irq->irq, false);
1633 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1636 kvm_inject_nmi(vcpu);
1642 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1643 struct kvm_tpr_access_ctl *tac)
1647 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1651 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1655 unsigned bank_num = mcg_cap & 0xff, bank;
1660 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1663 vcpu->arch.mcg_cap = mcg_cap;
1664 /* Init IA32_MCG_CTL to all 1s */
1665 if (mcg_cap & MCG_CTL_P)
1666 vcpu->arch.mcg_ctl = ~(u64)0;
1667 /* Init IA32_MCi_CTL to all 1s */
1668 for (bank = 0; bank < bank_num; bank++)
1669 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1674 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1675 struct kvm_x86_mce *mce)
1677 u64 mcg_cap = vcpu->arch.mcg_cap;
1678 unsigned bank_num = mcg_cap & 0xff;
1679 u64 *banks = vcpu->arch.mce_banks;
1681 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1684 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1685 * reporting is disabled
1687 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1688 vcpu->arch.mcg_ctl != ~(u64)0)
1690 banks += 4 * mce->bank;
1692 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1693 * reporting is disabled for the bank
1695 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1697 if (mce->status & MCI_STATUS_UC) {
1698 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1699 !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1700 printk(KERN_DEBUG "kvm: set_mce: "
1701 "injects mce exception while "
1702 "previous one is in progress!\n");
1703 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1706 if (banks[1] & MCI_STATUS_VAL)
1707 mce->status |= MCI_STATUS_OVER;
1708 banks[2] = mce->addr;
1709 banks[3] = mce->misc;
1710 vcpu->arch.mcg_status = mce->mcg_status;
1711 banks[1] = mce->status;
1712 kvm_queue_exception(vcpu, MC_VECTOR);
1713 } else if (!(banks[1] & MCI_STATUS_VAL)
1714 || !(banks[1] & MCI_STATUS_UC)) {
1715 if (banks[1] & MCI_STATUS_VAL)
1716 mce->status |= MCI_STATUS_OVER;
1717 banks[2] = mce->addr;
1718 banks[3] = mce->misc;
1719 banks[1] = mce->status;
1721 banks[1] |= MCI_STATUS_OVER;
1725 long kvm_arch_vcpu_ioctl(struct file *filp,
1726 unsigned int ioctl, unsigned long arg)
1728 struct kvm_vcpu *vcpu = filp->private_data;
1729 void __user *argp = (void __user *)arg;
1731 struct kvm_lapic_state *lapic = NULL;
1734 case KVM_GET_LAPIC: {
1735 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1740 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1744 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1749 case KVM_SET_LAPIC: {
1750 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1755 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1757 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1763 case KVM_INTERRUPT: {
1764 struct kvm_interrupt irq;
1767 if (copy_from_user(&irq, argp, sizeof irq))
1769 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1776 r = kvm_vcpu_ioctl_nmi(vcpu);
1782 case KVM_SET_CPUID: {
1783 struct kvm_cpuid __user *cpuid_arg = argp;
1784 struct kvm_cpuid cpuid;
1787 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1789 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1794 case KVM_SET_CPUID2: {
1795 struct kvm_cpuid2 __user *cpuid_arg = argp;
1796 struct kvm_cpuid2 cpuid;
1799 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1801 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1802 cpuid_arg->entries);
1807 case KVM_GET_CPUID2: {
1808 struct kvm_cpuid2 __user *cpuid_arg = argp;
1809 struct kvm_cpuid2 cpuid;
1812 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1814 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1815 cpuid_arg->entries);
1819 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1825 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1828 r = msr_io(vcpu, argp, do_set_msr, 0);
1830 case KVM_TPR_ACCESS_REPORTING: {
1831 struct kvm_tpr_access_ctl tac;
1834 if (copy_from_user(&tac, argp, sizeof tac))
1836 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1840 if (copy_to_user(argp, &tac, sizeof tac))
1845 case KVM_SET_VAPIC_ADDR: {
1846 struct kvm_vapic_addr va;
1849 if (!irqchip_in_kernel(vcpu->kvm))
1852 if (copy_from_user(&va, argp, sizeof va))
1855 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1858 case KVM_X86_SETUP_MCE: {
1862 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1864 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1867 case KVM_X86_SET_MCE: {
1868 struct kvm_x86_mce mce;
1871 if (copy_from_user(&mce, argp, sizeof mce))
1873 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1884 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1888 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1890 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1894 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1895 u32 kvm_nr_mmu_pages)
1897 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1900 down_write(&kvm->slots_lock);
1901 spin_lock(&kvm->mmu_lock);
1903 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1904 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1906 spin_unlock(&kvm->mmu_lock);
1907 up_write(&kvm->slots_lock);
1911 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1913 return kvm->arch.n_alloc_mmu_pages;
1916 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1919 struct kvm_mem_alias *alias;
1921 for (i = 0; i < kvm->arch.naliases; ++i) {
1922 alias = &kvm->arch.aliases[i];
1923 if (gfn >= alias->base_gfn
1924 && gfn < alias->base_gfn + alias->npages)
1925 return alias->target_gfn + gfn - alias->base_gfn;
1931 * Set a new alias region. Aliases map a portion of physical memory into
1932 * another portion. This is useful for memory windows, for example the PC
1935 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1936 struct kvm_memory_alias *alias)
1939 struct kvm_mem_alias *p;
1942 /* General sanity checks */
1943 if (alias->memory_size & (PAGE_SIZE - 1))
1945 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1947 if (alias->slot >= KVM_ALIAS_SLOTS)
1949 if (alias->guest_phys_addr + alias->memory_size
1950 < alias->guest_phys_addr)
1952 if (alias->target_phys_addr + alias->memory_size
1953 < alias->target_phys_addr)
1956 down_write(&kvm->slots_lock);
1957 spin_lock(&kvm->mmu_lock);
1959 p = &kvm->arch.aliases[alias->slot];
1960 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1961 p->npages = alias->memory_size >> PAGE_SHIFT;
1962 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1964 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1965 if (kvm->arch.aliases[n - 1].npages)
1967 kvm->arch.naliases = n;
1969 spin_unlock(&kvm->mmu_lock);
1970 kvm_mmu_zap_all(kvm);
1972 up_write(&kvm->slots_lock);
1980 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1985 switch (chip->chip_id) {
1986 case KVM_IRQCHIP_PIC_MASTER:
1987 memcpy(&chip->chip.pic,
1988 &pic_irqchip(kvm)->pics[0],
1989 sizeof(struct kvm_pic_state));
1991 case KVM_IRQCHIP_PIC_SLAVE:
1992 memcpy(&chip->chip.pic,
1993 &pic_irqchip(kvm)->pics[1],
1994 sizeof(struct kvm_pic_state));
1996 case KVM_IRQCHIP_IOAPIC:
1997 memcpy(&chip->chip.ioapic,
1998 ioapic_irqchip(kvm),
1999 sizeof(struct kvm_ioapic_state));
2008 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2013 switch (chip->chip_id) {
2014 case KVM_IRQCHIP_PIC_MASTER:
2015 spin_lock(&pic_irqchip(kvm)->lock);
2016 memcpy(&pic_irqchip(kvm)->pics[0],
2018 sizeof(struct kvm_pic_state));
2019 spin_unlock(&pic_irqchip(kvm)->lock);
2021 case KVM_IRQCHIP_PIC_SLAVE:
2022 spin_lock(&pic_irqchip(kvm)->lock);
2023 memcpy(&pic_irqchip(kvm)->pics[1],
2025 sizeof(struct kvm_pic_state));
2026 spin_unlock(&pic_irqchip(kvm)->lock);
2028 case KVM_IRQCHIP_IOAPIC:
2029 mutex_lock(&kvm->irq_lock);
2030 memcpy(ioapic_irqchip(kvm),
2032 sizeof(struct kvm_ioapic_state));
2033 mutex_unlock(&kvm->irq_lock);
2039 kvm_pic_update_irq(pic_irqchip(kvm));
2043 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2047 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2048 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2049 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2053 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2057 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2058 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2059 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
2060 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2064 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2065 struct kvm_reinject_control *control)
2067 if (!kvm->arch.vpit)
2069 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2070 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2071 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2076 * Get (and clear) the dirty memory log for a memory slot.
2078 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2079 struct kvm_dirty_log *log)
2083 struct kvm_memory_slot *memslot;
2086 down_write(&kvm->slots_lock);
2088 r = kvm_get_dirty_log(kvm, log, &is_dirty);
2092 /* If nothing is dirty, don't bother messing with page tables. */
2094 spin_lock(&kvm->mmu_lock);
2095 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2096 spin_unlock(&kvm->mmu_lock);
2097 kvm_flush_remote_tlbs(kvm);
2098 memslot = &kvm->memslots[log->slot];
2099 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2100 memset(memslot->dirty_bitmap, 0, n);
2104 up_write(&kvm->slots_lock);
2108 long kvm_arch_vm_ioctl(struct file *filp,
2109 unsigned int ioctl, unsigned long arg)
2111 struct kvm *kvm = filp->private_data;
2112 void __user *argp = (void __user *)arg;
2115 * This union makes it completely explicit to gcc-3.x
2116 * that these two variables' stack usage should be
2117 * combined, not added together.
2120 struct kvm_pit_state ps;
2121 struct kvm_memory_alias alias;
2122 struct kvm_pit_config pit_config;
2126 case KVM_SET_TSS_ADDR:
2127 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2131 case KVM_SET_MEMORY_REGION: {
2132 struct kvm_memory_region kvm_mem;
2133 struct kvm_userspace_memory_region kvm_userspace_mem;
2136 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2138 kvm_userspace_mem.slot = kvm_mem.slot;
2139 kvm_userspace_mem.flags = kvm_mem.flags;
2140 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2141 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2142 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2147 case KVM_SET_NR_MMU_PAGES:
2148 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2152 case KVM_GET_NR_MMU_PAGES:
2153 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2155 case KVM_SET_MEMORY_ALIAS:
2157 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2159 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2163 case KVM_CREATE_IRQCHIP:
2165 kvm->arch.vpic = kvm_create_pic(kvm);
2166 if (kvm->arch.vpic) {
2167 r = kvm_ioapic_init(kvm);
2169 kfree(kvm->arch.vpic);
2170 kvm->arch.vpic = NULL;
2175 r = kvm_setup_default_irq_routing(kvm);
2177 kfree(kvm->arch.vpic);
2178 kfree(kvm->arch.vioapic);
2182 case KVM_CREATE_PIT:
2183 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2185 case KVM_CREATE_PIT2:
2187 if (copy_from_user(&u.pit_config, argp,
2188 sizeof(struct kvm_pit_config)))
2191 down_write(&kvm->slots_lock);
2194 goto create_pit_unlock;
2196 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2200 up_write(&kvm->slots_lock);
2202 case KVM_IRQ_LINE_STATUS:
2203 case KVM_IRQ_LINE: {
2204 struct kvm_irq_level irq_event;
2207 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2209 if (irqchip_in_kernel(kvm)) {
2211 mutex_lock(&kvm->irq_lock);
2212 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2213 irq_event.irq, irq_event.level);
2214 mutex_unlock(&kvm->irq_lock);
2215 if (ioctl == KVM_IRQ_LINE_STATUS) {
2216 irq_event.status = status;
2217 if (copy_to_user(argp, &irq_event,
2225 case KVM_GET_IRQCHIP: {
2226 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2227 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2233 if (copy_from_user(chip, argp, sizeof *chip))
2234 goto get_irqchip_out;
2236 if (!irqchip_in_kernel(kvm))
2237 goto get_irqchip_out;
2238 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2240 goto get_irqchip_out;
2242 if (copy_to_user(argp, chip, sizeof *chip))
2243 goto get_irqchip_out;
2251 case KVM_SET_IRQCHIP: {
2252 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2253 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2259 if (copy_from_user(chip, argp, sizeof *chip))
2260 goto set_irqchip_out;
2262 if (!irqchip_in_kernel(kvm))
2263 goto set_irqchip_out;
2264 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2266 goto set_irqchip_out;
2276 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2279 if (!kvm->arch.vpit)
2281 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2285 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2292 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2295 if (!kvm->arch.vpit)
2297 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2303 case KVM_REINJECT_CONTROL: {
2304 struct kvm_reinject_control control;
2306 if (copy_from_user(&control, argp, sizeof(control)))
2308 r = kvm_vm_ioctl_reinject(kvm, &control);
2321 static void kvm_init_msr_list(void)
2326 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2327 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2330 msrs_to_save[j] = msrs_to_save[i];
2333 num_msrs_to_save = j;
2337 * Only apic need an MMIO device hook, so shortcut now..
2339 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2340 gpa_t addr, int len,
2343 struct kvm_io_device *dev;
2345 if (vcpu->arch.apic) {
2346 dev = &vcpu->arch.apic->dev;
2347 if (kvm_iodevice_in_range(dev, addr, len, is_write))
2354 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2355 gpa_t addr, int len,
2358 struct kvm_io_device *dev;
2360 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2362 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2367 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2368 struct kvm_vcpu *vcpu)
2371 int r = X86EMUL_CONTINUE;
2374 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2375 unsigned offset = addr & (PAGE_SIZE-1);
2376 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2379 if (gpa == UNMAPPED_GVA) {
2380 r = X86EMUL_PROPAGATE_FAULT;
2383 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2385 r = X86EMUL_UNHANDLEABLE;
2397 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2398 struct kvm_vcpu *vcpu)
2401 int r = X86EMUL_CONTINUE;
2404 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2405 unsigned offset = addr & (PAGE_SIZE-1);
2406 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2409 if (gpa == UNMAPPED_GVA) {
2410 r = X86EMUL_PROPAGATE_FAULT;
2413 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2415 r = X86EMUL_UNHANDLEABLE;
2428 static int emulator_read_emulated(unsigned long addr,
2431 struct kvm_vcpu *vcpu)
2433 struct kvm_io_device *mmio_dev;
2436 if (vcpu->mmio_read_completed) {
2437 memcpy(val, vcpu->mmio_data, bytes);
2438 vcpu->mmio_read_completed = 0;
2439 return X86EMUL_CONTINUE;
2442 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2444 /* For APIC access vmexit */
2445 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2448 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2449 == X86EMUL_CONTINUE)
2450 return X86EMUL_CONTINUE;
2451 if (gpa == UNMAPPED_GVA)
2452 return X86EMUL_PROPAGATE_FAULT;
2456 * Is this MMIO handled locally?
2458 mutex_lock(&vcpu->kvm->lock);
2459 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2460 mutex_unlock(&vcpu->kvm->lock);
2462 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2463 return X86EMUL_CONTINUE;
2466 vcpu->mmio_needed = 1;
2467 vcpu->mmio_phys_addr = gpa;
2468 vcpu->mmio_size = bytes;
2469 vcpu->mmio_is_write = 0;
2471 return X86EMUL_UNHANDLEABLE;
2474 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2475 const void *val, int bytes)
2479 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2482 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2486 static int emulator_write_emulated_onepage(unsigned long addr,
2489 struct kvm_vcpu *vcpu)
2491 struct kvm_io_device *mmio_dev;
2494 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2496 if (gpa == UNMAPPED_GVA) {
2497 kvm_inject_page_fault(vcpu, addr, 2);
2498 return X86EMUL_PROPAGATE_FAULT;
2501 /* For APIC access vmexit */
2502 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2505 if (emulator_write_phys(vcpu, gpa, val, bytes))
2506 return X86EMUL_CONTINUE;
2510 * Is this MMIO handled locally?
2512 mutex_lock(&vcpu->kvm->lock);
2513 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2514 mutex_unlock(&vcpu->kvm->lock);
2516 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2517 return X86EMUL_CONTINUE;
2520 vcpu->mmio_needed = 1;
2521 vcpu->mmio_phys_addr = gpa;
2522 vcpu->mmio_size = bytes;
2523 vcpu->mmio_is_write = 1;
2524 memcpy(vcpu->mmio_data, val, bytes);
2526 return X86EMUL_CONTINUE;
2529 int emulator_write_emulated(unsigned long addr,
2532 struct kvm_vcpu *vcpu)
2534 /* Crossing a page boundary? */
2535 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2538 now = -addr & ~PAGE_MASK;
2539 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2540 if (rc != X86EMUL_CONTINUE)
2546 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2548 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2550 static int emulator_cmpxchg_emulated(unsigned long addr,
2554 struct kvm_vcpu *vcpu)
2556 static int reported;
2560 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2562 #ifndef CONFIG_X86_64
2563 /* guests cmpxchg8b have to be emulated atomically */
2570 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2572 if (gpa == UNMAPPED_GVA ||
2573 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2576 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2581 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2583 kaddr = kmap_atomic(page, KM_USER0);
2584 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2585 kunmap_atomic(kaddr, KM_USER0);
2586 kvm_release_page_dirty(page);
2591 return emulator_write_emulated(addr, new, bytes, vcpu);
2594 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2596 return kvm_x86_ops->get_segment_base(vcpu, seg);
2599 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2601 kvm_mmu_invlpg(vcpu, address);
2602 return X86EMUL_CONTINUE;
2605 int emulate_clts(struct kvm_vcpu *vcpu)
2607 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2608 return X86EMUL_CONTINUE;
2611 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2613 struct kvm_vcpu *vcpu = ctxt->vcpu;
2617 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2618 return X86EMUL_CONTINUE;
2620 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2621 return X86EMUL_UNHANDLEABLE;
2625 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2627 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2630 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2632 /* FIXME: better handling */
2633 return X86EMUL_UNHANDLEABLE;
2635 return X86EMUL_CONTINUE;
2638 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2641 unsigned long rip = kvm_rip_read(vcpu);
2642 unsigned long rip_linear;
2644 if (!printk_ratelimit())
2647 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2649 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2651 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2652 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2654 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2656 static struct x86_emulate_ops emulate_ops = {
2657 .read_std = kvm_read_guest_virt,
2658 .read_emulated = emulator_read_emulated,
2659 .write_emulated = emulator_write_emulated,
2660 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2663 static void cache_all_regs(struct kvm_vcpu *vcpu)
2665 kvm_register_read(vcpu, VCPU_REGS_RAX);
2666 kvm_register_read(vcpu, VCPU_REGS_RSP);
2667 kvm_register_read(vcpu, VCPU_REGS_RIP);
2668 vcpu->arch.regs_dirty = ~0;
2671 int emulate_instruction(struct kvm_vcpu *vcpu,
2672 struct kvm_run *run,
2678 struct decode_cache *c;
2680 kvm_clear_exception_queue(vcpu);
2681 vcpu->arch.mmio_fault_cr2 = cr2;
2683 * TODO: fix x86_emulate.c to use guest_read/write_register
2684 * instead of direct ->regs accesses, can save hundred cycles
2685 * on Intel for instructions that don't read/change RSP, for
2688 cache_all_regs(vcpu);
2690 vcpu->mmio_is_write = 0;
2691 vcpu->arch.pio.string = 0;
2693 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2695 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2697 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2698 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2699 vcpu->arch.emulate_ctxt.mode =
2700 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2701 ? X86EMUL_MODE_REAL : cs_l
2702 ? X86EMUL_MODE_PROT64 : cs_db
2703 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2705 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2707 /* Only allow emulation of specific instructions on #UD
2708 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2709 c = &vcpu->arch.emulate_ctxt.decode;
2710 if (emulation_type & EMULTYPE_TRAP_UD) {
2712 return EMULATE_FAIL;
2714 case 0x01: /* VMMCALL */
2715 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2716 return EMULATE_FAIL;
2718 case 0x34: /* sysenter */
2719 case 0x35: /* sysexit */
2720 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2721 return EMULATE_FAIL;
2723 case 0x05: /* syscall */
2724 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2725 return EMULATE_FAIL;
2728 return EMULATE_FAIL;
2731 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2732 return EMULATE_FAIL;
2735 ++vcpu->stat.insn_emulation;
2737 ++vcpu->stat.insn_emulation_fail;
2738 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2739 return EMULATE_DONE;
2740 return EMULATE_FAIL;
2744 if (emulation_type & EMULTYPE_SKIP) {
2745 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2746 return EMULATE_DONE;
2749 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2750 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2753 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2755 if (vcpu->arch.pio.string)
2756 return EMULATE_DO_MMIO;
2758 if ((r || vcpu->mmio_is_write) && run) {
2759 run->exit_reason = KVM_EXIT_MMIO;
2760 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2761 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2762 run->mmio.len = vcpu->mmio_size;
2763 run->mmio.is_write = vcpu->mmio_is_write;
2767 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2768 return EMULATE_DONE;
2769 if (!vcpu->mmio_needed) {
2770 kvm_report_emulation_failure(vcpu, "mmio");
2771 return EMULATE_FAIL;
2773 return EMULATE_DO_MMIO;
2776 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2778 if (vcpu->mmio_is_write) {
2779 vcpu->mmio_needed = 0;
2780 return EMULATE_DO_MMIO;
2783 return EMULATE_DONE;
2785 EXPORT_SYMBOL_GPL(emulate_instruction);
2787 static int pio_copy_data(struct kvm_vcpu *vcpu)
2789 void *p = vcpu->arch.pio_data;
2790 gva_t q = vcpu->arch.pio.guest_gva;
2794 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2795 if (vcpu->arch.pio.in)
2796 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2798 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2802 int complete_pio(struct kvm_vcpu *vcpu)
2804 struct kvm_pio_request *io = &vcpu->arch.pio;
2811 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2812 memcpy(&val, vcpu->arch.pio_data, io->size);
2813 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2817 r = pio_copy_data(vcpu);
2824 delta *= io->cur_count;
2826 * The size of the register should really depend on
2827 * current address size.
2829 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2831 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2837 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2839 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2841 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2843 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2847 io->count -= io->cur_count;
2853 static void kernel_pio(struct kvm_io_device *pio_dev,
2854 struct kvm_vcpu *vcpu,
2857 /* TODO: String I/O for in kernel device */
2859 if (vcpu->arch.pio.in)
2860 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2861 vcpu->arch.pio.size,
2864 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2865 vcpu->arch.pio.size,
2869 static void pio_string_write(struct kvm_io_device *pio_dev,
2870 struct kvm_vcpu *vcpu)
2872 struct kvm_pio_request *io = &vcpu->arch.pio;
2873 void *pd = vcpu->arch.pio_data;
2876 for (i = 0; i < io->cur_count; i++) {
2877 kvm_iodevice_write(pio_dev, io->port,
2884 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2885 gpa_t addr, int len,
2888 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2891 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2892 int size, unsigned port)
2894 struct kvm_io_device *pio_dev;
2897 vcpu->run->exit_reason = KVM_EXIT_IO;
2898 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2899 vcpu->run->io.size = vcpu->arch.pio.size = size;
2900 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2901 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2902 vcpu->run->io.port = vcpu->arch.pio.port = port;
2903 vcpu->arch.pio.in = in;
2904 vcpu->arch.pio.string = 0;
2905 vcpu->arch.pio.down = 0;
2906 vcpu->arch.pio.rep = 0;
2908 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2911 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2912 memcpy(vcpu->arch.pio_data, &val, 4);
2914 mutex_lock(&vcpu->kvm->lock);
2915 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2916 mutex_unlock(&vcpu->kvm->lock);
2918 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2924 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2926 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2927 int size, unsigned long count, int down,
2928 gva_t address, int rep, unsigned port)
2930 unsigned now, in_page;
2932 struct kvm_io_device *pio_dev;
2934 vcpu->run->exit_reason = KVM_EXIT_IO;
2935 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2936 vcpu->run->io.size = vcpu->arch.pio.size = size;
2937 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2938 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2939 vcpu->run->io.port = vcpu->arch.pio.port = port;
2940 vcpu->arch.pio.in = in;
2941 vcpu->arch.pio.string = 1;
2942 vcpu->arch.pio.down = down;
2943 vcpu->arch.pio.rep = rep;
2945 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2949 kvm_x86_ops->skip_emulated_instruction(vcpu);
2954 in_page = PAGE_SIZE - offset_in_page(address);
2956 in_page = offset_in_page(address) + size;
2957 now = min(count, (unsigned long)in_page / size);
2962 * String I/O in reverse. Yuck. Kill the guest, fix later.
2964 pr_unimpl(vcpu, "guest string pio down\n");
2965 kvm_inject_gp(vcpu, 0);
2968 vcpu->run->io.count = now;
2969 vcpu->arch.pio.cur_count = now;
2971 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2972 kvm_x86_ops->skip_emulated_instruction(vcpu);
2974 vcpu->arch.pio.guest_gva = address;
2976 mutex_lock(&vcpu->kvm->lock);
2977 pio_dev = vcpu_find_pio_dev(vcpu, port,
2978 vcpu->arch.pio.cur_count,
2979 !vcpu->arch.pio.in);
2980 mutex_unlock(&vcpu->kvm->lock);
2982 if (!vcpu->arch.pio.in) {
2983 /* string PIO write */
2984 ret = pio_copy_data(vcpu);
2985 if (ret == X86EMUL_PROPAGATE_FAULT) {
2986 kvm_inject_gp(vcpu, 0);
2989 if (ret == 0 && pio_dev) {
2990 pio_string_write(pio_dev, vcpu);
2992 if (vcpu->arch.pio.count == 0)
2996 pr_unimpl(vcpu, "no string pio read support yet, "
2997 "port %x size %d count %ld\n",
3002 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3004 static void bounce_off(void *info)
3009 static unsigned int ref_freq;
3010 static unsigned long tsc_khz_ref;
3012 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3015 struct cpufreq_freqs *freq = data;
3017 struct kvm_vcpu *vcpu;
3018 int i, send_ipi = 0;
3021 ref_freq = freq->old;
3023 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3025 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3027 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3029 spin_lock(&kvm_lock);
3030 list_for_each_entry(kvm, &vm_list, vm_list) {
3031 kvm_for_each_vcpu(i, vcpu, kvm) {
3032 if (vcpu->cpu != freq->cpu)
3034 if (!kvm_request_guest_time_update(vcpu))
3036 if (vcpu->cpu != smp_processor_id())
3040 spin_unlock(&kvm_lock);
3042 if (freq->old < freq->new && send_ipi) {
3044 * We upscale the frequency. Must make the guest
3045 * doesn't see old kvmclock values while running with
3046 * the new frequency, otherwise we risk the guest sees
3047 * time go backwards.
3049 * In case we update the frequency for another cpu
3050 * (which might be in guest context) send an interrupt
3051 * to kick the cpu out of guest context. Next time
3052 * guest context is entered kvmclock will be updated,
3053 * so the guest will not see stale values.
3055 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3060 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3061 .notifier_call = kvmclock_cpufreq_notifier
3064 int kvm_arch_init(void *opaque)
3067 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3070 printk(KERN_ERR "kvm: already loaded the other module\n");
3075 if (!ops->cpu_has_kvm_support()) {
3076 printk(KERN_ERR "kvm: no hardware support\n");
3080 if (ops->disabled_by_bios()) {
3081 printk(KERN_ERR "kvm: disabled by bios\n");
3086 r = kvm_mmu_module_init();
3090 kvm_init_msr_list();
3093 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3094 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3095 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3096 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3098 for_each_possible_cpu(cpu)
3099 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3100 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3101 tsc_khz_ref = tsc_khz;
3102 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3103 CPUFREQ_TRANSITION_NOTIFIER);
3112 void kvm_arch_exit(void)
3114 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3115 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3116 CPUFREQ_TRANSITION_NOTIFIER);
3118 kvm_mmu_module_exit();
3121 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3123 ++vcpu->stat.halt_exits;
3124 if (irqchip_in_kernel(vcpu->kvm)) {
3125 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3128 vcpu->run->exit_reason = KVM_EXIT_HLT;
3132 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3134 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3137 if (is_long_mode(vcpu))
3140 return a0 | ((gpa_t)a1 << 32);
3143 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3145 unsigned long nr, a0, a1, a2, a3, ret;
3148 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3149 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3150 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3151 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3152 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3154 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3156 if (!is_long_mode(vcpu)) {
3165 case KVM_HC_VAPIC_POLL_IRQ:
3169 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3175 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3176 ++vcpu->stat.hypercalls;
3179 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3181 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3183 char instruction[3];
3185 unsigned long rip = kvm_rip_read(vcpu);
3189 * Blow out the MMU to ensure that no other VCPU has an active mapping
3190 * to ensure that the updated hypercall appears atomically across all
3193 kvm_mmu_zap_all(vcpu->kvm);
3195 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3196 if (emulator_write_emulated(rip, instruction, 3, vcpu)
3197 != X86EMUL_CONTINUE)
3203 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3205 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3208 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3210 struct descriptor_table dt = { limit, base };
3212 kvm_x86_ops->set_gdt(vcpu, &dt);
3215 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3217 struct descriptor_table dt = { limit, base };
3219 kvm_x86_ops->set_idt(vcpu, &dt);
3222 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3223 unsigned long *rflags)
3225 kvm_lmsw(vcpu, msw);
3226 *rflags = kvm_x86_ops->get_rflags(vcpu);
3229 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3231 unsigned long value;
3233 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3236 value = vcpu->arch.cr0;
3239 value = vcpu->arch.cr2;
3242 value = vcpu->arch.cr3;
3245 value = vcpu->arch.cr4;
3248 value = kvm_get_cr8(vcpu);
3251 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3258 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3259 unsigned long *rflags)
3263 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3264 *rflags = kvm_x86_ops->get_rflags(vcpu);
3267 vcpu->arch.cr2 = val;
3270 kvm_set_cr3(vcpu, val);
3273 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3276 kvm_set_cr8(vcpu, val & 0xfUL);
3279 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3283 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3285 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3286 int j, nent = vcpu->arch.cpuid_nent;
3288 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3289 /* when no next entry is found, the current entry[i] is reselected */
3290 for (j = i + 1; ; j = (j + 1) % nent) {
3291 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3292 if (ej->function == e->function) {
3293 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3297 return 0; /* silence gcc, even though control never reaches here */
3300 /* find an entry with matching function, matching index (if needed), and that
3301 * should be read next (if it's stateful) */
3302 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3303 u32 function, u32 index)
3305 if (e->function != function)
3307 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3309 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3310 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3315 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3316 u32 function, u32 index)
3319 struct kvm_cpuid_entry2 *best = NULL;
3321 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3322 struct kvm_cpuid_entry2 *e;
3324 e = &vcpu->arch.cpuid_entries[i];
3325 if (is_matching_cpuid_entry(e, function, index)) {
3326 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3327 move_to_next_stateful_cpuid_entry(vcpu, i);
3332 * Both basic or both extended?
3334 if (((e->function ^ function) & 0x80000000) == 0)
3335 if (!best || e->function > best->function)
3341 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3343 struct kvm_cpuid_entry2 *best;
3345 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3347 return best->eax & 0xff;
3351 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3353 u32 function, index;
3354 struct kvm_cpuid_entry2 *best;
3356 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3357 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3358 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3359 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3360 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3361 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3362 best = kvm_find_cpuid_entry(vcpu, function, index);
3364 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3365 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3366 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3367 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3369 kvm_x86_ops->skip_emulated_instruction(vcpu);
3370 trace_kvm_cpuid(function,
3371 kvm_register_read(vcpu, VCPU_REGS_RAX),
3372 kvm_register_read(vcpu, VCPU_REGS_RBX),
3373 kvm_register_read(vcpu, VCPU_REGS_RCX),
3374 kvm_register_read(vcpu, VCPU_REGS_RDX));
3376 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3379 * Check if userspace requested an interrupt window, and that the
3380 * interrupt window is open.
3382 * No need to exit to userspace if we already have an interrupt queued.
3384 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3385 struct kvm_run *kvm_run)
3387 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3388 kvm_run->request_interrupt_window &&
3389 kvm_arch_interrupt_allowed(vcpu));
3392 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3393 struct kvm_run *kvm_run)
3395 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3396 kvm_run->cr8 = kvm_get_cr8(vcpu);
3397 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3398 if (irqchip_in_kernel(vcpu->kvm))
3399 kvm_run->ready_for_interrupt_injection = 1;
3401 kvm_run->ready_for_interrupt_injection =
3402 kvm_arch_interrupt_allowed(vcpu) &&
3403 !kvm_cpu_has_interrupt(vcpu) &&
3404 !kvm_event_needs_reinjection(vcpu);
3407 static void vapic_enter(struct kvm_vcpu *vcpu)
3409 struct kvm_lapic *apic = vcpu->arch.apic;
3412 if (!apic || !apic->vapic_addr)
3415 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3417 vcpu->arch.apic->vapic_page = page;
3420 static void vapic_exit(struct kvm_vcpu *vcpu)
3422 struct kvm_lapic *apic = vcpu->arch.apic;
3424 if (!apic || !apic->vapic_addr)
3427 down_read(&vcpu->kvm->slots_lock);
3428 kvm_release_page_dirty(apic->vapic_page);
3429 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3430 up_read(&vcpu->kvm->slots_lock);
3433 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3437 if (!kvm_x86_ops->update_cr8_intercept)
3440 if (!vcpu->arch.apic->vapic_addr)
3441 max_irr = kvm_lapic_find_highest_irr(vcpu);
3448 tpr = kvm_lapic_get_cr8(vcpu);
3450 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3453 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3455 /* try to reinject previous events if any */
3456 if (vcpu->arch.nmi_injected) {
3457 kvm_x86_ops->set_nmi(vcpu);
3461 if (vcpu->arch.interrupt.pending) {
3462 kvm_x86_ops->set_irq(vcpu);
3466 /* try to inject new event if pending */
3467 if (vcpu->arch.nmi_pending) {
3468 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3469 vcpu->arch.nmi_pending = false;
3470 vcpu->arch.nmi_injected = true;
3471 kvm_x86_ops->set_nmi(vcpu);
3473 } else if (kvm_cpu_has_interrupt(vcpu)) {
3474 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3475 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3477 kvm_x86_ops->set_irq(vcpu);
3482 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3485 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3486 kvm_run->request_interrupt_window;
3489 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3490 kvm_mmu_unload(vcpu);
3492 r = kvm_mmu_reload(vcpu);
3496 if (vcpu->requests) {
3497 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3498 __kvm_migrate_timers(vcpu);
3499 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3500 kvm_write_guest_time(vcpu);
3501 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3502 kvm_mmu_sync_roots(vcpu);
3503 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3504 kvm_x86_ops->tlb_flush(vcpu);
3505 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3507 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3511 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3512 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3520 kvm_x86_ops->prepare_guest_switch(vcpu);
3521 kvm_load_guest_fpu(vcpu);
3523 local_irq_disable();
3525 clear_bit(KVM_REQ_KICK, &vcpu->requests);
3526 smp_mb__after_clear_bit();
3528 if (vcpu->requests || need_resched() || signal_pending(current)) {
3535 if (vcpu->arch.exception.pending)
3536 __queue_exception(vcpu);
3538 inject_pending_irq(vcpu, kvm_run);
3540 /* enable NMI/IRQ window open exits if needed */
3541 if (vcpu->arch.nmi_pending)
3542 kvm_x86_ops->enable_nmi_window(vcpu);
3543 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3544 kvm_x86_ops->enable_irq_window(vcpu);
3546 if (kvm_lapic_enabled(vcpu)) {
3547 update_cr8_intercept(vcpu);
3548 kvm_lapic_sync_to_vapic(vcpu);
3551 up_read(&vcpu->kvm->slots_lock);
3555 get_debugreg(vcpu->arch.host_dr6, 6);
3556 get_debugreg(vcpu->arch.host_dr7, 7);
3557 if (unlikely(vcpu->arch.switch_db_regs)) {
3558 get_debugreg(vcpu->arch.host_db[0], 0);
3559 get_debugreg(vcpu->arch.host_db[1], 1);
3560 get_debugreg(vcpu->arch.host_db[2], 2);
3561 get_debugreg(vcpu->arch.host_db[3], 3);
3564 set_debugreg(vcpu->arch.eff_db[0], 0);
3565 set_debugreg(vcpu->arch.eff_db[1], 1);
3566 set_debugreg(vcpu->arch.eff_db[2], 2);
3567 set_debugreg(vcpu->arch.eff_db[3], 3);
3570 trace_kvm_entry(vcpu->vcpu_id);
3571 kvm_x86_ops->run(vcpu, kvm_run);
3573 if (unlikely(vcpu->arch.switch_db_regs)) {
3575 set_debugreg(vcpu->arch.host_db[0], 0);
3576 set_debugreg(vcpu->arch.host_db[1], 1);
3577 set_debugreg(vcpu->arch.host_db[2], 2);
3578 set_debugreg(vcpu->arch.host_db[3], 3);
3580 set_debugreg(vcpu->arch.host_dr6, 6);
3581 set_debugreg(vcpu->arch.host_dr7, 7);
3583 set_bit(KVM_REQ_KICK, &vcpu->requests);
3589 * We must have an instruction between local_irq_enable() and
3590 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3591 * the interrupt shadow. The stat.exits increment will do nicely.
3592 * But we need to prevent reordering, hence this barrier():
3600 down_read(&vcpu->kvm->slots_lock);
3603 * Profile KVM exit RIPs:
3605 if (unlikely(prof_on == KVM_PROFILING)) {
3606 unsigned long rip = kvm_rip_read(vcpu);
3607 profile_hit(KVM_PROFILING, (void *)rip);
3611 kvm_lapic_sync_from_vapic(vcpu);
3613 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3619 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3623 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3624 pr_debug("vcpu %d received sipi with vector # %x\n",
3625 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3626 kvm_lapic_reset(vcpu);
3627 r = kvm_arch_vcpu_reset(vcpu);
3630 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3633 down_read(&vcpu->kvm->slots_lock);
3638 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3639 r = vcpu_enter_guest(vcpu, kvm_run);
3641 up_read(&vcpu->kvm->slots_lock);
3642 kvm_vcpu_block(vcpu);
3643 down_read(&vcpu->kvm->slots_lock);
3644 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3646 switch(vcpu->arch.mp_state) {
3647 case KVM_MP_STATE_HALTED:
3648 vcpu->arch.mp_state =
3649 KVM_MP_STATE_RUNNABLE;
3650 case KVM_MP_STATE_RUNNABLE:
3652 case KVM_MP_STATE_SIPI_RECEIVED:
3663 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3664 if (kvm_cpu_has_pending_timer(vcpu))
3665 kvm_inject_pending_timer_irqs(vcpu);
3667 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3669 kvm_run->exit_reason = KVM_EXIT_INTR;
3670 ++vcpu->stat.request_irq_exits;
3672 if (signal_pending(current)) {
3674 kvm_run->exit_reason = KVM_EXIT_INTR;
3675 ++vcpu->stat.signal_exits;
3677 if (need_resched()) {
3678 up_read(&vcpu->kvm->slots_lock);
3680 down_read(&vcpu->kvm->slots_lock);
3684 up_read(&vcpu->kvm->slots_lock);
3685 post_kvm_run_save(vcpu, kvm_run);
3692 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3699 if (vcpu->sigset_active)
3700 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3702 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3703 kvm_vcpu_block(vcpu);
3704 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3709 /* re-sync apic's tpr */
3710 if (!irqchip_in_kernel(vcpu->kvm))
3711 kvm_set_cr8(vcpu, kvm_run->cr8);
3713 if (vcpu->arch.pio.cur_count) {
3714 r = complete_pio(vcpu);
3718 #if CONFIG_HAS_IOMEM
3719 if (vcpu->mmio_needed) {
3720 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3721 vcpu->mmio_read_completed = 1;
3722 vcpu->mmio_needed = 0;
3724 down_read(&vcpu->kvm->slots_lock);
3725 r = emulate_instruction(vcpu, kvm_run,
3726 vcpu->arch.mmio_fault_cr2, 0,
3727 EMULTYPE_NO_DECODE);
3728 up_read(&vcpu->kvm->slots_lock);
3729 if (r == EMULATE_DO_MMIO) {
3731 * Read-modify-write. Back to userspace.
3738 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3739 kvm_register_write(vcpu, VCPU_REGS_RAX,
3740 kvm_run->hypercall.ret);
3742 r = __vcpu_run(vcpu, kvm_run);
3745 if (vcpu->sigset_active)
3746 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3752 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3756 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3757 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3758 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3759 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3760 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3761 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3762 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3763 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3764 #ifdef CONFIG_X86_64
3765 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3766 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3767 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3768 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3769 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3770 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3771 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3772 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3775 regs->rip = kvm_rip_read(vcpu);
3776 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3779 * Don't leak debug flags in case they were set for guest debugging
3781 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3782 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3789 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3793 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3794 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3795 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3796 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3797 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3798 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3799 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3800 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3801 #ifdef CONFIG_X86_64
3802 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3803 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3804 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3805 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3806 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3807 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3808 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3809 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3813 kvm_rip_write(vcpu, regs->rip);
3814 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3817 vcpu->arch.exception.pending = false;
3824 void kvm_get_segment(struct kvm_vcpu *vcpu,
3825 struct kvm_segment *var, int seg)
3827 kvm_x86_ops->get_segment(vcpu, var, seg);
3830 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3832 struct kvm_segment cs;
3834 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3838 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3840 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3841 struct kvm_sregs *sregs)
3843 struct descriptor_table dt;
3847 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3848 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3849 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3850 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3851 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3852 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3854 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3855 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3857 kvm_x86_ops->get_idt(vcpu, &dt);
3858 sregs->idt.limit = dt.limit;
3859 sregs->idt.base = dt.base;
3860 kvm_x86_ops->get_gdt(vcpu, &dt);
3861 sregs->gdt.limit = dt.limit;
3862 sregs->gdt.base = dt.base;
3864 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3865 sregs->cr0 = vcpu->arch.cr0;
3866 sregs->cr2 = vcpu->arch.cr2;
3867 sregs->cr3 = vcpu->arch.cr3;
3868 sregs->cr4 = vcpu->arch.cr4;
3869 sregs->cr8 = kvm_get_cr8(vcpu);
3870 sregs->efer = vcpu->arch.shadow_efer;
3871 sregs->apic_base = kvm_get_apic_base(vcpu);
3873 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3875 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3876 set_bit(vcpu->arch.interrupt.nr,
3877 (unsigned long *)sregs->interrupt_bitmap);
3884 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3885 struct kvm_mp_state *mp_state)
3888 mp_state->mp_state = vcpu->arch.mp_state;
3893 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3894 struct kvm_mp_state *mp_state)
3897 vcpu->arch.mp_state = mp_state->mp_state;
3902 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3903 struct kvm_segment *var, int seg)
3905 kvm_x86_ops->set_segment(vcpu, var, seg);
3908 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3909 struct kvm_segment *kvm_desct)
3911 kvm_desct->base = seg_desc->base0;
3912 kvm_desct->base |= seg_desc->base1 << 16;
3913 kvm_desct->base |= seg_desc->base2 << 24;
3914 kvm_desct->limit = seg_desc->limit0;
3915 kvm_desct->limit |= seg_desc->limit << 16;
3917 kvm_desct->limit <<= 12;
3918 kvm_desct->limit |= 0xfff;
3920 kvm_desct->selector = selector;
3921 kvm_desct->type = seg_desc->type;
3922 kvm_desct->present = seg_desc->p;
3923 kvm_desct->dpl = seg_desc->dpl;
3924 kvm_desct->db = seg_desc->d;
3925 kvm_desct->s = seg_desc->s;
3926 kvm_desct->l = seg_desc->l;
3927 kvm_desct->g = seg_desc->g;
3928 kvm_desct->avl = seg_desc->avl;
3930 kvm_desct->unusable = 1;
3932 kvm_desct->unusable = 0;
3933 kvm_desct->padding = 0;
3936 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3938 struct descriptor_table *dtable)
3940 if (selector & 1 << 2) {
3941 struct kvm_segment kvm_seg;
3943 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3945 if (kvm_seg.unusable)
3948 dtable->limit = kvm_seg.limit;
3949 dtable->base = kvm_seg.base;
3952 kvm_x86_ops->get_gdt(vcpu, dtable);
3955 /* allowed just for 8 bytes segments */
3956 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3957 struct desc_struct *seg_desc)
3960 struct descriptor_table dtable;
3961 u16 index = selector >> 3;
3963 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3965 if (dtable.limit < index * 8 + 7) {
3966 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3969 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3971 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3974 /* allowed just for 8 bytes segments */
3975 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3976 struct desc_struct *seg_desc)
3979 struct descriptor_table dtable;
3980 u16 index = selector >> 3;
3982 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3984 if (dtable.limit < index * 8 + 7)
3986 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3988 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3991 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3992 struct desc_struct *seg_desc)
3996 base_addr = seg_desc->base0;
3997 base_addr |= (seg_desc->base1 << 16);
3998 base_addr |= (seg_desc->base2 << 24);
4000 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4003 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4005 struct kvm_segment kvm_seg;
4007 kvm_get_segment(vcpu, &kvm_seg, seg);
4008 return kvm_seg.selector;
4011 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4013 struct kvm_segment *kvm_seg)
4015 struct desc_struct seg_desc;
4017 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4019 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4023 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4025 struct kvm_segment segvar = {
4026 .base = selector << 4,
4028 .selector = selector,
4039 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4043 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4044 int type_bits, int seg)
4046 struct kvm_segment kvm_seg;
4048 if (!(vcpu->arch.cr0 & X86_CR0_PE))
4049 return kvm_load_realmode_segment(vcpu, selector, seg);
4050 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4052 kvm_seg.type |= type_bits;
4054 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4055 seg != VCPU_SREG_LDTR)
4057 kvm_seg.unusable = 1;
4059 kvm_set_segment(vcpu, &kvm_seg, seg);
4063 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4064 struct tss_segment_32 *tss)
4066 tss->cr3 = vcpu->arch.cr3;
4067 tss->eip = kvm_rip_read(vcpu);
4068 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4069 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4070 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4071 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4072 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4073 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4074 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4075 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4076 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4077 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4078 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4079 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4080 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4081 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4082 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4083 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4086 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4087 struct tss_segment_32 *tss)
4089 kvm_set_cr3(vcpu, tss->cr3);
4091 kvm_rip_write(vcpu, tss->eip);
4092 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4094 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4095 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4096 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4097 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4098 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4099 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4100 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4101 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4103 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4106 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4109 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4112 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4115 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4118 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4121 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4126 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4127 struct tss_segment_16 *tss)
4129 tss->ip = kvm_rip_read(vcpu);
4130 tss->flag = kvm_x86_ops->get_rflags(vcpu);
4131 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4132 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4133 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4134 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4135 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4136 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4137 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4138 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4140 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4141 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4142 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4143 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4144 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4145 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4148 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4149 struct tss_segment_16 *tss)
4151 kvm_rip_write(vcpu, tss->ip);
4152 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4153 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4154 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4155 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4156 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4157 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4158 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4159 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4160 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4162 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4165 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4168 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4171 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4174 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4179 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4180 u16 old_tss_sel, u32 old_tss_base,
4181 struct desc_struct *nseg_desc)
4183 struct tss_segment_16 tss_segment_16;
4186 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4187 sizeof tss_segment_16))
4190 save_state_to_tss16(vcpu, &tss_segment_16);
4192 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4193 sizeof tss_segment_16))
4196 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4197 &tss_segment_16, sizeof tss_segment_16))
4200 if (old_tss_sel != 0xffff) {
4201 tss_segment_16.prev_task_link = old_tss_sel;
4203 if (kvm_write_guest(vcpu->kvm,
4204 get_tss_base_addr(vcpu, nseg_desc),
4205 &tss_segment_16.prev_task_link,
4206 sizeof tss_segment_16.prev_task_link))
4210 if (load_state_from_tss16(vcpu, &tss_segment_16))
4218 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4219 u16 old_tss_sel, u32 old_tss_base,
4220 struct desc_struct *nseg_desc)
4222 struct tss_segment_32 tss_segment_32;
4225 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4226 sizeof tss_segment_32))
4229 save_state_to_tss32(vcpu, &tss_segment_32);
4231 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4232 sizeof tss_segment_32))
4235 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4236 &tss_segment_32, sizeof tss_segment_32))
4239 if (old_tss_sel != 0xffff) {
4240 tss_segment_32.prev_task_link = old_tss_sel;
4242 if (kvm_write_guest(vcpu->kvm,
4243 get_tss_base_addr(vcpu, nseg_desc),
4244 &tss_segment_32.prev_task_link,
4245 sizeof tss_segment_32.prev_task_link))
4249 if (load_state_from_tss32(vcpu, &tss_segment_32))
4257 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4259 struct kvm_segment tr_seg;
4260 struct desc_struct cseg_desc;
4261 struct desc_struct nseg_desc;
4263 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4264 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4266 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4268 /* FIXME: Handle errors. Failure to read either TSS or their
4269 * descriptors should generate a pagefault.
4271 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4274 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4277 if (reason != TASK_SWITCH_IRET) {
4280 cpl = kvm_x86_ops->get_cpl(vcpu);
4281 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4282 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4287 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4288 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4292 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4293 cseg_desc.type &= ~(1 << 1); //clear the B flag
4294 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4297 if (reason == TASK_SWITCH_IRET) {
4298 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4299 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4302 /* set back link to prev task only if NT bit is set in eflags
4303 note that old_tss_sel is not used afetr this point */
4304 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4305 old_tss_sel = 0xffff;
4307 /* set back link to prev task only if NT bit is set in eflags
4308 note that old_tss_sel is not used afetr this point */
4309 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4310 old_tss_sel = 0xffff;
4312 if (nseg_desc.type & 8)
4313 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4314 old_tss_base, &nseg_desc);
4316 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4317 old_tss_base, &nseg_desc);
4319 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4320 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4321 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4324 if (reason != TASK_SWITCH_IRET) {
4325 nseg_desc.type |= (1 << 1);
4326 save_guest_segment_descriptor(vcpu, tss_selector,
4330 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4331 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4333 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4337 EXPORT_SYMBOL_GPL(kvm_task_switch);
4339 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4340 struct kvm_sregs *sregs)
4342 int mmu_reset_needed = 0;
4343 int pending_vec, max_bits;
4344 struct descriptor_table dt;
4348 dt.limit = sregs->idt.limit;
4349 dt.base = sregs->idt.base;
4350 kvm_x86_ops->set_idt(vcpu, &dt);
4351 dt.limit = sregs->gdt.limit;
4352 dt.base = sregs->gdt.base;
4353 kvm_x86_ops->set_gdt(vcpu, &dt);
4355 vcpu->arch.cr2 = sregs->cr2;
4356 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4358 down_read(&vcpu->kvm->slots_lock);
4359 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4360 vcpu->arch.cr3 = sregs->cr3;
4362 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4363 up_read(&vcpu->kvm->slots_lock);
4365 kvm_set_cr8(vcpu, sregs->cr8);
4367 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4368 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4369 kvm_set_apic_base(vcpu, sregs->apic_base);
4371 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4373 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4374 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4375 vcpu->arch.cr0 = sregs->cr0;
4377 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4378 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4379 if (!is_long_mode(vcpu) && is_pae(vcpu))
4380 load_pdptrs(vcpu, vcpu->arch.cr3);
4382 if (mmu_reset_needed)
4383 kvm_mmu_reset_context(vcpu);
4385 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4386 pending_vec = find_first_bit(
4387 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4388 if (pending_vec < max_bits) {
4389 kvm_queue_interrupt(vcpu, pending_vec, false);
4390 pr_debug("Set back pending irq %d\n", pending_vec);
4391 if (irqchip_in_kernel(vcpu->kvm))
4392 kvm_pic_clear_isr_ack(vcpu->kvm);
4395 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4396 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4397 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4398 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4399 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4400 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4402 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4403 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4405 /* Older userspace won't unhalt the vcpu on reset. */
4406 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4407 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4408 !(vcpu->arch.cr0 & X86_CR0_PE))
4409 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4416 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4417 struct kvm_guest_debug *dbg)
4423 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4424 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4425 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4426 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4427 vcpu->arch.switch_db_regs =
4428 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4430 for (i = 0; i < KVM_NR_DB_REGS; i++)
4431 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4432 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4435 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4437 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4438 kvm_queue_exception(vcpu, DB_VECTOR);
4439 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4440 kvm_queue_exception(vcpu, BP_VECTOR);
4448 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4449 * we have asm/x86/processor.h
4460 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4461 #ifdef CONFIG_X86_64
4462 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4464 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4469 * Translate a guest virtual address to a guest physical address.
4471 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4472 struct kvm_translation *tr)
4474 unsigned long vaddr = tr->linear_address;
4478 down_read(&vcpu->kvm->slots_lock);
4479 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4480 up_read(&vcpu->kvm->slots_lock);
4481 tr->physical_address = gpa;
4482 tr->valid = gpa != UNMAPPED_GVA;
4490 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4492 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4496 memcpy(fpu->fpr, fxsave->st_space, 128);
4497 fpu->fcw = fxsave->cwd;
4498 fpu->fsw = fxsave->swd;
4499 fpu->ftwx = fxsave->twd;
4500 fpu->last_opcode = fxsave->fop;
4501 fpu->last_ip = fxsave->rip;
4502 fpu->last_dp = fxsave->rdp;
4503 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4510 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4512 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4516 memcpy(fxsave->st_space, fpu->fpr, 128);
4517 fxsave->cwd = fpu->fcw;
4518 fxsave->swd = fpu->fsw;
4519 fxsave->twd = fpu->ftwx;
4520 fxsave->fop = fpu->last_opcode;
4521 fxsave->rip = fpu->last_ip;
4522 fxsave->rdp = fpu->last_dp;
4523 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4530 void fx_init(struct kvm_vcpu *vcpu)
4532 unsigned after_mxcsr_mask;
4535 * Touch the fpu the first time in non atomic context as if
4536 * this is the first fpu instruction the exception handler
4537 * will fire before the instruction returns and it'll have to
4538 * allocate ram with GFP_KERNEL.
4541 kvm_fx_save(&vcpu->arch.host_fx_image);
4543 /* Initialize guest FPU by resetting ours and saving into guest's */
4545 kvm_fx_save(&vcpu->arch.host_fx_image);
4547 kvm_fx_save(&vcpu->arch.guest_fx_image);
4548 kvm_fx_restore(&vcpu->arch.host_fx_image);
4551 vcpu->arch.cr0 |= X86_CR0_ET;
4552 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4553 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4554 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4555 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4557 EXPORT_SYMBOL_GPL(fx_init);
4559 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4561 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4564 vcpu->guest_fpu_loaded = 1;
4565 kvm_fx_save(&vcpu->arch.host_fx_image);
4566 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4568 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4570 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4572 if (!vcpu->guest_fpu_loaded)
4575 vcpu->guest_fpu_loaded = 0;
4576 kvm_fx_save(&vcpu->arch.guest_fx_image);
4577 kvm_fx_restore(&vcpu->arch.host_fx_image);
4578 ++vcpu->stat.fpu_reload;
4580 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4582 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4584 if (vcpu->arch.time_page) {
4585 kvm_release_page_dirty(vcpu->arch.time_page);
4586 vcpu->arch.time_page = NULL;
4589 kvm_x86_ops->vcpu_free(vcpu);
4592 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4595 return kvm_x86_ops->vcpu_create(kvm, id);
4598 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4602 /* We do fxsave: this must be aligned. */
4603 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4605 vcpu->arch.mtrr_state.have_fixed = 1;
4607 r = kvm_arch_vcpu_reset(vcpu);
4609 r = kvm_mmu_setup(vcpu);
4616 kvm_x86_ops->vcpu_free(vcpu);
4620 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4623 kvm_mmu_unload(vcpu);
4626 kvm_x86_ops->vcpu_free(vcpu);
4629 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4631 vcpu->arch.nmi_pending = false;
4632 vcpu->arch.nmi_injected = false;
4634 vcpu->arch.switch_db_regs = 0;
4635 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4636 vcpu->arch.dr6 = DR6_FIXED_1;
4637 vcpu->arch.dr7 = DR7_FIXED_1;
4639 return kvm_x86_ops->vcpu_reset(vcpu);
4642 void kvm_arch_hardware_enable(void *garbage)
4644 kvm_x86_ops->hardware_enable(garbage);
4647 void kvm_arch_hardware_disable(void *garbage)
4649 kvm_x86_ops->hardware_disable(garbage);
4652 int kvm_arch_hardware_setup(void)
4654 return kvm_x86_ops->hardware_setup();
4657 void kvm_arch_hardware_unsetup(void)
4659 kvm_x86_ops->hardware_unsetup();
4662 void kvm_arch_check_processor_compat(void *rtn)
4664 kvm_x86_ops->check_processor_compatibility(rtn);
4667 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4673 BUG_ON(vcpu->kvm == NULL);
4676 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4677 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4678 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4680 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4682 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4687 vcpu->arch.pio_data = page_address(page);
4689 r = kvm_mmu_create(vcpu);
4691 goto fail_free_pio_data;
4693 if (irqchip_in_kernel(kvm)) {
4694 r = kvm_create_lapic(vcpu);
4696 goto fail_mmu_destroy;
4699 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4701 if (!vcpu->arch.mce_banks) {
4703 goto fail_mmu_destroy;
4705 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4710 kvm_mmu_destroy(vcpu);
4712 free_page((unsigned long)vcpu->arch.pio_data);
4717 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4719 kvm_free_lapic(vcpu);
4720 down_read(&vcpu->kvm->slots_lock);
4721 kvm_mmu_destroy(vcpu);
4722 up_read(&vcpu->kvm->slots_lock);
4723 free_page((unsigned long)vcpu->arch.pio_data);
4726 struct kvm *kvm_arch_create_vm(void)
4728 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4731 return ERR_PTR(-ENOMEM);
4733 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4734 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4736 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4737 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4739 rdtscll(kvm->arch.vm_init_tsc);
4744 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4747 kvm_mmu_unload(vcpu);
4751 static void kvm_free_vcpus(struct kvm *kvm)
4754 struct kvm_vcpu *vcpu;
4757 * Unpin any mmu pages first.
4759 kvm_for_each_vcpu(i, vcpu, kvm)
4760 kvm_unload_vcpu_mmu(vcpu);
4761 kvm_for_each_vcpu(i, vcpu, kvm)
4762 kvm_arch_vcpu_free(vcpu);
4764 mutex_lock(&kvm->lock);
4765 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4766 kvm->vcpus[i] = NULL;
4768 atomic_set(&kvm->online_vcpus, 0);
4769 mutex_unlock(&kvm->lock);
4772 void kvm_arch_sync_events(struct kvm *kvm)
4774 kvm_free_all_assigned_devices(kvm);
4777 void kvm_arch_destroy_vm(struct kvm *kvm)
4779 kvm_iommu_unmap_guest(kvm);
4781 kfree(kvm->arch.vpic);
4782 kfree(kvm->arch.vioapic);
4783 kvm_free_vcpus(kvm);
4784 kvm_free_physmem(kvm);
4785 if (kvm->arch.apic_access_page)
4786 put_page(kvm->arch.apic_access_page);
4787 if (kvm->arch.ept_identity_pagetable)
4788 put_page(kvm->arch.ept_identity_pagetable);
4792 int kvm_arch_set_memory_region(struct kvm *kvm,
4793 struct kvm_userspace_memory_region *mem,
4794 struct kvm_memory_slot old,
4797 int npages = mem->memory_size >> PAGE_SHIFT;
4798 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4800 /*To keep backward compatibility with older userspace,
4801 *x86 needs to hanlde !user_alloc case.
4804 if (npages && !old.rmap) {
4805 unsigned long userspace_addr;
4807 down_write(¤t->mm->mmap_sem);
4808 userspace_addr = do_mmap(NULL, 0,
4810 PROT_READ | PROT_WRITE,
4811 MAP_PRIVATE | MAP_ANONYMOUS,
4813 up_write(¤t->mm->mmap_sem);
4815 if (IS_ERR((void *)userspace_addr))
4816 return PTR_ERR((void *)userspace_addr);
4818 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4819 spin_lock(&kvm->mmu_lock);
4820 memslot->userspace_addr = userspace_addr;
4821 spin_unlock(&kvm->mmu_lock);
4823 if (!old.user_alloc && old.rmap) {
4826 down_write(¤t->mm->mmap_sem);
4827 ret = do_munmap(current->mm, old.userspace_addr,
4828 old.npages * PAGE_SIZE);
4829 up_write(¤t->mm->mmap_sem);
4832 "kvm_vm_ioctl_set_memory_region: "
4833 "failed to munmap memory\n");
4838 spin_lock(&kvm->mmu_lock);
4839 if (!kvm->arch.n_requested_mmu_pages) {
4840 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4841 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4844 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4845 spin_unlock(&kvm->mmu_lock);
4846 kvm_flush_remote_tlbs(kvm);
4851 void kvm_arch_flush_shadow(struct kvm *kvm)
4853 kvm_mmu_zap_all(kvm);
4854 kvm_reload_remote_mmus(kvm);
4857 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4859 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4860 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4861 || vcpu->arch.nmi_pending;
4864 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4867 int cpu = vcpu->cpu;
4869 if (waitqueue_active(&vcpu->wq)) {
4870 wake_up_interruptible(&vcpu->wq);
4871 ++vcpu->stat.halt_wakeup;
4875 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4876 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4877 smp_send_reschedule(cpu);
4881 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4883 return kvm_x86_ops->interrupt_allowed(vcpu);
4886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);