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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  82                                     struct kvm_cpuid_entry2 __user *entries);
  83
  84 struct kvm_x86_ops *kvm_x86_ops;
  85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  86
  87 int ignore_msrs = 0;
  88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  89
  90 struct kvm_stats_debugfs_item debugfs_entries[] = {
  91         { "pf_fixed", VCPU_STAT(pf_fixed) },
  92         { "pf_guest", VCPU_STAT(pf_guest) },
  93         { "tlb_flush", VCPU_STAT(tlb_flush) },
  94         { "invlpg", VCPU_STAT(invlpg) },
  95         { "exits", VCPU_STAT(exits) },
  96         { "io_exits", VCPU_STAT(io_exits) },
  97         { "mmio_exits", VCPU_STAT(mmio_exits) },
  98         { "signal_exits", VCPU_STAT(signal_exits) },
  99         { "irq_window", VCPU_STAT(irq_window_exits) },
 100         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 101         { "halt_exits", VCPU_STAT(halt_exits) },
 102         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 103         { "hypercalls", VCPU_STAT(hypercalls) },
 104         { "request_irq", VCPU_STAT(request_irq_exits) },
 105         { "irq_exits", VCPU_STAT(irq_exits) },
 106         { "host_state_reload", VCPU_STAT(host_state_reload) },
 107         { "efer_reload", VCPU_STAT(efer_reload) },
 108         { "fpu_reload", VCPU_STAT(fpu_reload) },
 109         { "insn_emulation", VCPU_STAT(insn_emulation) },
 110         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 111         { "irq_injections", VCPU_STAT(irq_injections) },
 112         { "nmi_injections", VCPU_STAT(nmi_injections) },
 113         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 114         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 115         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 116         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 117         { "mmu_flooded", VM_STAT(mmu_flooded) },
 118         { "mmu_recycled", VM_STAT(mmu_recycled) },
 119         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 120         { "mmu_unsync", VM_STAT(mmu_unsync) },
 121         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 122         { "largepages", VM_STAT(lpages) },
 123         { NULL }
 124 };
 125
 126 unsigned long segment_base(u16 selector)
 127 {
 128         struct descriptor_table gdt;
 129         struct desc_struct *d;
 130         unsigned long table_base;
 131         unsigned long v;
 132
 133         if (selector == 0)
 134                 return 0;
 135
 136         kvm_get_gdt(&gdt);
 137         table_base = gdt.base;
 138
 139         if (selector & 4) {           /* from ldt */
 140                 u16 ldt_selector = kvm_read_ldt();
 141
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = get_desc_base(d);
 146 #ifdef CONFIG_X86_64
 147         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 148                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 149 #endif
 150         return v;
 151 }
 152 EXPORT_SYMBOL_GPL(segment_base);
 153
 154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 155 {
 156         if (irqchip_in_kernel(vcpu->kvm))
 157                 return vcpu->arch.apic_base;
 158         else
 159                 return vcpu->arch.apic_base;
 160 }
 161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 162
 163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 164 {
 165         /* TODO: reserve bits check */
 166         if (irqchip_in_kernel(vcpu->kvm))
 167                 kvm_lapic_set_base(vcpu, data);
 168         else
 169                 vcpu->arch.apic_base = data;
 170 }
 171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 172
 173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 174 {
 175         WARN_ON(vcpu->arch.exception.pending);
 176         vcpu->arch.exception.pending = true;
 177         vcpu->arch.exception.has_error_code = false;
 178         vcpu->arch.exception.nr = nr;
 179 }
 180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 181
 182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 183                            u32 error_code)
 184 {
 185         ++vcpu->stat.pf_guest;
 186
 187         if (vcpu->arch.exception.pending) {
 188                 switch(vcpu->arch.exception.nr) {
 189                 case DF_VECTOR:
 190                         /* triple fault -> shutdown */
 191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 192                         return;
 193                 case PF_VECTOR:
 194                         vcpu->arch.exception.nr = DF_VECTOR;
 195                         vcpu->arch.exception.error_code = 0;
 196                         return;
 197                 default:
 198                         /* replace previous exception with a new one in a hope
 199                            that instruction re-execution will regenerate lost
 200                            exception */
 201                         vcpu->arch.exception.pending = false;
 202                         break;
 203                 }
 204         }
 205         vcpu->arch.cr2 = addr;
 206         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 207 }
 208
 209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 210 {
 211         vcpu->arch.nmi_pending = 1;
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 214
 215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 216 {
 217         WARN_ON(vcpu->arch.exception.pending);
 218         vcpu->arch.exception.pending = true;
 219         vcpu->arch.exception.has_error_code = true;
 220         vcpu->arch.exception.nr = nr;
 221         vcpu->arch.exception.error_code = error_code;
 222 }
 223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 224
 225 /*
 226  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 227  * a #GP and return false.
 228  */
 229 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 230 {
 231         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 232                 return true;
 233         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 234         return false;
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 237
 238 /*
 239  * Load the pae pdptrs.  Return true is they are all valid.
 240  */
 241 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 242 {
 243         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 244         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 245         int i;
 246         int ret;
 247         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 248
 249         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 250                                   offset * sizeof(u64), sizeof(pdpte));
 251         if (ret < 0) {
 252                 ret = 0;
 253                 goto out;
 254         }
 255         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 256                 if (is_present_gpte(pdpte[i]) &&
 257                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 258                         ret = 0;
 259                         goto out;
 260                 }
 261         }
 262         ret = 1;
 263
 264         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 265         __set_bit(VCPU_EXREG_PDPTR,
 266                   (unsigned long *)&vcpu->arch.regs_avail);
 267         __set_bit(VCPU_EXREG_PDPTR,
 268                   (unsigned long *)&vcpu->arch.regs_dirty);
 269 out:
 270
 271         return ret;
 272 }
 273 EXPORT_SYMBOL_GPL(load_pdptrs);
 274
 275 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 276 {
 277         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 278         bool changed = true;
 279         int r;
 280
 281         if (is_long_mode(vcpu) || !is_pae(vcpu))
 282                 return false;
 283
 284         if (!test_bit(VCPU_EXREG_PDPTR,
 285                       (unsigned long *)&vcpu->arch.regs_avail))
 286                 return true;
 287
 288         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 289         if (r < 0)
 290                 goto out;
 291         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 292 out:
 293
 294         return changed;
 295 }
 296
 297 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 298 {
 299         if (cr0 & CR0_RESERVED_BITS) {
 300                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 301                        cr0, vcpu->arch.cr0);
 302                 kvm_inject_gp(vcpu, 0);
 303                 return;
 304         }
 305
 306         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 307                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 308                 kvm_inject_gp(vcpu, 0);
 309                 return;
 310         }
 311
 312         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 313                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 314                        "and a clear PE flag\n");
 315                 kvm_inject_gp(vcpu, 0);
 316                 return;
 317         }
 318
 319         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 320 #ifdef CONFIG_X86_64
 321                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 322                         int cs_db, cs_l;
 323
 324                         if (!is_pae(vcpu)) {
 325                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 326                                        "in long mode while PAE is disabled\n");
 327                                 kvm_inject_gp(vcpu, 0);
 328                                 return;
 329                         }
 330                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 331                         if (cs_l) {
 332                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 333                                        "in long mode while CS.L == 1\n");
 334                                 kvm_inject_gp(vcpu, 0);
 335                                 return;
 336
 337                         }
 338                 } else
 339 #endif
 340                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 341                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 342                                "reserved bits\n");
 343                         kvm_inject_gp(vcpu, 0);
 344                         return;
 345                 }
 346
 347         }
 348
 349         kvm_x86_ops->set_cr0(vcpu, cr0);
 350         vcpu->arch.cr0 = cr0;
 351
 352         kvm_mmu_reset_context(vcpu);
 353         return;
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 356
 357 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 358 {
 359         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_lmsw);
 362
 363 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 364 {
 365         unsigned long old_cr4 = vcpu->arch.cr4;
 366         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 367
 368         if (cr4 & CR4_RESERVED_BITS) {
 369                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 370                 kvm_inject_gp(vcpu, 0);
 371                 return;
 372         }
 373
 374         if (is_long_mode(vcpu)) {
 375                 if (!(cr4 & X86_CR4_PAE)) {
 376                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 377                                "in long mode\n");
 378                         kvm_inject_gp(vcpu, 0);
 379                         return;
 380                 }
 381         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 382                    && ((cr4 ^ old_cr4) & pdptr_bits)
 383                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 384                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 385                 kvm_inject_gp(vcpu, 0);
 386                 return;
 387         }
 388
 389         if (cr4 & X86_CR4_VMXE) {
 390                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 391                 kvm_inject_gp(vcpu, 0);
 392                 return;
 393         }
 394         kvm_x86_ops->set_cr4(vcpu, cr4);
 395         vcpu->arch.cr4 = cr4;
 396         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 397         kvm_mmu_reset_context(vcpu);
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 400
 401 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 402 {
 403         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 404                 kvm_mmu_sync_roots(vcpu);
 405                 kvm_mmu_flush_tlb(vcpu);
 406                 return;
 407         }
 408
 409         if (is_long_mode(vcpu)) {
 410                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 411                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 412                         kvm_inject_gp(vcpu, 0);
 413                         return;
 414                 }
 415         } else {
 416                 if (is_pae(vcpu)) {
 417                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 418                                 printk(KERN_DEBUG
 419                                        "set_cr3: #GP, reserved bits\n");
 420                                 kvm_inject_gp(vcpu, 0);
 421                                 return;
 422                         }
 423                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 424                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 425                                        "reserved bits\n");
 426                                 kvm_inject_gp(vcpu, 0);
 427                                 return;
 428                         }
 429                 }
 430                 /*
 431                  * We don't check reserved bits in nonpae mode, because
 432                  * this isn't enforced, and VMware depends on this.
 433                  */
 434         }
 435
 436         /*
 437          * Does the new cr3 value map to physical memory? (Note, we
 438          * catch an invalid cr3 even in real-mode, because it would
 439          * cause trouble later on when we turn on paging anyway.)
 440          *
 441          * A real CPU would silently accept an invalid cr3 and would
 442          * attempt to use it - with largely undefined (and often hard
 443          * to debug) behavior on the guest side.
 444          */
 445         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 446                 kvm_inject_gp(vcpu, 0);
 447         else {
 448                 vcpu->arch.cr3 = cr3;
 449                 vcpu->arch.mmu.new_cr3(vcpu);
 450         }
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 453
 454 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 455 {
 456         if (cr8 & CR8_RESERVED_BITS) {
 457                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 458                 kvm_inject_gp(vcpu, 0);
 459                 return;
 460         }
 461         if (irqchip_in_kernel(vcpu->kvm))
 462                 kvm_lapic_set_tpr(vcpu, cr8);
 463         else
 464                 vcpu->arch.cr8 = cr8;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 467
 468 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 469 {
 470         if (irqchip_in_kernel(vcpu->kvm))
 471                 return kvm_lapic_get_cr8(vcpu);
 472         else
 473                 return vcpu->arch.cr8;
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 476
 477 static inline u32 bit(int bitno)
 478 {
 479         return 1 << (bitno & 31);
 480 }
 481
 482 /*
 483  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 484  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 485  *
 486  * This list is modified at module load time to reflect the
 487  * capabilities of the host cpu.
 488  */
 489 static u32 msrs_to_save[] = {
 490         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 491         MSR_K6_STAR,
 492 #ifdef CONFIG_X86_64
 493         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 494 #endif
 495         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 496         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 497 };
 498
 499 static unsigned num_msrs_to_save;
 500
 501 static u32 emulated_msrs[] = {
 502         MSR_IA32_MISC_ENABLE,
 503 };
 504
 505 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 506 {
 507         if (efer & efer_reserved_bits) {
 508                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 509                        efer);
 510                 kvm_inject_gp(vcpu, 0);
 511                 return;
 512         }
 513
 514         if (is_paging(vcpu)
 515             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 516                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 517                 kvm_inject_gp(vcpu, 0);
 518                 return;
 519         }
 520
 521         if (efer & EFER_FFXSR) {
 522                 struct kvm_cpuid_entry2 *feat;
 523
 524                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 525                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 526                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 527                         kvm_inject_gp(vcpu, 0);
 528                         return;
 529                 }
 530         }
 531
 532         if (efer & EFER_SVME) {
 533                 struct kvm_cpuid_entry2 *feat;
 534
 535                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 536                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 537                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 538                         kvm_inject_gp(vcpu, 0);
 539                         return;
 540                 }
 541         }
 542
 543         kvm_x86_ops->set_efer(vcpu, efer);
 544
 545         efer &= ~EFER_LMA;
 546         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 547
 548         vcpu->arch.shadow_efer = efer;
 549
 550         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 551         kvm_mmu_reset_context(vcpu);
 552 }
 553
 554 void kvm_enable_efer_bits(u64 mask)
 555 {
 556        efer_reserved_bits &= ~mask;
 557 }
 558 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 559
 560
 561 /*
 562  * Writes msr value into into the appropriate "register".
 563  * Returns 0 on success, non-0 otherwise.
 564  * Assumes vcpu_load() was already called.
 565  */
 566 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 567 {
 568         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 569 }
 570
 571 /*
 572  * Adapt set_msr() to msr_io()'s calling convention
 573  */
 574 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 575 {
 576         return kvm_set_msr(vcpu, index, *data);
 577 }
 578
 579 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 580 {
 581         static int version;
 582         struct pvclock_wall_clock wc;
 583         struct timespec now, sys, boot;
 584
 585         if (!wall_clock)
 586                 return;
 587
 588         version++;
 589
 590         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 591
 592         /*
 593          * The guest calculates current wall clock time by adding
 594          * system time (updated by kvm_write_guest_time below) to the
 595          * wall clock specified here.  guest system time equals host
 596          * system time for us, thus we must fill in host boot time here.
 597          */
 598         now = current_kernel_time();
 599         ktime_get_ts(&sys);
 600         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 601
 602         wc.sec = boot.tv_sec;
 603         wc.nsec = boot.tv_nsec;
 604         wc.version = version;
 605
 606         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 607
 608         version++;
 609         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 610 }
 611
 612 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 613 {
 614         uint32_t quotient, remainder;
 615
 616         /* Don't try to replace with do_div(), this one calculates
 617          * "(dividend << 32) / divisor" */
 618         __asm__ ( "divl %4"
 619                   : "=a" (quotient), "=d" (remainder)
 620                   : "0" (0), "1" (dividend), "r" (divisor) );
 621         return quotient;
 622 }
 623
 624 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 625 {
 626         uint64_t nsecs = 1000000000LL;
 627         int32_t  shift = 0;
 628         uint64_t tps64;
 629         uint32_t tps32;
 630
 631         tps64 = tsc_khz * 1000LL;
 632         while (tps64 > nsecs*2) {
 633                 tps64 >>= 1;
 634                 shift--;
 635         }
 636
 637         tps32 = (uint32_t)tps64;
 638         while (tps32 <= (uint32_t)nsecs) {
 639                 tps32 <<= 1;
 640                 shift++;
 641         }
 642
 643         hv_clock->tsc_shift = shift;
 644         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 645
 646         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 647                  __func__, tsc_khz, hv_clock->tsc_shift,
 648                  hv_clock->tsc_to_system_mul);
 649 }
 650
 651 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 652
 653 static void kvm_write_guest_time(struct kvm_vcpu *v)
 654 {
 655         struct timespec ts;
 656         unsigned long flags;
 657         struct kvm_vcpu_arch *vcpu = &v->arch;
 658         void *shared_kaddr;
 659         unsigned long this_tsc_khz;
 660
 661         if ((!vcpu->time_page))
 662                 return;
 663
 664         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 665         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 666                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 667                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 668         }
 669         put_cpu_var(cpu_tsc_khz);
 670
 671         /* Keep irq disabled to prevent changes to the clock */
 672         local_irq_save(flags);
 673         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 674         ktime_get_ts(&ts);
 675         local_irq_restore(flags);
 676
 677         /* With all the info we got, fill in the values */
 678
 679         vcpu->hv_clock.system_time = ts.tv_nsec +
 680                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 681         /*
 682          * The interface expects us to write an even number signaling that the
 683          * update is finished. Since the guest won't see the intermediate
 684          * state, we just increase by 2 at the end.
 685          */
 686         vcpu->hv_clock.version += 2;
 687
 688         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 689
 690         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 691                sizeof(vcpu->hv_clock));
 692
 693         kunmap_atomic(shared_kaddr, KM_USER0);
 694
 695         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 696 }
 697
 698 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 699 {
 700         struct kvm_vcpu_arch *vcpu = &v->arch;
 701
 702         if (!vcpu->time_page)
 703                 return 0;
 704         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 705         return 1;
 706 }
 707
 708 static bool msr_mtrr_valid(unsigned msr)
 709 {
 710         switch (msr) {
 711         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 712         case MSR_MTRRfix64K_00000:
 713         case MSR_MTRRfix16K_80000:
 714         case MSR_MTRRfix16K_A0000:
 715         case MSR_MTRRfix4K_C0000:
 716         case MSR_MTRRfix4K_C8000:
 717         case MSR_MTRRfix4K_D0000:
 718         case MSR_MTRRfix4K_D8000:
 719         case MSR_MTRRfix4K_E0000:
 720         case MSR_MTRRfix4K_E8000:
 721         case MSR_MTRRfix4K_F0000:
 722         case MSR_MTRRfix4K_F8000:
 723         case MSR_MTRRdefType:
 724         case MSR_IA32_CR_PAT:
 725                 return true;
 726         case 0x2f8:
 727                 return true;
 728         }
 729         return false;
 730 }
 731
 732 static bool valid_pat_type(unsigned t)
 733 {
 734         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 735 }
 736
 737 static bool valid_mtrr_type(unsigned t)
 738 {
 739         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 740 }
 741
 742 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 743 {
 744         int i;
 745
 746         if (!msr_mtrr_valid(msr))
 747                 return false;
 748
 749         if (msr == MSR_IA32_CR_PAT) {
 750                 for (i = 0; i < 8; i++)
 751                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 752                                 return false;
 753                 return true;
 754         } else if (msr == MSR_MTRRdefType) {
 755                 if (data & ~0xcff)
 756                         return false;
 757                 return valid_mtrr_type(data & 0xff);
 758         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 759                 for (i = 0; i < 8 ; i++)
 760                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 761                                 return false;
 762                 return true;
 763         }
 764
 765         /* variable MTRRs */
 766         return valid_mtrr_type(data & 0xff);
 767 }
 768
 769 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 770 {
 771         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 772
 773         if (!mtrr_valid(vcpu, msr, data))
 774                 return 1;
 775
 776         if (msr == MSR_MTRRdefType) {
 777                 vcpu->arch.mtrr_state.def_type = data;
 778                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 779         } else if (msr == MSR_MTRRfix64K_00000)
 780                 p[0] = data;
 781         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 782                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 783         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 784                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 785         else if (msr == MSR_IA32_CR_PAT)
 786                 vcpu->arch.pat = data;
 787         else {  /* Variable MTRRs */
 788                 int idx, is_mtrr_mask;
 789                 u64 *pt;
 790
 791                 idx = (msr - 0x200) / 2;
 792                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 793                 if (!is_mtrr_mask)
 794                         pt =
 795                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 796                 else
 797                         pt =
 798                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 799                 *pt = data;
 800         }
 801
 802         kvm_mmu_reset_context(vcpu);
 803         return 0;
 804 }
 805
 806 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 807 {
 808         u64 mcg_cap = vcpu->arch.mcg_cap;
 809         unsigned bank_num = mcg_cap & 0xff;
 810
 811         switch (msr) {
 812         case MSR_IA32_MCG_STATUS:
 813                 vcpu->arch.mcg_status = data;
 814                 break;
 815         case MSR_IA32_MCG_CTL:
 816                 if (!(mcg_cap & MCG_CTL_P))
 817                         return 1;
 818                 if (data != 0 && data != ~(u64)0)
 819                         return -1;
 820                 vcpu->arch.mcg_ctl = data;
 821                 break;
 822         default:
 823                 if (msr >= MSR_IA32_MC0_CTL &&
 824                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 825                         u32 offset = msr - MSR_IA32_MC0_CTL;
 826                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 827                         if ((offset & 0x3) == 0 &&
 828                             data != 0 && data != ~(u64)0)
 829                                 return -1;
 830                         vcpu->arch.mce_banks[offset] = data;
 831                         break;
 832                 }
 833                 return 1;
 834         }
 835         return 0;
 836 }
 837
 838 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 839 {
 840         switch (msr) {
 841         case MSR_EFER:
 842                 set_efer(vcpu, data);
 843                 break;
 844         case MSR_K7_HWCR:
 845                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 846                 if (data != 0) {
 847                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 848                                 data);
 849                         return 1;
 850                 }
 851                 break;
 852         case MSR_FAM10H_MMIO_CONF_BASE:
 853                 if (data != 0) {
 854                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 855                                 "0x%llx\n", data);
 856                         return 1;
 857                 }
 858                 break;
 859         case MSR_AMD64_NB_CFG:
 860                 break;
 861         case MSR_IA32_DEBUGCTLMSR:
 862                 if (!data) {
 863                         /* We support the non-activated case already */
 864                         break;
 865                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 866                         /* Values other than LBR and BTF are vendor-specific,
 867                            thus reserved and should throw a #GP */
 868                         return 1;
 869                 }
 870                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 871                         __func__, data);
 872                 break;
 873         case MSR_IA32_UCODE_REV:
 874         case MSR_IA32_UCODE_WRITE:
 875         case MSR_VM_HSAVE_PA:
 876         case MSR_AMD64_PATCH_LOADER:
 877                 break;
 878         case 0x200 ... 0x2ff:
 879                 return set_msr_mtrr(vcpu, msr, data);
 880         case MSR_IA32_APICBASE:
 881                 kvm_set_apic_base(vcpu, data);
 882                 break;
 883         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 884                 return kvm_x2apic_msr_write(vcpu, msr, data);
 885         case MSR_IA32_MISC_ENABLE:
 886                 vcpu->arch.ia32_misc_enable_msr = data;
 887                 break;
 888         case MSR_KVM_WALL_CLOCK:
 889                 vcpu->kvm->arch.wall_clock = data;
 890                 kvm_write_wall_clock(vcpu->kvm, data);
 891                 break;
 892         case MSR_KVM_SYSTEM_TIME: {
 893                 if (vcpu->arch.time_page) {
 894                         kvm_release_page_dirty(vcpu->arch.time_page);
 895                         vcpu->arch.time_page = NULL;
 896                 }
 897
 898                 vcpu->arch.time = data;
 899
 900                 /* we verify if the enable bit is set... */
 901                 if (!(data & 1))
 902                         break;
 903
 904                 /* ...but clean it before doing the actual write */
 905                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 906
 907                 vcpu->arch.time_page =
 908                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 909
 910                 if (is_error_page(vcpu->arch.time_page)) {
 911                         kvm_release_page_clean(vcpu->arch.time_page);
 912                         vcpu->arch.time_page = NULL;
 913                 }
 914
 915                 kvm_request_guest_time_update(vcpu);
 916                 break;
 917         }
 918         case MSR_IA32_MCG_CTL:
 919         case MSR_IA32_MCG_STATUS:
 920         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 921                 return set_msr_mce(vcpu, msr, data);
 922
 923         /* Performance counters are not protected by a CPUID bit,
 924          * so we should check all of them in the generic path for the sake of
 925          * cross vendor migration.
 926          * Writing a zero into the event select MSRs disables them,
 927          * which we perfectly emulate ;-). Any other value should be at least
 928          * reported, some guests depend on them.
 929          */
 930         case MSR_P6_EVNTSEL0:
 931         case MSR_P6_EVNTSEL1:
 932         case MSR_K7_EVNTSEL0:
 933         case MSR_K7_EVNTSEL1:
 934         case MSR_K7_EVNTSEL2:
 935         case MSR_K7_EVNTSEL3:
 936                 if (data != 0)
 937                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 938                                 "0x%x data 0x%llx\n", msr, data);
 939                 break;
 940         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 941          * so we ignore writes to make it happy.
 942          */
 943         case MSR_P6_PERFCTR0:
 944         case MSR_P6_PERFCTR1:
 945         case MSR_K7_PERFCTR0:
 946         case MSR_K7_PERFCTR1:
 947         case MSR_K7_PERFCTR2:
 948         case MSR_K7_PERFCTR3:
 949                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 950                         "0x%x data 0x%llx\n", msr, data);
 951                 break;
 952         default:
 953                 if (!ignore_msrs) {
 954                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 955                                 msr, data);
 956                         return 1;
 957                 } else {
 958                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 959                                 msr, data);
 960                         break;
 961                 }
 962         }
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 966
 967
 968 /*
 969  * Reads an msr value (of 'msr_index') into 'pdata'.
 970  * Returns 0 on success, non-0 otherwise.
 971  * Assumes vcpu_load() was already called.
 972  */
 973 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 974 {
 975         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 976 }
 977
 978 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 979 {
 980         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 981
 982         if (!msr_mtrr_valid(msr))
 983                 return 1;
 984
 985         if (msr == MSR_MTRRdefType)
 986                 *pdata = vcpu->arch.mtrr_state.def_type +
 987                          (vcpu->arch.mtrr_state.enabled << 10);
 988         else if (msr == MSR_MTRRfix64K_00000)
 989                 *pdata = p[0];
 990         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 991                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 992         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 993                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 994         else if (msr == MSR_IA32_CR_PAT)
 995                 *pdata = vcpu->arch.pat;
 996         else {  /* Variable MTRRs */
 997                 int idx, is_mtrr_mask;
 998                 u64 *pt;
 999
1000                 idx = (msr - 0x200) / 2;
1001                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1002                 if (!is_mtrr_mask)
1003                         pt =
1004                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1005                 else
1006                         pt =
1007                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1008                 *pdata = *pt;
1009         }
1010
1011         return 0;
1012 }
1013
1014 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1015 {
1016         u64 data;
1017         u64 mcg_cap = vcpu->arch.mcg_cap;
1018         unsigned bank_num = mcg_cap & 0xff;
1019
1020         switch (msr) {
1021         case MSR_IA32_P5_MC_ADDR:
1022         case MSR_IA32_P5_MC_TYPE:
1023                 data = 0;
1024                 break;
1025         case MSR_IA32_MCG_CAP:
1026                 data = vcpu->arch.mcg_cap;
1027                 break;
1028         case MSR_IA32_MCG_CTL:
1029                 if (!(mcg_cap & MCG_CTL_P))
1030                         return 1;
1031                 data = vcpu->arch.mcg_ctl;
1032                 break;
1033         case MSR_IA32_MCG_STATUS:
1034                 data = vcpu->arch.mcg_status;
1035                 break;
1036         default:
1037                 if (msr >= MSR_IA32_MC0_CTL &&
1038                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1039                         u32 offset = msr - MSR_IA32_MC0_CTL;
1040                         data = vcpu->arch.mce_banks[offset];
1041                         break;
1042                 }
1043                 return 1;
1044         }
1045         *pdata = data;
1046         return 0;
1047 }
1048
1049 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1050 {
1051         u64 data;
1052
1053         switch (msr) {
1054         case MSR_IA32_PLATFORM_ID:
1055         case MSR_IA32_UCODE_REV:
1056         case MSR_IA32_EBL_CR_POWERON:
1057         case MSR_IA32_DEBUGCTLMSR:
1058         case MSR_IA32_LASTBRANCHFROMIP:
1059         case MSR_IA32_LASTBRANCHTOIP:
1060         case MSR_IA32_LASTINTFROMIP:
1061         case MSR_IA32_LASTINTTOIP:
1062         case MSR_K8_SYSCFG:
1063         case MSR_K7_HWCR:
1064         case MSR_VM_HSAVE_PA:
1065         case MSR_P6_PERFCTR0:
1066         case MSR_P6_PERFCTR1:
1067         case MSR_P6_EVNTSEL0:
1068         case MSR_P6_EVNTSEL1:
1069         case MSR_K7_EVNTSEL0:
1070         case MSR_K7_PERFCTR0:
1071         case MSR_K8_INT_PENDING_MSG:
1072         case MSR_AMD64_NB_CFG:
1073         case MSR_FAM10H_MMIO_CONF_BASE:
1074                 data = 0;
1075                 break;
1076         case MSR_MTRRcap:
1077                 data = 0x500 | KVM_NR_VAR_MTRR;
1078                 break;
1079         case 0x200 ... 0x2ff:
1080                 return get_msr_mtrr(vcpu, msr, pdata);
1081         case 0xcd: /* fsb frequency */
1082                 data = 3;
1083                 break;
1084         case MSR_IA32_APICBASE:
1085                 data = kvm_get_apic_base(vcpu);
1086                 break;
1087         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1088                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1089                 break;
1090         case MSR_IA32_MISC_ENABLE:
1091                 data = vcpu->arch.ia32_misc_enable_msr;
1092                 break;
1093         case MSR_IA32_PERF_STATUS:
1094                 /* TSC increment by tick */
1095                 data = 1000ULL;
1096                 /* CPU multiplier */
1097                 data |= (((uint64_t)4ULL) << 40);
1098                 break;
1099         case MSR_EFER:
1100                 data = vcpu->arch.shadow_efer;
1101                 break;
1102         case MSR_KVM_WALL_CLOCK:
1103                 data = vcpu->kvm->arch.wall_clock;
1104                 break;
1105         case MSR_KVM_SYSTEM_TIME:
1106                 data = vcpu->arch.time;
1107                 break;
1108         case MSR_IA32_P5_MC_ADDR:
1109         case MSR_IA32_P5_MC_TYPE:
1110         case MSR_IA32_MCG_CAP:
1111         case MSR_IA32_MCG_CTL:
1112         case MSR_IA32_MCG_STATUS:
1113         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1114                 return get_msr_mce(vcpu, msr, pdata);
1115         default:
1116                 if (!ignore_msrs) {
1117                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1118                         return 1;
1119                 } else {
1120                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1121                         data = 0;
1122                 }
1123                 break;
1124         }
1125         *pdata = data;
1126         return 0;
1127 }
1128 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1129
1130 /*
1131  * Read or write a bunch of msrs. All parameters are kernel addresses.
1132  *
1133  * @return number of msrs set successfully.
1134  */
1135 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1136                     struct kvm_msr_entry *entries,
1137                     int (*do_msr)(struct kvm_vcpu *vcpu,
1138                                   unsigned index, u64 *data))
1139 {
1140         int i;
1141
1142         vcpu_load(vcpu);
1143
1144         down_read(&vcpu->kvm->slots_lock);
1145         for (i = 0; i < msrs->nmsrs; ++i)
1146                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1147                         break;
1148         up_read(&vcpu->kvm->slots_lock);
1149
1150         vcpu_put(vcpu);
1151
1152         return i;
1153 }
1154
1155 /*
1156  * Read or write a bunch of msrs. Parameters are user addresses.
1157  *
1158  * @return number of msrs set successfully.
1159  */
1160 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1161                   int (*do_msr)(struct kvm_vcpu *vcpu,
1162                                 unsigned index, u64 *data),
1163                   int writeback)
1164 {
1165         struct kvm_msrs msrs;
1166         struct kvm_msr_entry *entries;
1167         int r, n;
1168         unsigned size;
1169
1170         r = -EFAULT;
1171         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1172                 goto out;
1173
1174         r = -E2BIG;
1175         if (msrs.nmsrs >= MAX_IO_MSRS)
1176                 goto out;
1177
1178         r = -ENOMEM;
1179         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1180         entries = vmalloc(size);
1181         if (!entries)
1182                 goto out;
1183
1184         r = -EFAULT;
1185         if (copy_from_user(entries, user_msrs->entries, size))
1186                 goto out_free;
1187
1188         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1189         if (r < 0)
1190                 goto out_free;
1191
1192         r = -EFAULT;
1193         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1194                 goto out_free;
1195
1196         r = n;
1197
1198 out_free:
1199         vfree(entries);
1200 out:
1201         return r;
1202 }
1203
1204 int kvm_dev_ioctl_check_extension(long ext)
1205 {
1206         int r;
1207
1208         switch (ext) {
1209         case KVM_CAP_IRQCHIP:
1210         case KVM_CAP_HLT:
1211         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1212         case KVM_CAP_SET_TSS_ADDR:
1213         case KVM_CAP_EXT_CPUID:
1214         case KVM_CAP_CLOCKSOURCE:
1215         case KVM_CAP_PIT:
1216         case KVM_CAP_NOP_IO_DELAY:
1217         case KVM_CAP_MP_STATE:
1218         case KVM_CAP_SYNC_MMU:
1219         case KVM_CAP_REINJECT_CONTROL:
1220         case KVM_CAP_IRQ_INJECT_STATUS:
1221         case KVM_CAP_ASSIGN_DEV_IRQ:
1222         case KVM_CAP_IRQFD:
1223         case KVM_CAP_IOEVENTFD:
1224         case KVM_CAP_PIT2:
1225         case KVM_CAP_PIT_STATE2:
1226         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1227                 r = 1;
1228                 break;
1229         case KVM_CAP_COALESCED_MMIO:
1230                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1231                 break;
1232         case KVM_CAP_VAPIC:
1233                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1234                 break;
1235         case KVM_CAP_NR_VCPUS:
1236                 r = KVM_MAX_VCPUS;
1237                 break;
1238         case KVM_CAP_NR_MEMSLOTS:
1239                 r = KVM_MEMORY_SLOTS;
1240                 break;
1241         case KVM_CAP_PV_MMU:
1242                 r = !tdp_enabled;
1243                 break;
1244         case KVM_CAP_IOMMU:
1245                 r = iommu_found();
1246                 break;
1247         case KVM_CAP_MCE:
1248                 r = KVM_MAX_MCE_BANKS;
1249                 break;
1250         default:
1251                 r = 0;
1252                 break;
1253         }
1254         return r;
1255
1256 }
1257
1258 long kvm_arch_dev_ioctl(struct file *filp,
1259                         unsigned int ioctl, unsigned long arg)
1260 {
1261         void __user *argp = (void __user *)arg;
1262         long r;
1263
1264         switch (ioctl) {
1265         case KVM_GET_MSR_INDEX_LIST: {
1266                 struct kvm_msr_list __user *user_msr_list = argp;
1267                 struct kvm_msr_list msr_list;
1268                 unsigned n;
1269
1270                 r = -EFAULT;
1271                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1272                         goto out;
1273                 n = msr_list.nmsrs;
1274                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1275                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1276                         goto out;
1277                 r = -E2BIG;
1278                 if (n < msr_list.nmsrs)
1279                         goto out;
1280                 r = -EFAULT;
1281                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1282                                  num_msrs_to_save * sizeof(u32)))
1283                         goto out;
1284                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1285                                  &emulated_msrs,
1286                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1287                         goto out;
1288                 r = 0;
1289                 break;
1290         }
1291         case KVM_GET_SUPPORTED_CPUID: {
1292                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1293                 struct kvm_cpuid2 cpuid;
1294
1295                 r = -EFAULT;
1296                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1297                         goto out;
1298                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1299                                                       cpuid_arg->entries);
1300                 if (r)
1301                         goto out;
1302
1303                 r = -EFAULT;
1304                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1305                         goto out;
1306                 r = 0;
1307                 break;
1308         }
1309         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1310                 u64 mce_cap;
1311
1312                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1313                 r = -EFAULT;
1314                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1315                         goto out;
1316                 r = 0;
1317                 break;
1318         }
1319         default:
1320                 r = -EINVAL;
1321         }
1322 out:
1323         return r;
1324 }
1325
1326 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1327 {
1328         kvm_x86_ops->vcpu_load(vcpu, cpu);
1329         kvm_request_guest_time_update(vcpu);
1330 }
1331
1332 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1333 {
1334         kvm_x86_ops->vcpu_put(vcpu);
1335         kvm_put_guest_fpu(vcpu);
1336 }
1337
1338 static int is_efer_nx(void)
1339 {
1340         unsigned long long efer = 0;
1341
1342         rdmsrl_safe(MSR_EFER, &efer);
1343         return efer & EFER_NX;
1344 }
1345
1346 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1347 {
1348         int i;
1349         struct kvm_cpuid_entry2 *e, *entry;
1350
1351         entry = NULL;
1352         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1353                 e = &vcpu->arch.cpuid_entries[i];
1354                 if (e->function == 0x80000001) {
1355                         entry = e;
1356                         break;
1357                 }
1358         }
1359         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1360                 entry->edx &= ~(1 << 20);
1361                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1362         }
1363 }
1364
1365 /* when an old userspace process fills a new kernel module */
1366 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1367                                     struct kvm_cpuid *cpuid,
1368                                     struct kvm_cpuid_entry __user *entries)
1369 {
1370         int r, i;
1371         struct kvm_cpuid_entry *cpuid_entries;
1372
1373         r = -E2BIG;
1374         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1375                 goto out;
1376         r = -ENOMEM;
1377         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1378         if (!cpuid_entries)
1379                 goto out;
1380         r = -EFAULT;
1381         if (copy_from_user(cpuid_entries, entries,
1382                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1383                 goto out_free;
1384         for (i = 0; i < cpuid->nent; i++) {
1385                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1386                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1387                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1388                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1389                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1390                 vcpu->arch.cpuid_entries[i].index = 0;
1391                 vcpu->arch.cpuid_entries[i].flags = 0;
1392                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1393                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1394                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1395         }
1396         vcpu->arch.cpuid_nent = cpuid->nent;
1397         cpuid_fix_nx_cap(vcpu);
1398         r = 0;
1399         kvm_apic_set_version(vcpu);
1400
1401 out_free:
1402         vfree(cpuid_entries);
1403 out:
1404         return r;
1405 }
1406
1407 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1408                                      struct kvm_cpuid2 *cpuid,
1409                                      struct kvm_cpuid_entry2 __user *entries)
1410 {
1411         int r;
1412
1413         r = -E2BIG;
1414         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1415                 goto out;
1416         r = -EFAULT;
1417         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1418                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1419                 goto out;
1420         vcpu->arch.cpuid_nent = cpuid->nent;
1421         kvm_apic_set_version(vcpu);
1422         return 0;
1423
1424 out:
1425         return r;
1426 }
1427
1428 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1429                                      struct kvm_cpuid2 *cpuid,
1430                                      struct kvm_cpuid_entry2 __user *entries)
1431 {
1432         int r;
1433
1434         r = -E2BIG;
1435         if (cpuid->nent < vcpu->arch.cpuid_nent)
1436                 goto out;
1437         r = -EFAULT;
1438         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1439                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1440                 goto out;
1441         return 0;
1442
1443 out:
1444         cpuid->nent = vcpu->arch.cpuid_nent;
1445         return r;
1446 }
1447
1448 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1449                            u32 index)
1450 {
1451         entry->function = function;
1452         entry->index = index;
1453         cpuid_count(entry->function, entry->index,
1454                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1455         entry->flags = 0;
1456 }
1457
1458 #define F(x) bit(X86_FEATURE_##x)
1459
1460 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1461                          u32 index, int *nent, int maxnent)
1462 {
1463         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1464         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1465 #ifdef CONFIG_X86_64
1466         unsigned f_lm = F(LM);
1467 #else
1468         unsigned f_lm = 0;
1469 #endif
1470
1471         /* cpuid 1.edx */
1472         const u32 kvm_supported_word0_x86_features =
1473                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1474                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1475                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1476                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1477                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1478                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1479                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1480                 0 /* HTT, TM, Reserved, PBE */;
1481         /* cpuid 0x80000001.edx */
1482         const u32 kvm_supported_word1_x86_features =
1483                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1484                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1485                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1486                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1487                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1488                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1489                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1490                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1491         /* cpuid 1.ecx */
1492         const u32 kvm_supported_word4_x86_features =
1493                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1494                 0 /* DS-CPL, VMX, SMX, EST */ |
1495                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1496                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1497                 0 /* Reserved, DCA */ | F(XMM4_1) |
1498                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1499                 0 /* Reserved, XSAVE, OSXSAVE */;
1500         /* cpuid 0x80000001.ecx */
1501         const u32 kvm_supported_word6_x86_features =
1502                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1503                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1504                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1505                 0 /* SKINIT */ | 0 /* WDT */;
1506
1507         /* all calls to cpuid_count() should be made on the same cpu */
1508         get_cpu();
1509         do_cpuid_1_ent(entry, function, index);
1510         ++*nent;
1511
1512         switch (function) {
1513         case 0:
1514                 entry->eax = min(entry->eax, (u32)0xb);
1515                 break;
1516         case 1:
1517                 entry->edx &= kvm_supported_word0_x86_features;
1518                 entry->ecx &= kvm_supported_word4_x86_features;
1519                 /* we support x2apic emulation even if host does not support
1520                  * it since we emulate x2apic in software */
1521                 entry->ecx |= F(X2APIC);
1522                 break;
1523         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1524          * may return different values. This forces us to get_cpu() before
1525          * issuing the first command, and also to emulate this annoying behavior
1526          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1527         case 2: {
1528                 int t, times = entry->eax & 0xff;
1529
1530                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1531                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1532                 for (t = 1; t < times && *nent < maxnent; ++t) {
1533                         do_cpuid_1_ent(&entry[t], function, 0);
1534                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1535                         ++*nent;
1536                 }
1537                 break;
1538         }
1539         /* function 4 and 0xb have additional index. */
1540         case 4: {
1541                 int i, cache_type;
1542
1543                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1544                 /* read more entries until cache_type is zero */
1545                 for (i = 1; *nent < maxnent; ++i) {
1546                         cache_type = entry[i - 1].eax & 0x1f;
1547                         if (!cache_type)
1548                                 break;
1549                         do_cpuid_1_ent(&entry[i], function, i);
1550                         entry[i].flags |=
1551                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1552                         ++*nent;
1553                 }
1554                 break;
1555         }
1556         case 0xb: {
1557                 int i, level_type;
1558
1559                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1560                 /* read more entries until level_type is zero */
1561                 for (i = 1; *nent < maxnent; ++i) {
1562                         level_type = entry[i - 1].ecx & 0xff00;
1563                         if (!level_type)
1564                                 break;
1565                         do_cpuid_1_ent(&entry[i], function, i);
1566                         entry[i].flags |=
1567                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1568                         ++*nent;
1569                 }
1570                 break;
1571         }
1572         case 0x80000000:
1573                 entry->eax = min(entry->eax, 0x8000001a);
1574                 break;
1575         case 0x80000001:
1576                 entry->edx &= kvm_supported_word1_x86_features;
1577                 entry->ecx &= kvm_supported_word6_x86_features;
1578                 break;
1579         }
1580         put_cpu();
1581 }
1582
1583 #undef F
1584
1585 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1586                                      struct kvm_cpuid_entry2 __user *entries)
1587 {
1588         struct kvm_cpuid_entry2 *cpuid_entries;
1589         int limit, nent = 0, r = -E2BIG;
1590         u32 func;
1591
1592         if (cpuid->nent < 1)
1593                 goto out;
1594         r = -ENOMEM;
1595         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1596         if (!cpuid_entries)
1597                 goto out;
1598
1599         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1600         limit = cpuid_entries[0].eax;
1601         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1602                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1603                              &nent, cpuid->nent);
1604         r = -E2BIG;
1605         if (nent >= cpuid->nent)
1606                 goto out_free;
1607
1608         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1609         limit = cpuid_entries[nent - 1].eax;
1610         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1611                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1612                              &nent, cpuid->nent);
1613         r = -E2BIG;
1614         if (nent >= cpuid->nent)
1615                 goto out_free;
1616
1617         r = -EFAULT;
1618         if (copy_to_user(entries, cpuid_entries,
1619                          nent * sizeof(struct kvm_cpuid_entry2)))
1620                 goto out_free;
1621         cpuid->nent = nent;
1622         r = 0;
1623
1624 out_free:
1625         vfree(cpuid_entries);
1626 out:
1627         return r;
1628 }
1629
1630 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1631                                     struct kvm_lapic_state *s)
1632 {
1633         vcpu_load(vcpu);
1634         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1635         vcpu_put(vcpu);
1636
1637         return 0;
1638 }
1639
1640 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1641                                     struct kvm_lapic_state *s)
1642 {
1643         vcpu_load(vcpu);
1644         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1645         kvm_apic_post_state_restore(vcpu);
1646         update_cr8_intercept(vcpu);
1647         vcpu_put(vcpu);
1648
1649         return 0;
1650 }
1651
1652 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1653                                     struct kvm_interrupt *irq)
1654 {
1655         if (irq->irq < 0 || irq->irq >= 256)
1656                 return -EINVAL;
1657         if (irqchip_in_kernel(vcpu->kvm))
1658                 return -ENXIO;
1659         vcpu_load(vcpu);
1660
1661         kvm_queue_interrupt(vcpu, irq->irq, false);
1662
1663         vcpu_put(vcpu);
1664
1665         return 0;
1666 }
1667
1668 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1669 {
1670         vcpu_load(vcpu);
1671         kvm_inject_nmi(vcpu);
1672         vcpu_put(vcpu);
1673
1674         return 0;
1675 }
1676
1677 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1678                                            struct kvm_tpr_access_ctl *tac)
1679 {
1680         if (tac->flags)
1681                 return -EINVAL;
1682         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1683         return 0;
1684 }
1685
1686 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1687                                         u64 mcg_cap)
1688 {
1689         int r;
1690         unsigned bank_num = mcg_cap & 0xff, bank;
1691
1692         r = -EINVAL;
1693         if (!bank_num)
1694                 goto out;
1695         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1696                 goto out;
1697         r = 0;
1698         vcpu->arch.mcg_cap = mcg_cap;
1699         /* Init IA32_MCG_CTL to all 1s */
1700         if (mcg_cap & MCG_CTL_P)
1701                 vcpu->arch.mcg_ctl = ~(u64)0;
1702         /* Init IA32_MCi_CTL to all 1s */
1703         for (bank = 0; bank < bank_num; bank++)
1704                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1705 out:
1706         return r;
1707 }
1708
1709 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1710                                       struct kvm_x86_mce *mce)
1711 {
1712         u64 mcg_cap = vcpu->arch.mcg_cap;
1713         unsigned bank_num = mcg_cap & 0xff;
1714         u64 *banks = vcpu->arch.mce_banks;
1715
1716         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1717                 return -EINVAL;
1718         /*
1719          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1720          * reporting is disabled
1721          */
1722         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1723             vcpu->arch.mcg_ctl != ~(u64)0)
1724                 return 0;
1725         banks += 4 * mce->bank;
1726         /*
1727          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1728          * reporting is disabled for the bank
1729          */
1730         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1731                 return 0;
1732         if (mce->status & MCI_STATUS_UC) {
1733                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1734                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1735                         printk(KERN_DEBUG "kvm: set_mce: "
1736                                "injects mce exception while "
1737                                "previous one is in progress!\n");
1738                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1739                         return 0;
1740                 }
1741                 if (banks[1] & MCI_STATUS_VAL)
1742                         mce->status |= MCI_STATUS_OVER;
1743                 banks[2] = mce->addr;
1744                 banks[3] = mce->misc;
1745                 vcpu->arch.mcg_status = mce->mcg_status;
1746                 banks[1] = mce->status;
1747                 kvm_queue_exception(vcpu, MC_VECTOR);
1748         } else if (!(banks[1] & MCI_STATUS_VAL)
1749                    || !(banks[1] & MCI_STATUS_UC)) {
1750                 if (banks[1] & MCI_STATUS_VAL)
1751                         mce->status |= MCI_STATUS_OVER;
1752                 banks[2] = mce->addr;
1753                 banks[3] = mce->misc;
1754                 banks[1] = mce->status;
1755         } else
1756                 banks[1] |= MCI_STATUS_OVER;
1757         return 0;
1758 }
1759
1760 long kvm_arch_vcpu_ioctl(struct file *filp,
1761                          unsigned int ioctl, unsigned long arg)
1762 {
1763         struct kvm_vcpu *vcpu = filp->private_data;
1764         void __user *argp = (void __user *)arg;
1765         int r;
1766         struct kvm_lapic_state *lapic = NULL;
1767
1768         switch (ioctl) {
1769         case KVM_GET_LAPIC: {
1770                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1771
1772                 r = -ENOMEM;
1773                 if (!lapic)
1774                         goto out;
1775                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1776                 if (r)
1777                         goto out;
1778                 r = -EFAULT;
1779                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1780                         goto out;
1781                 r = 0;
1782                 break;
1783         }
1784         case KVM_SET_LAPIC: {
1785                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1786                 r = -ENOMEM;
1787                 if (!lapic)
1788                         goto out;
1789                 r = -EFAULT;
1790                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1791                         goto out;
1792                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1793                 if (r)
1794                         goto out;
1795                 r = 0;
1796                 break;
1797         }
1798         case KVM_INTERRUPT: {
1799                 struct kvm_interrupt irq;
1800
1801                 r = -EFAULT;
1802                 if (copy_from_user(&irq, argp, sizeof irq))
1803                         goto out;
1804                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1805                 if (r)
1806                         goto out;
1807                 r = 0;
1808                 break;
1809         }
1810         case KVM_NMI: {
1811                 r = kvm_vcpu_ioctl_nmi(vcpu);
1812                 if (r)
1813                         goto out;
1814                 r = 0;
1815                 break;
1816         }
1817         case KVM_SET_CPUID: {
1818                 struct kvm_cpuid __user *cpuid_arg = argp;
1819                 struct kvm_cpuid cpuid;
1820
1821                 r = -EFAULT;
1822                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1823                         goto out;
1824                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1825                 if (r)
1826                         goto out;
1827                 break;
1828         }
1829         case KVM_SET_CPUID2: {
1830                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1831                 struct kvm_cpuid2 cpuid;
1832
1833                 r = -EFAULT;
1834                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1835                         goto out;
1836                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1837                                               cpuid_arg->entries);
1838                 if (r)
1839                         goto out;
1840                 break;
1841         }
1842         case KVM_GET_CPUID2: {
1843                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1844                 struct kvm_cpuid2 cpuid;
1845
1846                 r = -EFAULT;
1847                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1848                         goto out;
1849                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1850                                               cpuid_arg->entries);
1851                 if (r)
1852                         goto out;
1853                 r = -EFAULT;
1854                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1855                         goto out;
1856                 r = 0;
1857                 break;
1858         }
1859         case KVM_GET_MSRS:
1860                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1861                 break;
1862         case KVM_SET_MSRS:
1863                 r = msr_io(vcpu, argp, do_set_msr, 0);
1864                 break;
1865         case KVM_TPR_ACCESS_REPORTING: {
1866                 struct kvm_tpr_access_ctl tac;
1867
1868                 r = -EFAULT;
1869                 if (copy_from_user(&tac, argp, sizeof tac))
1870                         goto out;
1871                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1872                 if (r)
1873                         goto out;
1874                 r = -EFAULT;
1875                 if (copy_to_user(argp, &tac, sizeof tac))
1876                         goto out;
1877                 r = 0;
1878                 break;
1879         };
1880         case KVM_SET_VAPIC_ADDR: {
1881                 struct kvm_vapic_addr va;
1882
1883                 r = -EINVAL;
1884                 if (!irqchip_in_kernel(vcpu->kvm))
1885                         goto out;
1886                 r = -EFAULT;
1887                 if (copy_from_user(&va, argp, sizeof va))
1888                         goto out;
1889                 r = 0;
1890                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1891                 break;
1892         }
1893         case KVM_X86_SETUP_MCE: {
1894                 u64 mcg_cap;
1895
1896                 r = -EFAULT;
1897                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1898                         goto out;
1899                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1900                 break;
1901         }
1902         case KVM_X86_SET_MCE: {
1903                 struct kvm_x86_mce mce;
1904
1905                 r = -EFAULT;
1906                 if (copy_from_user(&mce, argp, sizeof mce))
1907                         goto out;
1908                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1909                 break;
1910         }
1911         default:
1912                 r = -EINVAL;
1913         }
1914 out:
1915         kfree(lapic);
1916         return r;
1917 }
1918
1919 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1920 {
1921         int ret;
1922
1923         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1924                 return -1;
1925         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1926         return ret;
1927 }
1928
1929 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1930                                               u64 ident_addr)
1931 {
1932         kvm->arch.ept_identity_map_addr = ident_addr;
1933         return 0;
1934 }
1935
1936 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1937                                           u32 kvm_nr_mmu_pages)
1938 {
1939         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1940                 return -EINVAL;
1941
1942         down_write(&kvm->slots_lock);
1943         spin_lock(&kvm->mmu_lock);
1944
1945         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1946         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1947
1948         spin_unlock(&kvm->mmu_lock);
1949         up_write(&kvm->slots_lock);
1950         return 0;
1951 }
1952
1953 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1954 {
1955         return kvm->arch.n_alloc_mmu_pages;
1956 }
1957
1958 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1959 {
1960         int i;
1961         struct kvm_mem_alias *alias;
1962
1963         for (i = 0; i < kvm->arch.naliases; ++i) {
1964                 alias = &kvm->arch.aliases[i];
1965                 if (gfn >= alias->base_gfn
1966                     && gfn < alias->base_gfn + alias->npages)
1967                         return alias->target_gfn + gfn - alias->base_gfn;
1968         }
1969         return gfn;
1970 }
1971
1972 /*
1973  * Set a new alias region.  Aliases map a portion of physical memory into
1974  * another portion.  This is useful for memory windows, for example the PC
1975  * VGA region.
1976  */
1977 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1978                                          struct kvm_memory_alias *alias)
1979 {
1980         int r, n;
1981         struct kvm_mem_alias *p;
1982
1983         r = -EINVAL;
1984         /* General sanity checks */
1985         if (alias->memory_size & (PAGE_SIZE - 1))
1986                 goto out;
1987         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1988                 goto out;
1989         if (alias->slot >= KVM_ALIAS_SLOTS)
1990                 goto out;
1991         if (alias->guest_phys_addr + alias->memory_size
1992             < alias->guest_phys_addr)
1993                 goto out;
1994         if (alias->target_phys_addr + alias->memory_size
1995             < alias->target_phys_addr)
1996                 goto out;
1997
1998         down_write(&kvm->slots_lock);
1999         spin_lock(&kvm->mmu_lock);
2000
2001         p = &kvm->arch.aliases[alias->slot];
2002         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2003         p->npages = alias->memory_size >> PAGE_SHIFT;
2004         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2005
2006         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2007                 if (kvm->arch.aliases[n - 1].npages)
2008                         break;
2009         kvm->arch.naliases = n;
2010
2011         spin_unlock(&kvm->mmu_lock);
2012         kvm_mmu_zap_all(kvm);
2013
2014         up_write(&kvm->slots_lock);
2015
2016         return 0;
2017
2018 out:
2019         return r;
2020 }
2021
2022 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2023 {
2024         int r;
2025
2026         r = 0;
2027         switch (chip->chip_id) {
2028         case KVM_IRQCHIP_PIC_MASTER:
2029                 memcpy(&chip->chip.pic,
2030                         &pic_irqchip(kvm)->pics[0],
2031                         sizeof(struct kvm_pic_state));
2032                 break;
2033         case KVM_IRQCHIP_PIC_SLAVE:
2034                 memcpy(&chip->chip.pic,
2035                         &pic_irqchip(kvm)->pics[1],
2036                         sizeof(struct kvm_pic_state));
2037                 break;
2038         case KVM_IRQCHIP_IOAPIC:
2039                 memcpy(&chip->chip.ioapic,
2040                         ioapic_irqchip(kvm),
2041                         sizeof(struct kvm_ioapic_state));
2042                 break;
2043         default:
2044                 r = -EINVAL;
2045                 break;
2046         }
2047         return r;
2048 }
2049
2050 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2051 {
2052         int r;
2053
2054         r = 0;
2055         switch (chip->chip_id) {
2056         case KVM_IRQCHIP_PIC_MASTER:
2057                 spin_lock(&pic_irqchip(kvm)->lock);
2058                 memcpy(&pic_irqchip(kvm)->pics[0],
2059                         &chip->chip.pic,
2060                         sizeof(struct kvm_pic_state));
2061                 spin_unlock(&pic_irqchip(kvm)->lock);
2062                 break;
2063         case KVM_IRQCHIP_PIC_SLAVE:
2064                 spin_lock(&pic_irqchip(kvm)->lock);
2065                 memcpy(&pic_irqchip(kvm)->pics[1],
2066                         &chip->chip.pic,
2067                         sizeof(struct kvm_pic_state));
2068                 spin_unlock(&pic_irqchip(kvm)->lock);
2069                 break;
2070         case KVM_IRQCHIP_IOAPIC:
2071                 mutex_lock(&kvm->irq_lock);
2072                 memcpy(ioapic_irqchip(kvm),
2073                         &chip->chip.ioapic,
2074                         sizeof(struct kvm_ioapic_state));
2075                 mutex_unlock(&kvm->irq_lock);
2076                 break;
2077         default:
2078                 r = -EINVAL;
2079                 break;
2080         }
2081         kvm_pic_update_irq(pic_irqchip(kvm));
2082         return r;
2083 }
2084
2085 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2086 {
2087         int r = 0;
2088
2089         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2090         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2091         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2092         return r;
2093 }
2094
2095 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2096 {
2097         int r = 0;
2098
2099         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2100         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2101         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2102         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2103         return r;
2104 }
2105
2106 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2107 {
2108         int r = 0;
2109
2110         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2111         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2112                 sizeof(ps->channels));
2113         ps->flags = kvm->arch.vpit->pit_state.flags;
2114         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2115         return r;
2116 }
2117
2118 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2119 {
2120         int r = 0, start = 0;
2121         u32 prev_legacy, cur_legacy;
2122         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2123         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2124         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2125         if (!prev_legacy && cur_legacy)
2126                 start = 1;
2127         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2128                sizeof(kvm->arch.vpit->pit_state.channels));
2129         kvm->arch.vpit->pit_state.flags = ps->flags;
2130         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2131         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2132         return r;
2133 }
2134
2135 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2136                                  struct kvm_reinject_control *control)
2137 {
2138         if (!kvm->arch.vpit)
2139                 return -ENXIO;
2140         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2141         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2142         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2143         return 0;
2144 }
2145
2146 /*
2147  * Get (and clear) the dirty memory log for a memory slot.
2148  */
2149 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2150                                       struct kvm_dirty_log *log)
2151 {
2152         int r;
2153         int n;
2154         struct kvm_memory_slot *memslot;
2155         int is_dirty = 0;
2156
2157         down_write(&kvm->slots_lock);
2158
2159         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2160         if (r)
2161                 goto out;
2162
2163         /* If nothing is dirty, don't bother messing with page tables. */
2164         if (is_dirty) {
2165                 spin_lock(&kvm->mmu_lock);
2166                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2167                 spin_unlock(&kvm->mmu_lock);
2168                 memslot = &kvm->memslots[log->slot];
2169                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2170                 memset(memslot->dirty_bitmap, 0, n);
2171         }
2172         r = 0;
2173 out:
2174         up_write(&kvm->slots_lock);
2175         return r;
2176 }
2177
2178 long kvm_arch_vm_ioctl(struct file *filp,
2179                        unsigned int ioctl, unsigned long arg)
2180 {
2181         struct kvm *kvm = filp->private_data;
2182         void __user *argp = (void __user *)arg;
2183         int r = -EINVAL;
2184         /*
2185          * This union makes it completely explicit to gcc-3.x
2186          * that these two variables' stack usage should be
2187          * combined, not added together.
2188          */
2189         union {
2190                 struct kvm_pit_state ps;
2191                 struct kvm_pit_state2 ps2;
2192                 struct kvm_memory_alias alias;
2193                 struct kvm_pit_config pit_config;
2194         } u;
2195
2196         switch (ioctl) {
2197         case KVM_SET_TSS_ADDR:
2198                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2199                 if (r < 0)
2200                         goto out;
2201                 break;
2202         case KVM_SET_IDENTITY_MAP_ADDR: {
2203                 u64 ident_addr;
2204
2205                 r = -EFAULT;
2206                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2207                         goto out;
2208                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2209                 if (r < 0)
2210                         goto out;
2211                 break;
2212         }
2213         case KVM_SET_MEMORY_REGION: {
2214                 struct kvm_memory_region kvm_mem;
2215                 struct kvm_userspace_memory_region kvm_userspace_mem;
2216
2217                 r = -EFAULT;
2218                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2219                         goto out;
2220                 kvm_userspace_mem.slot = kvm_mem.slot;
2221                 kvm_userspace_mem.flags = kvm_mem.flags;
2222                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2223                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2224                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2225                 if (r)
2226                         goto out;
2227                 break;
2228         }
2229         case KVM_SET_NR_MMU_PAGES:
2230                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2231                 if (r)
2232                         goto out;
2233                 break;
2234         case KVM_GET_NR_MMU_PAGES:
2235                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2236                 break;
2237         case KVM_SET_MEMORY_ALIAS:
2238                 r = -EFAULT;
2239                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2240                         goto out;
2241                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2242                 if (r)
2243                         goto out;
2244                 break;
2245         case KVM_CREATE_IRQCHIP:
2246                 r = -ENOMEM;
2247                 kvm->arch.vpic = kvm_create_pic(kvm);
2248                 if (kvm->arch.vpic) {
2249                         r = kvm_ioapic_init(kvm);
2250                         if (r) {
2251                                 kfree(kvm->arch.vpic);
2252                                 kvm->arch.vpic = NULL;
2253                                 goto out;
2254                         }
2255                 } else
2256                         goto out;
2257                 r = kvm_setup_default_irq_routing(kvm);
2258                 if (r) {
2259                         kfree(kvm->arch.vpic);
2260                         kfree(kvm->arch.vioapic);
2261                         goto out;
2262                 }
2263                 break;
2264         case KVM_CREATE_PIT:
2265                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2266                 goto create_pit;
2267         case KVM_CREATE_PIT2:
2268                 r = -EFAULT;
2269                 if (copy_from_user(&u.pit_config, argp,
2270                                    sizeof(struct kvm_pit_config)))
2271                         goto out;
2272         create_pit:
2273                 down_write(&kvm->slots_lock);
2274                 r = -EEXIST;
2275                 if (kvm->arch.vpit)
2276                         goto create_pit_unlock;
2277                 r = -ENOMEM;
2278                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2279                 if (kvm->arch.vpit)
2280                         r = 0;
2281         create_pit_unlock:
2282                 up_write(&kvm->slots_lock);
2283                 break;
2284         case KVM_IRQ_LINE_STATUS:
2285         case KVM_IRQ_LINE: {
2286                 struct kvm_irq_level irq_event;
2287
2288                 r = -EFAULT;
2289                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2290                         goto out;
2291                 if (irqchip_in_kernel(kvm)) {
2292                         __s32 status;
2293                         mutex_lock(&kvm->irq_lock);
2294                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2295                                         irq_event.irq, irq_event.level);
2296                         mutex_unlock(&kvm->irq_lock);
2297                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2298                                 irq_event.status = status;
2299                                 if (copy_to_user(argp, &irq_event,
2300                                                         sizeof irq_event))
2301                                         goto out;
2302                         }
2303                         r = 0;
2304                 }
2305                 break;
2306         }
2307         case KVM_GET_IRQCHIP: {
2308                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2309                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2310
2311                 r = -ENOMEM;
2312                 if (!chip)
2313                         goto out;
2314                 r = -EFAULT;
2315                 if (copy_from_user(chip, argp, sizeof *chip))
2316                         goto get_irqchip_out;
2317                 r = -ENXIO;
2318                 if (!irqchip_in_kernel(kvm))
2319                         goto get_irqchip_out;
2320                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2321                 if (r)
2322                         goto get_irqchip_out;
2323                 r = -EFAULT;
2324                 if (copy_to_user(argp, chip, sizeof *chip))
2325                         goto get_irqchip_out;
2326                 r = 0;
2327         get_irqchip_out:
2328                 kfree(chip);
2329                 if (r)
2330                         goto out;
2331                 break;
2332         }
2333         case KVM_SET_IRQCHIP: {
2334                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2335                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2336
2337                 r = -ENOMEM;
2338                 if (!chip)
2339                         goto out;
2340                 r = -EFAULT;
2341                 if (copy_from_user(chip, argp, sizeof *chip))
2342                         goto set_irqchip_out;
2343                 r = -ENXIO;
2344                 if (!irqchip_in_kernel(kvm))
2345                         goto set_irqchip_out;
2346                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2347                 if (r)
2348                         goto set_irqchip_out;
2349                 r = 0;
2350         set_irqchip_out:
2351                 kfree(chip);
2352                 if (r)
2353                         goto out;
2354                 break;
2355         }
2356         case KVM_GET_PIT: {
2357                 r = -EFAULT;
2358                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2359                         goto out;
2360                 r = -ENXIO;
2361                 if (!kvm->arch.vpit)
2362                         goto out;
2363                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2364                 if (r)
2365                         goto out;
2366                 r = -EFAULT;
2367                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2368                         goto out;
2369                 r = 0;
2370                 break;
2371         }
2372         case KVM_SET_PIT: {
2373                 r = -EFAULT;
2374                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2375                         goto out;
2376                 r = -ENXIO;
2377                 if (!kvm->arch.vpit)
2378                         goto out;
2379                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2380                 if (r)
2381                         goto out;
2382                 r = 0;
2383                 break;
2384         }
2385         case KVM_GET_PIT2: {
2386                 r = -ENXIO;
2387                 if (!kvm->arch.vpit)
2388                         goto out;
2389                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2390                 if (r)
2391                         goto out;
2392                 r = -EFAULT;
2393                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2394                         goto out;
2395                 r = 0;
2396                 break;
2397         }
2398         case KVM_SET_PIT2: {
2399                 r = -EFAULT;
2400                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2401                         goto out;
2402                 r = -ENXIO;
2403                 if (!kvm->arch.vpit)
2404                         goto out;
2405                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2406                 if (r)
2407                         goto out;
2408                 r = 0;
2409                 break;
2410         }
2411         case KVM_REINJECT_CONTROL: {
2412                 struct kvm_reinject_control control;
2413                 r =  -EFAULT;
2414                 if (copy_from_user(&control, argp, sizeof(control)))
2415                         goto out;
2416                 r = kvm_vm_ioctl_reinject(kvm, &control);
2417                 if (r)
2418                         goto out;
2419                 r = 0;
2420                 break;
2421         }
2422         default:
2423                 ;
2424         }
2425 out:
2426         return r;
2427 }
2428
2429 static void kvm_init_msr_list(void)
2430 {
2431         u32 dummy[2];
2432         unsigned i, j;
2433
2434         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2435                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2436                         continue;
2437                 if (j < i)
2438                         msrs_to_save[j] = msrs_to_save[i];
2439                 j++;
2440         }
2441         num_msrs_to_save = j;
2442 }
2443
2444 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2445                            const void *v)
2446 {
2447         if (vcpu->arch.apic &&
2448             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2449                 return 0;
2450
2451         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2452 }
2453
2454 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2455 {
2456         if (vcpu->arch.apic &&
2457             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2458                 return 0;
2459
2460         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2461 }
2462
2463 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2464                                struct kvm_vcpu *vcpu)
2465 {
2466         void *data = val;
2467         int r = X86EMUL_CONTINUE;
2468
2469         while (bytes) {
2470                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2471                 unsigned offset = addr & (PAGE_SIZE-1);
2472                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2473                 int ret;
2474
2475                 if (gpa == UNMAPPED_GVA) {
2476                         r = X86EMUL_PROPAGATE_FAULT;
2477                         goto out;
2478                 }
2479                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2480                 if (ret < 0) {
2481                         r = X86EMUL_UNHANDLEABLE;
2482                         goto out;
2483                 }
2484
2485                 bytes -= toread;
2486                 data += toread;
2487                 addr += toread;
2488         }
2489 out:
2490         return r;
2491 }
2492
2493 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2494                                 struct kvm_vcpu *vcpu)
2495 {
2496         void *data = val;
2497         int r = X86EMUL_CONTINUE;
2498
2499         while (bytes) {
2500                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2501                 unsigned offset = addr & (PAGE_SIZE-1);
2502                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2503                 int ret;
2504
2505                 if (gpa == UNMAPPED_GVA) {
2506                         r = X86EMUL_PROPAGATE_FAULT;
2507                         goto out;
2508                 }
2509                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2510                 if (ret < 0) {
2511                         r = X86EMUL_UNHANDLEABLE;
2512                         goto out;
2513                 }
2514
2515                 bytes -= towrite;
2516                 data += towrite;
2517                 addr += towrite;
2518         }
2519 out:
2520         return r;
2521 }
2522
2523
2524 static int emulator_read_emulated(unsigned long addr,
2525                                   void *val,
2526                                   unsigned int bytes,
2527                                   struct kvm_vcpu *vcpu)
2528 {
2529         gpa_t                 gpa;
2530
2531         if (vcpu->mmio_read_completed) {
2532                 memcpy(val, vcpu->mmio_data, bytes);
2533                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2534                                vcpu->mmio_phys_addr, *(u64 *)val);
2535                 vcpu->mmio_read_completed = 0;
2536                 return X86EMUL_CONTINUE;
2537         }
2538
2539         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2540
2541         /* For APIC access vmexit */
2542         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2543                 goto mmio;
2544
2545         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2546                                 == X86EMUL_CONTINUE)
2547                 return X86EMUL_CONTINUE;
2548         if (gpa == UNMAPPED_GVA)
2549                 return X86EMUL_PROPAGATE_FAULT;
2550
2551 mmio:
2552         /*
2553          * Is this MMIO handled locally?
2554          */
2555         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2556                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2557                 return X86EMUL_CONTINUE;
2558         }
2559
2560         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2561
2562         vcpu->mmio_needed = 1;
2563         vcpu->mmio_phys_addr = gpa;
2564         vcpu->mmio_size = bytes;
2565         vcpu->mmio_is_write = 0;
2566
2567         return X86EMUL_UNHANDLEABLE;
2568 }
2569
2570 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2571                           const void *val, int bytes)
2572 {
2573         int ret;
2574
2575         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2576         if (ret < 0)
2577                 return 0;
2578         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2579         return 1;
2580 }
2581
2582 static int emulator_write_emulated_onepage(unsigned long addr,
2583                                            const void *val,
2584                                            unsigned int bytes,
2585                                            struct kvm_vcpu *vcpu)
2586 {
2587         gpa_t                 gpa;
2588
2589         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2590
2591         if (gpa == UNMAPPED_GVA) {
2592                 kvm_inject_page_fault(vcpu, addr, 2);
2593                 return X86EMUL_PROPAGATE_FAULT;
2594         }
2595
2596         /* For APIC access vmexit */
2597         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2598                 goto mmio;
2599
2600         if (emulator_write_phys(vcpu, gpa, val, bytes))
2601                 return X86EMUL_CONTINUE;
2602
2603 mmio:
2604         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2605         /*
2606          * Is this MMIO handled locally?
2607          */
2608         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2609                 return X86EMUL_CONTINUE;
2610
2611         vcpu->mmio_needed = 1;
2612         vcpu->mmio_phys_addr = gpa;
2613         vcpu->mmio_size = bytes;
2614         vcpu->mmio_is_write = 1;
2615         memcpy(vcpu->mmio_data, val, bytes);
2616
2617         return X86EMUL_CONTINUE;
2618 }
2619
2620 int emulator_write_emulated(unsigned long addr,
2621                                    const void *val,
2622                                    unsigned int bytes,
2623                                    struct kvm_vcpu *vcpu)
2624 {
2625         /* Crossing a page boundary? */
2626         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2627                 int rc, now;
2628
2629                 now = -addr & ~PAGE_MASK;
2630                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2631                 if (rc != X86EMUL_CONTINUE)
2632                         return rc;
2633                 addr += now;
2634                 val += now;
2635                 bytes -= now;
2636         }
2637         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2638 }
2639 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2640
2641 static int emulator_cmpxchg_emulated(unsigned long addr,
2642                                      const void *old,
2643                                      const void *new,
2644                                      unsigned int bytes,
2645                                      struct kvm_vcpu *vcpu)
2646 {
2647         static int reported;
2648
2649         if (!reported) {
2650                 reported = 1;
2651                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2652         }
2653 #ifndef CONFIG_X86_64
2654         /* guests cmpxchg8b have to be emulated atomically */
2655         if (bytes == 8) {
2656                 gpa_t gpa;
2657                 struct page *page;
2658                 char *kaddr;
2659                 u64 val;
2660
2661                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2662
2663                 if (gpa == UNMAPPED_GVA ||
2664                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2665                         goto emul_write;
2666
2667                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2668                         goto emul_write;
2669
2670                 val = *(u64 *)new;
2671
2672                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2673
2674                 kaddr = kmap_atomic(page, KM_USER0);
2675                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2676                 kunmap_atomic(kaddr, KM_USER0);
2677                 kvm_release_page_dirty(page);
2678         }
2679 emul_write:
2680 #endif
2681
2682         return emulator_write_emulated(addr, new, bytes, vcpu);
2683 }
2684
2685 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2686 {
2687         return kvm_x86_ops->get_segment_base(vcpu, seg);
2688 }
2689
2690 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2691 {
2692         kvm_mmu_invlpg(vcpu, address);
2693         return X86EMUL_CONTINUE;
2694 }
2695
2696 int emulate_clts(struct kvm_vcpu *vcpu)
2697 {
2698         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2699         return X86EMUL_CONTINUE;
2700 }
2701
2702 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2703 {
2704         struct kvm_vcpu *vcpu = ctxt->vcpu;
2705
2706         switch (dr) {
2707         case 0 ... 3:
2708                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2709                 return X86EMUL_CONTINUE;
2710         default:
2711                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2712                 return X86EMUL_UNHANDLEABLE;
2713         }
2714 }
2715
2716 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2717 {
2718         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2719         int exception;
2720
2721         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2722         if (exception) {
2723                 /* FIXME: better handling */
2724                 return X86EMUL_UNHANDLEABLE;
2725         }
2726         return X86EMUL_CONTINUE;
2727 }
2728
2729 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2730 {
2731         u8 opcodes[4];
2732         unsigned long rip = kvm_rip_read(vcpu);
2733         unsigned long rip_linear;
2734
2735         if (!printk_ratelimit())
2736                 return;
2737
2738         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2739
2740         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2741
2742         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2743                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2744 }
2745 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2746
2747 static struct x86_emulate_ops emulate_ops = {
2748         .read_std            = kvm_read_guest_virt,
2749         .read_emulated       = emulator_read_emulated,
2750         .write_emulated      = emulator_write_emulated,
2751         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2752 };
2753
2754 static void cache_all_regs(struct kvm_vcpu *vcpu)
2755 {
2756         kvm_register_read(vcpu, VCPU_REGS_RAX);
2757         kvm_register_read(vcpu, VCPU_REGS_RSP);
2758         kvm_register_read(vcpu, VCPU_REGS_RIP);
2759         vcpu->arch.regs_dirty = ~0;
2760 }
2761
2762 int emulate_instruction(struct kvm_vcpu *vcpu,
2763                         struct kvm_run *run,
2764                         unsigned long cr2,
2765                         u16 error_code,
2766                         int emulation_type)
2767 {
2768         int r, shadow_mask;
2769         struct decode_cache *c;
2770
2771         kvm_clear_exception_queue(vcpu);
2772         vcpu->arch.mmio_fault_cr2 = cr2;
2773         /*
2774          * TODO: fix emulate.c to use guest_read/write_register
2775          * instead of direct ->regs accesses, can save hundred cycles
2776          * on Intel for instructions that don't read/change RSP, for
2777          * for example.
2778          */
2779         cache_all_regs(vcpu);
2780
2781         vcpu->mmio_is_write = 0;
2782         vcpu->arch.pio.string = 0;
2783
2784         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2785                 int cs_db, cs_l;
2786                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2787
2788                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2789                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2790                 vcpu->arch.emulate_ctxt.mode =
2791                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2792                         ? X86EMUL_MODE_REAL : cs_l
2793                         ? X86EMUL_MODE_PROT64 : cs_db
2794                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2795
2796                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2797
2798                 /* Only allow emulation of specific instructions on #UD
2799                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2800                 c = &vcpu->arch.emulate_ctxt.decode;
2801                 if (emulation_type & EMULTYPE_TRAP_UD) {
2802                         if (!c->twobyte)
2803                                 return EMULATE_FAIL;
2804                         switch (c->b) {
2805                         case 0x01: /* VMMCALL */
2806                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2807                                         return EMULATE_FAIL;
2808                                 break;
2809                         case 0x34: /* sysenter */
2810                         case 0x35: /* sysexit */
2811                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2812                                         return EMULATE_FAIL;
2813                                 break;
2814                         case 0x05: /* syscall */
2815                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2816                                         return EMULATE_FAIL;
2817                                 break;
2818                         default:
2819                                 return EMULATE_FAIL;
2820                         }
2821
2822                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2823                                 return EMULATE_FAIL;
2824                 }
2825
2826                 ++vcpu->stat.insn_emulation;
2827                 if (r)  {
2828                         ++vcpu->stat.insn_emulation_fail;
2829                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2830                                 return EMULATE_DONE;
2831                         return EMULATE_FAIL;
2832                 }
2833         }
2834
2835         if (emulation_type & EMULTYPE_SKIP) {
2836                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2837                 return EMULATE_DONE;
2838         }
2839
2840         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2841         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2842
2843         if (r == 0)
2844                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2845
2846         if (vcpu->arch.pio.string)
2847                 return EMULATE_DO_MMIO;
2848
2849         if ((r || vcpu->mmio_is_write) && run) {
2850                 run->exit_reason = KVM_EXIT_MMIO;
2851                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2852                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2853                 run->mmio.len = vcpu->mmio_size;
2854                 run->mmio.is_write = vcpu->mmio_is_write;
2855         }
2856
2857         if (r) {
2858                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2859                         return EMULATE_DONE;
2860                 if (!vcpu->mmio_needed) {
2861                         kvm_report_emulation_failure(vcpu, "mmio");
2862                         return EMULATE_FAIL;
2863                 }
2864                 return EMULATE_DO_MMIO;
2865         }
2866
2867         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2868
2869         if (vcpu->mmio_is_write) {
2870                 vcpu->mmio_needed = 0;
2871                 return EMULATE_DO_MMIO;
2872         }
2873
2874         return EMULATE_DONE;
2875 }
2876 EXPORT_SYMBOL_GPL(emulate_instruction);
2877
2878 static int pio_copy_data(struct kvm_vcpu *vcpu)
2879 {
2880         void *p = vcpu->arch.pio_data;
2881         gva_t q = vcpu->arch.pio.guest_gva;
2882         unsigned bytes;
2883         int ret;
2884
2885         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2886         if (vcpu->arch.pio.in)
2887                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2888         else
2889                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2890         return ret;
2891 }
2892
2893 int complete_pio(struct kvm_vcpu *vcpu)
2894 {
2895         struct kvm_pio_request *io = &vcpu->arch.pio;
2896         long delta;
2897         int r;
2898         unsigned long val;
2899
2900         if (!io->string) {
2901                 if (io->in) {
2902                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2903                         memcpy(&val, vcpu->arch.pio_data, io->size);
2904                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2905                 }
2906         } else {
2907                 if (io->in) {
2908                         r = pio_copy_data(vcpu);
2909                         if (r)
2910                                 return r;
2911                 }
2912
2913                 delta = 1;
2914                 if (io->rep) {
2915                         delta *= io->cur_count;
2916                         /*
2917                          * The size of the register should really depend on
2918                          * current address size.
2919                          */
2920                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2921                         val -= delta;
2922                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2923                 }
2924                 if (io->down)
2925                         delta = -delta;
2926                 delta *= io->size;
2927                 if (io->in) {
2928                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2929                         val += delta;
2930                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2931                 } else {
2932                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2933                         val += delta;
2934                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2935                 }
2936         }
2937
2938         io->count -= io->cur_count;
2939         io->cur_count = 0;
2940
2941         return 0;
2942 }
2943
2944 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2945 {
2946         /* TODO: String I/O for in kernel device */
2947         int r;
2948
2949         if (vcpu->arch.pio.in)
2950                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2951                                     vcpu->arch.pio.size, pd);
2952         else
2953                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2954                                      vcpu->arch.pio.size, pd);
2955         return r;
2956 }
2957
2958 static int pio_string_write(struct kvm_vcpu *vcpu)
2959 {
2960         struct kvm_pio_request *io = &vcpu->arch.pio;
2961         void *pd = vcpu->arch.pio_data;
2962         int i, r = 0;
2963
2964         for (i = 0; i < io->cur_count; i++) {
2965                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2966                                      io->port, io->size, pd)) {
2967                         r = -EOPNOTSUPP;
2968                         break;
2969                 }
2970                 pd += io->size;
2971         }
2972         return r;
2973 }
2974
2975 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2976                   int size, unsigned port)
2977 {
2978         unsigned long val;
2979
2980         vcpu->run->exit_reason = KVM_EXIT_IO;
2981         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2982         vcpu->run->io.size = vcpu->arch.pio.size = size;
2983         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2984         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2985         vcpu->run->io.port = vcpu->arch.pio.port = port;
2986         vcpu->arch.pio.in = in;
2987         vcpu->arch.pio.string = 0;
2988         vcpu->arch.pio.down = 0;
2989         vcpu->arch.pio.rep = 0;
2990
2991         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2992                       size, 1);
2993
2994         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2995         memcpy(vcpu->arch.pio_data, &val, 4);
2996
2997         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2998                 complete_pio(vcpu);
2999                 return 1;
3000         }
3001         return 0;
3002 }
3003 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3004
3005 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
3006                   int size, unsigned long count, int down,
3007                   gva_t address, int rep, unsigned port)
3008 {
3009         unsigned now, in_page;
3010         int ret = 0;
3011
3012         vcpu->run->exit_reason = KVM_EXIT_IO;
3013         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3014         vcpu->run->io.size = vcpu->arch.pio.size = size;
3015         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3016         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3017         vcpu->run->io.port = vcpu->arch.pio.port = port;
3018         vcpu->arch.pio.in = in;
3019         vcpu->arch.pio.string = 1;
3020         vcpu->arch.pio.down = down;
3021         vcpu->arch.pio.rep = rep;
3022
3023         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3024                       size, count);
3025
3026         if (!count) {
3027                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3028                 return 1;
3029         }
3030
3031         if (!down)
3032                 in_page = PAGE_SIZE - offset_in_page(address);
3033         else
3034                 in_page = offset_in_page(address) + size;
3035         now = min(count, (unsigned long)in_page / size);
3036         if (!now)
3037                 now = 1;
3038         if (down) {
3039                 /*
3040                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3041                  */
3042                 pr_unimpl(vcpu, "guest string pio down\n");
3043                 kvm_inject_gp(vcpu, 0);
3044                 return 1;
3045         }
3046         vcpu->run->io.count = now;
3047         vcpu->arch.pio.cur_count = now;
3048
3049         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3050                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3051
3052         vcpu->arch.pio.guest_gva = address;
3053
3054         if (!vcpu->arch.pio.in) {
3055                 /* string PIO write */
3056                 ret = pio_copy_data(vcpu);
3057                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3058                         kvm_inject_gp(vcpu, 0);
3059                         return 1;
3060                 }
3061                 if (ret == 0 && !pio_string_write(vcpu)) {
3062                         complete_pio(vcpu);
3063                         if (vcpu->arch.pio.count == 0)
3064                                 ret = 1;
3065                 }
3066         }
3067         /* no string PIO read support yet */
3068
3069         return ret;
3070 }
3071 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3072
3073 static void bounce_off(void *info)
3074 {
3075         /* nothing */
3076 }
3077
3078 static unsigned int  ref_freq;
3079 static unsigned long tsc_khz_ref;
3080
3081 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3082                                      void *data)
3083 {
3084         struct cpufreq_freqs *freq = data;
3085         struct kvm *kvm;
3086         struct kvm_vcpu *vcpu;
3087         int i, send_ipi = 0;
3088
3089         if (!ref_freq)
3090                 ref_freq = freq->old;
3091
3092         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3093                 return 0;
3094         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3095                 return 0;
3096         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3097
3098         spin_lock(&kvm_lock);
3099         list_for_each_entry(kvm, &vm_list, vm_list) {
3100                 kvm_for_each_vcpu(i, vcpu, kvm) {
3101                         if (vcpu->cpu != freq->cpu)
3102                                 continue;
3103                         if (!kvm_request_guest_time_update(vcpu))
3104                                 continue;
3105                         if (vcpu->cpu != smp_processor_id())
3106                                 send_ipi++;
3107                 }
3108         }
3109         spin_unlock(&kvm_lock);
3110
3111         if (freq->old < freq->new && send_ipi) {
3112                 /*
3113                  * We upscale the frequency.  Must make the guest
3114                  * doesn't see old kvmclock values while running with
3115                  * the new frequency, otherwise we risk the guest sees
3116                  * time go backwards.
3117                  *
3118                  * In case we update the frequency for another cpu
3119                  * (which might be in guest context) send an interrupt
3120                  * to kick the cpu out of guest context.  Next time
3121                  * guest context is entered kvmclock will be updated,
3122                  * so the guest will not see stale values.
3123                  */
3124                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3125         }
3126         return 0;
3127 }
3128
3129 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3130         .notifier_call  = kvmclock_cpufreq_notifier
3131 };
3132
3133 int kvm_arch_init(void *opaque)
3134 {
3135         int r, cpu;
3136         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3137
3138         if (kvm_x86_ops) {
3139                 printk(KERN_ERR "kvm: already loaded the other module\n");
3140                 r = -EEXIST;
3141                 goto out;
3142         }
3143
3144         if (!ops->cpu_has_kvm_support()) {
3145                 printk(KERN_ERR "kvm: no hardware support\n");
3146                 r = -EOPNOTSUPP;
3147                 goto out;
3148         }
3149         if (ops->disabled_by_bios()) {
3150                 printk(KERN_ERR "kvm: disabled by bios\n");
3151                 r = -EOPNOTSUPP;
3152                 goto out;
3153         }
3154
3155         r = kvm_mmu_module_init();
3156         if (r)
3157                 goto out;
3158
3159         kvm_init_msr_list();
3160
3161         kvm_x86_ops = ops;
3162         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3163         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3164         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3165                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3166
3167         for_each_possible_cpu(cpu)
3168                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3169         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3170                 tsc_khz_ref = tsc_khz;
3171                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3172                                           CPUFREQ_TRANSITION_NOTIFIER);
3173         }
3174
3175         return 0;
3176
3177 out:
3178         return r;
3179 }
3180
3181 void kvm_arch_exit(void)
3182 {
3183         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3184                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3185                                             CPUFREQ_TRANSITION_NOTIFIER);
3186         kvm_x86_ops = NULL;
3187         kvm_mmu_module_exit();
3188 }
3189
3190 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3191 {
3192         ++vcpu->stat.halt_exits;
3193         if (irqchip_in_kernel(vcpu->kvm)) {
3194                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3195                 return 1;
3196         } else {
3197                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3198                 return 0;
3199         }
3200 }
3201 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3202
3203 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3204                            unsigned long a1)
3205 {
3206         if (is_long_mode(vcpu))
3207                 return a0;
3208         else
3209                 return a0 | ((gpa_t)a1 << 32);
3210 }
3211
3212 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3213 {
3214         unsigned long nr, a0, a1, a2, a3, ret;
3215         int r = 1;
3216
3217         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3218         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3219         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3220         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3221         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3222
3223         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3224
3225         if (!is_long_mode(vcpu)) {
3226                 nr &= 0xFFFFFFFF;
3227                 a0 &= 0xFFFFFFFF;
3228                 a1 &= 0xFFFFFFFF;
3229                 a2 &= 0xFFFFFFFF;
3230                 a3 &= 0xFFFFFFFF;
3231         }
3232
3233         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3234                 ret = -KVM_EPERM;
3235                 goto out;
3236         }
3237
3238         switch (nr) {
3239         case KVM_HC_VAPIC_POLL_IRQ:
3240                 ret = 0;
3241                 break;
3242         case KVM_HC_MMU_OP:
3243                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3244                 break;
3245         default:
3246                 ret = -KVM_ENOSYS;
3247                 break;
3248         }
3249 out:
3250         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3251         ++vcpu->stat.hypercalls;
3252         return r;
3253 }
3254 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3255
3256 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3257 {
3258         char instruction[3];
3259         int ret = 0;
3260         unsigned long rip = kvm_rip_read(vcpu);
3261
3262
3263         /*
3264          * Blow out the MMU to ensure that no other VCPU has an active mapping
3265          * to ensure that the updated hypercall appears atomically across all
3266          * VCPUs.
3267          */
3268         kvm_mmu_zap_all(vcpu->kvm);
3269
3270         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3271         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3272             != X86EMUL_CONTINUE)
3273                 ret = -EFAULT;
3274
3275         return ret;
3276 }
3277
3278 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3279 {
3280         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3281 }
3282
3283 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3284 {
3285         struct descriptor_table dt = { limit, base };
3286
3287         kvm_x86_ops->set_gdt(vcpu, &dt);
3288 }
3289
3290 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3291 {
3292         struct descriptor_table dt = { limit, base };
3293
3294         kvm_x86_ops->set_idt(vcpu, &dt);
3295 }
3296
3297 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3298                    unsigned long *rflags)
3299 {
3300         kvm_lmsw(vcpu, msw);
3301         *rflags = kvm_x86_ops->get_rflags(vcpu);
3302 }
3303
3304 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3305 {
3306         unsigned long value;
3307
3308         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3309         switch (cr) {
3310         case 0:
3311                 value = vcpu->arch.cr0;
3312                 break;
3313         case 2:
3314                 value = vcpu->arch.cr2;
3315                 break;
3316         case 3:
3317                 value = vcpu->arch.cr3;
3318                 break;
3319         case 4:
3320                 value = vcpu->arch.cr4;
3321                 break;
3322         case 8:
3323                 value = kvm_get_cr8(vcpu);
3324                 break;
3325         default:
3326                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3327                 return 0;
3328         }
3329
3330         return value;
3331 }
3332
3333 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3334                      unsigned long *rflags)
3335 {
3336         switch (cr) {
3337         case 0:
3338                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3339                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3340                 break;
3341         case 2:
3342                 vcpu->arch.cr2 = val;
3343                 break;
3344         case 3:
3345                 kvm_set_cr3(vcpu, val);
3346                 break;
3347         case 4:
3348                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3349                 break;
3350         case 8:
3351                 kvm_set_cr8(vcpu, val & 0xfUL);
3352                 break;
3353         default:
3354                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3355         }
3356 }
3357
3358 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3359 {
3360         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3361         int j, nent = vcpu->arch.cpuid_nent;
3362
3363         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3364         /* when no next entry is found, the current entry[i] is reselected */
3365         for (j = i + 1; ; j = (j + 1) % nent) {
3366                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3367                 if (ej->function == e->function) {
3368                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3369                         return j;
3370                 }
3371         }
3372         return 0; /* silence gcc, even though control never reaches here */
3373 }
3374
3375 /* find an entry with matching function, matching index (if needed), and that
3376  * should be read next (if it's stateful) */
3377 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3378         u32 function, u32 index)
3379 {
3380         if (e->function != function)
3381                 return 0;
3382         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3383                 return 0;
3384         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3385             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3386                 return 0;
3387         return 1;
3388 }
3389
3390 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3391                                               u32 function, u32 index)
3392 {
3393         int i;
3394         struct kvm_cpuid_entry2 *best = NULL;
3395
3396         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3397                 struct kvm_cpuid_entry2 *e;
3398
3399                 e = &vcpu->arch.cpuid_entries[i];
3400                 if (is_matching_cpuid_entry(e, function, index)) {
3401                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3402                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3403                         best = e;
3404                         break;
3405                 }
3406                 /*
3407                  * Both basic or both extended?
3408                  */
3409                 if (((e->function ^ function) & 0x80000000) == 0)
3410                         if (!best || e->function > best->function)
3411                                 best = e;
3412         }
3413         return best;
3414 }
3415
3416 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3417 {
3418         struct kvm_cpuid_entry2 *best;
3419
3420         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3421         if (best)
3422                 return best->eax & 0xff;
3423         return 36;
3424 }
3425
3426 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3427 {
3428         u32 function, index;
3429         struct kvm_cpuid_entry2 *best;
3430
3431         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3432         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3433         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3434         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3435         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3436         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3437         best = kvm_find_cpuid_entry(vcpu, function, index);
3438         if (best) {
3439                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3440                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3441                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3442                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3443         }
3444         kvm_x86_ops->skip_emulated_instruction(vcpu);
3445         trace_kvm_cpuid(function,
3446                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3447                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3448                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3449                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3450 }
3451 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3452
3453 /*
3454  * Check if userspace requested an interrupt window, and that the
3455  * interrupt window is open.
3456  *
3457  * No need to exit to userspace if we already have an interrupt queued.
3458  */
3459 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3460                                           struct kvm_run *kvm_run)
3461 {
3462         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3463                 kvm_run->request_interrupt_window &&
3464                 kvm_arch_interrupt_allowed(vcpu));
3465 }
3466
3467 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3468                               struct kvm_run *kvm_run)
3469 {
3470         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3471         kvm_run->cr8 = kvm_get_cr8(vcpu);
3472         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3473         if (irqchip_in_kernel(vcpu->kvm))
3474                 kvm_run->ready_for_interrupt_injection = 1;
3475         else
3476                 kvm_run->ready_for_interrupt_injection =
3477                         kvm_arch_interrupt_allowed(vcpu) &&
3478                         !kvm_cpu_has_interrupt(vcpu) &&
3479                         !kvm_event_needs_reinjection(vcpu);
3480 }
3481
3482 static void vapic_enter(struct kvm_vcpu *vcpu)
3483 {
3484         struct kvm_lapic *apic = vcpu->arch.apic;
3485         struct page *page;
3486
3487         if (!apic || !apic->vapic_addr)
3488                 return;
3489
3490         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3491
3492         vcpu->arch.apic->vapic_page = page;
3493 }
3494
3495 static void vapic_exit(struct kvm_vcpu *vcpu)
3496 {
3497         struct kvm_lapic *apic = vcpu->arch.apic;
3498
3499         if (!apic || !apic->vapic_addr)
3500                 return;
3501
3502         down_read(&vcpu->kvm->slots_lock);
3503         kvm_release_page_dirty(apic->vapic_page);
3504         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3505         up_read(&vcpu->kvm->slots_lock);
3506 }
3507
3508 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3509 {
3510         int max_irr, tpr;
3511
3512         if (!kvm_x86_ops->update_cr8_intercept)
3513                 return;
3514
3515         if (!vcpu->arch.apic)
3516                 return;
3517
3518         if (!vcpu->arch.apic->vapic_addr)
3519                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3520         else
3521                 max_irr = -1;
3522
3523         if (max_irr != -1)
3524                 max_irr >>= 4;
3525
3526         tpr = kvm_lapic_get_cr8(vcpu);
3527
3528         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3529 }
3530
3531 static void inject_pending_event(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3532 {
3533         /* try to reinject previous events if any */
3534         if (vcpu->arch.exception.pending) {
3535                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3536                                           vcpu->arch.exception.has_error_code,
3537                                           vcpu->arch.exception.error_code);
3538                 return;
3539         }
3540
3541         if (vcpu->arch.nmi_injected) {
3542                 kvm_x86_ops->set_nmi(vcpu);
3543                 return;
3544         }
3545
3546         if (vcpu->arch.interrupt.pending) {
3547                 kvm_x86_ops->set_irq(vcpu);
3548                 return;
3549         }
3550
3551         /* try to inject new event if pending */
3552         if (vcpu->arch.nmi_pending) {
3553                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3554                         vcpu->arch.nmi_pending = false;
3555                         vcpu->arch.nmi_injected = true;
3556                         kvm_x86_ops->set_nmi(vcpu);
3557                 }
3558         } else if (kvm_cpu_has_interrupt(vcpu)) {
3559                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3560                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3561                                             false);
3562                         kvm_x86_ops->set_irq(vcpu);
3563                 }
3564         }
3565 }
3566
3567 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3568 {
3569         int r;
3570         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3571                 kvm_run->request_interrupt_window;
3572
3573         if (vcpu->requests)
3574                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3575                         kvm_mmu_unload(vcpu);
3576
3577         r = kvm_mmu_reload(vcpu);
3578         if (unlikely(r))
3579                 goto out;
3580
3581         if (vcpu->requests) {
3582                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3583                         __kvm_migrate_timers(vcpu);
3584                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3585                         kvm_write_guest_time(vcpu);
3586                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3587                         kvm_mmu_sync_roots(vcpu);
3588                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3589                         kvm_x86_ops->tlb_flush(vcpu);
3590                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3591                                        &vcpu->requests)) {
3592                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3593                         r = 0;
3594                         goto out;
3595                 }
3596                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3597                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3598                         r = 0;
3599                         goto out;
3600                 }
3601         }
3602
3603         preempt_disable();
3604
3605         kvm_x86_ops->prepare_guest_switch(vcpu);
3606         kvm_load_guest_fpu(vcpu);
3607
3608         local_irq_disable();
3609
3610         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3611         smp_mb__after_clear_bit();
3612
3613         if (vcpu->requests || need_resched() || signal_pending(current)) {
3614                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3615                 local_irq_enable();
3616                 preempt_enable();
3617                 r = 1;
3618                 goto out;
3619         }
3620
3621         inject_pending_event(vcpu, kvm_run);
3622
3623         /* enable NMI/IRQ window open exits if needed */
3624         if (vcpu->arch.nmi_pending)
3625                 kvm_x86_ops->enable_nmi_window(vcpu);
3626         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3627                 kvm_x86_ops->enable_irq_window(vcpu);
3628
3629         if (kvm_lapic_enabled(vcpu)) {
3630                 update_cr8_intercept(vcpu);
3631                 kvm_lapic_sync_to_vapic(vcpu);
3632         }
3633
3634         up_read(&vcpu->kvm->slots_lock);
3635
3636         kvm_guest_enter();
3637
3638         if (unlikely(vcpu->arch.switch_db_regs)) {
3639                 set_debugreg(0, 7);
3640                 set_debugreg(vcpu->arch.eff_db[0], 0);
3641                 set_debugreg(vcpu->arch.eff_db[1], 1);
3642                 set_debugreg(vcpu->arch.eff_db[2], 2);
3643                 set_debugreg(vcpu->arch.eff_db[3], 3);
3644         }
3645
3646         trace_kvm_entry(vcpu->vcpu_id);
3647         kvm_x86_ops->run(vcpu, kvm_run);
3648
3649         if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3650                 set_debugreg(current->thread.debugreg0, 0);
3651                 set_debugreg(current->thread.debugreg1, 1);
3652                 set_debugreg(current->thread.debugreg2, 2);
3653                 set_debugreg(current->thread.debugreg3, 3);
3654                 set_debugreg(current->thread.debugreg6, 6);
3655                 set_debugreg(current->thread.debugreg7, 7);
3656         }
3657
3658         set_bit(KVM_REQ_KICK, &vcpu->requests);
3659         local_irq_enable();
3660
3661         ++vcpu->stat.exits;
3662
3663         /*
3664          * We must have an instruction between local_irq_enable() and
3665          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3666          * the interrupt shadow.  The stat.exits increment will do nicely.
3667          * But we need to prevent reordering, hence this barrier():
3668          */
3669         barrier();
3670
3671         kvm_guest_exit();
3672
3673         preempt_enable();
3674
3675         down_read(&vcpu->kvm->slots_lock);
3676
3677         /*
3678          * Profile KVM exit RIPs:
3679          */
3680         if (unlikely(prof_on == KVM_PROFILING)) {
3681                 unsigned long rip = kvm_rip_read(vcpu);
3682                 profile_hit(KVM_PROFILING, (void *)rip);
3683         }
3684
3685
3686         kvm_lapic_sync_from_vapic(vcpu);
3687
3688         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3689 out:
3690         return r;
3691 }
3692
3693
3694 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3695 {
3696         int r;
3697
3698         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3699                 pr_debug("vcpu %d received sipi with vector # %x\n",
3700                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3701                 kvm_lapic_reset(vcpu);
3702                 r = kvm_arch_vcpu_reset(vcpu);
3703                 if (r)
3704                         return r;
3705                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3706         }
3707
3708         down_read(&vcpu->kvm->slots_lock);
3709         vapic_enter(vcpu);
3710
3711         r = 1;
3712         while (r > 0) {
3713                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3714                         r = vcpu_enter_guest(vcpu, kvm_run);
3715                 else {
3716                         up_read(&vcpu->kvm->slots_lock);
3717                         kvm_vcpu_block(vcpu);
3718                         down_read(&vcpu->kvm->slots_lock);
3719                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3720                         {
3721                                 switch(vcpu->arch.mp_state) {
3722                                 case KVM_MP_STATE_HALTED:
3723                                         vcpu->arch.mp_state =
3724                                                 KVM_MP_STATE_RUNNABLE;
3725                                 case KVM_MP_STATE_RUNNABLE:
3726                                         break;
3727                                 case KVM_MP_STATE_SIPI_RECEIVED:
3728                                 default:
3729                                         r = -EINTR;
3730                                         break;
3731                                 }
3732                         }
3733                 }
3734
3735                 if (r <= 0)
3736                         break;
3737
3738                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3739                 if (kvm_cpu_has_pending_timer(vcpu))
3740                         kvm_inject_pending_timer_irqs(vcpu);
3741
3742                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3743                         r = -EINTR;
3744                         kvm_run->exit_reason = KVM_EXIT_INTR;
3745                         ++vcpu->stat.request_irq_exits;
3746                 }
3747                 if (signal_pending(current)) {
3748                         r = -EINTR;
3749                         kvm_run->exit_reason = KVM_EXIT_INTR;
3750                         ++vcpu->stat.signal_exits;
3751                 }
3752                 if (need_resched()) {
3753                         up_read(&vcpu->kvm->slots_lock);
3754                         kvm_resched(vcpu);
3755                         down_read(&vcpu->kvm->slots_lock);
3756                 }
3757         }
3758
3759         up_read(&vcpu->kvm->slots_lock);
3760         post_kvm_run_save(vcpu, kvm_run);
3761
3762         vapic_exit(vcpu);
3763
3764         return r;
3765 }
3766
3767 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3768 {
3769         int r;
3770         sigset_t sigsaved;
3771
3772         vcpu_load(vcpu);
3773
3774         if (vcpu->sigset_active)
3775                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3776
3777         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3778                 kvm_vcpu_block(vcpu);
3779                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3780                 r = -EAGAIN;
3781                 goto out;
3782         }
3783
3784         /* re-sync apic's tpr */
3785         if (!irqchip_in_kernel(vcpu->kvm))
3786                 kvm_set_cr8(vcpu, kvm_run->cr8);
3787
3788         if (vcpu->arch.pio.cur_count) {
3789                 r = complete_pio(vcpu);
3790                 if (r)
3791                         goto out;
3792         }
3793 #if CONFIG_HAS_IOMEM
3794         if (vcpu->mmio_needed) {
3795                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3796                 vcpu->mmio_read_completed = 1;
3797                 vcpu->mmio_needed = 0;
3798
3799                 down_read(&vcpu->kvm->slots_lock);
3800                 r = emulate_instruction(vcpu, kvm_run,
3801                                         vcpu->arch.mmio_fault_cr2, 0,
3802                                         EMULTYPE_NO_DECODE);
3803                 up_read(&vcpu->kvm->slots_lock);
3804                 if (r == EMULATE_DO_MMIO) {
3805                         /*
3806                          * Read-modify-write.  Back to userspace.
3807                          */
3808                         r = 0;
3809                         goto out;
3810                 }
3811         }
3812 #endif
3813         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3814                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3815                                      kvm_run->hypercall.ret);
3816
3817         r = __vcpu_run(vcpu, kvm_run);
3818
3819 out:
3820         if (vcpu->sigset_active)
3821                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3822
3823         vcpu_put(vcpu);
3824         return r;
3825 }
3826
3827 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3828 {
3829         vcpu_load(vcpu);
3830
3831         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3832         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3833         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3834         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3835         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3836         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3837         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3838         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3839 #ifdef CONFIG_X86_64
3840         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3841         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3842         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3843         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3844         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3845         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3846         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3847         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3848 #endif
3849
3850         regs->rip = kvm_rip_read(vcpu);
3851         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3852
3853         /*
3854          * Don't leak debug flags in case they were set for guest debugging
3855          */
3856         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3857                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3858
3859         vcpu_put(vcpu);
3860
3861         return 0;
3862 }
3863
3864 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3865 {
3866         vcpu_load(vcpu);
3867
3868         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3869         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3870         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3871         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3872         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3873         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3874         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3875         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3876 #ifdef CONFIG_X86_64
3877         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3878         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3879         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3880         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3881         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3882         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3883         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3884         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3885
3886 #endif
3887
3888         kvm_rip_write(vcpu, regs->rip);
3889         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3890
3891
3892         vcpu->arch.exception.pending = false;
3893
3894         vcpu_put(vcpu);
3895
3896         return 0;
3897 }
3898
3899 void kvm_get_segment(struct kvm_vcpu *vcpu,
3900                      struct kvm_segment *var, int seg)
3901 {
3902         kvm_x86_ops->get_segment(vcpu, var, seg);
3903 }
3904
3905 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3906 {
3907         struct kvm_segment cs;
3908
3909         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3910         *db = cs.db;
3911         *l = cs.l;
3912 }
3913 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3914
3915 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3916                                   struct kvm_sregs *sregs)
3917 {
3918         struct descriptor_table dt;
3919
3920         vcpu_load(vcpu);
3921
3922         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3923         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3924         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3925         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3926         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3927         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3928
3929         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3930         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3931
3932         kvm_x86_ops->get_idt(vcpu, &dt);
3933         sregs->idt.limit = dt.limit;
3934         sregs->idt.base = dt.base;
3935         kvm_x86_ops->get_gdt(vcpu, &dt);
3936         sregs->gdt.limit = dt.limit;
3937         sregs->gdt.base = dt.base;
3938
3939         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3940         sregs->cr0 = vcpu->arch.cr0;
3941         sregs->cr2 = vcpu->arch.cr2;
3942         sregs->cr3 = vcpu->arch.cr3;
3943         sregs->cr4 = vcpu->arch.cr4;
3944         sregs->cr8 = kvm_get_cr8(vcpu);
3945         sregs->efer = vcpu->arch.shadow_efer;
3946         sregs->apic_base = kvm_get_apic_base(vcpu);
3947
3948         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3949
3950         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3951                 set_bit(vcpu->arch.interrupt.nr,
3952                         (unsigned long *)sregs->interrupt_bitmap);
3953
3954         vcpu_put(vcpu);
3955
3956         return 0;
3957 }
3958
3959 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3960                                     struct kvm_mp_state *mp_state)
3961 {
3962         vcpu_load(vcpu);
3963         mp_state->mp_state = vcpu->arch.mp_state;
3964         vcpu_put(vcpu);
3965         return 0;
3966 }
3967
3968 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3969                                     struct kvm_mp_state *mp_state)
3970 {
3971         vcpu_load(vcpu);
3972         vcpu->arch.mp_state = mp_state->mp_state;
3973         vcpu_put(vcpu);
3974         return 0;
3975 }
3976
3977 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3978                         struct kvm_segment *var, int seg)
3979 {
3980         kvm_x86_ops->set_segment(vcpu, var, seg);
3981 }
3982
3983 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3984                                    struct kvm_segment *kvm_desct)
3985 {
3986         kvm_desct->base = get_desc_base(seg_desc);
3987         kvm_desct->limit = get_desc_limit(seg_desc);
3988         if (seg_desc->g) {
3989                 kvm_desct->limit <<= 12;
3990                 kvm_desct->limit |= 0xfff;
3991         }
3992         kvm_desct->selector = selector;
3993         kvm_desct->type = seg_desc->type;
3994         kvm_desct->present = seg_desc->p;
3995         kvm_desct->dpl = seg_desc->dpl;
3996         kvm_desct->db = seg_desc->d;
3997         kvm_desct->s = seg_desc->s;
3998         kvm_desct->l = seg_desc->l;
3999         kvm_desct->g = seg_desc->g;
4000         kvm_desct->avl = seg_desc->avl;
4001         if (!selector)
4002                 kvm_desct->unusable = 1;
4003         else
4004                 kvm_desct->unusable = 0;
4005         kvm_desct->padding = 0;
4006 }
4007
4008 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4009                                           u16 selector,
4010                                           struct descriptor_table *dtable)
4011 {
4012         if (selector & 1 << 2) {
4013                 struct kvm_segment kvm_seg;
4014
4015                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4016
4017                 if (kvm_seg.unusable)
4018                         dtable->limit = 0;
4019                 else
4020                         dtable->limit = kvm_seg.limit;
4021                 dtable->base = kvm_seg.base;
4022         }
4023         else
4024                 kvm_x86_ops->get_gdt(vcpu, dtable);
4025 }
4026
4027 /* allowed just for 8 bytes segments */
4028 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4029                                          struct desc_struct *seg_desc)
4030 {
4031         struct descriptor_table dtable;
4032         u16 index = selector >> 3;
4033
4034         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4035
4036         if (dtable.limit < index * 8 + 7) {
4037                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4038                 return 1;
4039         }
4040         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4041 }
4042
4043 /* allowed just for 8 bytes segments */
4044 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4045                                          struct desc_struct *seg_desc)
4046 {
4047         struct descriptor_table dtable;
4048         u16 index = selector >> 3;
4049
4050         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4051
4052         if (dtable.limit < index * 8 + 7)
4053                 return 1;
4054         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4055 }
4056
4057 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
4058                              struct desc_struct *seg_desc)
4059 {
4060         u32 base_addr = get_desc_base(seg_desc);
4061
4062         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4063 }
4064
4065 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4066 {
4067         struct kvm_segment kvm_seg;
4068
4069         kvm_get_segment(vcpu, &kvm_seg, seg);
4070         return kvm_seg.selector;
4071 }
4072
4073 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4074                                                 u16 selector,
4075                                                 struct kvm_segment *kvm_seg)
4076 {
4077         struct desc_struct seg_desc;
4078
4079         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4080                 return 1;
4081         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4082         return 0;
4083 }
4084
4085 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4086 {
4087         struct kvm_segment segvar = {
4088                 .base = selector << 4,
4089                 .limit = 0xffff,
4090                 .selector = selector,
4091                 .type = 3,
4092                 .present = 1,
4093                 .dpl = 3,
4094                 .db = 0,
4095                 .s = 1,
4096                 .l = 0,
4097                 .g = 0,
4098                 .avl = 0,
4099                 .unusable = 0,
4100         };
4101         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4102         return 0;
4103 }
4104
4105 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4106 {
4107         return (seg != VCPU_SREG_LDTR) &&
4108                 (seg != VCPU_SREG_TR) &&
4109                 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_VM);
4110 }
4111
4112 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4113                                 int type_bits, int seg)
4114 {
4115         struct kvm_segment kvm_seg;
4116
4117         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4118                 return kvm_load_realmode_segment(vcpu, selector, seg);
4119         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4120                 return 1;
4121         kvm_seg.type |= type_bits;
4122
4123         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4124             seg != VCPU_SREG_LDTR)
4125                 if (!kvm_seg.s)
4126                         kvm_seg.unusable = 1;
4127
4128         kvm_set_segment(vcpu, &kvm_seg, seg);
4129         return 0;
4130 }
4131
4132 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4133                                 struct tss_segment_32 *tss)
4134 {
4135         tss->cr3 = vcpu->arch.cr3;
4136         tss->eip = kvm_rip_read(vcpu);
4137         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4138         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4139         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4140         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4141         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4142         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4143         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4144         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4145         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4146         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4147         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4148         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4149         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4150         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4151         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4152         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4153 }
4154
4155 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4156                                   struct tss_segment_32 *tss)
4157 {
4158         kvm_set_cr3(vcpu, tss->cr3);
4159
4160         kvm_rip_write(vcpu, tss->eip);
4161         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4162
4163         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4164         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4165         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4166         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4167         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4168         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4169         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4170         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4171
4172         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4173                 return 1;
4174
4175         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4176                 return 1;
4177
4178         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4179                 return 1;
4180
4181         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4182                 return 1;
4183
4184         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4185                 return 1;
4186
4187         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4188                 return 1;
4189
4190         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4191                 return 1;
4192         return 0;
4193 }
4194
4195 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4196                                 struct tss_segment_16 *tss)
4197 {
4198         tss->ip = kvm_rip_read(vcpu);
4199         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4200         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4201         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4202         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4203         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4204         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4205         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4206         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4207         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4208
4209         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4210         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4211         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4212         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4213         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4214         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4215 }
4216
4217 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4218                                  struct tss_segment_16 *tss)
4219 {
4220         kvm_rip_write(vcpu, tss->ip);
4221         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4222         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4223         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4224         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4225         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4226         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4227         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4228         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4229         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4230
4231         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4232                 return 1;
4233
4234         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4235                 return 1;
4236
4237         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4238                 return 1;
4239
4240         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4241                 return 1;
4242
4243         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4244                 return 1;
4245         return 0;
4246 }
4247
4248 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4249                               u16 old_tss_sel, u32 old_tss_base,
4250                               struct desc_struct *nseg_desc)
4251 {
4252         struct tss_segment_16 tss_segment_16;
4253         int ret = 0;
4254
4255         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4256                            sizeof tss_segment_16))
4257                 goto out;
4258
4259         save_state_to_tss16(vcpu, &tss_segment_16);
4260
4261         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4262                             sizeof tss_segment_16))
4263                 goto out;
4264
4265         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4266                            &tss_segment_16, sizeof tss_segment_16))
4267                 goto out;
4268
4269         if (old_tss_sel != 0xffff) {
4270                 tss_segment_16.prev_task_link = old_tss_sel;
4271
4272                 if (kvm_write_guest(vcpu->kvm,
4273                                     get_tss_base_addr(vcpu, nseg_desc),
4274                                     &tss_segment_16.prev_task_link,
4275                                     sizeof tss_segment_16.prev_task_link))
4276                         goto out;
4277         }
4278
4279         if (load_state_from_tss16(vcpu, &tss_segment_16))
4280                 goto out;
4281
4282         ret = 1;
4283 out:
4284         return ret;
4285 }
4286
4287 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4288                        u16 old_tss_sel, u32 old_tss_base,
4289                        struct desc_struct *nseg_desc)
4290 {
4291         struct tss_segment_32 tss_segment_32;
4292         int ret = 0;
4293
4294         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4295                            sizeof tss_segment_32))
4296                 goto out;
4297
4298         save_state_to_tss32(vcpu, &tss_segment_32);
4299
4300         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4301                             sizeof tss_segment_32))
4302                 goto out;
4303
4304         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4305                            &tss_segment_32, sizeof tss_segment_32))
4306                 goto out;
4307
4308         if (old_tss_sel != 0xffff) {
4309                 tss_segment_32.prev_task_link = old_tss_sel;
4310
4311                 if (kvm_write_guest(vcpu->kvm,
4312                                     get_tss_base_addr(vcpu, nseg_desc),
4313                                     &tss_segment_32.prev_task_link,
4314                                     sizeof tss_segment_32.prev_task_link))
4315                         goto out;
4316         }
4317
4318         if (load_state_from_tss32(vcpu, &tss_segment_32))
4319                 goto out;
4320
4321         ret = 1;
4322 out:
4323         return ret;
4324 }
4325
4326 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4327 {
4328         struct kvm_segment tr_seg;
4329         struct desc_struct cseg_desc;
4330         struct desc_struct nseg_desc;
4331         int ret = 0;
4332         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4333         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4334
4335         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4336
4337         /* FIXME: Handle errors. Failure to read either TSS or their
4338          * descriptors should generate a pagefault.
4339          */
4340         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4341                 goto out;
4342
4343         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4344                 goto out;
4345
4346         if (reason != TASK_SWITCH_IRET) {
4347                 int cpl;
4348
4349                 cpl = kvm_x86_ops->get_cpl(vcpu);
4350                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4351                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4352                         return 1;
4353                 }
4354         }
4355
4356         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4357                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4358                 return 1;
4359         }
4360
4361         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4362                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4363                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4364         }
4365
4366         if (reason == TASK_SWITCH_IRET) {
4367                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4368                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4369         }
4370
4371         /* set back link to prev task only if NT bit is set in eflags
4372            note that old_tss_sel is not used afetr this point */
4373         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4374                 old_tss_sel = 0xffff;
4375
4376         /* set back link to prev task only if NT bit is set in eflags
4377            note that old_tss_sel is not used afetr this point */
4378         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4379                 old_tss_sel = 0xffff;
4380
4381         if (nseg_desc.type & 8)
4382                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4383                                          old_tss_base, &nseg_desc);
4384         else
4385                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4386                                          old_tss_base, &nseg_desc);
4387
4388         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4389                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4390                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4391         }
4392
4393         if (reason != TASK_SWITCH_IRET) {
4394                 nseg_desc.type |= (1 << 1);
4395                 save_guest_segment_descriptor(vcpu, tss_selector,
4396                                               &nseg_desc);
4397         }
4398
4399         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4400         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4401         tr_seg.type = 11;
4402         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4403 out:
4404         return ret;
4405 }
4406 EXPORT_SYMBOL_GPL(kvm_task_switch);
4407
4408 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4409                                   struct kvm_sregs *sregs)
4410 {
4411         int mmu_reset_needed = 0;
4412         int pending_vec, max_bits;
4413         struct descriptor_table dt;
4414
4415         vcpu_load(vcpu);
4416
4417         dt.limit = sregs->idt.limit;
4418         dt.base = sregs->idt.base;
4419         kvm_x86_ops->set_idt(vcpu, &dt);
4420         dt.limit = sregs->gdt.limit;
4421         dt.base = sregs->gdt.base;
4422         kvm_x86_ops->set_gdt(vcpu, &dt);
4423
4424         vcpu->arch.cr2 = sregs->cr2;
4425         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4426         vcpu->arch.cr3 = sregs->cr3;
4427
4428         kvm_set_cr8(vcpu, sregs->cr8);
4429
4430         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4431         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4432         kvm_set_apic_base(vcpu, sregs->apic_base);
4433
4434         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4435
4436         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4437         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4438         vcpu->arch.cr0 = sregs->cr0;
4439
4440         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4441         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4442         if (!is_long_mode(vcpu) && is_pae(vcpu))
4443                 load_pdptrs(vcpu, vcpu->arch.cr3);
4444
4445         if (mmu_reset_needed)
4446                 kvm_mmu_reset_context(vcpu);
4447
4448         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4449         pending_vec = find_first_bit(
4450                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4451         if (pending_vec < max_bits) {
4452                 kvm_queue_interrupt(vcpu, pending_vec, false);
4453                 pr_debug("Set back pending irq %d\n", pending_vec);
4454                 if (irqchip_in_kernel(vcpu->kvm))
4455                         kvm_pic_clear_isr_ack(vcpu->kvm);
4456         }
4457
4458         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4459         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4460         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4461         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4462         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4463         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4464
4465         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4466         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4467
4468         update_cr8_intercept(vcpu);
4469
4470         /* Older userspace won't unhalt the vcpu on reset. */
4471         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4472             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4473             !(vcpu->arch.cr0 & X86_CR0_PE))
4474                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4475
4476         vcpu_put(vcpu);
4477
4478         return 0;
4479 }
4480
4481 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4482                                         struct kvm_guest_debug *dbg)
4483 {
4484         int i, r;
4485
4486         vcpu_load(vcpu);
4487
4488         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4489             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4490                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4491                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4492                 vcpu->arch.switch_db_regs =
4493                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4494         } else {
4495                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4496                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4497                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4498         }
4499
4500         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4501
4502         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4503                 kvm_queue_exception(vcpu, DB_VECTOR);
4504         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4505                 kvm_queue_exception(vcpu, BP_VECTOR);
4506
4507         vcpu_put(vcpu);
4508
4509         return r;
4510 }
4511
4512 /*
4513  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4514  * we have asm/x86/processor.h
4515  */
4516 struct fxsave {
4517         u16     cwd;
4518         u16     swd;
4519         u16     twd;
4520         u16     fop;
4521         u64     rip;
4522         u64     rdp;
4523         u32     mxcsr;
4524         u32     mxcsr_mask;
4525         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4526 #ifdef CONFIG_X86_64
4527         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4528 #else
4529         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4530 #endif
4531 };
4532
4533 /*
4534  * Translate a guest virtual address to a guest physical address.
4535  */
4536 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4537                                     struct kvm_translation *tr)
4538 {
4539         unsigned long vaddr = tr->linear_address;
4540         gpa_t gpa;
4541
4542         vcpu_load(vcpu);
4543         down_read(&vcpu->kvm->slots_lock);
4544         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4545         up_read(&vcpu->kvm->slots_lock);
4546         tr->physical_address = gpa;
4547         tr->valid = gpa != UNMAPPED_GVA;
4548         tr->writeable = 1;
4549         tr->usermode = 0;
4550         vcpu_put(vcpu);
4551
4552         return 0;
4553 }
4554
4555 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4556 {
4557         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4558
4559         vcpu_load(vcpu);
4560
4561         memcpy(fpu->fpr, fxsave->st_space, 128);
4562         fpu->fcw = fxsave->cwd;
4563         fpu->fsw = fxsave->swd;
4564         fpu->ftwx = fxsave->twd;
4565         fpu->last_opcode = fxsave->fop;
4566         fpu->last_ip = fxsave->rip;
4567         fpu->last_dp = fxsave->rdp;
4568         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4569
4570         vcpu_put(vcpu);
4571
4572         return 0;
4573 }
4574
4575 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4576 {
4577         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4578
4579         vcpu_load(vcpu);
4580
4581         memcpy(fxsave->st_space, fpu->fpr, 128);
4582         fxsave->cwd = fpu->fcw;
4583         fxsave->swd = fpu->fsw;
4584         fxsave->twd = fpu->ftwx;
4585         fxsave->fop = fpu->last_opcode;
4586         fxsave->rip = fpu->last_ip;
4587         fxsave->rdp = fpu->last_dp;
4588         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4589
4590         vcpu_put(vcpu);
4591
4592         return 0;
4593 }
4594
4595 void fx_init(struct kvm_vcpu *vcpu)
4596 {
4597         unsigned after_mxcsr_mask;
4598
4599         /*
4600          * Touch the fpu the first time in non atomic context as if
4601          * this is the first fpu instruction the exception handler
4602          * will fire before the instruction returns and it'll have to
4603          * allocate ram with GFP_KERNEL.
4604          */
4605         if (!used_math())
4606                 kvm_fx_save(&vcpu->arch.host_fx_image);
4607
4608         /* Initialize guest FPU by resetting ours and saving into guest's */
4609         preempt_disable();
4610         kvm_fx_save(&vcpu->arch.host_fx_image);
4611         kvm_fx_finit();
4612         kvm_fx_save(&vcpu->arch.guest_fx_image);
4613         kvm_fx_restore(&vcpu->arch.host_fx_image);
4614         preempt_enable();
4615
4616         vcpu->arch.cr0 |= X86_CR0_ET;
4617         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4618         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4619         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4620                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4621 }
4622 EXPORT_SYMBOL_GPL(fx_init);
4623
4624 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4625 {
4626         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4627                 return;
4628
4629         vcpu->guest_fpu_loaded = 1;
4630         kvm_fx_save(&vcpu->arch.host_fx_image);
4631         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4632 }
4633 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4634
4635 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4636 {
4637         if (!vcpu->guest_fpu_loaded)
4638                 return;
4639
4640         vcpu->guest_fpu_loaded = 0;
4641         kvm_fx_save(&vcpu->arch.guest_fx_image);
4642         kvm_fx_restore(&vcpu->arch.host_fx_image);
4643         ++vcpu->stat.fpu_reload;
4644 }
4645 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4646
4647 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4648 {
4649         if (vcpu->arch.time_page) {
4650                 kvm_release_page_dirty(vcpu->arch.time_page);
4651                 vcpu->arch.time_page = NULL;
4652         }
4653
4654         kvm_x86_ops->vcpu_free(vcpu);
4655 }
4656
4657 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4658                                                 unsigned int id)
4659 {
4660         return kvm_x86_ops->vcpu_create(kvm, id);
4661 }
4662
4663 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4664 {
4665         int r;
4666
4667         /* We do fxsave: this must be aligned. */
4668         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4669
4670         vcpu->arch.mtrr_state.have_fixed = 1;
4671         vcpu_load(vcpu);
4672         r = kvm_arch_vcpu_reset(vcpu);
4673         if (r == 0)
4674                 r = kvm_mmu_setup(vcpu);
4675         vcpu_put(vcpu);
4676         if (r < 0)
4677                 goto free_vcpu;
4678
4679         return 0;
4680 free_vcpu:
4681         kvm_x86_ops->vcpu_free(vcpu);
4682         return r;
4683 }
4684
4685 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4686 {
4687         vcpu_load(vcpu);
4688         kvm_mmu_unload(vcpu);
4689         vcpu_put(vcpu);
4690
4691         kvm_x86_ops->vcpu_free(vcpu);
4692 }
4693
4694 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4695 {
4696         vcpu->arch.nmi_pending = false;
4697         vcpu->arch.nmi_injected = false;
4698
4699         vcpu->arch.switch_db_regs = 0;
4700         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4701         vcpu->arch.dr6 = DR6_FIXED_1;
4702         vcpu->arch.dr7 = DR7_FIXED_1;
4703
4704         return kvm_x86_ops->vcpu_reset(vcpu);
4705 }
4706
4707 void kvm_arch_hardware_enable(void *garbage)
4708 {
4709         kvm_x86_ops->hardware_enable(garbage);
4710 }
4711
4712 void kvm_arch_hardware_disable(void *garbage)
4713 {
4714         kvm_x86_ops->hardware_disable(garbage);
4715 }
4716
4717 int kvm_arch_hardware_setup(void)
4718 {
4719         return kvm_x86_ops->hardware_setup();
4720 }
4721
4722 void kvm_arch_hardware_unsetup(void)
4723 {
4724         kvm_x86_ops->hardware_unsetup();
4725 }
4726
4727 void kvm_arch_check_processor_compat(void *rtn)
4728 {
4729         kvm_x86_ops->check_processor_compatibility(rtn);
4730 }
4731
4732 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4733 {
4734         struct page *page;
4735         struct kvm *kvm;
4736         int r;
4737
4738         BUG_ON(vcpu->kvm == NULL);
4739         kvm = vcpu->kvm;
4740
4741         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4742         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4743                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4744         else
4745                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4746
4747         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4748         if (!page) {
4749                 r = -ENOMEM;
4750                 goto fail;
4751         }
4752         vcpu->arch.pio_data = page_address(page);
4753
4754         r = kvm_mmu_create(vcpu);
4755         if (r < 0)
4756                 goto fail_free_pio_data;
4757
4758         if (irqchip_in_kernel(kvm)) {
4759                 r = kvm_create_lapic(vcpu);
4760                 if (r < 0)
4761                         goto fail_mmu_destroy;
4762         }
4763
4764         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4765                                        GFP_KERNEL);
4766         if (!vcpu->arch.mce_banks) {
4767                 r = -ENOMEM;
4768                 goto fail_mmu_destroy;
4769         }
4770         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4771
4772         return 0;
4773
4774 fail_mmu_destroy:
4775         kvm_mmu_destroy(vcpu);
4776 fail_free_pio_data:
4777         free_page((unsigned long)vcpu->arch.pio_data);
4778 fail:
4779         return r;
4780 }
4781
4782 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4783 {
4784         kvm_free_lapic(vcpu);
4785         down_read(&vcpu->kvm->slots_lock);
4786         kvm_mmu_destroy(vcpu);
4787         up_read(&vcpu->kvm->slots_lock);
4788         free_page((unsigned long)vcpu->arch.pio_data);
4789 }
4790
4791 struct  kvm *kvm_arch_create_vm(void)
4792 {
4793         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4794
4795         if (!kvm)
4796                 return ERR_PTR(-ENOMEM);
4797
4798         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4799         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4800
4801         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4802         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4803
4804         rdtscll(kvm->arch.vm_init_tsc);
4805
4806         return kvm;
4807 }
4808
4809 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4810 {
4811         vcpu_load(vcpu);
4812         kvm_mmu_unload(vcpu);
4813         vcpu_put(vcpu);
4814 }
4815
4816 static void kvm_free_vcpus(struct kvm *kvm)
4817 {
4818         unsigned int i;
4819         struct kvm_vcpu *vcpu;
4820
4821         /*
4822          * Unpin any mmu pages first.
4823          */
4824         kvm_for_each_vcpu(i, vcpu, kvm)
4825                 kvm_unload_vcpu_mmu(vcpu);
4826         kvm_for_each_vcpu(i, vcpu, kvm)
4827                 kvm_arch_vcpu_free(vcpu);
4828
4829         mutex_lock(&kvm->lock);
4830         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4831                 kvm->vcpus[i] = NULL;
4832
4833         atomic_set(&kvm->online_vcpus, 0);
4834         mutex_unlock(&kvm->lock);
4835 }
4836
4837 void kvm_arch_sync_events(struct kvm *kvm)
4838 {
4839         kvm_free_all_assigned_devices(kvm);
4840 }
4841
4842 void kvm_arch_destroy_vm(struct kvm *kvm)
4843 {
4844         kvm_iommu_unmap_guest(kvm);
4845         kvm_free_pit(kvm);
4846         kfree(kvm->arch.vpic);
4847         kfree(kvm->arch.vioapic);
4848         kvm_free_vcpus(kvm);
4849         kvm_free_physmem(kvm);
4850         if (kvm->arch.apic_access_page)
4851                 put_page(kvm->arch.apic_access_page);
4852         if (kvm->arch.ept_identity_pagetable)
4853                 put_page(kvm->arch.ept_identity_pagetable);
4854         kfree(kvm);
4855 }
4856
4857 int kvm_arch_set_memory_region(struct kvm *kvm,
4858                                 struct kvm_userspace_memory_region *mem,
4859                                 struct kvm_memory_slot old,
4860                                 int user_alloc)
4861 {
4862         int npages = mem->memory_size >> PAGE_SHIFT;
4863         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4864
4865         /*To keep backward compatibility with older userspace,
4866          *x86 needs to hanlde !user_alloc case.
4867          */
4868         if (!user_alloc) {
4869                 if (npages && !old.rmap) {
4870                         unsigned long userspace_addr;
4871
4872                         down_write(&current->mm->mmap_sem);
4873                         userspace_addr = do_mmap(NULL, 0,
4874                                                  npages * PAGE_SIZE,
4875                                                  PROT_READ | PROT_WRITE,
4876                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4877                                                  0);
4878                         up_write(&current->mm->mmap_sem);
4879
4880                         if (IS_ERR((void *)userspace_addr))
4881                                 return PTR_ERR((void *)userspace_addr);
4882
4883                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4884                         spin_lock(&kvm->mmu_lock);
4885                         memslot->userspace_addr = userspace_addr;
4886                         spin_unlock(&kvm->mmu_lock);
4887                 } else {
4888                         if (!old.user_alloc && old.rmap) {
4889                                 int ret;
4890
4891                                 down_write(&current->mm->mmap_sem);
4892                                 ret = do_munmap(current->mm, old.userspace_addr,
4893                                                 old.npages * PAGE_SIZE);
4894                                 up_write(&current->mm->mmap_sem);
4895                                 if (ret < 0)
4896                                         printk(KERN_WARNING
4897                                        "kvm_vm_ioctl_set_memory_region: "
4898                                        "failed to munmap memory\n");
4899                         }
4900                 }
4901         }
4902
4903         spin_lock(&kvm->mmu_lock);
4904         if (!kvm->arch.n_requested_mmu_pages) {
4905                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4906                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4907         }
4908
4909         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4910         spin_unlock(&kvm->mmu_lock);
4911
4912         return 0;
4913 }
4914
4915 void kvm_arch_flush_shadow(struct kvm *kvm)
4916 {
4917         kvm_mmu_zap_all(kvm);
4918         kvm_reload_remote_mmus(kvm);
4919 }
4920
4921 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4922 {
4923         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4924                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4925                 || vcpu->arch.nmi_pending ||
4926                 (kvm_arch_interrupt_allowed(vcpu) &&
4927                  kvm_cpu_has_interrupt(vcpu));
4928 }
4929
4930 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4931 {
4932         int me;
4933         int cpu = vcpu->cpu;
4934
4935         if (waitqueue_active(&vcpu->wq)) {
4936                 wake_up_interruptible(&vcpu->wq);
4937                 ++vcpu->stat.halt_wakeup;
4938         }
4939
4940         me = get_cpu();
4941         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4942                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4943                         smp_send_reschedule(cpu);
4944         put_cpu();
4945 }
4946
4947 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4948 {
4949         return kvm_x86_ops->interrupt_allowed(vcpu);
4950 }
4951
4952 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4953 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4954 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);