2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
40 #include <asm/uaccess.h>
45 #define MAX_IO_MSRS 256
46 #define CR0_RESERVED_BITS \
47 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
48 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
49 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
50 #define CR4_RESERVED_BITS \
51 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
52 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
53 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
54 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 * - enable syscall per default because its emulated by KVM
59 * - enable LME and LMA per default on 64 bit KVM
62 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
67 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
68 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
71 struct kvm_cpuid_entry2 __user *entries);
72 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
73 u32 function, u32 index);
75 struct kvm_x86_ops *kvm_x86_ops;
76 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78 struct kvm_stats_debugfs_item debugfs_entries[] = {
79 { "pf_fixed", VCPU_STAT(pf_fixed) },
80 { "pf_guest", VCPU_STAT(pf_guest) },
81 { "tlb_flush", VCPU_STAT(tlb_flush) },
82 { "invlpg", VCPU_STAT(invlpg) },
83 { "exits", VCPU_STAT(exits) },
84 { "io_exits", VCPU_STAT(io_exits) },
85 { "mmio_exits", VCPU_STAT(mmio_exits) },
86 { "signal_exits", VCPU_STAT(signal_exits) },
87 { "irq_window", VCPU_STAT(irq_window_exits) },
88 { "nmi_window", VCPU_STAT(nmi_window_exits) },
89 { "halt_exits", VCPU_STAT(halt_exits) },
90 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
91 { "hypercalls", VCPU_STAT(hypercalls) },
92 { "request_irq", VCPU_STAT(request_irq_exits) },
93 { "request_nmi", VCPU_STAT(request_nmi_exits) },
94 { "irq_exits", VCPU_STAT(irq_exits) },
95 { "host_state_reload", VCPU_STAT(host_state_reload) },
96 { "efer_reload", VCPU_STAT(efer_reload) },
97 { "fpu_reload", VCPU_STAT(fpu_reload) },
98 { "insn_emulation", VCPU_STAT(insn_emulation) },
99 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
100 { "irq_injections", VCPU_STAT(irq_injections) },
101 { "nmi_injections", VCPU_STAT(nmi_injections) },
102 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
103 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
104 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
105 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
106 { "mmu_flooded", VM_STAT(mmu_flooded) },
107 { "mmu_recycled", VM_STAT(mmu_recycled) },
108 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
109 { "mmu_unsync", VM_STAT(mmu_unsync) },
110 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
111 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
112 { "largepages", VM_STAT(lpages) },
116 unsigned long segment_base(u16 selector)
118 struct descriptor_table gdt;
119 struct desc_struct *d;
120 unsigned long table_base;
126 asm("sgdt %0" : "=m"(gdt));
127 table_base = gdt.base;
129 if (selector & 4) { /* from ldt */
132 asm("sldt %0" : "=g"(ldt_selector));
133 table_base = segment_base(ldt_selector);
135 d = (struct desc_struct *)(table_base + (selector & ~7));
136 v = d->base0 | ((unsigned long)d->base1 << 16) |
137 ((unsigned long)d->base2 << 24);
139 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
140 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
144 EXPORT_SYMBOL_GPL(segment_base);
146 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
148 if (irqchip_in_kernel(vcpu->kvm))
149 return vcpu->arch.apic_base;
151 return vcpu->arch.apic_base;
153 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
155 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
157 /* TODO: reserve bits check */
158 if (irqchip_in_kernel(vcpu->kvm))
159 kvm_lapic_set_base(vcpu, data);
161 vcpu->arch.apic_base = data;
163 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
165 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
167 WARN_ON(vcpu->arch.exception.pending);
168 vcpu->arch.exception.pending = true;
169 vcpu->arch.exception.has_error_code = false;
170 vcpu->arch.exception.nr = nr;
172 EXPORT_SYMBOL_GPL(kvm_queue_exception);
174 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
177 ++vcpu->stat.pf_guest;
179 if (vcpu->arch.exception.pending) {
180 if (vcpu->arch.exception.nr == PF_VECTOR) {
181 printk(KERN_DEBUG "kvm: inject_page_fault:"
182 " double fault 0x%lx\n", addr);
183 vcpu->arch.exception.nr = DF_VECTOR;
184 vcpu->arch.exception.error_code = 0;
185 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
186 /* triple fault -> shutdown */
187 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
191 vcpu->arch.cr2 = addr;
192 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
195 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
197 vcpu->arch.nmi_pending = 1;
199 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
201 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
203 WARN_ON(vcpu->arch.exception.pending);
204 vcpu->arch.exception.pending = true;
205 vcpu->arch.exception.has_error_code = true;
206 vcpu->arch.exception.nr = nr;
207 vcpu->arch.exception.error_code = error_code;
209 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
211 static void __queue_exception(struct kvm_vcpu *vcpu)
213 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
214 vcpu->arch.exception.has_error_code,
215 vcpu->arch.exception.error_code);
219 * Load the pae pdptrs. Return true is they are all valid.
221 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
223 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
224 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
227 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
229 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
230 offset * sizeof(u64), sizeof(pdpte));
235 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
236 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
243 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
248 EXPORT_SYMBOL_GPL(load_pdptrs);
250 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
252 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
256 if (is_long_mode(vcpu) || !is_pae(vcpu))
259 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
262 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
268 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
270 if (cr0 & CR0_RESERVED_BITS) {
271 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
272 cr0, vcpu->arch.cr0);
273 kvm_inject_gp(vcpu, 0);
277 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
278 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
279 kvm_inject_gp(vcpu, 0);
283 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
284 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
285 "and a clear PE flag\n");
286 kvm_inject_gp(vcpu, 0);
290 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
292 if ((vcpu->arch.shadow_efer & EFER_LME)) {
296 printk(KERN_DEBUG "set_cr0: #GP, start paging "
297 "in long mode while PAE is disabled\n");
298 kvm_inject_gp(vcpu, 0);
301 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
303 printk(KERN_DEBUG "set_cr0: #GP, start paging "
304 "in long mode while CS.L == 1\n");
305 kvm_inject_gp(vcpu, 0);
311 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
312 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
314 kvm_inject_gp(vcpu, 0);
320 kvm_x86_ops->set_cr0(vcpu, cr0);
321 vcpu->arch.cr0 = cr0;
323 kvm_mmu_sync_global(vcpu);
324 kvm_mmu_reset_context(vcpu);
327 EXPORT_SYMBOL_GPL(kvm_set_cr0);
329 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
331 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
332 KVMTRACE_1D(LMSW, vcpu,
333 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
336 EXPORT_SYMBOL_GPL(kvm_lmsw);
338 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
340 if (cr4 & CR4_RESERVED_BITS) {
341 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
342 kvm_inject_gp(vcpu, 0);
346 if (is_long_mode(vcpu)) {
347 if (!(cr4 & X86_CR4_PAE)) {
348 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
350 kvm_inject_gp(vcpu, 0);
353 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
354 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
355 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
356 kvm_inject_gp(vcpu, 0);
360 if (cr4 & X86_CR4_VMXE) {
361 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
362 kvm_inject_gp(vcpu, 0);
365 kvm_x86_ops->set_cr4(vcpu, cr4);
366 vcpu->arch.cr4 = cr4;
367 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
368 kvm_mmu_sync_global(vcpu);
369 kvm_mmu_reset_context(vcpu);
371 EXPORT_SYMBOL_GPL(kvm_set_cr4);
373 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
375 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
376 kvm_mmu_sync_roots(vcpu);
377 kvm_mmu_flush_tlb(vcpu);
381 if (is_long_mode(vcpu)) {
382 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
383 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
384 kvm_inject_gp(vcpu, 0);
389 if (cr3 & CR3_PAE_RESERVED_BITS) {
391 "set_cr3: #GP, reserved bits\n");
392 kvm_inject_gp(vcpu, 0);
395 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
396 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
398 kvm_inject_gp(vcpu, 0);
403 * We don't check reserved bits in nonpae mode, because
404 * this isn't enforced, and VMware depends on this.
409 * Does the new cr3 value map to physical memory? (Note, we
410 * catch an invalid cr3 even in real-mode, because it would
411 * cause trouble later on when we turn on paging anyway.)
413 * A real CPU would silently accept an invalid cr3 and would
414 * attempt to use it - with largely undefined (and often hard
415 * to debug) behavior on the guest side.
417 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
418 kvm_inject_gp(vcpu, 0);
420 vcpu->arch.cr3 = cr3;
421 vcpu->arch.mmu.new_cr3(vcpu);
424 EXPORT_SYMBOL_GPL(kvm_set_cr3);
426 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
428 if (cr8 & CR8_RESERVED_BITS) {
429 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
430 kvm_inject_gp(vcpu, 0);
433 if (irqchip_in_kernel(vcpu->kvm))
434 kvm_lapic_set_tpr(vcpu, cr8);
436 vcpu->arch.cr8 = cr8;
438 EXPORT_SYMBOL_GPL(kvm_set_cr8);
440 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
442 if (irqchip_in_kernel(vcpu->kvm))
443 return kvm_lapic_get_cr8(vcpu);
445 return vcpu->arch.cr8;
447 EXPORT_SYMBOL_GPL(kvm_get_cr8);
449 static inline u32 bit(int bitno)
451 return 1 << (bitno & 31);
455 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
456 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
458 * This list is modified at module load time to reflect the
459 * capabilities of the host cpu.
461 static u32 msrs_to_save[] = {
462 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
465 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
467 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
468 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
471 static unsigned num_msrs_to_save;
473 static u32 emulated_msrs[] = {
474 MSR_IA32_MISC_ENABLE,
477 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
479 if (efer & efer_reserved_bits) {
480 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
482 kvm_inject_gp(vcpu, 0);
487 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
488 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
489 kvm_inject_gp(vcpu, 0);
493 if (efer & EFER_SVME) {
494 struct kvm_cpuid_entry2 *feat;
496 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
497 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
498 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
499 kvm_inject_gp(vcpu, 0);
504 kvm_x86_ops->set_efer(vcpu, efer);
507 efer |= vcpu->arch.shadow_efer & EFER_LMA;
509 vcpu->arch.shadow_efer = efer;
512 void kvm_enable_efer_bits(u64 mask)
514 efer_reserved_bits &= ~mask;
516 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
520 * Writes msr value into into the appropriate "register".
521 * Returns 0 on success, non-0 otherwise.
522 * Assumes vcpu_load() was already called.
524 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
526 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
530 * Adapt set_msr() to msr_io()'s calling convention
532 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
534 return kvm_set_msr(vcpu, index, *data);
537 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
540 struct pvclock_wall_clock wc;
541 struct timespec now, sys, boot;
548 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
551 * The guest calculates current wall clock time by adding
552 * system time (updated by kvm_write_guest_time below) to the
553 * wall clock specified here. guest system time equals host
554 * system time for us, thus we must fill in host boot time here.
556 now = current_kernel_time();
558 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
560 wc.sec = boot.tv_sec;
561 wc.nsec = boot.tv_nsec;
562 wc.version = version;
564 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
567 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
570 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
572 uint32_t quotient, remainder;
574 /* Don't try to replace with do_div(), this one calculates
575 * "(dividend << 32) / divisor" */
577 : "=a" (quotient), "=d" (remainder)
578 : "0" (0), "1" (dividend), "r" (divisor) );
582 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
584 uint64_t nsecs = 1000000000LL;
589 tps64 = tsc_khz * 1000LL;
590 while (tps64 > nsecs*2) {
595 tps32 = (uint32_t)tps64;
596 while (tps32 <= (uint32_t)nsecs) {
601 hv_clock->tsc_shift = shift;
602 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
604 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
605 __func__, tsc_khz, hv_clock->tsc_shift,
606 hv_clock->tsc_to_system_mul);
609 static void kvm_write_guest_time(struct kvm_vcpu *v)
613 struct kvm_vcpu_arch *vcpu = &v->arch;
616 if ((!vcpu->time_page))
619 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
620 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
621 vcpu->hv_clock_tsc_khz = tsc_khz;
624 /* Keep irq disabled to prevent changes to the clock */
625 local_irq_save(flags);
626 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
627 &vcpu->hv_clock.tsc_timestamp);
629 local_irq_restore(flags);
631 /* With all the info we got, fill in the values */
633 vcpu->hv_clock.system_time = ts.tv_nsec +
634 (NSEC_PER_SEC * (u64)ts.tv_sec);
636 * The interface expects us to write an even number signaling that the
637 * update is finished. Since the guest won't see the intermediate
638 * state, we just increase by 2 at the end.
640 vcpu->hv_clock.version += 2;
642 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
644 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
645 sizeof(vcpu->hv_clock));
647 kunmap_atomic(shared_kaddr, KM_USER0);
649 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
652 static bool msr_mtrr_valid(unsigned msr)
655 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
656 case MSR_MTRRfix64K_00000:
657 case MSR_MTRRfix16K_80000:
658 case MSR_MTRRfix16K_A0000:
659 case MSR_MTRRfix4K_C0000:
660 case MSR_MTRRfix4K_C8000:
661 case MSR_MTRRfix4K_D0000:
662 case MSR_MTRRfix4K_D8000:
663 case MSR_MTRRfix4K_E0000:
664 case MSR_MTRRfix4K_E8000:
665 case MSR_MTRRfix4K_F0000:
666 case MSR_MTRRfix4K_F8000:
667 case MSR_MTRRdefType:
668 case MSR_IA32_CR_PAT:
676 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
678 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
680 if (!msr_mtrr_valid(msr))
683 if (msr == MSR_MTRRdefType) {
684 vcpu->arch.mtrr_state.def_type = data;
685 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
686 } else if (msr == MSR_MTRRfix64K_00000)
688 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
689 p[1 + msr - MSR_MTRRfix16K_80000] = data;
690 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
691 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
692 else if (msr == MSR_IA32_CR_PAT)
693 vcpu->arch.pat = data;
694 else { /* Variable MTRRs */
695 int idx, is_mtrr_mask;
698 idx = (msr - 0x200) / 2;
699 is_mtrr_mask = msr - 0x200 - 2 * idx;
702 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
705 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
709 kvm_mmu_reset_context(vcpu);
713 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
717 set_efer(vcpu, data);
719 case MSR_IA32_MC0_STATUS:
720 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
723 case MSR_IA32_MCG_STATUS:
724 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
727 case MSR_IA32_MCG_CTL:
728 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
731 case MSR_IA32_DEBUGCTLMSR:
733 /* We support the non-activated case already */
735 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
736 /* Values other than LBR and BTF are vendor-specific,
737 thus reserved and should throw a #GP */
740 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
743 case MSR_IA32_UCODE_REV:
744 case MSR_IA32_UCODE_WRITE:
745 case MSR_VM_HSAVE_PA:
747 case 0x200 ... 0x2ff:
748 return set_msr_mtrr(vcpu, msr, data);
749 case MSR_IA32_APICBASE:
750 kvm_set_apic_base(vcpu, data);
752 case MSR_IA32_MISC_ENABLE:
753 vcpu->arch.ia32_misc_enable_msr = data;
755 case MSR_KVM_WALL_CLOCK:
756 vcpu->kvm->arch.wall_clock = data;
757 kvm_write_wall_clock(vcpu->kvm, data);
759 case MSR_KVM_SYSTEM_TIME: {
760 if (vcpu->arch.time_page) {
761 kvm_release_page_dirty(vcpu->arch.time_page);
762 vcpu->arch.time_page = NULL;
765 vcpu->arch.time = data;
767 /* we verify if the enable bit is set... */
771 /* ...but clean it before doing the actual write */
772 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
774 vcpu->arch.time_page =
775 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
777 if (is_error_page(vcpu->arch.time_page)) {
778 kvm_release_page_clean(vcpu->arch.time_page);
779 vcpu->arch.time_page = NULL;
782 kvm_write_guest_time(vcpu);
786 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
791 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
795 * Reads an msr value (of 'msr_index') into 'pdata'.
796 * Returns 0 on success, non-0 otherwise.
797 * Assumes vcpu_load() was already called.
799 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
801 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
804 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
806 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
808 if (!msr_mtrr_valid(msr))
811 if (msr == MSR_MTRRdefType)
812 *pdata = vcpu->arch.mtrr_state.def_type +
813 (vcpu->arch.mtrr_state.enabled << 10);
814 else if (msr == MSR_MTRRfix64K_00000)
816 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
817 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
818 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
819 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
820 else if (msr == MSR_IA32_CR_PAT)
821 *pdata = vcpu->arch.pat;
822 else { /* Variable MTRRs */
823 int idx, is_mtrr_mask;
826 idx = (msr - 0x200) / 2;
827 is_mtrr_mask = msr - 0x200 - 2 * idx;
830 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
833 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
840 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
845 case 0xc0010010: /* SYSCFG */
846 case 0xc0010015: /* HWCR */
847 case MSR_IA32_PLATFORM_ID:
848 case MSR_IA32_P5_MC_ADDR:
849 case MSR_IA32_P5_MC_TYPE:
850 case MSR_IA32_MC0_CTL:
851 case MSR_IA32_MCG_STATUS:
852 case MSR_IA32_MCG_CAP:
853 case MSR_IA32_MCG_CTL:
854 case MSR_IA32_MC0_MISC:
855 case MSR_IA32_MC0_MISC+4:
856 case MSR_IA32_MC0_MISC+8:
857 case MSR_IA32_MC0_MISC+12:
858 case MSR_IA32_MC0_MISC+16:
859 case MSR_IA32_MC0_MISC+20:
860 case MSR_IA32_UCODE_REV:
861 case MSR_IA32_EBL_CR_POWERON:
862 case MSR_IA32_DEBUGCTLMSR:
863 case MSR_IA32_LASTBRANCHFROMIP:
864 case MSR_IA32_LASTBRANCHTOIP:
865 case MSR_IA32_LASTINTFROMIP:
866 case MSR_IA32_LASTINTTOIP:
867 case MSR_VM_HSAVE_PA:
871 data = 0x500 | KVM_NR_VAR_MTRR;
873 case 0x200 ... 0x2ff:
874 return get_msr_mtrr(vcpu, msr, pdata);
875 case 0xcd: /* fsb frequency */
878 case MSR_IA32_APICBASE:
879 data = kvm_get_apic_base(vcpu);
881 case MSR_IA32_MISC_ENABLE:
882 data = vcpu->arch.ia32_misc_enable_msr;
884 case MSR_IA32_PERF_STATUS:
885 /* TSC increment by tick */
888 data |= (((uint64_t)4ULL) << 40);
891 data = vcpu->arch.shadow_efer;
893 case MSR_KVM_WALL_CLOCK:
894 data = vcpu->kvm->arch.wall_clock;
896 case MSR_KVM_SYSTEM_TIME:
897 data = vcpu->arch.time;
900 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
906 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
909 * Read or write a bunch of msrs. All parameters are kernel addresses.
911 * @return number of msrs set successfully.
913 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
914 struct kvm_msr_entry *entries,
915 int (*do_msr)(struct kvm_vcpu *vcpu,
916 unsigned index, u64 *data))
922 down_read(&vcpu->kvm->slots_lock);
923 for (i = 0; i < msrs->nmsrs; ++i)
924 if (do_msr(vcpu, entries[i].index, &entries[i].data))
926 up_read(&vcpu->kvm->slots_lock);
934 * Read or write a bunch of msrs. Parameters are user addresses.
936 * @return number of msrs set successfully.
938 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
939 int (*do_msr)(struct kvm_vcpu *vcpu,
940 unsigned index, u64 *data),
943 struct kvm_msrs msrs;
944 struct kvm_msr_entry *entries;
949 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
953 if (msrs.nmsrs >= MAX_IO_MSRS)
957 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
958 entries = vmalloc(size);
963 if (copy_from_user(entries, user_msrs->entries, size))
966 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
971 if (writeback && copy_to_user(user_msrs->entries, entries, size))
982 int kvm_dev_ioctl_check_extension(long ext)
987 case KVM_CAP_IRQCHIP:
989 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
990 case KVM_CAP_SET_TSS_ADDR:
991 case KVM_CAP_EXT_CPUID:
993 case KVM_CAP_NOP_IO_DELAY:
994 case KVM_CAP_MP_STATE:
995 case KVM_CAP_SYNC_MMU:
996 case KVM_CAP_REINJECT_CONTROL:
999 case KVM_CAP_COALESCED_MMIO:
1000 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1003 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1005 case KVM_CAP_NR_VCPUS:
1008 case KVM_CAP_NR_MEMSLOTS:
1009 r = KVM_MEMORY_SLOTS;
1011 case KVM_CAP_PV_MMU:
1017 case KVM_CAP_CLOCKSOURCE:
1018 r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC);
1028 long kvm_arch_dev_ioctl(struct file *filp,
1029 unsigned int ioctl, unsigned long arg)
1031 void __user *argp = (void __user *)arg;
1035 case KVM_GET_MSR_INDEX_LIST: {
1036 struct kvm_msr_list __user *user_msr_list = argp;
1037 struct kvm_msr_list msr_list;
1041 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1044 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1045 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1048 if (n < num_msrs_to_save)
1051 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1052 num_msrs_to_save * sizeof(u32)))
1054 if (copy_to_user(user_msr_list->indices
1055 + num_msrs_to_save * sizeof(u32),
1057 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1062 case KVM_GET_SUPPORTED_CPUID: {
1063 struct kvm_cpuid2 __user *cpuid_arg = argp;
1064 struct kvm_cpuid2 cpuid;
1067 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1069 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1070 cpuid_arg->entries);
1075 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1087 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1089 kvm_x86_ops->vcpu_load(vcpu, cpu);
1090 kvm_write_guest_time(vcpu);
1093 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1095 kvm_x86_ops->vcpu_put(vcpu);
1096 kvm_put_guest_fpu(vcpu);
1099 static int is_efer_nx(void)
1103 rdmsrl(MSR_EFER, efer);
1104 return efer & EFER_NX;
1107 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1110 struct kvm_cpuid_entry2 *e, *entry;
1113 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1114 e = &vcpu->arch.cpuid_entries[i];
1115 if (e->function == 0x80000001) {
1120 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1121 entry->edx &= ~(1 << 20);
1122 printk(KERN_INFO "kvm: guest NX capability removed\n");
1126 /* when an old userspace process fills a new kernel module */
1127 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1128 struct kvm_cpuid *cpuid,
1129 struct kvm_cpuid_entry __user *entries)
1132 struct kvm_cpuid_entry *cpuid_entries;
1135 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1138 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1142 if (copy_from_user(cpuid_entries, entries,
1143 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1145 for (i = 0; i < cpuid->nent; i++) {
1146 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1147 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1148 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1149 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1150 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1151 vcpu->arch.cpuid_entries[i].index = 0;
1152 vcpu->arch.cpuid_entries[i].flags = 0;
1153 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1154 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1155 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1157 vcpu->arch.cpuid_nent = cpuid->nent;
1158 cpuid_fix_nx_cap(vcpu);
1162 vfree(cpuid_entries);
1167 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1168 struct kvm_cpuid2 *cpuid,
1169 struct kvm_cpuid_entry2 __user *entries)
1174 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1177 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1178 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1180 vcpu->arch.cpuid_nent = cpuid->nent;
1187 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1188 struct kvm_cpuid2 *cpuid,
1189 struct kvm_cpuid_entry2 __user *entries)
1194 if (cpuid->nent < vcpu->arch.cpuid_nent)
1197 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1198 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1203 cpuid->nent = vcpu->arch.cpuid_nent;
1207 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1210 entry->function = function;
1211 entry->index = index;
1212 cpuid_count(entry->function, entry->index,
1213 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1217 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1218 u32 index, int *nent, int maxnent)
1220 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1221 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1222 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1223 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1224 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1225 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1226 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1227 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1228 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1229 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1230 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1231 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1232 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1233 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1234 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1235 bit(X86_FEATURE_PGE) |
1236 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1237 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1238 bit(X86_FEATURE_SYSCALL) |
1239 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1240 #ifdef CONFIG_X86_64
1241 bit(X86_FEATURE_LM) |
1243 bit(X86_FEATURE_MMXEXT) |
1244 bit(X86_FEATURE_3DNOWEXT) |
1245 bit(X86_FEATURE_3DNOW);
1246 const u32 kvm_supported_word3_x86_features =
1247 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1248 const u32 kvm_supported_word6_x86_features =
1249 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1250 bit(X86_FEATURE_SVM);
1252 /* all calls to cpuid_count() should be made on the same cpu */
1254 do_cpuid_1_ent(entry, function, index);
1259 entry->eax = min(entry->eax, (u32)0xb);
1262 entry->edx &= kvm_supported_word0_x86_features;
1263 entry->ecx &= kvm_supported_word3_x86_features;
1265 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1266 * may return different values. This forces us to get_cpu() before
1267 * issuing the first command, and also to emulate this annoying behavior
1268 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1270 int t, times = entry->eax & 0xff;
1272 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1273 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1274 for (t = 1; t < times && *nent < maxnent; ++t) {
1275 do_cpuid_1_ent(&entry[t], function, 0);
1276 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1281 /* function 4 and 0xb have additional index. */
1285 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1286 /* read more entries until cache_type is zero */
1287 for (i = 1; *nent < maxnent; ++i) {
1288 cache_type = entry[i - 1].eax & 0x1f;
1291 do_cpuid_1_ent(&entry[i], function, i);
1293 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1301 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1302 /* read more entries until level_type is zero */
1303 for (i = 1; *nent < maxnent; ++i) {
1304 level_type = entry[i - 1].ecx & 0xff00;
1307 do_cpuid_1_ent(&entry[i], function, i);
1309 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1315 entry->eax = min(entry->eax, 0x8000001a);
1318 entry->edx &= kvm_supported_word1_x86_features;
1319 entry->ecx &= kvm_supported_word6_x86_features;
1325 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1326 struct kvm_cpuid_entry2 __user *entries)
1328 struct kvm_cpuid_entry2 *cpuid_entries;
1329 int limit, nent = 0, r = -E2BIG;
1332 if (cpuid->nent < 1)
1335 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1339 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1340 limit = cpuid_entries[0].eax;
1341 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1342 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1343 &nent, cpuid->nent);
1345 if (nent >= cpuid->nent)
1348 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1349 limit = cpuid_entries[nent - 1].eax;
1350 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1351 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1352 &nent, cpuid->nent);
1354 if (copy_to_user(entries, cpuid_entries,
1355 nent * sizeof(struct kvm_cpuid_entry2)))
1361 vfree(cpuid_entries);
1366 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1367 struct kvm_lapic_state *s)
1370 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1376 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1377 struct kvm_lapic_state *s)
1380 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1381 kvm_apic_post_state_restore(vcpu);
1387 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1388 struct kvm_interrupt *irq)
1390 if (irq->irq < 0 || irq->irq >= 256)
1392 if (irqchip_in_kernel(vcpu->kvm))
1396 set_bit(irq->irq, vcpu->arch.irq_pending);
1397 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1404 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1407 kvm_inject_nmi(vcpu);
1413 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1414 struct kvm_tpr_access_ctl *tac)
1418 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1422 long kvm_arch_vcpu_ioctl(struct file *filp,
1423 unsigned int ioctl, unsigned long arg)
1425 struct kvm_vcpu *vcpu = filp->private_data;
1426 void __user *argp = (void __user *)arg;
1428 struct kvm_lapic_state *lapic = NULL;
1431 case KVM_GET_LAPIC: {
1432 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1437 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1441 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1446 case KVM_SET_LAPIC: {
1447 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1452 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1454 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1460 case KVM_INTERRUPT: {
1461 struct kvm_interrupt irq;
1464 if (copy_from_user(&irq, argp, sizeof irq))
1466 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1473 r = kvm_vcpu_ioctl_nmi(vcpu);
1479 case KVM_SET_CPUID: {
1480 struct kvm_cpuid __user *cpuid_arg = argp;
1481 struct kvm_cpuid cpuid;
1484 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1486 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1491 case KVM_SET_CPUID2: {
1492 struct kvm_cpuid2 __user *cpuid_arg = argp;
1493 struct kvm_cpuid2 cpuid;
1496 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1498 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1499 cpuid_arg->entries);
1504 case KVM_GET_CPUID2: {
1505 struct kvm_cpuid2 __user *cpuid_arg = argp;
1506 struct kvm_cpuid2 cpuid;
1509 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1511 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1512 cpuid_arg->entries);
1516 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1522 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1525 r = msr_io(vcpu, argp, do_set_msr, 0);
1527 case KVM_TPR_ACCESS_REPORTING: {
1528 struct kvm_tpr_access_ctl tac;
1531 if (copy_from_user(&tac, argp, sizeof tac))
1533 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1537 if (copy_to_user(argp, &tac, sizeof tac))
1542 case KVM_SET_VAPIC_ADDR: {
1543 struct kvm_vapic_addr va;
1546 if (!irqchip_in_kernel(vcpu->kvm))
1549 if (copy_from_user(&va, argp, sizeof va))
1552 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1564 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1568 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1570 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1574 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1575 u32 kvm_nr_mmu_pages)
1577 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1580 down_write(&kvm->slots_lock);
1582 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1583 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1585 up_write(&kvm->slots_lock);
1589 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1591 return kvm->arch.n_alloc_mmu_pages;
1594 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1597 struct kvm_mem_alias *alias;
1599 for (i = 0; i < kvm->arch.naliases; ++i) {
1600 alias = &kvm->arch.aliases[i];
1601 if (gfn >= alias->base_gfn
1602 && gfn < alias->base_gfn + alias->npages)
1603 return alias->target_gfn + gfn - alias->base_gfn;
1609 * Set a new alias region. Aliases map a portion of physical memory into
1610 * another portion. This is useful for memory windows, for example the PC
1613 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1614 struct kvm_memory_alias *alias)
1617 struct kvm_mem_alias *p;
1620 /* General sanity checks */
1621 if (alias->memory_size & (PAGE_SIZE - 1))
1623 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1625 if (alias->slot >= KVM_ALIAS_SLOTS)
1627 if (alias->guest_phys_addr + alias->memory_size
1628 < alias->guest_phys_addr)
1630 if (alias->target_phys_addr + alias->memory_size
1631 < alias->target_phys_addr)
1634 down_write(&kvm->slots_lock);
1635 spin_lock(&kvm->mmu_lock);
1637 p = &kvm->arch.aliases[alias->slot];
1638 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1639 p->npages = alias->memory_size >> PAGE_SHIFT;
1640 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1642 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1643 if (kvm->arch.aliases[n - 1].npages)
1645 kvm->arch.naliases = n;
1647 spin_unlock(&kvm->mmu_lock);
1648 kvm_mmu_zap_all(kvm);
1650 up_write(&kvm->slots_lock);
1658 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1663 switch (chip->chip_id) {
1664 case KVM_IRQCHIP_PIC_MASTER:
1665 memcpy(&chip->chip.pic,
1666 &pic_irqchip(kvm)->pics[0],
1667 sizeof(struct kvm_pic_state));
1669 case KVM_IRQCHIP_PIC_SLAVE:
1670 memcpy(&chip->chip.pic,
1671 &pic_irqchip(kvm)->pics[1],
1672 sizeof(struct kvm_pic_state));
1674 case KVM_IRQCHIP_IOAPIC:
1675 memcpy(&chip->chip.ioapic,
1676 ioapic_irqchip(kvm),
1677 sizeof(struct kvm_ioapic_state));
1686 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1691 switch (chip->chip_id) {
1692 case KVM_IRQCHIP_PIC_MASTER:
1693 memcpy(&pic_irqchip(kvm)->pics[0],
1695 sizeof(struct kvm_pic_state));
1697 case KVM_IRQCHIP_PIC_SLAVE:
1698 memcpy(&pic_irqchip(kvm)->pics[1],
1700 sizeof(struct kvm_pic_state));
1702 case KVM_IRQCHIP_IOAPIC:
1703 memcpy(ioapic_irqchip(kvm),
1705 sizeof(struct kvm_ioapic_state));
1711 kvm_pic_update_irq(pic_irqchip(kvm));
1715 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1719 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1723 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1727 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1728 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1732 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1733 struct kvm_reinject_control *control)
1735 if (!kvm->arch.vpit)
1737 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1742 * Get (and clear) the dirty memory log for a memory slot.
1744 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1745 struct kvm_dirty_log *log)
1749 struct kvm_memory_slot *memslot;
1752 down_write(&kvm->slots_lock);
1754 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1758 /* If nothing is dirty, don't bother messing with page tables. */
1760 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1761 kvm_flush_remote_tlbs(kvm);
1762 memslot = &kvm->memslots[log->slot];
1763 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1764 memset(memslot->dirty_bitmap, 0, n);
1768 up_write(&kvm->slots_lock);
1772 long kvm_arch_vm_ioctl(struct file *filp,
1773 unsigned int ioctl, unsigned long arg)
1775 struct kvm *kvm = filp->private_data;
1776 void __user *argp = (void __user *)arg;
1779 * This union makes it completely explicit to gcc-3.x
1780 * that these two variables' stack usage should be
1781 * combined, not added together.
1784 struct kvm_pit_state ps;
1785 struct kvm_memory_alias alias;
1789 case KVM_SET_TSS_ADDR:
1790 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1794 case KVM_SET_MEMORY_REGION: {
1795 struct kvm_memory_region kvm_mem;
1796 struct kvm_userspace_memory_region kvm_userspace_mem;
1799 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1801 kvm_userspace_mem.slot = kvm_mem.slot;
1802 kvm_userspace_mem.flags = kvm_mem.flags;
1803 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1804 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1805 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1810 case KVM_SET_NR_MMU_PAGES:
1811 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1815 case KVM_GET_NR_MMU_PAGES:
1816 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1818 case KVM_SET_MEMORY_ALIAS:
1820 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1822 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1826 case KVM_CREATE_IRQCHIP:
1828 kvm->arch.vpic = kvm_create_pic(kvm);
1829 if (kvm->arch.vpic) {
1830 r = kvm_ioapic_init(kvm);
1832 kfree(kvm->arch.vpic);
1833 kvm->arch.vpic = NULL;
1838 r = kvm_setup_default_irq_routing(kvm);
1840 kfree(kvm->arch.vpic);
1841 kfree(kvm->arch.vioapic);
1845 case KVM_CREATE_PIT:
1846 mutex_lock(&kvm->lock);
1849 goto create_pit_unlock;
1851 kvm->arch.vpit = kvm_create_pit(kvm);
1855 mutex_unlock(&kvm->lock);
1857 case KVM_IRQ_LINE: {
1858 struct kvm_irq_level irq_event;
1861 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1863 if (irqchip_in_kernel(kvm)) {
1864 mutex_lock(&kvm->lock);
1865 kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1866 irq_event.irq, irq_event.level);
1867 mutex_unlock(&kvm->lock);
1872 case KVM_GET_IRQCHIP: {
1873 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1874 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1880 if (copy_from_user(chip, argp, sizeof *chip))
1881 goto get_irqchip_out;
1883 if (!irqchip_in_kernel(kvm))
1884 goto get_irqchip_out;
1885 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1887 goto get_irqchip_out;
1889 if (copy_to_user(argp, chip, sizeof *chip))
1890 goto get_irqchip_out;
1898 case KVM_SET_IRQCHIP: {
1899 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1900 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1906 if (copy_from_user(chip, argp, sizeof *chip))
1907 goto set_irqchip_out;
1909 if (!irqchip_in_kernel(kvm))
1910 goto set_irqchip_out;
1911 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1913 goto set_irqchip_out;
1923 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1926 if (!kvm->arch.vpit)
1928 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1932 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1939 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1942 if (!kvm->arch.vpit)
1944 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1950 case KVM_REINJECT_CONTROL: {
1951 struct kvm_reinject_control control;
1953 if (copy_from_user(&control, argp, sizeof(control)))
1955 r = kvm_vm_ioctl_reinject(kvm, &control);
1968 static void kvm_init_msr_list(void)
1973 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1974 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1977 msrs_to_save[j] = msrs_to_save[i];
1980 num_msrs_to_save = j;
1984 * Only apic need an MMIO device hook, so shortcut now..
1986 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1987 gpa_t addr, int len,
1990 struct kvm_io_device *dev;
1992 if (vcpu->arch.apic) {
1993 dev = &vcpu->arch.apic->dev;
1994 if (dev->in_range(dev, addr, len, is_write))
2001 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2002 gpa_t addr, int len,
2005 struct kvm_io_device *dev;
2007 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2009 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2014 int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2015 struct kvm_vcpu *vcpu)
2018 int r = X86EMUL_CONTINUE;
2021 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2022 unsigned offset = addr & (PAGE_SIZE-1);
2023 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2026 if (gpa == UNMAPPED_GVA) {
2027 r = X86EMUL_PROPAGATE_FAULT;
2030 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2032 r = X86EMUL_UNHANDLEABLE;
2044 int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2045 struct kvm_vcpu *vcpu)
2048 int r = X86EMUL_CONTINUE;
2051 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2052 unsigned offset = addr & (PAGE_SIZE-1);
2053 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2056 if (gpa == UNMAPPED_GVA) {
2057 r = X86EMUL_PROPAGATE_FAULT;
2060 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2062 r = X86EMUL_UNHANDLEABLE;
2075 static int emulator_read_emulated(unsigned long addr,
2078 struct kvm_vcpu *vcpu)
2080 struct kvm_io_device *mmio_dev;
2083 if (vcpu->mmio_read_completed) {
2084 memcpy(val, vcpu->mmio_data, bytes);
2085 vcpu->mmio_read_completed = 0;
2086 return X86EMUL_CONTINUE;
2089 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2091 /* For APIC access vmexit */
2092 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2095 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2096 == X86EMUL_CONTINUE)
2097 return X86EMUL_CONTINUE;
2098 if (gpa == UNMAPPED_GVA)
2099 return X86EMUL_PROPAGATE_FAULT;
2103 * Is this MMIO handled locally?
2105 mutex_lock(&vcpu->kvm->lock);
2106 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2108 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2109 mutex_unlock(&vcpu->kvm->lock);
2110 return X86EMUL_CONTINUE;
2112 mutex_unlock(&vcpu->kvm->lock);
2114 vcpu->mmio_needed = 1;
2115 vcpu->mmio_phys_addr = gpa;
2116 vcpu->mmio_size = bytes;
2117 vcpu->mmio_is_write = 0;
2119 return X86EMUL_UNHANDLEABLE;
2122 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2123 const void *val, int bytes)
2127 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2130 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2134 static int emulator_write_emulated_onepage(unsigned long addr,
2137 struct kvm_vcpu *vcpu)
2139 struct kvm_io_device *mmio_dev;
2142 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2144 if (gpa == UNMAPPED_GVA) {
2145 kvm_inject_page_fault(vcpu, addr, 2);
2146 return X86EMUL_PROPAGATE_FAULT;
2149 /* For APIC access vmexit */
2150 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2153 if (emulator_write_phys(vcpu, gpa, val, bytes))
2154 return X86EMUL_CONTINUE;
2158 * Is this MMIO handled locally?
2160 mutex_lock(&vcpu->kvm->lock);
2161 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2163 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2164 mutex_unlock(&vcpu->kvm->lock);
2165 return X86EMUL_CONTINUE;
2167 mutex_unlock(&vcpu->kvm->lock);
2169 vcpu->mmio_needed = 1;
2170 vcpu->mmio_phys_addr = gpa;
2171 vcpu->mmio_size = bytes;
2172 vcpu->mmio_is_write = 1;
2173 memcpy(vcpu->mmio_data, val, bytes);
2175 return X86EMUL_CONTINUE;
2178 int emulator_write_emulated(unsigned long addr,
2181 struct kvm_vcpu *vcpu)
2183 /* Crossing a page boundary? */
2184 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2187 now = -addr & ~PAGE_MASK;
2188 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2189 if (rc != X86EMUL_CONTINUE)
2195 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2197 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2199 static int emulator_cmpxchg_emulated(unsigned long addr,
2203 struct kvm_vcpu *vcpu)
2205 static int reported;
2209 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2211 #ifndef CONFIG_X86_64
2212 /* guests cmpxchg8b have to be emulated atomically */
2219 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2221 if (gpa == UNMAPPED_GVA ||
2222 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2225 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2230 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2232 kaddr = kmap_atomic(page, KM_USER0);
2233 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2234 kunmap_atomic(kaddr, KM_USER0);
2235 kvm_release_page_dirty(page);
2240 return emulator_write_emulated(addr, new, bytes, vcpu);
2243 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2245 return kvm_x86_ops->get_segment_base(vcpu, seg);
2248 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2250 kvm_mmu_invlpg(vcpu, address);
2251 return X86EMUL_CONTINUE;
2254 int emulate_clts(struct kvm_vcpu *vcpu)
2256 KVMTRACE_0D(CLTS, vcpu, handler);
2257 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2258 return X86EMUL_CONTINUE;
2261 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2263 struct kvm_vcpu *vcpu = ctxt->vcpu;
2267 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2268 return X86EMUL_CONTINUE;
2270 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2271 return X86EMUL_UNHANDLEABLE;
2275 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2277 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2280 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2282 /* FIXME: better handling */
2283 return X86EMUL_UNHANDLEABLE;
2285 return X86EMUL_CONTINUE;
2288 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2291 unsigned long rip = kvm_rip_read(vcpu);
2292 unsigned long rip_linear;
2294 if (!printk_ratelimit())
2297 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2299 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2301 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2302 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2304 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2306 static struct x86_emulate_ops emulate_ops = {
2307 .read_std = kvm_read_guest_virt,
2308 .read_emulated = emulator_read_emulated,
2309 .write_emulated = emulator_write_emulated,
2310 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2313 static void cache_all_regs(struct kvm_vcpu *vcpu)
2315 kvm_register_read(vcpu, VCPU_REGS_RAX);
2316 kvm_register_read(vcpu, VCPU_REGS_RSP);
2317 kvm_register_read(vcpu, VCPU_REGS_RIP);
2318 vcpu->arch.regs_dirty = ~0;
2321 int emulate_instruction(struct kvm_vcpu *vcpu,
2322 struct kvm_run *run,
2328 struct decode_cache *c;
2330 kvm_clear_exception_queue(vcpu);
2331 vcpu->arch.mmio_fault_cr2 = cr2;
2333 * TODO: fix x86_emulate.c to use guest_read/write_register
2334 * instead of direct ->regs accesses, can save hundred cycles
2335 * on Intel for instructions that don't read/change RSP, for
2338 cache_all_regs(vcpu);
2340 vcpu->mmio_is_write = 0;
2341 vcpu->arch.pio.string = 0;
2343 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2345 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2347 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2348 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2349 vcpu->arch.emulate_ctxt.mode =
2350 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2351 ? X86EMUL_MODE_REAL : cs_l
2352 ? X86EMUL_MODE_PROT64 : cs_db
2353 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2355 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2357 /* Reject the instructions other than VMCALL/VMMCALL when
2358 * try to emulate invalid opcode */
2359 c = &vcpu->arch.emulate_ctxt.decode;
2360 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2361 (!(c->twobyte && c->b == 0x01 &&
2362 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2363 c->modrm_mod == 3 && c->modrm_rm == 1)))
2364 return EMULATE_FAIL;
2366 ++vcpu->stat.insn_emulation;
2368 ++vcpu->stat.insn_emulation_fail;
2369 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2370 return EMULATE_DONE;
2371 return EMULATE_FAIL;
2375 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2377 if (vcpu->arch.pio.string)
2378 return EMULATE_DO_MMIO;
2380 if ((r || vcpu->mmio_is_write) && run) {
2381 run->exit_reason = KVM_EXIT_MMIO;
2382 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2383 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2384 run->mmio.len = vcpu->mmio_size;
2385 run->mmio.is_write = vcpu->mmio_is_write;
2389 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2390 return EMULATE_DONE;
2391 if (!vcpu->mmio_needed) {
2392 kvm_report_emulation_failure(vcpu, "mmio");
2393 return EMULATE_FAIL;
2395 return EMULATE_DO_MMIO;
2398 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2400 if (vcpu->mmio_is_write) {
2401 vcpu->mmio_needed = 0;
2402 return EMULATE_DO_MMIO;
2405 return EMULATE_DONE;
2407 EXPORT_SYMBOL_GPL(emulate_instruction);
2409 static int pio_copy_data(struct kvm_vcpu *vcpu)
2411 void *p = vcpu->arch.pio_data;
2412 gva_t q = vcpu->arch.pio.guest_gva;
2416 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2417 if (vcpu->arch.pio.in)
2418 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2420 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2424 int complete_pio(struct kvm_vcpu *vcpu)
2426 struct kvm_pio_request *io = &vcpu->arch.pio;
2433 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2434 memcpy(&val, vcpu->arch.pio_data, io->size);
2435 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2439 r = pio_copy_data(vcpu);
2446 delta *= io->cur_count;
2448 * The size of the register should really depend on
2449 * current address size.
2451 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2453 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2459 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2461 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2463 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2465 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2469 io->count -= io->cur_count;
2475 static void kernel_pio(struct kvm_io_device *pio_dev,
2476 struct kvm_vcpu *vcpu,
2479 /* TODO: String I/O for in kernel device */
2481 mutex_lock(&vcpu->kvm->lock);
2482 if (vcpu->arch.pio.in)
2483 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2484 vcpu->arch.pio.size,
2487 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2488 vcpu->arch.pio.size,
2490 mutex_unlock(&vcpu->kvm->lock);
2493 static void pio_string_write(struct kvm_io_device *pio_dev,
2494 struct kvm_vcpu *vcpu)
2496 struct kvm_pio_request *io = &vcpu->arch.pio;
2497 void *pd = vcpu->arch.pio_data;
2500 mutex_lock(&vcpu->kvm->lock);
2501 for (i = 0; i < io->cur_count; i++) {
2502 kvm_iodevice_write(pio_dev, io->port,
2507 mutex_unlock(&vcpu->kvm->lock);
2510 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2511 gpa_t addr, int len,
2514 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2517 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2518 int size, unsigned port)
2520 struct kvm_io_device *pio_dev;
2523 vcpu->run->exit_reason = KVM_EXIT_IO;
2524 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2525 vcpu->run->io.size = vcpu->arch.pio.size = size;
2526 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2527 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2528 vcpu->run->io.port = vcpu->arch.pio.port = port;
2529 vcpu->arch.pio.in = in;
2530 vcpu->arch.pio.string = 0;
2531 vcpu->arch.pio.down = 0;
2532 vcpu->arch.pio.rep = 0;
2534 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2535 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2538 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2541 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2542 memcpy(vcpu->arch.pio_data, &val, 4);
2544 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2546 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2552 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2554 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2555 int size, unsigned long count, int down,
2556 gva_t address, int rep, unsigned port)
2558 unsigned now, in_page;
2560 struct kvm_io_device *pio_dev;
2562 vcpu->run->exit_reason = KVM_EXIT_IO;
2563 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2564 vcpu->run->io.size = vcpu->arch.pio.size = size;
2565 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2566 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2567 vcpu->run->io.port = vcpu->arch.pio.port = port;
2568 vcpu->arch.pio.in = in;
2569 vcpu->arch.pio.string = 1;
2570 vcpu->arch.pio.down = down;
2571 vcpu->arch.pio.rep = rep;
2573 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2574 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2577 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2581 kvm_x86_ops->skip_emulated_instruction(vcpu);
2586 in_page = PAGE_SIZE - offset_in_page(address);
2588 in_page = offset_in_page(address) + size;
2589 now = min(count, (unsigned long)in_page / size);
2594 * String I/O in reverse. Yuck. Kill the guest, fix later.
2596 pr_unimpl(vcpu, "guest string pio down\n");
2597 kvm_inject_gp(vcpu, 0);
2600 vcpu->run->io.count = now;
2601 vcpu->arch.pio.cur_count = now;
2603 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2604 kvm_x86_ops->skip_emulated_instruction(vcpu);
2606 vcpu->arch.pio.guest_gva = address;
2608 pio_dev = vcpu_find_pio_dev(vcpu, port,
2609 vcpu->arch.pio.cur_count,
2610 !vcpu->arch.pio.in);
2611 if (!vcpu->arch.pio.in) {
2612 /* string PIO write */
2613 ret = pio_copy_data(vcpu);
2614 if (ret == X86EMUL_PROPAGATE_FAULT) {
2615 kvm_inject_gp(vcpu, 0);
2618 if (ret == 0 && pio_dev) {
2619 pio_string_write(pio_dev, vcpu);
2621 if (vcpu->arch.pio.count == 0)
2625 pr_unimpl(vcpu, "no string pio read support yet, "
2626 "port %x size %d count %ld\n",
2631 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2633 int kvm_arch_init(void *opaque)
2636 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2639 printk(KERN_ERR "kvm: already loaded the other module\n");
2644 if (!ops->cpu_has_kvm_support()) {
2645 printk(KERN_ERR "kvm: no hardware support\n");
2649 if (ops->disabled_by_bios()) {
2650 printk(KERN_ERR "kvm: disabled by bios\n");
2655 r = kvm_mmu_module_init();
2659 kvm_init_msr_list();
2662 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2663 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2664 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2665 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2672 void kvm_arch_exit(void)
2675 kvm_mmu_module_exit();
2678 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2680 ++vcpu->stat.halt_exits;
2681 KVMTRACE_0D(HLT, vcpu, handler);
2682 if (irqchip_in_kernel(vcpu->kvm)) {
2683 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2686 vcpu->run->exit_reason = KVM_EXIT_HLT;
2690 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2692 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2695 if (is_long_mode(vcpu))
2698 return a0 | ((gpa_t)a1 << 32);
2701 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2703 unsigned long nr, a0, a1, a2, a3, ret;
2706 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2707 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2708 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2709 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2710 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2712 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2714 if (!is_long_mode(vcpu)) {
2723 case KVM_HC_VAPIC_POLL_IRQ:
2727 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2733 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2734 ++vcpu->stat.hypercalls;
2737 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2739 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2741 char instruction[3];
2743 unsigned long rip = kvm_rip_read(vcpu);
2747 * Blow out the MMU to ensure that no other VCPU has an active mapping
2748 * to ensure that the updated hypercall appears atomically across all
2751 kvm_mmu_zap_all(vcpu->kvm);
2753 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2754 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2755 != X86EMUL_CONTINUE)
2761 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2763 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2766 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2768 struct descriptor_table dt = { limit, base };
2770 kvm_x86_ops->set_gdt(vcpu, &dt);
2773 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2775 struct descriptor_table dt = { limit, base };
2777 kvm_x86_ops->set_idt(vcpu, &dt);
2780 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2781 unsigned long *rflags)
2783 kvm_lmsw(vcpu, msw);
2784 *rflags = kvm_x86_ops->get_rflags(vcpu);
2787 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2789 unsigned long value;
2791 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2794 value = vcpu->arch.cr0;
2797 value = vcpu->arch.cr2;
2800 value = vcpu->arch.cr3;
2803 value = vcpu->arch.cr4;
2806 value = kvm_get_cr8(vcpu);
2809 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2812 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2813 (u32)((u64)value >> 32), handler);
2818 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2819 unsigned long *rflags)
2821 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2822 (u32)((u64)val >> 32), handler);
2826 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2827 *rflags = kvm_x86_ops->get_rflags(vcpu);
2830 vcpu->arch.cr2 = val;
2833 kvm_set_cr3(vcpu, val);
2836 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2839 kvm_set_cr8(vcpu, val & 0xfUL);
2842 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2846 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2848 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2849 int j, nent = vcpu->arch.cpuid_nent;
2851 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2852 /* when no next entry is found, the current entry[i] is reselected */
2853 for (j = i + 1; ; j = (j + 1) % nent) {
2854 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2855 if (ej->function == e->function) {
2856 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2860 return 0; /* silence gcc, even though control never reaches here */
2863 /* find an entry with matching function, matching index (if needed), and that
2864 * should be read next (if it's stateful) */
2865 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2866 u32 function, u32 index)
2868 if (e->function != function)
2870 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2872 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2873 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2878 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
2879 u32 function, u32 index)
2882 struct kvm_cpuid_entry2 *best = NULL;
2884 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2885 struct kvm_cpuid_entry2 *e;
2887 e = &vcpu->arch.cpuid_entries[i];
2888 if (is_matching_cpuid_entry(e, function, index)) {
2889 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2890 move_to_next_stateful_cpuid_entry(vcpu, i);
2895 * Both basic or both extended?
2897 if (((e->function ^ function) & 0x80000000) == 0)
2898 if (!best || e->function > best->function)
2904 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2906 u32 function, index;
2907 struct kvm_cpuid_entry2 *best;
2909 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
2910 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
2911 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
2912 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
2913 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
2914 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
2915 best = kvm_find_cpuid_entry(vcpu, function, index);
2917 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
2918 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
2919 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
2920 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
2922 kvm_x86_ops->skip_emulated_instruction(vcpu);
2923 KVMTRACE_5D(CPUID, vcpu, function,
2924 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
2925 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
2926 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
2927 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
2929 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2932 * Check if userspace requested an interrupt window, and that the
2933 * interrupt window is open.
2935 * No need to exit to userspace if we already have an interrupt queued.
2937 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2938 struct kvm_run *kvm_run)
2940 return (!vcpu->arch.irq_summary &&
2941 kvm_run->request_interrupt_window &&
2942 vcpu->arch.interrupt_window_open &&
2943 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2946 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2947 struct kvm_run *kvm_run)
2949 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2950 kvm_run->cr8 = kvm_get_cr8(vcpu);
2951 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2952 if (irqchip_in_kernel(vcpu->kvm))
2953 kvm_run->ready_for_interrupt_injection = 1;
2955 kvm_run->ready_for_interrupt_injection =
2956 (vcpu->arch.interrupt_window_open &&
2957 vcpu->arch.irq_summary == 0);
2960 static void vapic_enter(struct kvm_vcpu *vcpu)
2962 struct kvm_lapic *apic = vcpu->arch.apic;
2965 if (!apic || !apic->vapic_addr)
2968 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2970 vcpu->arch.apic->vapic_page = page;
2973 static void vapic_exit(struct kvm_vcpu *vcpu)
2975 struct kvm_lapic *apic = vcpu->arch.apic;
2977 if (!apic || !apic->vapic_addr)
2980 down_read(&vcpu->kvm->slots_lock);
2981 kvm_release_page_dirty(apic->vapic_page);
2982 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2983 up_read(&vcpu->kvm->slots_lock);
2986 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2991 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
2992 kvm_mmu_unload(vcpu);
2994 r = kvm_mmu_reload(vcpu);
2998 if (vcpu->requests) {
2999 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3000 __kvm_migrate_timers(vcpu);
3001 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3002 kvm_mmu_sync_roots(vcpu);
3003 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3004 kvm_x86_ops->tlb_flush(vcpu);
3005 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3007 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3011 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3012 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3018 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3019 kvm_inject_pending_timer_irqs(vcpu);
3023 kvm_x86_ops->prepare_guest_switch(vcpu);
3024 kvm_load_guest_fpu(vcpu);
3026 local_irq_disable();
3028 if (vcpu->requests || need_resched() || signal_pending(current)) {
3035 vcpu->guest_mode = 1;
3037 * Make sure that guest_mode assignment won't happen after
3038 * testing the pending IRQ vector bitmap.
3042 if (vcpu->arch.exception.pending)
3043 __queue_exception(vcpu);
3044 else if (irqchip_in_kernel(vcpu->kvm))
3045 kvm_x86_ops->inject_pending_irq(vcpu);
3047 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3049 kvm_lapic_sync_to_vapic(vcpu);
3051 up_read(&vcpu->kvm->slots_lock);
3055 get_debugreg(vcpu->arch.host_dr6, 6);
3056 get_debugreg(vcpu->arch.host_dr7, 7);
3057 if (unlikely(vcpu->arch.switch_db_regs)) {
3058 get_debugreg(vcpu->arch.host_db[0], 0);
3059 get_debugreg(vcpu->arch.host_db[1], 1);
3060 get_debugreg(vcpu->arch.host_db[2], 2);
3061 get_debugreg(vcpu->arch.host_db[3], 3);
3064 set_debugreg(vcpu->arch.eff_db[0], 0);
3065 set_debugreg(vcpu->arch.eff_db[1], 1);
3066 set_debugreg(vcpu->arch.eff_db[2], 2);
3067 set_debugreg(vcpu->arch.eff_db[3], 3);
3070 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3071 kvm_x86_ops->run(vcpu, kvm_run);
3073 if (unlikely(vcpu->arch.switch_db_regs)) {
3075 set_debugreg(vcpu->arch.host_db[0], 0);
3076 set_debugreg(vcpu->arch.host_db[1], 1);
3077 set_debugreg(vcpu->arch.host_db[2], 2);
3078 set_debugreg(vcpu->arch.host_db[3], 3);
3080 set_debugreg(vcpu->arch.host_dr6, 6);
3081 set_debugreg(vcpu->arch.host_dr7, 7);
3083 vcpu->guest_mode = 0;
3089 * We must have an instruction between local_irq_enable() and
3090 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3091 * the interrupt shadow. The stat.exits increment will do nicely.
3092 * But we need to prevent reordering, hence this barrier():
3100 down_read(&vcpu->kvm->slots_lock);
3103 * Profile KVM exit RIPs:
3105 if (unlikely(prof_on == KVM_PROFILING)) {
3106 unsigned long rip = kvm_rip_read(vcpu);
3107 profile_hit(KVM_PROFILING, (void *)rip);
3110 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3111 vcpu->arch.exception.pending = false;
3113 kvm_lapic_sync_from_vapic(vcpu);
3115 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3120 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3124 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3125 pr_debug("vcpu %d received sipi with vector # %x\n",
3126 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3127 kvm_lapic_reset(vcpu);
3128 r = kvm_arch_vcpu_reset(vcpu);
3131 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3134 down_read(&vcpu->kvm->slots_lock);
3139 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3140 r = vcpu_enter_guest(vcpu, kvm_run);
3142 up_read(&vcpu->kvm->slots_lock);
3143 kvm_vcpu_block(vcpu);
3144 down_read(&vcpu->kvm->slots_lock);
3145 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3146 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3147 vcpu->arch.mp_state =
3148 KVM_MP_STATE_RUNNABLE;
3149 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3154 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3156 kvm_run->exit_reason = KVM_EXIT_INTR;
3157 ++vcpu->stat.request_irq_exits;
3159 if (signal_pending(current)) {
3161 kvm_run->exit_reason = KVM_EXIT_INTR;
3162 ++vcpu->stat.signal_exits;
3164 if (need_resched()) {
3165 up_read(&vcpu->kvm->slots_lock);
3167 down_read(&vcpu->kvm->slots_lock);
3172 up_read(&vcpu->kvm->slots_lock);
3173 post_kvm_run_save(vcpu, kvm_run);
3180 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3187 if (vcpu->sigset_active)
3188 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3190 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3191 kvm_vcpu_block(vcpu);
3192 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3197 /* re-sync apic's tpr */
3198 if (!irqchip_in_kernel(vcpu->kvm))
3199 kvm_set_cr8(vcpu, kvm_run->cr8);
3201 if (vcpu->arch.pio.cur_count) {
3202 r = complete_pio(vcpu);
3206 #if CONFIG_HAS_IOMEM
3207 if (vcpu->mmio_needed) {
3208 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3209 vcpu->mmio_read_completed = 1;
3210 vcpu->mmio_needed = 0;
3212 down_read(&vcpu->kvm->slots_lock);
3213 r = emulate_instruction(vcpu, kvm_run,
3214 vcpu->arch.mmio_fault_cr2, 0,
3215 EMULTYPE_NO_DECODE);
3216 up_read(&vcpu->kvm->slots_lock);
3217 if (r == EMULATE_DO_MMIO) {
3219 * Read-modify-write. Back to userspace.
3226 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3227 kvm_register_write(vcpu, VCPU_REGS_RAX,
3228 kvm_run->hypercall.ret);
3230 r = __vcpu_run(vcpu, kvm_run);
3233 if (vcpu->sigset_active)
3234 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3240 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3244 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3245 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3246 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3247 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3248 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3249 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3250 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3251 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3252 #ifdef CONFIG_X86_64
3253 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3254 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3255 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3256 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3257 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3258 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3259 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3260 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3263 regs->rip = kvm_rip_read(vcpu);
3264 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3267 * Don't leak debug flags in case they were set for guest debugging
3269 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3270 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3277 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3281 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3282 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3283 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3284 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3285 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3286 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3287 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3288 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3289 #ifdef CONFIG_X86_64
3290 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3291 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3292 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3293 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3294 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3295 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3296 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3297 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3301 kvm_rip_write(vcpu, regs->rip);
3302 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3305 vcpu->arch.exception.pending = false;
3312 void kvm_get_segment(struct kvm_vcpu *vcpu,
3313 struct kvm_segment *var, int seg)
3315 kvm_x86_ops->get_segment(vcpu, var, seg);
3318 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3320 struct kvm_segment cs;
3322 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3326 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3328 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3329 struct kvm_sregs *sregs)
3331 struct descriptor_table dt;
3336 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3337 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3338 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3339 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3340 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3341 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3343 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3344 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3346 kvm_x86_ops->get_idt(vcpu, &dt);
3347 sregs->idt.limit = dt.limit;
3348 sregs->idt.base = dt.base;
3349 kvm_x86_ops->get_gdt(vcpu, &dt);
3350 sregs->gdt.limit = dt.limit;
3351 sregs->gdt.base = dt.base;
3353 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3354 sregs->cr0 = vcpu->arch.cr0;
3355 sregs->cr2 = vcpu->arch.cr2;
3356 sregs->cr3 = vcpu->arch.cr3;
3357 sregs->cr4 = vcpu->arch.cr4;
3358 sregs->cr8 = kvm_get_cr8(vcpu);
3359 sregs->efer = vcpu->arch.shadow_efer;
3360 sregs->apic_base = kvm_get_apic_base(vcpu);
3362 if (irqchip_in_kernel(vcpu->kvm)) {
3363 memset(sregs->interrupt_bitmap, 0,
3364 sizeof sregs->interrupt_bitmap);
3365 pending_vec = kvm_x86_ops->get_irq(vcpu);
3366 if (pending_vec >= 0)
3367 set_bit(pending_vec,
3368 (unsigned long *)sregs->interrupt_bitmap);
3370 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3371 sizeof sregs->interrupt_bitmap);
3378 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3379 struct kvm_mp_state *mp_state)
3382 mp_state->mp_state = vcpu->arch.mp_state;
3387 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3388 struct kvm_mp_state *mp_state)
3391 vcpu->arch.mp_state = mp_state->mp_state;
3396 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3397 struct kvm_segment *var, int seg)
3399 kvm_x86_ops->set_segment(vcpu, var, seg);
3402 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3403 struct kvm_segment *kvm_desct)
3405 kvm_desct->base = seg_desc->base0;
3406 kvm_desct->base |= seg_desc->base1 << 16;
3407 kvm_desct->base |= seg_desc->base2 << 24;
3408 kvm_desct->limit = seg_desc->limit0;
3409 kvm_desct->limit |= seg_desc->limit << 16;
3411 kvm_desct->limit <<= 12;
3412 kvm_desct->limit |= 0xfff;
3414 kvm_desct->selector = selector;
3415 kvm_desct->type = seg_desc->type;
3416 kvm_desct->present = seg_desc->p;
3417 kvm_desct->dpl = seg_desc->dpl;
3418 kvm_desct->db = seg_desc->d;
3419 kvm_desct->s = seg_desc->s;
3420 kvm_desct->l = seg_desc->l;
3421 kvm_desct->g = seg_desc->g;
3422 kvm_desct->avl = seg_desc->avl;
3424 kvm_desct->unusable = 1;
3426 kvm_desct->unusable = 0;
3427 kvm_desct->padding = 0;
3430 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3432 struct descriptor_table *dtable)
3434 if (selector & 1 << 2) {
3435 struct kvm_segment kvm_seg;
3437 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3439 if (kvm_seg.unusable)
3442 dtable->limit = kvm_seg.limit;
3443 dtable->base = kvm_seg.base;
3446 kvm_x86_ops->get_gdt(vcpu, dtable);
3449 /* allowed just for 8 bytes segments */
3450 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3451 struct desc_struct *seg_desc)
3454 struct descriptor_table dtable;
3455 u16 index = selector >> 3;
3457 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3459 if (dtable.limit < index * 8 + 7) {
3460 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3463 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3465 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3468 /* allowed just for 8 bytes segments */
3469 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3470 struct desc_struct *seg_desc)
3473 struct descriptor_table dtable;
3474 u16 index = selector >> 3;
3476 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3478 if (dtable.limit < index * 8 + 7)
3480 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3482 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3485 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3486 struct desc_struct *seg_desc)
3490 base_addr = seg_desc->base0;
3491 base_addr |= (seg_desc->base1 << 16);
3492 base_addr |= (seg_desc->base2 << 24);
3494 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3497 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3499 struct kvm_segment kvm_seg;
3501 kvm_get_segment(vcpu, &kvm_seg, seg);
3502 return kvm_seg.selector;
3505 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3507 struct kvm_segment *kvm_seg)
3509 struct desc_struct seg_desc;
3511 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3513 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3517 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3519 struct kvm_segment segvar = {
3520 .base = selector << 4,
3522 .selector = selector,
3533 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3537 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3538 int type_bits, int seg)
3540 struct kvm_segment kvm_seg;
3542 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3543 return kvm_load_realmode_segment(vcpu, selector, seg);
3544 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3546 kvm_seg.type |= type_bits;
3548 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3549 seg != VCPU_SREG_LDTR)
3551 kvm_seg.unusable = 1;
3553 kvm_set_segment(vcpu, &kvm_seg, seg);
3557 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3558 struct tss_segment_32 *tss)
3560 tss->cr3 = vcpu->arch.cr3;
3561 tss->eip = kvm_rip_read(vcpu);
3562 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3563 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3564 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3565 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3566 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3567 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3568 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3569 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3570 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3571 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3572 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3573 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3574 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3575 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3576 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3577 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3578 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3581 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3582 struct tss_segment_32 *tss)
3584 kvm_set_cr3(vcpu, tss->cr3);
3586 kvm_rip_write(vcpu, tss->eip);
3587 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3589 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3590 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3591 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3592 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3593 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3594 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3595 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3596 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3598 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3601 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3604 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3607 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3610 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3613 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3616 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3621 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3622 struct tss_segment_16 *tss)
3624 tss->ip = kvm_rip_read(vcpu);
3625 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3626 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3627 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3628 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3629 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3630 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3631 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3632 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3633 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3635 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3636 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3637 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3638 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3639 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3640 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3643 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3644 struct tss_segment_16 *tss)
3646 kvm_rip_write(vcpu, tss->ip);
3647 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3648 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3649 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3650 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3651 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3652 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3653 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3654 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3655 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3657 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3660 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3663 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3666 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3669 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3674 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3676 struct desc_struct *nseg_desc)
3678 struct tss_segment_16 tss_segment_16;
3681 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3682 sizeof tss_segment_16))
3685 save_state_to_tss16(vcpu, &tss_segment_16);
3687 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3688 sizeof tss_segment_16))
3691 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3692 &tss_segment_16, sizeof tss_segment_16))
3695 if (load_state_from_tss16(vcpu, &tss_segment_16))
3703 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3705 struct desc_struct *nseg_desc)
3707 struct tss_segment_32 tss_segment_32;
3710 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3711 sizeof tss_segment_32))
3714 save_state_to_tss32(vcpu, &tss_segment_32);
3716 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3717 sizeof tss_segment_32))
3720 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3721 &tss_segment_32, sizeof tss_segment_32))
3724 if (load_state_from_tss32(vcpu, &tss_segment_32))
3732 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3734 struct kvm_segment tr_seg;
3735 struct desc_struct cseg_desc;
3736 struct desc_struct nseg_desc;
3738 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3739 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3741 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3743 /* FIXME: Handle errors. Failure to read either TSS or their
3744 * descriptors should generate a pagefault.
3746 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3749 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3752 if (reason != TASK_SWITCH_IRET) {
3755 cpl = kvm_x86_ops->get_cpl(vcpu);
3756 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3757 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3762 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3763 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3767 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3768 cseg_desc.type &= ~(1 << 1); //clear the B flag
3769 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3772 if (reason == TASK_SWITCH_IRET) {
3773 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3774 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3777 kvm_x86_ops->skip_emulated_instruction(vcpu);
3779 if (nseg_desc.type & 8)
3780 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3783 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3786 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3787 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3788 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3791 if (reason != TASK_SWITCH_IRET) {
3792 nseg_desc.type |= (1 << 1);
3793 save_guest_segment_descriptor(vcpu, tss_selector,
3797 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3798 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3800 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3804 EXPORT_SYMBOL_GPL(kvm_task_switch);
3806 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3807 struct kvm_sregs *sregs)
3809 int mmu_reset_needed = 0;
3810 int i, pending_vec, max_bits;
3811 struct descriptor_table dt;
3815 dt.limit = sregs->idt.limit;
3816 dt.base = sregs->idt.base;
3817 kvm_x86_ops->set_idt(vcpu, &dt);
3818 dt.limit = sregs->gdt.limit;
3819 dt.base = sregs->gdt.base;
3820 kvm_x86_ops->set_gdt(vcpu, &dt);
3822 vcpu->arch.cr2 = sregs->cr2;
3823 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3824 vcpu->arch.cr3 = sregs->cr3;
3826 kvm_set_cr8(vcpu, sregs->cr8);
3828 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3829 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3830 kvm_set_apic_base(vcpu, sregs->apic_base);
3832 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3834 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3835 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3836 vcpu->arch.cr0 = sregs->cr0;
3838 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3839 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3840 if (!is_long_mode(vcpu) && is_pae(vcpu))
3841 load_pdptrs(vcpu, vcpu->arch.cr3);
3843 if (mmu_reset_needed)
3844 kvm_mmu_reset_context(vcpu);
3846 if (!irqchip_in_kernel(vcpu->kvm)) {
3847 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3848 sizeof vcpu->arch.irq_pending);
3849 vcpu->arch.irq_summary = 0;
3850 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3851 if (vcpu->arch.irq_pending[i])
3852 __set_bit(i, &vcpu->arch.irq_summary);
3854 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3855 pending_vec = find_first_bit(
3856 (const unsigned long *)sregs->interrupt_bitmap,
3858 /* Only pending external irq is handled here */
3859 if (pending_vec < max_bits) {
3860 kvm_x86_ops->set_irq(vcpu, pending_vec);
3861 pr_debug("Set back pending irq %d\n",
3864 kvm_pic_clear_isr_ack(vcpu->kvm);
3867 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3868 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3869 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3870 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3871 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3872 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3874 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3875 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3877 /* Older userspace won't unhalt the vcpu on reset. */
3878 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3879 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3880 !(vcpu->arch.cr0 & X86_CR0_PE))
3881 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3888 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
3889 struct kvm_guest_debug *dbg)
3895 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
3896 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
3897 for (i = 0; i < KVM_NR_DB_REGS; ++i)
3898 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
3899 vcpu->arch.switch_db_regs =
3900 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
3902 for (i = 0; i < KVM_NR_DB_REGS; i++)
3903 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
3904 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
3907 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3909 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
3910 kvm_queue_exception(vcpu, DB_VECTOR);
3911 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
3912 kvm_queue_exception(vcpu, BP_VECTOR);
3920 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3921 * we have asm/x86/processor.h
3932 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3933 #ifdef CONFIG_X86_64
3934 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3936 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3941 * Translate a guest virtual address to a guest physical address.
3943 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3944 struct kvm_translation *tr)
3946 unsigned long vaddr = tr->linear_address;
3950 down_read(&vcpu->kvm->slots_lock);
3951 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
3952 up_read(&vcpu->kvm->slots_lock);
3953 tr->physical_address = gpa;
3954 tr->valid = gpa != UNMAPPED_GVA;
3962 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3964 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3968 memcpy(fpu->fpr, fxsave->st_space, 128);
3969 fpu->fcw = fxsave->cwd;
3970 fpu->fsw = fxsave->swd;
3971 fpu->ftwx = fxsave->twd;
3972 fpu->last_opcode = fxsave->fop;
3973 fpu->last_ip = fxsave->rip;
3974 fpu->last_dp = fxsave->rdp;
3975 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3982 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3984 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3988 memcpy(fxsave->st_space, fpu->fpr, 128);
3989 fxsave->cwd = fpu->fcw;
3990 fxsave->swd = fpu->fsw;
3991 fxsave->twd = fpu->ftwx;
3992 fxsave->fop = fpu->last_opcode;
3993 fxsave->rip = fpu->last_ip;
3994 fxsave->rdp = fpu->last_dp;
3995 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4002 void fx_init(struct kvm_vcpu *vcpu)
4004 unsigned after_mxcsr_mask;
4007 * Touch the fpu the first time in non atomic context as if
4008 * this is the first fpu instruction the exception handler
4009 * will fire before the instruction returns and it'll have to
4010 * allocate ram with GFP_KERNEL.
4013 kvm_fx_save(&vcpu->arch.host_fx_image);
4015 /* Initialize guest FPU by resetting ours and saving into guest's */
4017 kvm_fx_save(&vcpu->arch.host_fx_image);
4019 kvm_fx_save(&vcpu->arch.guest_fx_image);
4020 kvm_fx_restore(&vcpu->arch.host_fx_image);
4023 vcpu->arch.cr0 |= X86_CR0_ET;
4024 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4025 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4026 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4027 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4029 EXPORT_SYMBOL_GPL(fx_init);
4031 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4033 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4036 vcpu->guest_fpu_loaded = 1;
4037 kvm_fx_save(&vcpu->arch.host_fx_image);
4038 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4040 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4042 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4044 if (!vcpu->guest_fpu_loaded)
4047 vcpu->guest_fpu_loaded = 0;
4048 kvm_fx_save(&vcpu->arch.guest_fx_image);
4049 kvm_fx_restore(&vcpu->arch.host_fx_image);
4050 ++vcpu->stat.fpu_reload;
4052 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4054 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4056 kvm_x86_ops->vcpu_free(vcpu);
4059 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4062 return kvm_x86_ops->vcpu_create(kvm, id);
4065 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4069 /* We do fxsave: this must be aligned. */
4070 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4072 vcpu->arch.mtrr_state.have_fixed = 1;
4074 r = kvm_arch_vcpu_reset(vcpu);
4076 r = kvm_mmu_setup(vcpu);
4083 kvm_x86_ops->vcpu_free(vcpu);
4087 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4090 kvm_mmu_unload(vcpu);
4093 kvm_x86_ops->vcpu_free(vcpu);
4096 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4098 vcpu->arch.nmi_pending = false;
4099 vcpu->arch.nmi_injected = false;
4101 vcpu->arch.switch_db_regs = 0;
4102 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4103 vcpu->arch.dr6 = DR6_FIXED_1;
4104 vcpu->arch.dr7 = DR7_FIXED_1;
4106 return kvm_x86_ops->vcpu_reset(vcpu);
4109 void kvm_arch_hardware_enable(void *garbage)
4111 kvm_x86_ops->hardware_enable(garbage);
4114 void kvm_arch_hardware_disable(void *garbage)
4116 kvm_x86_ops->hardware_disable(garbage);
4119 int kvm_arch_hardware_setup(void)
4121 return kvm_x86_ops->hardware_setup();
4124 void kvm_arch_hardware_unsetup(void)
4126 kvm_x86_ops->hardware_unsetup();
4129 void kvm_arch_check_processor_compat(void *rtn)
4131 kvm_x86_ops->check_processor_compatibility(rtn);
4134 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4140 BUG_ON(vcpu->kvm == NULL);
4143 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4144 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4145 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4147 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4149 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4154 vcpu->arch.pio_data = page_address(page);
4156 r = kvm_mmu_create(vcpu);
4158 goto fail_free_pio_data;
4160 if (irqchip_in_kernel(kvm)) {
4161 r = kvm_create_lapic(vcpu);
4163 goto fail_mmu_destroy;
4169 kvm_mmu_destroy(vcpu);
4171 free_page((unsigned long)vcpu->arch.pio_data);
4176 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4178 kvm_free_lapic(vcpu);
4179 down_read(&vcpu->kvm->slots_lock);
4180 kvm_mmu_destroy(vcpu);
4181 up_read(&vcpu->kvm->slots_lock);
4182 free_page((unsigned long)vcpu->arch.pio_data);
4185 struct kvm *kvm_arch_create_vm(void)
4187 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4190 return ERR_PTR(-ENOMEM);
4192 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4193 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4194 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4196 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4197 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4199 rdtscll(kvm->arch.vm_init_tsc);
4204 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4207 kvm_mmu_unload(vcpu);
4211 static void kvm_free_vcpus(struct kvm *kvm)
4216 * Unpin any mmu pages first.
4218 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4220 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4221 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4222 if (kvm->vcpus[i]) {
4223 kvm_arch_vcpu_free(kvm->vcpus[i]);
4224 kvm->vcpus[i] = NULL;
4230 void kvm_arch_sync_events(struct kvm *kvm)
4232 kvm_free_all_assigned_devices(kvm);
4235 void kvm_arch_destroy_vm(struct kvm *kvm)
4237 kvm_iommu_unmap_guest(kvm);
4239 kfree(kvm->arch.vpic);
4240 kfree(kvm->arch.vioapic);
4241 kvm_free_vcpus(kvm);
4242 kvm_free_physmem(kvm);
4243 if (kvm->arch.apic_access_page)
4244 put_page(kvm->arch.apic_access_page);
4245 if (kvm->arch.ept_identity_pagetable)
4246 put_page(kvm->arch.ept_identity_pagetable);
4250 int kvm_arch_set_memory_region(struct kvm *kvm,
4251 struct kvm_userspace_memory_region *mem,
4252 struct kvm_memory_slot old,
4255 int npages = mem->memory_size >> PAGE_SHIFT;
4256 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4258 /*To keep backward compatibility with older userspace,
4259 *x86 needs to hanlde !user_alloc case.
4262 if (npages && !old.rmap) {
4263 unsigned long userspace_addr;
4265 down_write(¤t->mm->mmap_sem);
4266 userspace_addr = do_mmap(NULL, 0,
4268 PROT_READ | PROT_WRITE,
4269 MAP_PRIVATE | MAP_ANONYMOUS,
4271 up_write(¤t->mm->mmap_sem);
4273 if (IS_ERR((void *)userspace_addr))
4274 return PTR_ERR((void *)userspace_addr);
4276 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4277 spin_lock(&kvm->mmu_lock);
4278 memslot->userspace_addr = userspace_addr;
4279 spin_unlock(&kvm->mmu_lock);
4281 if (!old.user_alloc && old.rmap) {
4284 down_write(¤t->mm->mmap_sem);
4285 ret = do_munmap(current->mm, old.userspace_addr,
4286 old.npages * PAGE_SIZE);
4287 up_write(¤t->mm->mmap_sem);
4290 "kvm_vm_ioctl_set_memory_region: "
4291 "failed to munmap memory\n");
4296 if (!kvm->arch.n_requested_mmu_pages) {
4297 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4298 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4301 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4302 kvm_flush_remote_tlbs(kvm);
4307 void kvm_arch_flush_shadow(struct kvm *kvm)
4309 kvm_mmu_zap_all(kvm);
4312 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4314 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4315 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4316 || vcpu->arch.nmi_pending;
4319 static void vcpu_kick_intr(void *info)
4322 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4323 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4327 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4329 int ipi_pcpu = vcpu->cpu;
4330 int cpu = get_cpu();
4332 if (waitqueue_active(&vcpu->wq)) {
4333 wake_up_interruptible(&vcpu->wq);
4334 ++vcpu->stat.halt_wakeup;
4337 * We may be called synchronously with irqs disabled in guest mode,
4338 * So need not to call smp_call_function_single() in that case.
4340 if (vcpu->guest_mode && vcpu->cpu != cpu)
4341 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);