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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  81                                     struct kvm_cpuid_entry2 __user *entries);
  82
  83 struct kvm_x86_ops *kvm_x86_ops;
  84 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  85
  86 int ignore_msrs = 0;
  87 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  88
  89 struct kvm_stats_debugfs_item debugfs_entries[] = {
  90         { "pf_fixed", VCPU_STAT(pf_fixed) },
  91         { "pf_guest", VCPU_STAT(pf_guest) },
  92         { "tlb_flush", VCPU_STAT(tlb_flush) },
  93         { "invlpg", VCPU_STAT(invlpg) },
  94         { "exits", VCPU_STAT(exits) },
  95         { "io_exits", VCPU_STAT(io_exits) },
  96         { "mmio_exits", VCPU_STAT(mmio_exits) },
  97         { "signal_exits", VCPU_STAT(signal_exits) },
  98         { "irq_window", VCPU_STAT(irq_window_exits) },
  99         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 100         { "halt_exits", VCPU_STAT(halt_exits) },
 101         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 102         { "hypercalls", VCPU_STAT(hypercalls) },
 103         { "request_irq", VCPU_STAT(request_irq_exits) },
 104         { "irq_exits", VCPU_STAT(irq_exits) },
 105         { "host_state_reload", VCPU_STAT(host_state_reload) },
 106         { "efer_reload", VCPU_STAT(efer_reload) },
 107         { "fpu_reload", VCPU_STAT(fpu_reload) },
 108         { "insn_emulation", VCPU_STAT(insn_emulation) },
 109         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 110         { "irq_injections", VCPU_STAT(irq_injections) },
 111         { "nmi_injections", VCPU_STAT(nmi_injections) },
 112         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 113         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 114         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 115         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 116         { "mmu_flooded", VM_STAT(mmu_flooded) },
 117         { "mmu_recycled", VM_STAT(mmu_recycled) },
 118         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 119         { "mmu_unsync", VM_STAT(mmu_unsync) },
 120         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 121         { "largepages", VM_STAT(lpages) },
 122         { NULL }
 123 };
 124
 125 unsigned long segment_base(u16 selector)
 126 {
 127         struct descriptor_table gdt;
 128         struct desc_struct *d;
 129         unsigned long table_base;
 130         unsigned long v;
 131
 132         if (selector == 0)
 133                 return 0;
 134
 135         asm("sgdt %0" : "=m"(gdt));
 136         table_base = gdt.base;
 137
 138         if (selector & 4) {           /* from ldt */
 139                 u16 ldt_selector;
 140
 141                 asm("sldt %0" : "=g"(ldt_selector));
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = d->base0 | ((unsigned long)d->base1 << 16) |
 146                 ((unsigned long)d->base2 << 24);
 147 #ifdef CONFIG_X86_64
 148         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 149                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 150 #endif
 151         return v;
 152 }
 153 EXPORT_SYMBOL_GPL(segment_base);
 154
 155 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 156 {
 157         if (irqchip_in_kernel(vcpu->kvm))
 158                 return vcpu->arch.apic_base;
 159         else
 160                 return vcpu->arch.apic_base;
 161 }
 162 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 163
 164 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 165 {
 166         /* TODO: reserve bits check */
 167         if (irqchip_in_kernel(vcpu->kvm))
 168                 kvm_lapic_set_base(vcpu, data);
 169         else
 170                 vcpu->arch.apic_base = data;
 171 }
 172 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 173
 174 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 175 {
 176         WARN_ON(vcpu->arch.exception.pending);
 177         vcpu->arch.exception.pending = true;
 178         vcpu->arch.exception.has_error_code = false;
 179         vcpu->arch.exception.nr = nr;
 180 }
 181 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 182
 183 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 184                            u32 error_code)
 185 {
 186         ++vcpu->stat.pf_guest;
 187
 188         if (vcpu->arch.exception.pending) {
 189                 switch(vcpu->arch.exception.nr) {
 190                 case DF_VECTOR:
 191                         /* triple fault -> shutdown */
 192                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 193                         return;
 194                 case PF_VECTOR:
 195                         vcpu->arch.exception.nr = DF_VECTOR;
 196                         vcpu->arch.exception.error_code = 0;
 197                         return;
 198                 default:
 199                         /* replace previous exception with a new one in a hope
 200                            that instruction re-execution will regenerate lost
 201                            exception */
 202                         vcpu->arch.exception.pending = false;
 203                         break;
 204                 }
 205         }
 206         vcpu->arch.cr2 = addr;
 207         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 208 }
 209
 210 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 211 {
 212         vcpu->arch.nmi_pending = 1;
 213 }
 214 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 215
 216 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 217 {
 218         WARN_ON(vcpu->arch.exception.pending);
 219         vcpu->arch.exception.pending = true;
 220         vcpu->arch.exception.has_error_code = true;
 221         vcpu->arch.exception.nr = nr;
 222         vcpu->arch.exception.error_code = error_code;
 223 }
 224 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 225
 226 static void __queue_exception(struct kvm_vcpu *vcpu)
 227 {
 228         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
 229                                      vcpu->arch.exception.has_error_code,
 230                                      vcpu->arch.exception.error_code);
 231 }
 232
 233 /*
 234  * Load the pae pdptrs.  Return true is they are all valid.
 235  */
 236 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 237 {
 238         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 239         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 240         int i;
 241         int ret;
 242         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 243
 244         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 245                                   offset * sizeof(u64), sizeof(pdpte));
 246         if (ret < 0) {
 247                 ret = 0;
 248                 goto out;
 249         }
 250         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 251                 if (is_present_gpte(pdpte[i]) &&
 252                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 253                         ret = 0;
 254                         goto out;
 255                 }
 256         }
 257         ret = 1;
 258
 259         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 260         __set_bit(VCPU_EXREG_PDPTR,
 261                   (unsigned long *)&vcpu->arch.regs_avail);
 262         __set_bit(VCPU_EXREG_PDPTR,
 263                   (unsigned long *)&vcpu->arch.regs_dirty);
 264 out:
 265
 266         return ret;
 267 }
 268 EXPORT_SYMBOL_GPL(load_pdptrs);
 269
 270 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 271 {
 272         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 273         bool changed = true;
 274         int r;
 275
 276         if (is_long_mode(vcpu) || !is_pae(vcpu))
 277                 return false;
 278
 279         if (!test_bit(VCPU_EXREG_PDPTR,
 280                       (unsigned long *)&vcpu->arch.regs_avail))
 281                 return true;
 282
 283         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 284         if (r < 0)
 285                 goto out;
 286         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 287 out:
 288
 289         return changed;
 290 }
 291
 292 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 293 {
 294         if (cr0 & CR0_RESERVED_BITS) {
 295                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 296                        cr0, vcpu->arch.cr0);
 297                 kvm_inject_gp(vcpu, 0);
 298                 return;
 299         }
 300
 301         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 302                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 303                 kvm_inject_gp(vcpu, 0);
 304                 return;
 305         }
 306
 307         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 308                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 309                        "and a clear PE flag\n");
 310                 kvm_inject_gp(vcpu, 0);
 311                 return;
 312         }
 313
 314         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 315 #ifdef CONFIG_X86_64
 316                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 317                         int cs_db, cs_l;
 318
 319                         if (!is_pae(vcpu)) {
 320                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 321                                        "in long mode while PAE is disabled\n");
 322                                 kvm_inject_gp(vcpu, 0);
 323                                 return;
 324                         }
 325                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 326                         if (cs_l) {
 327                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 328                                        "in long mode while CS.L == 1\n");
 329                                 kvm_inject_gp(vcpu, 0);
 330                                 return;
 331
 332                         }
 333                 } else
 334 #endif
 335                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 336                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 337                                "reserved bits\n");
 338                         kvm_inject_gp(vcpu, 0);
 339                         return;
 340                 }
 341
 342         }
 343
 344         kvm_x86_ops->set_cr0(vcpu, cr0);
 345         vcpu->arch.cr0 = cr0;
 346
 347         kvm_mmu_reset_context(vcpu);
 348         return;
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 351
 352 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 353 {
 354         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_lmsw);
 357
 358 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 359 {
 360         unsigned long old_cr4 = vcpu->arch.cr4;
 361         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 362
 363         if (cr4 & CR4_RESERVED_BITS) {
 364                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 365                 kvm_inject_gp(vcpu, 0);
 366                 return;
 367         }
 368
 369         if (is_long_mode(vcpu)) {
 370                 if (!(cr4 & X86_CR4_PAE)) {
 371                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 372                                "in long mode\n");
 373                         kvm_inject_gp(vcpu, 0);
 374                         return;
 375                 }
 376         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 377                    && ((cr4 ^ old_cr4) & pdptr_bits)
 378                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 379                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 380                 kvm_inject_gp(vcpu, 0);
 381                 return;
 382         }
 383
 384         if (cr4 & X86_CR4_VMXE) {
 385                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 386                 kvm_inject_gp(vcpu, 0);
 387                 return;
 388         }
 389         kvm_x86_ops->set_cr4(vcpu, cr4);
 390         vcpu->arch.cr4 = cr4;
 391         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 392         kvm_mmu_reset_context(vcpu);
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 395
 396 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 397 {
 398         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 399                 kvm_mmu_sync_roots(vcpu);
 400                 kvm_mmu_flush_tlb(vcpu);
 401                 return;
 402         }
 403
 404         if (is_long_mode(vcpu)) {
 405                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 406                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 407                         kvm_inject_gp(vcpu, 0);
 408                         return;
 409                 }
 410         } else {
 411                 if (is_pae(vcpu)) {
 412                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 413                                 printk(KERN_DEBUG
 414                                        "set_cr3: #GP, reserved bits\n");
 415                                 kvm_inject_gp(vcpu, 0);
 416                                 return;
 417                         }
 418                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 419                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 420                                        "reserved bits\n");
 421                                 kvm_inject_gp(vcpu, 0);
 422                                 return;
 423                         }
 424                 }
 425                 /*
 426                  * We don't check reserved bits in nonpae mode, because
 427                  * this isn't enforced, and VMware depends on this.
 428                  */
 429         }
 430
 431         /*
 432          * Does the new cr3 value map to physical memory? (Note, we
 433          * catch an invalid cr3 even in real-mode, because it would
 434          * cause trouble later on when we turn on paging anyway.)
 435          *
 436          * A real CPU would silently accept an invalid cr3 and would
 437          * attempt to use it - with largely undefined (and often hard
 438          * to debug) behavior on the guest side.
 439          */
 440         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 441                 kvm_inject_gp(vcpu, 0);
 442         else {
 443                 vcpu->arch.cr3 = cr3;
 444                 vcpu->arch.mmu.new_cr3(vcpu);
 445         }
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 448
 449 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 450 {
 451         if (cr8 & CR8_RESERVED_BITS) {
 452                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 453                 kvm_inject_gp(vcpu, 0);
 454                 return;
 455         }
 456         if (irqchip_in_kernel(vcpu->kvm))
 457                 kvm_lapic_set_tpr(vcpu, cr8);
 458         else
 459                 vcpu->arch.cr8 = cr8;
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 462
 463 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 464 {
 465         if (irqchip_in_kernel(vcpu->kvm))
 466                 return kvm_lapic_get_cr8(vcpu);
 467         else
 468                 return vcpu->arch.cr8;
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 471
 472 static inline u32 bit(int bitno)
 473 {
 474         return 1 << (bitno & 31);
 475 }
 476
 477 /*
 478  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 479  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 480  *
 481  * This list is modified at module load time to reflect the
 482  * capabilities of the host cpu.
 483  */
 484 static u32 msrs_to_save[] = {
 485         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 486         MSR_K6_STAR,
 487 #ifdef CONFIG_X86_64
 488         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 489 #endif
 490         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 491         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 492 };
 493
 494 static unsigned num_msrs_to_save;
 495
 496 static u32 emulated_msrs[] = {
 497         MSR_IA32_MISC_ENABLE,
 498 };
 499
 500 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 501 {
 502         if (efer & efer_reserved_bits) {
 503                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 504                        efer);
 505                 kvm_inject_gp(vcpu, 0);
 506                 return;
 507         }
 508
 509         if (is_paging(vcpu)
 510             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 511                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 512                 kvm_inject_gp(vcpu, 0);
 513                 return;
 514         }
 515
 516         if (efer & EFER_FFXSR) {
 517                 struct kvm_cpuid_entry2 *feat;
 518
 519                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 520                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 521                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 522                         kvm_inject_gp(vcpu, 0);
 523                         return;
 524                 }
 525         }
 526
 527         if (efer & EFER_SVME) {
 528                 struct kvm_cpuid_entry2 *feat;
 529
 530                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 531                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 532                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 533                         kvm_inject_gp(vcpu, 0);
 534                         return;
 535                 }
 536         }
 537
 538         kvm_x86_ops->set_efer(vcpu, efer);
 539
 540         efer &= ~EFER_LMA;
 541         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 542
 543         vcpu->arch.shadow_efer = efer;
 544
 545         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 546         kvm_mmu_reset_context(vcpu);
 547 }
 548
 549 void kvm_enable_efer_bits(u64 mask)
 550 {
 551        efer_reserved_bits &= ~mask;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 554
 555
 556 /*
 557  * Writes msr value into into the appropriate "register".
 558  * Returns 0 on success, non-0 otherwise.
 559  * Assumes vcpu_load() was already called.
 560  */
 561 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 562 {
 563         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 564 }
 565
 566 /*
 567  * Adapt set_msr() to msr_io()'s calling convention
 568  */
 569 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 570 {
 571         return kvm_set_msr(vcpu, index, *data);
 572 }
 573
 574 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 575 {
 576         static int version;
 577         struct pvclock_wall_clock wc;
 578         struct timespec now, sys, boot;
 579
 580         if (!wall_clock)
 581                 return;
 582
 583         version++;
 584
 585         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 586
 587         /*
 588          * The guest calculates current wall clock time by adding
 589          * system time (updated by kvm_write_guest_time below) to the
 590          * wall clock specified here.  guest system time equals host
 591          * system time for us, thus we must fill in host boot time here.
 592          */
 593         now = current_kernel_time();
 594         ktime_get_ts(&sys);
 595         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 596
 597         wc.sec = boot.tv_sec;
 598         wc.nsec = boot.tv_nsec;
 599         wc.version = version;
 600
 601         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 602
 603         version++;
 604         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 605 }
 606
 607 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 608 {
 609         uint32_t quotient, remainder;
 610
 611         /* Don't try to replace with do_div(), this one calculates
 612          * "(dividend << 32) / divisor" */
 613         __asm__ ( "divl %4"
 614                   : "=a" (quotient), "=d" (remainder)
 615                   : "0" (0), "1" (dividend), "r" (divisor) );
 616         return quotient;
 617 }
 618
 619 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 620 {
 621         uint64_t nsecs = 1000000000LL;
 622         int32_t  shift = 0;
 623         uint64_t tps64;
 624         uint32_t tps32;
 625
 626         tps64 = tsc_khz * 1000LL;
 627         while (tps64 > nsecs*2) {
 628                 tps64 >>= 1;
 629                 shift--;
 630         }
 631
 632         tps32 = (uint32_t)tps64;
 633         while (tps32 <= (uint32_t)nsecs) {
 634                 tps32 <<= 1;
 635                 shift++;
 636         }
 637
 638         hv_clock->tsc_shift = shift;
 639         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 640
 641         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 642                  __func__, tsc_khz, hv_clock->tsc_shift,
 643                  hv_clock->tsc_to_system_mul);
 644 }
 645
 646 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 647
 648 static void kvm_write_guest_time(struct kvm_vcpu *v)
 649 {
 650         struct timespec ts;
 651         unsigned long flags;
 652         struct kvm_vcpu_arch *vcpu = &v->arch;
 653         void *shared_kaddr;
 654         unsigned long this_tsc_khz;
 655
 656         if ((!vcpu->time_page))
 657                 return;
 658
 659         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 660         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 661                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 662                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 663         }
 664         put_cpu_var(cpu_tsc_khz);
 665
 666         /* Keep irq disabled to prevent changes to the clock */
 667         local_irq_save(flags);
 668         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 669         ktime_get_ts(&ts);
 670         local_irq_restore(flags);
 671
 672         /* With all the info we got, fill in the values */
 673
 674         vcpu->hv_clock.system_time = ts.tv_nsec +
 675                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 676         /*
 677          * The interface expects us to write an even number signaling that the
 678          * update is finished. Since the guest won't see the intermediate
 679          * state, we just increase by 2 at the end.
 680          */
 681         vcpu->hv_clock.version += 2;
 682
 683         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 684
 685         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 686                sizeof(vcpu->hv_clock));
 687
 688         kunmap_atomic(shared_kaddr, KM_USER0);
 689
 690         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 691 }
 692
 693 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 694 {
 695         struct kvm_vcpu_arch *vcpu = &v->arch;
 696
 697         if (!vcpu->time_page)
 698                 return 0;
 699         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 700         return 1;
 701 }
 702
 703 static bool msr_mtrr_valid(unsigned msr)
 704 {
 705         switch (msr) {
 706         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 707         case MSR_MTRRfix64K_00000:
 708         case MSR_MTRRfix16K_80000:
 709         case MSR_MTRRfix16K_A0000:
 710         case MSR_MTRRfix4K_C0000:
 711         case MSR_MTRRfix4K_C8000:
 712         case MSR_MTRRfix4K_D0000:
 713         case MSR_MTRRfix4K_D8000:
 714         case MSR_MTRRfix4K_E0000:
 715         case MSR_MTRRfix4K_E8000:
 716         case MSR_MTRRfix4K_F0000:
 717         case MSR_MTRRfix4K_F8000:
 718         case MSR_MTRRdefType:
 719         case MSR_IA32_CR_PAT:
 720                 return true;
 721         case 0x2f8:
 722                 return true;
 723         }
 724         return false;
 725 }
 726
 727 static bool valid_pat_type(unsigned t)
 728 {
 729         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 730 }
 731
 732 static bool valid_mtrr_type(unsigned t)
 733 {
 734         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 735 }
 736
 737 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 738 {
 739         int i;
 740
 741         if (!msr_mtrr_valid(msr))
 742                 return false;
 743
 744         if (msr == MSR_IA32_CR_PAT) {
 745                 for (i = 0; i < 8; i++)
 746                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 747                                 return false;
 748                 return true;
 749         } else if (msr == MSR_MTRRdefType) {
 750                 if (data & ~0xcff)
 751                         return false;
 752                 return valid_mtrr_type(data & 0xff);
 753         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 754                 for (i = 0; i < 8 ; i++)
 755                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 756                                 return false;
 757                 return true;
 758         }
 759
 760         /* variable MTRRs */
 761         return valid_mtrr_type(data & 0xff);
 762 }
 763
 764 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 765 {
 766         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 767
 768         if (!mtrr_valid(vcpu, msr, data))
 769                 return 1;
 770
 771         if (msr == MSR_MTRRdefType) {
 772                 vcpu->arch.mtrr_state.def_type = data;
 773                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 774         } else if (msr == MSR_MTRRfix64K_00000)
 775                 p[0] = data;
 776         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 777                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 778         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 779                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 780         else if (msr == MSR_IA32_CR_PAT)
 781                 vcpu->arch.pat = data;
 782         else {  /* Variable MTRRs */
 783                 int idx, is_mtrr_mask;
 784                 u64 *pt;
 785
 786                 idx = (msr - 0x200) / 2;
 787                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 788                 if (!is_mtrr_mask)
 789                         pt =
 790                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 791                 else
 792                         pt =
 793                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 794                 *pt = data;
 795         }
 796
 797         kvm_mmu_reset_context(vcpu);
 798         return 0;
 799 }
 800
 801 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 802 {
 803         u64 mcg_cap = vcpu->arch.mcg_cap;
 804         unsigned bank_num = mcg_cap & 0xff;
 805
 806         switch (msr) {
 807         case MSR_IA32_MCG_STATUS:
 808                 vcpu->arch.mcg_status = data;
 809                 break;
 810         case MSR_IA32_MCG_CTL:
 811                 if (!(mcg_cap & MCG_CTL_P))
 812                         return 1;
 813                 if (data != 0 && data != ~(u64)0)
 814                         return -1;
 815                 vcpu->arch.mcg_ctl = data;
 816                 break;
 817         default:
 818                 if (msr >= MSR_IA32_MC0_CTL &&
 819                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 820                         u32 offset = msr - MSR_IA32_MC0_CTL;
 821                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 822                         if ((offset & 0x3) == 0 &&
 823                             data != 0 && data != ~(u64)0)
 824                                 return -1;
 825                         vcpu->arch.mce_banks[offset] = data;
 826                         break;
 827                 }
 828                 return 1;
 829         }
 830         return 0;
 831 }
 832
 833 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 834 {
 835         switch (msr) {
 836         case MSR_EFER:
 837                 set_efer(vcpu, data);
 838                 break;
 839         case MSR_K7_HWCR:
 840                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 841                 if (data != 0) {
 842                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 843                                 data);
 844                         return 1;
 845                 }
 846                 break;
 847         case MSR_AMD64_NB_CFG:
 848                 break;
 849         case MSR_IA32_DEBUGCTLMSR:
 850                 if (!data) {
 851                         /* We support the non-activated case already */
 852                         break;
 853                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 854                         /* Values other than LBR and BTF are vendor-specific,
 855                            thus reserved and should throw a #GP */
 856                         return 1;
 857                 }
 858                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 859                         __func__, data);
 860                 break;
 861         case MSR_IA32_UCODE_REV:
 862         case MSR_IA32_UCODE_WRITE:
 863         case MSR_VM_HSAVE_PA:
 864         case MSR_AMD64_PATCH_LOADER:
 865                 break;
 866         case 0x200 ... 0x2ff:
 867                 return set_msr_mtrr(vcpu, msr, data);
 868         case MSR_IA32_APICBASE:
 869                 kvm_set_apic_base(vcpu, data);
 870                 break;
 871         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 872                 return kvm_x2apic_msr_write(vcpu, msr, data);
 873         case MSR_IA32_MISC_ENABLE:
 874                 vcpu->arch.ia32_misc_enable_msr = data;
 875                 break;
 876         case MSR_KVM_WALL_CLOCK:
 877                 vcpu->kvm->arch.wall_clock = data;
 878                 kvm_write_wall_clock(vcpu->kvm, data);
 879                 break;
 880         case MSR_KVM_SYSTEM_TIME: {
 881                 if (vcpu->arch.time_page) {
 882                         kvm_release_page_dirty(vcpu->arch.time_page);
 883                         vcpu->arch.time_page = NULL;
 884                 }
 885
 886                 vcpu->arch.time = data;
 887
 888                 /* we verify if the enable bit is set... */
 889                 if (!(data & 1))
 890                         break;
 891
 892                 /* ...but clean it before doing the actual write */
 893                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 894
 895                 vcpu->arch.time_page =
 896                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 897
 898                 if (is_error_page(vcpu->arch.time_page)) {
 899                         kvm_release_page_clean(vcpu->arch.time_page);
 900                         vcpu->arch.time_page = NULL;
 901                 }
 902
 903                 kvm_request_guest_time_update(vcpu);
 904                 break;
 905         }
 906         case MSR_IA32_MCG_CTL:
 907         case MSR_IA32_MCG_STATUS:
 908         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 909                 return set_msr_mce(vcpu, msr, data);
 910
 911         /* Performance counters are not protected by a CPUID bit,
 912          * so we should check all of them in the generic path for the sake of
 913          * cross vendor migration.
 914          * Writing a zero into the event select MSRs disables them,
 915          * which we perfectly emulate ;-). Any other value should be at least
 916          * reported, some guests depend on them.
 917          */
 918         case MSR_P6_EVNTSEL0:
 919         case MSR_P6_EVNTSEL1:
 920         case MSR_K7_EVNTSEL0:
 921         case MSR_K7_EVNTSEL1:
 922         case MSR_K7_EVNTSEL2:
 923         case MSR_K7_EVNTSEL3:
 924                 if (data != 0)
 925                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 926                                 "0x%x data 0x%llx\n", msr, data);
 927                 break;
 928         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 929          * so we ignore writes to make it happy.
 930          */
 931         case MSR_P6_PERFCTR0:
 932         case MSR_P6_PERFCTR1:
 933         case MSR_K7_PERFCTR0:
 934         case MSR_K7_PERFCTR1:
 935         case MSR_K7_PERFCTR2:
 936         case MSR_K7_PERFCTR3:
 937                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 938                         "0x%x data 0x%llx\n", msr, data);
 939                 break;
 940         default:
 941                 if (!ignore_msrs) {
 942                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 943                                 msr, data);
 944                         return 1;
 945                 } else {
 946                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 947                                 msr, data);
 948                         break;
 949                 }
 950         }
 951         return 0;
 952 }
 953 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 954
 955
 956 /*
 957  * Reads an msr value (of 'msr_index') into 'pdata'.
 958  * Returns 0 on success, non-0 otherwise.
 959  * Assumes vcpu_load() was already called.
 960  */
 961 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 962 {
 963         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 964 }
 965
 966 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 967 {
 968         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 969
 970         if (!msr_mtrr_valid(msr))
 971                 return 1;
 972
 973         if (msr == MSR_MTRRdefType)
 974                 *pdata = vcpu->arch.mtrr_state.def_type +
 975                          (vcpu->arch.mtrr_state.enabled << 10);
 976         else if (msr == MSR_MTRRfix64K_00000)
 977                 *pdata = p[0];
 978         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 979                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 980         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 981                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 982         else if (msr == MSR_IA32_CR_PAT)
 983                 *pdata = vcpu->arch.pat;
 984         else {  /* Variable MTRRs */
 985                 int idx, is_mtrr_mask;
 986                 u64 *pt;
 987
 988                 idx = (msr - 0x200) / 2;
 989                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 990                 if (!is_mtrr_mask)
 991                         pt =
 992                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 993                 else
 994                         pt =
 995                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 996                 *pdata = *pt;
 997         }
 998
 999         return 0;
1000 }
1001
1002 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1003 {
1004         u64 data;
1005         u64 mcg_cap = vcpu->arch.mcg_cap;
1006         unsigned bank_num = mcg_cap & 0xff;
1007
1008         switch (msr) {
1009         case MSR_IA32_P5_MC_ADDR:
1010         case MSR_IA32_P5_MC_TYPE:
1011                 data = 0;
1012                 break;
1013         case MSR_IA32_MCG_CAP:
1014                 data = vcpu->arch.mcg_cap;
1015                 break;
1016         case MSR_IA32_MCG_CTL:
1017                 if (!(mcg_cap & MCG_CTL_P))
1018                         return 1;
1019                 data = vcpu->arch.mcg_ctl;
1020                 break;
1021         case MSR_IA32_MCG_STATUS:
1022                 data = vcpu->arch.mcg_status;
1023                 break;
1024         default:
1025                 if (msr >= MSR_IA32_MC0_CTL &&
1026                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1027                         u32 offset = msr - MSR_IA32_MC0_CTL;
1028                         data = vcpu->arch.mce_banks[offset];
1029                         break;
1030                 }
1031                 return 1;
1032         }
1033         *pdata = data;
1034         return 0;
1035 }
1036
1037 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1038 {
1039         u64 data;
1040
1041         switch (msr) {
1042         case MSR_IA32_PLATFORM_ID:
1043         case MSR_IA32_UCODE_REV:
1044         case MSR_IA32_EBL_CR_POWERON:
1045         case MSR_IA32_DEBUGCTLMSR:
1046         case MSR_IA32_LASTBRANCHFROMIP:
1047         case MSR_IA32_LASTBRANCHTOIP:
1048         case MSR_IA32_LASTINTFROMIP:
1049         case MSR_IA32_LASTINTTOIP:
1050         case MSR_K8_SYSCFG:
1051         case MSR_K7_HWCR:
1052         case MSR_VM_HSAVE_PA:
1053         case MSR_P6_EVNTSEL0:
1054         case MSR_P6_EVNTSEL1:
1055         case MSR_K7_EVNTSEL0:
1056         case MSR_K8_INT_PENDING_MSG:
1057         case MSR_AMD64_NB_CFG:
1058                 data = 0;
1059                 break;
1060         case MSR_MTRRcap:
1061                 data = 0x500 | KVM_NR_VAR_MTRR;
1062                 break;
1063         case 0x200 ... 0x2ff:
1064                 return get_msr_mtrr(vcpu, msr, pdata);
1065         case 0xcd: /* fsb frequency */
1066                 data = 3;
1067                 break;
1068         case MSR_IA32_APICBASE:
1069                 data = kvm_get_apic_base(vcpu);
1070                 break;
1071         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1072                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1073                 break;
1074         case MSR_IA32_MISC_ENABLE:
1075                 data = vcpu->arch.ia32_misc_enable_msr;
1076                 break;
1077         case MSR_IA32_PERF_STATUS:
1078                 /* TSC increment by tick */
1079                 data = 1000ULL;
1080                 /* CPU multiplier */
1081                 data |= (((uint64_t)4ULL) << 40);
1082                 break;
1083         case MSR_EFER:
1084                 data = vcpu->arch.shadow_efer;
1085                 break;
1086         case MSR_KVM_WALL_CLOCK:
1087                 data = vcpu->kvm->arch.wall_clock;
1088                 break;
1089         case MSR_KVM_SYSTEM_TIME:
1090                 data = vcpu->arch.time;
1091                 break;
1092         case MSR_IA32_P5_MC_ADDR:
1093         case MSR_IA32_P5_MC_TYPE:
1094         case MSR_IA32_MCG_CAP:
1095         case MSR_IA32_MCG_CTL:
1096         case MSR_IA32_MCG_STATUS:
1097         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1098                 return get_msr_mce(vcpu, msr, pdata);
1099         default:
1100                 if (!ignore_msrs) {
1101                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1102                         return 1;
1103                 } else {
1104                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1105                         data = 0;
1106                 }
1107                 break;
1108         }
1109         *pdata = data;
1110         return 0;
1111 }
1112 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1113
1114 /*
1115  * Read or write a bunch of msrs. All parameters are kernel addresses.
1116  *
1117  * @return number of msrs set successfully.
1118  */
1119 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1120                     struct kvm_msr_entry *entries,
1121                     int (*do_msr)(struct kvm_vcpu *vcpu,
1122                                   unsigned index, u64 *data))
1123 {
1124         int i;
1125
1126         vcpu_load(vcpu);
1127
1128         down_read(&vcpu->kvm->slots_lock);
1129         for (i = 0; i < msrs->nmsrs; ++i)
1130                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1131                         break;
1132         up_read(&vcpu->kvm->slots_lock);
1133
1134         vcpu_put(vcpu);
1135
1136         return i;
1137 }
1138
1139 /*
1140  * Read or write a bunch of msrs. Parameters are user addresses.
1141  *
1142  * @return number of msrs set successfully.
1143  */
1144 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1145                   int (*do_msr)(struct kvm_vcpu *vcpu,
1146                                 unsigned index, u64 *data),
1147                   int writeback)
1148 {
1149         struct kvm_msrs msrs;
1150         struct kvm_msr_entry *entries;
1151         int r, n;
1152         unsigned size;
1153
1154         r = -EFAULT;
1155         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1156                 goto out;
1157
1158         r = -E2BIG;
1159         if (msrs.nmsrs >= MAX_IO_MSRS)
1160                 goto out;
1161
1162         r = -ENOMEM;
1163         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1164         entries = vmalloc(size);
1165         if (!entries)
1166                 goto out;
1167
1168         r = -EFAULT;
1169         if (copy_from_user(entries, user_msrs->entries, size))
1170                 goto out_free;
1171
1172         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1173         if (r < 0)
1174                 goto out_free;
1175
1176         r = -EFAULT;
1177         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1178                 goto out_free;
1179
1180         r = n;
1181
1182 out_free:
1183         vfree(entries);
1184 out:
1185         return r;
1186 }
1187
1188 int kvm_dev_ioctl_check_extension(long ext)
1189 {
1190         int r;
1191
1192         switch (ext) {
1193         case KVM_CAP_IRQCHIP:
1194         case KVM_CAP_HLT:
1195         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1196         case KVM_CAP_SET_TSS_ADDR:
1197         case KVM_CAP_EXT_CPUID:
1198         case KVM_CAP_CLOCKSOURCE:
1199         case KVM_CAP_PIT:
1200         case KVM_CAP_NOP_IO_DELAY:
1201         case KVM_CAP_MP_STATE:
1202         case KVM_CAP_SYNC_MMU:
1203         case KVM_CAP_REINJECT_CONTROL:
1204         case KVM_CAP_IRQ_INJECT_STATUS:
1205         case KVM_CAP_ASSIGN_DEV_IRQ:
1206         case KVM_CAP_IRQFD:
1207         case KVM_CAP_PIT2:
1208                 r = 1;
1209                 break;
1210         case KVM_CAP_COALESCED_MMIO:
1211                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1212                 break;
1213         case KVM_CAP_VAPIC:
1214                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1215                 break;
1216         case KVM_CAP_NR_VCPUS:
1217                 r = KVM_MAX_VCPUS;
1218                 break;
1219         case KVM_CAP_NR_MEMSLOTS:
1220                 r = KVM_MEMORY_SLOTS;
1221                 break;
1222         case KVM_CAP_PV_MMU:
1223                 r = !tdp_enabled;
1224                 break;
1225         case KVM_CAP_IOMMU:
1226                 r = iommu_found();
1227                 break;
1228         case KVM_CAP_MCE:
1229                 r = KVM_MAX_MCE_BANKS;
1230                 break;
1231         default:
1232                 r = 0;
1233                 break;
1234         }
1235         return r;
1236
1237 }
1238
1239 long kvm_arch_dev_ioctl(struct file *filp,
1240                         unsigned int ioctl, unsigned long arg)
1241 {
1242         void __user *argp = (void __user *)arg;
1243         long r;
1244
1245         switch (ioctl) {
1246         case KVM_GET_MSR_INDEX_LIST: {
1247                 struct kvm_msr_list __user *user_msr_list = argp;
1248                 struct kvm_msr_list msr_list;
1249                 unsigned n;
1250
1251                 r = -EFAULT;
1252                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1253                         goto out;
1254                 n = msr_list.nmsrs;
1255                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1256                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1257                         goto out;
1258                 r = -E2BIG;
1259                 if (n < msr_list.nmsrs)
1260                         goto out;
1261                 r = -EFAULT;
1262                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1263                                  num_msrs_to_save * sizeof(u32)))
1264                         goto out;
1265                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1266                                  &emulated_msrs,
1267                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1268                         goto out;
1269                 r = 0;
1270                 break;
1271         }
1272         case KVM_GET_SUPPORTED_CPUID: {
1273                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1274                 struct kvm_cpuid2 cpuid;
1275
1276                 r = -EFAULT;
1277                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1278                         goto out;
1279                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1280                                                       cpuid_arg->entries);
1281                 if (r)
1282                         goto out;
1283
1284                 r = -EFAULT;
1285                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1286                         goto out;
1287                 r = 0;
1288                 break;
1289         }
1290         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1291                 u64 mce_cap;
1292
1293                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1294                 r = -EFAULT;
1295                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1296                         goto out;
1297                 r = 0;
1298                 break;
1299         }
1300         default:
1301                 r = -EINVAL;
1302         }
1303 out:
1304         return r;
1305 }
1306
1307 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1308 {
1309         kvm_x86_ops->vcpu_load(vcpu, cpu);
1310         kvm_request_guest_time_update(vcpu);
1311 }
1312
1313 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1314 {
1315         kvm_x86_ops->vcpu_put(vcpu);
1316         kvm_put_guest_fpu(vcpu);
1317 }
1318
1319 static int is_efer_nx(void)
1320 {
1321         unsigned long long efer = 0;
1322
1323         rdmsrl_safe(MSR_EFER, &efer);
1324         return efer & EFER_NX;
1325 }
1326
1327 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1328 {
1329         int i;
1330         struct kvm_cpuid_entry2 *e, *entry;
1331
1332         entry = NULL;
1333         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1334                 e = &vcpu->arch.cpuid_entries[i];
1335                 if (e->function == 0x80000001) {
1336                         entry = e;
1337                         break;
1338                 }
1339         }
1340         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1341                 entry->edx &= ~(1 << 20);
1342                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1343         }
1344 }
1345
1346 /* when an old userspace process fills a new kernel module */
1347 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1348                                     struct kvm_cpuid *cpuid,
1349                                     struct kvm_cpuid_entry __user *entries)
1350 {
1351         int r, i;
1352         struct kvm_cpuid_entry *cpuid_entries;
1353
1354         r = -E2BIG;
1355         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1356                 goto out;
1357         r = -ENOMEM;
1358         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1359         if (!cpuid_entries)
1360                 goto out;
1361         r = -EFAULT;
1362         if (copy_from_user(cpuid_entries, entries,
1363                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1364                 goto out_free;
1365         for (i = 0; i < cpuid->nent; i++) {
1366                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1367                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1368                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1369                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1370                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1371                 vcpu->arch.cpuid_entries[i].index = 0;
1372                 vcpu->arch.cpuid_entries[i].flags = 0;
1373                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1374                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1375                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1376         }
1377         vcpu->arch.cpuid_nent = cpuid->nent;
1378         cpuid_fix_nx_cap(vcpu);
1379         r = 0;
1380         kvm_apic_set_version(vcpu);
1381
1382 out_free:
1383         vfree(cpuid_entries);
1384 out:
1385         return r;
1386 }
1387
1388 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1389                                      struct kvm_cpuid2 *cpuid,
1390                                      struct kvm_cpuid_entry2 __user *entries)
1391 {
1392         int r;
1393
1394         r = -E2BIG;
1395         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1396                 goto out;
1397         r = -EFAULT;
1398         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1399                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1400                 goto out;
1401         vcpu->arch.cpuid_nent = cpuid->nent;
1402         kvm_apic_set_version(vcpu);
1403         return 0;
1404
1405 out:
1406         return r;
1407 }
1408
1409 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1410                                      struct kvm_cpuid2 *cpuid,
1411                                      struct kvm_cpuid_entry2 __user *entries)
1412 {
1413         int r;
1414
1415         r = -E2BIG;
1416         if (cpuid->nent < vcpu->arch.cpuid_nent)
1417                 goto out;
1418         r = -EFAULT;
1419         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1420                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1421                 goto out;
1422         return 0;
1423
1424 out:
1425         cpuid->nent = vcpu->arch.cpuid_nent;
1426         return r;
1427 }
1428
1429 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1430                            u32 index)
1431 {
1432         entry->function = function;
1433         entry->index = index;
1434         cpuid_count(entry->function, entry->index,
1435                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1436         entry->flags = 0;
1437 }
1438
1439 #define F(x) bit(X86_FEATURE_##x)
1440
1441 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1442                          u32 index, int *nent, int maxnent)
1443 {
1444         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1445 #ifdef CONFIG_X86_64
1446         unsigned f_lm = F(LM);
1447 #else
1448         unsigned f_lm = 0;
1449 #endif
1450
1451         /* cpuid 1.edx */
1452         const u32 kvm_supported_word0_x86_features =
1453                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1454                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1455                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1456                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1457                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1458                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1459                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1460                 0 /* HTT, TM, Reserved, PBE */;
1461         /* cpuid 0x80000001.edx */
1462         const u32 kvm_supported_word1_x86_features =
1463                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1464                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1465                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1466                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1467                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1468                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1469                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1470                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1471         /* cpuid 1.ecx */
1472         const u32 kvm_supported_word4_x86_features =
1473                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1474                 0 /* DS-CPL, VMX, SMX, EST */ |
1475                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1476                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1477                 0 /* Reserved, DCA */ | F(XMM4_1) |
1478                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1479                 0 /* Reserved, XSAVE, OSXSAVE */;
1480         /* cpuid 0x80000001.ecx */
1481         const u32 kvm_supported_word6_x86_features =
1482                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1483                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1484                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1485                 0 /* SKINIT */ | 0 /* WDT */;
1486
1487         /* all calls to cpuid_count() should be made on the same cpu */
1488         get_cpu();
1489         do_cpuid_1_ent(entry, function, index);
1490         ++*nent;
1491
1492         switch (function) {
1493         case 0:
1494                 entry->eax = min(entry->eax, (u32)0xb);
1495                 break;
1496         case 1:
1497                 entry->edx &= kvm_supported_word0_x86_features;
1498                 entry->ecx &= kvm_supported_word4_x86_features;
1499                 break;
1500         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1501          * may return different values. This forces us to get_cpu() before
1502          * issuing the first command, and also to emulate this annoying behavior
1503          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1504         case 2: {
1505                 int t, times = entry->eax & 0xff;
1506
1507                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1508                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1509                 for (t = 1; t < times && *nent < maxnent; ++t) {
1510                         do_cpuid_1_ent(&entry[t], function, 0);
1511                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1512                         ++*nent;
1513                 }
1514                 break;
1515         }
1516         /* function 4 and 0xb have additional index. */
1517         case 4: {
1518                 int i, cache_type;
1519
1520                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1521                 /* read more entries until cache_type is zero */
1522                 for (i = 1; *nent < maxnent; ++i) {
1523                         cache_type = entry[i - 1].eax & 0x1f;
1524                         if (!cache_type)
1525                                 break;
1526                         do_cpuid_1_ent(&entry[i], function, i);
1527                         entry[i].flags |=
1528                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1529                         ++*nent;
1530                 }
1531                 break;
1532         }
1533         case 0xb: {
1534                 int i, level_type;
1535
1536                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1537                 /* read more entries until level_type is zero */
1538                 for (i = 1; *nent < maxnent; ++i) {
1539                         level_type = entry[i - 1].ecx & 0xff00;
1540                         if (!level_type)
1541                                 break;
1542                         do_cpuid_1_ent(&entry[i], function, i);
1543                         entry[i].flags |=
1544                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1545                         ++*nent;
1546                 }
1547                 break;
1548         }
1549         case 0x80000000:
1550                 entry->eax = min(entry->eax, 0x8000001a);
1551                 break;
1552         case 0x80000001:
1553                 entry->edx &= kvm_supported_word1_x86_features;
1554                 entry->ecx &= kvm_supported_word6_x86_features;
1555                 break;
1556         }
1557         put_cpu();
1558 }
1559
1560 #undef F
1561
1562 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1563                                      struct kvm_cpuid_entry2 __user *entries)
1564 {
1565         struct kvm_cpuid_entry2 *cpuid_entries;
1566         int limit, nent = 0, r = -E2BIG;
1567         u32 func;
1568
1569         if (cpuid->nent < 1)
1570                 goto out;
1571         r = -ENOMEM;
1572         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1573         if (!cpuid_entries)
1574                 goto out;
1575
1576         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1577         limit = cpuid_entries[0].eax;
1578         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1579                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1580                              &nent, cpuid->nent);
1581         r = -E2BIG;
1582         if (nent >= cpuid->nent)
1583                 goto out_free;
1584
1585         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1586         limit = cpuid_entries[nent - 1].eax;
1587         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1588                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1589                              &nent, cpuid->nent);
1590         r = -E2BIG;
1591         if (nent >= cpuid->nent)
1592                 goto out_free;
1593
1594         r = -EFAULT;
1595         if (copy_to_user(entries, cpuid_entries,
1596                          nent * sizeof(struct kvm_cpuid_entry2)))
1597                 goto out_free;
1598         cpuid->nent = nent;
1599         r = 0;
1600
1601 out_free:
1602         vfree(cpuid_entries);
1603 out:
1604         return r;
1605 }
1606
1607 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1608                                     struct kvm_lapic_state *s)
1609 {
1610         vcpu_load(vcpu);
1611         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1612         vcpu_put(vcpu);
1613
1614         return 0;
1615 }
1616
1617 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1618                                     struct kvm_lapic_state *s)
1619 {
1620         vcpu_load(vcpu);
1621         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1622         kvm_apic_post_state_restore(vcpu);
1623         vcpu_put(vcpu);
1624
1625         return 0;
1626 }
1627
1628 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1629                                     struct kvm_interrupt *irq)
1630 {
1631         if (irq->irq < 0 || irq->irq >= 256)
1632                 return -EINVAL;
1633         if (irqchip_in_kernel(vcpu->kvm))
1634                 return -ENXIO;
1635         vcpu_load(vcpu);
1636
1637         kvm_queue_interrupt(vcpu, irq->irq, false);
1638
1639         vcpu_put(vcpu);
1640
1641         return 0;
1642 }
1643
1644 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1645 {
1646         vcpu_load(vcpu);
1647         kvm_inject_nmi(vcpu);
1648         vcpu_put(vcpu);
1649
1650         return 0;
1651 }
1652
1653 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1654                                            struct kvm_tpr_access_ctl *tac)
1655 {
1656         if (tac->flags)
1657                 return -EINVAL;
1658         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1659         return 0;
1660 }
1661
1662 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1663                                         u64 mcg_cap)
1664 {
1665         int r;
1666         unsigned bank_num = mcg_cap & 0xff, bank;
1667
1668         r = -EINVAL;
1669         if (!bank_num)
1670                 goto out;
1671         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1672                 goto out;
1673         r = 0;
1674         vcpu->arch.mcg_cap = mcg_cap;
1675         /* Init IA32_MCG_CTL to all 1s */
1676         if (mcg_cap & MCG_CTL_P)
1677                 vcpu->arch.mcg_ctl = ~(u64)0;
1678         /* Init IA32_MCi_CTL to all 1s */
1679         for (bank = 0; bank < bank_num; bank++)
1680                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1681 out:
1682         return r;
1683 }
1684
1685 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1686                                       struct kvm_x86_mce *mce)
1687 {
1688         u64 mcg_cap = vcpu->arch.mcg_cap;
1689         unsigned bank_num = mcg_cap & 0xff;
1690         u64 *banks = vcpu->arch.mce_banks;
1691
1692         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1693                 return -EINVAL;
1694         /*
1695          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1696          * reporting is disabled
1697          */
1698         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1699             vcpu->arch.mcg_ctl != ~(u64)0)
1700                 return 0;
1701         banks += 4 * mce->bank;
1702         /*
1703          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1704          * reporting is disabled for the bank
1705          */
1706         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1707                 return 0;
1708         if (mce->status & MCI_STATUS_UC) {
1709                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1710                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1711                         printk(KERN_DEBUG "kvm: set_mce: "
1712                                "injects mce exception while "
1713                                "previous one is in progress!\n");
1714                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1715                         return 0;
1716                 }
1717                 if (banks[1] & MCI_STATUS_VAL)
1718                         mce->status |= MCI_STATUS_OVER;
1719                 banks[2] = mce->addr;
1720                 banks[3] = mce->misc;
1721                 vcpu->arch.mcg_status = mce->mcg_status;
1722                 banks[1] = mce->status;
1723                 kvm_queue_exception(vcpu, MC_VECTOR);
1724         } else if (!(banks[1] & MCI_STATUS_VAL)
1725                    || !(banks[1] & MCI_STATUS_UC)) {
1726                 if (banks[1] & MCI_STATUS_VAL)
1727                         mce->status |= MCI_STATUS_OVER;
1728                 banks[2] = mce->addr;
1729                 banks[3] = mce->misc;
1730                 banks[1] = mce->status;
1731         } else
1732                 banks[1] |= MCI_STATUS_OVER;
1733         return 0;
1734 }
1735
1736 long kvm_arch_vcpu_ioctl(struct file *filp,
1737                          unsigned int ioctl, unsigned long arg)
1738 {
1739         struct kvm_vcpu *vcpu = filp->private_data;
1740         void __user *argp = (void __user *)arg;
1741         int r;
1742         struct kvm_lapic_state *lapic = NULL;
1743
1744         switch (ioctl) {
1745         case KVM_GET_LAPIC: {
1746                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1747
1748                 r = -ENOMEM;
1749                 if (!lapic)
1750                         goto out;
1751                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1752                 if (r)
1753                         goto out;
1754                 r = -EFAULT;
1755                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1756                         goto out;
1757                 r = 0;
1758                 break;
1759         }
1760         case KVM_SET_LAPIC: {
1761                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1762                 r = -ENOMEM;
1763                 if (!lapic)
1764                         goto out;
1765                 r = -EFAULT;
1766                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1767                         goto out;
1768                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1769                 if (r)
1770                         goto out;
1771                 r = 0;
1772                 break;
1773         }
1774         case KVM_INTERRUPT: {
1775                 struct kvm_interrupt irq;
1776
1777                 r = -EFAULT;
1778                 if (copy_from_user(&irq, argp, sizeof irq))
1779                         goto out;
1780                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1781                 if (r)
1782                         goto out;
1783                 r = 0;
1784                 break;
1785         }
1786         case KVM_NMI: {
1787                 r = kvm_vcpu_ioctl_nmi(vcpu);
1788                 if (r)
1789                         goto out;
1790                 r = 0;
1791                 break;
1792         }
1793         case KVM_SET_CPUID: {
1794                 struct kvm_cpuid __user *cpuid_arg = argp;
1795                 struct kvm_cpuid cpuid;
1796
1797                 r = -EFAULT;
1798                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1799                         goto out;
1800                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1801                 if (r)
1802                         goto out;
1803                 break;
1804         }
1805         case KVM_SET_CPUID2: {
1806                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1807                 struct kvm_cpuid2 cpuid;
1808
1809                 r = -EFAULT;
1810                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1811                         goto out;
1812                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1813                                               cpuid_arg->entries);
1814                 if (r)
1815                         goto out;
1816                 break;
1817         }
1818         case KVM_GET_CPUID2: {
1819                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1820                 struct kvm_cpuid2 cpuid;
1821
1822                 r = -EFAULT;
1823                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1824                         goto out;
1825                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1826                                               cpuid_arg->entries);
1827                 if (r)
1828                         goto out;
1829                 r = -EFAULT;
1830                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1831                         goto out;
1832                 r = 0;
1833                 break;
1834         }
1835         case KVM_GET_MSRS:
1836                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1837                 break;
1838         case KVM_SET_MSRS:
1839                 r = msr_io(vcpu, argp, do_set_msr, 0);
1840                 break;
1841         case KVM_TPR_ACCESS_REPORTING: {
1842                 struct kvm_tpr_access_ctl tac;
1843
1844                 r = -EFAULT;
1845                 if (copy_from_user(&tac, argp, sizeof tac))
1846                         goto out;
1847                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1848                 if (r)
1849                         goto out;
1850                 r = -EFAULT;
1851                 if (copy_to_user(argp, &tac, sizeof tac))
1852                         goto out;
1853                 r = 0;
1854                 break;
1855         };
1856         case KVM_SET_VAPIC_ADDR: {
1857                 struct kvm_vapic_addr va;
1858
1859                 r = -EINVAL;
1860                 if (!irqchip_in_kernel(vcpu->kvm))
1861                         goto out;
1862                 r = -EFAULT;
1863                 if (copy_from_user(&va, argp, sizeof va))
1864                         goto out;
1865                 r = 0;
1866                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1867                 break;
1868         }
1869         case KVM_X86_SETUP_MCE: {
1870                 u64 mcg_cap;
1871
1872                 r = -EFAULT;
1873                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1874                         goto out;
1875                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1876                 break;
1877         }
1878         case KVM_X86_SET_MCE: {
1879                 struct kvm_x86_mce mce;
1880
1881                 r = -EFAULT;
1882                 if (copy_from_user(&mce, argp, sizeof mce))
1883                         goto out;
1884                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1885                 break;
1886         }
1887         default:
1888                 r = -EINVAL;
1889         }
1890 out:
1891         kfree(lapic);
1892         return r;
1893 }
1894
1895 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1896 {
1897         int ret;
1898
1899         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1900                 return -1;
1901         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1902         return ret;
1903 }
1904
1905 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1906                                           u32 kvm_nr_mmu_pages)
1907 {
1908         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1909                 return -EINVAL;
1910
1911         down_write(&kvm->slots_lock);
1912         spin_lock(&kvm->mmu_lock);
1913
1914         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1915         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1916
1917         spin_unlock(&kvm->mmu_lock);
1918         up_write(&kvm->slots_lock);
1919         return 0;
1920 }
1921
1922 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1923 {
1924         return kvm->arch.n_alloc_mmu_pages;
1925 }
1926
1927 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1928 {
1929         int i;
1930         struct kvm_mem_alias *alias;
1931
1932         for (i = 0; i < kvm->arch.naliases; ++i) {
1933                 alias = &kvm->arch.aliases[i];
1934                 if (gfn >= alias->base_gfn
1935                     && gfn < alias->base_gfn + alias->npages)
1936                         return alias->target_gfn + gfn - alias->base_gfn;
1937         }
1938         return gfn;
1939 }
1940
1941 /*
1942  * Set a new alias region.  Aliases map a portion of physical memory into
1943  * another portion.  This is useful for memory windows, for example the PC
1944  * VGA region.
1945  */
1946 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1947                                          struct kvm_memory_alias *alias)
1948 {
1949         int r, n;
1950         struct kvm_mem_alias *p;
1951
1952         r = -EINVAL;
1953         /* General sanity checks */
1954         if (alias->memory_size & (PAGE_SIZE - 1))
1955                 goto out;
1956         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1957                 goto out;
1958         if (alias->slot >= KVM_ALIAS_SLOTS)
1959                 goto out;
1960         if (alias->guest_phys_addr + alias->memory_size
1961             < alias->guest_phys_addr)
1962                 goto out;
1963         if (alias->target_phys_addr + alias->memory_size
1964             < alias->target_phys_addr)
1965                 goto out;
1966
1967         down_write(&kvm->slots_lock);
1968         spin_lock(&kvm->mmu_lock);
1969
1970         p = &kvm->arch.aliases[alias->slot];
1971         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1972         p->npages = alias->memory_size >> PAGE_SHIFT;
1973         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1974
1975         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1976                 if (kvm->arch.aliases[n - 1].npages)
1977                         break;
1978         kvm->arch.naliases = n;
1979
1980         spin_unlock(&kvm->mmu_lock);
1981         kvm_mmu_zap_all(kvm);
1982
1983         up_write(&kvm->slots_lock);
1984
1985         return 0;
1986
1987 out:
1988         return r;
1989 }
1990
1991 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1992 {
1993         int r;
1994
1995         r = 0;
1996         switch (chip->chip_id) {
1997         case KVM_IRQCHIP_PIC_MASTER:
1998                 memcpy(&chip->chip.pic,
1999                         &pic_irqchip(kvm)->pics[0],
2000                         sizeof(struct kvm_pic_state));
2001                 break;
2002         case KVM_IRQCHIP_PIC_SLAVE:
2003                 memcpy(&chip->chip.pic,
2004                         &pic_irqchip(kvm)->pics[1],
2005                         sizeof(struct kvm_pic_state));
2006                 break;
2007         case KVM_IRQCHIP_IOAPIC:
2008                 memcpy(&chip->chip.ioapic,
2009                         ioapic_irqchip(kvm),
2010                         sizeof(struct kvm_ioapic_state));
2011                 break;
2012         default:
2013                 r = -EINVAL;
2014                 break;
2015         }
2016         return r;
2017 }
2018
2019 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2020 {
2021         int r;
2022
2023         r = 0;
2024         switch (chip->chip_id) {
2025         case KVM_IRQCHIP_PIC_MASTER:
2026                 spin_lock(&pic_irqchip(kvm)->lock);
2027                 memcpy(&pic_irqchip(kvm)->pics[0],
2028                         &chip->chip.pic,
2029                         sizeof(struct kvm_pic_state));
2030                 spin_unlock(&pic_irqchip(kvm)->lock);
2031                 break;
2032         case KVM_IRQCHIP_PIC_SLAVE:
2033                 spin_lock(&pic_irqchip(kvm)->lock);
2034                 memcpy(&pic_irqchip(kvm)->pics[1],
2035                         &chip->chip.pic,
2036                         sizeof(struct kvm_pic_state));
2037                 spin_unlock(&pic_irqchip(kvm)->lock);
2038                 break;
2039         case KVM_IRQCHIP_IOAPIC:
2040                 mutex_lock(&kvm->irq_lock);
2041                 memcpy(ioapic_irqchip(kvm),
2042                         &chip->chip.ioapic,
2043                         sizeof(struct kvm_ioapic_state));
2044                 mutex_unlock(&kvm->irq_lock);
2045                 break;
2046         default:
2047                 r = -EINVAL;
2048                 break;
2049         }
2050         kvm_pic_update_irq(pic_irqchip(kvm));
2051         return r;
2052 }
2053
2054 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2055 {
2056         int r = 0;
2057
2058         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2059         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2060         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2061         return r;
2062 }
2063
2064 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2065 {
2066         int r = 0;
2067
2068         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2069         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2070         kvm_pit_load_count(kvm, 0, ps->channels[0].count);
2071         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2072         return r;
2073 }
2074
2075 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2076                                  struct kvm_reinject_control *control)
2077 {
2078         if (!kvm->arch.vpit)
2079                 return -ENXIO;
2080         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2081         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2082         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2083         return 0;
2084 }
2085
2086 /*
2087  * Get (and clear) the dirty memory log for a memory slot.
2088  */
2089 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2090                                       struct kvm_dirty_log *log)
2091 {
2092         int r;
2093         int n;
2094         struct kvm_memory_slot *memslot;
2095         int is_dirty = 0;
2096
2097         down_write(&kvm->slots_lock);
2098
2099         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2100         if (r)
2101                 goto out;
2102
2103         /* If nothing is dirty, don't bother messing with page tables. */
2104         if (is_dirty) {
2105                 spin_lock(&kvm->mmu_lock);
2106                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2107                 spin_unlock(&kvm->mmu_lock);
2108                 kvm_flush_remote_tlbs(kvm);
2109                 memslot = &kvm->memslots[log->slot];
2110                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2111                 memset(memslot->dirty_bitmap, 0, n);
2112         }
2113         r = 0;
2114 out:
2115         up_write(&kvm->slots_lock);
2116         return r;
2117 }
2118
2119 long kvm_arch_vm_ioctl(struct file *filp,
2120                        unsigned int ioctl, unsigned long arg)
2121 {
2122         struct kvm *kvm = filp->private_data;
2123         void __user *argp = (void __user *)arg;
2124         int r = -EINVAL;
2125         /*
2126          * This union makes it completely explicit to gcc-3.x
2127          * that these two variables' stack usage should be
2128          * combined, not added together.
2129          */
2130         union {
2131                 struct kvm_pit_state ps;
2132                 struct kvm_memory_alias alias;
2133                 struct kvm_pit_config pit_config;
2134         } u;
2135
2136         switch (ioctl) {
2137         case KVM_SET_TSS_ADDR:
2138                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2139                 if (r < 0)
2140                         goto out;
2141                 break;
2142         case KVM_SET_MEMORY_REGION: {
2143                 struct kvm_memory_region kvm_mem;
2144                 struct kvm_userspace_memory_region kvm_userspace_mem;
2145
2146                 r = -EFAULT;
2147                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2148                         goto out;
2149                 kvm_userspace_mem.slot = kvm_mem.slot;
2150                 kvm_userspace_mem.flags = kvm_mem.flags;
2151                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2152                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2153                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2154                 if (r)
2155                         goto out;
2156                 break;
2157         }
2158         case KVM_SET_NR_MMU_PAGES:
2159                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2160                 if (r)
2161                         goto out;
2162                 break;
2163         case KVM_GET_NR_MMU_PAGES:
2164                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2165                 break;
2166         case KVM_SET_MEMORY_ALIAS:
2167                 r = -EFAULT;
2168                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2169                         goto out;
2170                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2171                 if (r)
2172                         goto out;
2173                 break;
2174         case KVM_CREATE_IRQCHIP:
2175                 r = -ENOMEM;
2176                 kvm->arch.vpic = kvm_create_pic(kvm);
2177                 if (kvm->arch.vpic) {
2178                         r = kvm_ioapic_init(kvm);
2179                         if (r) {
2180                                 kfree(kvm->arch.vpic);
2181                                 kvm->arch.vpic = NULL;
2182                                 goto out;
2183                         }
2184                 } else
2185                         goto out;
2186                 r = kvm_setup_default_irq_routing(kvm);
2187                 if (r) {
2188                         kfree(kvm->arch.vpic);
2189                         kfree(kvm->arch.vioapic);
2190                         goto out;
2191                 }
2192                 break;
2193         case KVM_CREATE_PIT:
2194                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2195                 goto create_pit;
2196         case KVM_CREATE_PIT2:
2197                 r = -EFAULT;
2198                 if (copy_from_user(&u.pit_config, argp,
2199                                    sizeof(struct kvm_pit_config)))
2200                         goto out;
2201         create_pit:
2202                 down_write(&kvm->slots_lock);
2203                 r = -EEXIST;
2204                 if (kvm->arch.vpit)
2205                         goto create_pit_unlock;
2206                 r = -ENOMEM;
2207                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2208                 if (kvm->arch.vpit)
2209                         r = 0;
2210         create_pit_unlock:
2211                 up_write(&kvm->slots_lock);
2212                 break;
2213         case KVM_IRQ_LINE_STATUS:
2214         case KVM_IRQ_LINE: {
2215                 struct kvm_irq_level irq_event;
2216
2217                 r = -EFAULT;
2218                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2219                         goto out;
2220                 if (irqchip_in_kernel(kvm)) {
2221                         __s32 status;
2222                         mutex_lock(&kvm->irq_lock);
2223                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2224                                         irq_event.irq, irq_event.level);
2225                         mutex_unlock(&kvm->irq_lock);
2226                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2227                                 irq_event.status = status;
2228                                 if (copy_to_user(argp, &irq_event,
2229                                                         sizeof irq_event))
2230                                         goto out;
2231                         }
2232                         r = 0;
2233                 }
2234                 break;
2235         }
2236         case KVM_GET_IRQCHIP: {
2237                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2238                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2239
2240                 r = -ENOMEM;
2241                 if (!chip)
2242                         goto out;
2243                 r = -EFAULT;
2244                 if (copy_from_user(chip, argp, sizeof *chip))
2245                         goto get_irqchip_out;
2246                 r = -ENXIO;
2247                 if (!irqchip_in_kernel(kvm))
2248                         goto get_irqchip_out;
2249                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2250                 if (r)
2251                         goto get_irqchip_out;
2252                 r = -EFAULT;
2253                 if (copy_to_user(argp, chip, sizeof *chip))
2254                         goto get_irqchip_out;
2255                 r = 0;
2256         get_irqchip_out:
2257                 kfree(chip);
2258                 if (r)
2259                         goto out;
2260                 break;
2261         }
2262         case KVM_SET_IRQCHIP: {
2263                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2264                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2265
2266                 r = -ENOMEM;
2267                 if (!chip)
2268                         goto out;
2269                 r = -EFAULT;
2270                 if (copy_from_user(chip, argp, sizeof *chip))
2271                         goto set_irqchip_out;
2272                 r = -ENXIO;
2273                 if (!irqchip_in_kernel(kvm))
2274                         goto set_irqchip_out;
2275                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2276                 if (r)
2277                         goto set_irqchip_out;
2278                 r = 0;
2279         set_irqchip_out:
2280                 kfree(chip);
2281                 if (r)
2282                         goto out;
2283                 break;
2284         }
2285         case KVM_GET_PIT: {
2286                 r = -EFAULT;
2287                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2288                         goto out;
2289                 r = -ENXIO;
2290                 if (!kvm->arch.vpit)
2291                         goto out;
2292                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2293                 if (r)
2294                         goto out;
2295                 r = -EFAULT;
2296                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2297                         goto out;
2298                 r = 0;
2299                 break;
2300         }
2301         case KVM_SET_PIT: {
2302                 r = -EFAULT;
2303                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2304                         goto out;
2305                 r = -ENXIO;
2306                 if (!kvm->arch.vpit)
2307                         goto out;
2308                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2309                 if (r)
2310                         goto out;
2311                 r = 0;
2312                 break;
2313         }
2314         case KVM_REINJECT_CONTROL: {
2315                 struct kvm_reinject_control control;
2316                 r =  -EFAULT;
2317                 if (copy_from_user(&control, argp, sizeof(control)))
2318                         goto out;
2319                 r = kvm_vm_ioctl_reinject(kvm, &control);
2320                 if (r)
2321                         goto out;
2322                 r = 0;
2323                 break;
2324         }
2325         default:
2326                 ;
2327         }
2328 out:
2329         return r;
2330 }
2331
2332 static void kvm_init_msr_list(void)
2333 {
2334         u32 dummy[2];
2335         unsigned i, j;
2336
2337         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2338                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2339                         continue;
2340                 if (j < i)
2341                         msrs_to_save[j] = msrs_to_save[i];
2342                 j++;
2343         }
2344         num_msrs_to_save = j;
2345 }
2346
2347 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2348                            const void *v)
2349 {
2350         if (vcpu->arch.apic &&
2351             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2352                 return 0;
2353
2354         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2355 }
2356
2357 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2358 {
2359         if (vcpu->arch.apic &&
2360             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2361                 return 0;
2362
2363         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2364 }
2365
2366 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2367                                struct kvm_vcpu *vcpu)
2368 {
2369         void *data = val;
2370         int r = X86EMUL_CONTINUE;
2371
2372         while (bytes) {
2373                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2374                 unsigned offset = addr & (PAGE_SIZE-1);
2375                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2376                 int ret;
2377
2378                 if (gpa == UNMAPPED_GVA) {
2379                         r = X86EMUL_PROPAGATE_FAULT;
2380                         goto out;
2381                 }
2382                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2383                 if (ret < 0) {
2384                         r = X86EMUL_UNHANDLEABLE;
2385                         goto out;
2386                 }
2387
2388                 bytes -= toread;
2389                 data += toread;
2390                 addr += toread;
2391         }
2392 out:
2393         return r;
2394 }
2395
2396 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2397                                 struct kvm_vcpu *vcpu)
2398 {
2399         void *data = val;
2400         int r = X86EMUL_CONTINUE;
2401
2402         while (bytes) {
2403                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2404                 unsigned offset = addr & (PAGE_SIZE-1);
2405                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2406                 int ret;
2407
2408                 if (gpa == UNMAPPED_GVA) {
2409                         r = X86EMUL_PROPAGATE_FAULT;
2410                         goto out;
2411                 }
2412                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2413                 if (ret < 0) {
2414                         r = X86EMUL_UNHANDLEABLE;
2415                         goto out;
2416                 }
2417
2418                 bytes -= towrite;
2419                 data += towrite;
2420                 addr += towrite;
2421         }
2422 out:
2423         return r;
2424 }
2425
2426
2427 static int emulator_read_emulated(unsigned long addr,
2428                                   void *val,
2429                                   unsigned int bytes,
2430                                   struct kvm_vcpu *vcpu)
2431 {
2432         gpa_t                 gpa;
2433
2434         if (vcpu->mmio_read_completed) {
2435                 memcpy(val, vcpu->mmio_data, bytes);
2436                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2437                                vcpu->mmio_phys_addr, *(u64 *)val);
2438                 vcpu->mmio_read_completed = 0;
2439                 return X86EMUL_CONTINUE;
2440         }
2441
2442         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2443
2444         /* For APIC access vmexit */
2445         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2446                 goto mmio;
2447
2448         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2449                                 == X86EMUL_CONTINUE)
2450                 return X86EMUL_CONTINUE;
2451         if (gpa == UNMAPPED_GVA)
2452                 return X86EMUL_PROPAGATE_FAULT;
2453
2454 mmio:
2455         /*
2456          * Is this MMIO handled locally?
2457          */
2458         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2459                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2460                 return X86EMUL_CONTINUE;
2461         }
2462
2463         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2464
2465         vcpu->mmio_needed = 1;
2466         vcpu->mmio_phys_addr = gpa;
2467         vcpu->mmio_size = bytes;
2468         vcpu->mmio_is_write = 0;
2469
2470         return X86EMUL_UNHANDLEABLE;
2471 }
2472
2473 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2474                           const void *val, int bytes)
2475 {
2476         int ret;
2477
2478         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2479         if (ret < 0)
2480                 return 0;
2481         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2482         return 1;
2483 }
2484
2485 static int emulator_write_emulated_onepage(unsigned long addr,
2486                                            const void *val,
2487                                            unsigned int bytes,
2488                                            struct kvm_vcpu *vcpu)
2489 {
2490         gpa_t                 gpa;
2491
2492         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2493
2494         if (gpa == UNMAPPED_GVA) {
2495                 kvm_inject_page_fault(vcpu, addr, 2);
2496                 return X86EMUL_PROPAGATE_FAULT;
2497         }
2498
2499         /* For APIC access vmexit */
2500         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2501                 goto mmio;
2502
2503         if (emulator_write_phys(vcpu, gpa, val, bytes))
2504                 return X86EMUL_CONTINUE;
2505
2506 mmio:
2507         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2508         /*
2509          * Is this MMIO handled locally?
2510          */
2511         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2512                 return X86EMUL_CONTINUE;
2513
2514         vcpu->mmio_needed = 1;
2515         vcpu->mmio_phys_addr = gpa;
2516         vcpu->mmio_size = bytes;
2517         vcpu->mmio_is_write = 1;
2518         memcpy(vcpu->mmio_data, val, bytes);
2519
2520         return X86EMUL_CONTINUE;
2521 }
2522
2523 int emulator_write_emulated(unsigned long addr,
2524                                    const void *val,
2525                                    unsigned int bytes,
2526                                    struct kvm_vcpu *vcpu)
2527 {
2528         /* Crossing a page boundary? */
2529         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2530                 int rc, now;
2531
2532                 now = -addr & ~PAGE_MASK;
2533                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2534                 if (rc != X86EMUL_CONTINUE)
2535                         return rc;
2536                 addr += now;
2537                 val += now;
2538                 bytes -= now;
2539         }
2540         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2541 }
2542 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2543
2544 static int emulator_cmpxchg_emulated(unsigned long addr,
2545                                      const void *old,
2546                                      const void *new,
2547                                      unsigned int bytes,
2548                                      struct kvm_vcpu *vcpu)
2549 {
2550         static int reported;
2551
2552         if (!reported) {
2553                 reported = 1;
2554                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2555         }
2556 #ifndef CONFIG_X86_64
2557         /* guests cmpxchg8b have to be emulated atomically */
2558         if (bytes == 8) {
2559                 gpa_t gpa;
2560                 struct page *page;
2561                 char *kaddr;
2562                 u64 val;
2563
2564                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2565
2566                 if (gpa == UNMAPPED_GVA ||
2567                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2568                         goto emul_write;
2569
2570                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2571                         goto emul_write;
2572
2573                 val = *(u64 *)new;
2574
2575                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2576
2577                 kaddr = kmap_atomic(page, KM_USER0);
2578                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2579                 kunmap_atomic(kaddr, KM_USER0);
2580                 kvm_release_page_dirty(page);
2581         }
2582 emul_write:
2583 #endif
2584
2585         return emulator_write_emulated(addr, new, bytes, vcpu);
2586 }
2587
2588 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2589 {
2590         return kvm_x86_ops->get_segment_base(vcpu, seg);
2591 }
2592
2593 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2594 {
2595         kvm_mmu_invlpg(vcpu, address);
2596         return X86EMUL_CONTINUE;
2597 }
2598
2599 int emulate_clts(struct kvm_vcpu *vcpu)
2600 {
2601         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2602         return X86EMUL_CONTINUE;
2603 }
2604
2605 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2606 {
2607         struct kvm_vcpu *vcpu = ctxt->vcpu;
2608
2609         switch (dr) {
2610         case 0 ... 3:
2611                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2612                 return X86EMUL_CONTINUE;
2613         default:
2614                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2615                 return X86EMUL_UNHANDLEABLE;
2616         }
2617 }
2618
2619 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2620 {
2621         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2622         int exception;
2623
2624         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2625         if (exception) {
2626                 /* FIXME: better handling */
2627                 return X86EMUL_UNHANDLEABLE;
2628         }
2629         return X86EMUL_CONTINUE;
2630 }
2631
2632 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2633 {
2634         u8 opcodes[4];
2635         unsigned long rip = kvm_rip_read(vcpu);
2636         unsigned long rip_linear;
2637
2638         if (!printk_ratelimit())
2639                 return;
2640
2641         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2642
2643         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2644
2645         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2646                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2647 }
2648 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2649
2650 static struct x86_emulate_ops emulate_ops = {
2651         .read_std            = kvm_read_guest_virt,
2652         .read_emulated       = emulator_read_emulated,
2653         .write_emulated      = emulator_write_emulated,
2654         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2655 };
2656
2657 static void cache_all_regs(struct kvm_vcpu *vcpu)
2658 {
2659         kvm_register_read(vcpu, VCPU_REGS_RAX);
2660         kvm_register_read(vcpu, VCPU_REGS_RSP);
2661         kvm_register_read(vcpu, VCPU_REGS_RIP);
2662         vcpu->arch.regs_dirty = ~0;
2663 }
2664
2665 int emulate_instruction(struct kvm_vcpu *vcpu,
2666                         struct kvm_run *run,
2667                         unsigned long cr2,
2668                         u16 error_code,
2669                         int emulation_type)
2670 {
2671         int r, shadow_mask;
2672         struct decode_cache *c;
2673
2674         kvm_clear_exception_queue(vcpu);
2675         vcpu->arch.mmio_fault_cr2 = cr2;
2676         /*
2677          * TODO: fix x86_emulate.c to use guest_read/write_register
2678          * instead of direct ->regs accesses, can save hundred cycles
2679          * on Intel for instructions that don't read/change RSP, for
2680          * for example.
2681          */
2682         cache_all_regs(vcpu);
2683
2684         vcpu->mmio_is_write = 0;
2685         vcpu->arch.pio.string = 0;
2686
2687         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2688                 int cs_db, cs_l;
2689                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2690
2691                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2692                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2693                 vcpu->arch.emulate_ctxt.mode =
2694                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2695                         ? X86EMUL_MODE_REAL : cs_l
2696                         ? X86EMUL_MODE_PROT64 : cs_db
2697                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2698
2699                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2700
2701                 /* Only allow emulation of specific instructions on #UD
2702                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2703                 c = &vcpu->arch.emulate_ctxt.decode;
2704                 if (emulation_type & EMULTYPE_TRAP_UD) {
2705                         if (!c->twobyte)
2706                                 return EMULATE_FAIL;
2707                         switch (c->b) {
2708                         case 0x01: /* VMMCALL */
2709                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2710                                         return EMULATE_FAIL;
2711                                 break;
2712                         case 0x34: /* sysenter */
2713                         case 0x35: /* sysexit */
2714                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2715                                         return EMULATE_FAIL;
2716                                 break;
2717                         case 0x05: /* syscall */
2718                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2719                                         return EMULATE_FAIL;
2720                                 break;
2721                         default:
2722                                 return EMULATE_FAIL;
2723                         }
2724
2725                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2726                                 return EMULATE_FAIL;
2727                 }
2728
2729                 ++vcpu->stat.insn_emulation;
2730                 if (r)  {
2731                         ++vcpu->stat.insn_emulation_fail;
2732                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2733                                 return EMULATE_DONE;
2734                         return EMULATE_FAIL;
2735                 }
2736         }
2737
2738         if (emulation_type & EMULTYPE_SKIP) {
2739                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2740                 return EMULATE_DONE;
2741         }
2742
2743         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2744         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2745
2746         if (r == 0)
2747                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2748
2749         if (vcpu->arch.pio.string)
2750                 return EMULATE_DO_MMIO;
2751
2752         if ((r || vcpu->mmio_is_write) && run) {
2753                 run->exit_reason = KVM_EXIT_MMIO;
2754                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2755                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2756                 run->mmio.len = vcpu->mmio_size;
2757                 run->mmio.is_write = vcpu->mmio_is_write;
2758         }
2759
2760         if (r) {
2761                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2762                         return EMULATE_DONE;
2763                 if (!vcpu->mmio_needed) {
2764                         kvm_report_emulation_failure(vcpu, "mmio");
2765                         return EMULATE_FAIL;
2766                 }
2767                 return EMULATE_DO_MMIO;
2768         }
2769
2770         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2771
2772         if (vcpu->mmio_is_write) {
2773                 vcpu->mmio_needed = 0;
2774                 return EMULATE_DO_MMIO;
2775         }
2776
2777         return EMULATE_DONE;
2778 }
2779 EXPORT_SYMBOL_GPL(emulate_instruction);
2780
2781 static int pio_copy_data(struct kvm_vcpu *vcpu)
2782 {
2783         void *p = vcpu->arch.pio_data;
2784         gva_t q = vcpu->arch.pio.guest_gva;
2785         unsigned bytes;
2786         int ret;
2787
2788         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2789         if (vcpu->arch.pio.in)
2790                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2791         else
2792                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2793         return ret;
2794 }
2795
2796 int complete_pio(struct kvm_vcpu *vcpu)
2797 {
2798         struct kvm_pio_request *io = &vcpu->arch.pio;
2799         long delta;
2800         int r;
2801         unsigned long val;
2802
2803         if (!io->string) {
2804                 if (io->in) {
2805                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2806                         memcpy(&val, vcpu->arch.pio_data, io->size);
2807                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2808                 }
2809         } else {
2810                 if (io->in) {
2811                         r = pio_copy_data(vcpu);
2812                         if (r)
2813                                 return r;
2814                 }
2815
2816                 delta = 1;
2817                 if (io->rep) {
2818                         delta *= io->cur_count;
2819                         /*
2820                          * The size of the register should really depend on
2821                          * current address size.
2822                          */
2823                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2824                         val -= delta;
2825                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2826                 }
2827                 if (io->down)
2828                         delta = -delta;
2829                 delta *= io->size;
2830                 if (io->in) {
2831                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2832                         val += delta;
2833                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2834                 } else {
2835                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2836                         val += delta;
2837                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2838                 }
2839         }
2840
2841         io->count -= io->cur_count;
2842         io->cur_count = 0;
2843
2844         return 0;
2845 }
2846
2847 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2848 {
2849         /* TODO: String I/O for in kernel device */
2850         int r;
2851
2852         if (vcpu->arch.pio.in)
2853                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2854                                     vcpu->arch.pio.size, pd);
2855         else
2856                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2857                                      vcpu->arch.pio.size, pd);
2858         return r;
2859 }
2860
2861 static int pio_string_write(struct kvm_vcpu *vcpu)
2862 {
2863         struct kvm_pio_request *io = &vcpu->arch.pio;
2864         void *pd = vcpu->arch.pio_data;
2865         int i, r = 0;
2866
2867         for (i = 0; i < io->cur_count; i++) {
2868                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2869                                      io->port, io->size, pd)) {
2870                         r = -EOPNOTSUPP;
2871                         break;
2872                 }
2873                 pd += io->size;
2874         }
2875         return r;
2876 }
2877
2878 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2879                   int size, unsigned port)
2880 {
2881         unsigned long val;
2882
2883         vcpu->run->exit_reason = KVM_EXIT_IO;
2884         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2885         vcpu->run->io.size = vcpu->arch.pio.size = size;
2886         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2887         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2888         vcpu->run->io.port = vcpu->arch.pio.port = port;
2889         vcpu->arch.pio.in = in;
2890         vcpu->arch.pio.string = 0;
2891         vcpu->arch.pio.down = 0;
2892         vcpu->arch.pio.rep = 0;
2893
2894         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2895                       size, 1);
2896
2897         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2898         memcpy(vcpu->arch.pio_data, &val, 4);
2899
2900         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2901                 complete_pio(vcpu);
2902                 return 1;
2903         }
2904         return 0;
2905 }
2906 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2907
2908 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2909                   int size, unsigned long count, int down,
2910                   gva_t address, int rep, unsigned port)
2911 {
2912         unsigned now, in_page;
2913         int ret = 0;
2914
2915         vcpu->run->exit_reason = KVM_EXIT_IO;
2916         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2917         vcpu->run->io.size = vcpu->arch.pio.size = size;
2918         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2919         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2920         vcpu->run->io.port = vcpu->arch.pio.port = port;
2921         vcpu->arch.pio.in = in;
2922         vcpu->arch.pio.string = 1;
2923         vcpu->arch.pio.down = down;
2924         vcpu->arch.pio.rep = rep;
2925
2926         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2927                       size, count);
2928
2929         if (!count) {
2930                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2931                 return 1;
2932         }
2933
2934         if (!down)
2935                 in_page = PAGE_SIZE - offset_in_page(address);
2936         else
2937                 in_page = offset_in_page(address) + size;
2938         now = min(count, (unsigned long)in_page / size);
2939         if (!now)
2940                 now = 1;
2941         if (down) {
2942                 /*
2943                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
2944                  */
2945                 pr_unimpl(vcpu, "guest string pio down\n");
2946                 kvm_inject_gp(vcpu, 0);
2947                 return 1;
2948         }
2949         vcpu->run->io.count = now;
2950         vcpu->arch.pio.cur_count = now;
2951
2952         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2953                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2954
2955         vcpu->arch.pio.guest_gva = address;
2956
2957         if (!vcpu->arch.pio.in) {
2958                 /* string PIO write */
2959                 ret = pio_copy_data(vcpu);
2960                 if (ret == X86EMUL_PROPAGATE_FAULT) {
2961                         kvm_inject_gp(vcpu, 0);
2962                         return 1;
2963                 }
2964                 if (ret == 0 && !pio_string_write(vcpu)) {
2965                         complete_pio(vcpu);
2966                         if (vcpu->arch.pio.count == 0)
2967                                 ret = 1;
2968                 }
2969         }
2970         /* no string PIO read support yet */
2971
2972         return ret;
2973 }
2974 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2975
2976 static void bounce_off(void *info)
2977 {
2978         /* nothing */
2979 }
2980
2981 static unsigned int  ref_freq;
2982 static unsigned long tsc_khz_ref;
2983
2984 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2985                                      void *data)
2986 {
2987         struct cpufreq_freqs *freq = data;
2988         struct kvm *kvm;
2989         struct kvm_vcpu *vcpu;
2990         int i, send_ipi = 0;
2991
2992         if (!ref_freq)
2993                 ref_freq = freq->old;
2994
2995         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2996                 return 0;
2997         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2998                 return 0;
2999         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3000
3001         spin_lock(&kvm_lock);
3002         list_for_each_entry(kvm, &vm_list, vm_list) {
3003                 kvm_for_each_vcpu(i, vcpu, kvm) {
3004                         if (vcpu->cpu != freq->cpu)
3005                                 continue;
3006                         if (!kvm_request_guest_time_update(vcpu))
3007                                 continue;
3008                         if (vcpu->cpu != smp_processor_id())
3009                                 send_ipi++;
3010                 }
3011         }
3012         spin_unlock(&kvm_lock);
3013
3014         if (freq->old < freq->new && send_ipi) {
3015                 /*
3016                  * We upscale the frequency.  Must make the guest
3017                  * doesn't see old kvmclock values while running with
3018                  * the new frequency, otherwise we risk the guest sees
3019                  * time go backwards.
3020                  *
3021                  * In case we update the frequency for another cpu
3022                  * (which might be in guest context) send an interrupt
3023                  * to kick the cpu out of guest context.  Next time
3024                  * guest context is entered kvmclock will be updated,
3025                  * so the guest will not see stale values.
3026                  */
3027                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3028         }
3029         return 0;
3030 }
3031
3032 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3033         .notifier_call  = kvmclock_cpufreq_notifier
3034 };
3035
3036 int kvm_arch_init(void *opaque)
3037 {
3038         int r, cpu;
3039         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3040
3041         if (kvm_x86_ops) {
3042                 printk(KERN_ERR "kvm: already loaded the other module\n");
3043                 r = -EEXIST;
3044                 goto out;
3045         }
3046
3047         if (!ops->cpu_has_kvm_support()) {
3048                 printk(KERN_ERR "kvm: no hardware support\n");
3049                 r = -EOPNOTSUPP;
3050                 goto out;
3051         }
3052         if (ops->disabled_by_bios()) {
3053                 printk(KERN_ERR "kvm: disabled by bios\n");
3054                 r = -EOPNOTSUPP;
3055                 goto out;
3056         }
3057
3058         r = kvm_mmu_module_init();
3059         if (r)
3060                 goto out;
3061
3062         kvm_init_msr_list();
3063
3064         kvm_x86_ops = ops;
3065         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3066         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3067         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3068                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3069
3070         for_each_possible_cpu(cpu)
3071                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3072         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3073                 tsc_khz_ref = tsc_khz;
3074                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3075                                           CPUFREQ_TRANSITION_NOTIFIER);
3076         }
3077
3078         return 0;
3079
3080 out:
3081         return r;
3082 }
3083
3084 void kvm_arch_exit(void)
3085 {
3086         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3087                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3088                                             CPUFREQ_TRANSITION_NOTIFIER);
3089         kvm_x86_ops = NULL;
3090         kvm_mmu_module_exit();
3091 }
3092
3093 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3094 {
3095         ++vcpu->stat.halt_exits;
3096         if (irqchip_in_kernel(vcpu->kvm)) {
3097                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3098                 return 1;
3099         } else {
3100                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3101                 return 0;
3102         }
3103 }
3104 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3105
3106 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3107                            unsigned long a1)
3108 {
3109         if (is_long_mode(vcpu))
3110                 return a0;
3111         else
3112                 return a0 | ((gpa_t)a1 << 32);
3113 }
3114
3115 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3116 {
3117         unsigned long nr, a0, a1, a2, a3, ret;
3118         int r = 1;
3119
3120         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3121         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3122         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3123         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3124         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3125
3126         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3127
3128         if (!is_long_mode(vcpu)) {
3129                 nr &= 0xFFFFFFFF;
3130                 a0 &= 0xFFFFFFFF;
3131                 a1 &= 0xFFFFFFFF;
3132                 a2 &= 0xFFFFFFFF;
3133                 a3 &= 0xFFFFFFFF;
3134         }
3135
3136         switch (nr) {
3137         case KVM_HC_VAPIC_POLL_IRQ:
3138                 ret = 0;
3139                 break;
3140         case KVM_HC_MMU_OP:
3141                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3142                 break;
3143         default:
3144                 ret = -KVM_ENOSYS;
3145                 break;
3146         }
3147         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3148         ++vcpu->stat.hypercalls;
3149         return r;
3150 }
3151 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3152
3153 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3154 {
3155         char instruction[3];
3156         int ret = 0;
3157         unsigned long rip = kvm_rip_read(vcpu);
3158
3159
3160         /*
3161          * Blow out the MMU to ensure that no other VCPU has an active mapping
3162          * to ensure that the updated hypercall appears atomically across all
3163          * VCPUs.
3164          */
3165         kvm_mmu_zap_all(vcpu->kvm);
3166
3167         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3168         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3169             != X86EMUL_CONTINUE)
3170                 ret = -EFAULT;
3171
3172         return ret;
3173 }
3174
3175 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3176 {
3177         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3178 }
3179
3180 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3181 {
3182         struct descriptor_table dt = { limit, base };
3183
3184         kvm_x86_ops->set_gdt(vcpu, &dt);
3185 }
3186
3187 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3188 {
3189         struct descriptor_table dt = { limit, base };
3190
3191         kvm_x86_ops->set_idt(vcpu, &dt);
3192 }
3193
3194 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3195                    unsigned long *rflags)
3196 {
3197         kvm_lmsw(vcpu, msw);
3198         *rflags = kvm_x86_ops->get_rflags(vcpu);
3199 }
3200
3201 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3202 {
3203         unsigned long value;
3204
3205         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3206         switch (cr) {
3207         case 0:
3208                 value = vcpu->arch.cr0;
3209                 break;
3210         case 2:
3211                 value = vcpu->arch.cr2;
3212                 break;
3213         case 3:
3214                 value = vcpu->arch.cr3;
3215                 break;
3216         case 4:
3217                 value = vcpu->arch.cr4;
3218                 break;
3219         case 8:
3220                 value = kvm_get_cr8(vcpu);
3221                 break;
3222         default:
3223                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3224                 return 0;
3225         }
3226
3227         return value;
3228 }
3229
3230 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3231                      unsigned long *rflags)
3232 {
3233         switch (cr) {
3234         case 0:
3235                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3236                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3237                 break;
3238         case 2:
3239                 vcpu->arch.cr2 = val;
3240                 break;
3241         case 3:
3242                 kvm_set_cr3(vcpu, val);
3243                 break;
3244         case 4:
3245                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3246                 break;
3247         case 8:
3248                 kvm_set_cr8(vcpu, val & 0xfUL);
3249                 break;
3250         default:
3251                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3252         }
3253 }
3254
3255 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3256 {
3257         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3258         int j, nent = vcpu->arch.cpuid_nent;
3259
3260         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3261         /* when no next entry is found, the current entry[i] is reselected */
3262         for (j = i + 1; ; j = (j + 1) % nent) {
3263                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3264                 if (ej->function == e->function) {
3265                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3266                         return j;
3267                 }
3268         }
3269         return 0; /* silence gcc, even though control never reaches here */
3270 }
3271
3272 /* find an entry with matching function, matching index (if needed), and that
3273  * should be read next (if it's stateful) */
3274 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3275         u32 function, u32 index)
3276 {
3277         if (e->function != function)
3278                 return 0;
3279         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3280                 return 0;
3281         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3282             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3283                 return 0;
3284         return 1;
3285 }
3286
3287 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3288                                               u32 function, u32 index)
3289 {
3290         int i;
3291         struct kvm_cpuid_entry2 *best = NULL;
3292
3293         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3294                 struct kvm_cpuid_entry2 *e;
3295
3296                 e = &vcpu->arch.cpuid_entries[i];
3297                 if (is_matching_cpuid_entry(e, function, index)) {
3298                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3299                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3300                         best = e;
3301                         break;
3302                 }
3303                 /*
3304                  * Both basic or both extended?
3305                  */
3306                 if (((e->function ^ function) & 0x80000000) == 0)
3307                         if (!best || e->function > best->function)
3308                                 best = e;
3309         }
3310         return best;
3311 }
3312
3313 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3314 {
3315         struct kvm_cpuid_entry2 *best;
3316
3317         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3318         if (best)
3319                 return best->eax & 0xff;
3320         return 36;
3321 }
3322
3323 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3324 {
3325         u32 function, index;
3326         struct kvm_cpuid_entry2 *best;
3327
3328         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3329         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3330         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3331         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3332         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3333         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3334         best = kvm_find_cpuid_entry(vcpu, function, index);
3335         if (best) {
3336                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3337                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3338                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3339                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3340         }
3341         kvm_x86_ops->skip_emulated_instruction(vcpu);
3342         trace_kvm_cpuid(function,
3343                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3344                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3345                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3346                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3347 }
3348 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3349
3350 /*
3351  * Check if userspace requested an interrupt window, and that the
3352  * interrupt window is open.
3353  *
3354  * No need to exit to userspace if we already have an interrupt queued.
3355  */
3356 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3357                                           struct kvm_run *kvm_run)
3358 {
3359         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3360                 kvm_run->request_interrupt_window &&
3361                 kvm_arch_interrupt_allowed(vcpu));
3362 }
3363
3364 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3365                               struct kvm_run *kvm_run)
3366 {
3367         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3368         kvm_run->cr8 = kvm_get_cr8(vcpu);
3369         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3370         if (irqchip_in_kernel(vcpu->kvm))
3371                 kvm_run->ready_for_interrupt_injection = 1;
3372         else
3373                 kvm_run->ready_for_interrupt_injection =
3374                         kvm_arch_interrupt_allowed(vcpu) &&
3375                         !kvm_cpu_has_interrupt(vcpu) &&
3376                         !kvm_event_needs_reinjection(vcpu);
3377 }
3378
3379 static void vapic_enter(struct kvm_vcpu *vcpu)
3380 {
3381         struct kvm_lapic *apic = vcpu->arch.apic;
3382         struct page *page;
3383
3384         if (!apic || !apic->vapic_addr)
3385                 return;
3386
3387         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3388
3389         vcpu->arch.apic->vapic_page = page;
3390 }
3391
3392 static void vapic_exit(struct kvm_vcpu *vcpu)
3393 {
3394         struct kvm_lapic *apic = vcpu->arch.apic;
3395
3396         if (!apic || !apic->vapic_addr)
3397                 return;
3398
3399         down_read(&vcpu->kvm->slots_lock);
3400         kvm_release_page_dirty(apic->vapic_page);
3401         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3402         up_read(&vcpu->kvm->slots_lock);
3403 }
3404
3405 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3406 {
3407         int max_irr, tpr;
3408
3409         if (!kvm_x86_ops->update_cr8_intercept)
3410                 return;
3411
3412         if (!vcpu->arch.apic->vapic_addr)
3413                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3414         else
3415                 max_irr = -1;
3416
3417         if (max_irr != -1)
3418                 max_irr >>= 4;
3419
3420         tpr = kvm_lapic_get_cr8(vcpu);
3421
3422         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3423 }
3424
3425 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3426 {
3427         /* try to reinject previous events if any */
3428         if (vcpu->arch.nmi_injected) {
3429                 kvm_x86_ops->set_nmi(vcpu);
3430                 return;
3431         }
3432
3433         if (vcpu->arch.interrupt.pending) {
3434                 kvm_x86_ops->set_irq(vcpu);
3435                 return;
3436         }
3437
3438         /* try to inject new event if pending */
3439         if (vcpu->arch.nmi_pending) {
3440                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3441                         vcpu->arch.nmi_pending = false;
3442                         vcpu->arch.nmi_injected = true;
3443                         kvm_x86_ops->set_nmi(vcpu);
3444                 }
3445         } else if (kvm_cpu_has_interrupt(vcpu)) {
3446                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3447                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3448                                             false);
3449                         kvm_x86_ops->set_irq(vcpu);
3450                 }
3451         }
3452 }
3453
3454 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3455 {
3456         int r;
3457         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3458                 kvm_run->request_interrupt_window;
3459
3460         if (vcpu->requests)
3461                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3462                         kvm_mmu_unload(vcpu);
3463
3464         r = kvm_mmu_reload(vcpu);
3465         if (unlikely(r))
3466                 goto out;
3467
3468         if (vcpu->requests) {
3469                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3470                         __kvm_migrate_timers(vcpu);
3471                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3472                         kvm_write_guest_time(vcpu);
3473                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3474                         kvm_mmu_sync_roots(vcpu);
3475                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3476                         kvm_x86_ops->tlb_flush(vcpu);
3477                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3478                                        &vcpu->requests)) {
3479                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3480                         r = 0;
3481                         goto out;
3482                 }
3483                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3484                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3485                         r = 0;
3486                         goto out;
3487                 }
3488         }
3489
3490         preempt_disable();
3491
3492         kvm_x86_ops->prepare_guest_switch(vcpu);
3493         kvm_load_guest_fpu(vcpu);
3494
3495         local_irq_disable();
3496
3497         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3498         smp_mb__after_clear_bit();
3499
3500         if (vcpu->requests || need_resched() || signal_pending(current)) {
3501                 local_irq_enable();
3502                 preempt_enable();
3503                 r = 1;
3504                 goto out;
3505         }
3506
3507         if (vcpu->arch.exception.pending)
3508                 __queue_exception(vcpu);
3509         else
3510                 inject_pending_irq(vcpu, kvm_run);
3511
3512         /* enable NMI/IRQ window open exits if needed */
3513         if (vcpu->arch.nmi_pending)
3514                 kvm_x86_ops->enable_nmi_window(vcpu);
3515         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3516                 kvm_x86_ops->enable_irq_window(vcpu);
3517
3518         if (kvm_lapic_enabled(vcpu)) {
3519                 update_cr8_intercept(vcpu);
3520                 kvm_lapic_sync_to_vapic(vcpu);
3521         }
3522
3523         up_read(&vcpu->kvm->slots_lock);
3524
3525         kvm_guest_enter();
3526
3527         get_debugreg(vcpu->arch.host_dr6, 6);
3528         get_debugreg(vcpu->arch.host_dr7, 7);
3529         if (unlikely(vcpu->arch.switch_db_regs)) {
3530                 get_debugreg(vcpu->arch.host_db[0], 0);
3531                 get_debugreg(vcpu->arch.host_db[1], 1);
3532                 get_debugreg(vcpu->arch.host_db[2], 2);
3533                 get_debugreg(vcpu->arch.host_db[3], 3);
3534
3535                 set_debugreg(0, 7);
3536                 set_debugreg(vcpu->arch.eff_db[0], 0);
3537                 set_debugreg(vcpu->arch.eff_db[1], 1);
3538                 set_debugreg(vcpu->arch.eff_db[2], 2);
3539                 set_debugreg(vcpu->arch.eff_db[3], 3);
3540         }
3541
3542         trace_kvm_entry(vcpu->vcpu_id);
3543         kvm_x86_ops->run(vcpu, kvm_run);
3544
3545         if (unlikely(vcpu->arch.switch_db_regs)) {
3546                 set_debugreg(0, 7);
3547                 set_debugreg(vcpu->arch.host_db[0], 0);
3548                 set_debugreg(vcpu->arch.host_db[1], 1);
3549                 set_debugreg(vcpu->arch.host_db[2], 2);
3550                 set_debugreg(vcpu->arch.host_db[3], 3);
3551         }
3552         set_debugreg(vcpu->arch.host_dr6, 6);
3553         set_debugreg(vcpu->arch.host_dr7, 7);
3554
3555         set_bit(KVM_REQ_KICK, &vcpu->requests);
3556         local_irq_enable();
3557
3558         ++vcpu->stat.exits;
3559
3560         /*
3561          * We must have an instruction between local_irq_enable() and
3562          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3563          * the interrupt shadow.  The stat.exits increment will do nicely.
3564          * But we need to prevent reordering, hence this barrier():
3565          */
3566         barrier();
3567
3568         kvm_guest_exit();
3569
3570         preempt_enable();
3571
3572         down_read(&vcpu->kvm->slots_lock);
3573
3574         /*
3575          * Profile KVM exit RIPs:
3576          */
3577         if (unlikely(prof_on == KVM_PROFILING)) {
3578                 unsigned long rip = kvm_rip_read(vcpu);
3579                 profile_hit(KVM_PROFILING, (void *)rip);
3580         }
3581
3582
3583         kvm_lapic_sync_from_vapic(vcpu);
3584
3585         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3586 out:
3587         return r;
3588 }
3589
3590
3591 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3592 {
3593         int r;
3594
3595         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3596                 pr_debug("vcpu %d received sipi with vector # %x\n",
3597                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3598                 kvm_lapic_reset(vcpu);
3599                 r = kvm_arch_vcpu_reset(vcpu);
3600                 if (r)
3601                         return r;
3602                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3603         }
3604
3605         down_read(&vcpu->kvm->slots_lock);
3606         vapic_enter(vcpu);
3607
3608         r = 1;
3609         while (r > 0) {
3610                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3611                         r = vcpu_enter_guest(vcpu, kvm_run);
3612                 else {
3613                         up_read(&vcpu->kvm->slots_lock);
3614                         kvm_vcpu_block(vcpu);
3615                         down_read(&vcpu->kvm->slots_lock);
3616                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3617                         {
3618                                 switch(vcpu->arch.mp_state) {
3619                                 case KVM_MP_STATE_HALTED:
3620                                         vcpu->arch.mp_state =
3621                                                 KVM_MP_STATE_RUNNABLE;
3622                                 case KVM_MP_STATE_RUNNABLE:
3623                                         break;
3624                                 case KVM_MP_STATE_SIPI_RECEIVED:
3625                                 default:
3626                                         r = -EINTR;
3627                                         break;
3628                                 }
3629                         }
3630                 }
3631
3632                 if (r <= 0)
3633                         break;
3634
3635                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3636                 if (kvm_cpu_has_pending_timer(vcpu))
3637                         kvm_inject_pending_timer_irqs(vcpu);
3638
3639                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3640                         r = -EINTR;
3641                         kvm_run->exit_reason = KVM_EXIT_INTR;
3642                         ++vcpu->stat.request_irq_exits;
3643                 }
3644                 if (signal_pending(current)) {
3645                         r = -EINTR;
3646                         kvm_run->exit_reason = KVM_EXIT_INTR;
3647                         ++vcpu->stat.signal_exits;
3648                 }
3649                 if (need_resched()) {
3650                         up_read(&vcpu->kvm->slots_lock);
3651                         kvm_resched(vcpu);
3652                         down_read(&vcpu->kvm->slots_lock);
3653                 }
3654         }
3655
3656         up_read(&vcpu->kvm->slots_lock);
3657         post_kvm_run_save(vcpu, kvm_run);
3658
3659         vapic_exit(vcpu);
3660
3661         return r;
3662 }
3663
3664 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3665 {
3666         int r;
3667         sigset_t sigsaved;
3668
3669         vcpu_load(vcpu);
3670
3671         if (vcpu->sigset_active)
3672                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3673
3674         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3675                 kvm_vcpu_block(vcpu);
3676                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3677                 r = -EAGAIN;
3678                 goto out;
3679         }
3680
3681         /* re-sync apic's tpr */
3682         if (!irqchip_in_kernel(vcpu->kvm))
3683                 kvm_set_cr8(vcpu, kvm_run->cr8);
3684
3685         if (vcpu->arch.pio.cur_count) {
3686                 r = complete_pio(vcpu);
3687                 if (r)
3688                         goto out;
3689         }
3690 #if CONFIG_HAS_IOMEM
3691         if (vcpu->mmio_needed) {
3692                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3693                 vcpu->mmio_read_completed = 1;
3694                 vcpu->mmio_needed = 0;
3695
3696                 down_read(&vcpu->kvm->slots_lock);
3697                 r = emulate_instruction(vcpu, kvm_run,
3698                                         vcpu->arch.mmio_fault_cr2, 0,
3699                                         EMULTYPE_NO_DECODE);
3700                 up_read(&vcpu->kvm->slots_lock);
3701                 if (r == EMULATE_DO_MMIO) {
3702                         /*
3703                          * Read-modify-write.  Back to userspace.
3704                          */
3705                         r = 0;
3706                         goto out;
3707                 }
3708         }
3709 #endif
3710         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3711                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3712                                      kvm_run->hypercall.ret);
3713
3714         r = __vcpu_run(vcpu, kvm_run);
3715
3716 out:
3717         if (vcpu->sigset_active)
3718                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3719
3720         vcpu_put(vcpu);
3721         return r;
3722 }
3723
3724 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3725 {
3726         vcpu_load(vcpu);
3727
3728         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3729         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3730         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3731         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3732         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3733         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3734         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3735         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3736 #ifdef CONFIG_X86_64
3737         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3738         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3739         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3740         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3741         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3742         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3743         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3744         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3745 #endif
3746
3747         regs->rip = kvm_rip_read(vcpu);
3748         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3749
3750         /*
3751          * Don't leak debug flags in case they were set for guest debugging
3752          */
3753         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3754                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3755
3756         vcpu_put(vcpu);
3757
3758         return 0;
3759 }
3760
3761 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3762 {
3763         vcpu_load(vcpu);
3764
3765         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3766         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3767         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3768         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3769         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3770         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3771         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3772         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3773 #ifdef CONFIG_X86_64
3774         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3775         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3776         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3777         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3778         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3779         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3780         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3781         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3782
3783 #endif
3784
3785         kvm_rip_write(vcpu, regs->rip);
3786         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3787
3788
3789         vcpu->arch.exception.pending = false;
3790
3791         vcpu_put(vcpu);
3792
3793         return 0;
3794 }
3795
3796 void kvm_get_segment(struct kvm_vcpu *vcpu,
3797                      struct kvm_segment *var, int seg)
3798 {
3799         kvm_x86_ops->get_segment(vcpu, var, seg);
3800 }
3801
3802 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3803 {
3804         struct kvm_segment cs;
3805
3806         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3807         *db = cs.db;
3808         *l = cs.l;
3809 }
3810 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3811
3812 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3813                                   struct kvm_sregs *sregs)
3814 {
3815         struct descriptor_table dt;
3816
3817         vcpu_load(vcpu);
3818
3819         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3820         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3821         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3822         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3823         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3824         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3825
3826         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3827         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3828
3829         kvm_x86_ops->get_idt(vcpu, &dt);
3830         sregs->idt.limit = dt.limit;
3831         sregs->idt.base = dt.base;
3832         kvm_x86_ops->get_gdt(vcpu, &dt);
3833         sregs->gdt.limit = dt.limit;
3834         sregs->gdt.base = dt.base;
3835
3836         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3837         sregs->cr0 = vcpu->arch.cr0;
3838         sregs->cr2 = vcpu->arch.cr2;
3839         sregs->cr3 = vcpu->arch.cr3;
3840         sregs->cr4 = vcpu->arch.cr4;
3841         sregs->cr8 = kvm_get_cr8(vcpu);
3842         sregs->efer = vcpu->arch.shadow_efer;
3843         sregs->apic_base = kvm_get_apic_base(vcpu);
3844
3845         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3846
3847         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3848                 set_bit(vcpu->arch.interrupt.nr,
3849                         (unsigned long *)sregs->interrupt_bitmap);
3850
3851         vcpu_put(vcpu);
3852
3853         return 0;
3854 }
3855
3856 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3857                                     struct kvm_mp_state *mp_state)
3858 {
3859         vcpu_load(vcpu);
3860         mp_state->mp_state = vcpu->arch.mp_state;
3861         vcpu_put(vcpu);
3862         return 0;
3863 }
3864
3865 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3866                                     struct kvm_mp_state *mp_state)
3867 {
3868         vcpu_load(vcpu);
3869         vcpu->arch.mp_state = mp_state->mp_state;
3870         vcpu_put(vcpu);
3871         return 0;
3872 }
3873
3874 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3875                         struct kvm_segment *var, int seg)
3876 {
3877         kvm_x86_ops->set_segment(vcpu, var, seg);
3878 }
3879
3880 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3881                                    struct kvm_segment *kvm_desct)
3882 {
3883         kvm_desct->base = seg_desc->base0;
3884         kvm_desct->base |= seg_desc->base1 << 16;
3885         kvm_desct->base |= seg_desc->base2 << 24;
3886         kvm_desct->limit = seg_desc->limit0;
3887         kvm_desct->limit |= seg_desc->limit << 16;
3888         if (seg_desc->g) {
3889                 kvm_desct->limit <<= 12;
3890                 kvm_desct->limit |= 0xfff;
3891         }
3892         kvm_desct->selector = selector;
3893         kvm_desct->type = seg_desc->type;
3894         kvm_desct->present = seg_desc->p;
3895         kvm_desct->dpl = seg_desc->dpl;
3896         kvm_desct->db = seg_desc->d;
3897         kvm_desct->s = seg_desc->s;
3898         kvm_desct->l = seg_desc->l;
3899         kvm_desct->g = seg_desc->g;
3900         kvm_desct->avl = seg_desc->avl;
3901         if (!selector)
3902                 kvm_desct->unusable = 1;
3903         else
3904                 kvm_desct->unusable = 0;
3905         kvm_desct->padding = 0;
3906 }
3907
3908 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3909                                           u16 selector,
3910                                           struct descriptor_table *dtable)
3911 {
3912         if (selector & 1 << 2) {
3913                 struct kvm_segment kvm_seg;
3914
3915                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3916
3917                 if (kvm_seg.unusable)
3918                         dtable->limit = 0;
3919                 else
3920                         dtable->limit = kvm_seg.limit;
3921                 dtable->base = kvm_seg.base;
3922         }
3923         else
3924                 kvm_x86_ops->get_gdt(vcpu, dtable);
3925 }
3926
3927 /* allowed just for 8 bytes segments */
3928 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3929                                          struct desc_struct *seg_desc)
3930 {
3931         gpa_t gpa;
3932         struct descriptor_table dtable;
3933         u16 index = selector >> 3;
3934
3935         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3936
3937         if (dtable.limit < index * 8 + 7) {
3938                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3939                 return 1;
3940         }
3941         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3942         gpa += index * 8;
3943         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3944 }
3945
3946 /* allowed just for 8 bytes segments */
3947 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3948                                          struct desc_struct *seg_desc)
3949 {
3950         gpa_t gpa;
3951         struct descriptor_table dtable;
3952         u16 index = selector >> 3;
3953
3954         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3955
3956         if (dtable.limit < index * 8 + 7)
3957                 return 1;
3958         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3959         gpa += index * 8;
3960         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3961 }
3962
3963 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3964                              struct desc_struct *seg_desc)
3965 {
3966         u32 base_addr;
3967
3968         base_addr = seg_desc->base0;
3969         base_addr |= (seg_desc->base1 << 16);
3970         base_addr |= (seg_desc->base2 << 24);
3971
3972         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3973 }
3974
3975 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3976 {
3977         struct kvm_segment kvm_seg;
3978
3979         kvm_get_segment(vcpu, &kvm_seg, seg);
3980         return kvm_seg.selector;
3981 }
3982
3983 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3984                                                 u16 selector,
3985                                                 struct kvm_segment *kvm_seg)
3986 {
3987         struct desc_struct seg_desc;
3988
3989         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3990                 return 1;
3991         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3992         return 0;
3993 }
3994
3995 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3996 {
3997         struct kvm_segment segvar = {
3998                 .base = selector << 4,
3999                 .limit = 0xffff,
4000                 .selector = selector,
4001                 .type = 3,
4002                 .present = 1,
4003                 .dpl = 3,
4004                 .db = 0,
4005                 .s = 1,
4006                 .l = 0,
4007                 .g = 0,
4008                 .avl = 0,
4009                 .unusable = 0,
4010         };
4011         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4012         return 0;
4013 }
4014
4015 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4016                                 int type_bits, int seg)
4017 {
4018         struct kvm_segment kvm_seg;
4019
4020         if (!(vcpu->arch.cr0 & X86_CR0_PE))
4021                 return kvm_load_realmode_segment(vcpu, selector, seg);
4022         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4023                 return 1;
4024         kvm_seg.type |= type_bits;
4025
4026         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4027             seg != VCPU_SREG_LDTR)
4028                 if (!kvm_seg.s)
4029                         kvm_seg.unusable = 1;
4030
4031         kvm_set_segment(vcpu, &kvm_seg, seg);
4032         return 0;
4033 }
4034
4035 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4036                                 struct tss_segment_32 *tss)
4037 {
4038         tss->cr3 = vcpu->arch.cr3;
4039         tss->eip = kvm_rip_read(vcpu);
4040         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4041         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4042         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4043         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4044         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4045         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4046         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4047         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4048         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4049         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4050         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4051         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4052         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4053         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4054         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4055         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4056 }
4057
4058 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4059                                   struct tss_segment_32 *tss)
4060 {
4061         kvm_set_cr3(vcpu, tss->cr3);
4062
4063         kvm_rip_write(vcpu, tss->eip);
4064         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4065
4066         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4067         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4068         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4069         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4070         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4071         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4072         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4073         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4074
4075         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4076                 return 1;
4077
4078         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4079                 return 1;
4080
4081         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4082                 return 1;
4083
4084         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4085                 return 1;
4086
4087         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4088                 return 1;
4089
4090         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4091                 return 1;
4092
4093         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4094                 return 1;
4095         return 0;
4096 }
4097
4098 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4099                                 struct tss_segment_16 *tss)
4100 {
4101         tss->ip = kvm_rip_read(vcpu);
4102         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4103         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4104         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4105         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4106         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4107         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4108         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4109         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4110         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4111
4112         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4113         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4114         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4115         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4116         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4117         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4118 }
4119
4120 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4121                                  struct tss_segment_16 *tss)
4122 {
4123         kvm_rip_write(vcpu, tss->ip);
4124         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4125         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4126         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4127         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4128         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4129         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4130         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4131         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4132         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4133
4134         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4135                 return 1;
4136
4137         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4138                 return 1;
4139
4140         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4141                 return 1;
4142
4143         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4144                 return 1;
4145
4146         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4147                 return 1;
4148         return 0;
4149 }
4150
4151 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4152                               u16 old_tss_sel, u32 old_tss_base,
4153                               struct desc_struct *nseg_desc)
4154 {
4155         struct tss_segment_16 tss_segment_16;
4156         int ret = 0;
4157
4158         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4159                            sizeof tss_segment_16))
4160                 goto out;
4161
4162         save_state_to_tss16(vcpu, &tss_segment_16);
4163
4164         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4165                             sizeof tss_segment_16))
4166                 goto out;
4167
4168         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4169                            &tss_segment_16, sizeof tss_segment_16))
4170                 goto out;
4171
4172         if (old_tss_sel != 0xffff) {
4173                 tss_segment_16.prev_task_link = old_tss_sel;
4174
4175                 if (kvm_write_guest(vcpu->kvm,
4176                                     get_tss_base_addr(vcpu, nseg_desc),
4177                                     &tss_segment_16.prev_task_link,
4178                                     sizeof tss_segment_16.prev_task_link))
4179                         goto out;
4180         }
4181
4182         if (load_state_from_tss16(vcpu, &tss_segment_16))
4183                 goto out;
4184
4185         ret = 1;
4186 out:
4187         return ret;
4188 }
4189
4190 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4191                        u16 old_tss_sel, u32 old_tss_base,
4192                        struct desc_struct *nseg_desc)
4193 {
4194         struct tss_segment_32 tss_segment_32;
4195         int ret = 0;
4196
4197         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4198                            sizeof tss_segment_32))
4199                 goto out;
4200
4201         save_state_to_tss32(vcpu, &tss_segment_32);
4202
4203         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4204                             sizeof tss_segment_32))
4205                 goto out;
4206
4207         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4208                            &tss_segment_32, sizeof tss_segment_32))
4209                 goto out;
4210
4211         if (old_tss_sel != 0xffff) {
4212                 tss_segment_32.prev_task_link = old_tss_sel;
4213
4214                 if (kvm_write_guest(vcpu->kvm,
4215                                     get_tss_base_addr(vcpu, nseg_desc),
4216                                     &tss_segment_32.prev_task_link,
4217                                     sizeof tss_segment_32.prev_task_link))
4218                         goto out;
4219         }
4220
4221         if (load_state_from_tss32(vcpu, &tss_segment_32))
4222                 goto out;
4223
4224         ret = 1;
4225 out:
4226         return ret;
4227 }
4228
4229 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4230 {
4231         struct kvm_segment tr_seg;
4232         struct desc_struct cseg_desc;
4233         struct desc_struct nseg_desc;
4234         int ret = 0;
4235         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4236         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4237
4238         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4239
4240         /* FIXME: Handle errors. Failure to read either TSS or their
4241          * descriptors should generate a pagefault.
4242          */
4243         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4244                 goto out;
4245
4246         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4247                 goto out;
4248
4249         if (reason != TASK_SWITCH_IRET) {
4250                 int cpl;
4251
4252                 cpl = kvm_x86_ops->get_cpl(vcpu);
4253                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4254                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4255                         return 1;
4256                 }
4257         }
4258
4259         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4260                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4261                 return 1;
4262         }
4263
4264         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4265                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4266                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4267         }
4268
4269         if (reason == TASK_SWITCH_IRET) {
4270                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4271                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4272         }
4273
4274         /* set back link to prev task only if NT bit is set in eflags
4275            note that old_tss_sel is not used afetr this point */
4276         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4277                 old_tss_sel = 0xffff;
4278
4279         /* set back link to prev task only if NT bit is set in eflags
4280            note that old_tss_sel is not used afetr this point */
4281         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4282                 old_tss_sel = 0xffff;
4283
4284         if (nseg_desc.type & 8)
4285                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4286                                          old_tss_base, &nseg_desc);
4287         else
4288                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4289                                          old_tss_base, &nseg_desc);
4290
4291         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4292                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4293                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4294         }
4295
4296         if (reason != TASK_SWITCH_IRET) {
4297                 nseg_desc.type |= (1 << 1);
4298                 save_guest_segment_descriptor(vcpu, tss_selector,
4299                                               &nseg_desc);
4300         }
4301
4302         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4303         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4304         tr_seg.type = 11;
4305         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4306 out:
4307         return ret;
4308 }
4309 EXPORT_SYMBOL_GPL(kvm_task_switch);
4310
4311 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4312                                   struct kvm_sregs *sregs)
4313 {
4314         int mmu_reset_needed = 0;
4315         int pending_vec, max_bits;
4316         struct descriptor_table dt;
4317
4318         vcpu_load(vcpu);
4319
4320         dt.limit = sregs->idt.limit;
4321         dt.base = sregs->idt.base;
4322         kvm_x86_ops->set_idt(vcpu, &dt);
4323         dt.limit = sregs->gdt.limit;
4324         dt.base = sregs->gdt.base;
4325         kvm_x86_ops->set_gdt(vcpu, &dt);
4326
4327         vcpu->arch.cr2 = sregs->cr2;
4328         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4329         vcpu->arch.cr3 = sregs->cr3;
4330
4331         kvm_set_cr8(vcpu, sregs->cr8);
4332
4333         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4334         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4335         kvm_set_apic_base(vcpu, sregs->apic_base);
4336
4337         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4338
4339         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4340         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4341         vcpu->arch.cr0 = sregs->cr0;
4342
4343         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4344         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4345         if (!is_long_mode(vcpu) && is_pae(vcpu))
4346                 load_pdptrs(vcpu, vcpu->arch.cr3);
4347
4348         if (mmu_reset_needed)
4349                 kvm_mmu_reset_context(vcpu);
4350
4351         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4352         pending_vec = find_first_bit(
4353                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4354         if (pending_vec < max_bits) {
4355                 kvm_queue_interrupt(vcpu, pending_vec, false);
4356                 pr_debug("Set back pending irq %d\n", pending_vec);
4357                 if (irqchip_in_kernel(vcpu->kvm))
4358                         kvm_pic_clear_isr_ack(vcpu->kvm);
4359         }
4360
4361         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4362         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4363         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4364         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4365         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4366         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4367
4368         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4369         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4370
4371         /* Older userspace won't unhalt the vcpu on reset. */
4372         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4373             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4374             !(vcpu->arch.cr0 & X86_CR0_PE))
4375                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4376
4377         vcpu_put(vcpu);
4378
4379         return 0;
4380 }
4381
4382 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4383                                         struct kvm_guest_debug *dbg)
4384 {
4385         int i, r;
4386
4387         vcpu_load(vcpu);
4388
4389         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4390             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4391                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4392                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4393                 vcpu->arch.switch_db_regs =
4394                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4395         } else {
4396                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4397                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4398                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4399         }
4400
4401         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4402
4403         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4404                 kvm_queue_exception(vcpu, DB_VECTOR);
4405         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4406                 kvm_queue_exception(vcpu, BP_VECTOR);
4407
4408         vcpu_put(vcpu);
4409
4410         return r;
4411 }
4412
4413 /*
4414  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4415  * we have asm/x86/processor.h
4416  */
4417 struct fxsave {
4418         u16     cwd;
4419         u16     swd;
4420         u16     twd;
4421         u16     fop;
4422         u64     rip;
4423         u64     rdp;
4424         u32     mxcsr;
4425         u32     mxcsr_mask;
4426         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4427 #ifdef CONFIG_X86_64
4428         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4429 #else
4430         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4431 #endif
4432 };
4433
4434 /*
4435  * Translate a guest virtual address to a guest physical address.
4436  */
4437 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4438                                     struct kvm_translation *tr)
4439 {
4440         unsigned long vaddr = tr->linear_address;
4441         gpa_t gpa;
4442
4443         vcpu_load(vcpu);
4444         down_read(&vcpu->kvm->slots_lock);
4445         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4446         up_read(&vcpu->kvm->slots_lock);
4447         tr->physical_address = gpa;
4448         tr->valid = gpa != UNMAPPED_GVA;
4449         tr->writeable = 1;
4450         tr->usermode = 0;
4451         vcpu_put(vcpu);
4452
4453         return 0;
4454 }
4455
4456 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4457 {
4458         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4459
4460         vcpu_load(vcpu);
4461
4462         memcpy(fpu->fpr, fxsave->st_space, 128);
4463         fpu->fcw = fxsave->cwd;
4464         fpu->fsw = fxsave->swd;
4465         fpu->ftwx = fxsave->twd;
4466         fpu->last_opcode = fxsave->fop;
4467         fpu->last_ip = fxsave->rip;
4468         fpu->last_dp = fxsave->rdp;
4469         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4470
4471         vcpu_put(vcpu);
4472
4473         return 0;
4474 }
4475
4476 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4477 {
4478         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4479
4480         vcpu_load(vcpu);
4481
4482         memcpy(fxsave->st_space, fpu->fpr, 128);
4483         fxsave->cwd = fpu->fcw;
4484         fxsave->swd = fpu->fsw;
4485         fxsave->twd = fpu->ftwx;
4486         fxsave->fop = fpu->last_opcode;
4487         fxsave->rip = fpu->last_ip;
4488         fxsave->rdp = fpu->last_dp;
4489         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4490
4491         vcpu_put(vcpu);
4492
4493         return 0;
4494 }
4495
4496 void fx_init(struct kvm_vcpu *vcpu)
4497 {
4498         unsigned after_mxcsr_mask;
4499
4500         /*
4501          * Touch the fpu the first time in non atomic context as if
4502          * this is the first fpu instruction the exception handler
4503          * will fire before the instruction returns and it'll have to
4504          * allocate ram with GFP_KERNEL.
4505          */
4506         if (!used_math())
4507                 kvm_fx_save(&vcpu->arch.host_fx_image);
4508
4509         /* Initialize guest FPU by resetting ours and saving into guest's */
4510         preempt_disable();
4511         kvm_fx_save(&vcpu->arch.host_fx_image);
4512         kvm_fx_finit();
4513         kvm_fx_save(&vcpu->arch.guest_fx_image);
4514         kvm_fx_restore(&vcpu->arch.host_fx_image);
4515         preempt_enable();
4516
4517         vcpu->arch.cr0 |= X86_CR0_ET;
4518         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4519         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4520         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4521                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4522 }
4523 EXPORT_SYMBOL_GPL(fx_init);
4524
4525 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4526 {
4527         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4528                 return;
4529
4530         vcpu->guest_fpu_loaded = 1;
4531         kvm_fx_save(&vcpu->arch.host_fx_image);
4532         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4533 }
4534 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4535
4536 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4537 {
4538         if (!vcpu->guest_fpu_loaded)
4539                 return;
4540
4541         vcpu->guest_fpu_loaded = 0;
4542         kvm_fx_save(&vcpu->arch.guest_fx_image);
4543         kvm_fx_restore(&vcpu->arch.host_fx_image);
4544         ++vcpu->stat.fpu_reload;
4545 }
4546 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4547
4548 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4549 {
4550         if (vcpu->arch.time_page) {
4551                 kvm_release_page_dirty(vcpu->arch.time_page);
4552                 vcpu->arch.time_page = NULL;
4553         }
4554
4555         kvm_x86_ops->vcpu_free(vcpu);
4556 }
4557
4558 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4559                                                 unsigned int id)
4560 {
4561         return kvm_x86_ops->vcpu_create(kvm, id);
4562 }
4563
4564 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4565 {
4566         int r;
4567
4568         /* We do fxsave: this must be aligned. */
4569         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4570
4571         vcpu->arch.mtrr_state.have_fixed = 1;
4572         vcpu_load(vcpu);
4573         r = kvm_arch_vcpu_reset(vcpu);
4574         if (r == 0)
4575                 r = kvm_mmu_setup(vcpu);
4576         vcpu_put(vcpu);
4577         if (r < 0)
4578                 goto free_vcpu;
4579
4580         return 0;
4581 free_vcpu:
4582         kvm_x86_ops->vcpu_free(vcpu);
4583         return r;
4584 }
4585
4586 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4587 {
4588         vcpu_load(vcpu);
4589         kvm_mmu_unload(vcpu);
4590         vcpu_put(vcpu);
4591
4592         kvm_x86_ops->vcpu_free(vcpu);
4593 }
4594
4595 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4596 {
4597         vcpu->arch.nmi_pending = false;
4598         vcpu->arch.nmi_injected = false;
4599
4600         vcpu->arch.switch_db_regs = 0;
4601         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4602         vcpu->arch.dr6 = DR6_FIXED_1;
4603         vcpu->arch.dr7 = DR7_FIXED_1;
4604
4605         return kvm_x86_ops->vcpu_reset(vcpu);
4606 }
4607
4608 void kvm_arch_hardware_enable(void *garbage)
4609 {
4610         kvm_x86_ops->hardware_enable(garbage);
4611 }
4612
4613 void kvm_arch_hardware_disable(void *garbage)
4614 {
4615         kvm_x86_ops->hardware_disable(garbage);
4616 }
4617
4618 int kvm_arch_hardware_setup(void)
4619 {
4620         return kvm_x86_ops->hardware_setup();
4621 }
4622
4623 void kvm_arch_hardware_unsetup(void)
4624 {
4625         kvm_x86_ops->hardware_unsetup();
4626 }
4627
4628 void kvm_arch_check_processor_compat(void *rtn)
4629 {
4630         kvm_x86_ops->check_processor_compatibility(rtn);
4631 }
4632
4633 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4634 {
4635         struct page *page;
4636         struct kvm *kvm;
4637         int r;
4638
4639         BUG_ON(vcpu->kvm == NULL);
4640         kvm = vcpu->kvm;
4641
4642         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4643         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4644                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4645         else
4646                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4647
4648         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4649         if (!page) {
4650                 r = -ENOMEM;
4651                 goto fail;
4652         }
4653         vcpu->arch.pio_data = page_address(page);
4654
4655         r = kvm_mmu_create(vcpu);
4656         if (r < 0)
4657                 goto fail_free_pio_data;
4658
4659         if (irqchip_in_kernel(kvm)) {
4660                 r = kvm_create_lapic(vcpu);
4661                 if (r < 0)
4662                         goto fail_mmu_destroy;
4663         }
4664
4665         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4666                                        GFP_KERNEL);
4667         if (!vcpu->arch.mce_banks) {
4668                 r = -ENOMEM;
4669                 goto fail_mmu_destroy;
4670         }
4671         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4672
4673         return 0;
4674
4675 fail_mmu_destroy:
4676         kvm_mmu_destroy(vcpu);
4677 fail_free_pio_data:
4678         free_page((unsigned long)vcpu->arch.pio_data);
4679 fail:
4680         return r;
4681 }
4682
4683 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4684 {
4685         kvm_free_lapic(vcpu);
4686         down_read(&vcpu->kvm->slots_lock);
4687         kvm_mmu_destroy(vcpu);
4688         up_read(&vcpu->kvm->slots_lock);
4689         free_page((unsigned long)vcpu->arch.pio_data);
4690 }
4691
4692 struct  kvm *kvm_arch_create_vm(void)
4693 {
4694         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4695
4696         if (!kvm)
4697                 return ERR_PTR(-ENOMEM);
4698
4699         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4700         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4701
4702         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4703         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4704
4705         rdtscll(kvm->arch.vm_init_tsc);
4706
4707         return kvm;
4708 }
4709
4710 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4711 {
4712         vcpu_load(vcpu);
4713         kvm_mmu_unload(vcpu);
4714         vcpu_put(vcpu);
4715 }
4716
4717 static void kvm_free_vcpus(struct kvm *kvm)
4718 {
4719         unsigned int i;
4720         struct kvm_vcpu *vcpu;
4721
4722         /*
4723          * Unpin any mmu pages first.
4724          */
4725         kvm_for_each_vcpu(i, vcpu, kvm)
4726                 kvm_unload_vcpu_mmu(vcpu);
4727         kvm_for_each_vcpu(i, vcpu, kvm)
4728                 kvm_arch_vcpu_free(vcpu);
4729
4730         mutex_lock(&kvm->lock);
4731         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4732                 kvm->vcpus[i] = NULL;
4733
4734         atomic_set(&kvm->online_vcpus, 0);
4735         mutex_unlock(&kvm->lock);
4736 }
4737
4738 void kvm_arch_sync_events(struct kvm *kvm)
4739 {
4740         kvm_free_all_assigned_devices(kvm);
4741 }
4742
4743 void kvm_arch_destroy_vm(struct kvm *kvm)
4744 {
4745         kvm_iommu_unmap_guest(kvm);
4746         kvm_free_pit(kvm);
4747         kfree(kvm->arch.vpic);
4748         kfree(kvm->arch.vioapic);
4749         kvm_free_vcpus(kvm);
4750         kvm_free_physmem(kvm);
4751         if (kvm->arch.apic_access_page)
4752                 put_page(kvm->arch.apic_access_page);
4753         if (kvm->arch.ept_identity_pagetable)
4754                 put_page(kvm->arch.ept_identity_pagetable);
4755         kfree(kvm);
4756 }
4757
4758 int kvm_arch_set_memory_region(struct kvm *kvm,
4759                                 struct kvm_userspace_memory_region *mem,
4760                                 struct kvm_memory_slot old,
4761                                 int user_alloc)
4762 {
4763         int npages = mem->memory_size >> PAGE_SHIFT;
4764         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4765
4766         /*To keep backward compatibility with older userspace,
4767          *x86 needs to hanlde !user_alloc case.
4768          */
4769         if (!user_alloc) {
4770                 if (npages && !old.rmap) {
4771                         unsigned long userspace_addr;
4772
4773                         down_write(&current->mm->mmap_sem);
4774                         userspace_addr = do_mmap(NULL, 0,
4775                                                  npages * PAGE_SIZE,
4776                                                  PROT_READ | PROT_WRITE,
4777                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4778                                                  0);
4779                         up_write(&current->mm->mmap_sem);
4780
4781                         if (IS_ERR((void *)userspace_addr))
4782                                 return PTR_ERR((void *)userspace_addr);
4783
4784                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4785                         spin_lock(&kvm->mmu_lock);
4786                         memslot->userspace_addr = userspace_addr;
4787                         spin_unlock(&kvm->mmu_lock);
4788                 } else {
4789                         if (!old.user_alloc && old.rmap) {
4790                                 int ret;
4791
4792                                 down_write(&current->mm->mmap_sem);
4793                                 ret = do_munmap(current->mm, old.userspace_addr,
4794                                                 old.npages * PAGE_SIZE);
4795                                 up_write(&current->mm->mmap_sem);
4796                                 if (ret < 0)
4797                                         printk(KERN_WARNING
4798                                        "kvm_vm_ioctl_set_memory_region: "
4799                                        "failed to munmap memory\n");
4800                         }
4801                 }
4802         }
4803
4804         spin_lock(&kvm->mmu_lock);
4805         if (!kvm->arch.n_requested_mmu_pages) {
4806                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4807                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4808         }
4809
4810         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4811         spin_unlock(&kvm->mmu_lock);
4812         kvm_flush_remote_tlbs(kvm);
4813
4814         return 0;
4815 }
4816
4817 void kvm_arch_flush_shadow(struct kvm *kvm)
4818 {
4819         kvm_mmu_zap_all(kvm);
4820         kvm_reload_remote_mmus(kvm);
4821 }
4822
4823 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4824 {
4825         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4826                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4827                || vcpu->arch.nmi_pending;
4828 }
4829
4830 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4831 {
4832         int me;
4833         int cpu = vcpu->cpu;
4834
4835         if (waitqueue_active(&vcpu->wq)) {
4836                 wake_up_interruptible(&vcpu->wq);
4837                 ++vcpu->stat.halt_wakeup;
4838         }
4839
4840         me = get_cpu();
4841         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4842                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4843                         smp_send_reschedule(cpu);
4844         put_cpu();
4845 }
4846
4847 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4848 {
4849         return kvm_x86_ops->interrupt_allowed(vcpu);
4850 }
4851
4852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);