2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include "kvm_cache_regs.h"
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
36 #include <asm/cmpxchg.h>
41 * When setting this variable to true it enables Two-Dimensional-Paging
42 * where the hardware walks 2 page tables:
43 * 1. the guest-virtual to guest-physical
44 * 2. while doing 1. it walks guest-physical to host-physical
45 * If the hardware supports that we don't need to do shadow paging.
47 bool tdp_enabled = false;
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
61 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
62 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66 #define pgprintk(x...) do { } while (0)
67 #define rmap_printk(x...) do { } while (0)
71 #if defined(MMU_DEBUG) || defined(AUDIT)
73 module_param(dbg, bool, 0644);
76 static int oos_shadow = 1;
77 module_param(oos_shadow, bool, 0644);
80 #define ASSERT(x) do { } while (0)
84 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
85 __FILE__, __LINE__, #x); \
89 #define PT_FIRST_AVAIL_BITS_SHIFT 9
90 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94 #define PT64_LEVEL_BITS 9
96 #define PT64_LEVEL_SHIFT(level) \
97 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99 #define PT64_LEVEL_MASK(level) \
100 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102 #define PT64_INDEX(address, level)\
103 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
106 #define PT32_LEVEL_BITS 10
108 #define PT32_LEVEL_SHIFT(level) \
109 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111 #define PT32_LEVEL_MASK(level) \
112 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
113 #define PT32_LVL_OFFSET_MASK(level) \
114 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
115 * PT32_LEVEL_BITS))) - 1))
117 #define PT32_INDEX(address, level)\
118 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
121 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
122 #define PT64_DIR_BASE_ADDR_MASK \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
124 #define PT64_LVL_ADDR_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
127 #define PT64_LVL_OFFSET_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
131 #define PT32_BASE_ADDR_MASK PAGE_MASK
132 #define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134 #define PT32_LVL_ADDR_MASK(level) \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136 * PT32_LEVEL_BITS))) - 1))
138 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141 #define PFERR_PRESENT_MASK (1U << 0)
142 #define PFERR_WRITE_MASK (1U << 1)
143 #define PFERR_USER_MASK (1U << 2)
144 #define PFERR_RSVD_MASK (1U << 3)
145 #define PFERR_FETCH_MASK (1U << 4)
149 #define ACC_EXEC_MASK 1
150 #define ACC_WRITE_MASK PT_WRITABLE_MASK
151 #define ACC_USER_MASK PT_USER_MASK
152 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
154 #define CREATE_TRACE_POINTS
155 #include "mmutrace.h"
157 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
159 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
161 struct kvm_rmap_desc {
162 u64 *sptes[RMAP_EXT];
163 struct kvm_rmap_desc *more;
166 struct kvm_shadow_walk_iterator {
174 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)); \
177 shadow_walk_next(&(_walker)))
180 struct kvm_unsync_walk {
181 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
184 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
186 static struct kmem_cache *pte_chain_cache;
187 static struct kmem_cache *rmap_desc_cache;
188 static struct kmem_cache *mmu_page_header_cache;
190 static u64 __read_mostly shadow_trap_nonpresent_pte;
191 static u64 __read_mostly shadow_notrap_nonpresent_pte;
192 static u64 __read_mostly shadow_base_present_pte;
193 static u64 __read_mostly shadow_nx_mask;
194 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
195 static u64 __read_mostly shadow_user_mask;
196 static u64 __read_mostly shadow_accessed_mask;
197 static u64 __read_mostly shadow_dirty_mask;
199 static inline u64 rsvd_bits(int s, int e)
201 return ((1ULL << (e - s + 1)) - 1) << s;
204 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
206 shadow_trap_nonpresent_pte = trap_pte;
207 shadow_notrap_nonpresent_pte = notrap_pte;
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
211 void kvm_mmu_set_base_ptes(u64 base_pte)
213 shadow_base_present_pte = base_pte;
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
217 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
218 u64 dirty_mask, u64 nx_mask, u64 x_mask)
220 shadow_user_mask = user_mask;
221 shadow_accessed_mask = accessed_mask;
222 shadow_dirty_mask = dirty_mask;
223 shadow_nx_mask = nx_mask;
224 shadow_x_mask = x_mask;
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
228 static int is_write_protection(struct kvm_vcpu *vcpu)
230 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
233 static int is_cpuid_PSE36(void)
238 static int is_nx(struct kvm_vcpu *vcpu)
240 return vcpu->arch.efer & EFER_NX;
243 static int is_shadow_present_pte(u64 pte)
245 return pte != shadow_trap_nonpresent_pte
246 && pte != shadow_notrap_nonpresent_pte;
249 static int is_large_pte(u64 pte)
251 return pte & PT_PAGE_SIZE_MASK;
254 static int is_writable_pte(unsigned long pte)
256 return pte & PT_WRITABLE_MASK;
259 static int is_dirty_gpte(unsigned long pte)
261 return pte & PT_DIRTY_MASK;
264 static int is_rmap_spte(u64 pte)
266 return is_shadow_present_pte(pte);
269 static int is_last_spte(u64 pte, int level)
271 if (level == PT_PAGE_TABLE_LEVEL)
273 if (is_large_pte(pte))
278 static pfn_t spte_to_pfn(u64 pte)
280 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
283 static gfn_t pse36_gfn_delta(u32 gpte)
285 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
287 return (gpte & PT32_DIR_PSE36_MASK) << shift;
290 static void __set_spte(u64 *sptep, u64 spte)
293 set_64bit((unsigned long *)sptep, spte);
295 set_64bit((unsigned long long *)sptep, spte);
299 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
300 struct kmem_cache *base_cache, int min)
304 if (cache->nobjs >= min)
306 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
307 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
310 cache->objects[cache->nobjs++] = obj;
315 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
318 kfree(mc->objects[--mc->nobjs]);
321 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
326 if (cache->nobjs >= min)
328 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
329 page = alloc_page(GFP_KERNEL);
332 set_page_private(page, 0);
333 cache->objects[cache->nobjs++] = page_address(page);
338 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
341 free_page((unsigned long)mc->objects[--mc->nobjs]);
344 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
356 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
359 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
360 mmu_page_header_cache, 4);
365 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
367 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
368 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
369 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
373 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
379 p = mc->objects[--mc->nobjs];
383 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
385 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
386 sizeof(struct kvm_pte_chain));
389 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
394 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
396 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
397 sizeof(struct kvm_rmap_desc));
400 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
406 * Return the pointer to the largepage write count for a given
407 * gfn, handling slots that are not large page aligned.
409 static int *slot_largepage_idx(gfn_t gfn,
410 struct kvm_memory_slot *slot,
415 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
416 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
417 return &slot->lpage_info[level - 2][idx].write_count;
420 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
422 struct kvm_memory_slot *slot;
426 gfn = unalias_gfn(kvm, gfn);
428 slot = gfn_to_memslot_unaliased(kvm, gfn);
429 for (i = PT_DIRECTORY_LEVEL;
430 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
431 write_count = slot_largepage_idx(gfn, slot, i);
436 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
438 struct kvm_memory_slot *slot;
442 gfn = unalias_gfn(kvm, gfn);
443 for (i = PT_DIRECTORY_LEVEL;
444 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
445 slot = gfn_to_memslot_unaliased(kvm, gfn);
446 write_count = slot_largepage_idx(gfn, slot, i);
448 WARN_ON(*write_count < 0);
452 static int has_wrprotected_page(struct kvm *kvm,
456 struct kvm_memory_slot *slot;
459 gfn = unalias_gfn(kvm, gfn);
460 slot = gfn_to_memslot_unaliased(kvm, gfn);
462 largepage_idx = slot_largepage_idx(gfn, slot, level);
463 return *largepage_idx;
469 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
471 unsigned long page_size;
474 page_size = kvm_host_page_size(kvm, gfn);
476 for (i = PT_PAGE_TABLE_LEVEL;
477 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
478 if (page_size >= KVM_HPAGE_SIZE(i))
487 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
489 struct kvm_memory_slot *slot;
490 int host_level, level, max_level;
492 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
493 if (slot && slot->dirty_bitmap)
494 return PT_PAGE_TABLE_LEVEL;
496 host_level = host_mapping_level(vcpu->kvm, large_gfn);
498 if (host_level == PT_PAGE_TABLE_LEVEL)
501 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
502 kvm_x86_ops->get_lpage_level() : host_level;
504 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
505 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
512 * Take gfn and return the reverse mapping to it.
513 * Note: gfn must be unaliased before this function get called
516 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
518 struct kvm_memory_slot *slot;
521 slot = gfn_to_memslot(kvm, gfn);
522 if (likely(level == PT_PAGE_TABLE_LEVEL))
523 return &slot->rmap[gfn - slot->base_gfn];
525 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
526 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
528 return &slot->lpage_info[level - 2][idx].rmap_pde;
532 * Reverse mapping data structures:
534 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
535 * that points to page_address(page).
537 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
538 * containing more mappings.
540 * Returns the number of rmap entries before the spte was added or zero if
541 * the spte was not added.
544 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
546 struct kvm_mmu_page *sp;
547 struct kvm_rmap_desc *desc;
548 unsigned long *rmapp;
551 if (!is_rmap_spte(*spte))
553 gfn = unalias_gfn(vcpu->kvm, gfn);
554 sp = page_header(__pa(spte));
555 sp->gfns[spte - sp->spt] = gfn;
556 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
558 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
559 *rmapp = (unsigned long)spte;
560 } else if (!(*rmapp & 1)) {
561 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
562 desc = mmu_alloc_rmap_desc(vcpu);
563 desc->sptes[0] = (u64 *)*rmapp;
564 desc->sptes[1] = spte;
565 *rmapp = (unsigned long)desc | 1;
567 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
568 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
569 while (desc->sptes[RMAP_EXT-1] && desc->more) {
573 if (desc->sptes[RMAP_EXT-1]) {
574 desc->more = mmu_alloc_rmap_desc(vcpu);
577 for (i = 0; desc->sptes[i]; ++i)
579 desc->sptes[i] = spte;
584 static void rmap_desc_remove_entry(unsigned long *rmapp,
585 struct kvm_rmap_desc *desc,
587 struct kvm_rmap_desc *prev_desc)
591 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
593 desc->sptes[i] = desc->sptes[j];
594 desc->sptes[j] = NULL;
597 if (!prev_desc && !desc->more)
598 *rmapp = (unsigned long)desc->sptes[0];
601 prev_desc->more = desc->more;
603 *rmapp = (unsigned long)desc->more | 1;
604 mmu_free_rmap_desc(desc);
607 static void rmap_remove(struct kvm *kvm, u64 *spte)
609 struct kvm_rmap_desc *desc;
610 struct kvm_rmap_desc *prev_desc;
611 struct kvm_mmu_page *sp;
613 unsigned long *rmapp;
616 if (!is_rmap_spte(*spte))
618 sp = page_header(__pa(spte));
619 pfn = spte_to_pfn(*spte);
620 if (*spte & shadow_accessed_mask)
621 kvm_set_pfn_accessed(pfn);
622 if (is_writable_pte(*spte))
623 kvm_set_pfn_dirty(pfn);
624 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
626 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
628 } else if (!(*rmapp & 1)) {
629 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
630 if ((u64 *)*rmapp != spte) {
631 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
637 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
638 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
641 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
642 if (desc->sptes[i] == spte) {
643 rmap_desc_remove_entry(rmapp,
651 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
656 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
658 struct kvm_rmap_desc *desc;
659 struct kvm_rmap_desc *prev_desc;
665 else if (!(*rmapp & 1)) {
667 return (u64 *)*rmapp;
670 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
674 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
675 if (prev_spte == spte)
676 return desc->sptes[i];
677 prev_spte = desc->sptes[i];
684 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
686 unsigned long *rmapp;
688 int i, write_protected = 0;
690 gfn = unalias_gfn(kvm, gfn);
691 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
693 spte = rmap_next(kvm, rmapp, NULL);
696 BUG_ON(!(*spte & PT_PRESENT_MASK));
697 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
698 if (is_writable_pte(*spte)) {
699 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
702 spte = rmap_next(kvm, rmapp, spte);
704 if (write_protected) {
707 spte = rmap_next(kvm, rmapp, NULL);
708 pfn = spte_to_pfn(*spte);
709 kvm_set_pfn_dirty(pfn);
712 /* check for huge page mappings */
713 for (i = PT_DIRECTORY_LEVEL;
714 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
715 rmapp = gfn_to_rmap(kvm, gfn, i);
716 spte = rmap_next(kvm, rmapp, NULL);
719 BUG_ON(!(*spte & PT_PRESENT_MASK));
720 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
721 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
722 if (is_writable_pte(*spte)) {
723 rmap_remove(kvm, spte);
725 __set_spte(spte, shadow_trap_nonpresent_pte);
729 spte = rmap_next(kvm, rmapp, spte);
733 return write_protected;
736 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
740 int need_tlb_flush = 0;
742 while ((spte = rmap_next(kvm, rmapp, NULL))) {
743 BUG_ON(!(*spte & PT_PRESENT_MASK));
744 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
745 rmap_remove(kvm, spte);
746 __set_spte(spte, shadow_trap_nonpresent_pte);
749 return need_tlb_flush;
752 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
757 pte_t *ptep = (pte_t *)data;
760 WARN_ON(pte_huge(*ptep));
761 new_pfn = pte_pfn(*ptep);
762 spte = rmap_next(kvm, rmapp, NULL);
764 BUG_ON(!is_shadow_present_pte(*spte));
765 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
767 if (pte_write(*ptep)) {
768 rmap_remove(kvm, spte);
769 __set_spte(spte, shadow_trap_nonpresent_pte);
770 spte = rmap_next(kvm, rmapp, NULL);
772 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
773 new_spte |= (u64)new_pfn << PAGE_SHIFT;
775 new_spte &= ~PT_WRITABLE_MASK;
776 new_spte &= ~SPTE_HOST_WRITEABLE;
777 if (is_writable_pte(*spte))
778 kvm_set_pfn_dirty(spte_to_pfn(*spte));
779 __set_spte(spte, new_spte);
780 spte = rmap_next(kvm, rmapp, spte);
784 kvm_flush_remote_tlbs(kvm);
789 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
791 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
796 struct kvm_memslots *slots;
798 slots = rcu_dereference(kvm->memslots);
800 for (i = 0; i < slots->nmemslots; i++) {
801 struct kvm_memory_slot *memslot = &slots->memslots[i];
802 unsigned long start = memslot->userspace_addr;
805 end = start + (memslot->npages << PAGE_SHIFT);
806 if (hva >= start && hva < end) {
807 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
809 retval |= handler(kvm, &memslot->rmap[gfn_offset],
812 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
813 int idx = gfn_offset;
814 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
815 retval |= handler(kvm,
816 &memslot->lpage_info[j][idx].rmap_pde,
825 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
827 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
830 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
832 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
835 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
841 /* always return old for EPT */
842 if (!shadow_accessed_mask)
845 spte = rmap_next(kvm, rmapp, NULL);
849 BUG_ON(!(_spte & PT_PRESENT_MASK));
850 _young = _spte & PT_ACCESSED_MASK;
853 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
855 spte = rmap_next(kvm, rmapp, spte);
860 #define RMAP_RECYCLE_THRESHOLD 1000
862 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
864 unsigned long *rmapp;
865 struct kvm_mmu_page *sp;
867 sp = page_header(__pa(spte));
869 gfn = unalias_gfn(vcpu->kvm, gfn);
870 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
872 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
873 kvm_flush_remote_tlbs(vcpu->kvm);
876 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
878 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
882 static int is_empty_shadow_page(u64 *spt)
887 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
888 if (is_shadow_present_pte(*pos)) {
889 printk(KERN_ERR "%s: %p %llx\n", __func__,
897 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
899 ASSERT(is_empty_shadow_page(sp->spt));
901 __free_page(virt_to_page(sp->spt));
902 __free_page(virt_to_page(sp->gfns));
904 ++kvm->arch.n_free_mmu_pages;
907 static unsigned kvm_page_table_hashfn(gfn_t gfn)
909 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
912 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
915 struct kvm_mmu_page *sp;
917 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
918 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
919 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
920 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
921 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
922 INIT_LIST_HEAD(&sp->oos_link);
923 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
925 sp->parent_pte = parent_pte;
926 --vcpu->kvm->arch.n_free_mmu_pages;
930 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
931 struct kvm_mmu_page *sp, u64 *parent_pte)
933 struct kvm_pte_chain *pte_chain;
934 struct hlist_node *node;
939 if (!sp->multimapped) {
940 u64 *old = sp->parent_pte;
943 sp->parent_pte = parent_pte;
947 pte_chain = mmu_alloc_pte_chain(vcpu);
948 INIT_HLIST_HEAD(&sp->parent_ptes);
949 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
950 pte_chain->parent_ptes[0] = old;
952 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
953 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
955 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
956 if (!pte_chain->parent_ptes[i]) {
957 pte_chain->parent_ptes[i] = parent_pte;
961 pte_chain = mmu_alloc_pte_chain(vcpu);
963 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
964 pte_chain->parent_ptes[0] = parent_pte;
967 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
970 struct kvm_pte_chain *pte_chain;
971 struct hlist_node *node;
974 if (!sp->multimapped) {
975 BUG_ON(sp->parent_pte != parent_pte);
976 sp->parent_pte = NULL;
979 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
980 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
981 if (!pte_chain->parent_ptes[i])
983 if (pte_chain->parent_ptes[i] != parent_pte)
985 while (i + 1 < NR_PTE_CHAIN_ENTRIES
986 && pte_chain->parent_ptes[i + 1]) {
987 pte_chain->parent_ptes[i]
988 = pte_chain->parent_ptes[i + 1];
991 pte_chain->parent_ptes[i] = NULL;
993 hlist_del(&pte_chain->link);
994 mmu_free_pte_chain(pte_chain);
995 if (hlist_empty(&sp->parent_ptes)) {
997 sp->parent_pte = NULL;
1006 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1007 mmu_parent_walk_fn fn)
1009 struct kvm_pte_chain *pte_chain;
1010 struct hlist_node *node;
1011 struct kvm_mmu_page *parent_sp;
1014 if (!sp->multimapped && sp->parent_pte) {
1015 parent_sp = page_header(__pa(sp->parent_pte));
1016 fn(vcpu, parent_sp);
1017 mmu_parent_walk(vcpu, parent_sp, fn);
1020 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1021 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1022 if (!pte_chain->parent_ptes[i])
1024 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1025 fn(vcpu, parent_sp);
1026 mmu_parent_walk(vcpu, parent_sp, fn);
1030 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1033 struct kvm_mmu_page *sp = page_header(__pa(spte));
1035 index = spte - sp->spt;
1036 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1037 sp->unsync_children++;
1038 WARN_ON(!sp->unsync_children);
1041 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1043 struct kvm_pte_chain *pte_chain;
1044 struct hlist_node *node;
1047 if (!sp->parent_pte)
1050 if (!sp->multimapped) {
1051 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1055 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1056 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1057 if (!pte_chain->parent_ptes[i])
1059 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1063 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1065 kvm_mmu_update_parents_unsync(sp);
1069 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1070 struct kvm_mmu_page *sp)
1072 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1073 kvm_mmu_update_parents_unsync(sp);
1076 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1077 struct kvm_mmu_page *sp)
1081 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1082 sp->spt[i] = shadow_trap_nonpresent_pte;
1085 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1086 struct kvm_mmu_page *sp)
1091 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1095 #define KVM_PAGE_ARRAY_NR 16
1097 struct kvm_mmu_pages {
1098 struct mmu_page_and_offset {
1099 struct kvm_mmu_page *sp;
1101 } page[KVM_PAGE_ARRAY_NR];
1105 #define for_each_unsync_children(bitmap, idx) \
1106 for (idx = find_first_bit(bitmap, 512); \
1108 idx = find_next_bit(bitmap, 512, idx+1))
1110 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1116 for (i=0; i < pvec->nr; i++)
1117 if (pvec->page[i].sp == sp)
1120 pvec->page[pvec->nr].sp = sp;
1121 pvec->page[pvec->nr].idx = idx;
1123 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1126 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1127 struct kvm_mmu_pages *pvec)
1129 int i, ret, nr_unsync_leaf = 0;
1131 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1132 u64 ent = sp->spt[i];
1134 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1135 struct kvm_mmu_page *child;
1136 child = page_header(ent & PT64_BASE_ADDR_MASK);
1138 if (child->unsync_children) {
1139 if (mmu_pages_add(pvec, child, i))
1142 ret = __mmu_unsync_walk(child, pvec);
1144 __clear_bit(i, sp->unsync_child_bitmap);
1146 nr_unsync_leaf += ret;
1151 if (child->unsync) {
1153 if (mmu_pages_add(pvec, child, i))
1159 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1160 sp->unsync_children = 0;
1162 return nr_unsync_leaf;
1165 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1166 struct kvm_mmu_pages *pvec)
1168 if (!sp->unsync_children)
1171 mmu_pages_add(pvec, sp, 0);
1172 return __mmu_unsync_walk(sp, pvec);
1175 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1178 struct hlist_head *bucket;
1179 struct kvm_mmu_page *sp;
1180 struct hlist_node *node;
1182 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1183 index = kvm_page_table_hashfn(gfn);
1184 bucket = &kvm->arch.mmu_page_hash[index];
1185 hlist_for_each_entry(sp, node, bucket, hash_link)
1186 if (sp->gfn == gfn && !sp->role.direct
1187 && !sp->role.invalid) {
1188 pgprintk("%s: found role %x\n",
1189 __func__, sp->role.word);
1195 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1197 WARN_ON(!sp->unsync);
1199 --kvm->stat.mmu_unsync;
1202 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1204 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1206 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1207 kvm_mmu_zap_page(vcpu->kvm, sp);
1211 trace_kvm_mmu_sync_page(sp);
1212 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1213 kvm_flush_remote_tlbs(vcpu->kvm);
1214 kvm_unlink_unsync_page(vcpu->kvm, sp);
1215 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1216 kvm_mmu_zap_page(vcpu->kvm, sp);
1220 kvm_mmu_flush_tlb(vcpu);
1224 struct mmu_page_path {
1225 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1226 unsigned int idx[PT64_ROOT_LEVEL-1];
1229 #define for_each_sp(pvec, sp, parents, i) \
1230 for (i = mmu_pages_next(&pvec, &parents, -1), \
1231 sp = pvec.page[i].sp; \
1232 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1233 i = mmu_pages_next(&pvec, &parents, i))
1235 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1236 struct mmu_page_path *parents,
1241 for (n = i+1; n < pvec->nr; n++) {
1242 struct kvm_mmu_page *sp = pvec->page[n].sp;
1244 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1245 parents->idx[0] = pvec->page[n].idx;
1249 parents->parent[sp->role.level-2] = sp;
1250 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1256 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1258 struct kvm_mmu_page *sp;
1259 unsigned int level = 0;
1262 unsigned int idx = parents->idx[level];
1264 sp = parents->parent[level];
1268 --sp->unsync_children;
1269 WARN_ON((int)sp->unsync_children < 0);
1270 __clear_bit(idx, sp->unsync_child_bitmap);
1272 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1275 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1276 struct mmu_page_path *parents,
1277 struct kvm_mmu_pages *pvec)
1279 parents->parent[parent->role.level-1] = NULL;
1283 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1284 struct kvm_mmu_page *parent)
1287 struct kvm_mmu_page *sp;
1288 struct mmu_page_path parents;
1289 struct kvm_mmu_pages pages;
1291 kvm_mmu_pages_init(parent, &parents, &pages);
1292 while (mmu_unsync_walk(parent, &pages)) {
1295 for_each_sp(pages, sp, parents, i)
1296 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1299 kvm_flush_remote_tlbs(vcpu->kvm);
1301 for_each_sp(pages, sp, parents, i) {
1302 kvm_sync_page(vcpu, sp);
1303 mmu_pages_clear_parents(&parents);
1305 cond_resched_lock(&vcpu->kvm->mmu_lock);
1306 kvm_mmu_pages_init(parent, &parents, &pages);
1310 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1318 union kvm_mmu_page_role role;
1321 struct hlist_head *bucket;
1322 struct kvm_mmu_page *sp;
1323 struct hlist_node *node, *tmp;
1325 role = vcpu->arch.mmu.base_role;
1327 role.direct = direct;
1328 role.access = access;
1329 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1330 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1331 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1332 role.quadrant = quadrant;
1334 index = kvm_page_table_hashfn(gfn);
1335 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1336 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1337 if (sp->gfn == gfn) {
1339 if (kvm_sync_page(vcpu, sp))
1342 if (sp->role.word != role.word)
1345 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1346 if (sp->unsync_children) {
1347 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1348 kvm_mmu_mark_parents_unsync(vcpu, sp);
1350 trace_kvm_mmu_get_page(sp, false);
1353 ++vcpu->kvm->stat.mmu_cache_miss;
1354 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1359 hlist_add_head(&sp->hash_link, bucket);
1361 if (rmap_write_protect(vcpu->kvm, gfn))
1362 kvm_flush_remote_tlbs(vcpu->kvm);
1363 account_shadowed(vcpu->kvm, gfn);
1365 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1366 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1368 nonpaging_prefetch_page(vcpu, sp);
1369 trace_kvm_mmu_get_page(sp, true);
1373 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1374 struct kvm_vcpu *vcpu, u64 addr)
1376 iterator->addr = addr;
1377 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1378 iterator->level = vcpu->arch.mmu.shadow_root_level;
1379 if (iterator->level == PT32E_ROOT_LEVEL) {
1380 iterator->shadow_addr
1381 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1382 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1384 if (!iterator->shadow_addr)
1385 iterator->level = 0;
1389 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1391 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1394 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1395 if (is_large_pte(*iterator->sptep))
1398 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1399 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1403 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1405 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1409 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1410 struct kvm_mmu_page *sp)
1418 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1421 if (is_shadow_present_pte(ent)) {
1422 if (!is_last_spte(ent, sp->role.level)) {
1423 ent &= PT64_BASE_ADDR_MASK;
1424 mmu_page_remove_parent_pte(page_header(ent),
1427 if (is_large_pte(ent))
1429 rmap_remove(kvm, &pt[i]);
1432 pt[i] = shadow_trap_nonpresent_pte;
1436 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1438 mmu_page_remove_parent_pte(sp, parent_pte);
1441 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1444 struct kvm_vcpu *vcpu;
1446 kvm_for_each_vcpu(i, vcpu, kvm)
1447 vcpu->arch.last_pte_updated = NULL;
1450 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1454 while (sp->multimapped || sp->parent_pte) {
1455 if (!sp->multimapped)
1456 parent_pte = sp->parent_pte;
1458 struct kvm_pte_chain *chain;
1460 chain = container_of(sp->parent_ptes.first,
1461 struct kvm_pte_chain, link);
1462 parent_pte = chain->parent_ptes[0];
1464 BUG_ON(!parent_pte);
1465 kvm_mmu_put_page(sp, parent_pte);
1466 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1470 static int mmu_zap_unsync_children(struct kvm *kvm,
1471 struct kvm_mmu_page *parent)
1474 struct mmu_page_path parents;
1475 struct kvm_mmu_pages pages;
1477 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1480 kvm_mmu_pages_init(parent, &parents, &pages);
1481 while (mmu_unsync_walk(parent, &pages)) {
1482 struct kvm_mmu_page *sp;
1484 for_each_sp(pages, sp, parents, i) {
1485 kvm_mmu_zap_page(kvm, sp);
1486 mmu_pages_clear_parents(&parents);
1489 kvm_mmu_pages_init(parent, &parents, &pages);
1495 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1499 trace_kvm_mmu_zap_page(sp);
1500 ++kvm->stat.mmu_shadow_zapped;
1501 ret = mmu_zap_unsync_children(kvm, sp);
1502 kvm_mmu_page_unlink_children(kvm, sp);
1503 kvm_mmu_unlink_parents(kvm, sp);
1504 kvm_flush_remote_tlbs(kvm);
1505 if (!sp->role.invalid && !sp->role.direct)
1506 unaccount_shadowed(kvm, sp->gfn);
1508 kvm_unlink_unsync_page(kvm, sp);
1509 if (!sp->root_count) {
1510 hlist_del(&sp->hash_link);
1511 kvm_mmu_free_page(kvm, sp);
1513 sp->role.invalid = 1;
1514 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1515 kvm_reload_remote_mmus(kvm);
1517 kvm_mmu_reset_last_pte_updated(kvm);
1522 * Changing the number of mmu pages allocated to the vm
1523 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1525 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1529 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1530 used_pages = max(0, used_pages);
1533 * If we set the number of mmu pages to be smaller be than the
1534 * number of actived pages , we must to free some mmu pages before we
1538 if (used_pages > kvm_nr_mmu_pages) {
1539 while (used_pages > kvm_nr_mmu_pages) {
1540 struct kvm_mmu_page *page;
1542 page = container_of(kvm->arch.active_mmu_pages.prev,
1543 struct kvm_mmu_page, link);
1544 kvm_mmu_zap_page(kvm, page);
1547 kvm->arch.n_free_mmu_pages = 0;
1550 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1551 - kvm->arch.n_alloc_mmu_pages;
1553 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1556 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1559 struct hlist_head *bucket;
1560 struct kvm_mmu_page *sp;
1561 struct hlist_node *node, *n;
1564 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1566 index = kvm_page_table_hashfn(gfn);
1567 bucket = &kvm->arch.mmu_page_hash[index];
1568 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1569 if (sp->gfn == gfn && !sp->role.direct) {
1570 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1573 if (kvm_mmu_zap_page(kvm, sp))
1579 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1582 struct hlist_head *bucket;
1583 struct kvm_mmu_page *sp;
1584 struct hlist_node *node, *nn;
1586 index = kvm_page_table_hashfn(gfn);
1587 bucket = &kvm->arch.mmu_page_hash[index];
1588 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1589 if (sp->gfn == gfn && !sp->role.direct
1590 && !sp->role.invalid) {
1591 pgprintk("%s: zap %lx %x\n",
1592 __func__, gfn, sp->role.word);
1593 kvm_mmu_zap_page(kvm, sp);
1598 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1600 int slot = memslot_id(kvm, gfn);
1601 struct kvm_mmu_page *sp = page_header(__pa(pte));
1603 __set_bit(slot, sp->slot_bitmap);
1606 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1611 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1614 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1615 if (pt[i] == shadow_notrap_nonpresent_pte)
1616 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1620 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1624 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1626 if (gpa == UNMAPPED_GVA)
1629 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1635 * The function is based on mtrr_type_lookup() in
1636 * arch/x86/kernel/cpu/mtrr/generic.c
1638 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1643 u8 prev_match, curr_match;
1644 int num_var_ranges = KVM_NR_VAR_MTRR;
1646 if (!mtrr_state->enabled)
1649 /* Make end inclusive end, instead of exclusive */
1652 /* Look in fixed ranges. Just return the type as per start */
1653 if (mtrr_state->have_fixed && (start < 0x100000)) {
1656 if (start < 0x80000) {
1658 idx += (start >> 16);
1659 return mtrr_state->fixed_ranges[idx];
1660 } else if (start < 0xC0000) {
1662 idx += ((start - 0x80000) >> 14);
1663 return mtrr_state->fixed_ranges[idx];
1664 } else if (start < 0x1000000) {
1666 idx += ((start - 0xC0000) >> 12);
1667 return mtrr_state->fixed_ranges[idx];
1672 * Look in variable ranges
1673 * Look of multiple ranges matching this address and pick type
1674 * as per MTRR precedence
1676 if (!(mtrr_state->enabled & 2))
1677 return mtrr_state->def_type;
1680 for (i = 0; i < num_var_ranges; ++i) {
1681 unsigned short start_state, end_state;
1683 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1686 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1687 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1688 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1689 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1691 start_state = ((start & mask) == (base & mask));
1692 end_state = ((end & mask) == (base & mask));
1693 if (start_state != end_state)
1696 if ((start & mask) != (base & mask))
1699 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1700 if (prev_match == 0xFF) {
1701 prev_match = curr_match;
1705 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1706 curr_match == MTRR_TYPE_UNCACHABLE)
1707 return MTRR_TYPE_UNCACHABLE;
1709 if ((prev_match == MTRR_TYPE_WRBACK &&
1710 curr_match == MTRR_TYPE_WRTHROUGH) ||
1711 (prev_match == MTRR_TYPE_WRTHROUGH &&
1712 curr_match == MTRR_TYPE_WRBACK)) {
1713 prev_match = MTRR_TYPE_WRTHROUGH;
1714 curr_match = MTRR_TYPE_WRTHROUGH;
1717 if (prev_match != curr_match)
1718 return MTRR_TYPE_UNCACHABLE;
1721 if (prev_match != 0xFF)
1724 return mtrr_state->def_type;
1727 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1731 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1732 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1733 if (mtrr == 0xfe || mtrr == 0xff)
1734 mtrr = MTRR_TYPE_WRBACK;
1737 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1739 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1742 struct hlist_head *bucket;
1743 struct kvm_mmu_page *s;
1744 struct hlist_node *node, *n;
1746 trace_kvm_mmu_unsync_page(sp);
1747 index = kvm_page_table_hashfn(sp->gfn);
1748 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1749 /* don't unsync if pagetable is shadowed with multiple roles */
1750 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1751 if (s->gfn != sp->gfn || s->role.direct)
1753 if (s->role.word != sp->role.word)
1756 ++vcpu->kvm->stat.mmu_unsync;
1759 kvm_mmu_mark_parents_unsync(vcpu, sp);
1761 mmu_convert_notrap(sp);
1765 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1768 struct kvm_mmu_page *shadow;
1770 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1772 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1776 if (can_unsync && oos_shadow)
1777 return kvm_unsync_page(vcpu, shadow);
1783 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1784 unsigned pte_access, int user_fault,
1785 int write_fault, int dirty, int level,
1786 gfn_t gfn, pfn_t pfn, bool speculative,
1787 bool can_unsync, bool reset_host_protection)
1793 * We don't set the accessed bit, since we sometimes want to see
1794 * whether the guest actually used the pte (in order to detect
1797 spte = shadow_base_present_pte | shadow_dirty_mask;
1799 spte |= shadow_accessed_mask;
1801 pte_access &= ~ACC_WRITE_MASK;
1802 if (pte_access & ACC_EXEC_MASK)
1803 spte |= shadow_x_mask;
1805 spte |= shadow_nx_mask;
1806 if (pte_access & ACC_USER_MASK)
1807 spte |= shadow_user_mask;
1808 if (level > PT_PAGE_TABLE_LEVEL)
1809 spte |= PT_PAGE_SIZE_MASK;
1811 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1812 kvm_is_mmio_pfn(pfn));
1814 if (reset_host_protection)
1815 spte |= SPTE_HOST_WRITEABLE;
1817 spte |= (u64)pfn << PAGE_SHIFT;
1819 if ((pte_access & ACC_WRITE_MASK)
1820 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1822 if (level > PT_PAGE_TABLE_LEVEL &&
1823 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1825 spte = shadow_trap_nonpresent_pte;
1829 spte |= PT_WRITABLE_MASK;
1832 * Optimization: for pte sync, if spte was writable the hash
1833 * lookup is unnecessary (and expensive). Write protection
1834 * is responsibility of mmu_get_page / kvm_sync_page.
1835 * Same reasoning can be applied to dirty page accounting.
1837 if (!can_unsync && is_writable_pte(*sptep))
1840 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1841 pgprintk("%s: found shadow page for %lx, marking ro\n",
1844 pte_access &= ~ACC_WRITE_MASK;
1845 if (is_writable_pte(spte))
1846 spte &= ~PT_WRITABLE_MASK;
1850 if (pte_access & ACC_WRITE_MASK)
1851 mark_page_dirty(vcpu->kvm, gfn);
1854 __set_spte(sptep, spte);
1858 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1859 unsigned pt_access, unsigned pte_access,
1860 int user_fault, int write_fault, int dirty,
1861 int *ptwrite, int level, gfn_t gfn,
1862 pfn_t pfn, bool speculative,
1863 bool reset_host_protection)
1865 int was_rmapped = 0;
1866 int was_writable = is_writable_pte(*sptep);
1869 pgprintk("%s: spte %llx access %x write_fault %d"
1870 " user_fault %d gfn %lx\n",
1871 __func__, *sptep, pt_access,
1872 write_fault, user_fault, gfn);
1874 if (is_rmap_spte(*sptep)) {
1876 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1877 * the parent of the now unreachable PTE.
1879 if (level > PT_PAGE_TABLE_LEVEL &&
1880 !is_large_pte(*sptep)) {
1881 struct kvm_mmu_page *child;
1884 child = page_header(pte & PT64_BASE_ADDR_MASK);
1885 mmu_page_remove_parent_pte(child, sptep);
1886 } else if (pfn != spte_to_pfn(*sptep)) {
1887 pgprintk("hfn old %lx new %lx\n",
1888 spte_to_pfn(*sptep), pfn);
1889 rmap_remove(vcpu->kvm, sptep);
1894 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1895 dirty, level, gfn, pfn, speculative, true,
1896 reset_host_protection)) {
1899 kvm_x86_ops->tlb_flush(vcpu);
1902 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1903 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1904 is_large_pte(*sptep)? "2MB" : "4kB",
1905 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1907 if (!was_rmapped && is_large_pte(*sptep))
1908 ++vcpu->kvm->stat.lpages;
1910 page_header_update_slot(vcpu->kvm, sptep, gfn);
1912 rmap_count = rmap_add(vcpu, sptep, gfn);
1913 kvm_release_pfn_clean(pfn);
1914 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1915 rmap_recycle(vcpu, sptep, gfn);
1918 kvm_release_pfn_dirty(pfn);
1920 kvm_release_pfn_clean(pfn);
1923 vcpu->arch.last_pte_updated = sptep;
1924 vcpu->arch.last_pte_gfn = gfn;
1928 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1932 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1933 int level, gfn_t gfn, pfn_t pfn)
1935 struct kvm_shadow_walk_iterator iterator;
1936 struct kvm_mmu_page *sp;
1940 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1941 if (iterator.level == level) {
1942 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1943 0, write, 1, &pt_write,
1944 level, gfn, pfn, false, true);
1945 ++vcpu->stat.pf_fixed;
1949 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1950 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1951 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1953 1, ACC_ALL, iterator.sptep);
1955 pgprintk("nonpaging_map: ENOMEM\n");
1956 kvm_release_pfn_clean(pfn);
1960 __set_spte(iterator.sptep,
1962 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1963 | shadow_user_mask | shadow_x_mask);
1969 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1974 unsigned long mmu_seq;
1976 level = mapping_level(vcpu, gfn);
1979 * This path builds a PAE pagetable - so we can map 2mb pages at
1980 * maximum. Therefore check if the level is larger than that.
1982 if (level > PT_DIRECTORY_LEVEL)
1983 level = PT_DIRECTORY_LEVEL;
1985 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1987 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1989 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1992 if (is_error_pfn(pfn)) {
1993 kvm_release_pfn_clean(pfn);
1997 spin_lock(&vcpu->kvm->mmu_lock);
1998 if (mmu_notifier_retry(vcpu, mmu_seq))
2000 kvm_mmu_free_some_pages(vcpu);
2001 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2002 spin_unlock(&vcpu->kvm->mmu_lock);
2008 spin_unlock(&vcpu->kvm->mmu_lock);
2009 kvm_release_pfn_clean(pfn);
2014 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2017 struct kvm_mmu_page *sp;
2019 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2021 spin_lock(&vcpu->kvm->mmu_lock);
2022 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2023 hpa_t root = vcpu->arch.mmu.root_hpa;
2025 sp = page_header(root);
2027 if (!sp->root_count && sp->role.invalid)
2028 kvm_mmu_zap_page(vcpu->kvm, sp);
2029 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2030 spin_unlock(&vcpu->kvm->mmu_lock);
2033 for (i = 0; i < 4; ++i) {
2034 hpa_t root = vcpu->arch.mmu.pae_root[i];
2037 root &= PT64_BASE_ADDR_MASK;
2038 sp = page_header(root);
2040 if (!sp->root_count && sp->role.invalid)
2041 kvm_mmu_zap_page(vcpu->kvm, sp);
2043 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2045 spin_unlock(&vcpu->kvm->mmu_lock);
2046 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2049 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2053 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2054 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2061 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2065 struct kvm_mmu_page *sp;
2069 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2071 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2072 hpa_t root = vcpu->arch.mmu.root_hpa;
2074 ASSERT(!VALID_PAGE(root));
2077 if (mmu_check_root(vcpu, root_gfn))
2079 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2080 PT64_ROOT_LEVEL, direct,
2082 root = __pa(sp->spt);
2084 vcpu->arch.mmu.root_hpa = root;
2087 direct = !is_paging(vcpu);
2090 for (i = 0; i < 4; ++i) {
2091 hpa_t root = vcpu->arch.mmu.pae_root[i];
2093 ASSERT(!VALID_PAGE(root));
2094 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2095 pdptr = kvm_pdptr_read(vcpu, i);
2096 if (!is_present_gpte(pdptr)) {
2097 vcpu->arch.mmu.pae_root[i] = 0;
2100 root_gfn = pdptr >> PAGE_SHIFT;
2101 } else if (vcpu->arch.mmu.root_level == 0)
2103 if (mmu_check_root(vcpu, root_gfn))
2105 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2106 PT32_ROOT_LEVEL, direct,
2108 root = __pa(sp->spt);
2110 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2112 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2116 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2119 struct kvm_mmu_page *sp;
2121 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2123 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2124 hpa_t root = vcpu->arch.mmu.root_hpa;
2125 sp = page_header(root);
2126 mmu_sync_children(vcpu, sp);
2129 for (i = 0; i < 4; ++i) {
2130 hpa_t root = vcpu->arch.mmu.pae_root[i];
2132 if (root && VALID_PAGE(root)) {
2133 root &= PT64_BASE_ADDR_MASK;
2134 sp = page_header(root);
2135 mmu_sync_children(vcpu, sp);
2140 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2142 spin_lock(&vcpu->kvm->mmu_lock);
2143 mmu_sync_roots(vcpu);
2144 spin_unlock(&vcpu->kvm->mmu_lock);
2147 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2152 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2158 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2159 r = mmu_topup_memory_caches(vcpu);
2164 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2166 gfn = gva >> PAGE_SHIFT;
2168 return nonpaging_map(vcpu, gva & PAGE_MASK,
2169 error_code & PFERR_WRITE_MASK, gfn);
2172 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2178 gfn_t gfn = gpa >> PAGE_SHIFT;
2179 unsigned long mmu_seq;
2182 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2184 r = mmu_topup_memory_caches(vcpu);
2188 level = mapping_level(vcpu, gfn);
2190 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2192 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2194 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2195 if (is_error_pfn(pfn)) {
2196 kvm_release_pfn_clean(pfn);
2199 spin_lock(&vcpu->kvm->mmu_lock);
2200 if (mmu_notifier_retry(vcpu, mmu_seq))
2202 kvm_mmu_free_some_pages(vcpu);
2203 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2205 spin_unlock(&vcpu->kvm->mmu_lock);
2210 spin_unlock(&vcpu->kvm->mmu_lock);
2211 kvm_release_pfn_clean(pfn);
2215 static void nonpaging_free(struct kvm_vcpu *vcpu)
2217 mmu_free_roots(vcpu);
2220 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2222 struct kvm_mmu *context = &vcpu->arch.mmu;
2224 context->new_cr3 = nonpaging_new_cr3;
2225 context->page_fault = nonpaging_page_fault;
2226 context->gva_to_gpa = nonpaging_gva_to_gpa;
2227 context->free = nonpaging_free;
2228 context->prefetch_page = nonpaging_prefetch_page;
2229 context->sync_page = nonpaging_sync_page;
2230 context->invlpg = nonpaging_invlpg;
2231 context->root_level = 0;
2232 context->shadow_root_level = PT32E_ROOT_LEVEL;
2233 context->root_hpa = INVALID_PAGE;
2237 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2239 ++vcpu->stat.tlb_flush;
2240 kvm_x86_ops->tlb_flush(vcpu);
2243 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2245 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2246 mmu_free_roots(vcpu);
2249 static void inject_page_fault(struct kvm_vcpu *vcpu,
2253 kvm_inject_page_fault(vcpu, addr, err_code);
2256 static void paging_free(struct kvm_vcpu *vcpu)
2258 nonpaging_free(vcpu);
2261 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2265 bit7 = (gpte >> 7) & 1;
2266 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2270 #include "paging_tmpl.h"
2274 #include "paging_tmpl.h"
2277 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2279 struct kvm_mmu *context = &vcpu->arch.mmu;
2280 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2281 u64 exb_bit_rsvd = 0;
2284 exb_bit_rsvd = rsvd_bits(63, 63);
2286 case PT32_ROOT_LEVEL:
2287 /* no rsvd bits for 2 level 4K page table entries */
2288 context->rsvd_bits_mask[0][1] = 0;
2289 context->rsvd_bits_mask[0][0] = 0;
2290 if (is_cpuid_PSE36())
2291 /* 36bits PSE 4MB page */
2292 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2294 /* 32 bits PSE 4MB page */
2295 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2296 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2298 case PT32E_ROOT_LEVEL:
2299 context->rsvd_bits_mask[0][2] =
2300 rsvd_bits(maxphyaddr, 63) |
2301 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2302 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2303 rsvd_bits(maxphyaddr, 62); /* PDE */
2304 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2305 rsvd_bits(maxphyaddr, 62); /* PTE */
2306 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2307 rsvd_bits(maxphyaddr, 62) |
2308 rsvd_bits(13, 20); /* large page */
2309 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2311 case PT64_ROOT_LEVEL:
2312 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2313 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2314 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2315 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2316 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2317 rsvd_bits(maxphyaddr, 51);
2318 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2319 rsvd_bits(maxphyaddr, 51);
2320 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2321 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2322 rsvd_bits(maxphyaddr, 51) |
2324 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2325 rsvd_bits(maxphyaddr, 51) |
2326 rsvd_bits(13, 20); /* large page */
2327 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2332 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2334 struct kvm_mmu *context = &vcpu->arch.mmu;
2336 ASSERT(is_pae(vcpu));
2337 context->new_cr3 = paging_new_cr3;
2338 context->page_fault = paging64_page_fault;
2339 context->gva_to_gpa = paging64_gva_to_gpa;
2340 context->prefetch_page = paging64_prefetch_page;
2341 context->sync_page = paging64_sync_page;
2342 context->invlpg = paging64_invlpg;
2343 context->free = paging_free;
2344 context->root_level = level;
2345 context->shadow_root_level = level;
2346 context->root_hpa = INVALID_PAGE;
2350 static int paging64_init_context(struct kvm_vcpu *vcpu)
2352 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2353 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2356 static int paging32_init_context(struct kvm_vcpu *vcpu)
2358 struct kvm_mmu *context = &vcpu->arch.mmu;
2360 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2361 context->new_cr3 = paging_new_cr3;
2362 context->page_fault = paging32_page_fault;
2363 context->gva_to_gpa = paging32_gva_to_gpa;
2364 context->free = paging_free;
2365 context->prefetch_page = paging32_prefetch_page;
2366 context->sync_page = paging32_sync_page;
2367 context->invlpg = paging32_invlpg;
2368 context->root_level = PT32_ROOT_LEVEL;
2369 context->shadow_root_level = PT32E_ROOT_LEVEL;
2370 context->root_hpa = INVALID_PAGE;
2374 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2376 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2377 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2380 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2382 struct kvm_mmu *context = &vcpu->arch.mmu;
2384 context->new_cr3 = nonpaging_new_cr3;
2385 context->page_fault = tdp_page_fault;
2386 context->free = nonpaging_free;
2387 context->prefetch_page = nonpaging_prefetch_page;
2388 context->sync_page = nonpaging_sync_page;
2389 context->invlpg = nonpaging_invlpg;
2390 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2391 context->root_hpa = INVALID_PAGE;
2393 if (!is_paging(vcpu)) {
2394 context->gva_to_gpa = nonpaging_gva_to_gpa;
2395 context->root_level = 0;
2396 } else if (is_long_mode(vcpu)) {
2397 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2398 context->gva_to_gpa = paging64_gva_to_gpa;
2399 context->root_level = PT64_ROOT_LEVEL;
2400 } else if (is_pae(vcpu)) {
2401 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2402 context->gva_to_gpa = paging64_gva_to_gpa;
2403 context->root_level = PT32E_ROOT_LEVEL;
2405 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2406 context->gva_to_gpa = paging32_gva_to_gpa;
2407 context->root_level = PT32_ROOT_LEVEL;
2413 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2418 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2420 if (!is_paging(vcpu))
2421 r = nonpaging_init_context(vcpu);
2422 else if (is_long_mode(vcpu))
2423 r = paging64_init_context(vcpu);
2424 else if (is_pae(vcpu))
2425 r = paging32E_init_context(vcpu);
2427 r = paging32_init_context(vcpu);
2429 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2434 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2436 vcpu->arch.update_pte.pfn = bad_pfn;
2439 return init_kvm_tdp_mmu(vcpu);
2441 return init_kvm_softmmu(vcpu);
2444 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2447 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2448 vcpu->arch.mmu.free(vcpu);
2449 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2453 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2455 destroy_kvm_mmu(vcpu);
2456 return init_kvm_mmu(vcpu);
2458 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2460 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2464 r = mmu_topup_memory_caches(vcpu);
2467 spin_lock(&vcpu->kvm->mmu_lock);
2468 kvm_mmu_free_some_pages(vcpu);
2469 r = mmu_alloc_roots(vcpu);
2470 mmu_sync_roots(vcpu);
2471 spin_unlock(&vcpu->kvm->mmu_lock);
2474 /* set_cr3() should ensure TLB has been flushed */
2475 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2479 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2481 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2483 mmu_free_roots(vcpu);
2486 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2487 struct kvm_mmu_page *sp,
2491 struct kvm_mmu_page *child;
2494 if (is_shadow_present_pte(pte)) {
2495 if (is_last_spte(pte, sp->role.level))
2496 rmap_remove(vcpu->kvm, spte);
2498 child = page_header(pte & PT64_BASE_ADDR_MASK);
2499 mmu_page_remove_parent_pte(child, spte);
2502 __set_spte(spte, shadow_trap_nonpresent_pte);
2503 if (is_large_pte(pte))
2504 --vcpu->kvm->stat.lpages;
2507 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2508 struct kvm_mmu_page *sp,
2512 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2513 ++vcpu->kvm->stat.mmu_pde_zapped;
2517 ++vcpu->kvm->stat.mmu_pte_updated;
2518 if (sp->role.glevels == PT32_ROOT_LEVEL)
2519 paging32_update_pte(vcpu, sp, spte, new);
2521 paging64_update_pte(vcpu, sp, spte, new);
2524 static bool need_remote_flush(u64 old, u64 new)
2526 if (!is_shadow_present_pte(old))
2528 if (!is_shadow_present_pte(new))
2530 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2532 old ^= PT64_NX_MASK;
2533 new ^= PT64_NX_MASK;
2534 return (old & ~new & PT64_PERM_MASK) != 0;
2537 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2539 if (need_remote_flush(old, new))
2540 kvm_flush_remote_tlbs(vcpu->kvm);
2542 kvm_mmu_flush_tlb(vcpu);
2545 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2547 u64 *spte = vcpu->arch.last_pte_updated;
2549 return !!(spte && (*spte & shadow_accessed_mask));
2552 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2553 const u8 *new, int bytes)
2560 if (bytes != 4 && bytes != 8)
2564 * Assume that the pte write on a page table of the same type
2565 * as the current vcpu paging mode. This is nearly always true
2566 * (might be false while changing modes). Note it is verified later
2570 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2571 if ((bytes == 4) && (gpa % 4 == 0)) {
2572 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2575 memcpy((void *)&gpte + (gpa % 8), new, 4);
2576 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2577 memcpy((void *)&gpte, new, 8);
2580 if ((bytes == 4) && (gpa % 4 == 0))
2581 memcpy((void *)&gpte, new, 4);
2583 if (!is_present_gpte(gpte))
2585 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2587 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2589 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2591 if (is_error_pfn(pfn)) {
2592 kvm_release_pfn_clean(pfn);
2595 vcpu->arch.update_pte.gfn = gfn;
2596 vcpu->arch.update_pte.pfn = pfn;
2599 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2601 u64 *spte = vcpu->arch.last_pte_updated;
2604 && vcpu->arch.last_pte_gfn == gfn
2605 && shadow_accessed_mask
2606 && !(*spte & shadow_accessed_mask)
2607 && is_shadow_present_pte(*spte))
2608 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2611 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2612 const u8 *new, int bytes,
2613 bool guest_initiated)
2615 gfn_t gfn = gpa >> PAGE_SHIFT;
2616 struct kvm_mmu_page *sp;
2617 struct hlist_node *node, *n;
2618 struct hlist_head *bucket;
2622 unsigned offset = offset_in_page(gpa);
2624 unsigned page_offset;
2625 unsigned misaligned;
2632 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2633 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2634 spin_lock(&vcpu->kvm->mmu_lock);
2635 kvm_mmu_access_page(vcpu, gfn);
2636 kvm_mmu_free_some_pages(vcpu);
2637 ++vcpu->kvm->stat.mmu_pte_write;
2638 kvm_mmu_audit(vcpu, "pre pte write");
2639 if (guest_initiated) {
2640 if (gfn == vcpu->arch.last_pt_write_gfn
2641 && !last_updated_pte_accessed(vcpu)) {
2642 ++vcpu->arch.last_pt_write_count;
2643 if (vcpu->arch.last_pt_write_count >= 3)
2646 vcpu->arch.last_pt_write_gfn = gfn;
2647 vcpu->arch.last_pt_write_count = 1;
2648 vcpu->arch.last_pte_updated = NULL;
2651 index = kvm_page_table_hashfn(gfn);
2652 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2653 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2654 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2656 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2657 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2658 misaligned |= bytes < 4;
2659 if (misaligned || flooded) {
2661 * Misaligned accesses are too much trouble to fix
2662 * up; also, they usually indicate a page is not used
2665 * If we're seeing too many writes to a page,
2666 * it may no longer be a page table, or we may be
2667 * forking, in which case it is better to unmap the
2670 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2671 gpa, bytes, sp->role.word);
2672 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2674 ++vcpu->kvm->stat.mmu_flooded;
2677 page_offset = offset;
2678 level = sp->role.level;
2680 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2681 page_offset <<= 1; /* 32->64 */
2683 * A 32-bit pde maps 4MB while the shadow pdes map
2684 * only 2MB. So we need to double the offset again
2685 * and zap two pdes instead of one.
2687 if (level == PT32_ROOT_LEVEL) {
2688 page_offset &= ~7; /* kill rounding error */
2692 quadrant = page_offset >> PAGE_SHIFT;
2693 page_offset &= ~PAGE_MASK;
2694 if (quadrant != sp->role.quadrant)
2697 spte = &sp->spt[page_offset / sizeof(*spte)];
2698 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2700 r = kvm_read_guest_atomic(vcpu->kvm,
2701 gpa & ~(u64)(pte_size - 1),
2703 new = (const void *)&gentry;
2709 mmu_pte_write_zap_pte(vcpu, sp, spte);
2711 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2712 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2716 kvm_mmu_audit(vcpu, "post pte write");
2717 spin_unlock(&vcpu->kvm->mmu_lock);
2718 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2719 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2720 vcpu->arch.update_pte.pfn = bad_pfn;
2724 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2732 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2734 spin_lock(&vcpu->kvm->mmu_lock);
2735 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2736 spin_unlock(&vcpu->kvm->mmu_lock);
2739 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2741 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2743 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2744 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2745 struct kvm_mmu_page *sp;
2747 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2748 struct kvm_mmu_page, link);
2749 kvm_mmu_zap_page(vcpu->kvm, sp);
2750 ++vcpu->kvm->stat.mmu_recycled;
2754 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2757 enum emulation_result er;
2759 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2768 r = mmu_topup_memory_caches(vcpu);
2772 er = emulate_instruction(vcpu, cr2, error_code, 0);
2777 case EMULATE_DO_MMIO:
2778 ++vcpu->stat.mmio_exits;
2781 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2782 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2783 vcpu->run->internal.ndata = 0;
2791 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2793 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2795 vcpu->arch.mmu.invlpg(vcpu, gva);
2796 kvm_mmu_flush_tlb(vcpu);
2797 ++vcpu->stat.invlpg;
2799 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2801 void kvm_enable_tdp(void)
2805 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2807 void kvm_disable_tdp(void)
2809 tdp_enabled = false;
2811 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2813 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2815 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2818 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2826 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2827 * Therefore we need to allocate shadow page tables in the first
2828 * 4GB of memory, which happens to fit the DMA32 zone.
2830 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2834 vcpu->arch.mmu.pae_root = page_address(page);
2835 for (i = 0; i < 4; ++i)
2836 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2841 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2844 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2846 return alloc_mmu_pages(vcpu);
2849 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2852 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2854 return init_kvm_mmu(vcpu);
2857 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2861 destroy_kvm_mmu(vcpu);
2862 free_mmu_pages(vcpu);
2863 mmu_free_memory_caches(vcpu);
2866 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2868 struct kvm_mmu_page *sp;
2870 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2874 if (!test_bit(slot, sp->slot_bitmap))
2878 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2880 if (pt[i] & PT_WRITABLE_MASK)
2881 pt[i] &= ~PT_WRITABLE_MASK;
2883 kvm_flush_remote_tlbs(kvm);
2886 void kvm_mmu_zap_all(struct kvm *kvm)
2888 struct kvm_mmu_page *sp, *node;
2890 spin_lock(&kvm->mmu_lock);
2891 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2892 if (kvm_mmu_zap_page(kvm, sp))
2893 node = container_of(kvm->arch.active_mmu_pages.next,
2894 struct kvm_mmu_page, link);
2895 spin_unlock(&kvm->mmu_lock);
2897 kvm_flush_remote_tlbs(kvm);
2900 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2902 struct kvm_mmu_page *page;
2904 page = container_of(kvm->arch.active_mmu_pages.prev,
2905 struct kvm_mmu_page, link);
2906 kvm_mmu_zap_page(kvm, page);
2909 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2912 struct kvm *kvm_freed = NULL;
2913 int cache_count = 0;
2915 spin_lock(&kvm_lock);
2917 list_for_each_entry(kvm, &vm_list, vm_list) {
2920 idx = srcu_read_lock(&kvm->srcu);
2921 spin_lock(&kvm->mmu_lock);
2922 npages = kvm->arch.n_alloc_mmu_pages -
2923 kvm->arch.n_free_mmu_pages;
2924 cache_count += npages;
2925 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2926 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2932 spin_unlock(&kvm->mmu_lock);
2933 srcu_read_unlock(&kvm->srcu, idx);
2936 list_move_tail(&kvm_freed->vm_list, &vm_list);
2938 spin_unlock(&kvm_lock);
2943 static struct shrinker mmu_shrinker = {
2944 .shrink = mmu_shrink,
2945 .seeks = DEFAULT_SEEKS * 10,
2948 static void mmu_destroy_caches(void)
2950 if (pte_chain_cache)
2951 kmem_cache_destroy(pte_chain_cache);
2952 if (rmap_desc_cache)
2953 kmem_cache_destroy(rmap_desc_cache);
2954 if (mmu_page_header_cache)
2955 kmem_cache_destroy(mmu_page_header_cache);
2958 void kvm_mmu_module_exit(void)
2960 mmu_destroy_caches();
2961 unregister_shrinker(&mmu_shrinker);
2964 int kvm_mmu_module_init(void)
2966 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2967 sizeof(struct kvm_pte_chain),
2969 if (!pte_chain_cache)
2971 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2972 sizeof(struct kvm_rmap_desc),
2974 if (!rmap_desc_cache)
2977 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2978 sizeof(struct kvm_mmu_page),
2980 if (!mmu_page_header_cache)
2983 register_shrinker(&mmu_shrinker);
2988 mmu_destroy_caches();
2993 * Caculate mmu pages needed for kvm.
2995 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2998 unsigned int nr_mmu_pages;
2999 unsigned int nr_pages = 0;
3000 struct kvm_memslots *slots;
3002 slots = rcu_dereference(kvm->memslots);
3003 for (i = 0; i < slots->nmemslots; i++)
3004 nr_pages += slots->memslots[i].npages;
3006 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3007 nr_mmu_pages = max(nr_mmu_pages,
3008 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3010 return nr_mmu_pages;
3013 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3016 if (len > buffer->len)
3021 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3026 ret = pv_mmu_peek_buffer(buffer, len);
3031 buffer->processed += len;
3035 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3036 gpa_t addr, gpa_t value)
3041 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3044 r = mmu_topup_memory_caches(vcpu);
3048 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3054 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3056 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3060 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3062 spin_lock(&vcpu->kvm->mmu_lock);
3063 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3064 spin_unlock(&vcpu->kvm->mmu_lock);
3068 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3069 struct kvm_pv_mmu_op_buffer *buffer)
3071 struct kvm_mmu_op_header *header;
3073 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3076 switch (header->op) {
3077 case KVM_MMU_OP_WRITE_PTE: {
3078 struct kvm_mmu_op_write_pte *wpte;
3080 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3083 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3086 case KVM_MMU_OP_FLUSH_TLB: {
3087 struct kvm_mmu_op_flush_tlb *ftlb;
3089 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3092 return kvm_pv_mmu_flush_tlb(vcpu);
3094 case KVM_MMU_OP_RELEASE_PT: {
3095 struct kvm_mmu_op_release_pt *rpt;
3097 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3100 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3106 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3107 gpa_t addr, unsigned long *ret)
3110 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3112 buffer->ptr = buffer->buf;
3113 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3114 buffer->processed = 0;
3116 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3120 while (buffer->len) {
3121 r = kvm_pv_mmu_op_one(vcpu, buffer);
3130 *ret = buffer->processed;
3134 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3136 struct kvm_shadow_walk_iterator iterator;
3139 spin_lock(&vcpu->kvm->mmu_lock);
3140 for_each_shadow_entry(vcpu, addr, iterator) {
3141 sptes[iterator.level-1] = *iterator.sptep;
3143 if (!is_shadow_present_pte(*iterator.sptep))
3146 spin_unlock(&vcpu->kvm->mmu_lock);
3150 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3154 static const char *audit_msg;
3156 static gva_t canonicalize(gva_t gva)
3158 #ifdef CONFIG_X86_64
3159 gva = (long long)(gva << 16) >> 16;
3165 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3168 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3173 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3174 u64 ent = sp->spt[i];
3176 if (is_shadow_present_pte(ent)) {
3177 if (!is_last_spte(ent, sp->role.level)) {
3178 struct kvm_mmu_page *child;
3179 child = page_header(ent & PT64_BASE_ADDR_MASK);
3180 __mmu_spte_walk(kvm, child, fn);
3182 fn(kvm, sp, &sp->spt[i]);
3187 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3190 struct kvm_mmu_page *sp;
3192 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3194 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3195 hpa_t root = vcpu->arch.mmu.root_hpa;
3196 sp = page_header(root);
3197 __mmu_spte_walk(vcpu->kvm, sp, fn);
3200 for (i = 0; i < 4; ++i) {
3201 hpa_t root = vcpu->arch.mmu.pae_root[i];
3203 if (root && VALID_PAGE(root)) {
3204 root &= PT64_BASE_ADDR_MASK;
3205 sp = page_header(root);
3206 __mmu_spte_walk(vcpu->kvm, sp, fn);
3212 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3213 gva_t va, int level)
3215 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3217 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3219 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3222 if (ent == shadow_trap_nonpresent_pte)
3225 va = canonicalize(va);
3226 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3227 audit_mappings_page(vcpu, ent, va, level - 1);
3229 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3230 gfn_t gfn = gpa >> PAGE_SHIFT;
3231 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3232 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3234 if (is_error_pfn(pfn)) {
3235 kvm_release_pfn_clean(pfn);
3239 if (is_shadow_present_pte(ent)
3240 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3241 printk(KERN_ERR "xx audit error: (%s) levels %d"
3242 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3243 audit_msg, vcpu->arch.mmu.root_level,
3245 is_shadow_present_pte(ent));
3246 else if (ent == shadow_notrap_nonpresent_pte
3247 && !is_error_hpa(hpa))
3248 printk(KERN_ERR "audit: (%s) notrap shadow,"
3249 " valid guest gva %lx\n", audit_msg, va);
3250 kvm_release_pfn_clean(pfn);
3256 static void audit_mappings(struct kvm_vcpu *vcpu)
3260 if (vcpu->arch.mmu.root_level == 4)
3261 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3263 for (i = 0; i < 4; ++i)
3264 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3265 audit_mappings_page(vcpu,
3266 vcpu->arch.mmu.pae_root[i],
3271 static int count_rmaps(struct kvm_vcpu *vcpu)
3276 idx = srcu_read_lock(&kvm->srcu);
3277 slots = rcu_dereference(kvm->memslots);
3278 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3279 struct kvm_memory_slot *m = &slots->memslots[i];
3280 struct kvm_rmap_desc *d;
3282 for (j = 0; j < m->npages; ++j) {
3283 unsigned long *rmapp = &m->rmap[j];
3287 if (!(*rmapp & 1)) {
3291 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3293 for (k = 0; k < RMAP_EXT; ++k)
3302 srcu_read_unlock(&kvm->srcu, idx);
3306 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3308 unsigned long *rmapp;
3309 struct kvm_mmu_page *rev_sp;
3312 if (*sptep & PT_WRITABLE_MASK) {
3313 rev_sp = page_header(__pa(sptep));
3314 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3316 if (!gfn_to_memslot(kvm, gfn)) {
3317 if (!printk_ratelimit())
3319 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3321 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3322 audit_msg, sptep - rev_sp->spt,
3328 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3329 is_large_pte(*sptep));
3331 if (!printk_ratelimit())
3333 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3341 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3343 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3346 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3348 struct kvm_mmu_page *sp;
3351 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3354 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3357 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3360 if (!(ent & PT_PRESENT_MASK))
3362 if (!(ent & PT_WRITABLE_MASK))
3364 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3370 static void audit_rmap(struct kvm_vcpu *vcpu)
3372 check_writable_mappings_rmap(vcpu);
3376 static void audit_write_protection(struct kvm_vcpu *vcpu)
3378 struct kvm_mmu_page *sp;
3379 struct kvm_memory_slot *slot;
3380 unsigned long *rmapp;
3384 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3385 if (sp->role.direct)
3390 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3391 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3392 rmapp = &slot->rmap[gfn - slot->base_gfn];
3394 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3396 if (*spte & PT_WRITABLE_MASK)
3397 printk(KERN_ERR "%s: (%s) shadow page has "
3398 "writable mappings: gfn %lx role %x\n",
3399 __func__, audit_msg, sp->gfn,
3401 spte = rmap_next(vcpu->kvm, rmapp, spte);
3406 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3413 audit_write_protection(vcpu);
3414 if (strcmp("pre pte write", audit_msg) != 0)
3415 audit_mappings(vcpu);
3416 audit_writable_sptes_have_rmaps(vcpu);