2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
26 #include <linux/highmem.h>
27 #include <linux/module.h>
28 #include <linux/swap.h>
29 #include <linux/hugetlb.h>
30 #include <linux/compiler.h>
33 #include <asm/cmpxchg.h>
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
44 bool tdp_enabled = false;
51 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
63 #define pgprintk(x...) do { } while (0)
64 #define rmap_printk(x...) do { } while (0)
68 #if defined(MMU_DEBUG) || defined(AUDIT)
70 module_param(dbg, bool, 0644);
73 static int oos_shadow = 1;
74 module_param(oos_shadow, bool, 0644);
77 #define ASSERT(x) do { } while (0)
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
86 #define PT_FIRST_AVAIL_BITS_SHIFT 9
87 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
89 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
91 #define PT64_LEVEL_BITS 9
93 #define PT64_LEVEL_SHIFT(level) \
94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
96 #define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
99 #define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
103 #define PT32_LEVEL_BITS 10
105 #define PT32_LEVEL_SHIFT(level) \
106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
108 #define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111 #define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
115 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
116 #define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
119 #define PT32_BASE_ADDR_MASK PAGE_MASK
120 #define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
123 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
126 #define PFERR_PRESENT_MASK (1U << 0)
127 #define PFERR_WRITE_MASK (1U << 1)
128 #define PFERR_USER_MASK (1U << 2)
129 #define PFERR_RSVD_MASK (1U << 3)
130 #define PFERR_FETCH_MASK (1U << 4)
132 #define PT_DIRECTORY_LEVEL 2
133 #define PT_PAGE_TABLE_LEVEL 1
137 #define ACC_EXEC_MASK 1
138 #define ACC_WRITE_MASK PT_WRITABLE_MASK
139 #define ACC_USER_MASK PT_USER_MASK
140 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
142 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
144 struct kvm_rmap_desc {
145 u64 *shadow_ptes[RMAP_EXT];
146 struct kvm_rmap_desc *more;
149 struct kvm_shadow_walk_iterator {
157 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
158 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
159 shadow_walk_okay(&(_walker)); \
160 shadow_walk_next(&(_walker)))
163 struct kvm_unsync_walk {
164 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
167 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
169 static struct kmem_cache *pte_chain_cache;
170 static struct kmem_cache *rmap_desc_cache;
171 static struct kmem_cache *mmu_page_header_cache;
173 static u64 __read_mostly shadow_trap_nonpresent_pte;
174 static u64 __read_mostly shadow_notrap_nonpresent_pte;
175 static u64 __read_mostly shadow_base_present_pte;
176 static u64 __read_mostly shadow_nx_mask;
177 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
178 static u64 __read_mostly shadow_user_mask;
179 static u64 __read_mostly shadow_accessed_mask;
180 static u64 __read_mostly shadow_dirty_mask;
181 static u64 __read_mostly shadow_mt_mask;
183 static inline u64 rsvd_bits(int s, int e)
185 return ((1ULL << (e - s + 1)) - 1) << s;
188 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
190 shadow_trap_nonpresent_pte = trap_pte;
191 shadow_notrap_nonpresent_pte = notrap_pte;
193 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
195 void kvm_mmu_set_base_ptes(u64 base_pte)
197 shadow_base_present_pte = base_pte;
199 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
201 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
202 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
204 shadow_user_mask = user_mask;
205 shadow_accessed_mask = accessed_mask;
206 shadow_dirty_mask = dirty_mask;
207 shadow_nx_mask = nx_mask;
208 shadow_x_mask = x_mask;
209 shadow_mt_mask = mt_mask;
211 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
213 static int is_write_protection(struct kvm_vcpu *vcpu)
215 return vcpu->arch.cr0 & X86_CR0_WP;
218 static int is_cpuid_PSE36(void)
223 static int is_nx(struct kvm_vcpu *vcpu)
225 return vcpu->arch.shadow_efer & EFER_NX;
228 static int is_present_pte(unsigned long pte)
230 return pte & PT_PRESENT_MASK;
233 static int is_shadow_present_pte(u64 pte)
235 return pte != shadow_trap_nonpresent_pte
236 && pte != shadow_notrap_nonpresent_pte;
239 static int is_large_pte(u64 pte)
241 return pte & PT_PAGE_SIZE_MASK;
244 static int is_writeble_pte(unsigned long pte)
246 return pte & PT_WRITABLE_MASK;
249 static int is_dirty_pte(unsigned long pte)
251 return pte & shadow_dirty_mask;
254 static int is_rmap_pte(u64 pte)
256 return is_shadow_present_pte(pte);
259 static pfn_t spte_to_pfn(u64 pte)
261 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
264 static gfn_t pse36_gfn_delta(u32 gpte)
266 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
268 return (gpte & PT32_DIR_PSE36_MASK) << shift;
271 static void set_shadow_pte(u64 *sptep, u64 spte)
274 set_64bit((unsigned long *)sptep, spte);
276 set_64bit((unsigned long long *)sptep, spte);
280 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
281 struct kmem_cache *base_cache, int min)
285 if (cache->nobjs >= min)
287 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
288 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
291 cache->objects[cache->nobjs++] = obj;
296 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
299 kfree(mc->objects[--mc->nobjs]);
302 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
307 if (cache->nobjs >= min)
309 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
310 page = alloc_page(GFP_KERNEL);
313 set_page_private(page, 0);
314 cache->objects[cache->nobjs++] = page_address(page);
319 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
322 free_page((unsigned long)mc->objects[--mc->nobjs]);
325 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
329 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
333 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
337 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
340 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
341 mmu_page_header_cache, 4);
346 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
348 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
349 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
350 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
351 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
354 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
360 p = mc->objects[--mc->nobjs];
364 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
366 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
367 sizeof(struct kvm_pte_chain));
370 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
375 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
377 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
378 sizeof(struct kvm_rmap_desc));
381 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
387 * Return the pointer to the largepage write count for a given
388 * gfn, handling slots that are not large page aligned.
390 static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
394 idx = (gfn / KVM_PAGES_PER_HPAGE) -
395 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
396 return &slot->lpage_info[idx].write_count;
399 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
403 gfn = unalias_gfn(kvm, gfn);
404 write_count = slot_largepage_idx(gfn,
405 gfn_to_memslot_unaliased(kvm, gfn));
409 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
413 gfn = unalias_gfn(kvm, gfn);
414 write_count = slot_largepage_idx(gfn,
415 gfn_to_memslot_unaliased(kvm, gfn));
417 WARN_ON(*write_count < 0);
420 static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
422 struct kvm_memory_slot *slot;
425 gfn = unalias_gfn(kvm, gfn);
426 slot = gfn_to_memslot_unaliased(kvm, gfn);
428 largepage_idx = slot_largepage_idx(gfn, slot);
429 return *largepage_idx;
435 static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
437 struct vm_area_struct *vma;
441 addr = gfn_to_hva(kvm, gfn);
442 if (kvm_is_error_hva(addr))
445 down_read(¤t->mm->mmap_sem);
446 vma = find_vma(current->mm, addr);
447 if (vma && is_vm_hugetlb_page(vma))
449 up_read(¤t->mm->mmap_sem);
454 static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
456 struct kvm_memory_slot *slot;
458 if (has_wrprotected_page(vcpu->kvm, large_gfn))
461 if (!host_largepage_backed(vcpu->kvm, large_gfn))
464 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
465 if (slot && slot->dirty_bitmap)
472 * Take gfn and return the reverse mapping to it.
473 * Note: gfn must be unaliased before this function get called
476 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
478 struct kvm_memory_slot *slot;
481 slot = gfn_to_memslot(kvm, gfn);
483 return &slot->rmap[gfn - slot->base_gfn];
485 idx = (gfn / KVM_PAGES_PER_HPAGE) -
486 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
488 return &slot->lpage_info[idx].rmap_pde;
492 * Reverse mapping data structures:
494 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
495 * that points to page_address(page).
497 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
498 * containing more mappings.
500 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
502 struct kvm_mmu_page *sp;
503 struct kvm_rmap_desc *desc;
504 unsigned long *rmapp;
507 if (!is_rmap_pte(*spte))
509 gfn = unalias_gfn(vcpu->kvm, gfn);
510 sp = page_header(__pa(spte));
511 sp->gfns[spte - sp->spt] = gfn;
512 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
514 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
515 *rmapp = (unsigned long)spte;
516 } else if (!(*rmapp & 1)) {
517 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
518 desc = mmu_alloc_rmap_desc(vcpu);
519 desc->shadow_ptes[0] = (u64 *)*rmapp;
520 desc->shadow_ptes[1] = spte;
521 *rmapp = (unsigned long)desc | 1;
523 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
524 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
525 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
527 if (desc->shadow_ptes[RMAP_EXT-1]) {
528 desc->more = mmu_alloc_rmap_desc(vcpu);
531 for (i = 0; desc->shadow_ptes[i]; ++i)
533 desc->shadow_ptes[i] = spte;
537 static void rmap_desc_remove_entry(unsigned long *rmapp,
538 struct kvm_rmap_desc *desc,
540 struct kvm_rmap_desc *prev_desc)
544 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
546 desc->shadow_ptes[i] = desc->shadow_ptes[j];
547 desc->shadow_ptes[j] = NULL;
550 if (!prev_desc && !desc->more)
551 *rmapp = (unsigned long)desc->shadow_ptes[0];
554 prev_desc->more = desc->more;
556 *rmapp = (unsigned long)desc->more | 1;
557 mmu_free_rmap_desc(desc);
560 static void rmap_remove(struct kvm *kvm, u64 *spte)
562 struct kvm_rmap_desc *desc;
563 struct kvm_rmap_desc *prev_desc;
564 struct kvm_mmu_page *sp;
566 unsigned long *rmapp;
569 if (!is_rmap_pte(*spte))
571 sp = page_header(__pa(spte));
572 pfn = spte_to_pfn(*spte);
573 if (*spte & shadow_accessed_mask)
574 kvm_set_pfn_accessed(pfn);
575 if (is_writeble_pte(*spte))
576 kvm_release_pfn_dirty(pfn);
578 kvm_release_pfn_clean(pfn);
579 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
581 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
583 } else if (!(*rmapp & 1)) {
584 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
585 if ((u64 *)*rmapp != spte) {
586 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
592 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
593 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
596 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
597 if (desc->shadow_ptes[i] == spte) {
598 rmap_desc_remove_entry(rmapp,
610 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
612 struct kvm_rmap_desc *desc;
613 struct kvm_rmap_desc *prev_desc;
619 else if (!(*rmapp & 1)) {
621 return (u64 *)*rmapp;
624 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
628 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
629 if (prev_spte == spte)
630 return desc->shadow_ptes[i];
631 prev_spte = desc->shadow_ptes[i];
638 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
640 unsigned long *rmapp;
642 int write_protected = 0;
644 gfn = unalias_gfn(kvm, gfn);
645 rmapp = gfn_to_rmap(kvm, gfn, 0);
647 spte = rmap_next(kvm, rmapp, NULL);
650 BUG_ON(!(*spte & PT_PRESENT_MASK));
651 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
652 if (is_writeble_pte(*spte)) {
653 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
656 spte = rmap_next(kvm, rmapp, spte);
658 if (write_protected) {
661 spte = rmap_next(kvm, rmapp, NULL);
662 pfn = spte_to_pfn(*spte);
663 kvm_set_pfn_dirty(pfn);
666 /* check for huge page mappings */
667 rmapp = gfn_to_rmap(kvm, gfn, 1);
668 spte = rmap_next(kvm, rmapp, NULL);
671 BUG_ON(!(*spte & PT_PRESENT_MASK));
672 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
673 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
674 if (is_writeble_pte(*spte)) {
675 rmap_remove(kvm, spte);
677 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
681 spte = rmap_next(kvm, rmapp, spte);
684 return write_protected;
687 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
690 int need_tlb_flush = 0;
692 while ((spte = rmap_next(kvm, rmapp, NULL))) {
693 BUG_ON(!(*spte & PT_PRESENT_MASK));
694 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
695 rmap_remove(kvm, spte);
696 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
699 return need_tlb_flush;
702 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
703 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
709 * If mmap_sem isn't taken, we can look the memslots with only
710 * the mmu_lock by skipping over the slots with userspace_addr == 0.
712 for (i = 0; i < kvm->nmemslots; i++) {
713 struct kvm_memory_slot *memslot = &kvm->memslots[i];
714 unsigned long start = memslot->userspace_addr;
717 /* mmu_lock protects userspace_addr */
721 end = start + (memslot->npages << PAGE_SHIFT);
722 if (hva >= start && hva < end) {
723 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
724 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
725 retval |= handler(kvm,
726 &memslot->lpage_info[
728 KVM_PAGES_PER_HPAGE].rmap_pde);
735 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
737 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
740 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
745 /* always return old for EPT */
746 if (!shadow_accessed_mask)
749 spte = rmap_next(kvm, rmapp, NULL);
753 BUG_ON(!(_spte & PT_PRESENT_MASK));
754 _young = _spte & PT_ACCESSED_MASK;
757 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
759 spte = rmap_next(kvm, rmapp, spte);
764 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
766 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
770 static int is_empty_shadow_page(u64 *spt)
775 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
776 if (is_shadow_present_pte(*pos)) {
777 printk(KERN_ERR "%s: %p %llx\n", __func__,
785 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
787 ASSERT(is_empty_shadow_page(sp->spt));
789 __free_page(virt_to_page(sp->spt));
790 __free_page(virt_to_page(sp->gfns));
792 ++kvm->arch.n_free_mmu_pages;
795 static unsigned kvm_page_table_hashfn(gfn_t gfn)
797 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
800 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
803 struct kvm_mmu_page *sp;
805 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
806 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
807 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
808 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
809 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
810 INIT_LIST_HEAD(&sp->oos_link);
811 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
813 sp->parent_pte = parent_pte;
814 --vcpu->kvm->arch.n_free_mmu_pages;
818 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
819 struct kvm_mmu_page *sp, u64 *parent_pte)
821 struct kvm_pte_chain *pte_chain;
822 struct hlist_node *node;
827 if (!sp->multimapped) {
828 u64 *old = sp->parent_pte;
831 sp->parent_pte = parent_pte;
835 pte_chain = mmu_alloc_pte_chain(vcpu);
836 INIT_HLIST_HEAD(&sp->parent_ptes);
837 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
838 pte_chain->parent_ptes[0] = old;
840 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
841 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
843 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
844 if (!pte_chain->parent_ptes[i]) {
845 pte_chain->parent_ptes[i] = parent_pte;
849 pte_chain = mmu_alloc_pte_chain(vcpu);
851 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
852 pte_chain->parent_ptes[0] = parent_pte;
855 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
858 struct kvm_pte_chain *pte_chain;
859 struct hlist_node *node;
862 if (!sp->multimapped) {
863 BUG_ON(sp->parent_pte != parent_pte);
864 sp->parent_pte = NULL;
867 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
868 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
869 if (!pte_chain->parent_ptes[i])
871 if (pte_chain->parent_ptes[i] != parent_pte)
873 while (i + 1 < NR_PTE_CHAIN_ENTRIES
874 && pte_chain->parent_ptes[i + 1]) {
875 pte_chain->parent_ptes[i]
876 = pte_chain->parent_ptes[i + 1];
879 pte_chain->parent_ptes[i] = NULL;
881 hlist_del(&pte_chain->link);
882 mmu_free_pte_chain(pte_chain);
883 if (hlist_empty(&sp->parent_ptes)) {
885 sp->parent_pte = NULL;
894 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
895 mmu_parent_walk_fn fn)
897 struct kvm_pte_chain *pte_chain;
898 struct hlist_node *node;
899 struct kvm_mmu_page *parent_sp;
902 if (!sp->multimapped && sp->parent_pte) {
903 parent_sp = page_header(__pa(sp->parent_pte));
905 mmu_parent_walk(vcpu, parent_sp, fn);
908 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
909 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
910 if (!pte_chain->parent_ptes[i])
912 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
914 mmu_parent_walk(vcpu, parent_sp, fn);
918 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
921 struct kvm_mmu_page *sp = page_header(__pa(spte));
923 index = spte - sp->spt;
924 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
925 sp->unsync_children++;
926 WARN_ON(!sp->unsync_children);
929 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
931 struct kvm_pte_chain *pte_chain;
932 struct hlist_node *node;
938 if (!sp->multimapped) {
939 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
943 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
944 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
945 if (!pte_chain->parent_ptes[i])
947 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
951 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
953 kvm_mmu_update_parents_unsync(sp);
957 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
958 struct kvm_mmu_page *sp)
960 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
961 kvm_mmu_update_parents_unsync(sp);
964 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
965 struct kvm_mmu_page *sp)
969 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
970 sp->spt[i] = shadow_trap_nonpresent_pte;
973 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
974 struct kvm_mmu_page *sp)
979 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
983 #define KVM_PAGE_ARRAY_NR 16
985 struct kvm_mmu_pages {
986 struct mmu_page_and_offset {
987 struct kvm_mmu_page *sp;
989 } page[KVM_PAGE_ARRAY_NR];
993 #define for_each_unsync_children(bitmap, idx) \
994 for (idx = find_first_bit(bitmap, 512); \
996 idx = find_next_bit(bitmap, 512, idx+1))
998 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1004 for (i=0; i < pvec->nr; i++)
1005 if (pvec->page[i].sp == sp)
1008 pvec->page[pvec->nr].sp = sp;
1009 pvec->page[pvec->nr].idx = idx;
1011 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1014 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1015 struct kvm_mmu_pages *pvec)
1017 int i, ret, nr_unsync_leaf = 0;
1019 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1020 u64 ent = sp->spt[i];
1022 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1023 struct kvm_mmu_page *child;
1024 child = page_header(ent & PT64_BASE_ADDR_MASK);
1026 if (child->unsync_children) {
1027 if (mmu_pages_add(pvec, child, i))
1030 ret = __mmu_unsync_walk(child, pvec);
1032 __clear_bit(i, sp->unsync_child_bitmap);
1034 nr_unsync_leaf += ret;
1039 if (child->unsync) {
1041 if (mmu_pages_add(pvec, child, i))
1047 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1048 sp->unsync_children = 0;
1050 return nr_unsync_leaf;
1053 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1054 struct kvm_mmu_pages *pvec)
1056 if (!sp->unsync_children)
1059 mmu_pages_add(pvec, sp, 0);
1060 return __mmu_unsync_walk(sp, pvec);
1063 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1066 struct hlist_head *bucket;
1067 struct kvm_mmu_page *sp;
1068 struct hlist_node *node;
1070 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1071 index = kvm_page_table_hashfn(gfn);
1072 bucket = &kvm->arch.mmu_page_hash[index];
1073 hlist_for_each_entry(sp, node, bucket, hash_link)
1074 if (sp->gfn == gfn && !sp->role.direct
1075 && !sp->role.invalid) {
1076 pgprintk("%s: found role %x\n",
1077 __func__, sp->role.word);
1083 static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1085 list_del(&sp->oos_link);
1086 --kvm->stat.mmu_unsync_global;
1089 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1091 WARN_ON(!sp->unsync);
1094 kvm_unlink_unsync_global(kvm, sp);
1095 --kvm->stat.mmu_unsync;
1098 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1100 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1102 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1103 kvm_mmu_zap_page(vcpu->kvm, sp);
1107 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1108 kvm_flush_remote_tlbs(vcpu->kvm);
1109 kvm_unlink_unsync_page(vcpu->kvm, sp);
1110 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1111 kvm_mmu_zap_page(vcpu->kvm, sp);
1115 kvm_mmu_flush_tlb(vcpu);
1119 struct mmu_page_path {
1120 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1121 unsigned int idx[PT64_ROOT_LEVEL-1];
1124 #define for_each_sp(pvec, sp, parents, i) \
1125 for (i = mmu_pages_next(&pvec, &parents, -1), \
1126 sp = pvec.page[i].sp; \
1127 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1128 i = mmu_pages_next(&pvec, &parents, i))
1130 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1131 struct mmu_page_path *parents,
1136 for (n = i+1; n < pvec->nr; n++) {
1137 struct kvm_mmu_page *sp = pvec->page[n].sp;
1139 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1140 parents->idx[0] = pvec->page[n].idx;
1144 parents->parent[sp->role.level-2] = sp;
1145 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1151 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1153 struct kvm_mmu_page *sp;
1154 unsigned int level = 0;
1157 unsigned int idx = parents->idx[level];
1159 sp = parents->parent[level];
1163 --sp->unsync_children;
1164 WARN_ON((int)sp->unsync_children < 0);
1165 __clear_bit(idx, sp->unsync_child_bitmap);
1167 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1170 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1171 struct mmu_page_path *parents,
1172 struct kvm_mmu_pages *pvec)
1174 parents->parent[parent->role.level-1] = NULL;
1178 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1179 struct kvm_mmu_page *parent)
1182 struct kvm_mmu_page *sp;
1183 struct mmu_page_path parents;
1184 struct kvm_mmu_pages pages;
1186 kvm_mmu_pages_init(parent, &parents, &pages);
1187 while (mmu_unsync_walk(parent, &pages)) {
1190 for_each_sp(pages, sp, parents, i)
1191 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1194 kvm_flush_remote_tlbs(vcpu->kvm);
1196 for_each_sp(pages, sp, parents, i) {
1197 kvm_sync_page(vcpu, sp);
1198 mmu_pages_clear_parents(&parents);
1200 cond_resched_lock(&vcpu->kvm->mmu_lock);
1201 kvm_mmu_pages_init(parent, &parents, &pages);
1205 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1213 union kvm_mmu_page_role role;
1216 struct hlist_head *bucket;
1217 struct kvm_mmu_page *sp;
1218 struct hlist_node *node, *tmp;
1220 role = vcpu->arch.mmu.base_role;
1222 role.direct = direct;
1223 role.access = access;
1224 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1225 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1226 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1227 role.quadrant = quadrant;
1229 pgprintk("%s: looking gfn %lx role %x\n", __func__,
1231 index = kvm_page_table_hashfn(gfn);
1232 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1233 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1234 if (sp->gfn == gfn) {
1236 if (kvm_sync_page(vcpu, sp))
1239 if (sp->role.word != role.word)
1242 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1243 if (sp->unsync_children) {
1244 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1245 kvm_mmu_mark_parents_unsync(vcpu, sp);
1247 pgprintk("%s: found\n", __func__);
1250 ++vcpu->kvm->stat.mmu_cache_miss;
1251 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1254 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
1258 hlist_add_head(&sp->hash_link, bucket);
1260 if (rmap_write_protect(vcpu->kvm, gfn))
1261 kvm_flush_remote_tlbs(vcpu->kvm);
1262 account_shadowed(vcpu->kvm, gfn);
1264 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1265 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1267 nonpaging_prefetch_page(vcpu, sp);
1271 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1272 struct kvm_vcpu *vcpu, u64 addr)
1274 iterator->addr = addr;
1275 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1276 iterator->level = vcpu->arch.mmu.shadow_root_level;
1277 if (iterator->level == PT32E_ROOT_LEVEL) {
1278 iterator->shadow_addr
1279 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1280 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1282 if (!iterator->shadow_addr)
1283 iterator->level = 0;
1287 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1289 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1291 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1292 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1296 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1298 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1302 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1303 struct kvm_mmu_page *sp)
1311 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1312 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1313 if (is_shadow_present_pte(pt[i]))
1314 rmap_remove(kvm, &pt[i]);
1315 pt[i] = shadow_trap_nonpresent_pte;
1320 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1323 if (is_shadow_present_pte(ent)) {
1324 if (!is_large_pte(ent)) {
1325 ent &= PT64_BASE_ADDR_MASK;
1326 mmu_page_remove_parent_pte(page_header(ent),
1330 rmap_remove(kvm, &pt[i]);
1333 pt[i] = shadow_trap_nonpresent_pte;
1337 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1339 mmu_page_remove_parent_pte(sp, parent_pte);
1342 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1346 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1348 kvm->vcpus[i]->arch.last_pte_updated = NULL;
1351 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1355 while (sp->multimapped || sp->parent_pte) {
1356 if (!sp->multimapped)
1357 parent_pte = sp->parent_pte;
1359 struct kvm_pte_chain *chain;
1361 chain = container_of(sp->parent_ptes.first,
1362 struct kvm_pte_chain, link);
1363 parent_pte = chain->parent_ptes[0];
1365 BUG_ON(!parent_pte);
1366 kvm_mmu_put_page(sp, parent_pte);
1367 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
1371 static int mmu_zap_unsync_children(struct kvm *kvm,
1372 struct kvm_mmu_page *parent)
1375 struct mmu_page_path parents;
1376 struct kvm_mmu_pages pages;
1378 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1381 kvm_mmu_pages_init(parent, &parents, &pages);
1382 while (mmu_unsync_walk(parent, &pages)) {
1383 struct kvm_mmu_page *sp;
1385 for_each_sp(pages, sp, parents, i) {
1386 kvm_mmu_zap_page(kvm, sp);
1387 mmu_pages_clear_parents(&parents);
1390 kvm_mmu_pages_init(parent, &parents, &pages);
1396 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1399 ++kvm->stat.mmu_shadow_zapped;
1400 ret = mmu_zap_unsync_children(kvm, sp);
1401 kvm_mmu_page_unlink_children(kvm, sp);
1402 kvm_mmu_unlink_parents(kvm, sp);
1403 kvm_flush_remote_tlbs(kvm);
1404 if (!sp->role.invalid && !sp->role.direct)
1405 unaccount_shadowed(kvm, sp->gfn);
1407 kvm_unlink_unsync_page(kvm, sp);
1408 if (!sp->root_count) {
1409 hlist_del(&sp->hash_link);
1410 kvm_mmu_free_page(kvm, sp);
1412 sp->role.invalid = 1;
1413 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1414 kvm_reload_remote_mmus(kvm);
1416 kvm_mmu_reset_last_pte_updated(kvm);
1421 * Changing the number of mmu pages allocated to the vm
1422 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1424 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1427 * If we set the number of mmu pages to be smaller be than the
1428 * number of actived pages , we must to free some mmu pages before we
1432 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
1434 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1435 - kvm->arch.n_free_mmu_pages;
1437 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1438 struct kvm_mmu_page *page;
1440 page = container_of(kvm->arch.active_mmu_pages.prev,
1441 struct kvm_mmu_page, link);
1442 kvm_mmu_zap_page(kvm, page);
1445 kvm->arch.n_free_mmu_pages = 0;
1448 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1449 - kvm->arch.n_alloc_mmu_pages;
1451 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1454 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1457 struct hlist_head *bucket;
1458 struct kvm_mmu_page *sp;
1459 struct hlist_node *node, *n;
1462 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1464 index = kvm_page_table_hashfn(gfn);
1465 bucket = &kvm->arch.mmu_page_hash[index];
1466 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1467 if (sp->gfn == gfn && !sp->role.direct) {
1468 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1471 if (kvm_mmu_zap_page(kvm, sp))
1477 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1480 struct hlist_head *bucket;
1481 struct kvm_mmu_page *sp;
1482 struct hlist_node *node, *nn;
1484 index = kvm_page_table_hashfn(gfn);
1485 bucket = &kvm->arch.mmu_page_hash[index];
1486 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1487 if (sp->gfn == gfn && !sp->role.direct
1488 && !sp->role.invalid) {
1489 pgprintk("%s: zap %lx %x\n",
1490 __func__, gfn, sp->role.word);
1491 kvm_mmu_zap_page(kvm, sp);
1496 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1498 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1499 struct kvm_mmu_page *sp = page_header(__pa(pte));
1501 __set_bit(slot, sp->slot_bitmap);
1504 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1509 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1512 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1513 if (pt[i] == shadow_notrap_nonpresent_pte)
1514 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1518 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1522 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1524 if (gpa == UNMAPPED_GVA)
1527 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1533 * The function is based on mtrr_type_lookup() in
1534 * arch/x86/kernel/cpu/mtrr/generic.c
1536 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1541 u8 prev_match, curr_match;
1542 int num_var_ranges = KVM_NR_VAR_MTRR;
1544 if (!mtrr_state->enabled)
1547 /* Make end inclusive end, instead of exclusive */
1550 /* Look in fixed ranges. Just return the type as per start */
1551 if (mtrr_state->have_fixed && (start < 0x100000)) {
1554 if (start < 0x80000) {
1556 idx += (start >> 16);
1557 return mtrr_state->fixed_ranges[idx];
1558 } else if (start < 0xC0000) {
1560 idx += ((start - 0x80000) >> 14);
1561 return mtrr_state->fixed_ranges[idx];
1562 } else if (start < 0x1000000) {
1564 idx += ((start - 0xC0000) >> 12);
1565 return mtrr_state->fixed_ranges[idx];
1570 * Look in variable ranges
1571 * Look of multiple ranges matching this address and pick type
1572 * as per MTRR precedence
1574 if (!(mtrr_state->enabled & 2))
1575 return mtrr_state->def_type;
1578 for (i = 0; i < num_var_ranges; ++i) {
1579 unsigned short start_state, end_state;
1581 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1584 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1585 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1586 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1587 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1589 start_state = ((start & mask) == (base & mask));
1590 end_state = ((end & mask) == (base & mask));
1591 if (start_state != end_state)
1594 if ((start & mask) != (base & mask))
1597 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1598 if (prev_match == 0xFF) {
1599 prev_match = curr_match;
1603 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1604 curr_match == MTRR_TYPE_UNCACHABLE)
1605 return MTRR_TYPE_UNCACHABLE;
1607 if ((prev_match == MTRR_TYPE_WRBACK &&
1608 curr_match == MTRR_TYPE_WRTHROUGH) ||
1609 (prev_match == MTRR_TYPE_WRTHROUGH &&
1610 curr_match == MTRR_TYPE_WRBACK)) {
1611 prev_match = MTRR_TYPE_WRTHROUGH;
1612 curr_match = MTRR_TYPE_WRTHROUGH;
1615 if (prev_match != curr_match)
1616 return MTRR_TYPE_UNCACHABLE;
1619 if (prev_match != 0xFF)
1622 return mtrr_state->def_type;
1625 static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1629 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1630 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1631 if (mtrr == 0xfe || mtrr == 0xff)
1632 mtrr = MTRR_TYPE_WRBACK;
1636 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1639 struct hlist_head *bucket;
1640 struct kvm_mmu_page *s;
1641 struct hlist_node *node, *n;
1643 index = kvm_page_table_hashfn(sp->gfn);
1644 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1645 /* don't unsync if pagetable is shadowed with multiple roles */
1646 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1647 if (s->gfn != sp->gfn || s->role.direct)
1649 if (s->role.word != sp->role.word)
1652 ++vcpu->kvm->stat.mmu_unsync;
1656 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1657 ++vcpu->kvm->stat.mmu_unsync_global;
1659 kvm_mmu_mark_parents_unsync(vcpu, sp);
1661 mmu_convert_notrap(sp);
1665 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1668 struct kvm_mmu_page *shadow;
1670 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1672 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1676 if (can_unsync && oos_shadow)
1677 return kvm_unsync_page(vcpu, shadow);
1683 static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1684 unsigned pte_access, int user_fault,
1685 int write_fault, int dirty, int largepage,
1686 int global, gfn_t gfn, pfn_t pfn, bool speculative,
1691 u64 mt_mask = shadow_mt_mask;
1692 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1694 if (!global && sp->global) {
1697 kvm_unlink_unsync_global(vcpu->kvm, sp);
1698 kvm_mmu_mark_parents_unsync(vcpu, sp);
1703 * We don't set the accessed bit, since we sometimes want to see
1704 * whether the guest actually used the pte (in order to detect
1707 spte = shadow_base_present_pte | shadow_dirty_mask;
1709 spte |= shadow_accessed_mask;
1711 pte_access &= ~ACC_WRITE_MASK;
1712 if (pte_access & ACC_EXEC_MASK)
1713 spte |= shadow_x_mask;
1715 spte |= shadow_nx_mask;
1716 if (pte_access & ACC_USER_MASK)
1717 spte |= shadow_user_mask;
1719 spte |= PT_PAGE_SIZE_MASK;
1721 if (!kvm_is_mmio_pfn(pfn)) {
1722 mt_mask = get_memory_type(vcpu, gfn) <<
1723 kvm_x86_ops->get_mt_mask_shift();
1724 mt_mask |= VMX_EPT_IGMT_BIT;
1726 mt_mask = MTRR_TYPE_UNCACHABLE <<
1727 kvm_x86_ops->get_mt_mask_shift();
1731 spte |= (u64)pfn << PAGE_SHIFT;
1733 if ((pte_access & ACC_WRITE_MASK)
1734 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1736 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1738 spte = shadow_trap_nonpresent_pte;
1742 spte |= PT_WRITABLE_MASK;
1745 * Optimization: for pte sync, if spte was writable the hash
1746 * lookup is unnecessary (and expensive). Write protection
1747 * is responsibility of mmu_get_page / kvm_sync_page.
1748 * Same reasoning can be applied to dirty page accounting.
1750 if (!can_unsync && is_writeble_pte(*shadow_pte))
1753 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1754 pgprintk("%s: found shadow page for %lx, marking ro\n",
1757 pte_access &= ~ACC_WRITE_MASK;
1758 if (is_writeble_pte(spte))
1759 spte &= ~PT_WRITABLE_MASK;
1763 if (pte_access & ACC_WRITE_MASK)
1764 mark_page_dirty(vcpu->kvm, gfn);
1767 set_shadow_pte(shadow_pte, spte);
1771 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1772 unsigned pt_access, unsigned pte_access,
1773 int user_fault, int write_fault, int dirty,
1774 int *ptwrite, int largepage, int global,
1775 gfn_t gfn, pfn_t pfn, bool speculative)
1777 int was_rmapped = 0;
1778 int was_writeble = is_writeble_pte(*shadow_pte);
1780 pgprintk("%s: spte %llx access %x write_fault %d"
1781 " user_fault %d gfn %lx\n",
1782 __func__, *shadow_pte, pt_access,
1783 write_fault, user_fault, gfn);
1785 if (is_rmap_pte(*shadow_pte)) {
1787 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1788 * the parent of the now unreachable PTE.
1790 if (largepage && !is_large_pte(*shadow_pte)) {
1791 struct kvm_mmu_page *child;
1792 u64 pte = *shadow_pte;
1794 child = page_header(pte & PT64_BASE_ADDR_MASK);
1795 mmu_page_remove_parent_pte(child, shadow_pte);
1796 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1797 pgprintk("hfn old %lx new %lx\n",
1798 spte_to_pfn(*shadow_pte), pfn);
1799 rmap_remove(vcpu->kvm, shadow_pte);
1803 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
1804 dirty, largepage, global, gfn, pfn, speculative, true)) {
1807 kvm_x86_ops->tlb_flush(vcpu);
1810 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1811 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1812 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1813 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1814 *shadow_pte, shadow_pte);
1815 if (!was_rmapped && is_large_pte(*shadow_pte))
1816 ++vcpu->kvm->stat.lpages;
1818 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1820 rmap_add(vcpu, shadow_pte, gfn, largepage);
1821 if (!is_rmap_pte(*shadow_pte))
1822 kvm_release_pfn_clean(pfn);
1825 kvm_release_pfn_dirty(pfn);
1827 kvm_release_pfn_clean(pfn);
1830 vcpu->arch.last_pte_updated = shadow_pte;
1831 vcpu->arch.last_pte_gfn = gfn;
1835 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1839 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1840 int largepage, gfn_t gfn, pfn_t pfn)
1842 struct kvm_shadow_walk_iterator iterator;
1843 struct kvm_mmu_page *sp;
1847 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1848 if (iterator.level == PT_PAGE_TABLE_LEVEL
1849 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1850 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1851 0, write, 1, &pt_write,
1852 largepage, 0, gfn, pfn, false);
1853 ++vcpu->stat.pf_fixed;
1857 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1858 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1859 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1861 1, ACC_ALL, iterator.sptep);
1863 pgprintk("nonpaging_map: ENOMEM\n");
1864 kvm_release_pfn_clean(pfn);
1868 set_shadow_pte(iterator.sptep,
1870 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1871 | shadow_user_mask | shadow_x_mask);
1877 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1882 unsigned long mmu_seq;
1884 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1885 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1889 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1891 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1894 if (is_error_pfn(pfn)) {
1895 kvm_release_pfn_clean(pfn);
1899 spin_lock(&vcpu->kvm->mmu_lock);
1900 if (mmu_notifier_retry(vcpu, mmu_seq))
1902 kvm_mmu_free_some_pages(vcpu);
1903 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1904 spin_unlock(&vcpu->kvm->mmu_lock);
1910 spin_unlock(&vcpu->kvm->mmu_lock);
1911 kvm_release_pfn_clean(pfn);
1916 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1919 struct kvm_mmu_page *sp;
1921 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1923 spin_lock(&vcpu->kvm->mmu_lock);
1924 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1925 hpa_t root = vcpu->arch.mmu.root_hpa;
1927 sp = page_header(root);
1929 if (!sp->root_count && sp->role.invalid)
1930 kvm_mmu_zap_page(vcpu->kvm, sp);
1931 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1932 spin_unlock(&vcpu->kvm->mmu_lock);
1935 for (i = 0; i < 4; ++i) {
1936 hpa_t root = vcpu->arch.mmu.pae_root[i];
1939 root &= PT64_BASE_ADDR_MASK;
1940 sp = page_header(root);
1942 if (!sp->root_count && sp->role.invalid)
1943 kvm_mmu_zap_page(vcpu->kvm, sp);
1945 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1947 spin_unlock(&vcpu->kvm->mmu_lock);
1948 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1951 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1955 struct kvm_mmu_page *sp;
1958 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1960 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1961 hpa_t root = vcpu->arch.mmu.root_hpa;
1963 ASSERT(!VALID_PAGE(root));
1966 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1967 PT64_ROOT_LEVEL, direct,
1969 root = __pa(sp->spt);
1971 vcpu->arch.mmu.root_hpa = root;
1974 direct = !is_paging(vcpu);
1977 for (i = 0; i < 4; ++i) {
1978 hpa_t root = vcpu->arch.mmu.pae_root[i];
1980 ASSERT(!VALID_PAGE(root));
1981 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1982 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1983 vcpu->arch.mmu.pae_root[i] = 0;
1986 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1987 } else if (vcpu->arch.mmu.root_level == 0)
1989 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1990 PT32_ROOT_LEVEL, direct,
1992 root = __pa(sp->spt);
1994 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1996 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1999 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2002 struct kvm_mmu_page *sp;
2004 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2006 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2007 hpa_t root = vcpu->arch.mmu.root_hpa;
2008 sp = page_header(root);
2009 mmu_sync_children(vcpu, sp);
2012 for (i = 0; i < 4; ++i) {
2013 hpa_t root = vcpu->arch.mmu.pae_root[i];
2016 root &= PT64_BASE_ADDR_MASK;
2017 sp = page_header(root);
2018 mmu_sync_children(vcpu, sp);
2023 static void mmu_sync_global(struct kvm_vcpu *vcpu)
2025 struct kvm *kvm = vcpu->kvm;
2026 struct kvm_mmu_page *sp, *n;
2028 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2029 kvm_sync_page(vcpu, sp);
2032 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2034 spin_lock(&vcpu->kvm->mmu_lock);
2035 mmu_sync_roots(vcpu);
2036 spin_unlock(&vcpu->kvm->mmu_lock);
2039 void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2041 spin_lock(&vcpu->kvm->mmu_lock);
2042 mmu_sync_global(vcpu);
2043 spin_unlock(&vcpu->kvm->mmu_lock);
2046 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2051 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2057 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2058 r = mmu_topup_memory_caches(vcpu);
2063 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2065 gfn = gva >> PAGE_SHIFT;
2067 return nonpaging_map(vcpu, gva & PAGE_MASK,
2068 error_code & PFERR_WRITE_MASK, gfn);
2071 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2077 gfn_t gfn = gpa >> PAGE_SHIFT;
2078 unsigned long mmu_seq;
2081 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2083 r = mmu_topup_memory_caches(vcpu);
2087 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2088 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2091 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2093 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2094 if (is_error_pfn(pfn)) {
2095 kvm_release_pfn_clean(pfn);
2098 spin_lock(&vcpu->kvm->mmu_lock);
2099 if (mmu_notifier_retry(vcpu, mmu_seq))
2101 kvm_mmu_free_some_pages(vcpu);
2102 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2103 largepage, gfn, pfn);
2104 spin_unlock(&vcpu->kvm->mmu_lock);
2109 spin_unlock(&vcpu->kvm->mmu_lock);
2110 kvm_release_pfn_clean(pfn);
2114 static void nonpaging_free(struct kvm_vcpu *vcpu)
2116 mmu_free_roots(vcpu);
2119 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2121 struct kvm_mmu *context = &vcpu->arch.mmu;
2123 context->new_cr3 = nonpaging_new_cr3;
2124 context->page_fault = nonpaging_page_fault;
2125 context->gva_to_gpa = nonpaging_gva_to_gpa;
2126 context->free = nonpaging_free;
2127 context->prefetch_page = nonpaging_prefetch_page;
2128 context->sync_page = nonpaging_sync_page;
2129 context->invlpg = nonpaging_invlpg;
2130 context->root_level = 0;
2131 context->shadow_root_level = PT32E_ROOT_LEVEL;
2132 context->root_hpa = INVALID_PAGE;
2136 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2138 ++vcpu->stat.tlb_flush;
2139 kvm_x86_ops->tlb_flush(vcpu);
2142 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2144 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2145 mmu_free_roots(vcpu);
2148 static void inject_page_fault(struct kvm_vcpu *vcpu,
2152 kvm_inject_page_fault(vcpu, addr, err_code);
2155 static void paging_free(struct kvm_vcpu *vcpu)
2157 nonpaging_free(vcpu);
2160 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2164 bit7 = (gpte >> 7) & 1;
2165 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2169 #include "paging_tmpl.h"
2173 #include "paging_tmpl.h"
2176 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2178 struct kvm_mmu *context = &vcpu->arch.mmu;
2179 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2180 u64 exb_bit_rsvd = 0;
2183 exb_bit_rsvd = rsvd_bits(63, 63);
2185 case PT32_ROOT_LEVEL:
2186 /* no rsvd bits for 2 level 4K page table entries */
2187 context->rsvd_bits_mask[0][1] = 0;
2188 context->rsvd_bits_mask[0][0] = 0;
2189 if (is_cpuid_PSE36())
2190 /* 36bits PSE 4MB page */
2191 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2193 /* 32 bits PSE 4MB page */
2194 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2195 context->rsvd_bits_mask[1][0] = ~0ull;
2197 case PT32E_ROOT_LEVEL:
2198 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2199 rsvd_bits(maxphyaddr, 62); /* PDE */
2200 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2201 rsvd_bits(maxphyaddr, 62); /* PTE */
2202 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2203 rsvd_bits(maxphyaddr, 62) |
2204 rsvd_bits(13, 20); /* large page */
2205 context->rsvd_bits_mask[1][0] = ~0ull;
2207 case PT64_ROOT_LEVEL:
2208 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2209 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2210 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2211 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2212 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2213 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2214 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2215 rsvd_bits(maxphyaddr, 51);
2216 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2217 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2218 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2219 rsvd_bits(maxphyaddr, 51) | rsvd_bits(13, 20);
2220 context->rsvd_bits_mask[1][0] = ~0ull;
2225 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2227 struct kvm_mmu *context = &vcpu->arch.mmu;
2229 ASSERT(is_pae(vcpu));
2230 context->new_cr3 = paging_new_cr3;
2231 context->page_fault = paging64_page_fault;
2232 context->gva_to_gpa = paging64_gva_to_gpa;
2233 context->prefetch_page = paging64_prefetch_page;
2234 context->sync_page = paging64_sync_page;
2235 context->invlpg = paging64_invlpg;
2236 context->free = paging_free;
2237 context->root_level = level;
2238 context->shadow_root_level = level;
2239 context->root_hpa = INVALID_PAGE;
2243 static int paging64_init_context(struct kvm_vcpu *vcpu)
2245 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2246 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2249 static int paging32_init_context(struct kvm_vcpu *vcpu)
2251 struct kvm_mmu *context = &vcpu->arch.mmu;
2253 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2254 context->new_cr3 = paging_new_cr3;
2255 context->page_fault = paging32_page_fault;
2256 context->gva_to_gpa = paging32_gva_to_gpa;
2257 context->free = paging_free;
2258 context->prefetch_page = paging32_prefetch_page;
2259 context->sync_page = paging32_sync_page;
2260 context->invlpg = paging32_invlpg;
2261 context->root_level = PT32_ROOT_LEVEL;
2262 context->shadow_root_level = PT32E_ROOT_LEVEL;
2263 context->root_hpa = INVALID_PAGE;
2267 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2269 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2270 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2273 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2275 struct kvm_mmu *context = &vcpu->arch.mmu;
2277 context->new_cr3 = nonpaging_new_cr3;
2278 context->page_fault = tdp_page_fault;
2279 context->free = nonpaging_free;
2280 context->prefetch_page = nonpaging_prefetch_page;
2281 context->sync_page = nonpaging_sync_page;
2282 context->invlpg = nonpaging_invlpg;
2283 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2284 context->root_hpa = INVALID_PAGE;
2286 if (!is_paging(vcpu)) {
2287 context->gva_to_gpa = nonpaging_gva_to_gpa;
2288 context->root_level = 0;
2289 } else if (is_long_mode(vcpu)) {
2290 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2291 context->gva_to_gpa = paging64_gva_to_gpa;
2292 context->root_level = PT64_ROOT_LEVEL;
2293 } else if (is_pae(vcpu)) {
2294 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2295 context->gva_to_gpa = paging64_gva_to_gpa;
2296 context->root_level = PT32E_ROOT_LEVEL;
2298 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2299 context->gva_to_gpa = paging32_gva_to_gpa;
2300 context->root_level = PT32_ROOT_LEVEL;
2306 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2311 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2313 if (!is_paging(vcpu))
2314 r = nonpaging_init_context(vcpu);
2315 else if (is_long_mode(vcpu))
2316 r = paging64_init_context(vcpu);
2317 else if (is_pae(vcpu))
2318 r = paging32E_init_context(vcpu);
2320 r = paging32_init_context(vcpu);
2322 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2327 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2329 vcpu->arch.update_pte.pfn = bad_pfn;
2332 return init_kvm_tdp_mmu(vcpu);
2334 return init_kvm_softmmu(vcpu);
2337 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2340 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2341 vcpu->arch.mmu.free(vcpu);
2342 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2346 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2348 destroy_kvm_mmu(vcpu);
2349 return init_kvm_mmu(vcpu);
2351 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2353 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2357 r = mmu_topup_memory_caches(vcpu);
2360 spin_lock(&vcpu->kvm->mmu_lock);
2361 kvm_mmu_free_some_pages(vcpu);
2362 mmu_alloc_roots(vcpu);
2363 mmu_sync_roots(vcpu);
2364 spin_unlock(&vcpu->kvm->mmu_lock);
2365 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2366 kvm_mmu_flush_tlb(vcpu);
2370 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2372 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2374 mmu_free_roots(vcpu);
2377 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2378 struct kvm_mmu_page *sp,
2382 struct kvm_mmu_page *child;
2385 if (is_shadow_present_pte(pte)) {
2386 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2388 rmap_remove(vcpu->kvm, spte);
2390 child = page_header(pte & PT64_BASE_ADDR_MASK);
2391 mmu_page_remove_parent_pte(child, spte);
2394 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
2395 if (is_large_pte(pte))
2396 --vcpu->kvm->stat.lpages;
2399 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2400 struct kvm_mmu_page *sp,
2404 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2405 if (!vcpu->arch.update_pte.largepage ||
2406 sp->role.glevels == PT32_ROOT_LEVEL) {
2407 ++vcpu->kvm->stat.mmu_pde_zapped;
2412 ++vcpu->kvm->stat.mmu_pte_updated;
2413 if (sp->role.glevels == PT32_ROOT_LEVEL)
2414 paging32_update_pte(vcpu, sp, spte, new);
2416 paging64_update_pte(vcpu, sp, spte, new);
2419 static bool need_remote_flush(u64 old, u64 new)
2421 if (!is_shadow_present_pte(old))
2423 if (!is_shadow_present_pte(new))
2425 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2427 old ^= PT64_NX_MASK;
2428 new ^= PT64_NX_MASK;
2429 return (old & ~new & PT64_PERM_MASK) != 0;
2432 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2434 if (need_remote_flush(old, new))
2435 kvm_flush_remote_tlbs(vcpu->kvm);
2437 kvm_mmu_flush_tlb(vcpu);
2440 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2442 u64 *spte = vcpu->arch.last_pte_updated;
2444 return !!(spte && (*spte & shadow_accessed_mask));
2447 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2448 const u8 *new, int bytes)
2455 vcpu->arch.update_pte.largepage = 0;
2457 if (bytes != 4 && bytes != 8)
2461 * Assume that the pte write on a page table of the same type
2462 * as the current vcpu paging mode. This is nearly always true
2463 * (might be false while changing modes). Note it is verified later
2467 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2468 if ((bytes == 4) && (gpa % 4 == 0)) {
2469 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2472 memcpy((void *)&gpte + (gpa % 8), new, 4);
2473 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2474 memcpy((void *)&gpte, new, 8);
2477 if ((bytes == 4) && (gpa % 4 == 0))
2478 memcpy((void *)&gpte, new, 4);
2480 if (!is_present_pte(gpte))
2482 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2484 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2485 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2486 vcpu->arch.update_pte.largepage = 1;
2488 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2490 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2492 if (is_error_pfn(pfn)) {
2493 kvm_release_pfn_clean(pfn);
2496 vcpu->arch.update_pte.gfn = gfn;
2497 vcpu->arch.update_pte.pfn = pfn;
2500 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2502 u64 *spte = vcpu->arch.last_pte_updated;
2505 && vcpu->arch.last_pte_gfn == gfn
2506 && shadow_accessed_mask
2507 && !(*spte & shadow_accessed_mask)
2508 && is_shadow_present_pte(*spte))
2509 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2512 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2513 const u8 *new, int bytes,
2514 bool guest_initiated)
2516 gfn_t gfn = gpa >> PAGE_SHIFT;
2517 struct kvm_mmu_page *sp;
2518 struct hlist_node *node, *n;
2519 struct hlist_head *bucket;
2523 unsigned offset = offset_in_page(gpa);
2525 unsigned page_offset;
2526 unsigned misaligned;
2533 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2534 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2535 spin_lock(&vcpu->kvm->mmu_lock);
2536 kvm_mmu_access_page(vcpu, gfn);
2537 kvm_mmu_free_some_pages(vcpu);
2538 ++vcpu->kvm->stat.mmu_pte_write;
2539 kvm_mmu_audit(vcpu, "pre pte write");
2540 if (guest_initiated) {
2541 if (gfn == vcpu->arch.last_pt_write_gfn
2542 && !last_updated_pte_accessed(vcpu)) {
2543 ++vcpu->arch.last_pt_write_count;
2544 if (vcpu->arch.last_pt_write_count >= 3)
2547 vcpu->arch.last_pt_write_gfn = gfn;
2548 vcpu->arch.last_pt_write_count = 1;
2549 vcpu->arch.last_pte_updated = NULL;
2552 index = kvm_page_table_hashfn(gfn);
2553 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2554 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2555 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2557 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2558 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2559 misaligned |= bytes < 4;
2560 if (misaligned || flooded) {
2562 * Misaligned accesses are too much trouble to fix
2563 * up; also, they usually indicate a page is not used
2566 * If we're seeing too many writes to a page,
2567 * it may no longer be a page table, or we may be
2568 * forking, in which case it is better to unmap the
2571 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2572 gpa, bytes, sp->role.word);
2573 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2575 ++vcpu->kvm->stat.mmu_flooded;
2578 page_offset = offset;
2579 level = sp->role.level;
2581 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2582 page_offset <<= 1; /* 32->64 */
2584 * A 32-bit pde maps 4MB while the shadow pdes map
2585 * only 2MB. So we need to double the offset again
2586 * and zap two pdes instead of one.
2588 if (level == PT32_ROOT_LEVEL) {
2589 page_offset &= ~7; /* kill rounding error */
2593 quadrant = page_offset >> PAGE_SHIFT;
2594 page_offset &= ~PAGE_MASK;
2595 if (quadrant != sp->role.quadrant)
2598 spte = &sp->spt[page_offset / sizeof(*spte)];
2599 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2601 r = kvm_read_guest_atomic(vcpu->kvm,
2602 gpa & ~(u64)(pte_size - 1),
2604 new = (const void *)&gentry;
2610 mmu_pte_write_zap_pte(vcpu, sp, spte);
2612 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2613 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2617 kvm_mmu_audit(vcpu, "post pte write");
2618 spin_unlock(&vcpu->kvm->mmu_lock);
2619 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2620 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2621 vcpu->arch.update_pte.pfn = bad_pfn;
2625 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2630 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2632 spin_lock(&vcpu->kvm->mmu_lock);
2633 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2634 spin_unlock(&vcpu->kvm->mmu_lock);
2637 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2639 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2641 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2642 struct kvm_mmu_page *sp;
2644 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2645 struct kvm_mmu_page, link);
2646 kvm_mmu_zap_page(vcpu->kvm, sp);
2647 ++vcpu->kvm->stat.mmu_recycled;
2651 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2654 enum emulation_result er;
2656 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2665 r = mmu_topup_memory_caches(vcpu);
2669 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2674 case EMULATE_DO_MMIO:
2675 ++vcpu->stat.mmio_exits;
2678 kvm_report_emulation_failure(vcpu, "pagetable");
2686 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2688 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2690 vcpu->arch.mmu.invlpg(vcpu, gva);
2691 kvm_mmu_flush_tlb(vcpu);
2692 ++vcpu->stat.invlpg;
2694 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2696 void kvm_enable_tdp(void)
2700 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2702 void kvm_disable_tdp(void)
2704 tdp_enabled = false;
2706 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2708 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2710 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2713 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2720 if (vcpu->kvm->arch.n_requested_mmu_pages)
2721 vcpu->kvm->arch.n_free_mmu_pages =
2722 vcpu->kvm->arch.n_requested_mmu_pages;
2724 vcpu->kvm->arch.n_free_mmu_pages =
2725 vcpu->kvm->arch.n_alloc_mmu_pages;
2727 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2728 * Therefore we need to allocate shadow page tables in the first
2729 * 4GB of memory, which happens to fit the DMA32 zone.
2731 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2734 vcpu->arch.mmu.pae_root = page_address(page);
2735 for (i = 0; i < 4; ++i)
2736 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2741 free_mmu_pages(vcpu);
2745 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2748 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2750 return alloc_mmu_pages(vcpu);
2753 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2756 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2758 return init_kvm_mmu(vcpu);
2761 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2765 destroy_kvm_mmu(vcpu);
2766 free_mmu_pages(vcpu);
2767 mmu_free_memory_caches(vcpu);
2770 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2772 struct kvm_mmu_page *sp;
2774 spin_lock(&kvm->mmu_lock);
2775 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2779 if (!test_bit(slot, sp->slot_bitmap))
2783 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2785 if (pt[i] & PT_WRITABLE_MASK)
2786 pt[i] &= ~PT_WRITABLE_MASK;
2788 kvm_flush_remote_tlbs(kvm);
2789 spin_unlock(&kvm->mmu_lock);
2792 void kvm_mmu_zap_all(struct kvm *kvm)
2794 struct kvm_mmu_page *sp, *node;
2796 spin_lock(&kvm->mmu_lock);
2797 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2798 if (kvm_mmu_zap_page(kvm, sp))
2799 node = container_of(kvm->arch.active_mmu_pages.next,
2800 struct kvm_mmu_page, link);
2801 spin_unlock(&kvm->mmu_lock);
2803 kvm_flush_remote_tlbs(kvm);
2806 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2808 struct kvm_mmu_page *page;
2810 page = container_of(kvm->arch.active_mmu_pages.prev,
2811 struct kvm_mmu_page, link);
2812 kvm_mmu_zap_page(kvm, page);
2815 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2818 struct kvm *kvm_freed = NULL;
2819 int cache_count = 0;
2821 spin_lock(&kvm_lock);
2823 list_for_each_entry(kvm, &vm_list, vm_list) {
2826 if (!down_read_trylock(&kvm->slots_lock))
2828 spin_lock(&kvm->mmu_lock);
2829 npages = kvm->arch.n_alloc_mmu_pages -
2830 kvm->arch.n_free_mmu_pages;
2831 cache_count += npages;
2832 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2833 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2839 spin_unlock(&kvm->mmu_lock);
2840 up_read(&kvm->slots_lock);
2843 list_move_tail(&kvm_freed->vm_list, &vm_list);
2845 spin_unlock(&kvm_lock);
2850 static struct shrinker mmu_shrinker = {
2851 .shrink = mmu_shrink,
2852 .seeks = DEFAULT_SEEKS * 10,
2855 static void mmu_destroy_caches(void)
2857 if (pte_chain_cache)
2858 kmem_cache_destroy(pte_chain_cache);
2859 if (rmap_desc_cache)
2860 kmem_cache_destroy(rmap_desc_cache);
2861 if (mmu_page_header_cache)
2862 kmem_cache_destroy(mmu_page_header_cache);
2865 void kvm_mmu_module_exit(void)
2867 mmu_destroy_caches();
2868 unregister_shrinker(&mmu_shrinker);
2871 int kvm_mmu_module_init(void)
2873 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2874 sizeof(struct kvm_pte_chain),
2876 if (!pte_chain_cache)
2878 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2879 sizeof(struct kvm_rmap_desc),
2881 if (!rmap_desc_cache)
2884 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2885 sizeof(struct kvm_mmu_page),
2887 if (!mmu_page_header_cache)
2890 register_shrinker(&mmu_shrinker);
2895 mmu_destroy_caches();
2900 * Caculate mmu pages needed for kvm.
2902 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2905 unsigned int nr_mmu_pages;
2906 unsigned int nr_pages = 0;
2908 for (i = 0; i < kvm->nmemslots; i++)
2909 nr_pages += kvm->memslots[i].npages;
2911 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2912 nr_mmu_pages = max(nr_mmu_pages,
2913 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2915 return nr_mmu_pages;
2918 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2921 if (len > buffer->len)
2926 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2931 ret = pv_mmu_peek_buffer(buffer, len);
2936 buffer->processed += len;
2940 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2941 gpa_t addr, gpa_t value)
2946 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2949 r = mmu_topup_memory_caches(vcpu);
2953 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2959 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2961 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2965 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2967 spin_lock(&vcpu->kvm->mmu_lock);
2968 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2969 spin_unlock(&vcpu->kvm->mmu_lock);
2973 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2974 struct kvm_pv_mmu_op_buffer *buffer)
2976 struct kvm_mmu_op_header *header;
2978 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2981 switch (header->op) {
2982 case KVM_MMU_OP_WRITE_PTE: {
2983 struct kvm_mmu_op_write_pte *wpte;
2985 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2988 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2991 case KVM_MMU_OP_FLUSH_TLB: {
2992 struct kvm_mmu_op_flush_tlb *ftlb;
2994 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2997 return kvm_pv_mmu_flush_tlb(vcpu);
2999 case KVM_MMU_OP_RELEASE_PT: {
3000 struct kvm_mmu_op_release_pt *rpt;
3002 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3005 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3011 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3012 gpa_t addr, unsigned long *ret)
3015 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3017 buffer->ptr = buffer->buf;
3018 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3019 buffer->processed = 0;
3021 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3025 while (buffer->len) {
3026 r = kvm_pv_mmu_op_one(vcpu, buffer);
3035 *ret = buffer->processed;
3041 static const char *audit_msg;
3043 static gva_t canonicalize(gva_t gva)
3045 #ifdef CONFIG_X86_64
3046 gva = (long long)(gva << 16) >> 16;
3051 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3052 gva_t va, int level)
3054 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3056 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3058 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3061 if (ent == shadow_trap_nonpresent_pte)
3064 va = canonicalize(va);
3066 if (ent == shadow_notrap_nonpresent_pte)
3067 printk(KERN_ERR "audit: (%s) nontrapping pte"
3068 " in nonleaf level: levels %d gva %lx"
3069 " level %d pte %llx\n", audit_msg,
3070 vcpu->arch.mmu.root_level, va, level, ent);
3072 audit_mappings_page(vcpu, ent, va, level - 1);
3074 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3075 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
3077 if (is_shadow_present_pte(ent)
3078 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3079 printk(KERN_ERR "xx audit error: (%s) levels %d"
3080 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3081 audit_msg, vcpu->arch.mmu.root_level,
3083 is_shadow_present_pte(ent));
3084 else if (ent == shadow_notrap_nonpresent_pte
3085 && !is_error_hpa(hpa))
3086 printk(KERN_ERR "audit: (%s) notrap shadow,"
3087 " valid guest gva %lx\n", audit_msg, va);
3088 kvm_release_pfn_clean(pfn);
3094 static void audit_mappings(struct kvm_vcpu *vcpu)
3098 if (vcpu->arch.mmu.root_level == 4)
3099 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3101 for (i = 0; i < 4; ++i)
3102 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3103 audit_mappings_page(vcpu,
3104 vcpu->arch.mmu.pae_root[i],
3109 static int count_rmaps(struct kvm_vcpu *vcpu)
3114 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3115 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3116 struct kvm_rmap_desc *d;
3118 for (j = 0; j < m->npages; ++j) {
3119 unsigned long *rmapp = &m->rmap[j];
3123 if (!(*rmapp & 1)) {
3127 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3129 for (k = 0; k < RMAP_EXT; ++k)
3130 if (d->shadow_ptes[k])
3141 static int count_writable_mappings(struct kvm_vcpu *vcpu)
3144 struct kvm_mmu_page *sp;
3147 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3150 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3153 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3156 if (!(ent & PT_PRESENT_MASK))
3158 if (!(ent & PT_WRITABLE_MASK))
3166 static void audit_rmap(struct kvm_vcpu *vcpu)
3168 int n_rmap = count_rmaps(vcpu);
3169 int n_actual = count_writable_mappings(vcpu);
3171 if (n_rmap != n_actual)
3172 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
3173 __func__, audit_msg, n_rmap, n_actual);
3176 static void audit_write_protection(struct kvm_vcpu *vcpu)
3178 struct kvm_mmu_page *sp;
3179 struct kvm_memory_slot *slot;
3180 unsigned long *rmapp;
3183 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3184 if (sp->role.direct)
3187 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3188 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3189 rmapp = &slot->rmap[gfn - slot->base_gfn];
3191 printk(KERN_ERR "%s: (%s) shadow page has writable"
3192 " mappings: gfn %lx role %x\n",
3193 __func__, audit_msg, sp->gfn,
3198 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3205 audit_write_protection(vcpu);
3206 audit_mappings(vcpu);