2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include "kvm_cache_regs.h"
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
37 #include <asm/cmpxchg.h>
42 * When setting this variable to true it enables Two-Dimensional-Paging
43 * where the hardware walks 2 page tables:
44 * 1. the guest-virtual to guest-physical
45 * 2. while doing 1. it walks guest-physical to host-physical
46 * If the hardware supports that we don't need to do shadow paging.
48 bool tdp_enabled = false;
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
67 #define pgprintk(x...) do { } while (0)
68 #define rmap_printk(x...) do { } while (0)
72 #if defined(MMU_DEBUG) || defined(AUDIT)
74 module_param(dbg, bool, 0644);
77 static int oos_shadow = 1;
78 module_param(oos_shadow, bool, 0644);
81 #define ASSERT(x) do { } while (0)
85 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
86 __FILE__, __LINE__, #x); \
90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
95 #define PT64_LEVEL_BITS 9
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107 #define PT32_LEVEL_BITS 10
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149 #include <trace/events/kvm.h>
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
163 struct kvm_shadow_walk_iterator {
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
177 struct kvm_unsync_walk {
178 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
181 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
183 static struct kmem_cache *pte_chain_cache;
184 static struct kmem_cache *rmap_desc_cache;
185 static struct kmem_cache *mmu_page_header_cache;
187 static u64 __read_mostly shadow_trap_nonpresent_pte;
188 static u64 __read_mostly shadow_notrap_nonpresent_pte;
189 static u64 __read_mostly shadow_base_present_pte;
190 static u64 __read_mostly shadow_nx_mask;
191 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
192 static u64 __read_mostly shadow_user_mask;
193 static u64 __read_mostly shadow_accessed_mask;
194 static u64 __read_mostly shadow_dirty_mask;
196 static inline u64 rsvd_bits(int s, int e)
198 return ((1ULL << (e - s + 1)) - 1) << s;
201 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
203 shadow_trap_nonpresent_pte = trap_pte;
204 shadow_notrap_nonpresent_pte = notrap_pte;
206 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
208 void kvm_mmu_set_base_ptes(u64 base_pte)
210 shadow_base_present_pte = base_pte;
212 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
214 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
215 u64 dirty_mask, u64 nx_mask, u64 x_mask)
217 shadow_user_mask = user_mask;
218 shadow_accessed_mask = accessed_mask;
219 shadow_dirty_mask = dirty_mask;
220 shadow_nx_mask = nx_mask;
221 shadow_x_mask = x_mask;
223 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
225 static int is_write_protection(struct kvm_vcpu *vcpu)
227 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
230 static int is_cpuid_PSE36(void)
235 static int is_nx(struct kvm_vcpu *vcpu)
237 return vcpu->arch.efer & EFER_NX;
240 static int is_shadow_present_pte(u64 pte)
242 return pte != shadow_trap_nonpresent_pte
243 && pte != shadow_notrap_nonpresent_pte;
246 static int is_large_pte(u64 pte)
248 return pte & PT_PAGE_SIZE_MASK;
251 static int is_writable_pte(unsigned long pte)
253 return pte & PT_WRITABLE_MASK;
256 static int is_dirty_gpte(unsigned long pte)
258 return pte & PT_DIRTY_MASK;
261 static int is_rmap_spte(u64 pte)
263 return is_shadow_present_pte(pte);
266 static int is_last_spte(u64 pte, int level)
268 if (level == PT_PAGE_TABLE_LEVEL)
270 if (is_large_pte(pte))
275 static pfn_t spte_to_pfn(u64 pte)
277 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
280 static gfn_t pse36_gfn_delta(u32 gpte)
282 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
284 return (gpte & PT32_DIR_PSE36_MASK) << shift;
287 static void __set_spte(u64 *sptep, u64 spte)
290 set_64bit((unsigned long *)sptep, spte);
292 set_64bit((unsigned long long *)sptep, spte);
296 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
297 struct kmem_cache *base_cache, int min)
301 if (cache->nobjs >= min)
303 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
304 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
307 cache->objects[cache->nobjs++] = obj;
312 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
315 kfree(mc->objects[--mc->nobjs]);
318 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
323 if (cache->nobjs >= min)
325 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
326 page = alloc_page(GFP_KERNEL);
329 cache->objects[cache->nobjs++] = page_address(page);
334 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
337 free_page((unsigned long)mc->objects[--mc->nobjs]);
340 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
344 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
352 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
355 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
356 mmu_page_header_cache, 4);
361 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
363 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
365 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
366 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
369 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
375 p = mc->objects[--mc->nobjs];
379 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
381 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
382 sizeof(struct kvm_pte_chain));
385 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
390 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
392 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
393 sizeof(struct kvm_rmap_desc));
396 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
402 * Return the pointer to the largepage write count for a given
403 * gfn, handling slots that are not large page aligned.
405 static int *slot_largepage_idx(gfn_t gfn,
406 struct kvm_memory_slot *slot,
411 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
412 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
413 return &slot->lpage_info[level - 2][idx].write_count;
416 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
418 struct kvm_memory_slot *slot;
422 gfn = unalias_gfn(kvm, gfn);
424 slot = gfn_to_memslot_unaliased(kvm, gfn);
425 for (i = PT_DIRECTORY_LEVEL;
426 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
427 write_count = slot_largepage_idx(gfn, slot, i);
432 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
434 struct kvm_memory_slot *slot;
438 gfn = unalias_gfn(kvm, gfn);
439 for (i = PT_DIRECTORY_LEVEL;
440 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
441 slot = gfn_to_memslot_unaliased(kvm, gfn);
442 write_count = slot_largepage_idx(gfn, slot, i);
444 WARN_ON(*write_count < 0);
448 static int has_wrprotected_page(struct kvm *kvm,
452 struct kvm_memory_slot *slot;
455 gfn = unalias_gfn(kvm, gfn);
456 slot = gfn_to_memslot_unaliased(kvm, gfn);
458 largepage_idx = slot_largepage_idx(gfn, slot, level);
459 return *largepage_idx;
465 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
467 unsigned long page_size;
470 page_size = kvm_host_page_size(kvm, gfn);
472 for (i = PT_PAGE_TABLE_LEVEL;
473 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
474 if (page_size >= KVM_HPAGE_SIZE(i))
483 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
485 struct kvm_memory_slot *slot;
486 int host_level, level, max_level;
488 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
489 if (slot && slot->dirty_bitmap)
490 return PT_PAGE_TABLE_LEVEL;
492 host_level = host_mapping_level(vcpu->kvm, large_gfn);
494 if (host_level == PT_PAGE_TABLE_LEVEL)
497 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
498 kvm_x86_ops->get_lpage_level() : host_level;
500 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
501 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
508 * Take gfn and return the reverse mapping to it.
509 * Note: gfn must be unaliased before this function get called
512 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
514 struct kvm_memory_slot *slot;
517 slot = gfn_to_memslot(kvm, gfn);
518 if (likely(level == PT_PAGE_TABLE_LEVEL))
519 return &slot->rmap[gfn - slot->base_gfn];
521 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
522 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
524 return &slot->lpage_info[level - 2][idx].rmap_pde;
528 * Reverse mapping data structures:
530 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
531 * that points to page_address(page).
533 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
534 * containing more mappings.
536 * Returns the number of rmap entries before the spte was added or zero if
537 * the spte was not added.
540 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
542 struct kvm_mmu_page *sp;
543 struct kvm_rmap_desc *desc;
544 unsigned long *rmapp;
547 if (!is_rmap_spte(*spte))
549 gfn = unalias_gfn(vcpu->kvm, gfn);
550 sp = page_header(__pa(spte));
551 sp->gfns[spte - sp->spt] = gfn;
552 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
554 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
555 *rmapp = (unsigned long)spte;
556 } else if (!(*rmapp & 1)) {
557 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
558 desc = mmu_alloc_rmap_desc(vcpu);
559 desc->sptes[0] = (u64 *)*rmapp;
560 desc->sptes[1] = spte;
561 *rmapp = (unsigned long)desc | 1;
563 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
564 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
565 while (desc->sptes[RMAP_EXT-1] && desc->more) {
569 if (desc->sptes[RMAP_EXT-1]) {
570 desc->more = mmu_alloc_rmap_desc(vcpu);
573 for (i = 0; desc->sptes[i]; ++i)
575 desc->sptes[i] = spte;
580 static void rmap_desc_remove_entry(unsigned long *rmapp,
581 struct kvm_rmap_desc *desc,
583 struct kvm_rmap_desc *prev_desc)
587 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
589 desc->sptes[i] = desc->sptes[j];
590 desc->sptes[j] = NULL;
593 if (!prev_desc && !desc->more)
594 *rmapp = (unsigned long)desc->sptes[0];
597 prev_desc->more = desc->more;
599 *rmapp = (unsigned long)desc->more | 1;
600 mmu_free_rmap_desc(desc);
603 static void rmap_remove(struct kvm *kvm, u64 *spte)
605 struct kvm_rmap_desc *desc;
606 struct kvm_rmap_desc *prev_desc;
607 struct kvm_mmu_page *sp;
609 unsigned long *rmapp;
612 if (!is_rmap_spte(*spte))
614 sp = page_header(__pa(spte));
615 pfn = spte_to_pfn(*spte);
616 if (*spte & shadow_accessed_mask)
617 kvm_set_pfn_accessed(pfn);
618 if (is_writable_pte(*spte))
619 kvm_set_pfn_dirty(pfn);
620 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
622 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
624 } else if (!(*rmapp & 1)) {
625 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
626 if ((u64 *)*rmapp != spte) {
627 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
633 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
634 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
637 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
638 if (desc->sptes[i] == spte) {
639 rmap_desc_remove_entry(rmapp,
647 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
652 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
654 struct kvm_rmap_desc *desc;
655 struct kvm_rmap_desc *prev_desc;
661 else if (!(*rmapp & 1)) {
663 return (u64 *)*rmapp;
666 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
670 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
671 if (prev_spte == spte)
672 return desc->sptes[i];
673 prev_spte = desc->sptes[i];
680 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
682 unsigned long *rmapp;
684 int i, write_protected = 0;
686 gfn = unalias_gfn(kvm, gfn);
687 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
689 spte = rmap_next(kvm, rmapp, NULL);
692 BUG_ON(!(*spte & PT_PRESENT_MASK));
693 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
694 if (is_writable_pte(*spte)) {
695 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
698 spte = rmap_next(kvm, rmapp, spte);
700 if (write_protected) {
703 spte = rmap_next(kvm, rmapp, NULL);
704 pfn = spte_to_pfn(*spte);
705 kvm_set_pfn_dirty(pfn);
708 /* check for huge page mappings */
709 for (i = PT_DIRECTORY_LEVEL;
710 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
711 rmapp = gfn_to_rmap(kvm, gfn, i);
712 spte = rmap_next(kvm, rmapp, NULL);
715 BUG_ON(!(*spte & PT_PRESENT_MASK));
716 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
717 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
718 if (is_writable_pte(*spte)) {
719 rmap_remove(kvm, spte);
721 __set_spte(spte, shadow_trap_nonpresent_pte);
725 spte = rmap_next(kvm, rmapp, spte);
729 return write_protected;
732 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
736 int need_tlb_flush = 0;
738 while ((spte = rmap_next(kvm, rmapp, NULL))) {
739 BUG_ON(!(*spte & PT_PRESENT_MASK));
740 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
741 rmap_remove(kvm, spte);
742 __set_spte(spte, shadow_trap_nonpresent_pte);
745 return need_tlb_flush;
748 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
753 pte_t *ptep = (pte_t *)data;
756 WARN_ON(pte_huge(*ptep));
757 new_pfn = pte_pfn(*ptep);
758 spte = rmap_next(kvm, rmapp, NULL);
760 BUG_ON(!is_shadow_present_pte(*spte));
761 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
763 if (pte_write(*ptep)) {
764 rmap_remove(kvm, spte);
765 __set_spte(spte, shadow_trap_nonpresent_pte);
766 spte = rmap_next(kvm, rmapp, NULL);
768 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
769 new_spte |= (u64)new_pfn << PAGE_SHIFT;
771 new_spte &= ~PT_WRITABLE_MASK;
772 new_spte &= ~SPTE_HOST_WRITEABLE;
773 if (is_writable_pte(*spte))
774 kvm_set_pfn_dirty(spte_to_pfn(*spte));
775 __set_spte(spte, new_spte);
776 spte = rmap_next(kvm, rmapp, spte);
780 kvm_flush_remote_tlbs(kvm);
785 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
787 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
793 struct kvm_memslots *slots;
795 slots = rcu_dereference(kvm->memslots);
797 for (i = 0; i < slots->nmemslots; i++) {
798 struct kvm_memory_slot *memslot = &slots->memslots[i];
799 unsigned long start = memslot->userspace_addr;
802 end = start + (memslot->npages << PAGE_SHIFT);
803 if (hva >= start && hva < end) {
804 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
806 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
808 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
809 int idx = gfn_offset;
810 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
812 &memslot->lpage_info[j][idx].rmap_pde,
815 trace_kvm_age_page(hva, memslot, ret);
823 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
825 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
828 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
830 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
833 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
840 * Emulate the accessed bit for EPT, by checking if this page has
841 * an EPT mapping, and clearing it if it does. On the next access,
842 * a new EPT mapping will be established.
843 * This has some overhead, but not as much as the cost of swapping
844 * out actively used pages or breaking up actively used hugepages.
846 if (!shadow_accessed_mask)
847 return kvm_unmap_rmapp(kvm, rmapp, data);
849 spte = rmap_next(kvm, rmapp, NULL);
853 BUG_ON(!(_spte & PT_PRESENT_MASK));
854 _young = _spte & PT_ACCESSED_MASK;
857 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
859 spte = rmap_next(kvm, rmapp, spte);
864 #define RMAP_RECYCLE_THRESHOLD 1000
866 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
868 unsigned long *rmapp;
869 struct kvm_mmu_page *sp;
871 sp = page_header(__pa(spte));
873 gfn = unalias_gfn(vcpu->kvm, gfn);
874 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
876 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
877 kvm_flush_remote_tlbs(vcpu->kvm);
880 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
882 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
886 static int is_empty_shadow_page(u64 *spt)
891 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
892 if (is_shadow_present_pte(*pos)) {
893 printk(KERN_ERR "%s: %p %llx\n", __func__,
901 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
903 ASSERT(is_empty_shadow_page(sp->spt));
905 __free_page(virt_to_page(sp->spt));
906 __free_page(virt_to_page(sp->gfns));
908 ++kvm->arch.n_free_mmu_pages;
911 static unsigned kvm_page_table_hashfn(gfn_t gfn)
913 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
916 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
919 struct kvm_mmu_page *sp;
921 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
922 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
923 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
924 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
925 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
926 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
928 sp->parent_pte = parent_pte;
929 --vcpu->kvm->arch.n_free_mmu_pages;
933 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
934 struct kvm_mmu_page *sp, u64 *parent_pte)
936 struct kvm_pte_chain *pte_chain;
937 struct hlist_node *node;
942 if (!sp->multimapped) {
943 u64 *old = sp->parent_pte;
946 sp->parent_pte = parent_pte;
950 pte_chain = mmu_alloc_pte_chain(vcpu);
951 INIT_HLIST_HEAD(&sp->parent_ptes);
952 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
953 pte_chain->parent_ptes[0] = old;
955 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
956 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
958 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
959 if (!pte_chain->parent_ptes[i]) {
960 pte_chain->parent_ptes[i] = parent_pte;
964 pte_chain = mmu_alloc_pte_chain(vcpu);
966 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
967 pte_chain->parent_ptes[0] = parent_pte;
970 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
973 struct kvm_pte_chain *pte_chain;
974 struct hlist_node *node;
977 if (!sp->multimapped) {
978 BUG_ON(sp->parent_pte != parent_pte);
979 sp->parent_pte = NULL;
982 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
983 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
984 if (!pte_chain->parent_ptes[i])
986 if (pte_chain->parent_ptes[i] != parent_pte)
988 while (i + 1 < NR_PTE_CHAIN_ENTRIES
989 && pte_chain->parent_ptes[i + 1]) {
990 pte_chain->parent_ptes[i]
991 = pte_chain->parent_ptes[i + 1];
994 pte_chain->parent_ptes[i] = NULL;
996 hlist_del(&pte_chain->link);
997 mmu_free_pte_chain(pte_chain);
998 if (hlist_empty(&sp->parent_ptes)) {
1000 sp->parent_pte = NULL;
1009 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1010 mmu_parent_walk_fn fn)
1012 struct kvm_pte_chain *pte_chain;
1013 struct hlist_node *node;
1014 struct kvm_mmu_page *parent_sp;
1017 if (!sp->multimapped && sp->parent_pte) {
1018 parent_sp = page_header(__pa(sp->parent_pte));
1019 fn(vcpu, parent_sp);
1020 mmu_parent_walk(vcpu, parent_sp, fn);
1023 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1024 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1025 if (!pte_chain->parent_ptes[i])
1027 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1028 fn(vcpu, parent_sp);
1029 mmu_parent_walk(vcpu, parent_sp, fn);
1033 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1036 struct kvm_mmu_page *sp = page_header(__pa(spte));
1038 index = spte - sp->spt;
1039 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1040 sp->unsync_children++;
1041 WARN_ON(!sp->unsync_children);
1044 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1046 struct kvm_pte_chain *pte_chain;
1047 struct hlist_node *node;
1050 if (!sp->parent_pte)
1053 if (!sp->multimapped) {
1054 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1058 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1059 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1060 if (!pte_chain->parent_ptes[i])
1062 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1066 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1068 kvm_mmu_update_parents_unsync(sp);
1072 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1073 struct kvm_mmu_page *sp)
1075 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1076 kvm_mmu_update_parents_unsync(sp);
1079 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1080 struct kvm_mmu_page *sp)
1084 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1085 sp->spt[i] = shadow_trap_nonpresent_pte;
1088 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1089 struct kvm_mmu_page *sp)
1094 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1098 #define KVM_PAGE_ARRAY_NR 16
1100 struct kvm_mmu_pages {
1101 struct mmu_page_and_offset {
1102 struct kvm_mmu_page *sp;
1104 } page[KVM_PAGE_ARRAY_NR];
1108 #define for_each_unsync_children(bitmap, idx) \
1109 for (idx = find_first_bit(bitmap, 512); \
1111 idx = find_next_bit(bitmap, 512, idx+1))
1113 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1119 for (i=0; i < pvec->nr; i++)
1120 if (pvec->page[i].sp == sp)
1123 pvec->page[pvec->nr].sp = sp;
1124 pvec->page[pvec->nr].idx = idx;
1126 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1129 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1130 struct kvm_mmu_pages *pvec)
1132 int i, ret, nr_unsync_leaf = 0;
1134 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1135 u64 ent = sp->spt[i];
1137 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1138 struct kvm_mmu_page *child;
1139 child = page_header(ent & PT64_BASE_ADDR_MASK);
1141 if (child->unsync_children) {
1142 if (mmu_pages_add(pvec, child, i))
1145 ret = __mmu_unsync_walk(child, pvec);
1147 __clear_bit(i, sp->unsync_child_bitmap);
1149 nr_unsync_leaf += ret;
1154 if (child->unsync) {
1156 if (mmu_pages_add(pvec, child, i))
1162 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1163 sp->unsync_children = 0;
1165 return nr_unsync_leaf;
1168 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1169 struct kvm_mmu_pages *pvec)
1171 if (!sp->unsync_children)
1174 mmu_pages_add(pvec, sp, 0);
1175 return __mmu_unsync_walk(sp, pvec);
1178 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1181 struct hlist_head *bucket;
1182 struct kvm_mmu_page *sp;
1183 struct hlist_node *node;
1185 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1186 index = kvm_page_table_hashfn(gfn);
1187 bucket = &kvm->arch.mmu_page_hash[index];
1188 hlist_for_each_entry(sp, node, bucket, hash_link)
1189 if (sp->gfn == gfn && !sp->role.direct
1190 && !sp->role.invalid) {
1191 pgprintk("%s: found role %x\n",
1192 __func__, sp->role.word);
1198 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1200 WARN_ON(!sp->unsync);
1202 --kvm->stat.mmu_unsync;
1205 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1207 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1209 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1210 kvm_mmu_zap_page(vcpu->kvm, sp);
1214 trace_kvm_mmu_sync_page(sp);
1215 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1216 kvm_flush_remote_tlbs(vcpu->kvm);
1217 kvm_unlink_unsync_page(vcpu->kvm, sp);
1218 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1219 kvm_mmu_zap_page(vcpu->kvm, sp);
1223 kvm_mmu_flush_tlb(vcpu);
1227 struct mmu_page_path {
1228 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1229 unsigned int idx[PT64_ROOT_LEVEL-1];
1232 #define for_each_sp(pvec, sp, parents, i) \
1233 for (i = mmu_pages_next(&pvec, &parents, -1), \
1234 sp = pvec.page[i].sp; \
1235 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1236 i = mmu_pages_next(&pvec, &parents, i))
1238 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1239 struct mmu_page_path *parents,
1244 for (n = i+1; n < pvec->nr; n++) {
1245 struct kvm_mmu_page *sp = pvec->page[n].sp;
1247 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1248 parents->idx[0] = pvec->page[n].idx;
1252 parents->parent[sp->role.level-2] = sp;
1253 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1259 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1261 struct kvm_mmu_page *sp;
1262 unsigned int level = 0;
1265 unsigned int idx = parents->idx[level];
1267 sp = parents->parent[level];
1271 --sp->unsync_children;
1272 WARN_ON((int)sp->unsync_children < 0);
1273 __clear_bit(idx, sp->unsync_child_bitmap);
1275 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1278 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1279 struct mmu_page_path *parents,
1280 struct kvm_mmu_pages *pvec)
1282 parents->parent[parent->role.level-1] = NULL;
1286 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1287 struct kvm_mmu_page *parent)
1290 struct kvm_mmu_page *sp;
1291 struct mmu_page_path parents;
1292 struct kvm_mmu_pages pages;
1294 kvm_mmu_pages_init(parent, &parents, &pages);
1295 while (mmu_unsync_walk(parent, &pages)) {
1298 for_each_sp(pages, sp, parents, i)
1299 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1302 kvm_flush_remote_tlbs(vcpu->kvm);
1304 for_each_sp(pages, sp, parents, i) {
1305 kvm_sync_page(vcpu, sp);
1306 mmu_pages_clear_parents(&parents);
1308 cond_resched_lock(&vcpu->kvm->mmu_lock);
1309 kvm_mmu_pages_init(parent, &parents, &pages);
1313 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1321 union kvm_mmu_page_role role;
1324 struct hlist_head *bucket;
1325 struct kvm_mmu_page *sp;
1326 struct hlist_node *node, *tmp;
1328 role = vcpu->arch.mmu.base_role;
1330 role.direct = direct;
1333 role.access = access;
1334 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1335 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1336 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1337 role.quadrant = quadrant;
1339 index = kvm_page_table_hashfn(gfn);
1340 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1341 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1342 if (sp->gfn == gfn) {
1344 if (kvm_sync_page(vcpu, sp))
1347 if (sp->role.word != role.word)
1350 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1351 if (sp->unsync_children) {
1352 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1353 kvm_mmu_mark_parents_unsync(vcpu, sp);
1355 trace_kvm_mmu_get_page(sp, false);
1358 ++vcpu->kvm->stat.mmu_cache_miss;
1359 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1364 hlist_add_head(&sp->hash_link, bucket);
1366 if (rmap_write_protect(vcpu->kvm, gfn))
1367 kvm_flush_remote_tlbs(vcpu->kvm);
1368 account_shadowed(vcpu->kvm, gfn);
1370 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1371 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1373 nonpaging_prefetch_page(vcpu, sp);
1374 trace_kvm_mmu_get_page(sp, true);
1378 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1379 struct kvm_vcpu *vcpu, u64 addr)
1381 iterator->addr = addr;
1382 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1383 iterator->level = vcpu->arch.mmu.shadow_root_level;
1384 if (iterator->level == PT32E_ROOT_LEVEL) {
1385 iterator->shadow_addr
1386 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1387 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1389 if (!iterator->shadow_addr)
1390 iterator->level = 0;
1394 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1396 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1399 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1400 if (is_large_pte(*iterator->sptep))
1403 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1404 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1408 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1410 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1414 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1415 struct kvm_mmu_page *sp)
1423 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1426 if (is_shadow_present_pte(ent)) {
1427 if (!is_last_spte(ent, sp->role.level)) {
1428 ent &= PT64_BASE_ADDR_MASK;
1429 mmu_page_remove_parent_pte(page_header(ent),
1432 if (is_large_pte(ent))
1434 rmap_remove(kvm, &pt[i]);
1437 pt[i] = shadow_trap_nonpresent_pte;
1441 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1443 mmu_page_remove_parent_pte(sp, parent_pte);
1446 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1449 struct kvm_vcpu *vcpu;
1451 kvm_for_each_vcpu(i, vcpu, kvm)
1452 vcpu->arch.last_pte_updated = NULL;
1455 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1459 while (sp->multimapped || sp->parent_pte) {
1460 if (!sp->multimapped)
1461 parent_pte = sp->parent_pte;
1463 struct kvm_pte_chain *chain;
1465 chain = container_of(sp->parent_ptes.first,
1466 struct kvm_pte_chain, link);
1467 parent_pte = chain->parent_ptes[0];
1469 BUG_ON(!parent_pte);
1470 kvm_mmu_put_page(sp, parent_pte);
1471 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1475 static int mmu_zap_unsync_children(struct kvm *kvm,
1476 struct kvm_mmu_page *parent)
1479 struct mmu_page_path parents;
1480 struct kvm_mmu_pages pages;
1482 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1485 kvm_mmu_pages_init(parent, &parents, &pages);
1486 while (mmu_unsync_walk(parent, &pages)) {
1487 struct kvm_mmu_page *sp;
1489 for_each_sp(pages, sp, parents, i) {
1490 kvm_mmu_zap_page(kvm, sp);
1491 mmu_pages_clear_parents(&parents);
1494 kvm_mmu_pages_init(parent, &parents, &pages);
1500 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1504 trace_kvm_mmu_zap_page(sp);
1505 ++kvm->stat.mmu_shadow_zapped;
1506 ret = mmu_zap_unsync_children(kvm, sp);
1507 kvm_mmu_page_unlink_children(kvm, sp);
1508 kvm_mmu_unlink_parents(kvm, sp);
1509 kvm_flush_remote_tlbs(kvm);
1510 if (!sp->role.invalid && !sp->role.direct)
1511 unaccount_shadowed(kvm, sp->gfn);
1513 kvm_unlink_unsync_page(kvm, sp);
1514 if (!sp->root_count) {
1515 hlist_del(&sp->hash_link);
1516 kvm_mmu_free_page(kvm, sp);
1518 sp->role.invalid = 1;
1519 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1520 kvm_reload_remote_mmus(kvm);
1522 kvm_mmu_reset_last_pte_updated(kvm);
1527 * Changing the number of mmu pages allocated to the vm
1528 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1530 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1534 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1535 used_pages = max(0, used_pages);
1538 * If we set the number of mmu pages to be smaller be than the
1539 * number of actived pages , we must to free some mmu pages before we
1543 if (used_pages > kvm_nr_mmu_pages) {
1544 while (used_pages > kvm_nr_mmu_pages &&
1545 !list_empty(&kvm->arch.active_mmu_pages)) {
1546 struct kvm_mmu_page *page;
1548 page = container_of(kvm->arch.active_mmu_pages.prev,
1549 struct kvm_mmu_page, link);
1550 used_pages -= kvm_mmu_zap_page(kvm, page);
1553 kvm_nr_mmu_pages = used_pages;
1554 kvm->arch.n_free_mmu_pages = 0;
1557 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1558 - kvm->arch.n_alloc_mmu_pages;
1560 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1563 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1566 struct hlist_head *bucket;
1567 struct kvm_mmu_page *sp;
1568 struct hlist_node *node, *n;
1571 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1573 index = kvm_page_table_hashfn(gfn);
1574 bucket = &kvm->arch.mmu_page_hash[index];
1575 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1576 if (sp->gfn == gfn && !sp->role.direct) {
1577 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1580 if (kvm_mmu_zap_page(kvm, sp))
1586 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1589 struct hlist_head *bucket;
1590 struct kvm_mmu_page *sp;
1591 struct hlist_node *node, *nn;
1593 index = kvm_page_table_hashfn(gfn);
1594 bucket = &kvm->arch.mmu_page_hash[index];
1595 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1596 if (sp->gfn == gfn && !sp->role.direct
1597 && !sp->role.invalid) {
1598 pgprintk("%s: zap %lx %x\n",
1599 __func__, gfn, sp->role.word);
1600 if (kvm_mmu_zap_page(kvm, sp))
1606 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1608 int slot = memslot_id(kvm, gfn);
1609 struct kvm_mmu_page *sp = page_header(__pa(pte));
1611 __set_bit(slot, sp->slot_bitmap);
1614 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1619 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1622 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1623 if (pt[i] == shadow_notrap_nonpresent_pte)
1624 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1628 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1632 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
1634 if (gpa == UNMAPPED_GVA)
1637 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1643 * The function is based on mtrr_type_lookup() in
1644 * arch/x86/kernel/cpu/mtrr/generic.c
1646 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1651 u8 prev_match, curr_match;
1652 int num_var_ranges = KVM_NR_VAR_MTRR;
1654 if (!mtrr_state->enabled)
1657 /* Make end inclusive end, instead of exclusive */
1660 /* Look in fixed ranges. Just return the type as per start */
1661 if (mtrr_state->have_fixed && (start < 0x100000)) {
1664 if (start < 0x80000) {
1666 idx += (start >> 16);
1667 return mtrr_state->fixed_ranges[idx];
1668 } else if (start < 0xC0000) {
1670 idx += ((start - 0x80000) >> 14);
1671 return mtrr_state->fixed_ranges[idx];
1672 } else if (start < 0x1000000) {
1674 idx += ((start - 0xC0000) >> 12);
1675 return mtrr_state->fixed_ranges[idx];
1680 * Look in variable ranges
1681 * Look of multiple ranges matching this address and pick type
1682 * as per MTRR precedence
1684 if (!(mtrr_state->enabled & 2))
1685 return mtrr_state->def_type;
1688 for (i = 0; i < num_var_ranges; ++i) {
1689 unsigned short start_state, end_state;
1691 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1694 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1695 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1696 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1697 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1699 start_state = ((start & mask) == (base & mask));
1700 end_state = ((end & mask) == (base & mask));
1701 if (start_state != end_state)
1704 if ((start & mask) != (base & mask))
1707 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1708 if (prev_match == 0xFF) {
1709 prev_match = curr_match;
1713 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1714 curr_match == MTRR_TYPE_UNCACHABLE)
1715 return MTRR_TYPE_UNCACHABLE;
1717 if ((prev_match == MTRR_TYPE_WRBACK &&
1718 curr_match == MTRR_TYPE_WRTHROUGH) ||
1719 (prev_match == MTRR_TYPE_WRTHROUGH &&
1720 curr_match == MTRR_TYPE_WRBACK)) {
1721 prev_match = MTRR_TYPE_WRTHROUGH;
1722 curr_match = MTRR_TYPE_WRTHROUGH;
1725 if (prev_match != curr_match)
1726 return MTRR_TYPE_UNCACHABLE;
1729 if (prev_match != 0xFF)
1732 return mtrr_state->def_type;
1735 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1739 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1740 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1741 if (mtrr == 0xfe || mtrr == 0xff)
1742 mtrr = MTRR_TYPE_WRBACK;
1745 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1747 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1750 struct hlist_head *bucket;
1751 struct kvm_mmu_page *s;
1752 struct hlist_node *node, *n;
1754 trace_kvm_mmu_unsync_page(sp);
1755 index = kvm_page_table_hashfn(sp->gfn);
1756 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1757 /* don't unsync if pagetable is shadowed with multiple roles */
1758 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1759 if (s->gfn != sp->gfn || s->role.direct)
1761 if (s->role.word != sp->role.word)
1764 ++vcpu->kvm->stat.mmu_unsync;
1767 kvm_mmu_mark_parents_unsync(vcpu, sp);
1769 mmu_convert_notrap(sp);
1773 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1776 struct kvm_mmu_page *shadow;
1778 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1780 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1784 if (can_unsync && oos_shadow)
1785 return kvm_unsync_page(vcpu, shadow);
1791 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1792 unsigned pte_access, int user_fault,
1793 int write_fault, int dirty, int level,
1794 gfn_t gfn, pfn_t pfn, bool speculative,
1795 bool can_unsync, bool reset_host_protection)
1801 * We don't set the accessed bit, since we sometimes want to see
1802 * whether the guest actually used the pte (in order to detect
1805 spte = shadow_base_present_pte | shadow_dirty_mask;
1807 spte |= shadow_accessed_mask;
1809 pte_access &= ~ACC_WRITE_MASK;
1810 if (pte_access & ACC_EXEC_MASK)
1811 spte |= shadow_x_mask;
1813 spte |= shadow_nx_mask;
1814 if (pte_access & ACC_USER_MASK)
1815 spte |= shadow_user_mask;
1816 if (level > PT_PAGE_TABLE_LEVEL)
1817 spte |= PT_PAGE_SIZE_MASK;
1819 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1820 kvm_is_mmio_pfn(pfn));
1822 if (reset_host_protection)
1823 spte |= SPTE_HOST_WRITEABLE;
1825 spte |= (u64)pfn << PAGE_SHIFT;
1827 if ((pte_access & ACC_WRITE_MASK)
1828 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1830 if (level > PT_PAGE_TABLE_LEVEL &&
1831 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1833 spte = shadow_trap_nonpresent_pte;
1837 spte |= PT_WRITABLE_MASK;
1840 * Optimization: for pte sync, if spte was writable the hash
1841 * lookup is unnecessary (and expensive). Write protection
1842 * is responsibility of mmu_get_page / kvm_sync_page.
1843 * Same reasoning can be applied to dirty page accounting.
1845 if (!can_unsync && is_writable_pte(*sptep))
1848 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1849 pgprintk("%s: found shadow page for %lx, marking ro\n",
1852 pte_access &= ~ACC_WRITE_MASK;
1853 if (is_writable_pte(spte))
1854 spte &= ~PT_WRITABLE_MASK;
1858 if (pte_access & ACC_WRITE_MASK)
1859 mark_page_dirty(vcpu->kvm, gfn);
1862 __set_spte(sptep, spte);
1866 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1867 unsigned pt_access, unsigned pte_access,
1868 int user_fault, int write_fault, int dirty,
1869 int *ptwrite, int level, gfn_t gfn,
1870 pfn_t pfn, bool speculative,
1871 bool reset_host_protection)
1873 int was_rmapped = 0;
1874 int was_writable = is_writable_pte(*sptep);
1877 pgprintk("%s: spte %llx access %x write_fault %d"
1878 " user_fault %d gfn %lx\n",
1879 __func__, *sptep, pt_access,
1880 write_fault, user_fault, gfn);
1882 if (is_rmap_spte(*sptep)) {
1884 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1885 * the parent of the now unreachable PTE.
1887 if (level > PT_PAGE_TABLE_LEVEL &&
1888 !is_large_pte(*sptep)) {
1889 struct kvm_mmu_page *child;
1892 child = page_header(pte & PT64_BASE_ADDR_MASK);
1893 mmu_page_remove_parent_pte(child, sptep);
1894 } else if (pfn != spte_to_pfn(*sptep)) {
1895 pgprintk("hfn old %lx new %lx\n",
1896 spte_to_pfn(*sptep), pfn);
1897 rmap_remove(vcpu->kvm, sptep);
1902 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1903 dirty, level, gfn, pfn, speculative, true,
1904 reset_host_protection)) {
1907 kvm_x86_ops->tlb_flush(vcpu);
1910 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1911 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1912 is_large_pte(*sptep)? "2MB" : "4kB",
1913 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1915 if (!was_rmapped && is_large_pte(*sptep))
1916 ++vcpu->kvm->stat.lpages;
1918 page_header_update_slot(vcpu->kvm, sptep, gfn);
1920 rmap_count = rmap_add(vcpu, sptep, gfn);
1921 kvm_release_pfn_clean(pfn);
1922 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1923 rmap_recycle(vcpu, sptep, gfn);
1926 kvm_release_pfn_dirty(pfn);
1928 kvm_release_pfn_clean(pfn);
1931 vcpu->arch.last_pte_updated = sptep;
1932 vcpu->arch.last_pte_gfn = gfn;
1936 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1940 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1941 int level, gfn_t gfn, pfn_t pfn)
1943 struct kvm_shadow_walk_iterator iterator;
1944 struct kvm_mmu_page *sp;
1948 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1949 if (iterator.level == level) {
1950 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1951 0, write, 1, &pt_write,
1952 level, gfn, pfn, false, true);
1953 ++vcpu->stat.pf_fixed;
1957 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1958 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1959 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1961 1, ACC_ALL, iterator.sptep);
1963 pgprintk("nonpaging_map: ENOMEM\n");
1964 kvm_release_pfn_clean(pfn);
1968 __set_spte(iterator.sptep,
1970 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1971 | shadow_user_mask | shadow_x_mask);
1977 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1982 unsigned long mmu_seq;
1984 level = mapping_level(vcpu, gfn);
1987 * This path builds a PAE pagetable - so we can map 2mb pages at
1988 * maximum. Therefore check if the level is larger than that.
1990 if (level > PT_DIRECTORY_LEVEL)
1991 level = PT_DIRECTORY_LEVEL;
1993 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1995 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1997 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2000 if (is_error_pfn(pfn)) {
2001 kvm_release_pfn_clean(pfn);
2005 spin_lock(&vcpu->kvm->mmu_lock);
2006 if (mmu_notifier_retry(vcpu, mmu_seq))
2008 kvm_mmu_free_some_pages(vcpu);
2009 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2010 spin_unlock(&vcpu->kvm->mmu_lock);
2016 spin_unlock(&vcpu->kvm->mmu_lock);
2017 kvm_release_pfn_clean(pfn);
2022 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2025 struct kvm_mmu_page *sp;
2027 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2029 spin_lock(&vcpu->kvm->mmu_lock);
2030 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2031 hpa_t root = vcpu->arch.mmu.root_hpa;
2033 sp = page_header(root);
2035 if (!sp->root_count && sp->role.invalid)
2036 kvm_mmu_zap_page(vcpu->kvm, sp);
2037 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2038 spin_unlock(&vcpu->kvm->mmu_lock);
2041 for (i = 0; i < 4; ++i) {
2042 hpa_t root = vcpu->arch.mmu.pae_root[i];
2045 root &= PT64_BASE_ADDR_MASK;
2046 sp = page_header(root);
2048 if (!sp->root_count && sp->role.invalid)
2049 kvm_mmu_zap_page(vcpu->kvm, sp);
2051 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2053 spin_unlock(&vcpu->kvm->mmu_lock);
2054 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2057 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2061 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2062 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2069 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2073 struct kvm_mmu_page *sp;
2077 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2079 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2080 hpa_t root = vcpu->arch.mmu.root_hpa;
2082 ASSERT(!VALID_PAGE(root));
2085 if (mmu_check_root(vcpu, root_gfn))
2087 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2088 PT64_ROOT_LEVEL, direct,
2090 root = __pa(sp->spt);
2092 vcpu->arch.mmu.root_hpa = root;
2095 direct = !is_paging(vcpu);
2098 for (i = 0; i < 4; ++i) {
2099 hpa_t root = vcpu->arch.mmu.pae_root[i];
2101 ASSERT(!VALID_PAGE(root));
2102 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2103 pdptr = kvm_pdptr_read(vcpu, i);
2104 if (!is_present_gpte(pdptr)) {
2105 vcpu->arch.mmu.pae_root[i] = 0;
2108 root_gfn = pdptr >> PAGE_SHIFT;
2109 } else if (vcpu->arch.mmu.root_level == 0)
2111 if (mmu_check_root(vcpu, root_gfn))
2113 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2114 PT32_ROOT_LEVEL, direct,
2116 root = __pa(sp->spt);
2118 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2120 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2124 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2127 struct kvm_mmu_page *sp;
2129 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2131 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2132 hpa_t root = vcpu->arch.mmu.root_hpa;
2133 sp = page_header(root);
2134 mmu_sync_children(vcpu, sp);
2137 for (i = 0; i < 4; ++i) {
2138 hpa_t root = vcpu->arch.mmu.pae_root[i];
2140 if (root && VALID_PAGE(root)) {
2141 root &= PT64_BASE_ADDR_MASK;
2142 sp = page_header(root);
2143 mmu_sync_children(vcpu, sp);
2148 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2150 spin_lock(&vcpu->kvm->mmu_lock);
2151 mmu_sync_roots(vcpu);
2152 spin_unlock(&vcpu->kvm->mmu_lock);
2155 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2156 u32 access, u32 *error)
2163 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2169 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2170 r = mmu_topup_memory_caches(vcpu);
2175 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2177 gfn = gva >> PAGE_SHIFT;
2179 return nonpaging_map(vcpu, gva & PAGE_MASK,
2180 error_code & PFERR_WRITE_MASK, gfn);
2183 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2189 gfn_t gfn = gpa >> PAGE_SHIFT;
2190 unsigned long mmu_seq;
2193 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2195 r = mmu_topup_memory_caches(vcpu);
2199 level = mapping_level(vcpu, gfn);
2201 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2203 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2205 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2206 if (is_error_pfn(pfn)) {
2207 kvm_release_pfn_clean(pfn);
2210 spin_lock(&vcpu->kvm->mmu_lock);
2211 if (mmu_notifier_retry(vcpu, mmu_seq))
2213 kvm_mmu_free_some_pages(vcpu);
2214 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2216 spin_unlock(&vcpu->kvm->mmu_lock);
2221 spin_unlock(&vcpu->kvm->mmu_lock);
2222 kvm_release_pfn_clean(pfn);
2226 static void nonpaging_free(struct kvm_vcpu *vcpu)
2228 mmu_free_roots(vcpu);
2231 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2233 struct kvm_mmu *context = &vcpu->arch.mmu;
2235 context->new_cr3 = nonpaging_new_cr3;
2236 context->page_fault = nonpaging_page_fault;
2237 context->gva_to_gpa = nonpaging_gva_to_gpa;
2238 context->free = nonpaging_free;
2239 context->prefetch_page = nonpaging_prefetch_page;
2240 context->sync_page = nonpaging_sync_page;
2241 context->invlpg = nonpaging_invlpg;
2242 context->root_level = 0;
2243 context->shadow_root_level = PT32E_ROOT_LEVEL;
2244 context->root_hpa = INVALID_PAGE;
2248 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2250 ++vcpu->stat.tlb_flush;
2251 kvm_x86_ops->tlb_flush(vcpu);
2254 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2256 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2257 mmu_free_roots(vcpu);
2260 static void inject_page_fault(struct kvm_vcpu *vcpu,
2264 kvm_inject_page_fault(vcpu, addr, err_code);
2267 static void paging_free(struct kvm_vcpu *vcpu)
2269 nonpaging_free(vcpu);
2272 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2276 bit7 = (gpte >> 7) & 1;
2277 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2281 #include "paging_tmpl.h"
2285 #include "paging_tmpl.h"
2288 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2290 struct kvm_mmu *context = &vcpu->arch.mmu;
2291 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2292 u64 exb_bit_rsvd = 0;
2295 exb_bit_rsvd = rsvd_bits(63, 63);
2297 case PT32_ROOT_LEVEL:
2298 /* no rsvd bits for 2 level 4K page table entries */
2299 context->rsvd_bits_mask[0][1] = 0;
2300 context->rsvd_bits_mask[0][0] = 0;
2301 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2303 if (!is_pse(vcpu)) {
2304 context->rsvd_bits_mask[1][1] = 0;
2308 if (is_cpuid_PSE36())
2309 /* 36bits PSE 4MB page */
2310 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2312 /* 32 bits PSE 4MB page */
2313 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2315 case PT32E_ROOT_LEVEL:
2316 context->rsvd_bits_mask[0][2] =
2317 rsvd_bits(maxphyaddr, 63) |
2318 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2319 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2320 rsvd_bits(maxphyaddr, 62); /* PDE */
2321 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2322 rsvd_bits(maxphyaddr, 62); /* PTE */
2323 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2324 rsvd_bits(maxphyaddr, 62) |
2325 rsvd_bits(13, 20); /* large page */
2326 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2328 case PT64_ROOT_LEVEL:
2329 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2330 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2331 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2332 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2333 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2334 rsvd_bits(maxphyaddr, 51);
2335 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2336 rsvd_bits(maxphyaddr, 51);
2337 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2338 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2339 rsvd_bits(maxphyaddr, 51) |
2341 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2342 rsvd_bits(maxphyaddr, 51) |
2343 rsvd_bits(13, 20); /* large page */
2344 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2349 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2351 struct kvm_mmu *context = &vcpu->arch.mmu;
2353 ASSERT(is_pae(vcpu));
2354 context->new_cr3 = paging_new_cr3;
2355 context->page_fault = paging64_page_fault;
2356 context->gva_to_gpa = paging64_gva_to_gpa;
2357 context->prefetch_page = paging64_prefetch_page;
2358 context->sync_page = paging64_sync_page;
2359 context->invlpg = paging64_invlpg;
2360 context->free = paging_free;
2361 context->root_level = level;
2362 context->shadow_root_level = level;
2363 context->root_hpa = INVALID_PAGE;
2367 static int paging64_init_context(struct kvm_vcpu *vcpu)
2369 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2370 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2373 static int paging32_init_context(struct kvm_vcpu *vcpu)
2375 struct kvm_mmu *context = &vcpu->arch.mmu;
2377 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2378 context->new_cr3 = paging_new_cr3;
2379 context->page_fault = paging32_page_fault;
2380 context->gva_to_gpa = paging32_gva_to_gpa;
2381 context->free = paging_free;
2382 context->prefetch_page = paging32_prefetch_page;
2383 context->sync_page = paging32_sync_page;
2384 context->invlpg = paging32_invlpg;
2385 context->root_level = PT32_ROOT_LEVEL;
2386 context->shadow_root_level = PT32E_ROOT_LEVEL;
2387 context->root_hpa = INVALID_PAGE;
2391 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2393 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2394 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2397 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2399 struct kvm_mmu *context = &vcpu->arch.mmu;
2401 context->new_cr3 = nonpaging_new_cr3;
2402 context->page_fault = tdp_page_fault;
2403 context->free = nonpaging_free;
2404 context->prefetch_page = nonpaging_prefetch_page;
2405 context->sync_page = nonpaging_sync_page;
2406 context->invlpg = nonpaging_invlpg;
2407 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2408 context->root_hpa = INVALID_PAGE;
2410 if (!is_paging(vcpu)) {
2411 context->gva_to_gpa = nonpaging_gva_to_gpa;
2412 context->root_level = 0;
2413 } else if (is_long_mode(vcpu)) {
2414 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2415 context->gva_to_gpa = paging64_gva_to_gpa;
2416 context->root_level = PT64_ROOT_LEVEL;
2417 } else if (is_pae(vcpu)) {
2418 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2419 context->gva_to_gpa = paging64_gva_to_gpa;
2420 context->root_level = PT32E_ROOT_LEVEL;
2422 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2423 context->gva_to_gpa = paging32_gva_to_gpa;
2424 context->root_level = PT32_ROOT_LEVEL;
2430 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2435 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2437 if (!is_paging(vcpu))
2438 r = nonpaging_init_context(vcpu);
2439 else if (is_long_mode(vcpu))
2440 r = paging64_init_context(vcpu);
2441 else if (is_pae(vcpu))
2442 r = paging32E_init_context(vcpu);
2444 r = paging32_init_context(vcpu);
2446 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2451 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2453 vcpu->arch.update_pte.pfn = bad_pfn;
2456 return init_kvm_tdp_mmu(vcpu);
2458 return init_kvm_softmmu(vcpu);
2461 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2464 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2465 vcpu->arch.mmu.free(vcpu);
2466 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2470 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2472 destroy_kvm_mmu(vcpu);
2473 return init_kvm_mmu(vcpu);
2475 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2477 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2481 r = mmu_topup_memory_caches(vcpu);
2484 spin_lock(&vcpu->kvm->mmu_lock);
2485 kvm_mmu_free_some_pages(vcpu);
2486 r = mmu_alloc_roots(vcpu);
2487 mmu_sync_roots(vcpu);
2488 spin_unlock(&vcpu->kvm->mmu_lock);
2491 /* set_cr3() should ensure TLB has been flushed */
2492 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2496 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2498 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2500 mmu_free_roots(vcpu);
2503 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2504 struct kvm_mmu_page *sp,
2508 struct kvm_mmu_page *child;
2511 if (is_shadow_present_pte(pte)) {
2512 if (is_last_spte(pte, sp->role.level))
2513 rmap_remove(vcpu->kvm, spte);
2515 child = page_header(pte & PT64_BASE_ADDR_MASK);
2516 mmu_page_remove_parent_pte(child, spte);
2519 __set_spte(spte, shadow_trap_nonpresent_pte);
2520 if (is_large_pte(pte))
2521 --vcpu->kvm->stat.lpages;
2524 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2525 struct kvm_mmu_page *sp,
2529 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2530 ++vcpu->kvm->stat.mmu_pde_zapped;
2534 ++vcpu->kvm->stat.mmu_pte_updated;
2535 if (sp->role.glevels == PT32_ROOT_LEVEL)
2536 paging32_update_pte(vcpu, sp, spte, new);
2538 paging64_update_pte(vcpu, sp, spte, new);
2541 static bool need_remote_flush(u64 old, u64 new)
2543 if (!is_shadow_present_pte(old))
2545 if (!is_shadow_present_pte(new))
2547 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2549 old ^= PT64_NX_MASK;
2550 new ^= PT64_NX_MASK;
2551 return (old & ~new & PT64_PERM_MASK) != 0;
2554 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2556 if (need_remote_flush(old, new))
2557 kvm_flush_remote_tlbs(vcpu->kvm);
2559 kvm_mmu_flush_tlb(vcpu);
2562 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2564 u64 *spte = vcpu->arch.last_pte_updated;
2566 return !!(spte && (*spte & shadow_accessed_mask));
2569 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2575 if (!is_present_gpte(gpte))
2577 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2579 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2581 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2583 if (is_error_pfn(pfn)) {
2584 kvm_release_pfn_clean(pfn);
2587 vcpu->arch.update_pte.gfn = gfn;
2588 vcpu->arch.update_pte.pfn = pfn;
2591 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2593 u64 *spte = vcpu->arch.last_pte_updated;
2596 && vcpu->arch.last_pte_gfn == gfn
2597 && shadow_accessed_mask
2598 && !(*spte & shadow_accessed_mask)
2599 && is_shadow_present_pte(*spte))
2600 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2603 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2604 const u8 *new, int bytes,
2605 bool guest_initiated)
2607 gfn_t gfn = gpa >> PAGE_SHIFT;
2608 struct kvm_mmu_page *sp;
2609 struct hlist_node *node, *n;
2610 struct hlist_head *bucket;
2614 unsigned offset = offset_in_page(gpa);
2616 unsigned page_offset;
2617 unsigned misaligned;
2625 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2627 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2630 * Assume that the pte write on a page table of the same type
2631 * as the current vcpu paging mode. This is nearly always true
2632 * (might be false while changing modes). Note it is verified later
2635 if ((is_pae(vcpu) && bytes == 4) || !new) {
2636 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2641 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2644 new = (const u8 *)&gentry;
2649 gentry = *(const u32 *)new;
2652 gentry = *(const u64 *)new;
2659 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2660 spin_lock(&vcpu->kvm->mmu_lock);
2661 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2663 kvm_mmu_access_page(vcpu, gfn);
2664 kvm_mmu_free_some_pages(vcpu);
2665 ++vcpu->kvm->stat.mmu_pte_write;
2666 kvm_mmu_audit(vcpu, "pre pte write");
2667 if (guest_initiated) {
2668 if (gfn == vcpu->arch.last_pt_write_gfn
2669 && !last_updated_pte_accessed(vcpu)) {
2670 ++vcpu->arch.last_pt_write_count;
2671 if (vcpu->arch.last_pt_write_count >= 3)
2674 vcpu->arch.last_pt_write_gfn = gfn;
2675 vcpu->arch.last_pt_write_count = 1;
2676 vcpu->arch.last_pte_updated = NULL;
2679 index = kvm_page_table_hashfn(gfn);
2680 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2681 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2682 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2684 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2685 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2686 misaligned |= bytes < 4;
2687 if (misaligned || flooded) {
2689 * Misaligned accesses are too much trouble to fix
2690 * up; also, they usually indicate a page is not used
2693 * If we're seeing too many writes to a page,
2694 * it may no longer be a page table, or we may be
2695 * forking, in which case it is better to unmap the
2698 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2699 gpa, bytes, sp->role.word);
2700 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2702 ++vcpu->kvm->stat.mmu_flooded;
2705 page_offset = offset;
2706 level = sp->role.level;
2708 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2709 page_offset <<= 1; /* 32->64 */
2711 * A 32-bit pde maps 4MB while the shadow pdes map
2712 * only 2MB. So we need to double the offset again
2713 * and zap two pdes instead of one.
2715 if (level == PT32_ROOT_LEVEL) {
2716 page_offset &= ~7; /* kill rounding error */
2720 quadrant = page_offset >> PAGE_SHIFT;
2721 page_offset &= ~PAGE_MASK;
2722 if (quadrant != sp->role.quadrant)
2725 spte = &sp->spt[page_offset / sizeof(*spte)];
2728 mmu_pte_write_zap_pte(vcpu, sp, spte);
2730 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2731 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2735 kvm_mmu_audit(vcpu, "post pte write");
2736 spin_unlock(&vcpu->kvm->mmu_lock);
2737 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2738 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2739 vcpu->arch.update_pte.pfn = bad_pfn;
2743 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2751 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2753 spin_lock(&vcpu->kvm->mmu_lock);
2754 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2755 spin_unlock(&vcpu->kvm->mmu_lock);
2758 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2760 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2762 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2763 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2764 struct kvm_mmu_page *sp;
2766 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2767 struct kvm_mmu_page, link);
2768 kvm_mmu_zap_page(vcpu->kvm, sp);
2769 ++vcpu->kvm->stat.mmu_recycled;
2773 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2776 enum emulation_result er;
2778 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2787 r = mmu_topup_memory_caches(vcpu);
2791 er = emulate_instruction(vcpu, cr2, error_code, 0);
2796 case EMULATE_DO_MMIO:
2797 ++vcpu->stat.mmio_exits;
2800 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2801 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2802 vcpu->run->internal.ndata = 0;
2810 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2812 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2814 vcpu->arch.mmu.invlpg(vcpu, gva);
2815 kvm_mmu_flush_tlb(vcpu);
2816 ++vcpu->stat.invlpg;
2818 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2820 void kvm_enable_tdp(void)
2824 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2826 void kvm_disable_tdp(void)
2828 tdp_enabled = false;
2830 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2832 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2834 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2837 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2845 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2846 * Therefore we need to allocate shadow page tables in the first
2847 * 4GB of memory, which happens to fit the DMA32 zone.
2849 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2853 vcpu->arch.mmu.pae_root = page_address(page);
2854 for (i = 0; i < 4; ++i)
2855 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2860 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2863 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2865 return alloc_mmu_pages(vcpu);
2868 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2871 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2873 return init_kvm_mmu(vcpu);
2876 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2880 destroy_kvm_mmu(vcpu);
2881 free_mmu_pages(vcpu);
2882 mmu_free_memory_caches(vcpu);
2885 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2887 struct kvm_mmu_page *sp;
2889 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2893 if (!test_bit(slot, sp->slot_bitmap))
2897 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2899 if (pt[i] & PT_WRITABLE_MASK)
2900 pt[i] &= ~PT_WRITABLE_MASK;
2902 kvm_flush_remote_tlbs(kvm);
2905 void kvm_mmu_zap_all(struct kvm *kvm)
2907 struct kvm_mmu_page *sp, *node;
2909 spin_lock(&kvm->mmu_lock);
2910 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2911 if (kvm_mmu_zap_page(kvm, sp))
2912 node = container_of(kvm->arch.active_mmu_pages.next,
2913 struct kvm_mmu_page, link);
2914 spin_unlock(&kvm->mmu_lock);
2916 kvm_flush_remote_tlbs(kvm);
2919 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2921 struct kvm_mmu_page *page;
2923 page = container_of(kvm->arch.active_mmu_pages.prev,
2924 struct kvm_mmu_page, link);
2925 kvm_mmu_zap_page(kvm, page);
2928 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2931 struct kvm *kvm_freed = NULL;
2932 int cache_count = 0;
2934 spin_lock(&kvm_lock);
2936 list_for_each_entry(kvm, &vm_list, vm_list) {
2939 idx = srcu_read_lock(&kvm->srcu);
2940 spin_lock(&kvm->mmu_lock);
2941 npages = kvm->arch.n_alloc_mmu_pages -
2942 kvm->arch.n_free_mmu_pages;
2943 cache_count += npages;
2944 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2945 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2951 spin_unlock(&kvm->mmu_lock);
2952 srcu_read_unlock(&kvm->srcu, idx);
2955 list_move_tail(&kvm_freed->vm_list, &vm_list);
2957 spin_unlock(&kvm_lock);
2962 static struct shrinker mmu_shrinker = {
2963 .shrink = mmu_shrink,
2964 .seeks = DEFAULT_SEEKS * 10,
2967 static void mmu_destroy_caches(void)
2969 if (pte_chain_cache)
2970 kmem_cache_destroy(pte_chain_cache);
2971 if (rmap_desc_cache)
2972 kmem_cache_destroy(rmap_desc_cache);
2973 if (mmu_page_header_cache)
2974 kmem_cache_destroy(mmu_page_header_cache);
2977 void kvm_mmu_module_exit(void)
2979 mmu_destroy_caches();
2980 unregister_shrinker(&mmu_shrinker);
2983 int kvm_mmu_module_init(void)
2985 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2986 sizeof(struct kvm_pte_chain),
2988 if (!pte_chain_cache)
2990 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2991 sizeof(struct kvm_rmap_desc),
2993 if (!rmap_desc_cache)
2996 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2997 sizeof(struct kvm_mmu_page),
2999 if (!mmu_page_header_cache)
3002 register_shrinker(&mmu_shrinker);
3007 mmu_destroy_caches();
3012 * Caculate mmu pages needed for kvm.
3014 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3017 unsigned int nr_mmu_pages;
3018 unsigned int nr_pages = 0;
3019 struct kvm_memslots *slots;
3021 slots = rcu_dereference(kvm->memslots);
3022 for (i = 0; i < slots->nmemslots; i++)
3023 nr_pages += slots->memslots[i].npages;
3025 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3026 nr_mmu_pages = max(nr_mmu_pages,
3027 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3029 return nr_mmu_pages;
3032 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3035 if (len > buffer->len)
3040 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3045 ret = pv_mmu_peek_buffer(buffer, len);
3050 buffer->processed += len;
3054 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3055 gpa_t addr, gpa_t value)
3060 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3063 r = mmu_topup_memory_caches(vcpu);
3067 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3073 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3075 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3079 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3081 spin_lock(&vcpu->kvm->mmu_lock);
3082 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3083 spin_unlock(&vcpu->kvm->mmu_lock);
3087 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3088 struct kvm_pv_mmu_op_buffer *buffer)
3090 struct kvm_mmu_op_header *header;
3092 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3095 switch (header->op) {
3096 case KVM_MMU_OP_WRITE_PTE: {
3097 struct kvm_mmu_op_write_pte *wpte;
3099 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3102 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3105 case KVM_MMU_OP_FLUSH_TLB: {
3106 struct kvm_mmu_op_flush_tlb *ftlb;
3108 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3111 return kvm_pv_mmu_flush_tlb(vcpu);
3113 case KVM_MMU_OP_RELEASE_PT: {
3114 struct kvm_mmu_op_release_pt *rpt;
3116 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3119 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3125 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3126 gpa_t addr, unsigned long *ret)
3129 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3131 buffer->ptr = buffer->buf;
3132 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3133 buffer->processed = 0;
3135 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3139 while (buffer->len) {
3140 r = kvm_pv_mmu_op_one(vcpu, buffer);
3149 *ret = buffer->processed;
3153 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3155 struct kvm_shadow_walk_iterator iterator;
3158 spin_lock(&vcpu->kvm->mmu_lock);
3159 for_each_shadow_entry(vcpu, addr, iterator) {
3160 sptes[iterator.level-1] = *iterator.sptep;
3162 if (!is_shadow_present_pte(*iterator.sptep))
3165 spin_unlock(&vcpu->kvm->mmu_lock);
3169 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3173 static const char *audit_msg;
3175 static gva_t canonicalize(gva_t gva)
3177 #ifdef CONFIG_X86_64
3178 gva = (long long)(gva << 16) >> 16;
3184 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3186 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3191 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3192 u64 ent = sp->spt[i];
3194 if (is_shadow_present_pte(ent)) {
3195 if (!is_last_spte(ent, sp->role.level)) {
3196 struct kvm_mmu_page *child;
3197 child = page_header(ent & PT64_BASE_ADDR_MASK);
3198 __mmu_spte_walk(kvm, child, fn);
3200 fn(kvm, &sp->spt[i]);
3205 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3208 struct kvm_mmu_page *sp;
3210 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3212 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3213 hpa_t root = vcpu->arch.mmu.root_hpa;
3214 sp = page_header(root);
3215 __mmu_spte_walk(vcpu->kvm, sp, fn);
3218 for (i = 0; i < 4; ++i) {
3219 hpa_t root = vcpu->arch.mmu.pae_root[i];
3221 if (root && VALID_PAGE(root)) {
3222 root &= PT64_BASE_ADDR_MASK;
3223 sp = page_header(root);
3224 __mmu_spte_walk(vcpu->kvm, sp, fn);
3230 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3231 gva_t va, int level)
3233 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3235 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3237 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3240 if (ent == shadow_trap_nonpresent_pte)
3243 va = canonicalize(va);
3244 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3245 audit_mappings_page(vcpu, ent, va, level - 1);
3247 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3248 gfn_t gfn = gpa >> PAGE_SHIFT;
3249 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3250 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3252 if (is_error_pfn(pfn)) {
3253 kvm_release_pfn_clean(pfn);
3257 if (is_shadow_present_pte(ent)
3258 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3259 printk(KERN_ERR "xx audit error: (%s) levels %d"
3260 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3261 audit_msg, vcpu->arch.mmu.root_level,
3263 is_shadow_present_pte(ent));
3264 else if (ent == shadow_notrap_nonpresent_pte
3265 && !is_error_hpa(hpa))
3266 printk(KERN_ERR "audit: (%s) notrap shadow,"
3267 " valid guest gva %lx\n", audit_msg, va);
3268 kvm_release_pfn_clean(pfn);
3274 static void audit_mappings(struct kvm_vcpu *vcpu)
3278 if (vcpu->arch.mmu.root_level == 4)
3279 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3281 for (i = 0; i < 4; ++i)
3282 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3283 audit_mappings_page(vcpu,
3284 vcpu->arch.mmu.pae_root[i],
3289 static int count_rmaps(struct kvm_vcpu *vcpu)
3291 struct kvm *kvm = vcpu->kvm;
3292 struct kvm_memslots *slots;
3296 idx = srcu_read_lock(&kvm->srcu);
3297 slots = rcu_dereference(kvm->memslots);
3298 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3299 struct kvm_memory_slot *m = &slots->memslots[i];
3300 struct kvm_rmap_desc *d;
3302 for (j = 0; j < m->npages; ++j) {
3303 unsigned long *rmapp = &m->rmap[j];
3307 if (!(*rmapp & 1)) {
3311 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3313 for (k = 0; k < RMAP_EXT; ++k)
3322 srcu_read_unlock(&kvm->srcu, idx);
3326 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3328 unsigned long *rmapp;
3329 struct kvm_mmu_page *rev_sp;
3332 if (*sptep & PT_WRITABLE_MASK) {
3333 rev_sp = page_header(__pa(sptep));
3334 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3336 if (!gfn_to_memslot(kvm, gfn)) {
3337 if (!printk_ratelimit())
3339 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3341 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3342 audit_msg, (long int)(sptep - rev_sp->spt),
3348 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3349 rev_sp->role.level);
3351 if (!printk_ratelimit())
3353 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3361 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3363 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3366 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3368 struct kvm_mmu_page *sp;
3371 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3374 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3377 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3380 if (!(ent & PT_PRESENT_MASK))
3382 if (!(ent & PT_WRITABLE_MASK))
3384 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3390 static void audit_rmap(struct kvm_vcpu *vcpu)
3392 check_writable_mappings_rmap(vcpu);
3396 static void audit_write_protection(struct kvm_vcpu *vcpu)
3398 struct kvm_mmu_page *sp;
3399 struct kvm_memory_slot *slot;
3400 unsigned long *rmapp;
3404 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3405 if (sp->role.direct)
3410 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3411 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3412 rmapp = &slot->rmap[gfn - slot->base_gfn];
3414 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3416 if (*spte & PT_WRITABLE_MASK)
3417 printk(KERN_ERR "%s: (%s) shadow page has "
3418 "writable mappings: gfn %lx role %x\n",
3419 __func__, audit_msg, sp->gfn,
3421 spte = rmap_next(vcpu->kvm, rmapp, spte);
3426 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3433 audit_write_protection(vcpu);
3434 if (strcmp("pre pte write", audit_msg) != 0)
3435 audit_mappings(vcpu);
3436 audit_writable_sptes_have_rmaps(vcpu);